Systems and methods for etching high aspect ratio structures - Patents.com
Patent Information
- Application Number
- JP2023576026
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2021-06-17
- Filing Date
- 2021-12-22
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2041-12-22
AI Technical Summary
Existing etching methods for high aspect ratio structures, particularly those involving metal-containing chemistries, suffer from under-etching of nitrogen-containing layers and etch stop issues, leading to suboptimal etch rates and mask retention problems.
A method involving the alternating use of non-metallic and metal-containing gases, controlled by a processor, to etch nitrogen-containing and oxide layers in high aspect ratio structures, with precise timing determined by optical sensors and RF signal pulsing to achieve predetermined etch rates and minimize under-etching.
This approach ensures consistent and efficient etching of nitrogen-containing layers in high aspect ratio structures, achieving predetermined etch rates and reducing under-etching, thereby improving mask retention and etch quality.
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Abstract
Description
[Technical field]
[0001] SUMMARY OF THE DISCLOSURE The embodiments described in this disclosure relate to systems and methods for etching high aspect ratio structures. [Background technology]
[0002] The Background Art provided herein is provided to present the contents of the present disclosure generally, and the inventions of the presently named inventors are not admitted expressly or impliedly as prior art to the present disclosure to the extent that they are described in this Background Art section and in a descriptive manner that is not prior art at the time of filing.
[0003] A radio frequency (RF) generator generates an RF signal and provides the RF signal through a matcher to a plasma reactor having a semiconductor wafer being etched when the RF signal is provided to the plasma reactor and an etching gas is provided, however, a desired etch rate for the semiconductor wafer is not achieved while the semiconductor wafer is being etched.
[0004] It is in this context that the embodiments described in this disclosure arose. Summary of the Invention
[0005] The embodiments of the present disclosure provide an apparatus, a method, and a computer program for etching high aspect ratio structures. It should be appreciated that the embodiments can be implemented in several ways, such as a process, an apparatus, a system, hardware, or a method in a computer readable medium. Several embodiments are described below.
[0006] Metal-containing chemistries are used to etch high aspect ratio structures, such as dynamic random access memory stacks. Metal-containing chemistries can exhibit improvements in mask retention during etching of high aspect ratio features. However, when metal-containing chemistries are used to etch nitrogen-containing layers of high aspect ratio structures, under-etching of the nitrogen-containing layer or etch-stop at the nitrogen-containing layer occurs. For example, the nitrogen-containing layer is etched at less than a predetermined etch rate or is not etched at all.
[0007] In an embodiment, a method for etching a stack is described. The method includes etching a first nitrogen-containing layer of the stack by applying a non-metallic gas and stopping the application of the non-metallic gas upon determining that a first oxide layer has been reached. The first oxide layer is below the first nitrogen-containing layer. The method further includes etching the first oxide layer by applying a metal-containing gas. The application of the metal-containing gas is stopped upon determining that a second nitrogen-containing layer will be reached. The second nitrogen-containing layer is below the first oxide layer. The method includes etching the second nitrogen-containing layer by applying the non-metallic gas.
[0008] In one embodiment, a controller for etching a stack of layers is described. The controller includes a processor that controls application of a non-metallic gas to etch a first nitrogen-containing layer of the stack of layers. The processor then ceases application of the non-metallic gas upon determining that a first oxide layer has been reached. The first oxide layer is below the first nitrogen-containing layer. The processor further controls etching of the first oxide layer by applying a metal-containing gas. The processor then ceases application of the metal-containing gas upon determining that a second nitrogen-containing layer will be reached. The second nitrogen-containing layer is below the first oxide layer. The processor further controls etching of the second nitrogen-containing layer by applying the non-metallic gas. The controller also includes a memory device coupled to the processor.
[0009] In an embodiment, a plasma system for etching a stack is described. The plasma system includes a first gas source storing a metal-containing gas. The plasma system further includes a second gas source storing a non-metal gas. The plasma system includes a plasma chamber connected to the first gas source via a first gas line and to the second gas source via a second gas line. The plasma system also includes a host computer connected to the first and second gas lines. The host computer controls the etching of a first nitrogen-containing layer of the stack by applying the non-metal gas. The host computer then stops the application of the non-metal gas upon determining that the first oxide layer has been reached. The host computer further controls the etching of the first oxide layer by applying the metal-containing gas. The host computer stops the application of the metal-containing gas upon determining that the second nitrogen-containing layer will be reached. The host computer then controls the etching of the second nitrogen-containing layer by applying the non-metal gas.
[0010] Some advantages of the systems and methods for etching high aspect ratio structures described herein include etching a nitrogen-containing layer of the high aspect ratio structure with a non-metallic gas and etching an oxide layer of the high aspect ratio structure with a metal-containing gas. The oxide layer is etched at a predetermined rate with the metal-containing gas. By etching the nitrogen-containing layer with a non-metallic gas instead of a metal-containing gas, a predetermined etch rate for etching the high aspect ratio structure is achieved.
[0011] Further advantages of the systems and methods described herein for etching high aspect ratio structures include pulsing parameter levels of the primary radio frequency (RF) signal and the secondary RF signal at a predetermined rate. An example of the primary RF signal is a low frequency (LF) RF signal, and an example of the secondary RF signal is a high frequency (HF) RF signal. By achieving the predetermined rate, the passivation deposition is driven more toward the top of the feature than toward the bottom. By driving the deposition in this way, the possibility of under-etching the nitrogen-containing layer of the high aspect ratio structure is reduced.
[0012] Certain other aspects will become apparent from the following detailed description taken in conjunction with the accompanying drawings. [Brief description of the drawings]
[0013] The embodiments are understood with reference to the following description in conjunction with the accompanying drawings.
[0014] [Figure 1] 1A and 1B are diagrams illustrating embodiments of high aspect ratio contact (high aspect ratio) structures.
[0015] [Figure 2A] 2A-2C are diagrams of embodiments of high aspect ratio structures illustrating processing of the high aspect ratio structures of FIG. 1;
[0016] [Figure 2B] 2B is a diagram of an embodiment of a high aspect ratio structure illustrating further processing of the high aspect ratio structure of FIG. 2A.
[0017] [Figure 2C] 2C is a diagram of an embodiment of a high aspect ratio structure illustrating further processing of the high aspect ratio structure of FIG. 2B.
[0018] [Figure 2D] 2D is an embodiment of a high aspect ratio structure illustrating further processing of the high aspect ratio structure of FIG. 2C.
[0019] [Figure 2E] 2E is a diagram of a high aspect ratio structure illustrating further processing of the high aspect ratio structure of FIG. 2D.
[0020] [Diagram 3] FIG. 2 is a diagram of an embodiment of a system illustrating application of chemicals A and B to the high aspect ratio structure of FIG. 1.
[0021] [Figure 4A] FIG. 1 is a diagram of an embodiment of a system illustrating the use of an optical sensor to determine the time to switch between application of chemical A and application of chemical B.
[0022] [Figure 4B] 2 is a diagram of an embodiment of a system illustrating the use of a range of light intensities to etch different layers of the high aspect ratio structure of FIG. 1.
[0023] [Figure 5A] 1 illustrates an embodiment of a graph showing pulsing of a primary RF signal versus time t.
[0024] [Figure 5B] 11 illustrates an embodiment of a graph showing pulsing of a secondary RF signal versus time t.
[0025] [Figure 6] FIG. 1 is a diagram of an embodiment of a system showing a low frequency (LF) radio frequency (RF) generator and a high frequency (HF) RF generator for inter-level pulses during application of chemicals A and B. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0026] The following embodiments describe systems and methods for etching high aspect ratio structures. It will be apparent that the embodiments may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the embodiments.
[0027] FIG. 1 is a diagram of an embodiment of a high aspect ratio structure 100. Examples of high aspect ratio structure 100 include dynamic random access memory stacks and silicon-oxide-nitride-oxide-silicon (SONOS) stacks. By way of example, in dynamic random access memory, each data bit is stored in a memory cell that includes a capacitor and a transistor. In this example, when the capacitor is charged, a 1 bit is stored in the memory cell, and when the capacitor is discharged, a 0 bit is stored in the memory cell. By way of example, SONOS stacks are used in non-volatile memories such as flash memory, electrically erasable read only memory (EEPROM), and the like.
[0028] The high aspect ratio structure 100 includes a mask layer, a nitrogen-containing layer 1, an oxide layer 1, another nitrogen-containing layer 2, another oxide layer 2, a nitrogen-containing layer 3, and a substrate layer. As an example, the alternating nitrogen-containing and oxide layers of the high aspect ratio structure form the dielectric layers of each capacitor of the high aspect ratio structure, and the nitrogen-containing and oxide layers are etched to fabricate the capacitors of the high aspect ratio structure. As an example, the substrate layer is fabricated from silicon. As shown, the nitrogen-containing layer 3 is layered on the substrate layer, and the oxide layer 2 is layered on the nitrogen-containing layer 3. Also, the nitrogen-containing layer 2 is deposited on the oxide layer 2, and the oxide layer 1 is deposited on the nitrogen-containing layer 2. Similarly, the nitrogen-containing layer 1 is layered on the oxide layer 1, and the mask layer is deposited on the nitrogen-containing layer 1. For example, the nitrogen-containing layer 1 is adjacent to the oxide layer 1, and the oxide layer 1 is adjacent to the nitrogen-containing layer 2. The nitrogen-containing layer 2 is adjacent to the oxide layer 2, and the oxide layer 2 is adjacent to the nitrogen-containing layer 3. Nitrogen-containing layer 3 is adjacent to the substrate layer, and the mask layer is adjacent to nitrogen-containing layer 1. For example, two layers of high aspect ratio structure 100 (e.g., nitrogen-containing layer 1 and oxide layer 1, or oxide layer 1 and nitrogen-containing layer 2) are adjacent to each other when there is no layer between the two layers.
[0029] Examples of the nitrogen-containing layers described herein are nitrogen-containing films made of silicon nitride (SiN), or silicon carbonitride (SiCN), or silicon oxynitride (SiON), or combinations thereof. For example, the nitrogen-containing layers may be referred to herein as nitrogen-containing silicon layers or nitride layers. By way of example, each nitrogen-containing layer of the high aspect ratio structure 100 has a height between 15 nanometers (nm) and 300 nm. For example, the thickness of the nitrogen-containing layer 1 is 30 nm, the thickness of the nitrogen-containing layer 2 is 50 nm, and the thickness of the nitrogen-containing layer 3 is 60 nm. By way of example, each oxide layer of the high aspect ratio structure 100 has a height between 15 nm and 300 nm. For example, the thickness of the oxide layer 1 is 100 nm, and the thickness of the oxide layer 2 is 200 nm.
[0030] In one embodiment, instead of the nitrogen-containing layer, a silicon-containing layer, such as a polysilicon (P) layer or a nitrogen-silicon layer, is used. For example, each of the nitrogen-containing layers 1, 2, and 3 of the high aspect ratio stack 100 is replaced with a silicon-containing layer, respectively. The silicon-containing layers are etched in the same manner as the nitrogen-containing layers 1, 2, and 3 were etched. For example, the first silicon-containing layer used in place of the nitrogen-containing layer 1 is etched in the same manner as the nitrogen-containing layer 1 was etched, the second silicon-containing layer used in place of the nitrogen-containing layer 2 is etched in the same manner as the nitrogen-containing layer 2 was etched, and the third silicon-containing layer used in place of the nitrogen-containing layer 3 is etched in the same manner as the nitrogen-containing layer 3 was etched. An example of a nitrogen-silicon layer is a silicon nitride layer.
[0031] 2A is an embodiment diagram of a high aspect ratio structure 200 to illustrate processing of high aspect ratio structure 100 (FIG. 1). High aspect ratio structure 200 includes the same layers as high aspect ratio structure 100 (FIG. 1), but in high aspect ratio structure 200, mask layer and nitrogen-containing layer 1 are etched to form features 202 (such as flow channels) therein. The remaining layers of high aspect ratio structure 100 are not shown in FIG. 2A to avoid obscuring the illustration.
[0032] A chemical A is applied to etch the mask layer and the nitrogen-containing layer 1. Examples of the chemical A include non-metallic gases (such as hydrofluorocarbons or oxygen). Examples of hydrofluorocarbons include difluoromethane (CH2F2), methyl fluoride (CH3F), and trifluoromethane (CHF3). The chemical A is applied to etch the nitrogen-containing layer 1 until a horizontal level 212 is reached inside the oxide layer 1. As an example, the horizontal level is a level along the x-axis. The horizontal level 212 is at a predetermined depth 204 from the top surface 206 of the oxide layer 1. For example, a recess 201 of a predetermined height is drilled inside the oxide layer 1. The recess 201 is part of a feature 202. The heights described herein are measured along the y-axis. The y-axis is perpendicular to the x-axis along the horizontal direction. The y-axis is perpendicular to the vertical direction. Both the x-axis and the y-axis are perpendicular to the z-axis.
[0033] The predetermined depth 204 is determined from a top surface 206 of the oxide layer 1. An example of the predetermined depth 204 is a vertical distance of about 50 nm. For example, the predetermined depth 204 is between 40 nm and 60 nm. As another example, the predetermined depth 204 is between 45 nm and 55 nm. As yet another example, the predetermined depth 204 is a fraction of the depth of the oxide layer 1. For example, the predetermined depth 204 is between 1 and 10 percent of the depth of the oxide layer 1. The depth of the oxide layer 1 extends from the top surface 206 to the bottom surface 208 of the oxide layer 1. By way of example, the layer depths used herein extend along the y-axis.
[0034] Within the feature 202, when a horizontal level 212 is reached, an intermediate surface 210 of the oxide layer 1 is exposed. The intermediate surface 210 forms a bottom surface of the feature 202. When the horizontal level 212 is reached, a recess 201 is formed with a space within the oxide layer 1. For example, the recess 201 is formed between the top surface 206 and the intermediate surface 210 and has a predetermined depth 204. The intermediate surface 210 is located between the top surface 206 and the bottom surface 208. For example, the height of the intermediate surface 210 is less than the height of the top surface 206 but greater than the height of the bottom surface 208. For example, the height of each side of the high aspect ratio structure 200 is measured from the bottom surface 212 of the substrate layer.
[0035] When chemical A is used to etch the nitrogen-containing layer 1, another chemical B is not used to etch the nitrogen-containing layer 1. For example, during the period when chemical A is applied to etch the nitrogen-containing layer 1, chemical B is not applied to etch the nitrogen-containing layer 1. Examples of chemical B include metal-containing compounds. By way of example, metal-containing compounds are compounds that, when applied with sufficient vapor pressure, provide a supply of gas to the high aspect ratio structure 100. Examples of metal-containing compounds are metal-containing gases (such as carbonyls or metal fluorides). For example, the metal fluoride is tungsten hexafluoride (WF6). In this example, the metal-containing gas is applied as a fluorocarbon and nitrogen trifluoride (NF3). In this example, the fluorocarbon is a compound formed by replacing one or more hydrogen atoms in a hydrocarbon with one or more fluorine atoms. Other examples of metal-containing compounds are rhenium hexafluoride (ReF6), molybdenum hexafluoride (MoF6), MoCl2F2, tantalum pentafluoride (TaF5), vanadium fluoride (VF5), vanadium oxytrichloride (VOCl3), titanium tetrachloride (TiCl4), plumbane (PbH4), tetramethyltin (Sn(CH3)4), nickel tetracarbonyl (Ni(CO)4), dimethylzinc (Zn(CH 3)2), tungsten(VI) oxide tetrachloride (WOCl4), bis(t-butylimido)bis(dimethylamino)tungsten(VI) (((CH3)3CN)2W(N(CH3)2)2), mesitylenetungsten tricarbonyl (C6H3(CH3)3W(CO)3), tungsten oxytetrafluoride(VI) (WOF4), WO2F2, and tungsten dioxide dichloride (WO2Cl2). An example of a carbonyl is tungsten hexacarbonyl (W(CO)6).
[0036] It should be noted that if chemical B is used instead of chemical A, an etch stop occurs inside the nitrogen-containing layer 1 or the nitrogen-containing layer 1 is under-etched. When the nitrogen-containing layer 1 is under-etched, the etch rate of the nitrogen-containing layer 1 is less than the predetermined etch rate.
[0037] 2B is an embodiment diagram of high aspect ratio structure 220 to illustrate further processing of high aspect ratio structure 200 (FIG. 2A). High aspect ratio structure 220 includes the same layers as high aspect ratio structure 100 (FIG. 1), but in high aspect ratio structure 220, oxide layer 1 is etched in addition to mask layer and nitrogen-containing layer 1 to form feature 222 in mask layer, nitrogen-containing layer 1, and oxide layer 1. For example, feature 202 (FIG. 2A) is further etched to form feature 222. The remaining layers of high aspect ratio structure 100 are not shown in FIG. 2B to avoid obscuring the illustration.
[0038] After the application of chemical A to etch the nitrogen-containing layer 1 is stopped, chemical B is applied to etch a portion of the oxide layer 1. For example, application of chemical B starts at the horizontal level 212 (FIG. 2A). Chemical B is applied until the horizontal level 224 is reached. The etched portion of the oxide layer 1 is located between the horizontal level 212 and the horizontal level 224. An example of the amount of the etched portion of the oxide layer 1 is 90-95% of the oxide layer 1. The horizontal level 224 is at a predetermined distance 226 from the top surface 228 of the nitrogen-containing layer 2. The top surface 228 of the nitrogen-containing layer 2 is adjacent or adjacent to the bottom surface 208 of the oxide layer 1. For example, there is no space between the top surface 228 and the bottom surface 208. It is noted that during the period when chemical B is applied to etch the oxide layer 1, chemical A is not applied.
[0039] The application of chemical B is reduced or stopped when the horizontal level 224 is reached. If chemical B is reduced when the horizontal level 224 is reached, then the application of chemical B is stopped when the horizontal level of the top surface 228 of the nitrogen-containing layer 2 is reached. Note that during the period when chemical B is applied to etch the oxide layer 1, chemical A is not applied.
[0040] After chemical B is stopped or reduced, residual chemical B from the application of chemical B etches the remaining portions of oxide layer 1 for a predetermined period of time. For example, after chemical B is stopped or reduced at horizontal level 224, the oxide of oxide layer 1 is etched by residual chemical B until nitrogen-containing layer 2 is reached.
[0041] Chemical A is applied a predetermined period of time after the application of chemical B is stopped or reduced. Chemical A is applied to begin etching the nitrogen-containing layer 2.
[0042] FIG. 2C is an embodiment diagram of high aspect ratio structure 240 to illustrate further processing of high aspect ratio structure 220 (FIG. 2B). High aspect ratio structure 240 includes the same layers as high aspect ratio structure 100 (FIG. 1), but in high aspect ratio structure 240, mask layer, nitrogen-containing layer 1, and oxide layer 1 as well as nitrogen-containing layer 2 are etched to form feature 242 in mask layer, nitrogen-containing layer 1, oxide layer 1, and nitrogen-containing layer 2. For example, feature 222 (FIG. 2B) is further etched to form feature 242. The remaining layers of high aspect ratio structure 100 are not shown in FIG. 2C to avoid obscuration.
[0043] Similar to how chemical A was applied to form recess 201 (FIG. 2A) in oxide layer 1, nitrogen-containing layer 2 is etched until recess 243 is formed in oxide layer 2. For example, chemical A is applied to etch oxide layer 2 until horizontal level 244 is reached inside oxide layer 2. Horizontal level 244 is at a predetermined depth 246 from top surface 248 of oxide layer 2. For example, a recess of a predetermined height is drilled into oxide layer 2. Predetermined depth 246 is determined from top surface 248 of oxide layer 2.
[0044] An example of the predetermined depth 246 is a vertical distance of about 50 nm. For example, the predetermined depth 246 is between 40 nm and 60 nm. As another example, the predetermined depth 246 is between 45 nm and 50 nm. As yet another example, the predetermined depth 246 is a fraction of the depth of the oxide layer 2. For example, the predetermined depth 246 is between 1 and 10 percent of the depth of the oxide layer 2. The depth of the oxide layer 2 extends from a top surface 248 to a bottom surface 250 of the oxide layer 2.
[0045] As an example, predetermined depth 246 is equal to predetermined depth 204 (FIG. 2A). As another example, predetermined depth 246 is not equal to predetermined depth 204. For example, predetermined depth 246 is greater than or less than predetermined depth 204.
[0046] Within feature 242, an intermediate surface 252 of oxide layer 2 is exposed when horizontal level 244 is reached. Intermediate surface 252 is located between top surface 248 and bottom surface 250. For example, the height of intermediate surface 252 is less than the height of top surface 248 but greater than the height of bottom surface 250. As previously discussed, the height of each surface of high aspect ratio structure 240 is measured from bottom surface 212.
[0047] When chemical A is used to etch the nitrogen-containing layer 2, another chemical B is not used to etch the nitrogen-containing layer 2. For example, during the period when chemical A is applied to etch the nitrogen-containing layer 2, chemical B is not applied to etch the nitrogen-containing layer 2. It should be noted that if chemical B is used instead of chemical A, an etch stop occurs in which the nitrogen-containing layer 2 is not etched, or the nitrogen-containing layer 2 is under-etched. When the nitrogen-containing layer 2 is under-etched, the etch rate of the nitrogen-containing layer 2 is less than a predetermined etch rate.
[0048] FIG. 2D is an embodiment diagram of high aspect ratio structure 260 illustrating further processing of high aspect ratio structure 240 (FIG. 2C). High aspect ratio structure 260 includes the same layers as high aspect ratio structure 100 (FIG. 1), but in high aspect ratio structure 260, oxide layer 2 is etched in addition to mask layer, nitrogen-containing layer 1, oxide layer 1, and nitrogen-containing layer 2 to form feature 262 in mask layer, nitrogen-containing layer 1, oxide layer 1, nitrogen-containing layer 2, and oxide layer 2. For example, feature 242 (FIG. 2C) is further etched to form feature 262. The remaining layers of high aspect ratio structure 100 are not shown in FIG. 2D to avoid obscuration.
[0049] After the application of chemical A to etch the nitrogen-containing layer 2 is stopped, chemical B is applied to etch the oxide layer 2. For example, the application of chemical B starts at the horizontal level 244 (FIG. 2C). Chemical B is applied until the horizontal level 264 is reached. The horizontal level 264 is proximate to the nitrogen-containing layer 3. For example, the horizontal level 264 is at a predetermined distance 266 from the top surface 268 of the nitrogen-containing layer 3. As another example, the horizontal level 264 is closer to the nitrogen-containing layer 3 than the nitrogen-containing layer 2. For example, the horizontal level 264 is in the bottom half of the oxide layer 2, but not in the top half of the oxide layer 2. The top surface 268 of the nitrogen-containing layer 3 is adjacent or adjacent to the bottom surface 250 of the oxide layer 2. For example, there is no space between the top surface 268 and the bottom surface 250. Note that during the period when chemical B is applied to etch the oxide layer 2, chemical A is not applied.
[0050] When plateau 264 is reached, the application of chemical B is reduced or stopped. If chemical B is reduced when plateau 264 is reached, then the application of chemical B is stopped when the plateau of top surface 268 of nitrogen-containing layer 2 is reached. Note that during the period when chemical B is applied to etch oxide layer 2, chemical A is not applied.
[0051] After chemical B is stopped or reduced, residual chemical B from the application of chemical B etches the remaining portions of oxide layer 2 over a period of time. For example, after chemical B is stopped or reduced at horizontal level 264, the oxide of oxide layer 2 is etched by residual chemical B until nitrogen-containing layer 3 is reached.
[0052] After a predetermined period of time has elapsed since application of chemical B has been stopped or reduced, chemical A is applied to begin etching nitrogen-containing layer 3. As an example, the predetermined period of time for etching oxide layer 2 is equal to the predetermined period of time for etching oxide layer 1. As another example, the predetermined period of time for etching oxide layer 2 is not equal to (e.g., is longer or shorter than) the predetermined period of time for etching oxide layer 1.
[0053] FIG. 2E is an illustration of high aspect ratio structure 280 to illustrate further processing of high aspect ratio structure 260 (FIG. 2D). High aspect ratio structure 280 includes the same layers as high aspect ratio structure 100 (FIG. 1), but in high aspect ratio structure 280, mask layer, nitrogen containing layer 1, oxide layer 1, nitrogen containing layer 2, and oxide layer 2 as well as nitrogen containing layer 3 are etched to form feature 282 in mask layer, nitrogen containing layer 1, oxide layer 1, nitrogen containing layer 2, oxide layer 2, and nitrogen containing layer 3. For example, feature 262 (FIG. 2D) is further etched to form feature 282. The remaining layers of high aspect ratio structure 100 are not shown in FIG. 2E to avoid obscuration.
[0054] Chemical A is applied to etch nitrogen-containing layer 3 until it reaches the substrate layer. For example, chemical A is applied until it reaches top surface 284 of the substrate layer. The substrate layer extends from top surface 284 to bottom surface 212.
[0055] When chemical A is used to etch the nitrogen-containing layer 3, chemical B is not used to etch the nitrogen-containing layer 3. For example, during the period when chemical A is applied to etch the nitrogen-containing layer 3, chemical B is not applied to etch the nitrogen-containing layer 3. It should be noted that if chemical B is used instead of chemical A, an etch stop occurs in which the nitrogen-containing layer 3 is not etched, or the nitrogen-containing layer 3 is under-etched. When the nitrogen-containing layer 3 is under-etched, the etch rate of the nitrogen-containing layer 3 is less than the predetermined etch rate. In this manner, as described with reference to FIGS. 2A-2E, chemicals A and B are applied alternately or sequentially to etch the nitride and oxide layers of the high aspect ratio structure 100.
[0056] FIG. 3 is a diagram of an embodiment of a system 300 showing the application of chemicals A and B. The system 300 includes a host computer 302, a low frequency (LF) radio frequency (RF) generator, a high frequency (HF) RF generator, a matcher, and a plasma chamber 304. By way of example, the LFRF generator has an operating frequency of 400 kilohertz (kHz) or 2 megahertz (MHz). By way of example, the HFRF generator has an operating frequency of 13.56 MHz, or 27 MHz, or 60 MHz. It is noted that the operating frequency of the HFRF generator is greater than the operating frequency of the LFRF generator. The LFRF generator is an example of a primary generator, and the HFRF generator is an example of a secondary generator.
[0057] A matcher is a network of circuit components (such as inductors, capacitors, resistors, etc.). For example, a matcher includes one or more shunt circuits and one or more series circuits. Each shunt circuit has one or more circuit components, as does each series circuit. A first branch circuit including one or more shunt circuits or one or more series circuits, or a combination thereof, is connected between the input 310 and the output 314 of the matcher. A second branch circuit including one or more shunt circuits or one or more series circuits, or a combination thereof, is connected between the input 312 and the output 314 of the matcher.
[0058] Examples of the host computer 302 include a desktop computer, a laptop computer, a controller, a tablet, and a smartphone. The host computer 302 includes a processor 306 and a memory device 308. The processor 306 is connected to the memory device 308. Examples of the processor as used herein include a microprocessor, an application specific integrated circuit (ASIC), a programmable logic device (PLD), an integrated microcontroller, and a central processing unit (CPU). Examples of the memory device as used herein include a read only memory (ROM), a random access memory (RAM), a flash memory, a storage disk array, a hard disk, and the like.
[0059] The plasma chamber 304 includes a substrate support 316, such as an electrostatic chuck (ESC). The ESC includes a lower electrode 318. The plasma chamber 106 further includes a showerhead 320 in which an upper electrode 322 is embedded. Each of the lower electrode 318 and the upper electrode 322 is made of a metal (e.g., aluminum or an aluminum alloy). A bottom surface of the showerhead 320 faces and is located above an upper surface of the substrate support 316. A substrate S is placed on the upper surface of the substrate 316. An example of the substrate S is the high aspect ratio structure 100 (FIG. 1).
[0060] The system 300 further comprises a gas source 324 and another gas source 326. Examples of gas sources include containers for storing chemicals described herein. For example, the gas source 324 stores chemical A, and the gas source 326 stores chemical B. As another example, the gas source 326 stores fluorocarbon and nitrogen trifluoride of chemical B. The system 300 further comprises a driver A and a driver B. Examples of drivers include one or more transistors. For example, the driver includes one or more field effect transistors (FETs) connected to each other.
[0061] The LFRF generator has an output 328 connected via an RF cable RFC1 to an input 310, which is connected to a first branch of the matcher 310. The HFRF generator also has an output 330 connected via an RF cable RFC2 to an input 312, which is connected to a second branch of the matcher 310. The first and second branches are connected to each other and to an output 314. The output 314 is connected to a lower electrode 318 via an RF transmission line RFT. The upper electrode 322 is connected to a reference potential, such as ground potential.
[0062] The processor 306 is also connected to the LFRF generator via a transmission cable TC1 and to the HFRF generator via a transmission cable TC2. Examples of transmission cables include cables used for serial transfer of data, cables used for parallel transfer of data, and Universal Serial Bus (USB) cables.
[0063] The gas source 324 is connected to the showerhead 320 via a gas supply line 332. Also, the gas source 326 is connected to the showerhead 320 via a gas supply line 334. Examples of the gas supply line include a gas duct and a gas tube. The processor 306 is connected to a driver A and also to a driver B. The driver A is connected to a valve 336 connected to the gas supply line 332. For example, the valve 336 is installed inside the gas supply line 332. Similarly, the driver B is connected to a valve 337 connected to the gas supply line 334. Examples of the valve include a valve assembly. For example, the valve assembly includes a stationary valve plate and a movable valve plate. The movable valve plate slides relative to the stationary valve plate. The stationary valve has a plurality of openings. Another example of the valve assembly includes a solenoid valve.
[0064] The processor 306 generates and provides a recipe signal having a recipe to the LFRF generator over transmission cable TC1. An example of a recipe provided to the LFRF generator is the frequency and parameter levels of the LFRF signal 338 (e.g., a sinusoidal signal) generated by the LFRF generator. Upon receiving the recipe, the LFRF generator stores the recipe.
[0065] Similarly, the processor 306 generates and provides a recipe signal having a recipe to the HFRF generator over the transmission cable TC2. An example of a recipe provided to the HFRF generator is the frequency and parameter levels of the HFRF signal 340 (e.g., a sinusoidal signal) generated by the HFRF generator. Upon receiving the recipe, the HFRF generator stores the recipe.
[0066] The processor 306 generates a trigger signal (e.g., a signal having a single digital pulse) and transmits the trigger signal to the LFRF generator over the transmission cable TC1. The processor 306 also transmits the trigger signal to the HFRF generator over the transmission cable TC2.
[0067] In response to receiving the trigger signal, the LFRF generator generates an RF signal 338 and transmits the RF signal 338 through output 328 and RF cable RFC1 to input 310. Also in response to receiving the trigger signal, the HFRF generator generates an RF signal 340 and transmits the RF signal 340 through output 330 and RF cable RFC2 to input 312.
[0068] A first branch of the matcher 314 receives an RF signal 338 through the input 310, and a second branch of the matcher 314 receives an RF signal 340 through the input 312. The matcher 314 modifies the impedance of the RF signals 338 and 340 to output first and second modified RF signals. The impedance of the RF signals 338 and 340 is modified by matching the impedance of a load connected to the output 314 with the impedance of a source connected to the inputs 310 and 312. Examples of loads include the RF transmission line RFT and the plasma chamber 304. Examples of sources include the RF cables RFC1 and RFC2, and the LFRF and HFRF generators. The matcher 314 further combines (e.g., sums or adds) the first and second modified RF signals to output a modified RF signal 342 at the output 314. The modified RF signal 342 is provided to the lower electrode 318 through the RF transmission line RFT.
[0069] Also, when the modified RF signal 342 is provided to the plasma chamber 304, chemicals A and B are alternately supplied to the plasma chamber 304. For example, the processor 306 generates and sends a close drive signal to the driver A. Upon receiving the close drive signal, the driver A generates a current signal and provides the current signal to the valve 336 to close the valve 336. For example, when a current signal is provided to the valve 336 to close the valve 336, a field, such as an electric field, is generated to rotate the movable valve plate of the valve 336 relative to the stationary valve plate of the valve 336, closing all openings in the stationary valve plate. When the valve 336 is closed, the chemical A stored in the gas source 324 is not supplied to the showerhead 320 through the gas supply line 332. In this manner, when the valve 336 is closed, application of chemical A to the plasma chamber 304 is stopped.
[0070] As another example, the processor 306 generates and sends a full open drive signal to the driver A. Upon receiving the full open drive signal, the driver A generates a current signal and provides the current signal to the valve 336 to fully open the valve 336. For example, when a current signal is provided to the valve 336 to fully open the valve 336, a field, such as an electric field, is formed to rotate a movable valve plate of the valve 336 relative to a stationary valve plate of the valve 336 to open all of the openings in the stationary valve plate. When the valve 336 is fully open, the chemical A stored in the gas source 324 is provided to the showerhead 320 through the gas supply line 332.
[0071] As yet another example, the processor 306 generates and transmits a partial open drive signal to the driver A. Upon receiving the partial open drive signal, the driver A generates a current signal and provides the current signal to the valve 336 to partially open the valve 336. For example, when the current signal is provided to the valve 336 to partially open the valve 336, a field, such as an electric field, is formed to rotate a movable valve plate of the valve 336 relative to a stationary valve plate of the valve 336 to open at least one opening, but not all openings or a portion of the openings, of the stationary valve plate. When the valve 336 is partially open, a small amount of the chemical A stored in the gas source 324 is provided to the showerhead 320 through the gas supply line 332. For example, the amount of the chemical A is provided when the amount is substantially less than the amount of the chemical A provided when the valve 336 is fully open. For a further example, the amount of the chemical A is substantially less than the amount of the chemical A provided when the amount is 0.1% to 10% of the amount of the chemical A provided when the valve 336 is fully open. In this manner, when valve 336 is partially open, application of chemical A is reduced compared to when valve 336 is fully open.
[0072] Similarly, by way of example, processor 306 generates and sends a close drive signal to driver B. Upon receiving the close drive signal, driver B generates a current signal and provides the current signal to valve 337 to close valve 337. For example, when a current signal is provided to valve 337 to close valve 337, a field, such as an electric field, is created to rotate a movable valve plate of valve 337 relative to a stationary valve plate of valve 337, closing all openings in the stationary valve plate. When valve 337 is closed, chemical B stored in gas source 326 is not delivered to showerhead 320 through gas delivery line 334. In this manner, application of chemical B ceases when valve 337 is closed.
[0073] As another example, processor 306 generates and sends a full open drive signal to driver B. Upon receiving the full open drive signal, driver B generates a current signal and provides the current signal to valve 337 to fully open valve 337. For example, when a current signal is provided to valve 337 to fully open valve 337, a field is created to rotate a movable valve plate of valve 337 relative to a stationary valve plate of valve 337, opening all openings in the stationary valve plate. When valve 337 is fully open, chemical B stored in gas source 326 is provided to showerhead 320 through gas supply line 334.
[0074] As yet another example, the processor 306 generates and transmits a partial open drive signal to the driver B. Upon receiving the partial open drive signal, the driver B generates a current signal and provides the current signal to the valve 337 to partially open the valve 337. For example, when the current signal is provided to the valve 337 to partially open the valve 337, a field, such as an electric field, is formed to rotate the movable valve plate of the valve 337 relative to the stationary valve plate of the valve 337 to open at least one opening, but not all openings or a portion of the openings, of the stationary valve plate. When the valve 337 is partially open, a small amount of the chemical B stored in the gas source 326 is provided to the showerhead 320 through the gas supply line 334. For example, the small amount is provided when the amount of the chemical B is substantially less than the amount of the chemical B provided when the valve 337 is fully open. For a further example, the amount of the chemical B is substantially less than the amount of the chemical B provided when the valve 337 is fully open when the amount of the chemical B is 0.1% to 10% of the amount of the chemical B provided when the valve 337 is fully open. In this manner, when valve 337 is partially open, application of chemical B is reduced compared to when valve 337 is fully open.
[0075] Chemicals A or B are alternately supplied through the showerhead 320 into a gap 344 between the showerhead 320 and the substrate support 316. When the modification signal 342 and chemicals A or B are supplied to the plasma chamber 304, a plasma is generated or sustained in the gap 344 to process (e.g., etch) the substrate S.
[0076] In one embodiment, a table is provided for controlling the application of chemicals A and B for predetermined time periods. The table is stored in the memory device 308 and is generated prior to processing the substrate S. The table includes a list of layers of the high aspect ratio structure 100 (FIG. 1) and predetermined time periods for etching the layers. For example, the table includes that the nitrogen-containing layer 1 is etched for a first time period, the oxide layer 1 is etched for a second time period, the nitrogen-containing layer 2 is etched for a third time period, the oxide layer 2 is etched for a fourth time period, and the nitrogen-containing layer 3 is etched for a fifth time period.
[0077] The processor 306 accesses the table from the memory device 308 and determines to apply chemicals A and B according to the time periods in the table. For example, the processor 306 determines to apply chemical A for a first time period to etch nitrogen-containing layer 1, and determines to apply chemical B for a second time period to etch oxide layer 1. The processor 306 also determines to apply chemical A for a third time period to etch nitrogen-containing layer 2, and determines to apply chemical B for a fourth time period to etch oxide layer 2. The processor 306 determines to apply chemical A for a fifth time period to etch nitrogen-containing layer 3.
[0078] Processor 306 controls each of drivers A and B (FIG. 3) for a corresponding one of the first through fifth time periods to etch the nitrogen-containing and oxide layers of high aspect ratio structure 100. For example, processor 306 controls driver A to fully open valve 336 (FIG. 3). Valve 336 is controlled to be fully open for a first time period. After the first time period, processor 306 controls driver A to close valve 336. Further in this example, after valve 336 closes at the end of the first time period, processor 306 controls driver B to fully open valve 337 (FIG. 3). Valve 337 is controlled to be fully open for a second time period. After the second time period, processor 306 controls driver B to close valve 337. In this example, after valve 337 closes at the end of the second time period, processor 306 closes valve 336 to be fully open for a third time period, similar to how valve 336 was controlled to be fully open for the first time period. In this example, processor 306 controls valve 336 to close after the third time period. Also in this example, after valve 336 closes at the end of the third time period, processor 306 controls valve 337 to be fully open for a fourth time period. In this example, processor 306 controls valve 337 to close after the fourth time period. Also in this example, processor 306 controls valve 336 at the end of the fourth time period to be fully open for a fifth time period. Processor 306 controls valve 336 to close after the fifth time period.
[0079] Note that in a first period, the nitrogen-containing layer 1 and a portion of the oxide layer 1 are etched by chemical A until the horizontal level 212 (FIG. 2A) is reached. Similarly, in a second period, the oxide layer 1 is etched by chemical B until the horizontal level 224 (FIG. 2B) is reached. Also, in a third period, the nitrogen-containing layer 2 and a portion of the oxide layer 2 are etched by chemical A until the horizontal level 244 (FIG. 2C) is reached. Furthermore, in a fourth period, the oxide layer 2 is etched by chemical B until the horizontal level 264 (FIG. 2D) is reached. Also, in a fifth period, the nitrogen-containing layer 3 is etched by chemical A until the substrate layer is reached.
[0080] In one embodiment, the predetermined periods of the table are precalculated according to the thicknesses of the oxide layer and the nitrogen-containing layer of the high aspect ratio structure 100. The periods of the table are precalculated during an experimental routine before etching the high aspect ratio structure 100. For example, when the nitrogen-containing layer 2 is thicker than the nitrogen-containing layer 1, the third period is longer than the first period. As another example, when the oxide layer 1 is thicker than the oxide layer 2, the second period is longer than the fourth period. As another example, a dummy substrate that mimics the high aspect ratio structure 100 is used to calculate the predetermined periods of the table.
[0081] In an embodiment, the processor 306 determines that the horizontal level 224 is proximate to the nitrogen-containing layer 2. For example, the horizontal level 224 is closer to the nitrogen-containing layer 2 than to the nitrogen-containing layer 1. For example, the horizontal level 224 is in the bottom half of the oxide layer 1 and is not in the top half of the oxide layer 1.
[0082] 4A is a diagram of an embodiment of a system 400 illustrating the use of an optical sensor 402 to determine the time to switch between application of chemical A and application of chemical B. System 400 has the same components as system 300 (FIG. 3) except for the inclusion of an optical sensor 402. Examples of optical sensor 402 include an optical emission spectroscopy (OES), or an end point detection sensor, or an infrared sensor.
[0083] The optical sensor 402 is positioned relative to the plasma chamber 304 such that it has a view into the plasma formed in the gap 344. For example, the optical sensor 402 is coupled to a window 404 integrated into a sidewall 406 of the plasma chamber 304. The sidewall 406 is secured to a top wall 408 and a bottom wall 410 of the plasma chamber 304. The sidewall 406 is located between the wall 408 and the wall 410.
[0084] The optical sensor 402 is connected to the processor 306. The processor 306 controls the valve 336 to apply the chemical A to the gap 344 to etch the nitrogen-containing layer 1. While the nitrogen-containing layer 1 of the substrate S is etched using the modified RF signal 342 and the chemical A, the optical sensor 402 senses a first wavelength of the plasma formed in the gap 344 and outputs a first electrical signal for a first period of time. The first electrical signal is transmitted from the optical sensor 402 to the processor 306 for a first period of time. The processor 306 determines whether the intensity of the first wavelength indicated by the first electrical signal is within a predetermined range, such as the optical intensity range 1 described below. If it is within the predetermined range, the processor 306 determines that the nitrogen-containing layer 1 is still being etched. After the nitrogen-containing layer 1 is etched and etching of the oxide layer 1 is started, the optical sensor 402 senses a second wavelength of the plasma in the gap 344 and generates a second electrical signal. The second electrical signal is sent from the optical sensor 402 to the processor 306. The processor 306 determines whether the intensity of the second wavelength indicated by the second electrical signal is outside a predetermined range. For example, the processor 306 determines whether the intensity of the second wavelength is within light intensity range 2, described below. If it is within light intensity range 2, the processor 306 controls the valve 336 to close.
[0085] After controlling valve 336 to close, processor 306 controls valve 337 to open. When valve 337 is open, optical sensor 402 senses a second wavelength of the plasma formed in gap 344 and outputs a second electrical signal for a second period of time. The second period follows the first period. Processor 306 determines whether the second period is equal to a predetermined period of time. If processor 306 determines that the second period is equal to the predetermined period of time, processor 306 controls valve 337 to close. After controlling valve 377 to close, processor 306 controls valve 336 to open.
[0086] When the valve 336 is open, the optical sensor 402 senses the first wavelength of the plasma formed in the gap 344 and outputs a first electrical signal during a third period following the second period. The first electrical signal is sent from the optical sensor 402 to the processor 306 during the second period. The processor 306 determines whether the intensity of the first wavelength indicated by the second electrical signal is within a predetermined range. If it is within the predetermined range, the processor 306 determines that the nitrogen-containing layer 2 is still being etched. After the nitrogen-containing layer 2 is etched and the oxide layer 2 begins to be etched, the optical sensor 402 senses the second wavelength of the plasma in the gap 344 and generates a second electrical signal. The processor 306 determines whether the intensity of the second wavelength indicated by the second electrical signal is outside the predetermined range and controls the valve 336 to close upon such determination.
[0087] After the third time period, and after again controlling valve 336 to close, processor 306 controls valve 337 to open. When valve 337 opens, optical sensor 402 senses the second wavelength of the plasma formed in gap 337 and outputs a second electrical signal for a fourth time period. The fourth time period is consecutive to the third time period. Processor 306 determines whether the fourth time period is equal to the predetermined time period. If processor 306 determines that the fourth time period is equal to the predetermined time period, processor 306 controls valve 337 to close. At the end of the fourth time period, after controlling valve 337 to close, processor 306 controls valve 336 to open.
[0088] When the valve 336 opens after the fourth time period, chemical A is applied to the gap 344 to etch the nitrogen-containing layer 3. While the nitrogen-containing layer 3 of the substrate S is etched using the modified RF signal 343 and chemical A, the optical sensor 402 senses the first wavelength of the plasma formed in the gap 344 and outputs a first electrical signal for a fifth time period. The fifth time period is continuous with the fourth time period. The first electrical signal is transmitted from the optical sensor 402 to the processor 306 for the fifth time period. The processor 306 determines whether the intensity of the first wavelength indicated by the first electrical signal is within a predetermined range. If it is within the predetermined range, the processor 306 determines that the nitrogen-containing layer 3 is still being etched. Upon determining that the intensity of the first wavelength indicated by the first electrical signal is within the predetermined range, the processor 306 determines whether the fifth time period is equal to a pre-stored time period. In response to determining that the fifth period of time is equal to the pre-stored period of time, the processor 306 controls the valve 336 to close to stop etching of the high aspect ratio structure 280 (FIG. 2E).
[0089] In one embodiment, the processor 306 determines that the intensity of a wavelength indicated by the electrical signal output from the optical sensor 402 is inversely proportional to the wavelength. For example, a high wavelength has a low intensity and a low wavelength has a high intensity. As another example, as the wavelength of light increases, the light intensity decreases and as the wavelength decreases, the intensity increases.
[0090] In an embodiment, the processor 306 determines the light intensity indicated by the electrical signal based on the amplitude of the electrical signal. For example, the intensity is determined to be high when the amplitude is high and the intensity is determined to be low when the amplitude is low. As another example, the intensity is determined to increase as the amplitude increases and the intensity is determined to decrease as the amplitude decreases.
[0091] In one embodiment, the processor 306 is coupled to a clock source to receive a clock signal from the clock source, and the processor 306 determines the period of time described herein by summing the number of clock cycles of the clock signal.
[0092] In one embodiment, instead of determining whether the fifth period is equal to the pre-stored period, the processor 306 determines whether the intensity of the third wavelength indicated by the third electrical signal output from the light sensor 402 is outside the predetermined range. Upon determining that the intensity of the third wavelength indicated by the third electrical signal output from the light sensor 402 is outside the predetermined range, the processor 306 controls the valve 336 to close. For example, in response to determining that the intensity of the third wavelength is within light intensity range 3, the processor 306 controls the valve 336 to close. For example, light intensity range 3 is different from light intensity ranges 1 and 2. For a further example, light intensity range 3 does not include light intensity ranges 1 and 2.
[0093] In embodiments, the terms predetermined, predefined, and prestored are used interchangeably herein.
[0094] 4B is a diagram of an embodiment of a system 450 illustrating the use of light intensity ranges to etch different layers of the high aspect ratio structure 100 (FIG. 1). The system 450 comprises a processor 306 and a memory device 308. The memory device 308 stores a list 452 of light intensity ranges and corresponding layers. For example, the list 452 includes a correspondence (e.g., a mapping) between light intensity range 1 and nitrogen-containing layers 1, 2, or 3 of the high aspect ratio structure 100. The list 452 further includes a correspondence between light intensity range 2 and oxide layers 1 or 2 of the high aspect ratio structure 100.
[0095] Note that one or more values in light intensity range 1 are different (e.g., not equal) to one or more values in light intensity range 2. By way of example, the values in light intensity range 1 do not include the values in light intensity range 2.
[0096] The processor 306 determines whether the light intensity indicated by the electrical signal received from the light sensor 402 (FIG. 4A) is within light intensity range 1. Upon determining that the light intensity is within light intensity range 1, the processor 306 determines that the nitrogen-containing layers 1, 2, or 3 are being etched.
[0097] Processor 306 further determines whether the light intensity indicated by the electrical signal obtained from light sensor 402 is within light intensity range 2. In response to determining that the light intensity is within light intensity range 2, processor 306 determines that oxide layer 1 or 2 has been etched.
[0098] In one embodiment, the list 452 includes a correspondence between light intensity range 3 and substrate layers. The processor 306 determines whether the light intensity indicated by the electrical signal received from the light sensor 402 is within light intensity range 3. Upon determining that it is within light intensity range 3, the processor 306 determines that the substrate layer is being etched.
[0099] 5A is an embodiment of a graph 500 showing pulses of the RF signal 338 (FIG. 3) versus time t. The graph 500 plots a parameter level of the RF signal 338 versus time t. Examples of parameters include voltage and power. An example of a parameter level is peak-to-peak amplitude. Another example of a parameter level is zero-peak amplitude. The parameter level of the RF signal 338 is plotted on the y-axis and time t is plotted on the x-axis.
[0100] The y-axis plots parameter levels PR0, PR1, PR3, PR5, PR7, PR9, PR11, and PR13, and the x-axis plots times t0, t1, t2, t3, etc., up to time ta and t(a+1), where a is an integer greater than 3. The x-axis further plots times t(a+2), t(a+3), etc., up to time t(a+b), where b is an integer greater than 3.
[0101] Parameter level PR3 is greater than parameter level PR1, which is greater than parameter level PR0. Similarly, parameter level PR5 is greater than parameter level PR3, which is greater than parameter level PR7, which is greater than parameter level PR5. Similarly, parameter level PR9 is greater than parameter level PR7, which is greater than parameter level PR9. Parameter level PR13 is greater than parameter level PR11.
[0102] The y-axis similarly has parameter levels PR2, PR4, PR6, PR8, PR10, and PR12. Parameter level PR2 is between (e.g., halfway between) parameter levels PR1 and PR3. Similarly, parameter level PR4 is between parameter levels PR3 and PR5, parameter level PR6 is between parameter levels PR5 and PR7, parameter level PR8 is between parameter levels PR7 and PR9, parameter level PR10 is between parameter levels PR9 and PR11, and parameter level PR12 is between parameter levels PR11 and PR13.
[0103] During application of chemical A to substrate S through showerhead 322 (FIG. 3), RF signal 338 has parameter levels PR3 and PR1 and transitions periodically between parameter levels PR3 and PR1. For example, RF signal 338 is at parameter level PR3 during the time interval between time t0 and time t1. RF signal 338 transitions from parameter level PR3 to parameter level PR1 at time t1 and remains at parameter level PR1 during the time interval between time t1 and time t2. RF signal 338 transitions from parameter level PR1 to parameter level PR3 at time t2 and remains at parameter level PR3 during the time interval between time t2 and time t3. RF signal 338 transitions from parameter level PR3 to parameter level PR1 at time t3. Thus, RF signal 338 transitions between parameter levels PR1 and PR3 during application of chemical A. Chemical A is applied from time t0 to time ta.
[0104] As another example, the processor 306 (FIG. 3) determines to control the valve 336 to apply chemical A to the substrate S at time t0. Also at time t0, the processor 306 sends a first command signal to the LFRF generator (FIG. 3) to transition the RF signal 338 from parameter level PR11 or PR13 to parameter level PR3 and to periodically transition the RF signal 338 between parameter levels PR3 and PR1. In response to receiving the first command signal at time t0, the LFRF generator modifies the parameter level PR11 or PR13 of the RF signal 338 to parameter level PR3 and transitions the RF signal 338 between parameter levels PR3 and PR1 during the time interval between time t0 and time ta.
[0105] Additionally, during the period during which chemical B is applied to the substrate S, the RF signal 338 has parameter levels PR13 and PR11 and transitions periodically between parameter levels PR13 and PR11. As an example, the RF signal 338 is at parameter level PR13 during the time interval between time ta and time t(a+1). The RF signal 338 transitions from parameter level PR13 to parameter level PR11 at time t(a+1) and remains at parameter level PR11 during the time interval between time t(a+1) and time t(a+2). The RF signal 338 transitions from parameter level PR11 to parameter level PR13 at time t(a+2) and remains at parameter level PR13 during the time interval between time t(a+2) and time t(a+3). The RF signal 338 transitions from parameter level PR13 to parameter level PR11 at time t(a+3). Thus, RF signal 338 transitions between parameter levels PR11 and PR13 during application of chemical B. Chemical B is applied from time ta to time t(a+b).
[0106] As another example, the processor 306 (FIG. 3) determines to control the valve 337 to apply chemical B to the substrate S at time ta. Also at time ta, the processor 306 sends a second command signal to the LFRF generator (FIG. 3) to transition the RF signal 338 from parameter level PR1 to parameter level PR13 and to periodically transition the RF signal 338 between parameter levels PR13 and PR11. In response to receiving the second command signal at time ta, the LFRF generator modifies the parameter level PR1 or PR3 of the RF signal 338 to parameter level PR13 and transitions the RF signal 338 between parameter levels PR13 and PR11 during the time interval between time ta and time t(a+b). In this manner, as described with reference to FIG. 5A, the RF signal 338 is controlled by the processor 306 via the LFRF generator to alternate between the set of parameter levels PR3 and PR1 or between the set of parameter levels PR13 and PR11 based on whether chemical A or B is being applied.
[0107] Note that during application of chemical A, parameter level PR3 corresponds to state S1 of RF signal 338, and parameter level PR1 corresponds to state S0 of RF signal 338. Similarly, parameter level PR13 defines state S1 of RF signal 338 during application of chemical B, and parameter level PR11 defines state S0 of RF signal 338 during application of chemical B.
[0108] In one embodiment, instead of transitioning between parameter levels PR1 and PR3, RF signal 338 transitions between parameter levels PR0 and PR2.
[0109] 5B is an embodiment of a graph 550 showing pulses of RF signal 340 (FIG. 3) versus time t. Graph 550 plots parameter levels of RF signal 340 versus time t. The parameter levels of RF signal 340 are plotted on the y-axis and time t is plotted on the x-axis. The y-axis of graph 550 plots parameter levels PR0 through PR4. The x-axis of graph 550 plots times t0, t1, t2, t3, etc., up to time t(a+b).
[0110] During the period when chemical A is applied to the substrate S, the RF signal 340 has parameter levels PR3 and PR1 and transitions between the parameter levels PR3 and PR1 periodically, similar to how the RF signal 338 transitions between the parameter levels PR3 and PR1. As an example, the processor 306 (FIG. 3) determines to open the valve 336 to apply chemical A to the substrate S at time t0. Also at time t0, the processor 306 transmits a first command signal to the HFRF generator (FIG. 3) to transition the RF signal 340 from the parameter level PR4 or PR2 to the parameter level PR3 and transition the RF signal 340 between the parameter levels PR3 and PR1 periodically. In response to receiving the first command signal at time t0, the HFRF generator modifies the parameter level PR4 or PR2 of the RF signal 340 to the parameter level PR3 and transitions the RF signal 340 between the parameter levels PR3 and PR1 during the time interval between time t0 and ta.
[0111] As another example, the ratio of the parameter level of RF signal 338 to the parameter level of RF signal 340 in the period between times t0 and ta is 0.75 or more and 1.25 or less. For example, in the period between times t0 and ta, the parameter level of RF signal 338 is 75% or 80% of the parameter level of RF signal 340. As another example, in the period between times t0 and ta, the parameter level of RF signal 338 is equal to the parameter level of RF signal 340. As yet another example, in the period between times t0 and ta, the parameter level of RF signal 338 is 120% of the parameter level of RF signal 340.
[0112] As yet another example, the ratio of the parameter level of RF signal 338 to the parameter level of RF signal 340 in the time period between times ta and t(a+b) is greater than or equal to 2 and less than or equal to 4. For example, the parameter level of RF signal 338 in the time period between times ta and t(a+b) is twice the parameter level of RF signal 340. As another example, the parameter level of RF signal 338 in the time period between times ta and t(a+b) is equal to three times the parameter level of RF signal 340.
[0113] Furthermore, during the application of chemical B to the substrate S, the RF signal 340 has parameter levels PR4 and PR2 and transitions periodically between the parameter levels PR4 and PR2. As an example, the RF signal 340 is at the parameter level PR4 during the time interval between times ta and t(a+1). The RF signal 340 transitions from the parameter level PR4 to the parameter level PR2 at time t(a+1) and remains at the parameter level PR2 during the time interval between times t(a+1) and t(a+2). The RF signal 340 transitions from the parameter level PR2 to the parameter level PR4 at time t(a+2) and remains at the parameter level PR4 during the time interval between times t(a+2) and t(a+3). The RF signal 340 transitions from the parameter level PR4 to the parameter level PR2 at time t(a+3). Thus, the RF signal 340 transitions between the parameter levels PR4 and PR2 during the application of chemical B.
[0114] As another example, the processor 306 sends a command signal to the HFRF generator at time ta to transition the RF signal 340 from parameter level PR1 to parameter level PR4, and then transitions the RF signal 340 periodically between parameter levels PR4 and PR2. In response to receiving a second command signal at time ta, the HFRF generator modifies the parameter level PR1 or PR3 of the RF signal 338 to parameter level PR4, and transitions the RF signal 340 between parameter levels PR4 and PR1 during the time interval between times ta and t(a+b). In this manner, as described with reference to FIG. 5B, the RF signal 340 is controlled by the processor 306 via the HFRF generator to alternate between a set of parameter levels PR3 and PR1 or a set of parameter levels PR4 and PR2 based on whether chemical A or B is being applied to the plasma chamber 304.
[0115] It should be noted that a parameter level of an RF signal includes one or more values of a parameter of the RF signal, e.g., a first parameter level does not include another parameter value, e.g., all values of a first parameter level do not include (e.g., are not equal to) values of a second parameter level.
[0116] It should be further noted that during application of chemical A, parameter level PR3 corresponds to state S1 of RF signal 340, and parameter level PR1 corresponds to state S0 of RF signal 340. Similarly, parameter level PR4 defines state S1 of RF signal 340 during application of chemical B, and parameter level PR2 defines state S0 of RF signal 340 during application of chemical B.
[0117] 6 is a diagram of an embodiment of a system 600 showing an LFRF generator and an HFRF generator to achieve pulsing between levels during application of chemicals A and B. System 600 includes a processor 306, a memory device 308, an LFRF generator, and an HFRF generator.
[0118] The LFRF generator includes a digital signal processor DSPLF, a parameter controller PRSLF1, another parameter controller PRSLF0, and an automatic frequency tuner AFTLF. The LFRF generator further includes a driver DRVRLF and a power supply PLF. Examples of controllers used herein include a microprocessor connected to an ASIC, a PLD, and a memory device. Examples of tuners used herein include a controller. For example, a tuner includes a microprocessor, an ASIC, or a PLD. Examples of power supplies used herein include an electronic or RF oscillator that generates a periodically oscillating electronic signal, such as a sinusoidal RF signal.
[0119] The digital signal processor DSPLF is connected to the parameter controllers PRSLF1 and PRSLF0 and the automatic frequency tuner AFTLF. Each of the parameter controllers PRSLF1 and PRSLF0 and the automatic frequency tuner AFTLF is also connected to a driver DRVRLF connected to a power supply PLF. The power supply PLF is connected to an RF cable RFC1.
[0120] Similarly, the HFRF generator includes a digital signal processor DSPHF, a parameter controller PRSHF1, another parameter controller PRSHF0, and an automatic frequency tuner AFTHF. The HFRF generator further includes a driver DRVRHF and a power supply PHF.
[0121] The digital signal processor DSPHF is connected to the parameter controllers PRSHF1 and PRSHF0 and the automatic frequency tuner AFTHF. Also, each of the parameter controllers PRSHF1 and PRSHF0 and the automatic frequency tuner AFTHF is connected to a driver DRVRHF connected to a power supply PHF. The power supply PHF is connected to an RF cable RFC2.
[0122] The processor 306 is connected to the digital signal processor DSPLF via a transmission cable TC1, and to the digital signal processor DSPHF via a transmission cable TC2.
[0123] The processor 306 transmits a recipe signal 602 to the digital signal processor DSPLF through the transmission cable TC1. The recipe signal 602 includes a parameter level of the state S1 of the RF signal 338 to be realized during application of chemical A, a parameter level of the state S0 of the RF signal 338 to be realized during application of chemical A, a parameter level of the state S1 of the RF signal 338 to be realized during application of chemical B, and a parameter level of the state S0 of the RF signal 338 to be realized during application of chemical B. The recipe signal 602 also includes a frequency of the RF signal 338 to be realized during application of chemicals A and B. The recipe signal 602 further includes a duty cycle of the state S1 during application of chemical A and a duty cycle of the state S1 during application of chemical B.
[0124] Upon receiving the recipe signal 602, the digital signal processor DSPLF transmits to the parameter controller PRSLF1 the parameter level and duty cycle of the state S1 of the RF signal 338 to be realized during application of the chemicals A and B. Similarly, in response to receiving the recipe signal 602, the digital signal processor DSPLF transmits to the parameter controller PRSLF0 the duty cycle of the state S1 of the RF signal 338 to be realized during application of the chemicals A and B and the parameter level of the state S0 of the signal 338. The digital signal processor DSPLF also transmits to the automatic frequency tuner AFTLF the frequency of the RF signal 338 to be realized during application of the chemicals A and B.
[0125] The parameter controller PRSLF1 stores in a memory device of the parameter controller PRSLF1 a parameter level and a duty cycle of the state S1 of the RF signal 338 to be realized during application of the chemicals A and B. Similarly, the parameter controller PRSLF0 stores in a memory device of the parameter controller PRSLF0 a duty cycle of the state S1 of the RF signal 338 and a parameter level of the state S0 of the RF signal 338 to be realized during application of the chemicals A and B. The automatic frequency tuner AFTLF also stores in a memory device of the automatic frequency tuner AFTLF a frequency of the RF signal 338 to be realized during application of the chemicals A and B.
[0126] During or concurrently with the application of chemical L (e.g., chemical A or B), processor 306 generates and transmits a corresponding command signal (e.g., a first or second command signal) to digital signal processor DSPLF via transmission cable TC1. For example, the first command signal corresponds to (e.g., has a one-to-one relationship or mapping with) chemical A and the second command signal corresponds to chemical B.
[0127] Upon receiving the corresponding command signal from the processor 306, the digital signal processor DSPLF transmits the corresponding command signal generated during the application of the chemical L to the parameter controllers PRSLF1 and PRSLF0 and the automatic frequency tuner AFTLF. In response to receiving the corresponding command signal during the application of the chemical L, the parameter controller PRSLF1 generates a command signal based on a parameter level of the state S1 of the RF signal 338 and transmits the command signal to the driver DRVRLF. The command signal is transmitted to the driver DRVRLF to generate a drive signal (e.g., a current signal) for a duty cycle period of the state S1 during the application of the chemical L. In addition, upon receiving the corresponding command signal during the application of the chemical L, the automatic frequency tuner AFTLF generates a command signal based on the frequency of the RF signal 338 to be generated and transmits the command signal to the driver DRVRLF. Upon receiving the command signal from the parameter controller PRSLF1 and the automatic frequency tuner AFTLF, the driver DRVRLF generates a drive signal during a duty cycle period of the state S1 of the RF signal 338 during the application of the chemical L. The power supply PLF receives a drive signal from the driver DRVRLF during state S1, generates state S1 of an RF signal 338 during application of the chemical L, and transmits the RF signal 338 having state S1 to the matcher through an output 338 and an RF cable RFC1.
[0128] Furthermore, upon receiving a corresponding command signal during application of the chemical L, the parameter controller PRSLF0 waits for a period of the duty cycle of the state S1 of the RF signal 338 before generating a command signal based on the parameter level of the state S0 of the RF signal 338. After waiting, the parameter controller PRSLF0 generates a command signal and sends the command signal to the driver DRVRLF. The command signal is sent to the driver DRVRLF to generate a drive signal for a period of the duty cycle of the state S0 during application of the chemical L. As an example, the duty cycle of the state S0 of the RF signal 338 is the difference between 100% and the duty cycle of the state S1 of the RF signal 338. Upon receiving a command signal from the parameter controller PRSLF0 and the automatic frequency tuner AFTLF, the driver DRVRLF generates a drive signal for a period of the duty cycle of the state S0 of the RF signal 338 during application of the chemical L. The power supply PLF receives a drive signal for state S0 from the driver DRVRLF, generates a state S0 of an RF signal 338 for the period of state S0 during application of the chemical L, and transmits the RF signal 338 having state S0 to the matcher through the output 328 and the RF cable RFC1.
[0129] It should be noted that the drive signal for the state S0 of the RF signal 338 during the application of the chemical L is generated and transmitted during the remaining period of the clock cycle of the clock signal. For example, the duty cycle of the state S1 of the RF signal 338 during the application of the chemical L is 50% of the clock cycle and the remaining period is the remaining 50% of the clock cycle. The clock signal is generated by the processor 306 and is provided by the processor 306 through the transmission cable TC1 to the digital signal processor DSPLF. The digital signal processor DSPLF transmits the clock signal to the parameter controllers PRSLF1 and PRSLF2. After the drive signal for the state S0 during the application of the chemical L is generated and transmitted during the remaining period of the clock cycle, the parameter controller PRSLF1 generates a command signal again based on the parameter level of the state S1 of the RF signal 338 and transmits the command signal to the driver DRVRLF. In this way, the states S1 and S0 of the RF signal 338 alternate periodically during the application of the chemical L.
[0130] Similarly, for the HFRF generator, the processor 306 transmits a recipe signal 604 to the digital signal processor DSPHF through the transmission cable TC2. The recipe signal 604 includes a parameter level of the state S1 of the RF signal 340 to be realized during application of chemical A, a parameter level of the state S0 of the RF signal 340 to be realized during application of chemical A, a parameter level of the state S1 of the RF signal 340 to be realized during application of chemical B, and a parameter level of the state S0 of the RF signal 340 to be realized during application of chemical B. The recipe signal 604 also includes a frequency of the RF signal 340 to be realized during application of chemicals A and B. The recipe signal 604 further includes a duty cycle for the state S1 of the RF signal 340 during application of chemical A and a duty cycle for the state S1 of the RF signal 340 during application of chemical B.
[0131] Upon receiving the recipe signal 604, the digital signal processor DSPHF transmits to the parameter controller PRSHF1 the parameter level and duty cycle of the state S1 of the RF signal 340 to be realized during application of the chemicals A and B. Similarly, in response to receiving the recipe signal 604, the digital signal processor DSPHF transmits to the parameter controller PRSHF0 the parameter level of the state S0 of the RF signal 340 and the duty cycle of the state S1 of the RF signal 340 to be realized during application of the chemicals A and B. The digital signal processor DSPHF also transmits to the automatic frequency tuner AFTHF the frequency of the RF signal 340 to be realized during application of the chemicals A and B.
[0132] The parameter controller PRSHF1 stores in a memory device of the parameter controller PRSHF1 the duty cycle and parameter levels of the state S1 of the RF signal 340 to be realized during application of the chemicals A and B. Similarly, the parameter controller PRSHF0 stores in a memory device of the parameter controller PRSHF the duty cycle of the state S1 of the RF signal 340 and the parameter levels of the state S0 of the RF signal 340 to be realized during application of the chemicals A and B. The automatic frequency tuner AFTHF also stores in a memory device of the automatic frequency tuner AFTHF the frequency of the RF signal 340 to be realized during application of the chemicals A and B.
[0133] During application of the chemical L, the processor 306 generates a corresponding command signal and transmits it to the digital signal processor DSPHF through the transmission cable TC2. Upon receiving the corresponding command signal, the digital signal processor DSPHF transmits the corresponding command signal generated during application of the chemical L to the parameter controllers PRSHF1 and PRSHF0 and the automatic frequency tuner AFTHF. In response to receiving the corresponding command signal during application of the chemical L, the parameter controller PRSHF1 generates a command signal based on the parameter level of the state S1 of the RF signal 340 and transmits the command signal to the driver DRVRHF. The command signal is transmitted to the driver DRVRHF to generate a drive signal (e.g., a current signal) for the duty cycle period of the state S1 during application of the chemical L. In addition, upon receiving the corresponding command signal during application of the chemical L, the automatic frequency tuner AFTHF generates a command signal based on the frequency of the RF signal 340 and transmits the command signal to the driver DRVRHF. Upon receiving the command signal from the parameter controller PRSHF1 and the automatic frequency tuner AFTHF, the driver DRVRHF generates a drive signal for the period of the state S1 of the RF signal 340 during application of the chemical L. The power supply PHF receives a drive signal for state S1 from the driver DRVRHF, generates a state S1 of the RF signal 340 for the period of state S1 of the RF signal 340 during application of the chemical L, and transmits the RF signal 340 having state S1 to the matching unit via the output 330 and the RF cable RFC2.
[0134] Furthermore, upon receiving a corresponding command signal during application of the chemical L, the parameter controller PRSHF0 waits for a period of the duty cycle of the state S1 of the RF signal 340 before generating a command signal based on the parameter level of the state S0 of the RF signal 340. After waiting, the parameter controller PRSHF0 generates a command signal and transmits the command signal to the driver DRVRHF. The command signal is transmitted to the driver DRVRHF to generate a drive signal for the period of the duty cycle of the state S0 during application of the chemical L. Upon receiving a command signal from the parameter controller PRSHF0 and the automatic frequency tuner AFTHF, the driver DRVRHF generates a drive signal for the period of the state S0 of the RF signal 340 during application of the chemical L. The period of the state S0 of the RF signal 340 is the difference between 100% of the RF signal 340 and the duty cycle period of the state S1. The power supply PHF receives a drive signal for state S0 from the driver DRVRHF, generates a state S0 of the RF signal 340 for the period of state S0 of the RF signal 340 during application of the chemical L, and transmits the RF signal 340 having state S0 to the matching unit through the output 330 and the RF cable RFC2.
[0135] It should be noted that the drive signal for state S0 of the RF signal 340 during application of chemical L is generated and transmitted during the remaining period of the clock cycle of the clock signal. For example, the duty cycle for state S1 of the RF signal 340 during application of chemical L is 50% of the clock cycle and the remaining period is the remaining 50% of the clock cycle. The clock signal is provided by the processor 306 through the transmission cable TC2 to the digital signal processor DSPHF. The digital signal processor DSPHF transmits the clock signal to the parameter controllers PRSHF1 and PRSHF2.
[0136] After the drive signal for state S0 during application of chemical L is generated and transmitted for the remainder of the clock cycle, the parameter controller PRSHF1 again generates a command signal based on the parameter level of state S1 of the RF signal 340 and transmits the command signal to the driver DRVRHF. In this way, states S1 and S0 of the RF signal 340 alternate periodically during application of chemical L.
[0137] In one embodiment, the digital signal processor DSPLF and one or more of the controllers PRSLF1, PRSLF0, and AFTLF are integrated within any number of controllers. For example, the functions described herein as being performed by the digital signal processor DSPLF and one or more of the controllers PRSLF1, PRSLF0, and AFTLF are performed by a single controller. As another example, the functions described herein as being performed by the digital signal processor DSPLF and one or more of the controllers PRSLF1, PRSLF0, and AFTLF are performed by two or more controllers.
[0138] Similarly, in one embodiment, the digital signal processor DSPHF and one or more of the controllers PRSHF1, PRSHF0, and AFTHF are integrated within any number of controllers. For example, the functions described herein as being performed by the digital signal processor DSPHF and one or more of the controllers PRSHF1, PRSHF0, and AFTHF are performed by a single controller. As another example, the functions described herein as being performed by the digital signal processor DSPHF and one or more of the controllers PRSHF1, PRSHF0, and AFTHF are performed by two or more controllers.
[0139] In an embodiment, each chemical A or B is removed from the plasma chamber 304 (FIG. 3) after application of the chemical and before application of another chemical B or A. For example, chemical A is removed before application of chemical B, and chemical B is removed before application of chemical A. By way of further analogy, one or more vacuum pumps are connected to the plasma chamber 304. The processor 306 is connected to the one or more vacuum pumps via one or more corresponding drivers. After a chemical L (e.g., chemical A or B) is applied to the gap 344 (FIG. 3) and a preset period of time has elapsed since application of chemical L, the processor 306 sends one or more turn-on command signals to the one or more drivers. Upon receiving the one or more turn-on command signals, the corresponding one or more drivers generate one or more current signals and send the corresponding one or more current signals to the corresponding one or more vacuum pumps to turn on the one or more vacuum pumps. When the one or more vacuum pumps are turned on, the one or more vacuum pumps remove the chemical L from the plasma chamber 304.
[0140] In this embodiment, the processor 306 determines whether a preset time has elapsed since the one or more vacuum pumps were turned on. Upon determining that the preset time has elapsed, the processor 306 determines to turn off the one or more vacuum pumps. To turn off the one or more vacuum pumps, the processor 306 transmits one or more turn-off command signals to one or more drivers. Upon receiving one or more turn-off command signals, the corresponding one or more drivers generate one or more corresponding current signals and transmit the corresponding one or more current signals to the corresponding one or more vacuum pumps to turn off the one or more vacuum pumps. When the one or more vacuum pumps are turned off, the one or more vacuum pumps do not remove the chemical L from the plasma chamber 304. Also, during the period when the one or more vacuum pumps are turned off, the chemical L (e.g., B or A) is applied to the gap 344 of the plasma chamber 304. In this manner, the chemicals A and B are alternately applied and removed from the plasma chamber 304.
[0141] The embodiments described herein may be performed by a variety of computer system configurations including handheld hardware units, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers, etc. The embodiments described herein may also be practiced in distributed computing environments where tasks are performed by remote processing hardware units that are linked through a computer network.
[0142] In some embodiments, the controller is part of a system that may be part of the above examples. The system includes a semiconductor processing apparatus with processing tools, chambers, processing platforms, and / or specific processing components (wafer pedestals, gas flow systems, etc.). The system is integrated with electronics for controlling pre-, during, and post-processing operations of the semiconductor wafer or substrate. These electronics may be referred to as "controllers" and may control various components or sub-components of the system. The controller is programmed to control any process disclosed herein, including supply of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, RF generator settings, RF matching circuit settings, frequency settings, flow settings, fluid supply settings, position operation settings, wafer loading and unloading from tools and other transport tools, and / or wafer loading and unloading from load locks connected or coupled to the specific system, depending on the processing requirements and / or type of system.
[0143] In general, in various embodiments, a controller is defined as an electronic device having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operations, enable cleaning operations, enable endpoint measurements, etc. Integrated circuits include chips in firmware format that store program instructions, chips defined as DSPs, ASICs, one or more microprocessors or microcontrollers that execute program instructions (e.g., software). Program instructions are instructions communicated to the controller in the form of various personalized settings (or program files) that define operational parameters for performing processes on or for semiconductor wafers. In some embodiments, the operational parameters are part of a recipe defined by a process engineer to achieve one or more processing steps in the manufacture of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer dies.
[0144] In some embodiments, the controller is part of or connected to a computer that is integrated with or connected to the system, or otherwise networked or combined with the system. For example, the controller is in the "cloud" that enables remote access of wafer processing, or is all or part of a fab host computer system. The controller enables remote access to the system to monitor the progress of manufacturing operations, review the history of past manufacturing operations, review trends or performance metrics from multiple manufacturing operations, and modify parameters of a current process, set up processing steps following a current process, or initiate a new process.
[0145] In some examples, a remote computer (e.g., a server) provides the process recipe to the system through a computer network, including a local network or the Internet. The remote computer includes a user interface that allows entry or programming of parameters and / or settings that are then communicated from the remote computer to the system. In some examples, the controller receives instructions for processing the wafer in a configuration format. It should be understood that the configuration is specific to the type of process to be performed on the wafer and the type of tool to which the controller connects or controls. Thus, as described above, the controller is distributed by including, for example, one or more separate controllers networked with each other and working together toward a common purpose, for example, to perform the processes described herein. An example of a controller distributed for such purposes includes one or more integrated circuits of a chamber that are located remotely (e.g., at the platform level or as part of a remote computer) and communicate with one or more integrated circuits that work together to control the process in the chamber.
[0146] Without being limiting, in various embodiments, the plasma systems described herein include plasma etch chambers, deposition chambers, spin rinse chambers, metal plating chambers, cleaning chambers, bevel edge etch chambers, physical vapor deposition (PVD) chambers, chemical vapor deposition (CVD) chambers, atomic layer deposition (ALD) chambers, atomic layer etch (ALE) chambers, ion implantation chambers, track chambers, or any other semiconductor processing chambers related to or used in the fabrication and / or manufacturing of semiconductor wafers.
[0147] Although the above operations have been described with reference to a parallel plate plasma chamber (e.g., a capacitively coupled plasma chamber, etc.), in some embodiments, the above operations are used in other types of plasma chambers (e.g., plasma chambers including inductively coupled plasma (ICP) reactors, transformer coupled plasma (TCP) reactors, conductor tools, dielectric tools, electron cyclotron resonance (ECR) reactors, etc.). For example, an X MHz RF generator, a Y MHz RF generator, and a Z MHz RF generator are connected to an inductor in an ICP plasma chamber.
[0148] As described above, depending on the processing steps being performed by the tool, the controller communicates with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools installed throughout the factory, a main computer, other controllers, or tools used to transport materials to and from tool locations and / or load ports in a semiconductor manufacturing factory.
[0149] With the above embodiments in mind, it should be understood that some embodiments employ various computer-implemented operations on data stored in computer systems. Computer-implemented operations are operations that manipulate physical quantities.
[0150] Some embodiments also relate to a hardware unit or apparatus for performing these operations, which is specially configured for a special purpose computer. When defined as a special purpose computer, the computer operates for a special purpose application, yet can perform other processes, program execution, or routines that are not part of the special purpose application.
[0151] In some embodiments, the operations described herein are performed by a selectively activated computer, configured by one or more computer programs stored in a computer memory, or obtained over a computer network. When data is obtained over a computer network, the data may be processed by other computers on the computer network (e.g., a cloud of computing resources).
[0152] One or more embodiments described herein may also be created as computer readable code on a non-transitory computer readable medium. A non-transitory computer readable medium is any data storage hardware unit (e.g., memory device, etc.) that stores data that is subsequently read by a computer system. Examples of non-transitory computer readable media include hard drives, network attached storage (NAS), ROM, RAM, compact disk ROM (CD-ROM), readable CD (CD-R), rewritable CD (CD-RW), magnetic tape, and other optical and non-optical data storage hardware units. In some embodiments, the non-transitory computer readable medium includes computer readable tangible media distributed over networked computer systems such that the computer readable code is stored and executed in a distributed manner.
[0153] Although some of the method operations above have been shown in a particular order, in various embodiments, other housekeeping operations are performed between the method operations, or the method operations are adjusted to occur at slightly different times, or are distributed in a system that allows the method operations to occur at various intervals, or are performed in a different order than that shown.
[0154] It should be further noted that in embodiments, one or more features of any of the above embodiments may be combined with one or more features of any other embodiment without departing from the scope described in the various embodiments described in this disclosure.
[0155] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications are possible within the scope of the appended claims. Thus, the present embodiments should be considered as illustrative and not restrictive, and the embodiments should not be limited to the details described herein, but may be modified within the scope of the appended claims and their equivalents.
Claims
1. 1. A method for etching a stack, comprising the steps of: Etching the first nitrogen-containing layer of the stack by applying a non-metallic gas; ceasing application of the non-metallic gas upon determining that a first oxide layer underlying the first nitrogen-containing layer has been reached; Etching the first oxide layer by applying a metal-containing gas; ceasing application of the metal-containing gas upon determining that a second nitrogen-containing layer underlying the first oxide layer has been reached; applying the non-metallic gas to etch the second nitrogen-containing layer; A method comprising:
2. 2. The method of claim 1 , The method of claim 1, wherein the first oxide layer is reached when the first oxide layer is etched and is etched when a predetermined depth from a top surface of the first oxide layer is reached.
3. 2. The method of claim 1 , The step of etching the first nitrogen-containing layer continues until a recess is formed in the first oxide layer, and application of the non-metallic gas is stopped upon determining that the recess has formed in the first oxide layer.
4. 4. The method of claim 3, The method wherein the recess has a predetermined depth.
5. 10. The method of claim 1 further comprising: providing a low frequency radio frequency (LFRF) signal having a first primary parameter level and a second primary parameter level for etching the first nitrogen-containing layer; modifying the first primary parameter level to a third primary parameter level and modifying the second primary parameter level to a fourth primary parameter level when etching the first oxide layer; A method comprising:
6. 6. The method of claim 5, the second primary parameter level is lower than the first primary parameter level, the fourth primary parameter level is lower than the third primary parameter level, the third primary parameter level is higher than the first primary parameter level, and the fourth primary parameter level is higher than the second primary parameter level.
7. The method of claim 5 further comprising: providing a high frequency RF (HFRF) signal having a first secondary parameter level and a second secondary parameter level for etching the first nitrogen-containing layer; modifying the first secondary parameter level to a third secondary parameter level and modifying the second secondary parameter level to a fourth secondary parameter level when etching the first oxide layer; A method comprising:
8. 8. The method of claim 7, the second secondary parameter level is lower than the first secondary parameter level, the fourth secondary parameter level is lower than the third secondary parameter level, the third secondary parameter level is higher than the first secondary parameter level, and the fourth secondary parameter level is higher than the second secondary parameter level.
9. 9. The method of claim 8, A method according to claim 1, wherein a ratio of said first primary parameter level to said first secondary parameter level is between 0.75 and 1.25, and a ratio of said second primary parameter level to said second secondary parameter level is between 0.75 and 1.
25.
10. 9. The method of claim 8, a ratio of the third primary parameter level to the third secondary parameter level is between 2 and 4, and a ratio of the fourth primary parameter level to the fourth secondary parameter level is between 2 and 4.
11. 2. The method of claim 1 , The method of claim 1, wherein the metal-containing gas comprises a carbonyl or a metal fluoride.
12. 12. The method of claim 11, The method according to claim 1, wherein said metal fluoride is tungsten hexafluoride.
13. 12. The method of claim 11, The metal-containing gas may be a fluorocarbon or nitrogen trifluoride (NF 3 ) the method.
14. 2. The method of claim 1 , The method of claim 1, wherein the non-metallic gas comprises a hydrofluorocarbon.
15. 10. The method of claim 1 further comprising: ceasing the application of the non-metal gas used to etch the second nitrogen-containing layer; applying the metal-containing gas to etch a second oxide layer underlying the second nitrogen-containing layer; A method comprising:
16. 16. The method of claim 15 further comprising: ceasing the application of the metal-containing gas used to etch the second oxide layer upon determining that a predetermined level of proximity to the third nitrogen-containing layer has been reached when the third nitrogen-containing layer is located below the second oxide layer; after the step of ceasing the application of the metal-containing gas used to etch the second oxide layer, etching the third nitrogen-containing layer by applying the non-metal gas; A method comprising:
17. 1. A controller for etching a stack of layers, comprising:
1. A processor comprising: applying a non-metallic gas to control etching of the first nitrogen-containing layer of the stack; ceasing said application of said non-metallic gas upon determining that a first oxide layer underlying said first nitrogen-containing layer has been reached; applying a metal-containing gas to control etching of the first oxide layer; ceasing the application of the metal-containing gas upon determining that a second nitrogen-containing layer underlying the first oxide layer will be reached; a processor configured to control etching of the second nitrogen-containing layer by applying the non-metal gas; a memory device coupled to the processor; A controller comprising:
18. 20. The controller of claim 17, A controller, wherein application of the non-metallic gas is controlled until a recess is formed in the first oxide layer, and wherein the application of the non-metallic gas is stopped upon determining that the recess has formed in the first oxide layer.
19. 20. The controller of claim 17, The processor, controlling a low frequency radio frequency (LFRF) generator to provide a LFRF signal having a first primary parameter level and a second primary parameter level to etch the first nitrogen-containing layer; modifying the first primary parameter level to a third primary parameter level and modifying the second primary parameter level to a fourth primary parameter level to etch the first oxide layer. The controller is configured as follows:
20. 20. The controller of claim 19, The processor, controlling a high frequency (HF) RF generator to provide a HF RF signal having a first secondary parameter level and a second secondary parameter level to etch the first nitrogen-containing layer; modifying the first secondary parameter level to a third secondary parameter level and modifying the second secondary parameter level to a fourth secondary parameter level as the first oxide layer is etched. The controller is configured as follows:
21. 1. A plasma system for etching a layer stack, comprising: a first gas source configured to store a metal-containing gas; a second gas source configured to store a non-metallic gas; a plasma chamber connected to the first gas source via a first gas line and connected to the second gas source via a second gas line; a host computer connected to the first gas line and the second gas line, applying the non-metallic gas to control etching of the first nitrogen-containing layer of the stack; ceasing said application of said non-metallic gas upon determining that a first oxide layer underlying said first nitrogen-containing layer has been reached; applying the metal-containing gas to control etching of the first oxide layer; ceasing the application of the metal-containing gas upon determining that a second nitrogen-containing layer underlying the first oxide layer will be reached; a host computer configured to control etching of the second nitrogen-containing layer by applying the non-metallic gas; A plasma system comprising:
22. 22. The plasma system of claim 21, further comprising: a low frequency radio frequency (LFRF) generator configured to generate a LFRF signal; a high frequency RF signal generator configured to generate a high frequency RF signal; an impedance matching circuit connected to the LFRF generator and the HFRF generator, the impedance matching circuit configured to receive the LFRF signal and the HFRF signal and output a modified RF signal, the plasma chamber connected to the impedance matching circuit to receive the modified RF signal, and the host computer controlling the LFRF generator to provide an LFRF signal having a first primary parameter level and a second primary parameter level to etch the first nitrogen-containing layer; modifying the first primary parameter level to a third primary parameter level and modifying the second primary parameter level to a fourth primary parameter level to etch the first oxide layer; controlling the HFRF generator to provide an HFRF signal having a first secondary parameter level and a second secondary parameter level to etch the first nitrogen-containing layer; an impedance matching circuit configured to modify the first secondary parameter level to a third secondary parameter level and to modify the second secondary parameter level to a fourth secondary parameter level to etch the first oxide layer; A plasma system comprising:
23. 1. A method for etching a stack, comprising the steps of: Etching the oxide layer by applying a metal-containing gas; ceasing application of the metal-containing gas upon determining that a silicon-containing layer underlying the oxide layer has been reached; Etching the silicon-containing layer by applying a non-metallic gas; A method comprising:
24. 24. The method of claim 23, The method of claim 1, wherein the oxide layer is reached when the oxide layer is being etched and is etched when a predetermined depth is reached from a top surface of the oxide layer.
25. 24. The method of claim 23, The method, wherein the silicon-containing layer is a silicon nitride layer or a polysilicon layer.
26. 24. The method of claim 23, The method of claim 1, wherein the metal-containing gas comprises a carbonyl or a metal fluoride.
27. 27. The method of claim 26, The method according to claim 1, wherein said metal fluoride is tungsten hexafluoride.
28. 24. The method of claim 23, The metal-containing gas may be a fluorocarbon or nitrogen trifluoride (NF 3 ) the method.
29. 24. The method of claim 23, The method of claim 1, wherein the non-metallic gas comprises a hydrofluorocarbon.