Method for determining epitaxy suitability of Czochralski growth conditions for manufacturing substrates - Patents.com

Abstract

A method for determining the epitaxy suitability of Czochralski growth conditions for producing silicon substrates includes evaluating substrates sliced ​​from ingots grown under different growth conditions (e.g., impurity profiles) by imaging the wafers with infrared depolarization. An infrared depolarization parameter is generated for each epitaxial wafer. The parameters can be compared to determine suitable growth conditions for producing substrates for epitaxy and / or post-epi thermal processing.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 213,460, filed June 22, 2021, which is incorporated by reference in its entirety. [Technical field]

[0002] The field of the disclosure relates to methods for determining epitaxy suitability of Czochralski growth conditions (e.g., melt impurity profile) for producing silicon substrates, and in particular, to methods for determining slip resistance of the substrate during epitaxy and post-epitaxy thermal treatments. [Background technology]

[0003] Slip often occurs during epitaxial wafer fabrication and post-epitaxial thermal cycling. Slip resistance is becoming an increasingly important capability in advanced integrated circuit manufacturing technologies. Traditional methods for detecting slip resistance are destructive processes that prevent further use of the wafer. For example, the wafer may be stressed in an annealing furnace and the wafer bow measured as an indicator of wafer strength. Furthermore, traditional processes do not allow for evaluation of slip resistance for different epitaxial substrates under different epitaxial and post-epi treatments.

[0004] Substrates used in epitaxial wafer production can be grown by the so-called Czochralski process, where a silicon seed crystal is placed in contact with a silicon melt. The silicon seed crystal and the attached single crystal silicon ingot are pulled out of the melt. There is a need for a reliable, non-destructive process that can quantitatively characterize the Czochralski process (e.g., differences in the impurity levels of the melt) on the slip resistance of the resulting substrates under various epitaxial processes and heat treatments.

[0005] This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and / or claimed below. This discussion is believed to be helpful in providing the reader with background information to better understand the various aspects of the present disclosure. As such, it should be understood that these statements are to be read in this light, and not as admissions of prior art. Summary of the Invention

[0006] One aspect of the disclosure relates to a method for determining epitaxy suitability of Czochralski growth conditions for producing silicon substrates. A crucible containing a charge of silicon is heated to form a silicon melt in the crucible. A silicon seed crystal is contacted with the silicon melt. The silicon melt has a first impurity profile. The silicon seed crystal is pulled to grow a first monocrystalline silicon ingot. A first plurality of silicon substrates are sliced ​​from the first monocrystalline silicon ingot. A silicon-containing gas is contacted with a front surface of the silicon substrates of the first plurality of silicon substrates. The silicon-containing gas decomposes to form an epitaxial silicon layer on the silicon substrate to form a first epitaxial wafer. The first epitaxial wafer is imaged by infrared depolarization to determine a first infrared depolarization parameter. A crucible containing a charge of silicon is heated to form a second silicon melt in the crucible. A silicon seed crystal is contacted with the second silicon melt. The second silicon melt has a second impurity profile. The first impurity profile of the first melt is different from the second impurity profile of the second melt. A silicon seed crystal is pulled to grow a second monocrystalline silicon ingot. A second plurality of silicon substrates are sliced ​​from the second monocrystalline silicon ingot. A silicon-containing gas is contacted with a front surface of the silicon substrates of the second plurality of silicon substrates. The silicon-containing gas decomposes to form an epitaxial silicon layer on the silicon substrates to form a second epitaxial wafer. The second epitaxial wafer is imaged by infrared depolarization and a second infrared depolarization parameter is determined. Epitaxy suitability of the first impurity profile and the second impurity profile for producing a substrate is determined based on the first and second infrared depolarization parameters.

[0007] Another aspect of the disclosure relates to a method for determining epitaxy suitability of a silicon substrate. The silicon substrate is placed on a susceptor disposed within a processing reactor. A front side of the silicon substrate is contacted with a silicon containing gas. The silicon containing gas decomposes to form a first epitaxial silicon layer on the silicon substrate. A front side of the first epitaxial silicon layer is contacted with the silicon containing gas. The silicon containing gas decomposes to form a second epitaxial silicon layer on the first epitaxial silicon layer to form an epitaxial wafer. The epitaxial wafer is imaged by infrared depolarization to determine infrared depolarization.

[0008] Yet another aspect of the present disclosure relates to a method for determining epitaxy suitability of a silicon substrate, the substrate being heat treated in a first heat treatment step, the substrate being heat treated in a second heat treatment step, the substrate being imaged by infrared depolarization after the first and second heat treatment steps, and an infrared depolarization parameter being determined.

[0009] There are various refinements of the features described in relation to the above-mentioned aspects of the present disclosure. Additional features can be incorporated into the above-mentioned aspects of the present disclosure as well. These refinements and additional features can exist individually or in any combination. For example, the various features discussed below in relation to any of the illustrated embodiments of the present disclosure can be incorporated into any of the above-mentioned aspects of the present disclosure, either alone or in any combination. [Brief description of the drawings]

[0010] [Figure 1] FIG. 2 is a cross-sectional view of an ingot pulling apparatus before growing a silicon ingot. [Diagram 2] 2 is a cross-sectional view of the ingot pulling apparatus of FIG. 1 during growth of a silicon ingot. [Diagram 3] 1 is a cross-sectional view of a semiconductor substrate for manufacturing an epitaxial wafer. [Figure 4] FIG. 2 is a cross-sectional view of an epitaxial wafer. [Diagram 5]1 is a flow chart of one embodiment of a method for determining epitaxy suitability of a silicon substrate. [Figure 6] 4 is a flow chart of another embodiment of a method for determining epitaxy suitability of a silicon substrate. [Figure 7] 13 is a flow chart of yet another embodiment of a method for determining epitaxy suitability of a silicon substrate. [Figure 8] 4 is a flow chart of a further embodiment of a method for determining epitaxy suitability of a silicon substrate. [Figure 9] 4 is a flow chart of a further embodiment of a method for determining epitaxy suitability of a silicon substrate. [Figure 10] 4 is a flow chart of another exemplary embodiment of a method for determining epitaxy suitability of a silicon substrate. [Figure 11] 4 is a flow chart of another embodiment of a method for determining epitaxy suitability of a silicon substrate. [Figure 12] 1 is a graph of nitrogen concentration in a single crystal silicon ingot for various starting nitrogen concentrations. [Figure 13] 1 is a graph of various oxygen concentrations of oxygen profiles of various ingots used to manufacture substrates for use in epitaxial layers. [Figure 14] 1 is a perspective view of a processing reactor for depositing an epitaxial layer on a substrate, with the reactor cover removed. [Figure 15] FIG. 1 is a schematic diagram of an apparatus for imaging epitaxial wafers by infrared depolarization. [Figure 16] FIG. 1 is a top view of an epitaxial wafer showing annular edge ring imaged with infrared depolarization. [Figure 17] 1 is a variation plot showing the depolarization of epitaxial wafers having substrates sliced ​​from wafers grown from melts with different nitrogen and oxygen concentrations after growth of two epitaxial layers. [Figure 18]11 is another variation plot showing the depolarization of epitaxial wafers having substrates sliced ​​from wafers grown from melts with different nitrogen and oxygen concentrations after growth of two epitaxial layers. [Figure 19] 1 is a variation plot showing the depolarization of substrates sliced ​​from wafers grown from the melt with different impurity profiles after two heat treatments.

[0011] Corresponding reference characters indicate corresponding parts throughout the drawings. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Provisions of the present disclosure relate to methods for determining the epitaxy suitability of silicon substrates, such as by determining the slip resistance of the substrate during epitaxial layer deposition and / or post-epi thermal treatment. In some embodiments, the composition of the melt in which a silicon ingot is grown to produce the epitaxial wafer substrate is varied, and the resulting epitaxial wafer is imaged by infrared depolarization. The imaging results in one or more infrared depolarization parameters for each wafer imaged. The parameters are used to determine the suitability (e.g., slip resistance) of the silicon substrate (and the impurity profile of the melt in which it is grown) for epitaxy.

[0013] The methods of the present disclosure may generally be practiced in any ingot puller configured to pull a single crystal silicon ingot. An exemplary ingot puller (or more simply "ingot puller") is generally designated "101" in FIG. 1. The ingot puller 101 includes a crucible 102 for holding a melt 104 of semiconductor or solar grade material, such as silicon, supported by a susceptor 106. The ingot puller 101 includes a crystal puller housing 108 defining a growth chamber 152 for pulling a silicon ingot 113 (FIG. 2) from the melt 104 along a pulling axis A.

[0014] Crucible 102 includes a floor 129 and a sidewall 131 extending upwardly from floor 129. Sidewall 131 is generally vertical. Floor 129 includes a curved portion of crucible 102 that extends below sidewall 131. Within crucible 102 is a silicon melt 104 having a melt surface 111 (i.e., a melt-ingot interface).

[0015] In some embodiments, the crucible 102 is layered. For example, the crucible 102 may be made of a quartz base layer and a synthetic quartz liner disposed on the quartz base layer.

[0016] The susceptor 106 is supported by a shaft 105. The susceptor 106, crucible 102, shaft 105 and ingot 113 (FIG. 2) have a common longitudinal axis A or "pulling axis" A.

[0017] Within the ingot pulling apparatus 101, a pulling mechanism 114 is provided for growing and pulling an ingot 113 from the melt 104. The pulling mechanism 114 includes a pulling cable 118, a seed holder or chuck 120 coupled to one end of the pulling cable 118, and a silicon seed crystal 122 coupled to the seed holder or chuck 120 for initiating crystal growth. One end of the pulling cable 118 is connected to a pulley (not shown) or drum (not shown) or other suitable type of pulling mechanism, such as a shaft, and the other end is connected to the chuck 120, which holds the seed crystal 122. In operation, the seed crystal 122 is lowered into contact with the melt 104. The pulling mechanism 114 is actuated to raise the seed crystal 122. This causes a single crystal ingot 113 (FIG. 2) to be pulled from the melt 104.

[0018] During heating and crystal pulling, a crucible drive 107 (e.g., a motor) rotates the crucible 102 and susceptor 106. A lift mechanism 112 raises and lowers the crucible 102 along the pulling axis A during the growth process. For example, the crucible 102 may be in its lowest position (near the bottom heater 126) where an initial charge of solid phase polycrystalline silicon pre-added to the crucible 102 is melted. Crystal growth is initiated by contacting the melt 104 with the seed crystal 122 and lifting the seed crystal 122 by the pulling mechanism 114. As the ingot grows, silicon melt 104 is consumed and the melt height in the crucible 102 decreases. The crucible 102 and susceptor 106 can be raised to maintain the melt level 111 at or near the same position relative to the ingot puller 101 (FIG. 2).

[0019] The crystal drive unit (not shown) may also rotate the pulling cable 118 and ingot 113 (FIG. 2) in a direction opposite to the direction in which the crucible drive unit 107 rotates the crucible 102 (e.g., counter-rotation). In embodiments using co-rotation, the crystal drive unit rotates the pulling cable 118 in the same direction as the crucible drive unit 107 rotates the crucible 102. Additionally, the crystal drive unit may raise and lower the ingot 113 relative to the melt level 111 as desired during the growth process.

[0020] The ingot pulling apparatus 101 may include an inert gas system for introducing and withdrawing an inert gas, such as argon, from the growth chamber 152. The ingot pulling apparatus 101 may include a dopant delivery system (not shown) for introducing dopants into the melt 104.

[0021] According to the Czochralski single crystal growth process, a quantity of polycrystalline silicon or polysilicon is charged into a crucible 102. The initial semiconductor or solar grade material introduced into the crucible is melted by heat provided by one or more heating elements to form a silicon melt within the crucible. The ingot puller 101 includes bottom insulation 115 and side insulation 124 for retaining heat within the puller. In the illustrated embodiment, the ingot puller 101 includes a bottom heater 126 disposed below the crucible floor 129. The crucible 102 can be moved relatively close to the bottom heater 126 to melt the polycrystalline material charged into the crucible 102.

[0022] To form an ingot, the seed crystal 122 is contacted with the surface 111 of the melt 104. A pulling mechanism 114 is actuated to pull the seed crystal 122 out of the melt 104. Referring now to FIG. 2, the ingot 113 includes a crown portion 142 where the ingot transitions outward from the seed crystal 122 and tapers to reach a target diameter. The ingot 113 includes a constant diameter portion 145 or cylindrical "body" of the crystal that is grown by increasing the pulling rate. The body 145 of the ingot 113 has a relatively constant diameter. The ingot 113 includes a tail or end cone (not shown) that tapers in diameter after the body 145. Once the diameter is small enough, the ingot 113 is separated from the melt 104.

[0023] The ingot pulling apparatus 101 includes a side heater 135 and a susceptor 106 surrounding the crucible 102 to maintain the temperature of the melt 104 during crystal growth. The side heater 135 is positioned radially outward relative to the crucible sidewall 131 as the crucible 102 moves up and down the pulling axis A. The side heater 135 and the bottom heater 126 may be any type of heater that allows for operation as described herein. In some embodiments, the heaters 135, 126 are resistive heaters. The side heater 135 and the bottom heater 126 may be controlled by a control system (not shown) such that the temperature of the melt 104 is controlled throughout the pulling process.

[0024] The ingot puller 101 may include a heat shield 151. The heat shield 151 covers the ingot 113 and may be positioned within the crucible 102 during crystal growth (FIG. 2).

[0025] In embodiments of the present disclosure, in a first step 100 (FIG. 5), Czochralski growth conditions are selected to determine the suitability of the subsequently sliced ​​substrate for use in epitaxy. For example, the impurity and / or dopant concentrations of the crucible melt can be varied to change the properties of the resulting substrate on which the epitaxial layer is formed. For example, one or more of the nitrogen, oxygen, or boron (or other dopant) concentrations are varied as described further below. In some embodiments, the concentration of a compound (e.g., oxygen, nitrogen, or boron) is altered during the growth of a segment of the body 145 of the ingot 113.

[0026] In some embodiments, the nitrogen concentration is varied. Various concentrations of nitrogen can be doped into the ingot. For example, as shown in FIG. 12, the nitrogen concentration in the crystal is 1×10 13 atoms / cm 3 ~1×10 15 atoms / cm 3The nitrogen doping in the ingot follows a segregation curve, which means that the nitrogen concentration at the start of ingot growth and the nitrogen concentration at the end of ingot growth can differ by a factor of 6-7, regardless of the concentration at the start. To accommodate such nitrogen concentration differences, the ingot growth conditions may be controlled to have different oxygen concentrations towards the beginning, middle, and / or end of crystal growth, depending on the nitrogen concentration difference due to segregation. Furthermore, the combination of oxygen and nitrogen may be controlled depending on the epitaxial wafer quality and Scanning Infrared Depolarization (SIRD) measurements, for example, after specifically designed multiple steps of epi and / or thermal processes that result in increased slip resistance (e.g., under a specific combination of high temperature heat treatments while maintaining an epi stacking fault free structure).

[0027] As shown in Figure 13, the oxygen concentration may be varied (e.g., increasing the oxygen concentration at the beginning of the ingot growth compared to conventional methods and / or decreasing the oxygen concentration at the end of the ingot growth compared to conventional methods, etc.) In some embodiments, the ingot has an oxygen concentration of less than 12.5 nppma.

[0028] The boron concentration of the ingot (and resulting substrate) may be varied (e.g., from lightly doped to highly doped). For example, a silicon melt may be doped with boron to a concentration of 1.0×10 12 ~1.0×10 20 atoms / cm 3 Doped silicon ingots (and sliced ​​wafers) can be produced having boron concentrations in the range of

[0029] Once the ingot 113 has been grown, in a second step 200 (FIG. 5), the ingot 113 is sliced ​​into a number of silicon substrates (i.e., wafers) for use in making epitaxial wafers 20 (FIG. 4). The substrates 1 are single crystal silicon wafers. Now referring to FIG. 3, each substrate 1 has a front surface 3 and a back surface 9.

[0030] Once the substrate 1 is sliced ​​(e.g., first step 100 (FIG. 5)), it is processed (e.g., sliced ​​from an ingot followed by various steps of smoothing and / or reducing surface roughness). In a third step 300, an epitaxial layer 25 (FIG. 4) is deposited on the front side 3 (FIG. 3) of the substrate 1 by contacting the front side 3 with a silicon-containing gas that decomposes to form an epitaxial silicon layer 25 on the substrate 1. In general, unless otherwise noted, any method available to one skilled in the art for depositing a silicon epitaxial layer on a silicon substrate can be used. For example, the epitaxial layer 25 can be deposited in an exemplary processing reactor 110 shown in FIG. 1. The reactor 110 includes a processing chamber 103 in which a single semiconductor is etched. A gas manifold 140 is used to direct incoming gases into the processing chamber 103. The incoming processing gases flow through the gas manifold 140 into the processing chamber 103 and are exhausted through a gas exhaust port. The reactor 110 includes a susceptor 121 disposed within the process chamber 103 to support the substrate 1. A preheat ring 127 surrounds the susceptor 121 and brings the process gases up to temperature before contacting the substrate 1. The substrate 1 is rotated to uniformly deposit an epitaxial layer on the substrate 1.

[0031] Silicon can be epitaxially grown to an appropriate thickness depending on the device application. For example, silicon can be deposited using metalorganic chemical vapor deposition (MOCVD), physical vapor deposition (PVD), chemical vapor deposition (CVD), low pressure chemical vapor deposition (LPCVD), plasma enhanced chemical vapor deposition (PECVD), atmospheric pressure chemical vapor deposition (APCVD), reduced pressure chemical vapor deposition (RPCVD), or molecular beam epitaxy (MBE). Silicon precursors (i.e., silicon-containing gases) for LPCVD or PECVD include methylsilane, silicon tetrahydrate (silane), trisilane, disilane, pentasilane, neopentasilane, tetrasilane, dichlorosilane (SiH2Cl2), trichlorosilane (SiHCl3), silicon tetrachloride (SiCl4), and the like. For example, silicon can be deposited by pyrolysis of silane (SiH4) at a temperature range between about 550° C. and about 690° C., such as between about 580° C. and about 650° C. The chamber pressure ranges from about 70 to about 400 mTorr.

[0032] In some embodiments, a boron-containing gas is introduced into the reactor 110 to dope the epitaxial layer with boron. For example, B2H6 can be added to the deposition gas. The mole fraction of B2H6 in the atmosphere used to obtain the desired properties (e.g., resistivity) depends on several factors, such as the amount of boron outdiffusion from a particular substrate during epitaxial growth, the amount of p-type and n-type dopants present in the reactor and substrate as contaminants, and the pressure and temperature of the reactor.

[0033] Once epitaxial layer 25 is deposited, epitaxial wafer 20 (sometimes referred to herein as the "first" epitaxial wafer) may be imaged by infrared depolarization (step 400 shown in FIG. 5) to determine infrared depolarization parameters of wafer 20. Epitaxial wafer 20 may be imaged directly after deposition of the layers, or one or more post-epi steps may be performed (e.g., cleaning). Infrared depolarization imaging is available from Scanning Infrared Depolarization (SIRD) systems available from PVA TePla America, Inc. (Corona, Calif.) and Semilab Semiconductor Physics Laboratory Co., Ltd. (Budapest, Hungary).

[0034] An example of an apparatus 201 for imaging an epitaxial wafer 20 is shown in Figure 15. A laser 230 sends light through a polarizer 240. Linearly polarized light (e.g., wavelength approximately 1.3 μm) is transmitted through the wafer 20 generally perpendicular to its surface. The illustrated apparatus 201 directs light through the backside of the wafer 20, although in other embodiments, the apparatus 201 directs light through the front side. The wafer 20 is rotated as it is scanned.

[0035] The analyzer 251 measures the linear state of the light passing through the wafer 20. The analyzer 251 measures the power of the parallel (P||) and perpendicular (P⊥) electromagnetic field components by the diodes 255, 257. Without being bound to a particular theory, it is believed that the stress field residing in the wafer 20 changes the polarization state due to stress-induced birefringence. The depolarization is believed to be linearly correlated with the local stress within the volume penetrated by the laser light.

[0036] Depolarization is as follows: It can be measured as TIFF2024525001000002.tif19129. Depolarization (D) is a dimensionless value that ranges from 0 to 2. As depolarization (D) approaches zero, little birefringence is observed, indicating no stress at the imaged wafer site. As depolarization (D) approaches 1, circular polarization is seen. As depolarization (D) approaches 2, it indicates a half plate (a complete shift in polarization). Depolarization (D) is a dimensionless value ranging from 1DU=10 -6 *D may be expressed in depolarization units (DU). In some embodiments, the depolarization contrast (DC): The global stress defined by TIFF2024525001000003.tif16130 may be used. In some embodiments, the equivalent shear stress (G) may be determined (see PVA TePla SIRD User Manual (2007), pages 33-39, which is incorporated herein by reference).

[0037] Depolarization may be measured per "track" of the scanned surface, with each track having a number of "track points" within the track where depolarization is measured (see PVA TePla SIRD User Manual (2007), p. 32, incorporated herein by reference). An average may be set for each track, and the percentage of track points that deviate from the average may be recorded (i.e., the "failure rate"). The failure rate of a track point may be based on a minimum deviation from the average depolarization of the track (±20%, or ±30%, ±40%, or ±50% of the average). Resolution can be adjusted by changing the number of track points measured within a track, and by track separation.

[0038] 16, in some embodiments of the present disclosure, only annular edge region 302 of epitaxial wafer 20 is imaged by infrared depolarization to determine infrared depolarization parameters. For example, annular edge region 302 may extend from at least about 85% of radius R of epitaxial wafer 20 toward circular edge 315. In other embodiments, annular edge region 302 extends from at least about 90% or at least about 95% of radius R of epitaxial wafer toward circumferential edge 315. Annular edge region 302 may terminate at or short of circumferential edge 315. For example, annular edge region may extend to 99.5% of radius R or to 99.9% of radius R. In other embodiments, rather than imaging wafer 20 only at the annular edge region, the entire wafer is imaged (optionally, the edge exclusion region is not imaged).

[0039] The infrared depolarization parameter of the wafer 20 may generally be any parameter based on a characterization of a wafer image (step 500 of FIG. 5). For example, the infrared depolarization parameter may be a wafer map (e.g., an image of the wafer showing defects, stress points, failure rate track points, or other characteristics of a scan). Alternatively or additionally, the parameter may relate to a "failure rate" of the track points (e.g., a failure rate variation chart, failure rate average, or failure rate total). Alternatively or additionally, the parameter may relate to a depolarization value (e.g., an average depolarization value or a total depolarization value), a depolarization contrast, or a shear stress equivalent value.

[0040] Once the infrared depolarization parameter has been determined, the suitability of the substrate for use in epitaxy is determined, e.g., the parameter may be compared to a threshold parameter and / or it may be determined whether the parameter is within a threshold range.

[0041] In some embodiments of the present disclosure, two or more epitaxial wafers sliced ​​from an ingot grown from a melt having different impurity profiles are imaged by infrared depolarization, and the respective infrared depolarization parameters are compared to determine the suitability (e.g., strength and / or slip resistance, and optionally after downstream heat treatment) of one or more ingot growth parameters (e.g., one or more impurity profiles) for producing a substrate used for epitaxy. For example, to produce a first epitaxial wafer, after a silicon melt is formed, a seed crystal 122 is contacted with the melt having a first impurity profile (e.g., concentration of oxygen, nitrogen, or boron or other dopants). The seed crystal is pulled to form a first monocrystalline silicon ingot, and a first plurality of silicon substrates are sliced ​​from the monocrystalline silicon ingot. An epitaxial layer is deposited on one of the silicon substrates to form a first epitaxial wafer. The first epitaxial wafer is imaged by infrared depolarization, and a first infrared depolarization parameter is determined.

[0042] According to an embodiment of the present disclosure, a second melt having a second impurity profile (e.g., a different impurity profile, such as a different concentration of one or more impurities) is formed (in the same or a different crystal puller, or even in a different crystal puller). A silicon seed crystal (the same crystal as before or a different crystal) is contacted with the second silicon melt and pulled to grow a second single crystal silicon ingot. The second single crystal silicon ingot is sliced ​​into a second plurality of silicon substrates. An epitaxial layer is deposited on one of the silicon substrates to form a second epitaxial wafer. The second epitaxial wafer is imaged by infrared depolarization to determine a second infrared depolarization parameter. Suitability of the first impurity profile and the second impurity profile for manufacturing an epitaxial substrate may be determined based on the first and second infrared depolarization parameters.

[0043] In some embodiments, a plurality of wafers sliced ​​from each of the first and second ingots may be processed as described above to determine the first and second infrared depolarization parameters (e.g., the depolarization parameters are averaged for each ingot). For example, an epitaxial layer may be deposited on a first batch of silicon wafers sliced ​​from a first silicon ingot, and an epitaxial layer may be deposited on a second batch of silicon wafers sliced ​​from a second silicon ingot. The first batch of epitaxial wafers may be imaged by infrared depolarization to determine the first infrared depolarization parameter, and the second batch of epitaxial wafers may be imaged by infrared depolarization to determine the second infrared depolarization parameter.

[0044] In some embodiments, a batch (i.e., a plurality) of ingots may be grown from one or more melts having a first impurity profile and / or a batch of ingots may be grown from one or more melts having a second impurity profile, and the resulting epitaxial wafers may be imaged by infrared depolarization to determine the first and second infrared depolarization parameters. For example, a first batch of monocrystalline silicon ingots is formed from the melt having the first impurity profile. A first plurality of silicon substrates is sliced ​​from the two or more monocrystalline silicon ingots of the first batch, and the front sides of the first plurality of silicon substrates are contacted with a silicon-containing gas to form the first batch of epitaxial wafers. A second batch of monocrystalline silicon ingots is formed from the melt having the second impurity profile. A second plurality of silicon substrates is sliced ​​from the two or more monocrystalline silicon ingots of the second batch. The front sides of the second plurality of silicon substrates are contacted with a silicon-containing gas. The silicon-containing gas decomposes to form an epitaxial silicon layer on the silicon substrate to form a second batch of epitaxial wafers. Each of the first and second batches of epitaxial wafers is imaged by infrared depolarization to determine a first infrared depolarization parameter and a second infrared depolarization parameter. For example, the depolarization parameters may be averaged for wafers sliced ​​from an ingot grown from a melt having the first and second impurity profiles, respectively.

[0045] According to an embodiment of the present disclosure, the epitaxy suitability of the impurity profile (e.g., oxygen, nitrogen, boron, or other dopants or impurities) of the melt for manufacturing the substrate may be determined based on the first and second infrared depolarization parameters. For example, the first infrared depolarization parameter may be compared to the second infrared depolarization parameter to determine the impurity profile suitable for epitaxial growth. Alternatively, or in addition, the first and second infrared depolarization parameters may be compared to a threshold parameter (e.g., a parameter for which the slip resistance of the substrate is known to be acceptable). Such a threshold parameter may be determined by determining the infrared depolarization parameter of a substrate known or found to have an acceptable slip resistance in epitaxial growth. According to an embodiment of the present disclosure, the first infrared depolarization parameter and the second infrared depolarization parameter are the same parameter.

[0046] In embodiments where more than one epitaxial wafer is imaged, the epitaxial silicon layer may be formed on each silicon substrate at the same process conditions (e.g., process time and temperature). Using identical or similar process conditions can reduce the effect of process conditions on slip performance when comparing wafers.

[0047] Referring now to FIG. 6, in some embodiments, after the epitaxial layer is deposited in step 250, the wafer may undergo a thermal treatment step 350 before imaging 300 (e.g., if multiple wafers are imaged, both wafers are thermally treated to the same conditions). The thermal treatment step 350 may mimic a thermal treatment used during downstream device fabrication. For example, the thermal treatment may include heating up to 1150° C. for 6 hours or more. As shown in FIG. 7, in some embodiments, a second thermal treatment 375 is performed after the first thermal treatment 350 (e.g., heating to 1150° C. for 6 hours or more). The second thermal treatment 375 may be performed after the wafer is cooled after the first thermal treatment.

[0048] In some embodiments, and as shown in FIG. 8, a second epitaxial layer is deposited (step 325) on the first epitaxial layer prior to the infrared depolarized image 400. In such embodiments, there are two geological layers on the substrate surface (i.e., two different layers). The second epitaxial layer may be deposited under similar process conditions as the deposition of the first layer, or may use different process conditions. Optionally, a thermal treatment 350 (FIG. 9) may be performed after deposition of the second epitaxial layer 325 (e.g., heating to 1150° C. for 6 hours or more). Optionally, a second thermal treatment 375 (FIG. 10) may be performed after the first thermal treatment 350. In some embodiments, a thermal treatment is performed between the deposition of the first and second epitaxial layers.

[0049] 11, in some embodiments, no epitaxial layer is deposited. Instead, two thermal treatments 350, 375 are performed (e.g., in succession).

[0050] Compared to conventional methods for determining the epitaxy suitability of one or more Czochralski growth parameters for manufacturing wafers, the disclosed method has several advantages. The method can quantitatively characterize and compare slip characteristics under different epitaxial processes and post-epi thermal treatments when evaluating various types of substrates. The characterization process is consistent for each wafer tested. The method is non-destructive, so the tested wafers can be used commercially after imaging and characterization. In embodiments that image only the edge region of the semiconductor structure, the epitaxial wafer can be scanned in a relatively short time and / or sharper resolution can be used without increasing the imaging time. Imaging of the edge region is representative of the wafer strength, since it has been found that high temperature epi processes thermally shock due to internal stress fields that are primarily present at the wafer edge. Infrared depolarization is characterized by its ability to detect internal stresses, unlike other methods (e.g., surface scanning and XRT), and by its greater sensitivity than other methods. Conventional methods (e.g., XRT) only produce wafer maps and are not quantitative.

[0051] In embodiments where two epitaxial layers are grown on a substrate prior to imaging, slip may grow exponentially, facilitating visualization of the slip. Additionally, the use of two thermal treatments and / or growth of more than one epitaxial layer may be used to better simulate downstream customer processes.

[0052] Working Example The processes of the present disclosure are further illustrated by the following examples, which should not be construed in a limiting sense.

[0053] Example 1: Effect of varying molten nitrogen and oxygen on slip resistance and characterization with two epitaxial layers Czochralski growth conditions were varied to vary the nitrogen and oxygen concentrations in the melt and in the resulting single crystal silicon ingots (300 mm). The substrates underwent two epi growth processes, one with an 8 μm deposition and the other with a 5 μm deposition (both at a deposition temperature of 1130 °C and a deposition rate of 1.8 μm / min). The epitaxial wafers were imaged by infrared depolarization (~1.3 μm) on a SIRD instrument (PVA TePla America, Inc., CA, CO). An annular edge region of 144 mm to 149 mm (0.96% to 99.3% of the radius) of each wafer was scanned. A defectivity of 5% (40 DU) was targeted as the upper limit.

[0054] Example 2: Characterization by two-step heat treatment without epitaxial layer deposition Czochralski growth conditions were varied to vary the concentrations of nitrogen and oxygen in the melt and in the resulting single crystal silicon ingots (300 mm). The substrates were subjected to two heat treatments at 1100 °C for 80 min each (without epitaxial layer deposition). The substrates were imaged by infrared depolarization (~1.3 μm) on a SIRD instrument (PVA TePla America, Inc., CA, CO). An annular edge area of ​​144 mm to 149 mm (0.96% to 99.3% of the radius) of each wafer was scanned. A defectivity of 5% (40 DU) was the target upper limit. As shown in Figure 14, two crystals (A and D) met the specifications and two ingots (B and C) did not meet the specifications.

[0055] As used herein, the terms "about," "substantially," "essentially," and "approximately," when used in conjunction with a range of dimensions, concentrations, temperatures, or other physical or chemical properties or characteristics, are meant to cover variations that may exist at the upper and / or lower limits of the range of the property or characteristic, including variations that are due, for example, to rounding, measurement method, or other statistical variations.

[0056] When introducing elements of the disclosure or embodiments thereof, the articles "a," "an," "the," and "said" are intended to mean that there are one or more of the elements. The terms "comprising," "including," "containing," and "having" are intended to be inclusive and mean that there may be additional elements other than the listed elements. The use of specific orientation terms (e.g., "top," "bottom," "side," etc.) is for convenience of description and does not require a particular orientation of the items described.

[0057] Since various changes may be made in the above-described structures and methods without departing from the scope of the present disclosure, it is intended that all matter contained in the above description and shown in the accompanying drawings be interpreted as illustrative and not in a limiting sense.

Claims

1. A method for determining the epitaxial compatibility of Czochralski growth conditions for manufacturing a silicon substrate, comprising: heating a crucible containing a first charge of silicon to form a first silicon melt in the crucible; contacting a silicon seed crystal with the first silicon melt, the first silicon melt having a first impurity profile; pulling up the silicon seed crystal to grow a first single crystal silicon ingot; slicing a first plurality of silicon substrates from the first single crystal silicon ingot; contacting a first silicon-containing gas with the front surface of a silicon substrate among the first plurality of silicon substrates, the first silicon-containing gas decomposing to form a first epitaxial silicon layer on the silicon substrate and forming a first epitaxial wafer; imaging the first epitaxial wafer by infrared polarization extinction and determining a first infrared polarization extinction parameter; heating a crucible containing a second charge of silicon to form a second silicon melt in the crucible; contacting a silicon seed crystal with the second silicon melt, the second silicon melt having a second impurity profile, and the first impurity profile of the first melt being different from the second impurity profile of the second melt; pulling up the silicon seed crystal to grow a second single crystal silicon ingot; slicing a second plurality of silicon substrates from the second single crystal silicon ingot; contacting a second silicon-containing gas with the front surface of a silicon substrate among the second plurality of silicon substrates, the second silicon-containing gas decomposing to form a second epitaxial silicon layer on the silicon substrate and forming a second epitaxial wafer; imaging the second epitaxial wafer by infrared polarization extinction and determining a second infrared polarization extinction parameter; and A process for determining the epitaxial compatibility of a first impurity profile and a second impurity profile for manufacturing a substrate based on first and second infrared depolarization parameters, wherein the crucible in which the first silicon melt is formed is part of a crystal pulling apparatus, the crystal pulling apparatus being the same as or different from the crystal pulling apparatus including the crucible in which the second silicon melt is formed, and the silicon seed crystal in contact with the first silicon melt and the silicon seed crystal in contact with the second silicon melt being the same or different silicon seed crystals. **Claim 2** The method according to claim 1, wherein the step of determining the epitaxial compatibility of the first impurity profile and the second impurity profile for manufacturing a substrate includes a step of comparing the first infrared depolarization parameter and the second infrared depolarization parameter. **Claim 3** The method according to claim 2, wherein the first infrared depolarization parameter and the second infrared depolarization parameter are the same parameter. **Claim 4** The method according to claim 1, wherein the step of determining the epitaxial compatibility of the first impurity profile and the second impurity profile for manufacturing a substrate includes a step of determining the slip resistance of the substrate. **Claim 5** The method according to claim 1, wherein the first infrared depolarization parameter and the second infrared depolarization parameter are each selected from a wafer map, a defect rate variation chart, an average defect rate, a total defect rate, an average depolarization value, a total depolarization value, a depolarization contrast, and an equivalent shear stress value. **Claim 6** The method according to claim 1, wherein the first infrared depolarization parameter and the second infrared depolarization parameter are related to the depolarization value. **Claim 7** The method according to claim 1, wherein the first impurity profile and the second impurity profile are related to the concentration of oxygen, nitrogen, or boron in the melt. **Claim 8** A step of heat-treating the first epitaxial wafer before imaging the first epitaxial wafer; and A step of heat-treating the second epitaxial wafer before imaging the second epitaxial wafer, the method according to claim 1 further including these steps. **Claim 9** The method according to claim 1, wherein the first epitaxial silicon layer is formed on the silicon substrate of the first plurality of substrates under the same process conditions as those under which the second epitaxial silicon layer is formed on the silicon substrate of the second plurality of substrates to form the second epitaxial wafer.

10. The method according to claim 1, wherein only the annular edge regions of the first and second epitaxial wafers are imaged.

11. Forming a first batch of epitaxial wafers from a batch of the first plurality of silicon substrates; Imaging each epitaxial wafer of the first batch of epitaxial wafers by infrared depolarization and determining a first infrared depolarization parameter; Forming a second batch of epitaxial wafers from a batch of the second plurality of silicon substrates; and Imaging each epitaxial wafer of the second batch of epitaxial wafers by infrared depolarization and determining a second infrared depolarization parameter, The method according to claim 1, comprising the steps of.

12. Forming a first batch of single-crystal silicon ingots from a plurality of first silicon melts having a first impurity profile, wherein the first single-crystal silicon ingots are part of the first batch; Slicing a first plurality of silicon substrates from two or more single-crystal silicon ingots of the first batch; Forming a first batch of epitaxial wafers from the first plurality of silicon substrates; Imaging each epitaxial wafer of the first batch of epitaxial wafers by infrared depolarization and determining a first infrared depolarization parameter; Forming a second batch of single-crystal silicon ingots from a plurality of second silicon melts having a second impurity profile, wherein the second single-crystal silicon ingots are part of the second batch; Slicing a second plurality of silicon substrates from two or more single-crystal silicon ingots of the second batch; Forming a second batch of epitaxial wafers from the second plurality of silicon substrates; and Imaging each epitaxial wafer of the second batch of epitaxial wafers by infrared depolarization and determining a second infrared depolarization parameter, The method according to claim 1, comprising the steps of.

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