Multi-tenant isolation on a multi-reticle photonic communication platform

Abstract

A photonic communications platform is disclosed that allows for use by multiple users in a secure manner. The platform comprises a substrate, a first photonic circuit monolithically integrated with the substrate, and a second photonic circuit monolithically integrated with the substrate. The first photonic circuit is patterned with a first plurality of photonic modules, the first plurality of photonic modules being copies of a common template photonic module. The second photonic circuit is patterned with a second plurality of photonic modules, the second plurality of photonic modules being copies of a common template photonic module. A photonic link couples the first photonic circuit to the second photonic circuit. A controller optically isolates the first photonic circuit from the second photonic circuit by optically breaking the photonic link.

Description

[Technical field]

[0001] The present invention relates to multi-tenant isolation on a multi-reticle photonic communications platform. [Background technology]

[0002] A computer system includes a random access memory (RAM) for storing data and machine code. RAM is typically a volatile memory, such that stored information is lost when power is removed. In modern implementations, the memory takes the form of integrated circuits. Each integrated circuit includes a number of memory cells. To allow access to the stored data and machine code, the memory is placed in electrical communication with the processor. Typically, these electrical communications are implemented as metal traces formed on a substrate on which the memory and processor are placed. Summary of the Invention

[0003] Some embodiments relate to a photonic communications platform comprising: a substrate; a first photonic circuit monolithically integrated with the substrate, the first photonic circuit being patterned with a first plurality of photonic modules, the first plurality of photonic modules being copies of a common template photonic module; a second photonic circuit monolithically integrated with the substrate, the second photonic circuit being patterned with a second plurality of photonic modules, the second plurality of photonic modules being copies of a common template photonic module; a photonic link coupling the first photonic circuit to the second photonic circuit; and a controller configured to optically isolate the first photonic circuit from the second photonic circuit by optically blocking the photonic link.

[0004] In some embodiments, the photonic communications platform further comprises an optical switch having an output coupled to the photonic link, and optically blocking the photonic link includes controlling the optical switch to route light away from the output.

[0005] In some embodiments, the optical switch comprises a Mach-Zehnder interferometer, the output comprises a first output arm of the Mach-Zehnder interferometer, and controlling the optical switch to route the light away from the output includes controlling the Mach-Zehnder interferometer to route the light towards a second output arm of the Mach-Zehnder interferometer.

[0006] In some embodiments, the controller is further configured to provide a first user with access to the first photonic circuit and a second user with access to the second photonic circuit.

[0007] In some embodiments, the controller is further configured to deny access to the first photonic circuit to the second user and to deny access to the second photonic circuit to the first user.

[0008] In some embodiments, the photonic communications platform further comprises a first die in communication with a first photonic module of the first plurality of photonic modules and a second die in communication with a first photonic module of the second plurality of photonic modules.

[0009] In some embodiments, the first die is stacked on top of a first photonic module of the first plurality of photonic modules and the second die is stacked on top of the first photonic module of the second plurality of photonic modules.

[0010] In some embodiments, the first die is electronically isolated from the second die. In some embodiments, the first die comprises a first processor and the second die comprises a second processor.

[0011] In some embodiments, the photonic communications platform further comprises a third die in communication with a second photonic module of the first plurality of photonic modules and a fourth die in communication with a second photonic module of the second plurality of photonic modules.

[0012] In some embodiments, the first photonic circuit places the first die in optical communication with a third die, and the second photonic circuit places the second die in optical communication with a fourth die.

[0013] Some embodiments relate to a method for operating a photonic communications platform, the method including obtaining a substrate comprising: a first photonic circuit monolithically integrated with the substrate, the first photonic circuit being patterned with a first plurality of photonic modules, the first plurality of photonic modules being copies of a common template photonic module; a second photonic circuit monolithically integrated with the substrate, the second photonic circuit being patterned with a second plurality of photonic modules, the second plurality of photonic modules being copies of a common template photonic module; and a photonic link coupling the first photonic circuit to the second photonic circuit; and optically isolating the first photonic circuit from the second photonic circuit by optically breaking the photonic link.

[0014] In some embodiments, the substrate further comprises an optical switch having an output coupled to the photonic link, and optically blocking the photonic link includes controlling the optical switch to route light away from the output.

[0015] In some embodiments, the optical switch comprises a Mach-Zehnder interferometer, the output comprises a first output arm of the Mach-Zehnder interferometer, and controlling the optical switch to route the light away from the output includes controlling the Mach-Zehnder interferometer to route the light towards a second output arm of the Mach-Zehnder interferometer.

[0016] In some embodiments, the method further includes providing a first user with access to the first photonic circuit and providing a second user with access to the second photonic circuit.

[0017] In some embodiments, the method further includes denying access to the first photonic circuit to the second user and denying access to the second photonic circuit to the first user.

[0018] In some embodiments, the method further includes controlling the first photonic circuit to enable electronic communication between the first die and a first photonic module of the first plurality of photonic modules, and controlling the second photonic circuit to enable electronic communication between the second die and the first photonic module of the second plurality of photonic modules.

[0019] In some embodiments, the first die is stacked on top of a first photonic module of the first plurality of photonic modules and the second die is stacked on top of the first photonic module of the second plurality of photonic modules.

[0020] In some embodiments, optically isolating the first photonic circuit from the second photonic circuit includes electronically isolating the first die from the second die. In some embodiments, the first die comprises a first processor and the second die comprises a second processor.

[0021] In some embodiments, the method further includes controlling the first photonic circuit to enable electronic communication between the third die and a second photonic module of the first plurality of photonic modules, and controlling the second photonic circuit to enable electronic communication between the fourth die and the second photonic module of the second plurality of photonic modules.

[0022] In some embodiments, the method further includes controlling the first photonic circuit to place the first die in optical communication with the third die, and controlling the second photonic circuit to place the second die in optical communication with the fourth die.

[0023] Various aspects and embodiments of the present application are described with reference to the following figures. It should be understood that the drawings are not necessarily drawn to scale. Items that appear in more than one figure are designated with the same reference numerals in the figures in which they appear. [Brief description of the drawings]

[0024] [Figure 1] 1 illustrates a computing system based on a photonic communications platform, according to some embodiments. [Figure 2A] 1 illustrates a semiconductor wafer according to some embodiments. [Figure 2B] 1 illustrates a set of photomasks, according to some embodiments. [Figure 2C] 1 illustrates an example of a photomask for forming an optical waveguide, according to some embodiments. [Figure 2D] 2B shows the wafer of FIG. 2A patterned according to the photomask set of FIG. 2B, according to some embodiments. [Figure 2E] 2E identifies photonic circuits formed on the patterned wafer of FIG. 2D, according to some embodiments. [Figure 3A]2F illustrates an example of a photonic module of the patterned wafer of FIG. 2E according to some embodiments. [Figure 3B] 3B illustrates a collection of photonic modules of the type shown in FIG. 3A according to some embodiments. [Figure 4] 1 illustrates a group of photonic modules sharing the same pattern of metal traces, according to some embodiments. [Figure 5A] 1 illustrates an example of a portion of a wafer that supports use by multiple users, according to some embodiments. [Figure 5B] 1 illustrates another example of a portion of a wafer that supports use by multiple users, according to some embodiments. [Figure 5C] 1 illustrates yet another example of a portion of a wafer that supports use by multiple users, according to some embodiments. [Figure 6] 1 illustrates two computing systems built on adjacent clusters of photonic modules, according to some embodiments. [Figure 7] 1 illustrates in further detail a pair of adjacent photonic modules according to some embodiments. [Figure 8] 1 illustrates an optical switch coupled to a photonic link according to some embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0025] I. Overview The inventors have recognized and understood that certain photonic circuits are not suitable for use by multiple users, since they do not provide a means for ensuring security of data between users. The inventors have developed a photonic communications platform that supports operation by multiple users in a manner that ensures that a user's data is not accessible by other users. The photonic communications platform developed by the inventors and described herein relies on so-called "photonic modules" (also referred to herein as "photonic tiles" or simply "tiles"). Photonic modules contain means for photonically routing optical signals to other adjacent photonic modules in a configurable manner, thereby forming a communications fabric that enables networks of arbitrary architecture. Photonic modules may be defined as copies of a template photonic module using a photolithographic, step-and-repeat manufacturing process.

[0026] The photonic communications platform developed by the inventors and described herein includes wafer-scale photonic integrated circuits. In one example, the wafer supports a cluster of computers networked together by photonic modules. The inventors have realized that an entire cluster of computers may be too large for use by a single user, which may result in significant downtime of computing resources. By utilizing the platform described herein, the same wafer can support use by multiple concurrent users. For example, utilization of the cluster may be increased by licensing different parts of the cluster to different customers.

[0027] However, the inventors have recognized and appreciated that allowing multiple users to share the same platform creates data security challenges as users may unintentionally (or intentionally) attempt to access data reserved for other users. In some embodiments, this can be addressed by configuring photonic firewalls between portions of the photonic wafer. This involves blocking a photonic link that under different circumstances couples a photonic module assigned to one user to a photonic module assigned to another user. When blocked, the photonic link still physically connects the photonic modules assigned to different users, but does not allow the passage of light encoded with data reserved for the users, or does not allow the passage of light at all.

[0028] II. Photonic Communication Platform FIG. 1 illustrates an example of a computing system based on a photonic communications platform with nine photonic modules arranged in a 3×3 topology, according to one example. The computing system 10 includes a photonic circuit 20 patterned with nine photonic modules 22. The photonic communications platform supports one processor die (30) positioned in the center of the photonic circuit 20 and eight memory nodes surrounding the processor die. Some memory nodes include a single memory chip (see, e.g., memory die 32). Other memory nodes include stacked memories including multiple vertically stacked memory dies (see, e.g., stacked memories 34). The dies are stacked on top of a wafer that defines the photonic modules. The dies can communicate with the photonic modules electronically (e.g., using through-silicon vias, copper pillars, microbumps, ball grid arrays, or other electrical interconnects) and / or optically (e.g., using grating couplers, prisms, lenses, or other optical couplers).

[0029] As described in further detail below, the photonic module may be patterned with optical waveguides and an optical distribution network. The optical distribution network of the photonic module may selectively place the die of that particular node in optical communication with any other die of the computing system. For example, the optical distribution network of the photonic module located under the processor die 30 may be reconfigured depending on the needs of the processor. At the beginning of a routine, the processor may need to access data stored in a first memory node. This read operation involves configuring the respective optical distribution network to place the processor in optical communication with the first memory node. Later in the routine, the processor may need to write data to a second memory node. This write operation involves reconfiguring the optical distribution network to place the processor in optical communication with the second memory node.

[0030] Manufacturing photonic modules at large scale can be expensive. The photonic communication platforms described herein are engineered to limit manufacturing costs. These platforms rely on the use of a common set of photomasks to manufacture multiple photonic modules. This approach reduces costs in two ways. First, it reduces the additional costs incurred in sourcing multiple different photomask sets. Second, it allows the photonic modules to be manufactured using standard semiconductor foundries, some of which require the same photomask set (or at least one photomask) to be used across an entire wafer. Designing photonic modules that share at least one photomask allows many photonic modules to be manufactured on the same semiconductor wafer while leveraging standard, low-cost step-and-repeat manufacturing processes.

[0031] III. Photonic Module The photonic modules described herein may be fabricated using microfabrication techniques, including, for example, complementary metal oxide semiconductor (CMOS) microfabrication techniques. Accordingly, some embodiments relate to silicon photonics-based optical communication platforms. Some specific microfabrication techniques include step-and-repeat approaches, whereby a stepper machine is used to pattern a semiconductor wafer with multiple copies of a template layout (e.g., a reticle). Figures 2A-2E illustrate microfabrication techniques for fabricating photonic modules. Figures 3A-3F illustrate examples of photonic modules patterned using these microfabrication techniques.

[0032] Referring first to FIG. 2A, this figure shows a semiconductor wafer 100. Wafer 100 may be made of any material. For example, wafer 100 may be made of (or otherwise include) silicon. In one example, wafer 100 is a silicon-on-insulator (SOI) wafer. In another example, wafer 100 is a bulk silicon wafer. Wafer 100 may have any size. For example, the diameter of wafer 100 may be 150 mm, 300 mm, or 450 mm, among other possible values. However, not all wafers need to have a circular shape.

[0033] FIG. 2B shows a set of photomasks that can be used to pattern wafer 100 using photolithography techniques. Photomask set 200 includes three photomasks (201, 202, and 203), although other sets may include more or fewer photomasks. Each photomask has a particular pattern of opaque and transparent areas. When the photomask is exposed to light, the opaque areas block the light, thereby preventing it from shining on the wafer, and the transparent areas allow the light to pass through. As a result, the pattern of the photomask is transferred to the wafer.

[0034] Each photomask may define a particular layer of the photonic module. One photomask may be used to define the optical waveguides. When the wafer goes through an etching process, only the exposed areas (or only the unexposed areas) are etched away, while other areas remain unetched. This photomask may be patterned to form a network of optical waveguides when the wafer is exposed through this photomask. FIG. 2C shows a portion of a photomask that may be used to form the waveguides on the wafer 100. The lines of the photomask 201 represent the opaque areas. The background of the photomask 201 is transparent. By exposing the photomask 201 so that an image of the photomask is projected onto the wafer 100, it is possible to pattern the waveguides in the shape of the opaque areas. In this particular example, the pattern of lines on the photomask becomes a grid of waveguides.

[0035] Some photonic modules involve the use of different levels of optical waveguides. In some such embodiments, photomask set 200 may include a dedicated photomask for each waveguide level. A separate photomask may be used to define n-doped regions. When the wafer undergoes an ion implantation or dopant diffusion process, only exposed regions (or only unexposed regions) receive doping, while other regions remain undoped. A separate photomask may be used to define p-doped regions using a similar process. Some photonic modules involve the use of different doping concentrations. In some such embodiments, photomask set 200 may include a dedicated photomask for each doping concentration. In other embodiments, photomask set 200 may include photomasks used to define the deposition of semiconductor materials other than silicon, such as germanium, and / or other materials of the periodic table, such as Group III or Group V. A separate photomask may be used to define metal contacts. A separate photomask may be used to define metal traces. Some photonic modules involve the use of different levels of metal traces. In some such embodiments, photomask set 200 may include a dedicated photomask for each metal trace level.

[0036] In some embodiments, the wafer 100 is patterned in a step-and-repeat manner. As the wafer 100 is processed in a stepper machine, the pattern of a photomask is repeatedly exposed in a grid across the surface of the wafer. This process involves stepping the wafer back and forth and side to side under the lens of the stepper, exposing the photomask at each step. As a result, the wafer 100 is patterned with multiple copies of the pattern defined by the photomask. This operation may be repeated for each photomask (or at least some of the photomasks) in the set.

[0037] In some embodiments, this process may be used to pattern wafer 100 with multiple copies of a template photonic module. In the example of FIG. 2D, wafer 100 is patterned with a grid of photonic modules 22. Photonic modules may share one or more photomask patterns of set 200. For example, photonic modules may share the same waveguide photomask and / or the same m-trace photomask pattern. In other embodiments, photonic modules share all photomask patterns of set 200. For example, photonic modules may share the same optical waveguide pattern, the same n-doped pattern, the same p-doped pattern, the same contact pattern, the same metal trace pattern, etc.

[0038] In some embodiments, the entire surface of wafer 100 is patterned using photomask set 200. However, not all embodiments are limited in this respect, as some portions of wafer 100 may be patterned using a first photomask set and other portions of wafer 100 may be patterned using a second photomask set. In some embodiments, the first and second photomask sets may share one or more common photomasks, such as a waveguide photomask.

[0039] Once patterned, the wafer 100 may include multiple photonic circuits. In one example, the wafer of FIG. 2E is marked to obtain six photonic circuits from the wafer 100. The photonic circuits are monolithically integrated with the wafer. The figure identifies a 1×1 photonic circuit having only one photonic module 22, a 2×2 photonic circuit having four photonic modules 22, a 2×3 photonic circuit having six photonic modules 22, and three 3×3 photonic circuits each having nine photonic modules 22. Separating the photonic circuits from the wafer involves dicing the wafer along the perimeter of the desired photonic circuit. One of the 3×3 photonic circuits of the wafer 100 may be used as the photonic circuit of the example computing system of FIG. 1 (see photonic circuit 20).

[0040] The techniques described in connection with FIGS. 2A-2D allow for the fabrication of photonic modules at a relatively low cost. Some semiconductor foundries require that the same photomask set (or at least one photomask) be used to pattern an entire wafer (or at least a portion of a wafer). Otherwise, using different photomasks to pattern different portions of a wafer would require replacing one photomask with another between photolithography exposures, making the step-and-repeat process inefficient and expensive. Designing photonic modules that share at least one photomask allows for the fabrication of many photonic modules on the same semiconductor wafer while leveraging standard, low-cost step-and-repeat processes.

[0041] FIG. 3A shows an example of a photonic module 22. In this example, the photonic module 22 is shaped as a rectangle (although other shapes such as a square or other polygons are also possible). Thus, the photonic module 22 is bounded by four boundaries (boundaries 1, 2, 3, and 4). Boundary 1 faces boundary 2, and boundary 3 faces boundary 4. Boundary 1 is adjacent to boundaries 3 and 4, and boundary 2 is also adjacent to boundaries 3 and 4. The photonic module 22 includes an optical distribution network 104 coupled to waveguides 111, 112, 113, and 114. The waveguide 111 optically couples the optical distribution network 104 to boundary 1. Thus, an optical signal coupled from the optical distribution network 104 to the waveguide 111 can be transferred outside the photonic module by crossing the boundary 111. Similarly, waveguide 112 optically couples optical distribution network 104 to boundary line 2, waveguide 113 optically couples optical distribution network 104 to boundary line 3, and waveguide 114 optically couples optical distribution network 104 to boundary line 4. In some embodiments, the boundary line of a photonic module is defined based on a photolithography shot (e.g., the boundary line is defined by the boundary line of a photomask used to fabricate the photonic module). However, in other embodiments, one photolithography shot may define two or more photonic modules. For example, a photomask may be patterned with multiple adjacent instances of a template photonic module. In some such embodiments, the boundary line of a photonic module is defined where adjacent instances of the template photonic module meet.

[0042] 3A shows a waveguide coupling the optical distribution network to each of the boundaries, not all embodiments are arranged in this manner. In other embodiments, photonic module 22 may include two of these four waveguides, such as waveguides 111 and 112, or waveguides 111 and 113. In yet other embodiments, photonic module 22 may include three of these four waveguides, such as waveguides 111, 112, and 113. Optical distribution network 104 includes photonic components (e.g., photonic switches) for routing optical signals in and out of photonic module 22.

[0043] In some embodiments, the photonic module may include multiple layers of photonic waveguides. Similar to how multiple layers of conductive traces enhance an electronic circuit's ability to route electrical signals, multiple layers of waveguides enhance the photonic module's ability to route optical signals. In one example, one layer includes silicon waveguides and one layer includes silicon nitride waveguides. In another example, multiple layers include silicon waveguides. Additionally or alternatively, multiple layers include silicon nitride waveguides. The choice of material for each waveguide layer may be determined by the wavelength of light to be routed by the waveguide. For example, silicon and silicon nitride layers may be used to route infrared light in the telecommunications band having wavelengths of about 1.3 μm or 1.5 μm. In some examples, multiple layers of waveguides may also include aluminum nitride waveguides that can be used to route visible light up to UV wavelengths, or aluminum oxide waveguides used to route UV light. Each layer may be arranged in a configuration similar to that shown in FIG. 3A, with an optical distribution network that routes signals between the waveguides of the layer.

[0044] The photonic module 22 may further include one or more out-of-plane couplers (not shown in FIG. 3A). The out-of-plane couplers may be configured to emit light out of the xy plane, for example, in a direction parallel to the z-axis or at an angle to the z-axis. The out-of-plane couplers may further be configured to capture light shining from outside the xy plane. In some embodiments, the out-of-plane couplers enable optical communication between the photonic module 22 and a die disposed above and / or below the photonic module. The out-of-plane couplers may be implemented using any suitable optical components, including, for example, optical gratings, lenses, and prisms. In some embodiments, the optical distribution network may be configured such that the same out-of-plane couplers enable optical communication in both directions, from the optical distribution network 104 to the die and from the die to the optical distribution network 104.

[0045] Optical distribution network 104 may selectively couple any component of photonic module 22 to any other component of photonic module 22. For example, optical distribution network 104 may allow the passage of light between waveguide 111 and waveguide 112, and / or between waveguide 111 and waveguide 113, and / or between waveguide 113 and waveguide 114, etc. This may be accomplished by equipping the optical distribution network with controllable optical switches.

[0046] A photonic circuit may include multiple photonic modules connected together to collectively form an optical network. FIG. 3B shows an example of a 2×3 photonic circuit including six photonic modules 22. The photonic circuit is obtained by dicing a group of 2×3 photonic modules from a wafer 100 (see FIG. 2E). The photonic modules 22 are arranged such that the waveguide 111 of the optical module is aligned with the waveguide 112 of the optical module to the left of the optical module, the waveguide 112 of the optical module is aligned with the waveguide 111 of the optical module to the right of the optical module, the waveguide 113 of the optical module is aligned with the waveguide 114 of the optical module above the optical module, and the waveguide 114 of the optical module is aligned with the waveguide 113 of the optical module below the optical module. The optical modules thus form an optical network. The optical distribution network 104 may route the optical signal anywhere inside or outside the network. For example, assume that a processor is attached to a photonic module positioned at the northwest corner of a photonic circuit and a memory is attached to a photonic module positioned at the southeast corner of the photonic circuit. A read operation may involve reconfiguring the optical distribution network (e.g., by controlling its optical switches) to place the processor in optical communication with the memory.For example, an optical communication path may be formed to: 1) couple a processor to the out-of-plane coupler of the photonic module in which it is mounted; 2) couple the out-of-plane coupler of that photonic module to a waveguide 112 of the same photonic module; 3) couple the waveguide 112 of that photonic module to the waveguide 111 of an adjacent photonic module (the central top photonic module); 4) couple the waveguide 112 of the central top photonic module to the waveguide 111 of the next adjacent photonic module (the northeast corner of the photonic circuit); 5) couple the waveguide 114 of the photonic module positioned in the northeast corner to the waveguide 113 of the photonic module in which the memory is mounted; and 6) couple the waveguide 113 of the photonic module in which the memory is mounted to the out-of-plane coupler of the same photonic module.

[0047] As mentioned above, the waveguides of adjacent photonic modules are optically coupled to each other, thereby allowing the passage of light from one photonic module to the next. In some embodiments, the ends of the waveguides may be physically connected. In other embodiments, there may be gaps between the waveguides. In this example, each waveguide has an end located at a distance from the boundary line. Thus, a gap is formed in the boundary line region. Despite the gaps, the waveguides of adjacent photonic modules are still optically coupled to each other. In this case, in fact, light emitted at the end of a waveguide reaches the end of the other waveguide by free space propagation.

[0048] In some embodiments, the photonic modules 22 may be patterned according to a common metal trace photomask, so that the photonic modules share the same pattern of metal traces. In some embodiments, the photonic modules 22 are patterned according to multiple common photomasks, so that multiple levels of metal traces share the same pattern across different photonic modules. Some of the metal traces may be used to deliver power across the photonic circuit. For example, some of the metal traces may be arranged to form a power grid, as described in more detail below. FIG. 4 illustrates a 2×3 photonic circuit, with each photonic module 22 sharing the same pattern of metal traces. For purposes of illustration, only metal traces are shown in this figure, but each photonic module further includes a waveguide, one or more out-of-plane couplers, and an optical distribution network. In this example, there are two levels of metal traces. The metal traces on each level are fabricated using the same photomask across different photonic modules. The metal traces on metal trace level 1 run horizontally, thereby electrically coupling horizontally adjacent photonic modules to each other. The metal traces of metal trace level 2 run vertically, thereby electrically coupling photonic modules that are vertically adjacent to each other. Of course, other arrangements are also possible. For example, in other embodiments, metal traces on the same level may electrically couple one photonic module to all of its neighboring photonic modules.

[0049] The metal traces are arranged to carry electricity (e.g., signals and / or power) across the boundaries of the photonic module. This may be achieved by patterning the metal traces to be continuous across the boundaries of the photonic module. In this example, the metal traces on level 1 are continuous across the vertical boundaries and the metal traces on level 2 are continuous across the horizontal boundaries. The metal traces on different levels may be connected to each other using vias. In some embodiments, the photonic modules may share the same pattern of vias. In other words, the same via photomask may be used for each photonic module. In some embodiments, the photonic module may have many more metal traces (tens to hundreds). Some of these metal traces may be arranged to be continuous across the photonic module, but in some embodiments, the majority of the metal traces do not need to be patterned to be continuous across the module.

[0050] IV. Multi-User Operation The photonic communications platform described herein may support multi-user operation. The inventors have realized that an entire computing cluster of a photonic wafer may be too large for use by a single user, which may result in significant downtime of computing resources. By utilizing the platform described herein, the same wafer may support concurrent use by multiple users. For example, utilization of the cluster may be increased by licensing different portions of the cluster to different customers.

[0051] FIG. 5A illustrates an example of a portion of a wafer that supports concurrent use by multiple users, according to some embodiments. The wafer portion of FIG. 5A supports three separate photonic circuits (501, 502, and 503), each of which is monolithically integrated with the substrate of the wafer. Photonic circuit 501 is formed by a 2×2 cluster of photonic modules. Photonic circuit 502 is formed by a 2×3 cluster of photonic modules. Photonic circuit 503 is formed by a 3×5 cluster of photonic modules. In some embodiments, each cluster of photonic modules may be licensed to a different user. Each user may use their assigned cluster in combination with electronic processors, graphic processing units (GPUs), memory, and / or other electronic integrated circuits to form a desired computing architecture.

[0052] It should be noted that photonic circuits of the type described herein may have any shape. In the example of FIG. 5B, the wafer is also divided into photonic circuits (501, 502, 503, 504, and 505), but the photonic circuits have shapes other than a square or rectangular array of photonic modules. Furthermore, the photonic modules of a photonic circuit need not be adjacent. In the example of FIG. 5C, non-adjacent portions of photonic circuit 503 are coupled to each other via optical fibers. Similarly, non-adjacent portions of photonic circuit 505 are also coupled to each other via optical fibers. The non-adjacent portions may be part of separate wafers or may be part of the same wafer.

[0053] FIG. 6 illustrates two computing systems built on adjacent clusters of photonic modules, according to some embodiments. More specifically, FIG. 6 illustrates a computing system built on a portion of photonic circuitry 501 and a computing system built on a portion of photonic circuitry 502. Photonic circuitry 501 may be allocated for use by a first user, and photonic circuitry 502 may be allocated for use by a second user. The computing system built on photonic circuitry 501 includes a processor die 801, a memory die 802, and other unlabeled dies. The computing system built on photonic circuitry 502 includes a processor die 811, a memory die 812, and other unlabeled dies. In some embodiments, the dies of FIG. 6 are stacked on top of a wafer that hosts the photonic circuits. For example, each die may be stacked on top of a corresponding photonic module. Each die may be in electrical communication with the underlying photonic module using vias or other types of interconnects.

[0054] The inventors have realized that allowing communication to occur across the boundary defined between photonic circuit 501 and photonic circuit 502 compromises the security of data reserved for either user. FIG. 7 shows a pair of adjacent photonic modules in more detail. The photonic module on the left of FIG. 7 is part of photonic circuit 501, and the photonic module on the right of FIG. 7 is part of photonic circuit 502. A boundary 505 is defined between adjacent photonic modules. In some embodiments, boundary 505 represents a virtual boundary. For example, a wafer may lack a physical partition between adjacent photonic modules of a common photonic circuit, or a physical partition between adjacent photonic modules of different photonic circuits. The virtual boundary can be formed by switching a photonic switch in the wafer such that signals from a portion of the wafer used by a first user do not pass to a portion of the wafer used by a second user. In some embodiments, the photonic switch may not have a perfect extinction ratio and / or there may be a photonic / electronic crossover between the signals of the two users. In this case, signal crosstalk up to a certain percentage is inevitable. In this case, it is preferable that the wafer is designed so that the maximum amount of crosstalk is less than what can be identified using the signal receiver / detector in the system. Alternatively, physical partitions (e.g., trenches formed through the substrate, semiconductor barriers, etc.) may be placed between adjacent photonic modules of different photonic circuits, but the same type of partition may be placed between adjacent photonic modules of a common photonic circuit. In this way, photonic modules can be reconfigured over time to form different architectures. For example, at one point in time, two photonic modules may be part of a common photonic circuit, and at a later point in time, the same two photonic modules may be part of different photonic circuits.

[0055] Photonic link 510 (e.g., optical waveguide) connects a pair of adjacent photonic modules to each other, whether the adjacent photonic modules are configured to be part of the same photonic circuit or different photonic circuits. However, if adjacent photonic modules are configured to be part of different photonic circuits as in FIG. 7 and are therefore used by different users, photonic link 510 may be interrupted, thereby isolating the photonic circuits from each other. When interrupted, the photonic link does not allow the passage of light encoded with data reserved for the user, or does not allow the passage of light at all (although light in the form of noise may pass).

[0056] A trusted controller may be used to arbitrate the allocation of photonic modules between different users. In some embodiments, the trusted controller may be a die located on the photonic communications platform alongside the user's die, but may not be accessible by the user. The trusted controller may only be accessible by the operator of the photonic communications platform. Referring again to FIG. 6, the photonic module in which the die 600 is located may be reserved to the network operator, and the die 600 may include the trusted controller. In other embodiments, the trusted controller may include a chip positioned outside the wafer. Among other functions, the trusted controller may control the blocking / establishment of photonic links, thereby allowing isolation between adjacent photonic modules or communication between adjacent photonic modules depending on the needs of the platform.

[0057] The breaking / establishment of a photonic link may be performed in some embodiments using an optical switch (e.g., an optical switch of the optical distribution network 104). FIG. 8 shows an example of an optical switch. In this example, the optical switch 512 has one input (waveguide 520) and three outputs (in-circuit waveguides 522 and 524 and photonic link 510). In-circuit waveguides 522 and 524 are waveguides that couple to adjacent photonic modules of the same photonic circuit (501) of which the optical switch 512 is a part. Photonic link 510 is a waveguide that couples to an adjacent photonic module of another photonic circuit (502). Thus, photonic link 510 crosses boundary line 505. In some embodiments, blocking photonic link 510 involves controlling switch 512 to route light provided via waveguide 520 away from link 510 (e.g., by routing the light to waveguide 522, waveguide 524, or both).

[0058] The switch 512 may be controlled using a trusted controller. Thus, the trusted controller provides and denies users access to the photonic circuit depending on which photonic links are established and which photonic links are broken. In one example, the trusted controller provides a first user with access to a first photonic circuit and a second user with access to a second photonic circuit. In some such embodiments, the trusted controller may further deny the second user access to the first photonic circuit and deny the first user access to the second photonic circuit.

[0059] The switch 512 may include any type of electronically (or optically) controllable optical switch. In some embodiments, the switch 512 includes a Mach-Zehnder interferometer. The Mach-Zehnder interferometer has a first output arm and a second output arm. The first output arm may be connected to the photonic link 510, and the second output arm may be connected to another waveguide (e.g., waveguide 522). In this scenario, controlling the optical switch to route the light away from the photonic link includes controlling the Mach-Zehnder interferometer to route the light to the second output arm of the Mach-Zehnder interferometer. A nested Mach-Zehnder interferometer may be employed to switch between three or more output waveguides. The Mach-Zehnder interferometer may use thermal heaters, carrier injection / depletion, or mechanical modulation schemes. In other embodiments, the switch 512 may include resonant switches such as ring or disk resonators, and coupled resonators or coupler-resonator optical waveguides (CROW). Furthermore, the data transmitted by each user can be distinguished using their optical wavelength.

[0060] V. Additional Comments Having thus described several aspects and embodiments of the technology of the present application, it should be understood that various changes, modifications, and improvements will readily occur to those skilled in the art. Such changes, modifications, and improvements are intended to be within the spirit and scope of the technology described in this application. Accordingly, the foregoing embodiments are presented by way of example only, and it should be understood that, within the scope of the appended claims and their equivalents, the embodiments of the present invention may be practiced otherwise than as specifically described. In addition, any combination of two or more features, systems, articles, materials, and / or methods described herein is included within the scope of the present disclosure, if such features, systems, articles, materials, and / or methods are not mutually inconsistent.

[0061] Also, as described, some aspects may be embodied as one or more methods. Operations performed as part of a method may be ordered in any suitable manner. Thus, embodiments may be constructed that perform operations in an order different from the order described, and may include performing some operations simultaneously, even though in example embodiments are shown as sequential operations.

[0062] All definitions defined and used herein are understood to take precedence over dictionary definitions, definitions in documents incorporated by reference, and / or ordinary meanings of the defined terms.

[0063] As used in the specification and claims, the indefinite articles "a" and "an" are to be understood to mean "at least one," unless clearly indicated to the contrary. As used in this specification and the claims, the term "and / or" should be understood to mean "either or both" of the elements so conjoined, i.e., elements that are conjunctive in some cases and disjunctive in other cases.

[0064] As used herein and in the claims, the phrase "at least one" in reference to a list of one or more elements should be understood to mean at least one element selected from any one or more of the elements in the list of elements, but not necessarily including at least one of each and every element specifically listed in the list of elements, and not excluding any combination of elements in the list of elements. This definition also allows for elements other than those specifically identified in the list of elements to which the phrase "at least one" refers, whether related or unrelated to the specifically identified elements, may optionally be present.

[0065] The terms "approximately" and "about" may be used in some embodiments to mean within ±20% of a target value, in some embodiments within ±10% of a target value, in some embodiments within ±5% of a target value, and in some embodiments within ±2% of a target value. The terms "approximately" and "about" may include the target value.

Claims

1. 1. A photonic communications platform, comprising: A substrate; a first photonic circuit monolithically integrated with the substrate, the first photonic circuit being patterned with a first plurality of photonic modules, the first plurality of photonic modules being copies of a common template photonic module; a second photonic circuit monolithically integrated with the substrate, the second photonic circuit being patterned with a second plurality of photonic modules, the second plurality of photonic modules being copies of the common template photonic module; a photonic link coupling the first photonic circuit to the second photonic circuit; a controller configured to optically isolate the first photonic circuit from the second photonic circuit by optically breaking the photonic link.

2. 10. The photonic communications platform of claim 1, further comprising an optical switch having an output coupled to the photonic link, and optically blocking the photonic link comprises controlling the optical switch to route light away from the output.

3. 3. The photonic communications platform of claim 2, wherein the optical switch comprises a Mach-Zehnder interferometer, the output comprises a first output arm of the Mach-Zehnder interferometer, and controlling the optical switch to route light away from the output comprises controlling the Mach-Zehnder interferometer to route light toward a second output arm of the Mach-Zehnder interferometer.

4. The controller: Providing a first user with access to the first photonic circuit; The photonic communications platform of claim 1 , further configured to provide a second user with access to said second photonic circuit.

5. The controller: denying the second user access to the first photonic circuit; The photonic communications platform of claim 4 , further configured to deny access to said second photonic circuit to said first user.

6. a first die in communication with a first photonic module of the first plurality of photonic modules; The photonic communications platform of claim 1 , further comprising: a second die in communication with a first photonic module of said second plurality of photonic modules.

7. 7. The photonic communications platform of claim 6, wherein the first die is stacked on top of the first photonic module of the first plurality of photonic modules and the second die is stacked on top of the first photonic module of the second plurality of photonic modules.

8. The photonic communications platform of claim 6 , wherein the first die is electronically isolated from the second die.

9. The photonic communications platform of claim 6 , wherein the first die comprises a first processor and the second die comprises a second processor.

10. a third die in communication with a second photonic module of the first plurality of photonic modules; The photonic communications platform of claim 6 , further comprising: a fourth die in communication with a second photonic module of said second plurality of photonic modules.

11. the first photonic circuit places the first die in optical communication with the third die; The photonic communications platform of claim 10 , wherein the second photonic circuit places the second die in optical communication with the fourth die.

12. 1. A method for operating a photonic communications platform, comprising: obtaining a substrate; The substrate is a first photonic circuit monolithically integrated with the substrate, the first photonic circuit being patterned with a first plurality of photonic modules, the first plurality of photonic modules being copies of a common template photonic module; a second photonic circuit monolithically integrated with the substrate, the second photonic circuit being patterned with a second plurality of photonic modules, the second plurality of photonic modules being copies of the common template photonic module; a photonic link coupling the first photonic circuit to the second photonic circuit; The method further comprises optically isolating the first photonic circuit from the second photonic circuit by optically breaking the photonic link.

13. 13. The method of claim 12, wherein the substrate further comprises an optical switch having an output coupled to the photonic link, and optically blocking the photonic link comprises controlling the optical switch to route light away from the output.

14. 14. The method of claim 13, wherein the optical switch comprises a Mach-Zehnder interferometer, the output comprises a first output arm of the Mach-Zehnder interferometer, and controlling the optical switch to route light away from the output comprises controlling the Mach-Zehnder interferometer to route light toward a second output arm of the Mach-Zehnder interferometer.

15. Providing a first user with access to the first photonic circuit; The method of claim 12 , further comprising: providing a second user with access to the second photonic circuit.

16. denying access to the first photonic circuit to the second user; and The method of claim 15 , further comprising: denying access to the second photonic circuit to the first user.

17. controlling the first photonic circuit to enable electronic communication between a first die and a first photonic module of the first plurality of photonic modules; 13. The method of claim 12, further comprising: controlling the second photonic circuit to enable electronic communication between a second die and a first photonic module of the second plurality of photonic modules.

18. 20. The method of claim 17, wherein the first die is stacked on top of the first photonic module of the first plurality of photonic modules and the second die is stacked on top of the first photonic module of the second plurality of photonic modules.

19. 20. The method of claim 17, wherein optically isolating the first photonic circuit from the second photonic circuit comprises electronically isolating the first die from the second die.

20. 20. The method of claim 17, wherein the first die comprises a first processor and the second die comprises a second processor.

21. controlling the first photonic circuit to enable electronic communication between a third die and a second photonic module of the first plurality of photonic modules; 20. The method of claim 17, further comprising: controlling the second photonic circuit to enable electronic communication between a fourth die and a second photonic module of the second plurality of photonic modules.

22. 22. The method of claim 21 , further comprising: controlling the first photonic circuit to place the first die in optical communication with the third die; and controlling the second photonic circuit to place the second die in optical communication with the fourth die.

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