Diamond semiconductor element, electrical machinery and equipment, and method for manufacturing diamond semiconductor element

Abstract

To provide a diamond semiconductor element, electrical machinery and equipment, and a method for manufacturing the diamond semiconductor element, which can contribute to obtaining desired characteristics such as electrical characteristics and high frequency characteristics while ensuring yield, reliability, and adhesion between gold and diamond semiconductor even when miniaturized.SOLUTION: A diamond semiconductor element has an electrode structure in which an Au electrode made of Au and having a thickness of less than 100 nm is disposed on a part of a diamond semiconductor layer so as to be in ohmic contact with the diamond semiconductor layer.SELECTED DRAWING: Figure 8

Description

[Technical field]

[0001] The present invention relates to a diamond semiconductor element, an electric machine and an apparatus, and a method for manufacturing a diamond semiconductor element. [Background technology]

[0002] Recent developments in diamond CVD (Chemical Vapor Deposition) technology have led to the production of increasingly higher purity CVD diamond, which has enabled the production of single crystal diamond with high electron and hole mobility. This is expected to be used in diamond semiconductor elements with excellent device performance, such as electrical properties and high frequency characteristics (e.g., field effect transistors (FETs), diodes, inverters, converters, frequency conversion, regulators, etc.).

[0003] As one of the methods for manufacturing a diamond semiconductor element, there is a self-alignment method as described below (see, for example, Non-Patent Documents 1 and 2). First, a diamond semiconductor layer (for example, a hydrogen-terminated diamond layer) is formed on the (001) of a diamond single crystal, gold is evaporated on the surface of the diamond semiconductor layer, a first resist is formed in the element region on the gold, and the gold is wet-etched using the first resist as a mask until the diamond semiconductor layer is exposed, and the first resist is removed. Next, a second resist having an opening for forming a gate electrode and a source electrode / drain electrode is formed, and the gold exposed from the opening of the second resist is wet-etched to form a source electrode / drain electrode made of gold that is widely separated from the opening. Next, the second resist is used as a mask as it is to form a gate electrode by evaporation of metal on the diamond semiconductor layer exposed from the opening of the second resist, and then the second resist and the metal film thereon are lifted off. This completes a MESFET (Metal Semiconductor Field Effect Transistor) type diamond semiconductor element.

[0004] According to the self-alignment method, compared with the non-self-alignment method (for example, see Patent Document 1 and Non-Patent Document 3) in which the gate electrode and the source electrode / drain electrode are formed using separate resists, the number of times that the channel in the element region is exposed to a wet etching agent and a resist remover or oxygen plasma for resist ashing can be reduced, so that the damage to the channel can be reduced, and the yield and reliability of the element can be improved. Also, according to the self-alignment method, the diamond semiconductor layer is not exposed to a wet etching agent or the like after the diamond semiconductor layer is formed and before the gold for the source electrode / drain electrode is formed, so that the adhesion between the source electrode / drain electrode and the diamond semiconductor layer can be improved compared with the non-self-alignment method in which the diamond semiconductor layer is exposed to the wet etching agent or the like. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent Publication No. 2018-078254 [Non-patent literature]

[0006] [Non-Patent Document 1] Carrier transport properties in diamond and its application to high frequency FETs, Kawaharada et al., Applied Physics, 73, 339-345, 2004-03-10, The Japan Society of Applied Physics [Non-Patent Document 2] Gate metal interface of hydrogen-terminated diamond FET, Kakazu et al., Surface Science Vol. 29, No. 3, pp. 159-163, 2008 Special feature "The forefront of diamond surface and interface research" (https: / / www.jstage.jst.go.jp / article / jsssj / 29 / 3 / 29_3_159 / _pdf / -char / ja) [Non-Patent Document 3] “A High Frequency Hydrogen-Terminated Diamond MISFET With fT / fmax of 70 / 80 GHz”, X. Yu et al, IEEE Electron Device Letters, vol. 39, no. 9, pp. 1373-1376, Sept. 2018, doi: 10.1109 / LED.2018.2862158. Summary of the Invention [Problem to be solved by the invention]

[0007] The following analysis is provided by the present inventors.

[0008] In the self-alignment method described in Non-Patent Documents 1 and 2, the gold for the source electrode / drain electrode is isotropically etched by wet etching, so that the end faces of the etched source electrode / drain electrode have sharp bird's beaks near the diamond semiconductor layer. If the thickness of the source electrode / drain electrode is set in consideration of durability during bonding, the source electrode / drain electrode becomes thicker and the bird's beak becomes larger. If there is a large bird's beak, it is difficult to align the end faces of the source electrode / drain electrode to the desired position due to the shape of the bird's beak and parasitic resistance, etc., and it is difficult to obtain the desired characteristics of the device performance such as electrical characteristics and high frequency characteristics. This becomes more noticeable as the device region is miniaturized, and the same can be said not only for diamond FETs but also for other types of diamond semiconductor devices in which the position of the electrode end face is severe.

[0009] The main object of the present invention is to provide a diamond semiconductor element, an electric machine and an apparatus, and a method for manufacturing a diamond semiconductor element, which can contribute to obtaining desired characteristics such as electrical characteristics and high frequency characteristics while ensuring yield, reliability, and adhesion between gold and the diamond semiconductor even when miniaturized. [Means for solving the problem]

[0010] The diamond semiconductor element according to the first aspect comprises an electrode structure in which an Au electrode made of Au and having a thickness of less than 100 nm is disposed on a part of a diamond semiconductor layer so as to be in ohmic contact with the diamond semiconductor layer.

[0011] An electric device according to a second aspect comprises the diamond semiconductor element according to the first aspect.

[0012] The manufacturing method of the diamond semiconductor element according to the third aspect includes the steps of forming an Au film made of Au and having a thickness of less than 100 nm on a diamond semiconductor layer, forming a resist on a part of the Au film, and wet-etching the Au film using the resist as a mask to form an Au electrode. Effect of the Invention

[0013] The first to third aspects can contribute to obtaining desired characteristics such as electrical characteristics and high frequency characteristics while ensuring yield, reliability, and adhesion between gold and the diamond semiconductor layer even with miniaturization. [Brief description of the drawings]

[0014] [Figure 1] FIG. 1 is a partial cross-sectional view showing a schematic example of the configuration of a diamond semiconductor element according to embodiment 1. [Diagram 2] FIG. 1 is a partial cross-sectional view that diagrammatically shows a first modified example of the configuration of a diamond semiconductor element according to embodiment 1. [Diagram 3] 1 is a partial cross-sectional view that diagrammatically shows a second modified example of the configuration of the diamond semiconductor element according to embodiment 1. FIG. [Figure 4] 1A to 1C are cross-sectional views illustrating steps in a typical example of a method for producing a diamond semiconductor element according to embodiment 1. [Diagram 5] 5 is a process cross-sectional view following FIG. 4, which illustrates a schematic example of a method for producing a diamond semiconductor element according to embodiment 1. FIG. [Figure 6]6 is a process cross-sectional view following FIG. 5, which illustrates a schematic example of a method for producing a diamond semiconductor element according to embodiment 1. FIG. [Figure 7] FIG. 2 is an enlarged cross-sectional view of a drain electrode portion during the formation of the drain electrode of a diamond semiconductor element, where (A) is embodiment 1 and (B) is a comparative example. [Figure 8] 1 is a graph showing a schematic relationship between the extension length Lext and the cutoff frequency for each predetermined surface resistivity. [Figure 9] FIG. 2 is a cross-sectional view showing a schematic configuration of a sample used in measuring electrical characteristics and testing durability. [Figure 10] 1 is a graph showing electrical characteristics of a sample. [Figure 11] FIG. 3 is a cross-sectional view showing a schematic example of the configuration of a diamond semiconductor element according to embodiment 2. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Hereinafter, the present disclosure will be described with reference to the drawings. In addition, when drawing reference symbols are used in this application, they are intended to facilitate understanding only and are not intended to limit the present invention to the illustrated aspects. In addition, the following embodiments are merely examples and do not limit the present invention.

[0016] [Form 1] The diamond semiconductor element according to the first embodiment will be described with reference to the drawings. FIG. 1 is a partial cross-sectional view showing a schematic example of the configuration of the diamond semiconductor element according to the first embodiment. FIG. 2 is a partial cross-sectional view showing a schematic first modified example of the configuration of the diamond semiconductor element according to the first embodiment. FIG. 3 is a partial cross-sectional view showing a schematic second modified example of the configuration of the diamond semiconductor element according to the first embodiment.

[0017] The diamond semiconductor element 1 is a semiconductor element having an electrode structure in which electrodes (source electrode 12a and drain electrode 12b in FIG. 1) made of Au (gold) are arranged on the diamond semiconductor layer 11 (hydrogen termination portion 11a in FIG. 1) so as to be in ohmic contact with the diamond semiconductor layer 11. The electrode structure of the diamond semiconductor element 1 can be applied to FETs. The electrode structure of the diamond semiconductor element 1 may also be applied to diodes, inverters, converters, frequency conversion, regulators, and the like, in addition to FETs. The diamond semiconductor element 1 can be incorporated into electrical machinery and equipment such as semiconductor devices, power electronics devices, high-frequency devices, communication equipment, sensing equipment, automobiles, power transmission and distribution equipment, devices for harsh environments, equipment for high-temperature environments, equipment for radiation environments, space equipment, and nuclear reactor equipment.

[0018] When the diamond semiconductor element 1 is applied to a MISFET (Metal Insulator Semiconductor Field Effect Transistor) having a gate insulating film 14a as shown in FIG. 1, it can have the following configuration.

[0019] In the diamond semiconductor element 1 of FIG. 1, a diamond semiconductor layer 11 having a hydrogen-terminated portion 11a on its upper surface ((001) surface) is formed on a diamond substrate 10. In FIG. 1, the hydrogen-terminated portion 11a is configured to be present in the element region 2 and not present outside the element region 2. A gate electrode 15a is formed near the center of the hydrogen-terminated portion 11a via a gate insulating film 14a. On both sides of the gate electrode 15a on the hydrogen-terminated portion 11a, a source electrode 12a and a drain electrode 12b are disposed so as to be in ohmic contact with the hydrogen-terminated portion 11a. The source electrode 12a and the drain electrode 12b are disposed at a distance from the gate electrode 15a. On a part of the source electrode 12a and the drain electrode 12b, upper electrode layers 17a and 17b are formed via intermediate electrode layers 16a and 16b. The source electrode 12a and the drain electrode 12b have extensions 13a and 13b that extend (protrude) toward the gate electrode 15a side from the end faces of the intermediate electrode layers 16a and 16b and the upper electrode layers 17a and 17b on the gate electrode 15a side. The intermediate electrode layers 16a and 16b and the upper electrode layers 17a and 17b are not present on the extensions 13a and 13b. The diamond semiconductor element 1 can also be applied to a MESFET (Metal Semiconductor Field Effect Transistor) as shown in FIG. 2, which does not have a gate insulating film and is arranged so that the gate electrode 15a contacts the hydrogen termination portion 11a, in addition to the MISFET as shown in FIG. 1.

[0020] Here, the diamond substrate 10 is a substrate made of a diamond single crystal (see FIG. 1). As the diamond substrate 10, for example, a high-temperature, high-pressure synthetic diamond single crystal substrate can be used.

[0021] The diamond semiconductor layer 11 is a layer that includes diamond and has a portion that functions as a semiconductor (see FIG. 1). The diamond semiconductor layer 11 can be formed by chemical vapor deposition of diamond crystals (epitaxial diamond crystals) on the diamond substrate 10 using hydrogen and methane gas as raw materials, for example, using a microwave plasma CVD (Chemical Vapor Deposition) device. The diamond semiconductor layer 11 thus formed has a hydrogen termination portion 11a on the (001) plane (upper surface). The hydrogen termination portion 11a has a hole channel formed therein and exhibits p-type conduction. By subjecting the region of the hydrogen termination portion 11a other than the element region 2 to ozone treatment to remove hydrogen, it is possible to configure the hydrogen termination portion 11a to be present in the element region 2 and not to be present in the region other than the element region 2. The diamond semiconductor layer 11 is not limited to having the hydrogen termination portion 11a, and may have a portion in which impurities (for example, boron, phosphorus, etc.) are contained (doped, implanted) in diamond. Also, instead of having a diamond semiconductor layer 11 on a diamond substrate 10, a free-standing diamond film may be obtained by, for example, using a microwave plasma CVD apparatus and using hydrogen and methane gas as raw materials to grow diamond crystals on a seed substrate through chemical vapor deposition, followed by removing the seed substrate.

[0022] The source electrode 12a and the drain electrode 12b are electrodes (Au electrodes) made of Au (gold) (see FIG. 1). The source electrode 12a and the drain electrode 12b are formed on the diamond semiconductor layer 11. In order to ensure adhesion to the diamond semiconductor layer 11, the source electrode 12a and the drain electrode 12b are preferably formed on the diamond semiconductor layer 11 in a state where they have not been exposed to an etching agent, a resist remover, or oxygen plasma for resist ashing. The source electrode 12a and the drain electrode 12b are disposed so as to be in direct contact (ohmic contact) with the hydrogen termination portion 11a of the diamond semiconductor layer 11. The source electrode 12a and the drain electrode 12b can be formed, for example, by forming an Au film (for example, by vapor deposition or sputtering) on ​​the diamond semiconductor layer 11, forming a resist for forming the source electrode / drain electrode on the Au film, etching using the resist as a mask, and removing the resist. The source-drain distance L between the source electrode 12a and the drain electrode 12b is the distance between the source electrode 12a and the drain electrode 12b. SD In consideration of operation in a high frequency band (for example, a cutoff frequency of 50 to 100 GHz), it is preferable that the thickness is less than 100 nm.

[0023] The thickness of the source electrode 12a and the drain electrode 12b is preferably less than 100 nm in consideration of operation in a high frequency band, preferably less than 50 nm in consideration of obtaining desired RF (Radio Frequency) characteristics, and preferably less than 25 nm in consideration of operation in an even higher frequency band (for example, a cutoff frequency of more than 100 GHz). The lower limit of the thickness of the source electrode 12a and the drain electrode 12b is the critical film thickness (the same applies to other thicknesses for which no lower limit is indicated). A detailed description of the thickness of the source electrode 12a and the drain electrode 12b will be given later (see FIG. 7).

[0024] The gate insulating film 14a may be an insulating film having a single layer structure of any of Al2O3, SiO2, CaF2, HfO2, AlN, BN, Si3N4, SiON, Ta2O5, TiO2, WO3, LaF3, and MgF2, or a laminated structure of any combination thereof. The gate electrode 15a may be a metal film having a single layer structure of any of Al, Au, Ti, Mo, Cr, Ru, Cu, Pb, Zn, and Pt, or a laminated structure of any combination thereof. The gate insulating film 14a and the gate electrode 15a may be formed, for example, by forming a resist for forming a gate electrode on the diamond semiconductor layer 11, forming an insulating film for the gate insulating film 14a by a CVD method using a predetermined raw material gas by a self-alignment method using the resist as a mask, and then forming (for example, by vapor deposition or sputtering) a metal film for the gate electrode 15a on the gate insulating film 14a, and then lifting off the resist and the insulating film and metal film thereon.

[0025] The intermediate electrode layers 16a and 16b may be made of a metal electrode layer made of a metal different from Au of the source electrode 12a and the drain electrode 12b, such as Ru, Al, Ti, Mo, Cu, Cr, Pb, Zn, or Pt. The upper electrode layers 17a and 17b may be made of a metal electrode layer made of a metal different from Au of the intermediate electrode layers 16a and 16b, such as Ru, Al, Ti, Mo, Cu, Cr, Pb, Zn, or Pt. The intermediate electrode layers 16a and 16b in FIG. 1 may be omitted as shown in FIG. 3. In the case where the intermediate electrode layers are omitted, the upper electrode layers 17a and 17b may be made of a metal electrode layer made of a metal different from Au of the source electrode 12a and the drain electrode 12b, such as Ru, Al, Ti, Mo, Cu, Cr, Pb, Zn, or Pt. The thickness of the upper electrode layer 17a, 17b alone or the total thickness of the intermediate electrode layer 16a, 16b and the upper electrode layer 17a, 17b is preferably 300 nm or more in order to enhance the durability of the source electrode 12a and the drain electrode 12b, and it is preferable to increase the thickness as the current flow increases. In addition, it is preferable that the upper electrode layer 17a, 17b and the intermediate electrode layer 16a, 16b do not protrude from the region of the upper surface of the source electrode 12a and the drain electrode 12b, considering that the adhesion with the diamond semiconductor layer 11 that has been exposed to an etching agent or the like is weak. The upper surface of the upper electrode layer 17a, 17b is the surface where the contact of the measuring needle and bonding are performed. It is preferable to select the same metal (e.g., Cu, Au) as the metal used for the bonding wire, bump, ball, etc.The intermediate electrode layers 16a, 16b and the upper electrode layers 17a, 17b can be formed, for example, by forming a resist having openings for forming the intermediate electrode layer and the upper electrode layer on the diamond semiconductor layer 11 including the gate electrode 15a, the source electrode 12a and the drain electrode 12b, depositing (e.g., by vapor deposition, sputtering) a metal layer for the intermediate electrode layers 16a, 16b on the source electrode 12a and the drain electrode 12b including the resist 22, subsequently depositing (e.g., by vapor deposition, sputtering) a metal layer for the upper electrode layers 17a, 17b on the metal layer for the intermediate electrode layers 16a, 16b, and lifting off the resist and the metal layers for the intermediate electrode layers 16a, 16b and the upper electrode layers 17a, 17b thereon.

[0026] The purpose of adding the upper electrode layers 17a, 17b and the intermediate electrode layers 16a, 16b on the source electrode 12a and the drain electrode 12b is as follows. If the thickness of the source electrode 12a and the drain electrode 12b is set to less than 100 nm in consideration of operation in the high frequency band, the end faces of the source electrode 12a and the drain electrode 12b can be aligned to the desired positions, but the durability of the source electrode 12a and the drain electrode 12b decreases. Therefore, the upper electrode layers 17a, 17b and the intermediate electrode layers 16a, 16b are added to ensure the durability of the source electrode 12a and the drain electrode 12b. This ensures the durability of the source electrode 12a and the drain electrode 12b even if they are touched by a measuring needle or subjected to physical effects (heat, ultrasound, etc.) during bonding.

[0027] The purpose of adding the intermediate electrode layers 16a, 16b between the source electrode 12a / drain electrode 12b and the upper electrode layers 17a, 17b is as follows: If the same type of metal film is used for the source electrode 12a / drain electrode 12b and the upper electrode layers 17a, 17b, the source electrode 12a / drain electrode 12b is exposed to a resist remover or the like after the source electrode 12a / drain electrode 12b is formed, and therefore the surface of the source electrode 12a / drain electrode 12b is damaged or poisoned (penetration or adsorption of inhibitory components, etc.), and the adhesion between the source electrode 12a / drain electrode 12b and the upper electrode layers 17a, 17b may not be ensured. By adding intermediate electrode layers 16a, 16b made of a different type of metal film from the metal films of source electrode 12a / drain electrode 12b and upper electrode layers 17a, 17b between source electrode 12a / drain electrode 12b and upper electrode layers 17a, 17b, it is possible to ensure adhesion between source electrode 12a / drain electrode 12b and upper electrode layers 17a, 17b. This makes it possible to ensure adhesion between source electrode 12a / drain electrode 12b and upper electrode layers 17a, 17b even if there is contact with a measurement needle or physical action (heat, ultrasound, etc.) during bonding.

[0028] The source electrode 12a and the drain electrode 12b have extensions 13a and 13b that extend (protrude) toward the gate electrode 15a beyond the end faces of the upper electrode layers 17a and 17b and the intermediate electrode layers 16a and 16b on the gate electrode 15a side. ext The length L of the extensions 13a, 13b (from the end faces of the upper electrode layers 17a, 17b and the intermediate electrode layers 16a, 16b on the gate electrode 15a side to the tip faces of the extensions 13a, 13b) is preferably less than 200 nm in consideration of operation in the high frequency band, is preferably less than 100 nm in consideration of the balance with the thicknesses of the source electrode 12a and the drain electrode 12b when operating in the high frequency band, and is preferably less than 50 nm in consideration of obtaining the desired RF characteristics. The length of the extensions 13a, 13b may be 0 nm (the extensions 13a, 13b may not be present). ext This will be described in detail later (see FIG. 8).

[0029] Next, the manufacturing method of the diamond semiconductor element according to the embodiment 1 will be described with reference to the drawings. Fig. 4 to Fig. 6 are cross-sectional views showing steps in a schematic manner illustrating one example of the manufacturing method of the diamond semiconductor element according to the embodiment 1.

[0030] First, a diamond semiconductor layer 11 is formed on a diamond substrate 10 (see FIG. 4(A)). The diamond semiconductor layer 11 can be formed by chemical vapor deposition of diamond crystals on the diamond substrate 10 using hydrogen and methane gas as raw materials, for example, using a microwave plasma CVD device. The diamond semiconductor layer 11 thus formed has a hydrogen termination 11a on the (001) plane (upper surface).

[0031] Next, the Au film 12 is formed on the diamond semiconductor layer 11 (see FIG. 4(B)). The Au film 12 can be formed by depositing gold on the diamond semiconductor layer 11 by, for example, vapor deposition.

[0032] Next, a resist 20 is formed to cover the element region 2 on the Au film 12, and the Au film 12 is etched using the resist 20 as a mask until the diamond semiconductor layer 11 is exposed (see FIG. 4(C)). The resist 20 can be formed by, for example, a lithography method. The Au film 12 can be etched by, for example, using a wet etching agent.

[0033] Next, using the resist 20 as a mask, ozone treatment is performed to eliminate the hydrogen termination portion 11a in the region other than the element region 2 in the diamond semiconductor layer 11 (see FIG. 4(D)). As a result, the region other than the element region 2 in the diamond semiconductor layer 11 becomes highly resistive, and the elements can be electrically insulated from each other.

[0034] Next, the resist (20 in FIG. 4(D)) on the Au film 12 is removed (see FIG. 5(A)). The resist 20 can be removed, for example, with a resist remover or by ashing. After removing the resist 20, cleaning is performed.

[0035] Next, a resist 21 having openings 21a for forming a gate electrode and a source electrode / drain electrode is formed on the diamond semiconductor layer 11 including the Au film 12 (see FIG. 5(B)). The resist 21 can be formed by, for example, a lithography method.

[0036] Next, the Au film (12 in FIG. 5(B)) exposed from the opening 21a is etched using the resist 21 as a mask, and the Au film 12 is separated into the source electrode 12a and the drain electrode 12b by under-etching, and then the distance between the end faces of the source electrode 12a and the drain electrode 12b is made wider than the width of the opening 21a by side-etching (see FIG. 5(C)). The Au film 12 can be etched using, for example, a wet etching agent.

[0037] Next, the insulating layer 14 and the gate insulating film 14a are formed on the diamond semiconductor layer 11 including the resist 21, and then the metal layer 15 and the gate electrode 15a are formed on the insulating layer 14 and the gate insulating film 14a (see FIG. 6(A)). In other words, the gate electrode 15a is formed on the diamond semiconductor layer 11 in the region of the opening 21a of the resist 21 through the gate insulating film 14a by a self-alignment process. The insulating layer 14 and the gate insulating film 14a can be formed by, for example, the CVD method. The metal layer 15 and the gate electrode 15a can be formed by, for example, vapor deposition.

[0038] Next, the resist (21 in FIG. 6(A)) and the insulating layer (14 in FIG. 6(A)) and metal layer (15 in FIG. 6(A)) thereon are removed (see FIG. 6(B)). The resist 21 and the insulating layer 14 and metal layer 15 thereon can be removed by lifting off using, for example, a resist remover. After removing the resist 21, cleaning is performed.

[0039] Next, a resist 22 having openings 22a, 22b for forming an intermediate electrode layer and an upper electrode layer is formed on the diamond semiconductor layer 11 including the source electrode 12a and a part of the drain electrode 12b, and the gate electrode 15a, and a metal layer 16 and an intermediate electrode layer 16a, 16b are formed on the source electrode 12a and the drain electrode 12b including the resist 22, and then a metal layer 17 and an upper electrode layer 17a, 17b are formed on the metal layer 16 and the intermediate electrode layer 16a, 16b (see FIG. 6(C)). This allows the upper electrode layers 17a, 17b to be formed on the source electrode 12a and the drain electrode 12b in the region of the openings 22a, 22b of the resist 22 through the intermediate electrode layers 16a, 16b. The resist 22 can be formed, for example, by a lithography method. The metal layer 16 and the intermediate electrode layers 16a, 16b can be formed, for example, by vapor deposition. The metal layer 17 and the upper electrode layers 17a, 17b can be formed by, for example, vapor deposition.

[0040] Finally, the resist (22 in FIG. 6C) and the metal layer (16 in FIG. 6C) and the metal layer (17 in FIG. 6C) thereon are removed (see FIG. 1). The resist 22 and the metal layer 16 and the metal layer 17 thereon can be removed by lifting off using, for example, a resist remover. After removing the resist 22, cleaning is performed.

[0041] Next, the thickness of the source electrode 12a and the drain electrode 12b will be described with reference to the drawings. Figure 7 is an enlarged cross-sectional view of the drain electrode portion of the diamond semiconductor element during the formation of the drain electrode, (A) being the embodiment 1, and (B) being the comparative example.

[0042] The purpose of making each thickness of the source electrode (12a in FIG. 1) and the drain electrode 12b less than 100 nm is as follows. When forming the source electrode 12a and the drain electrode 12b, the Au layer (12 in FIG. 5(A)) is under-etched to separate the source electrode 12a and the drain electrode 12b, and then the end faces of the source electrode 12a and the drain electrode 12b are side-etched. When the end faces of the source electrode 12a and the drain electrode 12b are isotropically etched by wet etching, a sharp bird's beak 12c is formed on the etched end faces of the source electrode 12a and the drain electrode 12b at a portion close to the diamond semiconductor layer 11. The bird's beak 12c becomes a parasitic resistance. When the thickness T of the source electrode 12a and the drain electrode 12b is 100 nm or more, the bird's beak 12c becomes large as shown in FIG. 7(B). If there is a parasitic resistance due to a large bird's beak, desired characteristics cannot be obtained for the element performance such as electrical characteristics and high frequency characteristics. In addition, in the formation of the source electrode 12a and the drain electrode 12b, the tip of the bird's beak 12c needs to be separated to some extent from the region where the gate electrode 15a is formed. Then, the root part of the bird's beak 12c is located farther from the region where the gate electrode 15a is formed than the tip of the bird's beak 12c. The thicker the source electrode 12a and the drain electrode 12b are, the farther the root part of the bird's beak 12c is located from the region where the gate electrode 15a is formed. Therefore, in order to make it difficult for the bird's beak (parasitic resistance, shape, size, etc.) to be affected even if the element configuration is miniaturized, in the first embodiment, the thickness T of the source electrode 12a and the drain electrode 12b is set to less than 100 nm as shown in FIG. 7(A). In addition, by setting the thickness of the source electrode 12a and the drain electrode 12b to less than 100 nm, the position of each end face of the source electrode 12a and the drain electrode 12b can be precisely controlled. Furthermore, by setting the thickness T of the source electrode 12a and the drain electrode 12b to less than 50 nm, the movement of carriers becomes smoother, enabling high-speed switching operations, thereby improving frequency characteristics.Furthermore, when the diamond semiconductor element 1 is used as a sensor, noise can be suppressed by making the thickness T of the source electrode 12a and the drain electrode 12b less than 50 nm. This allows for detection of weak signals and highly sensitive measurement, which is advantageous in sensing fields such as medical diagnosis and environmental monitoring. Furthermore, making the thickness T of the source electrode 12a and the drain electrode 12b less than 50 nm shortens the etching time, reduces damage to the channel, and improves electrical characteristics. Furthermore, making the thickness T of the source electrode 12a and the drain electrode 12b less than 50 nm improves the resistance to bending of the diamond semiconductor element 1. This makes it possible to develop advanced devices, such as diamond semiconductor elements with curved surfaces. Furthermore, making the thickness T of the source electrode 12a and the drain electrode 12b less than 50 nm allows heat to be dissipated more efficiently from the source electrode 12a and the drain electrode 12b, improving energy efficiency. Furthermore, by setting the thickness T of the source electrode 12a and the drain electrode 12b to less than 50 nm, the manufacturing cost and the time required for manufacturing can be reduced.

[0043] Here, the cutoff frequency f T is generally expressed as the transconductance g m And the actually observed transconductance g m is the gate length L G However, if the intrinsic transconductance is g m0 The transconductance g m and the source-gate resistance R S As can be seen from the relationship between the source-gate resistance R and the gate resistance R S The effect of the source-gate resistance R becomes increasingly difficult to ignore and eventually reaches a plateau. S It is important to keep the source-gate distance L small by side etching. SG , source-drain distance L SDIn order to prevent an increase in the thickness, it is preferable that the thickness of the source electrode 12a and the drain electrode 12b is less than 50 nm.

[0044]

number

[0045] Next, the length L of the extensions 13a and 13b ext FIG. 8 shows the relationship between the extension length L ext 1 is a graph showing a schematic relationship between the cutoff frequency and

[0046] To improve the characteristics of FETs, including high frequency characteristics, it is necessary to reduce the source resistance. This requires the source-gate distance L SG It is necessary to shorten the length of the electrode 12a and the drain electrode 12b, and when a self-alignment process is used, it is necessary to ensure the accuracy of the position of the end faces of the source electrode 12a and the drain electrode 12b (see FIG. 1). To achieve this, it is necessary to reduce the thickness of each of the source electrode 12a and the drain electrode 12b. However, when the thickness of the source electrode 12a and the drain electrode 12b made of Au is reduced, the resistivity component increases, and the resistivity may become as high as 40 mΩcm at the maximum. This is 16,000 times the bulk resistivity, and when the thickness of Au is set to 50 nm, for example, a huge parasitic resistance of 8 kΩ / sq in sheet resistance occurs. When the sheet resistance increases due to such factors, it is necessary to reduce the length L of the extensions 13a and 13b at the same time as reducing the thickness of Au etched in the self-alignment process. ext needs to be shortened. As shown in the graph of Figure 8, the gate length L G Even if the length L of the extensions 13a and 13b is reduced, the performance is improved. ext The cutoff frequency f T In order to manufacture a high-frequency element with a frequency of less than 50 GHz, the length L of the extensions 13a and 13b is ext It is important to make the length L of the extensions 13a and 13b less than 200 nm. Considering that there may be other performance-suppressing factors, extIt is more preferable to set the length L of the extensions 13a and 13b to less than 100 nm. ext It is necessary to keep the thickness below 50 nm.

[0047] Next, the measurement of electrical characteristics and durability test of the sample of the diamond semiconductor element according to the embodiment 1 will be described with reference to the drawings. Fig. 9 is a cross-sectional view showing the structure of the sample used for the measurement of electrical characteristics and durability test. Fig. 10 is a graph showing the electrical characteristics of the sample.

[0048] A sample of the electrode structure of the diamond semiconductor element according to the first embodiment (see FIG. 9) was obtained as follows. First, a diamond semiconductor layer 11 (100 nm thick) having a hydrogen termination 11a was formed (CVD method) on a diamond substrate 10 (4 mm×4 mm×0.5 mm). Next, an Au film (90 nm thick) was formed on the hydrogen termination 11a (electron beam vacuum deposition apparatus: NPF023 manufactured by Eiko Engineering Co., Ltd. was used, deposition temperature was 100° C. or less), a resist (200 μm square) for forming an Au electrode was formed on the Au film, the Au film was etched using the resist for forming the Au electrode as a mask, and the resist for forming the Au electrode was removed to form an Au electrode 12d. Next, a resist having openings (180 μm square) for forming an intermediate electrode layer and an upper electrode layer was formed on the hydrogen termination portion 11a including the Au electrode 12d, and a metal layer (Ti, thickness 20 nm) for the intermediate electrode layer 16a was formed on the Au electrode 12d including the resist (electron beam vacuum deposition apparatus: NPF023 manufactured by Eiko Engineering Co., Ltd. was used, deposition temperature 100° C. or less). Subsequently, a metal layer (Au, thickness 300 nm) for the upper electrode layer 17a was formed on the metal layer for the intermediate electrode layer 16a (electron beam vacuum deposition apparatus: NPF023 manufactured by Eiko Engineering Co., Ltd. was used, deposition temperature 100° C. or less). The resist and the metal layer for the intermediate electrode layer 16a and the metal layer for the upper electrode layer 17a located thereon were lifted off to form the intermediate electrode layer 16a and the upper electrode layer 17a, thereby obtaining a sample. The thickness and length were measured using a scanning electron microscope (Hitachi High-Technologies: S-4800) and a stylus step gauge (KLA-Tencor: Alpha-Step IQ) as a supplementary measurement. Electrical properties were measured using a prober (Hybridge: ultra-high vacuum microprober: HUMP-100) and a semiconductor parameter analyzer (Agilent: B1505A).

[0049] In the measurement of electrical characteristics, a short circuit was performed with two probe needles in contact with the upper electrode layer 17a, and the resistance value was measured. The resistance value including the tendency of the measurement system was less than 6Ω.

[0050] In durability tests, the above electrical characteristics were measured more than 10 times, and the probe core was reapplied each time to confirm that no peeling of the electrode occurred (checked with the above scanning electron microscope) and no deterioration of the electrical characteristics occurred (deviation from the initial values ​​of the above electrical characteristics was within 10%).No peeling of the electrode was observed, and no deterioration of the electrical characteristics occurred.

[0051] As described above, it was confirmed that the electrode structure actually fabricated has excellent electrical properties and durability, and works well when used as an electrode for FET.

[0052] According to the first embodiment, the thickness of the electrodes (source electrode 12a and drain electrode 12b in FIG. 1) made of Au (gold) that are in ohmic contact with the diamond semiconductor layer 11 is set to less than 100 nm, so that it is possible to minimize the effect of bird's beaks (12c in FIG. 7) that occur at the ends of the electrodes due to etching. This contributes to obtaining desired characteristics such as electrical characteristics and high frequency characteristics while ensuring yield, reliability, and adhesion between the gold and the diamond semiconductor layer even when miniaturized.

[0053] Furthermore, according to the first embodiment, the thickness of the source electrode 12a and the drain electrode 12b is set to less than 100 nm, so that the size can be precisely controlled and desired performance can be obtained.

[0054] Furthermore, according to the first embodiment, by forming the upper electrode layers 17a and 17b on the source electrode 12a and the drain electrode 12b, the source electrode 12a and the drain electrode 12b can be protected and the electrodes can be prevented from peeling off.

[0055] In addition, according to the first embodiment, by interposing the intermediate electrode layers 16a, 16b between the source electrode 12a, the drain electrode 12b and the upper electrode layers 17a, 17b, it is possible to improve the adhesion between the source electrode 12a, the drain electrode 12b and the upper electrode layers 17a, 17b.

[0056] Furthermore, according to embodiment 1, the upper electrode layers 17a, 17b are thicker than the source electrode 12a and the drain electrode 12b, so that peeling of the source electrode 12a and the drain electrode 12b due to physical influences (heat, ultrasonic waves) during bonding can be prevented.

[0057] Furthermore, according to embodiment 1, even if the diamond substrate 10 is small and difficult to handle, the self-alignment process can ensure yield, reliability, and adhesion between the gold and the diamond semiconductor layer, while providing a high-performance element that operates stably even in harsh environments such as a high-temperature environment of 400°C, a high-voltage environment of 500V, and a radiation environment.

[0058] [Form 2] The diamond semiconductor element according to the second embodiment will be described with reference to the drawings. Fig. 11 is a cross-sectional view showing a schematic example of the configuration of the diamond semiconductor element according to the second embodiment.

[0059] The diamond semiconductor element 1 has an electrode structure in which an Au electrode 12d made of Au and having a thickness of less than 100 nm is disposed on a part of the diamond semiconductor layer 11 so as to be in ohmic contact with the diamond semiconductor layer 11.

[0060] According to the second embodiment, the thickness of the Au electrode 12d that forms an ohmic contact on the diamond semiconductor layer 11 is less than 100 nm, so that the effect of bird's beaks that occur at the end of the electrode due to etching can be minimized. Even when miniaturized, this contributes to obtaining desired characteristics such as electrical characteristics and high frequency characteristics while ensuring yield, reliability, and adhesion between gold and the diamond semiconductor layer.

[0061] A part or all of the above-described embodiments may be described as, but is not limited to, the following supplementary notes.

[0062] [Appendix 1] A diamond semiconductor element comprising an electrode structure in which an Au electrode made of Au and having a thickness of less than 100 nm is disposed on a portion of a diamond semiconductor layer so as to be in ohmic contact with the diamond semiconductor layer. [Appendix 2] 2. The diamond semiconductor element according to claim 1, wherein the thickness of the Au electrode is less than 50 nm. [Appendix 3] 3. The diamond semiconductor element according to claim 1 or 2, wherein the end face of the Au electrode is a surface formed by wet etching. [Appendix 4] The diamond semiconductor element according to any one of claims 1 to 3, wherein the diamond semiconductor layer is made of hydrogen-terminated diamond. [Appendix 5] A diamond semiconductor element described in any one of appendix 1 to 4, wherein a metal electrode layer made of a metal having a thickness of 300 nm or more is arranged on a part of the Au electrode so as to be in contact with the Au electrode. [Appendix 6] The metal electrode layer has a configuration in which an intermediate electrode layer and an upper electrode layer are laminated in this order from the Au electrode side, the upper electrode layer is made of any one of Au, Ru, Al, Ti, Mo, Cu, Cr, Pb, Zn, and Pt; The intermediate electrode layer is made of a metal selected from Ru, Al, Ti, Mo, Cu, Cr, Pb, Zn, and Pt, which is different from the Au electrode and the upper electrode layer. 6. The diamond semiconductor element according to claim 5. [Appendix 7] 6. The diamond semiconductor element according to claim 5, wherein the metal electrode layer is made of any one of Ru, Al, Ti, Mo, Cu, Cr, Pb, Zn, and Pt. [Appendix 8] the Au electrode has an extension portion extending beyond an end surface of the metal electrode layer, 6. A diamond semiconductor element according to claim 5, wherein the length from an end face of the metal electrode layer to an end face of the extension is less than 200 nm. [Appendix 9] 9. The diamond semiconductor element according to claim 8, wherein the length from an end face of the metal electrode layer to an end face of the extension is less than 100 nm. [Appendix 10] 10. The diamond semiconductor element according to claim 9, wherein the length from an end face of the metal electrode layer to an end face of the extension is less than 50 nm. [Appendix 11] The hydrogen-terminated diamond has an element region including the Au electrode, and is configured to have a hydrogen termination portion in the element region and not have a hydrogen termination portion in a region other than the element region, as described in appendix 4. [Appendix 12] 6. The diamond semiconductor element according to claim 5, wherein the metal electrode layer is configured so as not to protrude from the upper surface of the Au electrode. [Appendix 13] The Au electrodes are a source electrode and a drain electrode, The diamond semiconductor element is configured such that a gate electrode is disposed on a part of the diamond semiconductor layer between the source electrode and the drain electrode, the gate electrode being spaced apart from the source electrode and the drain electrode. A diamond semiconductor element according to any one of claims 1 to 12. [Appendix 14] The diamond semiconductor element according to claim 13, wherein the gate electrode is disposed on a portion of the diamond semiconductor layer between the source electrode and the drain electrode via a gate insulating film. [Appendix 15] The diamond semiconductor element described in Appendix 14, wherein the gate insulating film is composed of a single layer structure or a layered structure of any combination of Al2O3, SiO2, CaF2, HfO2, AlN, BN, Si3N4, SiON, Ta2O5, TiO2, WO3, LaF3, and MgF2. [Appendix 16] The diamond semiconductor element according to claim 13, wherein the gate electrode is in ohmic contact with the diamond semiconductor layer. [Appendix 17] 14. The diamond semiconductor element of claim 13, wherein the distance between the source electrode and the drain electrode is less than 100 nm. [Appendix 18] An electrical device comprising a diamond semiconductor element according to any one of appendixes 1 to 17. [Appendix 19] forming an Au film having a thickness of less than 100 nm on the diamond semiconductor layer; forming a resist on a part of the Au film, and wet-etching the Au film using the resist as a mask to form an Au electrode; A method for manufacturing a diamond semiconductor element, comprising: [Appendix 20] forming the diamond semiconductor layer on a diamond substrate; 20. The method for producing a diamond semiconductor element according to claim 19, wherein after the diamond semiconductor layer is formed and before the Au film is formed, no etching is performed.

[0063] The disclosures of the above patent documents and non-patent documents are incorporated herein by reference and may be used as the basis or part of the present invention as necessary. Within the framework of the entire disclosure of the present invention (including the claims and drawings), and further based on the basic technical idea, modifications and adjustments of the embodiments and examples are possible. Furthermore, within the framework of the entire disclosure of the present invention, various combinations or selections (or non-selection as necessary) of various disclosed elements (including each element of each claim, each element of each embodiment or example, each element of each drawing, etc.) are possible. In other words, the present invention naturally includes various modifications and corrections that a person skilled in the art would be able to make according to the entire disclosure and technical idea, including the claims and drawings. Furthermore, with regard to the numerical values ​​and numerical ranges described in this application, any intermediate value, lower numerical value, and small range are deemed to be described even if not specified. Furthermore, the disclosures of the above cited documents may be used in part or in whole in combination with the descriptions in this document as part of the disclosure of the present invention as necessary, in accordance with the spirit of the present invention, and are deemed to be included (belong) to the disclosures of this application. [Explanation of symbols]

[0064] 1 Diamond semiconductor element 2. Element Area 10 Diamond Substrate 11 Diamond semiconductor layer 11a Hydrogen termination 12 Au layer 12a Source electrode (Au electrode) 12b Drain electrode (Au electrode) 12c Bird's Beak 12d Au electrode 13a, 13b extension part 14 Insulating layer 14a Gate insulating film 15 metal layer 15a Gate electrode 16 metal layer 16a, 16b Intermediate electrode layer (metal electrode layer) 17 Metal layer 17a, 17b Upper electrode layer (metal electrode layer) 20, 21, 22 Resist 21a, 22a, 22b opening

Claims

1. A diamond semiconductor element comprising an electrode structure in which an Au electrode made of Au and having a thickness of less than 100 nm is disposed on a portion of a diamond semiconductor layer so as to be in ohmic contact with the diamond semiconductor layer.

2. The diamond semiconductor element according to claim 1, wherein the thickness of the Au electrode is less than 50 nm.

3. The diamond semiconductor element according to claim 1, wherein the end face of the Au electrode is a surface formed by wet etching.

4. The diamond semiconductor element according to claim 1 , wherein the diamond semiconductor layer is made of hydrogen-terminated diamond.

5. 2. The diamond semiconductor element according to claim 1, wherein a metal electrode layer made of a metal having a thickness of 300 nm or more is disposed on a part of the Au electrode so as to be in contact with the Au electrode.

6. The metal electrode layer has a configuration in which an intermediate electrode layer and an upper electrode layer are laminated in this order from the Au electrode side, the upper electrode layer is made of any one of Au, Ru, Al, Ti, Mo, Cu, Cr, Pb, Zn, and Pt; The intermediate electrode layer is made of a metal selected from Ru, Al, Ti, Mo, Cu, Cr, Pb, Zn, and Pt, which is different from the Au electrode and the upper electrode layer. The diamond semiconductor element according to claim 5.

7. The diamond semiconductor element according to claim 5, wherein the metal electrode layer is made of any one of Ru, Al, Ti, Mo, Cu, Cr, Pb, Zn, and Pt.

8. the Au electrode has an extension portion extending beyond an end surface of the metal electrode layer, The diamond semiconductor element according to claim 5, wherein the length from an end face of the metal electrode layer to an end face of the extension is less than 200 nm.

9. The diamond semiconductor element according to claim 8, wherein the length from an end face of the metal electrode layer to an end face of the extension is less than 100 nm.

10. The diamond semiconductor element according to claim 9, wherein the length from an end face of the metal electrode layer to an end face of the extension is less than 50 nm.

11. The hydrogen-terminated diamond has an element region including the Au electrode, and is configured to have a hydrogen termination in the element region and not have a hydrogen termination in a region other than the element region. The diamond semiconductor element according to claim 4.

12. The diamond semiconductor element according to claim 5 , wherein the metal electrode layer is configured so as not to protrude from the upper surface of the Au electrode.

13. The Au electrodes are a source electrode and a drain electrode, The diamond semiconductor element is configured such that a gate electrode is disposed on a part of the diamond semiconductor layer between the source electrode and the drain electrode, the gate electrode being spaced apart from the source electrode and the drain electrode. The diamond semiconductor element according to claim 1.

14. The diamond semiconductor element according to claim 13, wherein the gate electrode is disposed on a portion of the diamond semiconductor layer between the source electrode and the drain electrode via a gate insulating film.

15. The gate insulating film is made of Al ２ O ３ , SiO ２ , CaF ２ , HfO ２ , AlN, BN, Si ３ N ４ , SiON, Ta ２ O ５ , TiO ２ , W.O. ３ , LaF ３ , and MgF ２ 15. The diamond semiconductor element according to claim 14, which has a single layer structure or a laminate structure of any combination of the above.

16. The diamond semiconductor element according to claim 13, wherein the gate electrode is in ohmic contact with the diamond semiconductor layer.

17. The diamond semiconductor element according to claim 13, wherein the distance between the source electrode and the drain electrode is less than 100 nm.

18. An electrical device comprising a diamond semiconductor element according to any one of claims 1 to 17.

19. forming an Au film having a thickness of less than 100 nm on the diamond semiconductor layer; forming a resist on a part of the Au film, and wet-etching the Au film using the resist as a mask to form an Au electrode; A method for manufacturing a diamond semiconductor element, comprising:

20. forming the diamond semiconductor layer on a diamond substrate; The method for producing a diamond semiconductor element according to claim 19, wherein etching is not performed after the diamond semiconductor layer is formed and before the Au film is formed.

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