Semiconductor device

Abstract

To provide a semiconductor device having favorable electrical characteristics.SOLUTION: In a semiconductor device, a transistor 200 has: a first conductor 205 and a second insulator 216 on a first insulator 214; a third insulator 222 on the first conductor and the second insulator; a fourth insulator 224 on the third insulator; a first oxide 230a on the fourth insulator; a second oxide 230b and a third oxide 230c on the first oxide; second conductors 242a and 242b that come into contact with a top face of the third insulator, a side face of the fourth insulator, a side face of the first oxide, a side face of the second oxide, and a side face and a top face of the third oxide; fourth oxides 243a and 243b on the second oxide; a fifth insulator 250 on the fourth oxide; and a fourth conductor 260 on the fifth insulator. A capacitative element 100 has a fifth conductor 204 on the first insulator, the third insulator on the fifth conductor, and the second conductor 242a on the third insulator.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a semiconductor device and a manufacturing method of the semiconductor device. One aspect of the invention relates to a semiconductor wafer, a module, and an electronic device.

[0002] In this specification and the like, a semiconductor device refers to a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. device, lighting device, electro-optical device, power storage device, memory device, semiconductor circuit, imaging device, and There are cases where the child devices and the like can be said to have semiconductor devices.

[0003] Note that one embodiment of the present invention is not limited to the above technical fields. An aspect of the present invention relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. This concerns the issue of the [Background technology]

[0004] In recent years, the development of semiconductor devices has progressed, and LSIs, CPUs, and memories are mainly used. A CPU is a semiconductor integrated circuit (at least transistors and It is an assembly of semiconductor elements having a memory and on which electrodes that serve as connection terminals are formed.

[0005] Semiconductor circuits (IC chips) such as LSI, CPU, and memory are mounted on circuit boards, such as printed circuit boards. They are mounted on printed wiring boards and used as components in a variety of electronic devices.

[0006] In addition, a transistor is formed using a semiconductor thin film formed on a substrate having an insulating surface. This technology is attracting attention. The transistor is used in integrated circuits (ICs) and image display devices (simply called displays). It is widely used in electronic devices such as transistors. Silicon-based semiconductor materials are widely known as semiconductor thin films that can be used for this purpose, but other materials include Oxide semiconductors are attracting attention.

[0007] In addition, a transistor including an oxide semiconductor has a very low leakage current in a non-conducting state. For example, the leakage current of a transistor using an oxide semiconductor is known to be small. A low-power CPU that utilizes this characteristic has been disclosed (see Patent Document 1). In addition, for example, the leakage current of a transistor using an oxide semiconductor is low. The application of this technology has led to the disclosure of a storage device that can retain stored contents for a long period of time. (See Patent Document 2.)

[0008] In recent years, with the trend towards smaller and lighter electronic devices, there is a demand for even higher density integrated circuits. There is also a demand for improved productivity in the manufacture of semiconductor devices including integrated circuits. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] JP 2012-257187 A [Patent Document 2] JP 2011-151383 A Summary of the Invention [Problem to be solved by the invention]

[0010] An object of one embodiment of the present invention is to provide a semiconductor device having favorable electrical characteristics. Another embodiment of the present invention provides a semiconductor device having normally-off electrical characteristics. Another object of one embodiment of the present invention is to provide a highly reliable semiconductor device. Another object of one embodiment of the present invention is to provide a semiconductor having a large on-state current. Another object of the present invention is to provide a semiconductor device having high frequency characteristics. Another object of the present invention is to provide a semiconductor device having a micro Another object of the present invention is to provide a semiconductor device that can be easily fabricated or highly integrated. An object of one embodiment of the present invention is to provide a semiconductor device with high productivity.

[0011] One embodiment of the present invention is to provide a semiconductor device capable of retaining data for a long period of time. One object of one embodiment of the present invention is to provide a semiconductor device in which data can be written at a high speed. One object of one embodiment of the present invention is to provide a semiconductor device having high design freedom. One object of one embodiment of the present invention is to provide a semiconductor device capable of reducing power consumption. One object of the present invention is to provide a novel semiconductor device. is one of the challenges.

[0012] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc. [Means for solving the problem]

[0013] One embodiment of the present invention is a semiconductor device having an oxide in a channel formation region, The device includes a transistor and a capacitance element, the transistor being a first insulator on a first insulating material. a conductor and a second insulator, and a third insulator on the first conductor and on the second insulator; a fourth insulator on the third insulator, a first oxide on the fourth insulator, and a second oxide on the first oxide. The second oxide and the third oxide, the top surface of the third insulator, the side surface of the fourth insulator, the first a second conductor in contact with the side of the oxide, the side of the second oxide, and the top surface of the second oxide; , the top surface of the third insulator, the side surface of the fourth insulator, the side surface of the first oxide, and the side surface of the third oxide. a third conductor in contact with the top surface of the third oxide; and a fourth oxide on the first oxide. a fifth insulator on the fourth oxide, and a fourth conductor on the fifth insulator, The child has a fifth conductor on the first insulator, a third insulator on the fifth conductor, and a third insulator on the third conductor. and a second conductor on the body.

[0014] The first to third oxides each include In and an element M (M is Al, Ga, Y, or Sn). , and Zn.

[0015] The third insulator is made of aluminum, hafnium, zirconium, or tantalum. It is preferred to include one of the following:

[0016] The first insulator preferably contains silicon and nitrogen. Effect of the Invention

[0017] According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to another embodiment of the present invention, a semiconductor device having normally-off electrical characteristics is provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device having a large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device having high frequency characteristics can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device having high productivity can be provided. An apparatus can be provided.

[0018] Alternatively, a semiconductor device capable of retaining data for a long period of time can be provided. Alternatively, a semiconductor device with a high data writing speed can be provided. It is possible to provide a semiconductor device having a high degree of freedom. It is possible to provide a semiconductor device. Alternatively, it is possible to provide a novel semiconductor device. .

[0019] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these are described in the specification. The above will become apparent from the description, drawings, claims, etc. From the above description, it is possible to extract other effects. [Brief description of the drawings]

[0020] [Figure 1] Fig. 1(A) is a top view showing a configuration example of a semiconductor device, and Figs. 1(B), 1(C), and 1(D) are cross-sectional views showing the configuration example of a semiconductor device. [Diagram 2]Fig. 2(A) is a top view showing a configuration example of a semiconductor device, and Figs. 2(B), 2(C), and 2(D) are cross-sectional views showing the configuration example of a semiconductor device. [Diagram 3] Fig. 3(A) is a top view showing a configuration example of a semiconductor device, and Figs. 3(B), 3(C), and 3(D) are cross-sectional views showing the configuration example of a semiconductor device. [Figure 4] 4A is a top view illustrating a method for manufacturing a semiconductor device, and FIGS. 4B, 4C, and 4D are cross-sectional views illustrating the method for manufacturing a semiconductor device. [Diagram 5] Fig. 5(A) is a top view illustrating a method for manufacturing a semiconductor device, and Figs. 5(B), 5(C), and 5(D) are cross-sectional views illustrating the method for manufacturing a semiconductor device. [Figure 6] Fig. 6A is a top view illustrating a method for manufacturing a semiconductor device, and Figs. 6B, 6C, and 6D are cross-sectional views illustrating the method for manufacturing a semiconductor device. [Figure 7] 7A is a top view illustrating a method for manufacturing a semiconductor device, and FIGS. 7B, 7C, and 7D are cross-sectional views illustrating the method for manufacturing a semiconductor device. [Figure 8] 8A is a top view illustrating a method for manufacturing a semiconductor device, and FIGS. 8B, 8C, and 8D are cross-sectional views illustrating the method for manufacturing a semiconductor device. [Figure 9] 9A is a top view illustrating a method for manufacturing a semiconductor device, and FIGS. 9B, 9C, and 9D are cross-sectional views illustrating the method for manufacturing a semiconductor device. [Figure 10] Fig. 10(A) is a top view illustrating a method for manufacturing a semiconductor device, and Figs. 10(B), 10(C), and 10(D) are cross-sectional views illustrating the method for manufacturing a semiconductor device. [Figure 11] Fig. 11A is a top view illustrating a method for manufacturing a semiconductor device, and Figs. 11B, 11C, and 11D are cross-sectional views illustrating the method for manufacturing a semiconductor device. [Figure 12] Fig. 12A is a top view illustrating a method for manufacturing a semiconductor device, and Figs. 12B, 12C, and 12D are cross-sectional views illustrating the method for manufacturing a semiconductor device. [Figure 13]Fig. 13A is a top view illustrating a method for manufacturing a semiconductor device, and Figs. 13B, 13C, and 13D are cross-sectional views illustrating the method for manufacturing a semiconductor device. [Figure 14] Fig. 14A is a top view illustrating a method for manufacturing a semiconductor device, and Figs. 14B, 14C, and 14D are cross-sectional views illustrating the method for manufacturing a semiconductor device. [Figure 15] Fig. 15(A) is a diagram explaining the classification of IGZO crystal structures, Fig. 15(B) is a diagram explaining the XRD spectrum of quartz glass, and Fig. 15(C) is a diagram explaining the XRD spectrum of crystalline IGZO. [Figure 16] FIG. 16 is a cross-sectional view showing a configuration example of a semiconductor device. [Figure 17] FIG. 17 is a cross-sectional view showing a configuration example of a semiconductor device. [Figure 18] FIG. 18 is a cross-sectional view showing a configuration example of a semiconductor device. [Figure 19] FIG. 19 is a cross-sectional view showing an example of the configuration of a storage device. [Figure 20] FIG. 20 is a cross-sectional view showing an example of the configuration of a storage device. [Figure 21] FIG. 21 is a diagram showing various storage devices by hierarchy. [Figure 22] Fig. 22(A) is a block diagram showing a configuration example of a storage device, and Fig. 22(B) is a perspective view showing a configuration example of a storage device. [Figure 23] 23A, 23B, and 23C are circuit diagrams showing configuration examples of a memory device. [Figure 24] 24(A) and (B) are diagrams illustrating an example of an electronic component. [Diagram 25] 25(A), (B), (C), (D), and (E) are schematic diagrams showing configuration examples of a storage device. [Figure 26] 26(A), (B), (C), (D), (E1), (E2), and (F) are diagrams showing electronic devices. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0021] Hereinafter, the embodiments will be described with reference to the drawings. It is understood that the present invention can be practiced in many different ways without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various changes in form and details may be made. Therefore, the present invention should not be construed as being limited to the description of the following embodiment modes.

[0022] In the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The examples are shown in schematic form, and are not limited to the shapes or values ​​shown in the drawings. For example, In the actual manufacturing process, layers and resist masks are damaged by etching and other processes. However, in order to make it easier to understand, this is not reflected in the diagram. In the drawings, the same parts or parts having similar functions are designated by the same reference numerals in different drawings. In addition, when referring to similar functions, In such cases, the hatch patterns may be the same and no particular reference numbers may be used.

[0023] In addition, in particular in top views (also called "plan views") and perspective views, etc., the invention is easily understood. In order to simplify the illustration, some of the components may be omitted. may be omitted.

[0024] In addition, in this specification, ordinal numbers such as 1st, 2nd, etc. are used for convenience. It does not indicate the order of processes or stacking. For example, "first" may be changed to "second "the" or "third" can be used as appropriate. The ordinal numbers described herein may not coincide with the ordinal numbers used to identify an aspect of the present invention. There are cases where this is the case.

[0025] In addition, in this specification, the terms "above" and "below" that indicate an arrangement are used to refer to the relationship between components. The positional relationship is used for convenience in describing the drawings. The relationship changes depending on the direction in which each component is depicted. The terms are not limited to those described above, and may be rephrased appropriately depending on the situation.

[0026] For example, in the present specification, it is explicitly stated that X and Y are connected. The cases are when X and Y are electrically connected and when X and Y are functionally connected. The case where X and Y are directly connected and the case where X and Y are directly connected are disclosed in the present specification, etc. Therefore, the connection relationship is limited to a specific one, for example, the connection relationship shown in the figure or text. Connections other than those shown in the drawings or text are also disclosed in the drawings or text. It shall be so.

[0027] Here, X and Y are the objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layer, etc.).

[0028] In addition, the functions of the source and drain may differ depending on whether transistors of different polarities are used or the circuit In operation, when the direction of the current changes, the positions may be reversed. In the specification, the terms source and drain may be used interchangeably. do.

[0029] In this specification and the like, depending on the structure of the transistor, the channel may not actually be formed. The channel width in the region where the semiconductor device is to be formed (channel formation region) (hereinafter referred to as the "effective channel width") The channel width shown in a top view of a transistor (hereinafter referred to as the apparent channel width) is For example, if the gate covers the side of the semiconductor, , the effective channel width becomes larger than the apparent channel width, and the effect of this becomes negligible. For example, in a miniature transistor where the gate covers the side of the semiconductor, There are cases where the proportion of the channel formation region formed on the side of the semiconductor increases. In that case, , the effective channel width is larger than the apparent channel width.

[0030] In such cases, it may be difficult to estimate the effective channel width through actual measurements. For example, to estimate the effective channel width from the design value, the shape of the semiconductor must be known. Therefore, if the shape of the semiconductor is not known accurately, Channel width is difficult to measure accurately.

[0031] In this specification, when the term "channel width" is used, it refers to the apparent channel width. In this specification, when the term "channel width" is used, it means an effective channel The channel length, channel width, effective channel width, apparent channel width, etc. The channel width and other parameters can be determined by analyzing cross-sectional TEM images, etc. can.

[0032] The impurities in a semiconductor are, for example, substances other than the main components that make up the semiconductor. Elements with a concentration of less than 0.1 atomic percent can be considered impurities. For example, The DOS (Density of States) of the semiconductor increases and the crystallinity decreases. When the semiconductor is an oxide semiconductor, the semiconductor characteristics may be deteriorated. The impurities to be changed include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, These include elements, Group 15 elements, and transition metals other than the main components of oxide semiconductors, for example: Hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen, etc. Oxides In the case of a semiconductor, water may also function as an impurity. In some cases, oxygen vacancies may be formed due to the inclusion of impurities. In this case, impurities that change the properties of a semiconductor include, for example, oxygen and Group 1 elements excluding hydrogen. , Group 2 elements, Group 13 elements, Group 15 elements, etc.

[0033] In this specification and the like, silicon oxynitride refers to a material having a composition containing more oxygen than nitrogen. Silicon nitride oxide is a material that contains more oxygen than silicon. It has a high nitrogen content.

[0034] In addition, in this specification, the term "insulator" may be replaced with "insulating film" or "insulating layer." In addition, the term "conductor" can be replaced with "conductive film" or "conductive layer." In addition, the term "semiconductor" can be replaced with "semiconductor film" or "semiconductor layer." can.

[0035] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10 degrees or more and 10 degrees or less. Therefore, it includes the case where the angle is between -5 degrees and 5 degrees. "Almost parallel" means that the two straight lines are arranged at an angle of -30 degrees or more and 30 degrees or less. "Perpendicular" means that two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, it includes the case where the angle is between 85 degrees and 95 degrees. " refers to a state in which two straight lines are arranged at an angle of 60 degrees or more and 120 degrees or less.

[0036] In this specification, the term "barrier film" refers to a film that prevents impurities such as water and hydrogen from passing through, and oxygen. If the barrier film is conductive, it is called a conductive barrier. It is sometimes called the a membrane.

[0037] In this specification, the term "metal oxide" refers to metals in a broad sense. Metal oxides are oxide insulators and oxide conductors (including transparent oxide conductors). ), oxide semiconductor (also called oxide semiconductor or simply OS) For example, when a metal oxide is used in the semiconductor layer of a transistor, the Metal oxides are sometimes called oxide semiconductors. In the case of a transistor, a transistor having an oxide or an oxide semiconductor is used. In other words:

[0038] In this specification and the like, normally off means that no potential is applied to the gate, or The current per 1 μm of channel width that flows through a transistor when a ground potential is applied to the gate At room temperature, -20 A or less, 1×10 at 85℃ -18 A or below, or 1×10 at 125℃ -16 This means that it is A or lower.

[0039] (Embodiment 1) Hereinafter, a semiconductor device including a transistor 200 and a capacitor 100 according to one embodiment of the present invention will be described. An example of a semiconductor device and a method for fabricating the same will now be described.

[0040] <Example of semiconductor device configuration> 1(A), 1(B), 1(C), and 1(D) show a transmission electron microscope according to one embodiment of the present invention. 1A and 1B are a top view and a cross-sectional view of a semiconductor device having a transistor 200 and a capacitor element 100. do.

[0041] FIG. 1A is a top view of a semiconductor device including a transistor 200 and a capacitor 100. 1B, 1C, and 1D are cross-sectional views of the semiconductor device. Here, FIG. 1(B) is a cross-sectional view of the portion indicated by the dashed line A1-A2 in FIG. 1(A). 1 is a cross-sectional view of a transistor 200 and a capacitor 100 in the channel length direction. FIG. 1(C) is a cross-sectional view of the portion indicated by the dashed line A3-A4 in FIG. 1(A). 1(D) is also a cross-sectional view of the transistor 200 in the channel width direction. FIG. 1A is a cross-sectional view of a portion indicated by a dashed line A5-A6 in the channel width direction of the capacitive element 100. In addition, in the top view of FIG. 1(A), some elements are omitted for clarity. It is omitted.

[0042] The semiconductor device according to one embodiment of the present invention includes an insulator 214 on a substrate (not shown), The transistor 200 and the capacitor 100 on the upper side, An insulator 280 on the substrate 100, an insulator 282 on the insulator 280, and an insulator on the insulator 282. 283, an insulator 284 on the insulator 283, and an insulator 274 on the insulator 284. The insulators 214, 216, 280, 282, 283, and The insulator 274 functions as an interlayer film. The conductor 240 functions as a plug. An insulator 241 is provided in contact with the side surface of the conductor 240. A conductor 246 is provided on the upper surface of the substrate 210, electrically connected to the conductor 240 and functioning as wiring. Furthermore, an insulator 284 is provided on the conductor 246 and on the insulator 283.

[0043] Also, the insulators 272, 273, 280, 282, and 28 An insulator 241 is provided in contact with the inner wall of the third opening, and the first conductive member 240 is provided in contact with the side surface of the insulator 241. A first conductor is provided, and a second conductor, conductor 240, is provided further inside. Thus, the height of the upper surface of the conductor 240 and the height of the upper surface of the insulator 283 can be made approximately the same. In the transistor 200, the first conductor of the conductor 240 and the second conductor of the conductor 240 Although a configuration in which the conductive bodies are stacked is shown, the present invention is not limited to this. For example, the conductor 240 may be provided as a single layer or a laminated structure of three or more layers. When the structure has a layered structure, the layers may be distinguished by giving them ordinal numbers in the order of formation.

[0044] [Transistor 200] As shown in FIG. 1B, the transistor 200 includes an insulator 216 on an insulator 214, The conductors 205 (conductors 205a and 205b) are disposed so as to be embedded in the insulator 216. conductor 205b), insulator 222 on insulator 216 and on conductor 205, and insulator 2 22, an insulator 224, an oxide 230a on the insulator 224, and an oxide 230a on the oxide 230a. The oxide 230b, the oxide 243a and the oxide 243b on the oxide 230b, and the insulator 22 2, the side of the insulator 224, the side of the oxide 230a, the side of the oxide 230b, The conductor 242a contacts the side surface of the oxide 243a and the top surface of the oxide 243a, and the insulator 222 the top surface of the insulator 224, the side of the oxide 230a, the side of the oxide 230b, The conductor 242b contacting the side of the oxide 243b and the top surface of the oxide 243b, and the insulator 222 The upper surface, the side surface of the conductor 242a, the upper surface of the conductor 242a, the side surface of the conductor 242b, and the conductor An insulator 272 in contact with the upper surface of the conductive member 242b, and an insulator 273 on the insulator 272. , an oxide 230c on the oxide 230b, an insulator 250 on the oxide 230c, and an insulator 2 50 and overlapping the oxide 230c. 260b). The oxide 230c is formed on the side of the oxide 243a and the oxide 24 3b, a side of the conductor 242a, a side of the conductor 242b, a side of the insulator 272, and The conductor 260 is in contact with the side surfaces of the conductor 260a and the insulator 273. 260b, and the conductor 260a is disposed so as to surround the bottom and side surfaces of the conductor 260b. Here, as shown in FIG. 1B, the upper surface of the conductor 260 is in contact with the upper surface of the insulator 250. The insulator 282 is disposed so as to be substantially flush with the upper surface of the conductor 26. 0, insulator 250, oxide 230c, and insulator 280.

[0045] In the following, the oxide 243a and the oxide 243b are collectively referred to as the oxide 243. In addition, the conductor 242a and the conductor 242b may be collectively referred to as the conductor 242. There is.

[0046] In transistor 200, conductor 260 serves as the gate of the transistor. The conductor 242a and the conductor 242b serve as a source electrode and a drain electrode, respectively. The transistor 200 has a conductor 260 that functions as a gate and an insulator 280. , insulator 273, insulator 272, conductor 242, and oxide 243. The conductor 260 is formed in a self-aligned manner to fill the opening. Thus, the conductor 260 is aligned in the region between the conductors 242a and 242b. It can be positioned reliably without any hassle.

[0047] In addition, the insulator 214, the insulator 222, the insulator 272, the insulator 273, the insulator 282, and At least one of the insulators 282 and 283 is made of hydrogen (e.g., hydrogen atoms, hydrogen molecules, etc.). It is preferable that the insulator 214 has a function of suppressing the diffusion of water molecules. , insulator 273, and insulator 283 are made of a small amount of hydrogen (e.g., hydrogen atoms, hydrogen molecules, etc.). It is preferable that the insulator 21 has a high function of suppressing the diffusion of water molecules. 4, insulator 222, insulator 272, insulator 273, insulator 282, and insulator 283 At least one of the oxygen diffusion inhibitors (e.g., at least one of oxygen atoms, oxygen molecules, etc.) is inhibited. For example, the insulators 214, 222, and 272 are preferably provided with a function of At least one of the insulators 273, 282, and 283 is thinner than the insulator 224. It is preferable that the insulator 214 has low permeability to either or both of oxygen and hydrogen. At least one of the insulator 222, the insulator 272, the insulator 273, the insulator 282, and the insulator 283 Preferably, the insulating material 250 has a lower permeability to oxygen and / or hydrogen than the insulating material 250. It is preferable that the insulator 214, the insulator 222, the insulator 272, the insulator 273, the insulator 282, and At least one of the insulators 280 and 283 is more resistant to one or both of oxygen and hydrogen than the insulator 280. It is preferable that the permeability of the film is low.

[0048] Insulator 214, insulator 222, insulator 272, insulator 273, insulator 282, and insulator The insulating material 283 may be, for example, aluminum oxide, hafnium oxide, gallium oxide, indium oxide, or the like. Diode gallium zinc oxide, silicon nitride, or silicon oxynitride may be used. In particular, the insulator 214 and the insulator 283 are preferably made of a material having a higher hydrogen barrier property. It is preferable to use silicon nitride or silicon oxynitride.

[0049] In addition, as shown in FIG. 1B, in one embodiment of the semiconductor device described in this embodiment, A part of the side surface of 224 contacts the conductor 242, and the conductor 242 is covered with the insulator 272. The insulator 273 is disposed on the edge 272. The insulator 273 seals the conductor 242, thereby suppressing oxidation of the conductor 242. Also, hydrogen in the insulator 224 passes through the conductor 242 and is absorbed into the insulator 272. This may be possible and is preferred.

[0050] The oxide 230 is formed by a oxide 230a on the insulator 224 and an oxide 230b on the oxide 230a. and a metal oxide 230b disposed on the metal oxide 230b and at least a portion of the metal oxide 230b is disposed on the upper surface of the metal oxide 230b. and a contact oxide 230c. Here, the side of the oxide 230c is preferably Oxide 243a, oxide 243b, conductor 242a, conductor 242b, insulator 272, insulator It is preferable that the insulating material 273 and the insulating material 280 are provided in contact with each other.

[0051] In the transistor 200, the oxide 23 is formed in the channel formation region and in the vicinity thereof. 1 shows a structure in which three layers of oxide 230a, oxide 230b, and oxide 230c are laminated. However, the present invention is not limited to this. For example, a single layer of oxide 230b, oxide 23 a two-layer structure of oxide 230b and oxide 230a, a two-layer structure of oxide 230b and oxide 230c, or For example, the oxide 230c may have a two-layer structure. In this case, a four-layer laminate structure may be provided.

[0052] The transistor 200 includes an oxide 230 (oxide 230a, oxide The oxide 230c is provided with a metal oxide (hereinafter For example, a semiconductor that functions as an oxide semiconductor is preferably used. The metal oxide has an energy gap of 2 eV or more, preferably 2.5 eV or more. In this way, it is preferable to use a metal oxide having a large energy gap. As a result, the leakage current (off-state current) of the transistor 200 in the non-conducting state is extremely small. By using such a transistor, a semiconductor device with low power consumption can be manufactured. We can provide it.

[0053] For example, the oxide 230 may be an In-M-Zn oxide (wherein the element M is aluminum or gallium). Sodium, Yttrium, Tin, Copper, Vanadium, Beryllium, Boron, Titanium, Iron, Nickel , Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Hafnium One or more selected from aluminum, tantalum, tungsten, magnesium, etc. In particular, the element M may be an oxide of a metal such as aluminum, gallium, yttrium, or the like. In addition, the oxide 230 may be In oxide, In-M oxide, or In-Mn oxide. Alternatively, In-Zn oxide or M-Zn oxide may be used.

[0054] The oxide 230 is made up of an oxide 230a, an oxide 230b on the oxide 230a, and an oxide 230b on the oxide 230a. The oxide 230c is located on the oxide 230b. The oxide 230a is located under the oxide 230b. As a result, impurities from the structure formed below the oxide 230a are transferred to the oxide 230b. The diffusion can be suppressed. In addition, by having the oxide 230c on the oxide 230b, Diffusion of impurities from structures formed above oxide 230c into oxide 230b can be suppressed.

[0055] The oxide 230 has a laminated structure of multiple layers with different atomic ratios of metal atoms. Specifically, in the metal oxide used for the oxide 230a, The atomic ratio of element M in the constituent elements of the metal oxide used for oxide 230b is In addition, in the metal oxide used for the oxide 230a, In the metal oxide used for the oxide 230b, the atomic ratio of the element M to In is It is preferable that the atomic ratio of element M to In is larger than that of element In. In the metal oxide, the atomic ratio of In to element M is It is preferable that the atomic ratio of In in the oxide is larger than that of the element M. The material 230c is a metal oxide that can be used for the oxide 230a or the oxide 230b. , can be used.

[0056] Specifically, the oxide 230a is In:Ga:Zn=1:3:4 [atomic ratio], or a composition close to that, or 1:1:0.5 [atomic ratio] or a composition close to that The oxide 230b may be In:Ga:Zn=4:2:3. [atomic ratio] or a composition close to that, or 1:1:1 [atomic ratio] or a composition close to that A metal oxide having a similar composition may be used. = 1:3:4 [atomic ratio] or a composition close to that, In:Ga:Zn = 4:2:3 [atomic ratio] In:Ga:Zn=5:1:3 [atomic ratio] or a composition close to that, Composition in the vicinity, In:Ga:Zn=10:1:3 [atomic ratio] or a composition in the vicinity , Ga:Zn=2:1 [atomic ratio] or a composition close to that, or Ga:Zn=2: 5 [atomic ratio] or a metal oxide having a composition close to that. A specific example of a layered structure of 0c is In:Ga:Zn=4:2:3 [atomic ratio] ] or a composition close to that, and In:Ga:Zn=1:3:4 [atomic ratio] or Layer structure with nearby composition, In:Ga:Zn=4:2:3 [atomic ratio] or nearby and In:Ga:Zn=5:1:3 [atomic ratio] or a stack of compositions close to that. Structure, Ga:Zn=2:1 [atomic ratio] or a composition close to that, and In:Ga:Zn= 4:2:3 [atomic ratio] or a layered structure with a composition close to that, Ga:Zn=2:5 [atomic ratio] In:Ga:Zn=4:2:3 [atomic ratio] or a composition close to that, The layered structure is made up of gallium oxide and In:Ga:Zn=4:2:3 [atomic The composition ratio is preferably in the range of 0.1 to 1.0, and more preferably in the range of 0.1 to 1.0. This includes a range of ±30% of the desired atomic ratio.

[0057] In addition, the oxide 230b preferably has crystallinity. -OS(c-axis aligned crystalline oxide sem It is preferable to use a crystalline material such as CAAC-OS. Oxides have few impurities and defects (such as oxygen vacancies), high crystallinity, and a dense structure. Therefore, the source electrode or drain electrode is capable of drawing oxygen from the oxide 230b. This can prevent the oxide 230b from being removed by heat treatment. Since the pull-out of the semiconductor material can be reduced, the transistor 200 can be manufactured with high It is stable with respect to temperature (so-called thermal budget).

[0058] In addition, the energy of the conduction band minimum of the oxide 230a and the oxide 230c is It is preferable that the energy of the oxide is higher than the minimum energy of the conduction band of 0b. The electron affinity of the oxide 230a and the oxide 230c is smaller than the electron affinity of the oxide 230b. It is preferable that

[0059] Here, the electron affinity or the energy level Ec at the bottom of the conduction band is the vacuum level and the valence band The ionization potential Ip, which is the difference between the edge energy Ev and the energy gap Eg The ionization potential Ip can be calculated, for example, by ultraviolet photoelectron spectroscopy. (UPS:Ultraviolet Photoelectron Spectrosc The energy gap Eg can be measured, for example, by spectroscopy. It can be measured using an ellipsometer.

[0060] In addition, at the junctions of the oxides 230a, 230b, and 230c, The energy level of the lower band edge changes gradually. The energy level of the conduction band minimum at the junction of the oxide 230c and the oxide 230b is continuous. In order to achieve this, the oxide 2 At the interface between oxide 30a and oxide 230b, and at the interface between oxide 230b and oxide 230c, In this case, the defect level density of the mixed layer formed by the above process is preferably reduced.

[0061] The main path of the carriers is the oxide 230b. By configuring the oxide 230c as described above, the interface between the oxide 230a and the oxide 230b and the oxide The defect state density at the interface between the substrate 230b and the oxide 230c can be reduced. Therefore, the effect of interface scattering on carrier conduction is reduced, and the transistor 200 has a high It is possible to obtain high on-current and high frequency characteristics.

[0062] The oxide 230 (for example, the oxide 230b) is made of an oxide semiconductor having a low carrier concentration. In the case of lowering the carrier concentration of the oxide semiconductor, It is sufficient to lower the impurity concentration in the conductor and to lower the defect level density. A low impurity concentration and a low defect level density are called high purity intrinsic or substantially high purity intrinsic. Examples of impurities in an oxide semiconductor include hydrogen, nitrogen, an alkali metal, an alkali metal, and an alkali metal. These include lithium-earth metals, iron, nickel, and silicon.

[0063] In particular, hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water. Therefore, oxygen vacancies (V O :Oxygen vacancy) In addition, there are defects in which hydrogen is inserted into oxygen vacancies (hereafter referred to as V O Sometimes called H. ) can act as a donor, producing electrons as carriers. Some of them may combine with oxygen, which bonds with metal atoms, to generate electrons that act as carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is a normally-on transistor. In addition, hydrogen in the oxide semiconductor is easily moved by stress such as heat and electric field. Therefore, if an oxide semiconductor contains a large amount of hydrogen, the reliability of a transistor decreases. There is also a risk.

[0064] V O H can function as a donor in oxide semiconductors. Therefore, in the case of oxide semiconductors, it is difficult to evaluate the donor concentration, but In this specification, the parameters of the oxide semiconductor are evaluated based on the carrier concentration. As the data, the carrier concentration assuming the absence of an applied electric field is used instead of the donor concentration. In other words, the "carrier concentration" described in this specification may be called the "donor concentration." In some cases, it may be possible to replace it.

[0065] From the above, when an oxide semiconductor is used for the oxide 230, V in the oxide 230 O H It is preferable to reduce the amount of the fluorine as much as possible to obtain a high-purity pure or substantially high-purity pure product. , V O In order to obtain an oxide semiconductor with sufficiently reduced H, it is necessary to reduce moisture, hydrogen, etc. in the oxide semiconductor. Removing impurities (sometimes referred to as dehydration or dehydrogenation treatment) and It is important to supply oxygen to the food to compensate for the oxygen deficiency (sometimes referred to as oxygen addition treatment). It is essential. O The oxide semiconductor with sufficiently reduced impurities such as H is used as the channel of the transistor. By using it in the hole formation region, stable electrical characteristics can be imparted.

[0066] In addition, when an oxide semiconductor is used for the oxide 230, a region that functions as a channel formation region The carrier concentration of oxide semiconductors in the region is 1×10 18 cm -3 It is preferable that 1×10 17 cm -3 More preferably, it is less than 1×10 16 cm -3 is less than More preferably, 1×10 13 cm -3 More preferably, it is less than 1×1 0 12 cm -3 It is more preferable that the thickness of the channel forming region is less than 100 nm. The lower limit of the carrier concentration of the oxide semiconductor in the region is not particularly limited. For example, 1×10 -9 cm -3 It can be said that:

[0067] In addition, a source gas containing no hydrogen atoms or containing only a small amount of hydrogen atoms is used to form a layer. Interlayer insulating films (insulator 216, insulator 274, insulator 280, etc.), and gate insulating films (insulator By forming insulating films (insulator 224, insulator 250, etc.), the hydrogen concentration in these insulating films In this case, hydrogen entering a channel formation region of the oxide semiconductor may be reduced.

[0068] In the deposition of the insulating film, the deposition gas is mainly a gas having molecules containing silicon atoms. In order to reduce the hydrogen contained in the insulating film, the following is used: It is preferable that the number of hydrogen atoms contained is small, and the molecule containing the silicon atom contains hydrogen atoms. Of course, it is preferable that the gas used for film formation is not a gas having molecules containing silicon atoms. The gas preferably contains a small amount of hydrogen atoms, and more preferably contains no hydrogen atoms. I wish.

[0069] The above silicon-containing molecule is called Si x -R y For example, the functional group R is The isocyanate group (-N=C=O), the cyanate group (-OC≡N), the cyano group (- C≡N), diazo group (=N 2 ), azide group (-N 3 ), nitroso group (-NO), and Toro group (-NO 2 ) can be used. For example, 1≦x≦3, 1≦ The following formula should be satisfied: y≦8. Examples of molecules that contain silicon atoms include tetraisopropyl ether. Socyanate silane, tetracyanate silane, tetracyanosilane, hexaisocyanate The silicone isocyanate silane, octaisocyanate silane, etc. can be used. Although a molecule in which the same type of functional group is bonded to an atom is illustrated, the present embodiment is not limited to this. However, it is also possible to have a structure in which different types of functional groups are bonded to silicon atoms.

[0070] In addition, for example, a halogen (Cl, Br, I, or F) is used as the functional group R. For example, 1≦x≦2 and 1≦y≦6 may be satisfied. Examples of molecules containing tetrachlorosilane (SiCl 4 ), Hexachlorodisil Si 2 Cl 6 Although an example of using chlorine as a functional group has been shown, other functional groups besides chlorine can be used. In addition, halogens such as bromine, iodine, and fluorine may be used as functional groups. The atoms may be configured to have different types of halogens bonded to them.

[0071] The composition of the insulator 216, the insulator 274, the insulator 280, the insulator 224, and the insulator 250 The film is formed by chemical vapor deposition (CVD) using a gas having molecules containing silicon atoms as described above. D: Chemical Vapor Deposition (CVA) method. Since the VD method has a relatively high film deposition rate, the insulator 280, the insulator 274, and This is suitable for forming the insulator 216 .

[0072] As a CVD method, plasma CVD (PECVD: Plasma ECVD) is a method that uses plasma. enhanced CVD method, or thermal CVD (TCVD) It is preferable to use the thermal CVD method. When using the thermal CVD method, the film is formed under atmospheric pressure. Now Atmospheric Pressure CVD (APCVD) method Alternatively, low pressure CVD (LPCVD: Low Pressure) may be used, which performs film formation under reduced pressure lower than atmospheric pressure. The low pressure CVD method may also be used.

[0073] The insulators 216, 274, 280, and 224 are formed by a CVD method. When forming the insulator 250, it is preferable to use an oxidizing agent. 2 , O 3 , NO, NO 2 , N 2 O, N 2 O 3 , N 2 O 4 , N 2 O 5 , CO, CO 2 , etc. It is preferable to use a gas that does not contain atomic elements.

[0074] Also, the insulators 216, 274, 280, 224, and 25 The deposition of 0 is performed by the ALD (Atomic Layer Deposition) method. In the ALD method, a first source gas for the reaction (hereinafter referred to as a precursor) is ) and a second raw material gas (hereinafter referred to as a reactant or metal precursor). (also called reactant or nonmetallic precursor) are introduced alternately into the chamber. The introduction of these source gases is repeated to form a film.

[0075] The ALD method uses a self-regulating atomic property to form a film by switching the source gas. Therefore, the ALD method is suitable for the deposition of ultra-thin films. , deposition on structures with high aspect ratios, deposition with few defects such as pinholes, and coating properties Therefore, the ALD method can form a film having excellent properties. This is suitable for forming the edge body 224.

[0076] The ALD method uses thermal A, which reacts precursors and reactants using only thermal energy. The LD (Thermal ALD) method may be used, or a plasma-excited reactant may be used. Alternatively, a plasma enhanced ALD (PEALD) method using the above method may be used.

[0077] When the ALD method is used, a gas having a molecule containing a silicon atom is used as a precursor. The oxidizing agent may be used as a reactant. The amount of hydrogen trapped in insulator 274, insulator 280, insulator 224, and insulator 250 can be significantly reduced.

[0078] In the above, an example was shown in which the molecule containing silicon atoms does not contain hydrogen atoms. However, the present embodiment is not limited to this. In the above-mentioned molecule containing silicon atoms, A part of the functional group bonded to the silicon atom may be replaced with a hydrogen atom. The hydrogen atoms contained in the above silicon-containing molecules are called silane (SiH 4 ) less In other words, the above-mentioned silicon atom-containing molecule preferably has three atoms per silicon atom. It is preferable that the molecule has a hydrogen atom less than or equal to the silicon atom. It is more preferred if the gas has 3 or less hydrogen atoms per silicon atom.

[0079] As described above, insulator 21 is formed by the film forming method using a gas in which hydrogen atoms are reduced or removed. 6. At least one of the insulators 274, 280, 224, and 250 By forming the insulating film, the amount of hydrogen contained in the insulating film can be reduced.

[0080] In addition, the transistor 200 has an insulator 282 and a 250 is in direct contact with the insulating material 250. Therefore, the oxygen contained in the insulator 280 is less likely to be absorbed by the conductor 260. The contained oxygen is efficiently transferred to oxide 230a and oxide 230b via oxide 230c. Since the oxygen vacancies in the oxide 230a and the oxide 230b can be eliminated, This can reduce the electrical characteristics and reliability of the transistor 200. It is possible to prevent impurities such as hydrogen contained in the insulator 280 from being mixed into the insulator 250. Therefore, the hydrogen concentration in the insulator 250 and the oxide 230 can be further reduced. Therefore, adverse effects on the electrical characteristics and reliability of the transistor 200 can be suppressed. The insulator 282 may be silicon nitride, silicon oxynitride, aluminum oxide, or Alternatively, hafnium oxide can be used.

[0081] [Capacitive element 100] As shown in FIG. 1B, the capacitor 100 includes an insulator 216 on an insulator 214 and an insulator The conductors 204 (conductor 204a and conductor 204b) are disposed so as to be embedded in the conductor 216. 04b), on the insulator 216, and on the conductor 205, on the insulator 222, The conductor 242a is

[0082] In the capacitor 100, the conductor 204 functions as one electrode of the capacitor 100. The conductor 242a functions as the other electrode of the capacitor 100. The conductor 204 functions as a dielectric of the capacitor element 100. The conductor 204 is made of the same material as the conductor 205. is used.

[0083] The conductor 204 is formed in the same layer as the conductor 205 of the transistor 200. The electrode 242a also serves as a source electrode or a drain electrode of the transistor 200. The insulator 222 also serves as the gate insulator of the transistor 200. By making the transistor 200 and the capacitance element 100 share some of their components in common, The manufacturing process of a semiconductor device having the transistor 200 and the capacitor element 100 is simplified. This is preferable because it is expected to reduce manufacturing costs and improve yields.

[0084] As a result, the fluctuation of electrical characteristics is suppressed, the electrical characteristics are stable, and reliability is improved. Alternatively, a semiconductor device having normally-off electrical characteristics can be provided. Alternatively, a semiconductor device having a transistor with a large on-state current can be provided. A semiconductor device having a transistor with high frequency characteristics can be provided. Alternatively, a semiconductor device having a transistor with low off-state current can be provided. It is possible to provide a semiconductor device.

[0085] Hereinafter, a semiconductor device including a transistor 200 and a capacitor 100 according to one embodiment of the present invention will be described. The detailed configuration of the semiconductor device will be described.

[0086] The conductor 205 is disposed so as to overlap the oxide 230 and the conductor 260. Preferably, the conductor 205 is embedded in the insulator 216 .

[0087] Here, the conductor 260 functions as a first gate (also called a top gate). The conductor 205 also functions as a second gate (also called a bottom gate). In this case, the potential applied to the conductor 205 may be different from the potential applied to the conductor 260. By changing the voltages independently, the Vth of the transistor 200 can be controlled. In particular, applying a negative potential to the conductor 205 can It is possible to increase Vth above 0V and reduce the off-current. Applying a negative potential to 205 reduces the potential applied to the conductor 260 compared to not applying a negative potential. The drain current when the potential is 0V can be reduced.

[0088] As shown in FIG. 1A, the conductor 205 is a conductor 242a of the oxide 230 and It is preferable that the area is larger than the area that does not overlap with the conductor 242b. As shown in Fig. 2C, the conductor 205 is formed by dividing the channel width of the oxide 230a and the oxide 230b. It is preferable that the oxide extends in the region outside the end in the direction. The conductor 205 and the oxide 230b are disposed on the outside of the ends in the channel width direction. It is preferable that the conductor 20 overlaps with the conductor 260 via an insulator. By making the conductor 205 larger, the processing using plasma in the manufacturing process after the formation of the conductor 205 can be performed. In some cases, it may be possible to alleviate localized charging (called charge-up) However, one embodiment of the present invention is not limited to this. It is sufficient to overlap with the oxide 230 located between conductor 242a and conductor 242b.

[0089] As shown in FIGS. 1A and 1B, the conductor 204 includes at least the conductor 242a. It is preferable that the oxide 230a and the oxide 230b have regions that do not overlap and regions that do overlap. I wish.

[0090] As shown in FIG. 1C, the oxide 230a and the The oxide 230b and the bottom surface of the conductor 260 in the area where the conductor 260 does not overlap The height of the oxide 230b has a region that is located lower than the height of the bottom surface of the oxide 230b. In addition, the height of the bottom surface of the conductor 260 in the region and the bottom surface of the oxide 230b are preferably The difference between the height of the surface and is 0 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less. More preferably, it is 5 nm or more and 20 nm or less.

[0091] In this manner, the conductor 260 functioning as a gate is disposed between the oxide 230 of the channel forming region. The side and top surfaces of b are covered via an oxide 230c and an insulator 250. This makes it easier for the electric field of the conductor 260 to act on the entire oxide 230b in the channel formation region. As a result, the on-state current of the transistor 200 can be increased, and the frequency characteristics can be improved. In this specification, the electric field of the first gate and the second gate causes a channel shape The structure of a transistor that electrically surrounds a region is called a surrounded channel. This is called the l (S-channel) structure.

[0092] The conductor 205a has a conductive property that suppresses the permeation of impurities such as water or hydrogen and oxygen. For example, titanium, titanium nitride, tantalum, or tantalum nitride may be used. The conductor 205b can be made of tungsten, copper, or aluminum. It is preferable to use a conductive material having a thickness of 100 μm and a thickness of 100 μm. A multi-layer structure having more than one layer may also be used.

[0093] Here, the oxide semiconductor, the insulator or conductor located under the oxide semiconductor, and the oxide The insulating or conductive material on the upper layer of the oxide semiconductor is separated into different layers without being exposed to the atmosphere. By continuously depositing the seeds, the concentration of impurities (especially hydrogen and water) is reduced, resulting in a substantially high-purity This is preferable because a highly intrinsic oxide semiconductor film can be formed.

[0094] Insulator 214, insulator 222, insulator 272, insulator 273, insulator 282, insulator 2 At least one of the insulating material 283 and the insulating material 284 is provided to prevent impurities such as water or hydrogen from entering the substrate. The insulating film functions as a barrier insulating film that prevents foreign matter from entering the transistor 200 from above. Therefore, the insulators 214, 222, 272, and At least one of the insulator 273, the insulator 282, the insulator 283, and the insulator 284 is a hydrogen Atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitric oxide molecules (N 2 O, NO, NO 2 N (e.g., copper atoms) and other impurities. It is preferable to use an insulating material. Alternatively, oxygen (e.g., oxygen atoms, oxygen molecules, etc.) An insulating material having a function of suppressing the diffusion of at least one of the oxygen (the oxygen is difficult to permeate) It is preferable to use

[0095] For example, the insulator 283 and the insulator 284 may be silicon nitride or silicon oxynitride. The insulators 214, 222, 272, 273, and The insulator 282 is preferably made of aluminum oxide or hafnium oxide. This allows impurities such as water or hydrogen to pass through the insulator 214 and enter the transistor from the substrate side. It is possible to suppress the diffusion of the ferroelectric material to the insulator 224. It is possible to suppress the oxygen from diffusing to the substrate side through the insulator 214. Impurities such as water or hydrogen are formed in the insulators 272, 273, 282, and The transistor is formed from the insulator 280 arranged above the insulator 283 and the insulator 274. This can prevent the light from diffusing toward the star 200 side.

[0096] It may also be desirable to have low resistivity for the insulator 284. The resistivity of 84 is approximately 1×10 13 By setting the resistance to Ωcm, the insulator 28 In the process using plasma or the like after the formation of the insulating material 284, the conductor 204, the conductor 205, the conductor 242, the conductor 260 or the conductor 246. The resistivity of the insulator 284 is preferably about 1×10 10 Ωcm or more 1×10 15 Ωcm or less.

[0097] Also, the insulators 216, 280, and 274 have a higher dielectric strength than the insulator 214. By using a material with a low dielectric constant as the interlayer film, the parasitic For example, the capacitance of the insulator 216, the insulator 280, and the insulator 27 can be reduced. 4. Silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, fluorine silicon oxide doped with , silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen Silicon or silicon oxide having voids may be used appropriately.

[0098] The insulator 222 and the insulator 224 function as gate insulators.

[0099] Here, it is preferable that the insulator 224 in contact with the oxide 230 is heated to release oxygen. In this specification, the oxygen released by heating may be referred to as excess oxygen. The insulator 224 may be made of silicon oxide or silicon oxynitride as appropriate. By providing an insulator containing the oxide 230 in contact with the oxide 230, oxygen vacancies in the oxide 230 are reduced. Therefore, the reliability of the transistor 200 can be improved.

[0100] Specifically, the insulator 224 is made of an oxide material from which some oxygen is released when heated. It is preferable that the oxides which desorb oxygen by heating are those which are determined by thermal desorption spectrometry (TDS). Thermal Desorption Spectroscopy (TDS) analysis revealed that oxygen The amount of molecules desorbed is 1.0×10 18 molecules / cm 3 More than 1.0x, preferably 10 19 molecules / cm 3 More preferably, 2.0×10 19 mole cules / cm 3 or more, or 3.0×10 20 molecules / cm 3 That's all. The surface temperature of the film during the TDS analysis was 100°C or higher. A temperature range of 700° C. or lower, or 100° C. to 400° C. is preferred.

[0101] The insulator 222 prevents impurities such as water or hydrogen from entering the transistor 200 from the substrate side. For example, the insulator 222 is preferably a barrier insulating film that suppresses the Preferably, the insulator 222 has a lower hydrogen permeability than the insulator 224. 3, the insulator 224 and the oxide 230 are surrounded, and water or Impurities such as hydrogen can be prevented from entering the transistor 200 .

[0102] Further, the insulator 222 is made of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). It is preferable that the material has a function of suppressing diffusion (i.e., the oxygen is less likely to permeate). For example, Preferably, the body 222 has a lower oxygen permeability than the insulator 224. The oxide 230 has a function of suppressing the diffusion of impurities and oxygen contained in the insulator 2. This is preferable because it can reduce diffusion below 22. This can suppress reaction with the body 224 and the oxygen contained in the oxide 230.

[0103] The insulator 222 is made of one or both of aluminum and hafnium, which are insulating materials. It is recommended to use an insulator containing oxide. Insulators containing oxides include aluminum oxide, hafnium oxide, aluminum and hafnium oxide, and It is preferable to use an oxide containing hafnium (hafnium aluminate). When the insulator 222 is formed using such a material, the insulator 222 is oxidized by the oxide 230. The emission of hydrogen and the incorporation of impurities such as hydrogen into the oxide 230 from the periphery of the transistor 200 are prevented. It acts as a suppressing layer.

[0104] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, etc. may be added to these insulators. tungsten oxide, yttrium oxide, Zirconium oxide may be added, or these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator. .

[0105] The insulator 222 may be, for example, aluminum oxide, hafnium oxide, tantalum oxide, Zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrT iO 3 ) or (Ba,Sr)TiO 3 (BST) and other so-called high-k materials. For example, when the insulator 222 is a laminate, the insulator may be made of an acid. A three-layer stack in which zirconium oxide, aluminum oxide, and zirconium oxide are formed in this order. Layers of zirconium oxide, aluminum oxide, zirconium oxide, aluminum oxide The insulator 222 may be a four-layer laminate in which the insulating layer 222 is formed in this order. A compound containing fluorine and zirconium may also be used. As integration density increases, the gate insulator and the dielectric material used in the capacitor element become thinner. This can cause problems such as leakage currents in transistors and capacitors. and the use of high-k materials for the insulators that function as dielectrics in the capacitor elements. While maintaining the physical film thickness, the gate potential during transistor operation is reduced and the capacitance element is It becomes possible to secure capacity.

[0106] The insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In this case, the laminated structure is not limited to the same material, and may be made of different materials. good.

[0107] Also, the oxide 230b and the conductor 242 functioning as a source electrode or a drain electrode are (conductor 242a and conductor 242b) and oxide 243 (oxide 243a and The conductor 242 and the oxide 230 may be arranged in such a manner that they are not in contact with each other. Therefore, the conductor 242 can be prevented from absorbing oxygen from the oxide 230. By preventing the oxidation of the conductor 242, the decrease in the conductivity of the conductor 242 can be suppressed. Therefore, it is preferable that the oxide 243 has a function of suppressing the oxidation of the conductor 242. I wish.

[0108] Therefore, it is preferable that the oxide 243 has a function of suppressing the permeation of oxygen. The oxygen is prevented from passing between the conductor 242, which functions as an electrode or a drain electrode, and the oxide 230b. By disposing the oxide 243 having the function of suppressing the electric field, the conductor 242 and the oxide 230b This is preferable because it reduces the electrical resistance between the transistor and the The electrical characteristics and reliability of the transistor 200 can be improved.

[0109] The oxide 243 may be a metal oxide having an element M. In particular, the element M is Aluminum, gallium, yttrium, or tin may be used. Oxide 243 is It is preferable that the concentration of element M is higher than that of oxide 230b. Gallium may also be used. In addition, the oxide 243 may be a metal oxide such as In-M-Zn oxide. Specifically, in the metal oxide used for the oxide 243, The atomic ratio of the element M to In in the metal oxide used for the oxide 230b is The atomic ratio of the oxide 243 is preferably larger than that of the element M. The thickness of the oxide 243 is preferably 0.5 nm or less. The thickness is preferably at most 5 nm, and more preferably at least 1 nm and at most 3 nm. It is preferable that the oxide 243 has crystallinity. When the oxide 243 has crystallinity, the oxide 23 The release of oxygen from the oxide 243 can be effectively suppressed. In the case of a crystalline structure such as a crystalline structure, the release of oxygen in the oxide 230 may be suppressed.

[0110] The oxide 243 is not necessarily provided. In that case, the conductor 242 (conductor 2 When the oxide 230 comes into contact with the conductor 242a and the conductor 242b, the oxide in the oxide 230 The hydrogen may diffuse into the conductor 242, causing the conductor 242 to oxidize. As a result, the conductivity of the conductor 242 is likely to decrease. The conductor 242 absorbs the oxygen in the oxide 230. This can be rephrased.

[0111] In addition, oxygen in the oxide 230 is converted into conductor 242 (conductor 242a and conductor 242b ) between the conductor 242a and the oxide 230b and between the conductor 242b A foreign layer may be formed between the conductor 242 and the oxide 230b. Since the layer also contains a large amount of oxygen, it is presumed that the layer has insulating properties. The three-layer structure of the oxide 230b, the hetero layer, and the oxide 230b is a three-layer structure consisting of a metal, an insulator, and a semiconductor. It can be considered as a MIS (Metal-Insulator-Semiconductor) structure. In some cases, this is called a diode junction structure, or a MIS structure. be.

[0112] The above-mentioned different layer is not limited to being formed between the conductor 242 and the oxide 230b. For example, a different layer may be formed between the conductor 242 and the oxide 230c, or between the conductor 242 and the oxide 230c. 42 and oxide 230b, and between conductor 242 and oxide 230c. There are cases.

[0113] On the oxide 243, a conductor 242 ( The conductor 242 has a thickness of, for example, , 1 nm or more and 50 nm or less, preferably 2 nm or more and 25 nm or less.

[0114] The conductor 242 may be aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, etc. Ru, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, Magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium A metal element selected from rontium and lanthanum, or an alloy containing the above metal elements Alternatively, it is preferable to use an alloy of the above-mentioned metal elements. For example, titanium nitride tantalum, titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use an oxide containing lanthanum and nickel. Tantalum oxide, titanium nitride, titanium and aluminum nitride, tantalum and aluminum Nitrides containing ruthenium, ruthenium oxide, ruthenium nitride, and oxides containing strontium and ruthenium. The oxides containing lanthanum and nickel are conductive materials that are difficult to oxidize, or absorb oxygen. This is preferable because it is a material that maintains its conductivity even when absorbed.

[0115] The insulator 272 is provided in contact with the upper surface of the conductor 242 and functions as a barrier layer. With this configuration, the conductor 242 can effectively suppress the overcurrent of the insulator 280. Absorption of excess oxygen can be suppressed. In addition, by suppressing oxidation of the conductor 242, It is possible to suppress an increase in the contact resistance between the transistor 200 and the wiring. This can provide the transistor 200 with good electrical characteristics and reliability.

[0116] Therefore, it is preferable that the insulator 272 has a function of suppressing the diffusion of oxygen. For example, Preferably, the insulator 272 has a function of suppressing oxygen diffusion more effectively than the insulator 280. The insulator 272 may be, for example, aluminum or hafnium. It is preferable to form an insulator containing an oxide. Also, as the insulator 272, for example, aluminum nitride is used. An insulator containing minium may be used.

[0117] As shown in FIG. 1D, the insulator 272 is disposed on the upper surface of the conductor 242a and the upper surface of the conductor 24 Although not shown, the insulator 272 is in contact with the upper surface of the conductor 242b and the side surface of the conductor 242b. The insulator 272 is in contact with the side surface of the conductor 242b. In this way, for example, oxygen added to the insulator 280 is transferred to the conductor 242. Absorption can be suppressed.

[0118] The insulator 250 functions as a gate insulator. The insulator 250 is formed on the oxide 230c. The insulator 250 is preferably made of silicon oxide, silicon oxynitride, or nitride. Silicon oxide, silicon nitride, silicon oxide with fluorine, silicon oxide with carbon Silicon oxide, silicon oxide doped with carbon and nitrogen, and silicon oxide with vacancies In particular, silicon oxide and silicon oxynitride are preferred because they are stable against heat. I wish.

[0119] Like the insulator 224, the insulator 250 is made of an insulator that releases oxygen when heated. It is preferable to form the insulating material 250 as an insulating material from which oxygen is released by heating. By providing it on and in contact with the oxide 230c, it effectively reduces the channel formation region of the oxide 230b. In addition, like the insulator 224, the water in the insulator 250 can be supplied with oxygen. It is preferable that the concentration of impurities such as hydrogen is reduced. It is preferable that the thickness is between 1 nm and 20 nm.

[0120] A metal oxide may be provided between the insulator 250 and the conductor 260. The material preferably suppresses oxygen diffusion from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses the diffusion of oxygen from the insulator 250 to the conductor 260, the diffusion of oxygen from the insulator 250 to the conductor 260 can be suppressed. In other words, the decrease in the amount of oxygen supplied to the oxide 230 can be suppressed. In addition, oxidation of the conductor 260 due to oxygen in the insulator 250 can be suppressed.

[0121] The metal oxide may also function as a part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 250, the metal oxide It is preferable to use a metal oxide, which is a high-k material with a high relative dielectric constant, as the oxide. By making the base insulator have a laminated structure of the insulator 250 and the metal oxide, the base insulator is stable against heat. Therefore, the physical properties of the gate insulator can be improved. It is possible to reduce the gate potential applied during transistor operation while maintaining the film thickness. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulator. do.

[0122] Specifically, hafnium, aluminum, gallium, yttrium, zirconium, tantalum, tin, titanium, tantalum, nickel, germanium, magnesium, etc. The metal oxide may contain one or more metals selected from the following: Aluminum oxide, an insulator containing oxides of either or both of aluminum and hafnium Aluminum, hafnium oxide, oxides containing aluminum and hafnium (hafnium oxide) It is preferable to use a material such as a laminate.

[0123] Alternatively, the metal oxide may function as a part of the gate. In the above, it is preferable to provide a conductive material containing oxygen on the channel formation region side. By providing the conductive material on the channel formation region side, oxygen released from the conductive material forms a channel. This makes it easier for the area to be supplied.

[0124] In particular, the metal oxide in which the channel is formed is used as a conductor that functions as a gate. It is preferable to use a conductive material containing the metal element and oxygen. Conductive materials containing silicon and nitrogen may also be used. Indium tin oxide, tungsten oxide, etc. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing tungsten, indium tin oxide containing titanium oxide, indium zinc oxide Indium tin oxide doped with silicon may also be used. The use of such a material allows the channel to be formed. In some cases, hydrogen can be captured from the metal oxide that is formed. It may be possible to capture hydrogen that is mixed in through insulators, etc.

[0125] Although the conductor 260 is shown as having a two-layer structure in FIG. 1, it may have a single layer structure or a structure having three or more layers. The above laminated structure may also be used.

[0126] The conductor 260a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a nitrogen oxide molecule. (N 2 O, NO, NO 2 ), conductive materials that suppress the diffusion of impurities such as copper atoms It is preferable to use a material containing a small amount of oxygen (e.g., oxygen atoms, oxygen molecules, etc.). It is preferable to use a conductive material having a function of suppressing the diffusion of at least one of the above-mentioned elements.

[0127] In addition, the conductor 260a has a function of suppressing the diffusion of oxygen, so that the insulator 250 The oxygen contained therein can suppress the conductor 260b from being oxidized and the conductivity from decreasing. Examples of conductive materials that have the function of suppressing oxygen diffusion include tantalum, nitride, and the like. It is preferable to use tantalum chloride, ruthenium, ruthenium oxide, or the like.

[0128] The conductor 260b is a conductive material mainly composed of tungsten, copper, or aluminum. In addition, since the conductor 260 also functions as wiring, It is preferable to use a highly conductive material, such as tungsten, copper, or aluminum. The conductive material 260b may be a laminated material. For example, it may be a laminated structure of titanium or titanium nitride and the above conductive material. stomach.

[0129] The insulator 280 may be, for example, silicon oxide, silicon oxynitride, or nitride. Silicon oxide doped with fluorine, silicon oxide doped with carbon, carbon and and silicon oxide doped with nitrogen, or silicon oxide having vacancies. In particular, silicon oxide and silicon oxynitride are preferred because they are thermally stable. In particular, materials such as silicon oxide, silicon oxynitride, and silicon oxide with voids, This is preferable because it is possible to easily form a region containing oxygen that is desorbed by heating. The insulator 280 may be a laminate of the above materials, for example, formed by a sputtering method. The stacked structure is a silicon oxide film and a silicon oxynitride film formed by CVD on top of it. A layer structure may be used. Silicon nitride may be further laminated on top of the layer structure.

[0130] It is preferable that the concentration of impurities such as water or hydrogen in the insulator 280 is reduced. In addition, the top surface of the insulator 280 may be planarized.

[0131] The insulators 282 and 283 are arranged so that impurities such as water or hydrogen are prevented from entering the insulator 2 from above. It is preferable that the insulating film functions as a barrier insulating film that suppresses the inclusion of the insulating material 80. The insulating film 282 and the insulator 283 function as a barrier insulating film that suppresses oxygen permeation. The insulators 282 and 283 are preferably made of, for example, aluminum oxide or nitride. An insulator such as silicon or silicon nitride oxide may be used. For example, the insulator 282 Aluminum oxide, which has a high barrier property against oxygen, is used as the insulating material 283. Silicon nitride or silicon nitride oxide, which has high barrier properties against oxygen, may be used.

[0132] In addition, it is preferable to provide an insulator 274 functioning as an interlayer film on the insulator 283. The insulator 274, like the insulator 224, has a low impurity concentration such as water or hydrogen in the film. is preferably reduced.

[0133] The conductor 240 is made of a conductive material based on tungsten, copper, or aluminum. It is preferable to use a layered structure as the conductor 240. Although the conductor 240 has a circular shape when viewed from above, the shape is not limited to this. For example, the conductor 240 may have a substantially circular shape such as an ellipse or a polygonal shape such as a rectangle when viewed from above. The corners of the polygon such as a rectangle may be rounded.

[0134] In addition, when the conductor 240 has a layered structure, impurities such as water or hydrogen, and oxygen It is preferable to use a conductive material that has a function of suppressing transmission. For example, tantalum, nitride, etc. Tantalum oxide, titanium, titanium nitride, ruthenium, or ruthenium oxide may be used. In addition, it is preferable that the porous membrane has a function of suppressing the permeation of impurities such as water or hydrogen, and oxygen. The conductive material may be used in a single layer or a multilayer structure. Impurities such as water or hydrogen that diffuse from the body 280, etc., pass through the conductor 240 and are absorbed into the oxide 2 In addition, oxygen added to the insulator 280 can be further reduced from being mixed into the insulator 30. This can prevent the radiation from being absorbed by the conductor 240.

[0135] The insulator 241 may be, for example, silicon nitride, aluminum oxide, or silicon nitride oxide. The insulator 241 may be an insulator such as silicon. Since the insulator 280 is provided in contact with the insulator 273 and the insulator 272, the insulator 280 Impurities such as water or hydrogen from the conductor 240 enter the oxide 230. In particular, silicon nitride has a high blocking effect against hydrogen. In addition, it is preferable to prevent oxygen contained in the insulator 280 from being absorbed by the conductor 240. This can be done.

[0136] In addition, a conductor 246 that functions as wiring may be disposed in contact with the upper surface of the conductor 240. The conductor 246 is made of a conductive material based on tungsten, copper, or aluminum. The conductor may have a laminated structure, for example, titanium or Alternatively, the conductive material may be a laminate of titanium nitride and the conductive material. The insulating film 11 may be formed so as to be embedded in the opening.

[0137] In addition, an insulator 284 may be formed on the conductor 246 and the insulator 283. By using such a configuration, the conductor 246 can be wrapped with the insulator 283 and the insulator 284. This can suppress the oxidation of the conductor 246 and also prevents impurities such as hydrogen from passing through the conductor 246. The insulator 284 can be made of, for example, For example, an insulator such as silicon nitride, aluminum oxide, or silicon oxynitride may be used. Alternatively, the insulator 274 may be formed on the insulator 284. can be made of an insulator similar to insulator 280.

[0138] <Materials for semiconductor devices> The following describes constituent materials that can be used in the semiconductor device.

[0139] <Substrate> The substrate on which the transistor 200 is formed may be, for example, an insulating substrate, a semiconductor substrate, or A conductive substrate may be used. Examples of insulating substrates include glass substrates, quartz substrates, and silicon substrates. Fire substrate, stabilized zirconia substrate (yttria stabilized zirconia substrate, etc.), resin substrate Semiconductor substrates are made of, for example, silicon or germanium. Semiconductor substrates, or silicon carbide, silicon germanium, gallium arsenide, indium phosphide Compound semiconductor substrates made of gallium oxide, zinc oxide, and gallium oxide are also available. A semiconductor substrate having an insulating region inside the semiconductor substrate, for example, SOI (Silicon on Insulator) Conductive substrates include graphite substrates and metal substrates. , alloy substrates, conductive resin substrates, etc. Also, substrates with metal nitrides, metal oxides, etc. Furthermore, there are substrates in which a conductor or semiconductor is provided on an insulating substrate. Substrate, substrate with conductor or insulator provided on semiconductor substrate, substrate with semiconductor or insulator provided on conductive substrate There are also substrates with elements on them. The elements provided on the substrate may include a capacitance element, a resistance element, a switch element, a light-emitting element, and the like. These include elements such as memory elements.

[0140] <Insulator> Insulators include oxides, nitrides, oxynitrides, nitride oxides, and metal oxides that have insulating properties. These include metal oxide nitrides, metal oxynitrides, and metal oxynitrides.

[0141] For example, as transistors become smaller and more highly integrated, the gate insulator becomes thinner. This can cause problems such as leakage current. By using high-k materials, the voltage required for transistor operation can be reduced while maintaining the physical thickness. On the other hand, it is possible to use a material with a low relative dielectric constant for the insulator that functions as the interlayer film. This reduces the parasitic capacitance between the wirings. The material should be selected accordingly.

[0142] Insulators with high relative dielectric constants include gallium oxide, hafnium oxide, and zirconium oxide. Oxides containing aluminum, aluminum and hafnium, and oxides containing aluminum and hafnium oxide-nitride having silicon and hafnium; oxide-nitride having silicon and hafnium; Examples of suitable materials include oxynitrides with hafnium, or nitrides with silicon and hafnium.

[0143] Insulators with low dielectric constants include silicon oxide, silicon oxynitride, and silicon nitride oxide. Silicon, fluorine doped silicon oxide, carbon doped silicon oxide, carbon and nitrogen Examples of the silicon oxide include silicon oxide with added ions, silicon oxide having voids, and resin.

[0144] In addition, a transistor using an oxide semiconductor can suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of suppressing the As an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, , for example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon , phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum Insulators containing tungsten, neodymium, hafnium, or tantalum are used in single or multilayer configurations. Specifically, the insulating material has a function of suppressing the permeation of impurities such as hydrogen and oxygen. As an insulator, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, Yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or metal oxides such as tantalum oxide, aluminum nitride, titanium aluminum nitride, Metal nitrides such as titanium oxide, silicon oxynitride, or silicon nitride can be used. .

[0145] In addition, the insulator that functions as the gate insulator has a region that contains oxygen that is desorbed by heating. For example, it is preferable that the insulating material has a region containing oxygen that is desorbed by heating. By forming a structure in which silicon oxide or silicon oxynitride is in contact with the oxide 230, The oxygen deficiency of 230 can be compensated for.

[0146] <Conductor> Conductive materials include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and titanium. Tantalum, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Sium, zirconium, beryllium, indium, ruthenium, iridium, strontium Metal elements selected from aluminum, lanthanum, etc., or alloys containing the above-mentioned metal elements It is preferable to use an alloy or the like that combines the above-mentioned metal elements. For example, tantalum nitride titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use an oxide containing lanthanum and nickel. Tantalum, titanium nitride, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitride, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium Oxides containing lanthanum and nickel are conductive materials that are difficult to oxidize or absorb oxygen. It is preferable because it is a material that maintains its conductivity even if it is oxidized. In addition, it does not contain impurity elements such as phosphorus. Highly conductive semiconductors, such as polycrystalline silicon, nickel silicide, etc. Silicide may also be used.

[0147] In addition, a plurality of conductive layers made of the above materials may be laminated. A laminated structure in which a material containing a metal element and a conductive material containing oxygen are combined may be used. In addition, a laminated material that combines the above-mentioned material containing a metal element and a conductive material containing nitrogen is In addition, the above-mentioned metal element-containing material, the conductive material containing oxygen, and the nitrogen A laminated structure in which the conductive material containing the element is combined with the conductive material containing the element may be used.

[0148] In the case where an oxide is used for the channel formation region of a transistor, The functional conductor combines the above-mentioned material containing the metal element with a conductive material containing oxygen. In this case, it is preferable to use a laminate structure in which an oxygen-containing conductive material is used as a channel. It is preferable to provide the conductive material containing oxygen on the channel formation region side. Thus, oxygen released from the conductive material is easily supplied to the channel formation region.

[0149] In particular, the metal oxide in which the channel is formed is used as a conductor that functions as a gate. It is preferable to use a conductive material containing the metal element and oxygen. Conductive materials containing silicon and nitrogen may also be used, such as titanium nitride and tantalum nitride. In addition, a conductive material containing nitrogen such as indium tin oxide or tungsten oxide may be used. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide, titanium oxide, indium tin oxide, indium zinc oxide, Silicon-doped indium tin oxide may also be used. The use of such a material may be used to form a channel. In some cases, the metal oxides surrounding the outer insulator can trap hydrogen. In some cases, it may be possible to capture hydrogen that is mixed in from sources such as

[0150] <Metal oxide> As the oxide 230, it is preferable to use a metal oxide that functions as an oxide semiconductor. Metal oxides applicable to the oxide 230 according to the present invention will be described below.

[0151] The metal oxide preferably contains at least indium or zinc. In addition to these, aluminum, gallium, and zinc are preferably included. It is preferable that the alloy contains boron, titanium, iron, or the like. , nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium , hafnium, tantalum, tungsten, magnesium, or Or multiple types may be included.

[0152] Here, the metal oxide is an In-M-Zn oxide having indium, element M and zinc. The element M can be aluminum, gallium, yttrium, or The element M can be tin, etc. Other elements that can be used for M include boron, titanium, iron, and nickel. Nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, halide Examples include fluorine, tantalum, tungsten, and magnesium. However, the element M is: In some cases, combinations of the aforementioned elements may be used.

[0153] In this specification, metal oxides containing nitrogen are also referred to as metal oxides. Metal oxides containing nitrogen are also called metal oxynitrides (MEs). It may also be called tal oxynitride.

[0154] <Metal oxide composition> CAC-OS (Cloud-Accelerated Co-Op) is a metal oxide that can be used for OS transistors. Aligned Composite Oxide Semiconductor), and CAAC-OS(c-axis Aligned Crystal Oxide Se This section explains the structure of the microconductor.

[0155] CAC-OS or CAC-metal oxide is a material that has a conductive function in some parts. A part of the material has an insulating function, and the whole material has a semiconductor function. In addition, CAC-OS or CAC-metal oxide is used as the active layer of a transistor. When used in a material, the function of conductivity is to allow electrons (or holes) to flow as carriers, and The insulating function is the function of preventing the flow of electrons that act as carriers. By making the two functions work in a complementary manner, a switching function (On / Off) is realized. The function of providing a CAC-OS or CAC-metal oxide with a In CAC-OS or CAC-metal oxide, the functions are separated. By combining them, the functions of both can be maximized.

[0156] In addition, CAC-OS or CAC-metal oxide has a conductive region and an insulating region. The conductive region has the above-mentioned conductive function, and the insulating region has the above-mentioned insulating function. In addition, the conductive and insulating regions in the material are formed at the nanoparticle level. In addition, the conductive and insulating regions may be separated by a metal. In addition, the conductive area may be observed as a cloud-like connected area with a blurred periphery. There may be cases where this occurs.

[0157] In addition, in the CAC-OS or CAC-metal oxide, a conductive region and an insulating region are The peripheral region is 0.5 nm to 10 nm, preferably 0.5 nm to 3 nm. The following sizes may be present in the material:

[0158] In addition, CAC-OS and CAC-metal oxide have different band gaps. For example, CAC-OS or CAC-metal oxide e is a component with a wide gap due to the insulating region and a component with a narrow gap due to the conductive region. In the case of this configuration, when a carrier is caused to flow, In the component with a narrow gap, carriers mainly flow. The component having a narrow gap acts complementary to the component having a wide gap. In conjunction with the component, carriers also flow to the component with a wide gap. C-OS or CAC-metal oxide is used for the channel formation region of a transistor. In this case, the transistor has a high current driving capability in the on-state, i.e., a large on-current, and High field effect mobility can be obtained.

[0159] That is, CAC-OS or CAC-metal oxide is a matrix composite material. (matrix composite), or metal matrix composite It can also be called atrix composite.

[0160] [Metal oxide structures] Oxide semiconductors (metal oxides) are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As non-single crystal oxide semiconductors, for example, CAAC-OS, polycrystalline amorphous oxide semiconductor, nc-OS, pseudo-amorphous oxide semiconductor (a-like OS) phos-like oxide semiconductor), and amorphous oxide semiconductors, etc.

[0161] In addition, when focusing on the crystal structure, oxide semiconductors may be classified differently from the above. Here, the classification of crystal structures in oxide semiconductors will be described with reference to FIG. FIG. 15A shows a GaN-GaN thin film transistor (GaN-GaN thin film transistor) using an oxide semiconductor, typically IGZO (In, Ga, Zn FIG. 2 is a diagram for explaining the classification of crystal structures of metal oxides containing

[0162] As shown in Figure 15(A), IGZO is roughly divided into Amorphous and Cry They are classified into stalline and Crstal. Completely amorphous is included. Crystalli Among the NE, there are CAAC (c-axis aligned crystalline), nc (nanocrystalline) and CAC (Cloud-Aligned Also, in Crystal, there are single crystal Includes crystalline, crystalline, and poly crystal.

[0163] The structure within the bold frame in FIG. 15(A) is a new crystalline phas This structure belongs to the se group. This structure is between Amorphous and Crystal. It is in the boundary region. That is, it is between the energetically unstable Amorphous and the Cryst In other words, it has a structure completely different from alline.

[0164] The crystal structure of the film or substrate was determined by X-ray diffraction (XRD). The evaluation can be performed using the ion image. XRD scan of IGZO (also called crystalline IGZO) with a crystal structure classified as ine The spectra are shown in Figures 15(B) and (C). Figure 15(B) shows the quartz glass, and Figure 15(C) shows the ) is the XRD spectrum of crystalline IGZO. The composition of O is In:Ga:Zn=4:2:3 [atomic ratio]. The crystalline IGZO shown in C) has a thickness of 500 nm.

[0165] As shown by the arrow in FIG. 15(B), the peaks in the XRD spectrum of the quartz glass are almost the same. On the other hand, as shown by the arrow in Figure 15(C), crystalline IGZO has a The asymmetric peaks in the XRD spectrum indicate that the crystal structure is In other words, if the peaks in the XRD spectrum are not symmetrical, Am It cannot be said to be orphous.

[0166] CAAC-OS has a c-axis orientation and multiple nanocrystals are connected in the ab-plane direction. The nanocrystals are connected together to form a distorted crystal structure. In a region, a lattice arrangement is formed between a region having a uniform lattice arrangement and another region having a uniform lattice arrangement. This refers to the point where the direction of the

[0167] Nanocrystals are basically hexagonal, but are not limited to regular hexagons and may have non-regular hexagonal shapes. In addition, the distortion may have lattice arrangements such as pentagons and heptagons. In addition, in the CAAC-OS, clear grain boundaries (grain bows) were observed even in the vicinity of the strain. It is difficult to confirm the presence of the crystal structure due to the distortion of the lattice arrangement. This is because the CAAC-OS is aligned in the ab-plane direction. In the case of the ferroelectric material, the arrangement of oxygen atoms is not dense, and the bond distance between atoms is reduced by the substitution of metal elements. This is because distortion can be tolerated by changing the

[0168] In addition, the CAAC-OS has a layer containing indium and oxygen (hereinafter, the In layer) and an elemental A layered crystal consisting of layers containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer). Indium and element M tend to have a layered structure. When the element M in the (M,Zn) layer is replaced with indium, (In,M,Zn ) layer. Also, when the indium in the In layer is replaced with the element M, (In, M) layer.

[0169] CAAC-OS is a highly crystalline metal oxide. Since it is difficult to confirm the grain boundaries, the decrease in electron mobility caused by the grain boundaries is unlikely to occur. In addition, the crystallinity of metal oxides is reduced by the incorporation of impurities and the generation of defects. Therefore, CAAC-OS is designed to prevent impurities and defects (oxygen vacancies (V O :oxygen v CAAC- is a metal oxide with low acancy. Metal oxides with OS have stable physical properties. Therefore, Metal oxides are heat resistant and highly reliable.

[0170] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. Sometimes it is indistinguishable from the body.

[0171] In addition, indium oxide, which is a type of metal oxide containing indium, gallium, and zinc, In the case of IGZO, the nanocrystals mentioned above make it stable. In particular, IGZO tends to have difficulty growing crystals in air. , small crystals (e.g., For example, the nanocrystals mentioned above may be structurally more stable.

[0172] The a-like OS is a metal oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has voids or low density regions. The ke-OS has a lower crystallinity than the nc-OS and CAAC-OS.

[0173] Oxide semiconductors (metal oxides) have a variety of structures, each with different properties. The oxide semiconductor of one embodiment of the present invention can be an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-li The ke-OS, nc-OS, and CAAC-OS may have two or more kinds.

[0174] In the semiconductor device of one embodiment of the present invention, Although there is no particular limitation, it is preferable that the oxide 230 has crystallinity. For example, The oxide 23 can have a hexagonal crystal structure. By forming the oxide 243 into the above-mentioned crystal structure, a semiconductor device having high reliability can be obtained. In addition, the oxide 230a, the oxide 230c, and the oxide 243 can be roughly They may be of the same composition.

[0175] <Transistor Having Oxide Semiconductor> Next, the case where the oxide semiconductor is used for a transistor will be described.

[0176] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility can be obtained. It is also possible to realize a highly reliable transistor.

[0177] In addition, the transistor is preferably formed using an oxide semiconductor with a low carrier concentration. In the case of decreasing the carrier concentration of the oxide semiconductor film, the impurity concentration in the oxide semiconductor film is In the present specification and the like, the impurity concentration is low, and the defect level density is low. A low density of defect states is called high purity intrinsic or substantially high purity intrinsic.

[0178] In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states. Therefore, the trap level density may be low.

[0179] In addition, the time required for the charge trapped in the trap level of the oxide semiconductor to disappear is Therefore, the trap level density is high. A transistor in which a channel formation region is formed in an oxide semiconductor has unstable electrical characteristics. There may be cases where this occurs.

[0180] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor In order to reduce the impurity concentration in the oxide semiconductor, It is preferable to reduce the impurity concentration in the adjacent film. These include alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0181] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0182] When oxide semiconductors contain silicon or carbon, which is one of the group 14 elements, they become oxidized. Defect levels are formed in oxide semiconductors. The concentration of silicon and carbon at the interface between the insulator and the oxide semiconductor and near the interface. Concentration of elementary particles (Secondary Ion Mass Spectrometry (SIMS) The concentration obtained by spectrometry is 2×10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0183] In addition, when an oxide semiconductor contains an alkali metal or an alkaline earth metal, a defect level is formed. Therefore, when alkali metals or alkaline earth metals are included, Transistors using oxide semiconductors, which are widely used in semiconductor manufacturing, tend to be normally on. Therefore, it is preferable to reduce the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor. Specifically, the alkali metal or alkali metal in the oxide semiconductor obtained by SIMS The concentration of earth metals is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 at oms / cm 3 To the following:

[0184] In addition, when nitrogen is contained in an oxide semiconductor, electrons that serve as carriers are generated, and As a result, the nitrogen-containing oxide semiconductor is easily converted to n-type. Therefore, the transistor used in the oxide semiconductor In this case, it is preferable that the nitrogen content is reduced as much as possible. The concentration is 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Below, More preferably 5×10 17 atoms / cm 3 The following applies.

[0185] In addition, hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water. When hydrogen enters the oxygen vacancy, the carrier, In some cases, hydrogen atoms are formed by bonding with oxygen atoms that bond with metal atoms. Therefore, it is necessary to use an oxide semiconductor that contains hydrogen. Therefore, the hydrogen in the oxide semiconductor tends to cause a transistor to be normally on. It is preferable that the Si content in the oxide semiconductor is as low as possible. The hydrogen concentration obtained by MS is 1×10 20 atoms / cm 3 Less than 1x, preferably 10 19 atoms / cm 3 less than 5×10 18 atoms / cm 3 less than , and more preferably 1×10 18 atoms / cm 3 Less than.

[0186] By using an oxide semiconductor in which impurities are sufficiently reduced for a channel formation region of a transistor, This makes it possible to impart stable electrical characteristics.

[0187] <Other semiconductor materials> The semiconductor materials that can be used for the oxide 230 are not limited to the above-mentioned metal oxides. The object 230 is a semiconductor material having a band gap (a semiconductor that is not a zero-gap semiconductor). For example, semiconductors of single elements such as silicon, gallium arsenide, etc. Compound semiconductors, layered materials that function as semiconductors (also called atomic layer materials, 2D materials, etc.) It is preferable to use a layered material that functions as a semiconductor. It is suitable for use in semiconductor materials.

[0188] In this specification, the term "layered material" is a general term for a group of materials having a layered crystal structure. The layered crystal structure is formed by layers of covalent and ionic bonds, which are connected by van der Waals interactions. The structure is layered through bonds that are weaker than covalent or ionic bonds, such as ruthenium. Layered materials have high electrical conductivity within a unit layer, that is, high two-dimensional electrical conductivity. By using a material that functions as a semiconductor and has high two-dimensional electrical conductivity in the channel formation region, As a result, a transistor with a large on-state current can be provided.

[0189] Layered materials include graphene, silicene, and chalcogenides. Chalcogenides are Chalcogen is a general term for elements in group 16. They include oxygen, sulfur, selenium, tellurium, polonium, and livermorium. The cogenides include transition metal chalcogenides and group 13 chalcogenides.

[0190] The oxide 230 may be, for example, a transition metal chalcogenide that functions as a semiconductor. As the transition metal chalcogenide applicable as the oxide 230, specifically, is molybdenum sulfide (represented by MoS 2 ), molybdenum selenide (represented by MoSe 2 ), molybdenum tellurium (represented by MoTe 2 ), tungsten sulfide (represented by WS 2 ), tungsten selenide (represented by WSe 2 ), tungsten tellurium (representatively W.T.e. 2 ), hafnium sulfide (represented by HfS 2 ), hafnium selenide (representatively HfSe 2 ), zirconium sulfide (typically ZrS 2 ), zirconium selenide (representative ZrSe 2 ) etc.

[0191] <Method for manufacturing semiconductor device> Next, a semiconductor device having a transistor 200 according to the present invention and a capacitor element 100 as shown in FIG. A method for manufacturing the semiconductor device will be described with reference to FIGS. In FIG. 4, (A) of each figure shows a top view. Also, (B) of each figure shows the A1- 2 is a cross-sectional view corresponding to the portion indicated by the dashed line in A2, and shows a transistor 200 and a capacitor The figure also shows a cross-sectional view of the element 100 in the channel length direction. 4 is a cross-sectional view of the transistor 200 in the channel width direction. Also, (D) of each figure is a cross-sectional view of the portion indicated by the dashed line A5-A6 in (A). 1 is a cross-sectional view of the capacitor 100 taken along the channel width direction. In the top view of (A) of FIG. 1, some elements have been omitted for clarity.

[0192] First, a substrate (not shown) is prepared, and an insulator 214 is formed on the substrate. The deposition of 14 was performed by sputtering, chemical vapor deposition (CVD), Deposition method, Molecular Beam Epitaxy (MBE) eam Epitaxy method, Pulsed Laser Deposition (PLD) Deposition) method or ALD (Atomic Layer Deposit) This can be done using the (ion) method or the like.

[0193] The CVD method is a process that uses plasma (PECVD). Enhanced CVD method, Thermal CVD (TCVD) These methods are further classified into the VD method, which uses light, and the Photo CVD method, which uses light. Depending on the source gas, metal CVD (MCVD: Metal CVD) method, metal organic CVD method (MOCVD: Metal Organic CVD) method. Depending on the pressure during film formation, there are two types of CVD: atmospheric pressure CVD (APCVD), which forms films under atmospheric pressure. Heric Pressure CVD method, in which film is formed under reduced pressure below atmospheric pressure CVD (LPCVD: Low Pressure CVD) method.

[0194] The plasma CVD method can produce high-quality films at relatively low temperatures. This is a film formation method that can reduce plasma damage to the workpiece because it does not use a plasma. For example, wiring, electrodes, elements (transistors, capacitors, etc.) included in a semiconductor device ) may become charged up by receiving an electric charge from the plasma. When accumulated electric charges destroy wiring, electrodes, elements, etc., contained in a semiconductor device. On the other hand, in the case of thermal CVD, which does not use plasma, such plasma damage occurs. Since the thermal CVD method does not require any heat treatment, the yield of the semiconductor device can be increased. Since no plasma damage occurs in the film, a film with few defects can be obtained.

[0195] In addition, the ALD method uses only thermal energy to react with the precursor and reactant. Thermal ALD method, which uses plasma-excited reactants The EALD (Plasma Enhanced ALD) method, for example, can be used.

[0196] The ALD method utilizes the self-regulating nature of atoms to deposit atoms one layer at a time. This allows for extremely thin film deposition, film deposition on structures with high aspect ratios, and no pinholes. It is possible to form a film with few defects, excellent coverage, and low temperature. The PEALD method uses plasma, which allows deposition at lower temperatures. In addition, the precursors used in the ALD method do not contain impurities such as carbon. For this reason, films formed by the ALD method are not as good as those formed by other film formation methods. The amount of impurities may be higher than that of the films that have been treated with X-ray annealing. X-ray Photoelectron Spectros (XPS) This can be done using the (copy)

[0197] The CVD and ALD methods are deposition methods in which particles emitted from a target are deposited. It is a film forming method in which a film is formed by a reaction on the surface of the object to be treated. Therefore, this is a film forming method that is not easily affected by the shape of the workpiece and has good step coverage. In addition, the ALD method has excellent step coverage and thickness uniformity, making it ideal for achieving high aspect ratios. However, the ALD method is relatively slow in forming a film. Because the deposition rate is slow, it should be used in combination with other deposition methods such as CVD, which has a faster deposition rate. may be preferred.

[0198] In the CVD and ALD methods, the composition of the resulting film is controlled by the flow rate ratio of the source gases. For example, in the CVD and ALD methods, the flow rate ratio of the source gases can be adjusted to any value. In addition, for example, in the CVD method and the ALD method, the film formation By changing the flow rate ratio of the source gas while heating, a film with a continuously changing composition can be formed. When forming a film while changing the flow rate ratio of the source gas, multiple film forming chambers can be used. Compared to forming a film using a vacuum, the time required for film formation is shorter because there is no time required for transportation or pressure adjustment. Therefore, the productivity of the semiconductor device can be improved. There is.

[0199] In this embodiment, the insulator 214 is formed of silicon nitride by CVD. Next, the insulator 216 is formed on the insulator 214. The insulator 216 is formed by sputtering. The deposition can be performed by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In an embodiment, the insulator 216 is silicon oxide or silicon oxynitride. The insulator 216 is formed by the above-mentioned deposition method using a gas in which hydrogen atoms are reduced or removed. It is preferable to form a film by this method. This can reduce the hydrogen concentration in the insulator 216. .

[0200] Next, an opening is formed in the insulator 216 so as to reach the insulator 214. The opening may be, for example, a groove or This also includes slits. The area where an opening is formed may also be referred to as an opening. The openings may be formed by wet etching, but it is more preferable to use dry etching. Insulator 214 is preferably formed by etching insulator 216. It is preferable to select an insulator that functions as an etching stopper film when etching. For example, When a silicon oxide film or a silicon oxynitride film is used for the insulator 216 forming the groove, The insulator 214 is made of a silicon nitride film, an aluminum oxide film, or a hafnium oxide film. It would be good to do so.

[0201] After the openings are formed, the conductive film that will become the conductor 204a and the conductive film that will become the conductor 205a are The conductive film preferably contains a conductor having a function of suppressing oxygen permeation. For example, tantalum nitride, tungsten nitride, titanium nitride, etc. can be used. Or tantalum, tungsten, titanium, molybdenum, aluminum, copper, molybdenum tantalum The conductive film that becomes the conductor 204a and the conductive film that becomes the conductor 204b can be a laminated film of a tin alloy. The conductive film that becomes the conductive body 205a is formed by a sputtering method, a CVD method, an MBE method, or a PLD method. Alternatively, it can be performed using an ALD method or the like.

[0202] In this embodiment, a conductive film that becomes the conductor 204a and a conductive film that becomes the conductor 205a First, a tantalum nitride film is formed by sputtering. Such metal nitrides are used as the conductor 204 and the conductive layer 205. The conductive film that becomes the conductor 204b described later by using it as the lower layer of the body 205 and the conductive Even if a metal that easily diffuses, such as copper, is used for the conductive film that becomes the body 205b, the metal 204a and the conductor 205a from diffusing outward.

[0203] Next, a conductor that will become the conductor 204b and a conductive film that will become the conductor 205b are formed. The conductive film may be formed by a plating method, a sputtering method, a CVD method, an MBE method, a PLD method, or the like. This can be done by using an ALD method or the like. In this embodiment, As a conductive film to become the conductor 205b, a film of a low resistance conductive material such as copper is formed.

[0204] Next, CMP (Chemical Mechanical Polishing) By carrying out the above, a conductive film that becomes the conductor 204a and a conductive film that becomes the conductor 205a are formed. and removing a part of the conductive film that will become the conductor 204b and a part of the conductive film that will become the conductor 205b. The insulator 216 is exposed. As a result, the conductors 204a, 204b, The conductor 205a and the conductor 205b remain. By the CMP process, the insulating layer 204 and the conductor 205 can be formed. A portion of the edge 216 may be removed (see FIG. 4).

[0205] In the above, the conductor 204 and the conductor 205 are embedded in the opening of the insulator 216. However, the present embodiment is not limited to this. A conductor 204 and a conductor 205 are formed on the substrate 214, and the conductor 204 and the conductor 2 05, and the insulator 216 is subjected to CMP processing. A portion of the conductor 204 and the surface of the conductor 205 may be exposed.

[0206] Next, the insulator 222 is formed on the insulator 216, the conductor 204, and the conductor 205. The insulator 222 is made of oxide of either or both of aluminum and hafnium. It is preferable to form a film of an insulator containing aluminum and / or hafnium. Insulators containing oxides include aluminum oxide, hafnium oxide, aluminum and hafnium oxide, and It is preferable to use oxides containing hafnium (e.g. hafnium aluminate). Insulators containing oxides of tungsten and / or hafnium are highly resistant to oxygen, hydrogen, and The insulator 222 has a barrier property against hydrogen and water. As a result, hydrogen and water contained in the structures provided around the transistor 200 are insulated. The oxide 230 is prevented from diffusing into the inside of the transistor 200 through the insulator 222. The generation of oxygen vacancies in the glass can be suppressed.

[0207] The insulator 222 is formed by sputtering, CVD, MBE, PLD, or A. This can be done using the LD method or the like.

[0208] Next, the insulator 224 is deposited on the insulator 222. The deposition of the insulator 224 is carried out by sputtering. The deposition can be performed by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, silicon oxide or silicon oxynitride is used as the insulator 224. The insulator 224 is formed by the deposition method using a gas in which hydrogen atoms are reduced or removed. This can reduce the hydrogen concentration in the insulator 224. Since the insulator 224 will come into contact with the oxide 230a in a later step, the hydrogen concentration is It is preferable that the amount of the ion exchange resin is reduced.

[0209] Subsequently, a heat treatment is preferably performed. The reaction temperature is preferably 300° C. or higher and 500° C. or lower, and more preferably 320° C. or higher and 450° C. or lower. The heat treatment may be performed in a nitrogen or inert gas atmosphere, or in an atmosphere of oxidizing gas at a concentration of 10ppm. m or more, 1% or more, or 10% or more. Heat treatment is also performed under reduced pressure. Alternatively, the heat treatment may be performed in a nitrogen or inert gas atmosphere, followed by To compensate for the lost oxygen, the gas contains 10 ppm or more, 1% or more, or 10% or more of oxidizing gas. The heat treatment may be performed in an atmosphere containing the above-mentioned.

[0210] In this embodiment, the treatment is performed in a nitrogen atmosphere at a temperature of 400° C. for 1 hour, and then the The heat treatment is then performed in an oxygen atmosphere at a temperature of 400°C for one hour. Impurities such as water and hydrogen contained in the body 224 can be removed.

[0211] The heat treatment may be performed after the formation of the insulator 222. Heat treatment conditions can be used.

[0212] Here, in order to form an excess oxygen region in the insulator 224, a plasma containing oxygen is used under reduced pressure. The oxygen-containing plasma treatment may be, for example, a high-density plasma treatment using microwaves. It is preferable to use a device with a power source that generates plasma. Alternatively, an RF or other By using high-density plasma, Oxygen radicals can be generated, and by applying RF to the substrate side, it becomes a high-density plasma. As a result, the generated oxygen radicals can be efficiently guided into the insulator 224. After performing plasma treatment containing an inert gas using this device, In addition, a plasma treatment containing oxygen may be performed. Note that the conditions of the plasma treatment may be appropriately selected. By this, impurities such as water and hydrogen contained in the insulator 224 can be removed. In this case, the heat treatment is not necessary.

[0213] Here, aluminum oxide is formed on the insulator 224 by, for example, a sputtering method. A film may be formed and CMP may be performed until the aluminum oxide reaches the insulator 224. By performing CMP, the surface of the insulator 224 is planarized and smoothed. By placing the aluminum oxide on the insulator 224 and performing CMP, This makes it easier to detect the end point of the MP. Also, a part of the insulator 224 is polished by CMP. However, the thickness of the insulator 224 may become thin. By planarizing and smoothing the surface of the insulator 224, the oxide film to be formed later can be easily formed. In some cases, it may be possible to prevent deterioration of the coverage and to prevent a decrease in the yield of the semiconductor device. On the insulator 224, an aluminum oxide film is formed by sputtering. In this case, oxygen can be added to the insulator 224, which is preferable.

[0214] Next, an oxide film 230A and an oxide film 230B are formed in this order on the insulator 224 (see FIG. 4). It is preferable that the oxide film is formed continuously without exposing it to the air. By forming the oxide film 230A and the oxide film 230B without opening the film, the oxide film 230A and the oxide film 230B are protected from the atmospheric environment. Impurities or moisture can be prevented from adhering to the oxide film 230A and the oxide film 230B. This allows the vicinity of the interface to be kept clean.

[0215] The oxide film 230A and the oxide film 230B are formed by sputtering, CVD, MBE, etc. The deposition can be performed by using a deposition method, a PLD method, an ALD method, or the like.

[0216] For example, the oxide film 230A and the oxide film 230B are formed by a sputtering method. In this case, oxygen or a mixture of oxygen and a rare gas is used as the sputtering gas. By increasing the ratio of oxygen contained in the sputtering gas, the excess oxygen in the oxide film to be formed is reduced. In addition, when the oxide film is formed by sputtering, In this case, the above-mentioned In-M-Zn oxide target can be used.

[0217] In particular, when the oxide film 230A is formed, a part of the oxygen contained in the sputtering gas becomes an insulator. Therefore, the oxide film 230A may be sputtered with the oxide gas 224. The percentage of oxygen contained in the gas should be 70% or more, preferably 80% or more, and more preferably 100%. That's good.

[0218] In addition, when the oxide film 230B is formed by a sputtering method, the oxide film 230B is formed by sputtering. The ratio of oxygen to be added is set to 1% or more and 30% or less, preferably 5% or more and 20% or less. The oxygen-deficient oxide semiconductor is formed in the channel formation region. The transistors used in the above region have a relatively high field effect mobility. By performing the film formation while However, one embodiment of the present invention is not limited to this. The oxide film 230B is formed by a sputtering method. In this case, the ratio of oxygen contained in the sputtering gas is preferably more than 30% and less than 100%. If the film is formed with a concentration of 70% or more and 100% or less, an oxygen-excess oxide semiconductor is formed. A transistor using an oxygen-excess oxide semiconductor for a channel formation region has a relatively high Reliability is gained.

[0219] In this embodiment, the oxide film 230A is formed by sputtering In:Ga: Zn=1:1:0.5[atomic ratio] (2:2:1[atomic ratio]), or 1:3:4[ The oxide film 230B is formed by sputtering a target having a ratio of 1:1 to 1:1. By the annealing method, the atomic ratio of In:Ga:Zn=4:2:4.1 or 1:1:1 The film is formed using a target with a ratio of the number of atoms. By appropriately selecting the ratio, the oxide 230 can be formed to have the desired characteristics.

[0220] Next, a heat treatment may be performed. The heat treatment may be performed under the above-mentioned heat treatment conditions. By the heat treatment, impurities such as water and hydrogen in the oxide film 230A and the oxide film 230B are removed. In this embodiment, the wafer is heated at 400° C. in a nitrogen atmosphere. After one hour of treatment, the sample was treated in an oxygen atmosphere at 400°C for one hour. cormorant.

[0221] Next, an oxide film 243A is formed on the oxide film 230B (see FIG. 4). The film is formed by sputtering, CVD, MBE, PLD, or ALD. The oxide film 243A has an atomic ratio of Ga to In that is equal to or larger than that of the oxide film 230B. In the present embodiment, the atomic ratio of the oxide film 2 is preferably larger than that of the Ga atom to the In atom. 43A is prepared by sputtering with the atomic ratio of In:Ga:Zn=1:3:4. The film is formed using a target of

[0222] Next, the insulator 224, the oxide film 230A, the oxide film 230B, The oxide film 243A is processed into an island shape to form an insulator 224, an oxide 230a, and an oxide 230b. b, and oxide layer 243B are formed (see FIG. 5). 30a, oxide 230b, and oxide layer 243B are at least partially connected to conductor 205. The insulator 224, the oxide 230a, the oxide 230b, and The oxide layer 243B is formed so as to have at least a region that does not overlap with the conductor 204. This processing can be performed by dry etching or wet etching. Dry etching is suitable for microfabrication.

[0223] In addition, the side surfaces of the oxide 230a, the oxide 230b, and the oxide layer 243B are insulated from the insulator 2. It is preferable that the oxide 230a, the oxide 230b, and the oxide 230c are approximately perpendicular to the upper surface of the oxide film 22. The side surface of the oxide layer 243B is approximately perpendicular to the upper surface of the insulator 222. When providing a plurality of transistors 200 and a capacitor element 100, a reduction in area and a high density are required. However, the present invention is not limited to this, and the oxide 230a, the oxide 230b, and the oxide The angle between the side surface of layer 243B and the top surface of insulator 222 may be low.

[0224] In the lithography method, first, the resist is exposed through a mask. The resist mask is formed by removing or leaving the resist-removed area using a developer. By etching through the resist mask, a conductor, a semiconductor, an insulator, etc. For example, KrF excimer laser light, ArF excimer laser light, Laser light, EUV (Extreme Ultraviolet) light, etc. are used to A resist mask can be formed by exposing the photoresist to light. A liquid immersion technique may be used in which the substrate is filled with liquid (e.g., water) and exposed to light. Alternatively, an electron beam or an ion beam may be used. In this case, the mask is not necessary. The resist mask can be removed by ashing or the like. Which dry etching process is performed, which wet etching process is performed, and which dry etching process is performed After the treatment, wet etching is performed, or after the treatment, dry etching is performed. It is possible to carry out the filtering process.

[0225] Moreover, instead of the resist mask, a hard mask made of an insulator or a conductor may be used. When a hard mask is used, for example, an insulating layer that is a hard mask material is formed on the oxide layer 243B. An insulating film and a conductive film are formed, a resist mask is formed on the insulating film and a hard mask material is etched. By this etching, a hard mask having a desired shape can be formed. The etching may be performed after removing the resist mask, or after leaving the resist mask. In the latter case, the resist mask may disappear during etching. After etching the oxide layer 243B, the hard mask may be removed by etching. On the other hand, if the hard mask material does not affect the subsequent processes or can be used in the subsequent processes, However, it is not always necessary to remove the hard mask.

[0226] The dry etching equipment is a capacitively coupled plasma (CCP) device with parallel plate electrodes. : Capacitively Coupled Plasma (CAP) etching equipment is used. The capacitively coupled plasma etching apparatus having parallel plate electrodes can Alternatively, a high frequency power source may be applied to one of the parallel plate type electrodes. A configuration in which a plurality of different high frequency power sources are applied to the electrodes may be used. Alternatively, a parallel plate type electrode may be used. Alternatively, a high-density plasma source may be provided. A dry etching apparatus having a high density plasma source can be used. The plasma processing device is, for example, an inductively coupled plasma (ICP) type. A plasma etching apparatus or the like can be used.

[0227] Next, a conductive film that will become the conductive layer 242A is formed on the oxide layer 243B (see FIG. 6). The conductive film that becomes the conductive layer 242A is formed by a sputtering method, a CVD method, an MBE method, or a PLD method. The deposition can be performed by using a deposition method, an ALD method, or the like.

[0228] Next, the conductive film that will become the conductive layer 242A is processed by using a lithography method. Form 242A (see FIG. 7).

[0229] Next, an insulator 272 is formed on the conductive layer 242A (see FIG. 7). The film is formed by sputtering, CVD, MBE, PLD or ALD. In this embodiment, the insulator 272 can be formed by a sputtering method. The aluminum oxide film is formed by the sputtering method. This allows oxygen to be implanted into the insulator 224.

[0230] Next, the insulator 273 is deposited on the insulator 272. The deposition of the insulator 273 is performed by sputtering. The deposition can be performed by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the embodiment, an aluminum oxide film is formed as the insulator 273 by the ALD method. (See Figure 7).

[0231] Next, an insulating film that will become the insulator 280 is formed. This can be done using the sputtering method, CVD method, MBE method, PLD method, or ALD method. For example, a silicon oxide film can be formed as the insulator 280 by using a sputtering method. Then, a silicon oxide film is formed on it using the PEALD method or the thermal ALD method. The insulating film that becomes the insulator 280 may be formed by using the above-mentioned gas in which hydrogen atoms are reduced or removed. This makes it possible to reduce the hydrogen concentration in the insulator 280. It can be reduced.

[0232] Next, the insulator 280 is subjected to a CMP process to form an insulator 280 with a flat upper surface (FIG. 7). As with the insulator 224, a thin film is formed on the insulator 280 by, for example, a sputtering method. Therefore, aluminum oxide is deposited and the aluminum oxide is allowed to flow until it reaches the insulator 280. CMP may also be performed.

[0233] Next, a part of the insulator 280, a part of the insulator 273, a part of the insulator 272, the conductive layer 24 A part of 2A and a part of oxide layer 243B are processed to form an opening reaching oxide 230b. The opening is preferably formed so as to overlap the conductor 205 (see FIG. 8). By forming the opening, the conductor 242a, the conductor 242b, the oxide 243a, and the oxide Compound 243b is formed.

[0234] A part of the insulator 280, a part of the insulator 273, a part of the insulator 272, and the oxide layer 243B The processing of the conductive layer 242A and the conductive layer 242B may be performed by dry etching or wet etching. Dry etching can be used. Dry etching is suitable for fine processing. In addition, the processing may be performed under different conditions. For example, A part of the insulator 273 is processed by dry etching, and a part of the insulator 273 is processed by wet etching. Then, the insulator 272 is processed by a dry etching method to remove the oxide layer 243B and the conductive layer 2 A part of 42A may be processed by dry etching.

[0235] By performing processes such as dry etching, etching gases, etc. The impurities caused by the oxidation are attached to or inside the oxide 230a and the oxide 230b. Impurities can diffuse into the silicon. Examples of impurities include fluorine and chlorine.

[0236] In order to remove the above impurities, cleaning is performed. These include wet cleaning using plasma, plasma treatment using plasma, and cleaning by heat treatment. The above cleaning methods may be combined as appropriate.

[0237] Wet cleaning uses oxalic acid, phosphoric acid, ammonia water, or hydrofluoric acid. The cleaning process may be carried out using an aqueous solution diluted with carbonated water or pure water. Alternatively, ultrasonic cleaning using carbonated water may be performed.

[0238] Until now, the oxide 230 has been removed by processes such as dry etching or the above-mentioned cleaning process. The thickness of the oxide 243a of the oxide layer 230b and the region not overlapping with the oxide 243b is The thickness of the oxide 243a and the region overlapping with the oxide 243b may be thinner than that of the oxide 243a. See Figure 8).

[0239] After the etching or cleaning, a heat treatment may be performed. The heating may be performed at a temperature of 100°C or higher and 450°C or lower, more preferably 350°C or higher and 400°C or lower. The heat treatment is carried out in an atmosphere of nitrogen gas or an inert gas, or in an atmosphere of oxidizing gas at 10ppm. For example, the heat treatment is carried out in an atmosphere containing oxygen at least 1%, or 10%. This is preferably done in air, so that oxygen is provided to the oxide 230a and the oxide 230b. Supply oxygen deficiency V O In addition, the heat treatment can be performed under reduced pressure. Alternatively, after heat treatment in an oxygen atmosphere, it is possible to continuously heat the substrate in a nitrogen atmosphere without exposing it to the air. A heat treatment may be carried out.

[0240] Next, an oxide film 230C is formed (see FIG. 9). The heat treatment may be carried out under reduced pressure and without exposure to air, and the oxidation may be continued. It is preferable to form a film 230C. The heat treatment is preferably performed in an atmosphere containing oxygen. By carrying out such a treatment, it is possible to prevent the adsorption of the oxide 230b on the surface thereof. The moisture and hydrogen contained in the oxide 230a and the oxide 230b are removed. The heat treatment temperature is 100°C or higher and 400°C or lower. ° C. or less, and more preferably 150° C. or more and 350° C. or less. The heat treatment is carried out at a temperature of 200° C. under reduced pressure.

[0241] Here, the oxide film 230C is at least a part of the upper surface of the oxide 230b, A part of the side surface, a part of the side surface of the conductor 242, a part of the side surface of the insulator 272, and the side of the insulator 273 It is preferable that the insulating body 280 is provided so as to contact a part of the surface and a part of the side surface of the insulating body 280 . The conductor 242 is connected to the oxide 243, the insulator 272, the insulator 273, and the oxide film 230C. By being surrounded, the decrease in the conductivity due to oxidation of the conductor 242 is suppressed in the subsequent steps. It is possible.

[0242] The oxide film 230C is formed by sputtering, CVD, MBE, PLD, or A The oxide film 230C can be formed by sputtering. The target has an atomic ratio of In:Ga:Zn=4:2:4.1. A target with an atomic ratio of 5:1:3 and a target with an atomic ratio of In:Ga:Zn=10:1:3 target, or a target with In:Ga:Zn=1:3:4 [atomic ratio], in oxide The oxide film 230C is formed using a target containing a high proportion of indium. By using the target, the on-current, field effect mobility, etc. of the transistor 200 can be measured. can be increased.

[0243] The oxide film 230C may be a laminate. For example, In The film was formed using a target with an atomic ratio of Ga:Zn=4:2:4.1. The film may be formed using a target having an atomic ratio of n:Ga:Zn=1:3:4.

[0244] During the formation of the oxide film 230C, part of the oxygen contained in the sputtering gas is converted into the oxide 230C. a and the oxide 230b. Alternatively, when forming the oxide film 230C, A portion of the oxygen contained in the sputtering gas may be supplied to the insulator 280. Therefore, the ratio of oxygen contained in the sputtering gas for the oxide film 230C is preferably 70% or more. It is preferable that the ratio is 80% or more, and more preferably 100%.

[0245] Next, a heat treatment may be performed. The heat treatment may be performed under reduced pressure and exposed to the atmosphere. The insulating film 250A may be formed in succession without performing the heat treatment. Therefore, the moisture and hydrogen adsorbed on the surface of the oxide film 230C are removed, and the oxide film 230C is further oxidized. The moisture concentration and hydrogen concentration in the oxide 230a, the oxide 230b and the oxide film 230C are reduced. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower. In this embodiment, the heat treatment temperature is 200°C.

[0246] Next, an insulating film 250A is formed on the oxide film 230C (see FIG. 9). The film is formed by using a method such as sputtering, CVD, MBE, PLD, or ALD. In addition, the insulating film 250A may be formed of the above-mentioned gas in which hydrogen atoms have been reduced or removed. It is preferable to form the insulating film 250A by a film forming method using a gas. The insulating film 250A is an insulator that contacts the oxide 230c in a later process. 250, it is preferable that the hydrogen concentration is reduced in this manner.

[0247] Next, microwaves or high frequencies such as RF may be irradiated. Alternatively, high frequency waves such as RF may penetrate the insulator 280, the oxide 230b, and the oxide 230a. In particular, the oxide 230a and the oxide 230b are In this case, a reaction occurs in which the VoH bond is broken, in other words, "V O H→Vo+H" A reaction occurs, and hydrogen is dehydrogenated. Some of the hydrogen generated at this time combines with oxygen. H 2 O may be removed from the oxide 230 and the insulator 280. In this way, some of the hydrogen may be gettered to the conductor 242. By irradiating the insulating material 280, the oxide 230b, and the oxide with high frequency waves or RF, The hydrogen concentration in the oxide 230a can be reduced.

[0248] In addition, oxygen gas is converted into plasma by microwaves or high frequencies such as RF, and oxygen radiator is used. That is, the insulator 280, the oxide 230b, and the oxide 230a may be formed. The plasma treatment may be carried out in an atmosphere containing oxygen. This is sometimes called oxygen plasma treatment. The oxygen radicals formed also cause the insulator 28 Oxygen can be supplied to the oxide 230a, oxide 230b, and oxide 230c. The insulator 280, the oxide 230b, and the oxide 230a are subjected to a plasma treatment in an atmosphere containing oxygen. When performing the treatment, the oxide 230 is configured so that it is difficult to irradiate microwaves or high frequencies such as RF. It can also be.

[0249] The oxygen plasma treatment is carried out by using an electric field that generates high-density plasma using, for example, microwaves. It is preferable to use a microwave processing device having a microwave source. A power source for applying RF may be provided on the substrate side. By using high density plasma, In addition, by applying RF to the substrate side, high density oxygen radicals can be generated. The oxygen ions generated by the plasma are efficiently transported through the insulator 280 and the oxide 230. The oxygen plasma treatment is preferably carried out under reduced pressure. The pressure is 60 Pa or more, preferably 133 Pa or more, more preferably 200 Pa or more, Preferably, the pressure is 400 Pa or more. 2 / O 2 +Ar) is 50 % or less, preferably 10% to 30%. After the oxygen plasma treatment, the substrate is continuously heated without being exposed to the outside air. A heat treatment may then be carried out.

[0250] Next, the conductive film 260Aa and the conductive film 260Ab are formed (see FIG. 10). The deposition of 60Aa and the conductive film 260Ab is performed by sputtering, CVD, MBE, or P This can be done using the LD method or the ALD method. For example, the CVD method can be used. In the present embodiment, the conductive film 260Aa is formed by the ALD method, and the conductive film 260Aa is formed by the CVD method. A conductive film 260Ab is formed using the above.

[0251] Next, the oxide film 230C, the insulating film 250A, the conductive film 260Aa, and The oxide 230 is removed by polishing the conductive film 260Ab until the insulator 280 is exposed. c. Forming the insulator 250 and the conductor 260 (the conductor 260a and the conductor 260b). (See Figure 11.)

[0252] Next, heat treatment may be performed. In this embodiment, heat treatment is performed in a nitrogen atmosphere at a temperature of 400° C. The heat treatment is carried out for 1 hour. The moisture concentration in the insulators 250 and 280 is reduced by the heat treatment. After the heat treatment, the temperature and hydrogen concentration can be reduced. The insulator 282 may be deposited immediately after the above process.

[0253] Next, on the conductor 260, on the oxide 230c, on the insulator 250, and on the insulator 280 , forming an insulator 282. The insulator 282 is formed by a sputtering method, a CVD method, an MB method, etc. This can be done using the E method, PLD method, ALD method, etc. (See Figure 12). The insulating film to be used is, in particular, aluminum oxide formed by sputtering. It is preferable to form a film of the insulator 282 in an oxygen-containing atmosphere by using a sputtering method. By forming the film, oxygen can be added to the insulator 280 while the film is being formed. It is preferable to deposit the insulator 282 while heating the substrate. By forming an insulator 282 in contact with the upper surface of the semiconductor device 0, the insulator This is preferable because it can prevent the oxygen contained in the conductive material 280 from being absorbed into the conductive material 260. stomach.

[0254] Next, the insulator 283 is formed on the insulator 282 (see FIG. 13). This is done using the sputtering method, CVD method, MBE method, PLD method, or ALD method. The insulator 283 may be multi-layered. For example, a sputtering method may be used. A silicon nitride film is formed by using the above method, and a silicon nitride film is then formed on the silicon nitride by using a CVD method. A film of fluorine may be formed.

[0255] Next, heat treatment may be performed. In this embodiment, heat treatment is performed in a nitrogen atmosphere at a temperature of 400° C. The treatment is carried out for 1 hour. The heat treatment removes the acid added by the formation of the insulator 282. The element is diffused into the insulator 280, and then through the oxide 230c, the oxide 230a, and In this way, the oxide 230 is subjected to oxygen addition treatment. By this, oxygen vacancies in the oxide 230 (oxide 230b) are repaired by oxygen. This can promote the reaction "Vo+O→null". Furthermore, oxide 2 The hydrogen remaining in the reactor 30 reacts with the supplied oxygen, converting the hydrogen into H 2 Removed as O This allows the hydrogen remaining in the oxide 230 to be dehydrated. Recombination to the elementary defect gives V O The formation of H can be suppressed. This may be performed not only after the formation of the insulator 283 but also after the formation of the insulator 282.

[0256] Next, insulator 272, insulator 273, insulator 280, insulator 282, and insulator 28 An opening reaching the conductor 242b is formed in the 3 (see FIG. 13). In FIG. 13(A), the opening is circular when viewed from above. However, the present invention is not limited to this. For example, the opening may be an ellipse when viewed from above. Any shape that is roughly circular, polygonal such as a square, or polygonal such as a square with rounded corners. This is also fine.

[0257] Next, an insulating film that will become the insulator 241 is formed, and the insulating film is anisotropically etched to form the insulator The insulating film that becomes the insulator 241 is formed by a sputtering method, a CVD method, or the like. This can be done by using the MBE method, the PLD method, the ALD method, or the like. As the insulating film, an insulating film having a function of suppressing oxygen transmission is preferably used. For example, it is preferable to form an aluminum oxide film by using the PEALD method. It is preferable to form a silicon nitride film using the PEALD method. This is preferred because it has high blocking properties against the

[0258] The anisotropic etching of the insulating film that becomes the insulator 241 may be, for example, dry etching. By providing an insulator 241 on the side wall of the opening, oxygen from the outside can be prevented. This can suppress the permeation of the conductive material 240 to be formed next, thereby preventing oxidation of the conductive material 240. This can prevent impurities such as water and hydrogen from diffusing to the outside from the body 240.

[0259] Next, a conductive film that will become the conductor 240 is formed. The conductive film that will become the conductor 240 is made of water, hydrogen, etc. It is preferable to use a laminated structure including a conductor having a function of suppressing the permeation of impurities, such as the above. For example, tantalum nitride, titanium nitride, etc., tungsten, molybdenum, copper, etc., The conductive film that becomes the conductor 240 can be formed by a sputtering method, a C This can be carried out by using a VD method, an MBE method, a PLD method, an ALD method, or the like.

[0260] Next, a part of the conductive film that will become the conductor 240 is removed by CMP processing, and the insulator 2 The upper surface of 83 is exposed. As a result, the conductive film remains only in the opening, making the upper surface flat. A conductive material 240 can be formed (see FIG. 13). A portion of the top surface of insulator 283 may be removed.

[0261] Next, a conductive film that will become the conductor 246 is formed. This can be done using the sputtering method, CVD method, MBE method, PLD method, or ALD method. can.

[0262] Next, the conductive film that will become the conductor 246 is processed by lithography to form the conductor 240. A conductor 246 is formed in contact with the upper surface (see FIG. 14). In this case, the thickness of the insulator 283 in the region where the insulator 283 does not overlap may become thin.

[0263] Next, an insulator 284 is formed on the conductor 246 and the insulator 283 (see FIG. 1). The insulator 284 is deposited by sputtering, CVD, MBE, PLD or A. This can be done using the LD method or the like. Also, the insulator 284 may be multi-layered. For example, For example, a silicon nitride film is formed by sputtering, and then CVD is performed on the silicon nitride. Silicon nitride may be formed on the conductor 246 and the insulator 283 by using a method. By forming the insulator 284, the upper surface of the conductor 246 and the side surface of the conductor 246 are insulated. The edge 284 is in contact with the conductor 246, and a part of the lower surface of the conductor 246 is in contact with the insulator 283. The body 246 can be configured to be wrapped with an insulator 284 and an insulator 283. By adopting such a configuration, the permeation of oxygen from the outside is suppressed, and the oxidation of the conductor 246 is prevented. In addition, impurities such as water and hydrogen can be prevented from diffusing to the outside from the conductor 246. This is preferable because it can prevent

[0264] Next, the insulator 274 may be deposited on the insulator 284 (see FIG. 1). , sputtering, CVD, MBE, PLD, ALD, etc. The insulator 274 can be formed by using the above-mentioned gas in which hydrogen atoms are reduced or removed. It is preferable to form the insulator 274 by a deposition method using the above-mentioned method. This reduces the hydrogen concentration in the insulator 274. It is possible.

[0265] Through the above steps, a semiconductor device including the transistor 200 shown in FIG. 1 can be manufactured. As shown in FIGS. 4 to 14, the semiconductor device can be manufactured by using the manufacturing method of the semiconductor device described in this embodiment mode. In this manner, a semiconductor device including the transistor 200 and the capacitor 100 can be manufactured. Cut.

[0266] <Modifications of the semiconductor device> In the following, the above will be described with reference to Figs. 2, 3, 15, 16, 17, 18, and 19. A transistor according to one embodiment of the present invention, which is different from the transistor shown in <Structure example of semiconductor device> in 200 (transistor 200a and transistor 200b), and the capacitance element 100 An example of a semiconductor device having a capacitance element 100a and a capacitance element 100b will be described. In addition, the semiconductor devices shown in FIGS. 2, 3, 15, 16, 17, 18, and 19 In the device, the structure constituting the semiconductor device shown in <Configuration example of the semiconductor device> (see FIG. 1) The same reference numerals are used for structures having the same functions as those of the transistor 2. The constituent materials of the capacitor element 100 will be described in detail in <Configuration Example of Semiconductor Device>. The above materials can be used.

[0267] <Modification 1 of the semiconductor device> FIG. 2A is a top view of a semiconductor device including a transistor 200 and a capacitor element 100. 2(B), 2(C), and 2(D) are cross-sectional views of the semiconductor device. Here, FIG. 2(B) is a cross-sectional view of the portion indicated by the dashed line A1-A2 in FIG. 2(A). 1 is a cross-sectional view of a transistor 200 and a capacitor 100 in the channel length direction. FIG. 2(C) is a cross-sectional view of the portion indicated by the dashed line A3-A4 in FIG. 2(A). 2(D) is also a cross-sectional view of the transistor 200 in the channel width direction. FIG. 1A is a cross-sectional view of a portion indicated by a dashed line A5-A6 in the channel width direction of the capacitive element 100. In addition, in the top view of FIG. 2(A), some elements are omitted for clarity. It is omitted.

[0268] As shown in FIGS. 2B and 2D, in this modification, the cross-sectional shape of the capacitance element 100 is This is different from the capacitance element 100 shown in FIGS. 1(B) and (D). 2(D), the conductor 204b is The insulator 222 on the conductor 204b is formed so as to conform to the unevenness. By forming the conductor 20 in this shape, the conductor 20 functions as one electrode of the capacitor element 100. 4 and the conductor 242a functioning as the other electrode of the capacitor 100. The area of ​​the overlapping portion via the insulator 222 functioning as a dielectric is made larger than the area in the top view. That is, the area where one electrode overlaps with the other electrode when viewed from above can be increased. Since the capacitance of the capacitive element 100 can be increased without increasing the capacitance, the capacitive element can be miniaturized.

[0269] To form the unevenness of the conductor 204b as shown in Figs. 2(B) and (D), for example, For example, as shown in FIG. 1B and FIG. 1D, the upper surface of the conductor 204b is a flat conductor 204. After forming the conductive material 204b, projections and recesses may be formed in the conductive material 204b by lithography. In this modification, the unevenness is formed in both the channel length direction and the channel width direction. However, this is not limiting. For example, the unevenness may be formed only in the channel length direction. The unevenness may be formed only in the width direction of the panel. The number of unevenness may also be the same. That is, the direction of the unevenness or the number of unevenness is determined according to the capacitance of the capacitance element required for the semiconductor device. Other configurations and effects are shown in Figs. 1(A), (B), (C), and The configuration examples of the semiconductor device shown in FIG.

[0270] <Modification 2 of Semiconductor Device> FIG. 3A is a top view of a semiconductor device including a transistor 200 and a capacitor element 100. 3B, 3C, and 3D are cross-sectional views of the semiconductor device. Here, FIG. 3(B) is a cross-sectional view of the portion indicated by the dashed line A1-A2 in FIG. 3(A). 1 is a cross-sectional view of a transistor 200 and a capacitor 100 in the channel length direction. FIG. 3(C) is a cross-sectional view of the portion indicated by the dashed line A3-A4 in FIG. 3(A). 3(D) is a cross-sectional view of the transistor 200 in the channel width direction. FIG. 2A is a cross-sectional view of a portion indicated by a dashed line A5-A6 in FIG. 2A is a cross-sectional view of the drain in the channel width direction. Some elements have been omitted for clarity.

[0271] As shown in FIG. 3A, a conductor 205 is connected to the second gate of the transistor 200 and the capacitor The electrode is also used as one electrode of the capacitor 100. The conductor 242b, which functions as a source electrode or a drain electrode, and the conductor 204 are connected to each other. The transistor 200 is connected to the source electrode 238 through the A conductor 240 that functions as a plug that connects to the drain electrode and a conductive layer 240 The conductor 246 is not connected to the side of the conductor 240, and the insulator 241 is not connected to the side of the conductor 240. The semiconductor device shown in FIG. 1(A), (B), (C), and (D) has the following configuration example. Different. The different configurations are described in detail below.

[0272] As shown in FIG. 3B, the capacitor 100 includes a conductor 205 on an insulator 214 and a conductive The conductive material 242 includes an insulator 222 on the body 205 and a conductor 242 a on the insulator 222 .

[0273] In the capacitor 100, the conductor 205 functions as one electrode of the capacitor 100. The conductor 242a functions as the other electrode of the capacitor 100. functions as a dielectric of the capacitive element 100.

[0274] As shown in FIG. 3D, the conductor 204 on the insulator 214 and the conductor 242b are connected through an opening 238. The conductor 204 is formed in the same layer as the conductor 205. Also, as shown in FIG. 3A, the conductor 204 is connected to the conductor 205 via the A1-A2 are arranged parallel to the direction.

[0275] With the above-mentioned configuration, the conductors 240 and 246 functioning as plugs, The steps of forming the insulator 241 are not required, and the transistor 200 and the capacitor 100 Since the manufacturing process of the semiconductor device having the above structure is simplified, the manufacturing cost can be reduced and the yield can be increased. This is desirable because improvements can be expected.

[0276] Other configurations and effects are shown in Figures 1(A), (B), (C), and (D). The configuration examples of the semiconductor device can be referred to.

[0277] <Modification 3 of the semiconductor device> In the following, a transistor 200a, a transistor 200b, and a capacitor according to one embodiment of the present invention will be described. An example of a semiconductor device having an element 100a and a capacitor element 100b will be described.

[0278] FIG. 16 illustrates a transistor 200a, a transistor 200b, a capacitance element 100a, and 1 is a cross-sectional view in a channel length direction of a semiconductor device having a capacitive element 100b. As shown in FIG. 16, the structure is symmetrical with respect to the dashed line A3-A4 as the axis of symmetry. One of the source electrode or the drain electrode of the transistor 200a and the transistor 200b The conductor 242c also serves as either the source electrode or the drain electrode. In addition, a conductor 246 functioning as a wiring, a transistor 200a, and a transistor The conductor 240 also functions as a plug for connection to 200b. As shown above, the two transistors, the two capacitance elements, the wiring, and the plug are connected in the above-mentioned structure. By adopting this configuration, it is possible to provide a semiconductor device that can be miniaturized or highly integrated.

[0279] The transistor 200a, the transistor 200b, the capacitance element 100a, and the capacitance element 1 The composition and effects of each of the 00b are shown in Figures 1(A), (B), (C), and (D). 1. The configuration example of the semiconductor device shown in FIG.

[0280] <Modification 4 of the semiconductor device> In the above, the transistor 200a and the transistor 20 0b, the capacitance element 100a, and the capacitance element 100b are given. The device is not limited to this. For example, as shown in FIG. 17, The semiconductor device may be connected to the transistor via a capacitance portion. A transistor 200a, a transistor 200b, a capacitance element 100a, and a capacitance element 100b A semiconductor device having the transistor 200a, the transistor 200b, and the capacitor 200a and the capacitor 200b are called a cell. The configuration of the capacitance element 100a and the capacitance element 100b is the same as that of the transistor 200a described above. Please refer to the description of the transistor 200b, the capacitor 100a, and the capacitor 100b. It is possible.

[0281] FIG. 17 illustrates a transistor 200a, a transistor 200b, a capacitance element 100a, and A cell 60 having a capacitance element 100b and a cell 61 having a similar configuration to the cell 60 form a capacitance section. 1 is a cross-sectional view of the connection via a

[0282] As shown in FIG. 17, the capacitor 100b in the cell 60 has a capacitor C1. The conductor 204_2 and the conductor 242b functioning as the other electrode are the same as those in the cell 60. The cell 61 has a structure in which the first electrode and the second electrode of the capacitance element are also used. Although not shown, one electrode of the capacitance element 100a of the cell 60 is The functioning conductor 204_1 and the conductor 242a functioning as the other electrode are connected to the cell 60. 17, that is, one electrode of the capacitance element of the semiconductor device adjacent in the A1 direction The other electrode is also the right side of the cell 61, that is, A2 in FIG. The cells in the direction have a similar configuration. By configuring the cell array 600 in this way, the interval between adjacent cells can be reduced. Therefore, the projection area of ​​the cell array 600 can be reduced, and high integration can be achieved. In addition, the configuration of the cell array 600 shown in FIG. In this way, a matrix-like cell array can be formed.

[0283] As described above, in the configuration shown in this embodiment, the transistor 200a and the transistor 20 0b, the capacitance element 100a, and the capacitance element 100b are formed to reduce the area of ​​the cell. This reduces the number of steps, thereby enabling miniaturization or high integration of a semiconductor device having a cell array.

[0284] The cell array 600 may be configured not only in a plane but also in a stacked structure. 18 shows a cross-sectional view of a configuration in which n+1 layers of cell arrays 600 are stacked. By stacking the cell arrays, the cells can be integrated without increasing the area occupied by the cell array. In other words, a 3D cell array can be configured.

[0285] <Modification 5 of the semiconductor device> An example of a semiconductor device having a 3D cell array shown in FIG. 18 will be described below. 19 shows a cross-sectional view of the semiconductor device. an insulator 211, an insulator 212 on the insulator 211, and an insulator 214 on the insulator 212; , and on the insulator 214, a cell array 600 is stacked in n+1 layers. The stacked cell array 600 functions as a plug. The 3D cell array is electrically connected to the insulator 211, Insulator 212, insulator 214, insulator 287, insulator 282, insulator 283, and insulator The insulating body 284 is sealed (hereinafter, for convenience, it is called a sealing structure). An insulator 274 is provided between the insulator 274, the insulator 284, the insulator 283, and A conductor 430 is provided on the insulator 211 and is electrically connected to the substrate 311 .

[0286] An insulator 280 is provided inside the sealing structure. The insulator 280 is heated. The insulator 280 has a function of releasing oxygen, or has an excess oxygen region.

[0287] The insulators 211, 283, and 284 have blocking properties against hydrogen. In addition, the insulator 214, the insulator 282, and The insulator 287 is preferably made of a material having a function of capturing hydrogen or fixing hydrogen. be.

[0288] For example, the material having a high blocking property against hydrogen is silicon nitride, Silicon oxide nitride, etc. can also be used. Materials that have this function include aluminum oxide, hafnium oxide, and aluminum and Examples include oxides containing hafnium (hafnium aluminate).

[0289] In this specification, the term "barrier property" refers to the function of suppressing the diffusion of a corresponding substance (permeability). Or, the corresponding substance is captured and fixed (gettering). This function is also called "check".

[0290] In addition, the insulators 211, 212, 214, 287, 282, The crystal structure of the material used for the insulator 283 and the insulator 284 is not particularly limited. For example, the hydrogen trapping or hydrogen fixation may be performed by using a structure having amorphous or crystalline properties. As a material having an adhesive function, an amorphous aluminum oxide film is preferably used. Amorphous aluminum oxide has a higher hydrogen trapping capacity and The amount of adhesion may be large.

[0291] Here, the excess oxygen in the insulator 280 is converted to hydrogen in the oxide semiconductor in contact with the insulator 280. The following model for diffusion can be considered:

[0292] Hydrogen present in the oxide semiconductor is absorbed by other The diffusion of hydrogen occurs when excess oxygen in the insulator 280 is absorbed by the oxide semiconductor. It reacts with hydrogen to form an OH bond and diffuses through the insulator 280. The hydrogen atom with the OH bond A material (typically, an insulator 282) that has the function of capturing or fixing hydrogen. Upon arrival, the hydrogen atom forms an acid bond with an atom (e.g., a metal atom) in the insulator 282. It reacts with the atomic atom and is captured or fixed in the insulator 282. On the other hand, It is assumed that the oxygen atoms of the excess oxygen remain in the insulator 280 as excess oxygen. In the diffusion of the hydrogen, the excess oxygen in the insulator 280 is likely to play a bridging role. stomach.

[0293] In order to satisfy the above model, the manufacturing process of the semiconductor device is one of the important factors. .

[0294] For example, an insulator 280 having excess oxygen is formed on an oxide semiconductor. The edge 282 is formed. After that, it is preferable to perform a heat treatment. The heat treatment is as follows: Specifically, in an atmosphere containing oxygen, an atmosphere containing nitrogen, or an atmosphere containing a mixture of oxygen and nitrogen, The heat treatment is carried out at a temperature of 350° C. or higher, preferably 400° C. or higher. The heat treatment time is 1 hour or more. The time is preferably 4 hours or more, and more preferably 8 hours or more.

[0295] By the above heat treatment, hydrogen in the oxide semiconductor is converted into the insulators 280, 282, and and the insulator 287. The absolute amount of hydrogen present in the vicinity of the oxide semiconductor can be reduced.

[0296] After the heat treatment, the insulator 283 and the insulator 284 are formed. The insulator 284 is made of a material having a high blocking property against hydrogen. The hydrogen diffused toward the inside of the oxide semiconductor, or the hydrogen present outside the oxide semiconductor, Alternatively, the intrusion into the insulator 280 can be suppressed.

[0297] Regarding the above heat treatment, the following is performed after the insulator 282 is formed: However, the present invention is not limited to this. For example, the cell arrays 600_1 to 600_ After the formation of the n+1, the above heat treatment may be performed. Hydrogen is introduced from above or to the side. The radiation spreads in the opposite direction.

[0298] By using the above-mentioned manufacturing process, the insulator 211 and the insulator 283 are bonded to each other. In this way, the above-mentioned sealing structure is formed.

[0299] As described above, the hydrogen concentration is reduced by using the above structure and the above manufacturing process. Therefore, a semiconductor device using the oxide semiconductor having high reliability can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. It is possible to provide a semiconductor device.

[0300] The configurations, structures, methods, etc. described in this embodiment may be different from the configurations, structures, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0301] (Embodiment 2) In this embodiment, one mode of a semiconductor device will be described with reference to FIGS.

[0302] [Storage device 1] The memory device shown in FIG. 20 includes a transistor 200, a capacitor 100, and a transistor FIG. 20 shows the transistor 200 and the transistor 300. FIG. 1 is a cross-sectional view in the channel length direction.

[0303] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. The transistor 200 is used in a memory device because its off-state current is small. This makes it possible to retain the memory contents for a long period of time. Since no refresh operation is required or the frequency of refresh operations is extremely low, Power consumption can be reduced sufficiently.

[0304] In the memory device shown in FIG. 20, the wiring 1001 is connected to the source and drain of the transistor 300. The wiring 1002 is electrically connected to one of the drains of the transistor 300. The wiring 1007 is electrically connected to the gate of the transistor 300. The wiring 1003 is connected to the source and drain of the transistor 200. The wiring 1004 is electrically connected to the first gate of the transistor 200. The wiring 1006 is electrically connected to the second gate of the transistor 200. In addition, the wiring 1005 is electrically connected to the other electrode of the capacitor 100 .

[0305] The semiconductor device shown in FIG. 20 has a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. The off-state current of the transistor 200 can be The capacitance of the capacitor 100 is small and the potential of one electrode of the capacitor 100 can be held. It is possible to write, retain, and read.

[0306] <Structure of memory device 1> The semiconductor device of one embodiment of the present invention includes a transistor 300 as shown in FIG. The transistor 200 has a transistor 300. The transistor 200 and the capacitor 100 are disposed in the same layer. The structures of the transistor 200 and the capacitor 100 are the same as those of the above embodiment. I can pour drinks.

[0307] The transistor 300 is disposed on a substrate 311, and includes a conductor 316, an insulator 315, and a substrate 316. A semiconductor region 313 consisting of a part of 311 and functioning as a source region or a drain region. The semiconductor device has a low resistance region 314a that is capable of performing a low resistance change and a low resistance region 314b that is capable of performing a low resistance change.

[0308] Transistor 300 can be either p-channel or n-channel.

[0309] A region in which a channel of the semiconductor region 313 is formed, a region in the vicinity thereof, a source region, or In the low resistance region 314a which becomes the drain region, and the low resistance region 314b, etc., It is preferable that the semiconductor material contains a silicon-based semiconductor, and it is preferable that the semiconductor material contains single crystal silicon. Or Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide) It may be made of materials such as gallium aluminum arsenide (GaAlAs) or Silicon with effective mass controlled by applying stress to the crystal lattice and changing the lattice spacing. Alternatively, GaAs and GaAlAs may be used to form a transistor. The Sta 300 is a HEMT (High Electron Mobility Transistor) stor) may also be used.

[0310] The low resistance region 314a and the low resistance region 314b are formed by applying a semiconductor In addition to the conductive material, elements that impart n-type conductivity, such as arsenic or phosphorus, or p-type conductivity, such as boron, are added. The material contains an element that imparts electrical conductivity to the mold.

[0311] The conductor 316 that functions as the gate electrode is made of arsenic, phosphorus, or the like that imparts n-type conductivity. An element, or a semiconductor material such as silicon that contains an element that gives it p-type conductivity, such as boron Conductive materials such as aluminum, metal, alloy, or metal oxide materials can be used. .

[0312] In addition, since the work function is determined by the material of the conductor, by changing the material of the conductor, The threshold voltage can be adjusted. Specifically, titanium nitride or tantalum nitride is used as the conductor. In order to achieve both electrical conductivity and embeddability, it is preferable to use a material such as a conductor. It is preferable to use a metal material such as tungsten or aluminum as a laminate. Tungsten is preferable in terms of heat resistance.

[0313] Note that the transistor 300 shown in FIG. 20 is just an example, and the present invention is not limited to this structure. Appropriate transistors may be used depending on the configuration and driving method.

[0314] Covering the transistor 300 are an insulator 320, an insulator 322, an insulator 324, and an insulator 326. The edge members 326 are stacked in order.

[0315] The insulators 320, 322, 324, and 326 may be, for example, an acid. silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, Aluminum oxynitride, aluminum nitride oxide, aluminum nitride, or the like may be used.

[0316] The insulator 322 serves to eliminate a step caused by the transistor 300 and the like provided below. For example, the upper surface of the insulator 322 may have a function as a planarizing film. In order to improve flatness, the surface is flattened by a planarization process using a chemical mechanical polishing (CMP) method or the like. It may be possible.

[0317] The insulator 324 is also provided with a substrate 311 or a transistor 300, etc. A film having a barrier property to prevent diffusion of hydrogen and impurities is formed in the area where the sta 200 is provided. It is preferable to use

[0318] An example of a film having a barrier property against hydrogen is silicon nitride formed by a CVD method. Here, a semiconductor having an oxide semiconductor such as the transistor 200 can be used. When hydrogen diffuses into a semiconductor element, the characteristics of the semiconductor element may deteriorate. A film that suppresses hydrogen diffusion is used between the transistors 200 and 300. Specifically, the film that suppresses hydrogen diffusion is a film that desorbs a small amount of hydrogen. do.

[0319] The amount of desorption of hydrogen can be analyzed, for example, by using thermal desorption spectroscopy (TDS). For example, the amount of hydrogen desorbed from the insulator 324 can be calculated by TDS analysis. In the range of 50°C to 500°C, the amount of desorption converted to hydrogen atoms is Converted to a hit, it's 10 x 10 15 atoms / cm 2 Less than or equal to 5×10 15 a toms / cm 2 The following is acceptable.

[0320] It is preferable that the insulator 326 has a lower dielectric constant than the insulator 324. For example, The dielectric constant of the insulator 326 is preferably less than 4, more preferably less than 3. The relative dielectric constant of the insulator 326 is preferably 0.7 times or less than the relative dielectric constant of the insulator 324, and more preferably 0.6 times or less. It is more preferable to use a material with a low dielectric constant as the interlayer film to reduce the parasitic capacitance between wirings. It can be reduced.

[0321] In addition, the insulators 320, 322, 324, and 326 are made of transistors. A conductor 328 electrically connected to the sintered body 300 and a conductor 330 are embedded in the sintered body 300. The conductor 328 and the conductor 330 function as plugs or wiring. In the case of a conductor functioning as a plug or wiring, a plurality of structures are collectively given the same reference numeral. In addition, in the present specification and the like, a wiring and a plug electrically connected to the wiring may be In other words, a part of the conductor functions as a wiring, and In some cases, a body part may act as the plug.

[0322] The materials of the plugs and wiring (the conductors 328 and 330, etc.) are metal. Conductive materials such as metals, alloys, metal nitrides, or metal oxides are applied in a single layer or in a Materials such as tungsten and molybdenum, which have both heat resistance and electrical conductivity, can be used. It is preferable to use any high melting point material, and it is preferable to use tungsten. It is preferable to form the conductive member from a low resistance material such as aluminum or copper. By using this material, the wiring resistance can be reduced.

[0323] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. In the insulating layer 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, a conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 functions as a plug or wiring. The conductor 328 and the conductor 330 can be formed using similar materials.

[0324] For example, the insulator 350 has a barrier property against hydrogen, similar to the insulator 324. It is preferable to use an insulator having a barrier property against hydrogen as the conductor 356. In particular, the insulator 350 having a barrier property against hydrogen is useful. A conductor having a barrier property against hydrogen is formed in the opening. The transistor 300 and the transistor 200 can be separated by a barrier layer. This makes it possible to suppress the diffusion of hydrogen from the transistor 300 to the transistor 200 .

[0325] As a conductor having a barrier property against hydrogen, for example, tantalum nitride or the like is used. In addition, by laminating tantalum nitride and highly conductive tungsten, The diffusion of hydrogen from the transistor 300 can be suppressed while maintaining the overall conductivity. In this case, the tantalum nitride layer having a barrier property against hydrogen is It is preferable that the insulating body 350 has a structure in which the insulating body 350 is in contact with the insulating body 350.

[0326] In the above, the wiring layer including the conductor 356 has been described. The memory device is not limited to this. Alternatively, five or more wiring layers similar to the wiring layer including the conductor 356 may be provided. stomach.

[0327] On the insulator 354, the insulator 210, the insulator 212, and the insulator 214 are laminated in this order. Any of the insulators 210, 212, and 214 is provided with an acid. It is preferable to use a material that has a barrier property against oxygen and hydrogen.

[0328] The insulator 210 may be made of the same material as the insulator 320. By using a material with a relatively low dielectric constant as the interlayer film, it is possible to reduce the parasitic capacitance that occurs between wiring. For example, a silicon oxide film or a silicon oxynitride film can be used as the insulator 212. It is possible.

[0329] The insulator 211 and the insulator 212 may include, for example, a substrate 311 or a transistor 312. Hydrogen and impurities diffuse from the region where the transistor 200 is provided to the region where the transistor 200 is provided. It is preferable to use a film having a barrier property that does not cause the insulator 324 to be insulated. Materials can be used.

[0330] As an example of a film that has a barrier property against hydrogen, silicon nitride formed by CVD method is used. Here, a semiconductor element having an oxide semiconductor, such as the transistor 200, However, the diffusion of hydrogen may deteriorate the characteristics of the semiconductor element. It is preferable to use a film that suppresses the diffusion of hydrogen between the stator 200 and the transistor 300. The film that suppresses the diffusion of hydrogen is preferably a film that desorbs a small amount of hydrogen.

[0331] As a film having a barrier property against hydrogen, for example, aluminum oxide is used for the insulator 214. It is preferable to use metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide.

[0332] In particular, aluminum oxide is highly resistant to oxygen and water, which can cause fluctuations in the electrical characteristics of transistors. It has a high blocking effect that does not allow impurities such as oxygen and moisture to pass through the membrane. Aluminum oxide is highly resistant to hydrogen, moisture, etc. during and after the transistor manufacturing process. This can prevent impurities from being mixed into the transistor 200. This can suppress the release of oxygen from the oxide that constitutes the 00. It is suitable for use as a protective film for the capacitor 200.

[0333] Also, the insulators 210, 211, 212, 214, and 21 6 includes a conductor 218, a conductor constituting a transistor 200, and a capacitance element 1 The conductor 218 is embedded in the transistor 20. 0 or the transistor 300. The conductor 218 may be formed using a material similar to that of the conductor 328 and the conductor 330. This can be done.

[0334] In particular, the insulator 210 and the conductor 218 in the area in contact with the insulator 214 are resistant to oxygen, hydrogen, It is preferable that the conductive material has a barrier property against water. The transistor 300 and the transistor 200 have a barrier property against oxygen, hydrogen, and water. The hydrogen from transistor 300 to transistor 200 can be separated by a layer having The diffusion of the substance can be suppressed.

[0335] A transistor 200 and a capacitor element 100 are provided above the insulator 214. Note that the structures of the transistor 200 and the capacitor 100 are the same as those described in the above embodiments. The transistor 200 and the capacitor 100 shown in FIG. The transistor 200 and the capacitance element 100 are merely examples, and the circuit configuration is not limited to these structures. Appropriate transistors and capacitors may be used depending on the configuration and driving method.

[0336] In addition, the conductor 240 is provided in contact with the conductor 218, so that the transistor 300 The conductor connected to the transistor 200 can be taken out above the transistor 200. In the above embodiment, the wiring 1002 is taken out above the transistor 200, but the present invention is not limited to this. In addition, the wiring 1001 or the wiring 1007 is arranged above the transistor 200. You may do so.

[0337] The above is a description of the configuration example. By using this configuration, In a semiconductor device using a transistor, the fluctuation of electrical characteristics is suppressed and the reliability is improved. It can be raised.

[0338] The configurations, structures, methods, etc. described in this embodiment may be different from the configurations, structures, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0339] (Embodiment 3) In this embodiment, a semiconductor device using an oxide according to one embodiment of the present invention will be described with reference to FIGS. 22 and 23. Transistors used as conductors (hereinafter sometimes referred to as OS transistors) and capacitive elements This section describes a storage device to which the OS is applied (hereinafter, sometimes referred to as an OS memory device). The OS memory device includes at least a capacitive element and an OS transistor that controls the charging and discharging of the capacitive element. The off-state current of the OS transistor is extremely small, so The memory device has excellent retention characteristics and can function as a non-volatile memory.

[0340] Generally, in semiconductor devices such as computers, various memory devices are used depending on the application. Figure 21 shows various storage devices by hierarchy. The lower the storage device, the larger the storage capacity and the higher the recording speed. In Figure 21, the density is calculated by dividing the number of registers by the number of registers. SRAM (Static Random Access Memory) mory), DRAM (Dynamic Random Access Memory) , showing 3D NAND memory.

[0341] The memory embedded as a register in a CPU or other arithmetic processing unit is used to temporarily store the results of calculations. Therefore, the frequency of access from the processor is high. The registers hold the setting information of the processor. It also has functions.

[0342] SRAM is used, for example, for caches. Caches are data held in main memory. It has the function of duplicating and storing part of the information stored in the cache. By duplicating the data, you can increase the speed at which data can be accessed.

[0343] DRAM is used, for example, as main memory. Main memory reads data from storage. DRAM has the function of storing programs and data. The recording density of DRAM is approximately 0.1~0.3Gbit / mm 2 It is.

[0344] 3D NAND memory is used, for example, for storage. Storage is for long-term storage. It has the function of storing necessary data and various programs used by the processing unit. Therefore, storage requires a larger memory capacity and a higher recording density rather than an increased operating speed. The recording density of memory devices used for storage is approximately 0.6 to 6.0 Gbit / m m 2 It is.

[0345] A storage device according to one embodiment of the present invention has high operating speed and can retain data for a long period of time. In one embodiment of the present invention, a storage device has a hierarchy in which a cache is located and a hierarchy in which a main memory is located. It can be suitably used as a storage device located in the boundary area 901 including both. The storage device according to one aspect of the present invention has a hierarchy in which a main memory is located and a hierarchy in which a storage is located. The memory device can be suitably used as a memory device located in the boundary area 902 including both of the above.

[0346] <Storage device configuration example> FIG. 22A shows an example of the configuration of an OS memory device. The memory device 1400 includes a peripheral circuit 1 411, and a memory cell array 1470. The peripheral circuit 1411 includes a row circuit 142 0, column circuit 1430, output circuit 1440, and control logic circuit 1460.

[0347] The column circuits 1430 include, for example, column decoders, precharge circuits, sense amplifiers, and write The precharge circuit has a function of precharging the wiring. The sense amplifier has a function of amplifying the data signal read from the memory cell. The above wiring is connected to the memory cells of the memory cell array 1470. The amplified data signal is output via an output circuit 1440 as a data signal. RDATA is output to the outside of the memory device 1400. For example, the memory device may have a row decoder, a word line driver circuit, etc., and may select a row to be accessed. do.

[0348] The storage device 1400 is supplied with a low power supply voltage (VSS) from the outside as a power supply voltage, and a peripheral circuit 14 11, and the high power supply voltage (VIL) for the memory cell array 1470. The storage device 1400 also receives control signals (CE, WE, RE), address signals, and The address signal ADDR and the data signal WDATA are input from the outside. The decoder and column decoder are input to the data decoder, and WDATA is input to the write circuit.

[0349] The control logic circuit 1460 processes external input signals (CE, WE, RE). It processes the row decoder and column decoder control signals and generates the row decoder and column decoder control signals. CE is the chip enable signal. where WE is a write enable signal and RE is a read enable signal. The signals processed by the control logic circuit 1460 are not limited to these. Instead, other control signals may be input as necessary.

[0350] The memory cell array 1470 includes a plurality of memory cells MC arranged in a matrix and a plurality of The wiring connecting the memory cell array 1470 and the row circuit 1420 is The number of lines is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc. The number of wirings connecting the memory cell array 1470 and the column circuit 1430 is It is determined by the configuration of the recell MC, the number of memory cells MC in one row, etc.

[0351] In FIG. 22A, the peripheral circuit 1411 and the memory cell array 1470 are arranged on the same plane. Although an example of forming the insulating film on a surface has been shown, the present embodiment is not limited to this. For example, as shown in FIG. 22B, the memory cell array 1411 is provided on a part of the peripheral circuit 1411. 70 may be provided so as to overlap the memory cell array 1470. For example, In this way, a sense amplifier may be provided.

[0352] 23A to 23C show examples of memory cell configurations that can be applied to the above-mentioned memory cell MC. I will explain it below.

[0353] [DOSRAM] 23A to 23C show examples of circuit configurations of memory cells in a DRAM. In this study, a DRAM using a memory cell of one OS transistor and one capacitor element type is called DOSRA. M(Dynamic Oxide Semiconductor Random Acc The memory cell 1471 shown in FIG. The transistor M1 has a gate (sometimes called a front gate) and a back gate.

[0354] A first terminal of the transistor M1 is connected to a first terminal of the capacitance element CA, and the transistor M The second terminal of the transistor M1 is connected to the wiring BIL, and the gate of the transistor M1 is connected to the wiring WOL. The back gate of the transistor M1 is connected to the wiring BGL. The second terminal of A is connected to the wiring CAL.

[0355] The wiring BIL functions as a bit line, and the wiring WOL functions as a word line. CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CA. When writing and reading data, a low level potential is applied to the wiring CAL. The wiring BGL is preferably used for applying a potential to the back gate of the transistor M1. By applying an arbitrary potential to the wiring BGL, The threshold voltage of M1 can be increased or decreased.

[0356] In addition, the memory cell MC is not limited to the memory cell 1471, and the circuit configuration may be changed. For example, the memory cell MC can be a memory cell 1472 shown in FIG. In addition, the back gate of the transistor M1 is connected to the wiring WOL instead of the wiring BGL. For example, the memory cell MC may be a memory cell 14 shown in FIG. As shown in FIG. 73, a transistor having a single gate structure, i.e., a transistor without a back gate, The memory cell may be configured with a resistor M1.

[0357] When the semiconductor device described in the above embodiment is used for the memory cell 1471 or the like, The transistor 200 is used as M1, and the capacitance element 100 is used as the capacitance element CA. By using an OS transistor as the transistor M1, This means that the leakage current of the transistor M1 can be made very low. The frequency of memory cell refresh can be reduced by using resistor M1 for long-term retention. In addition, the refresh operation of the memory cells can be eliminated. In addition, since the leakage current is very low, the memory cells 1471, 1472, The memory cell 1473 can hold multi-level data or analog data.

[0358] In addition, in the DOSRAM, as described above, By providing a sense amplifier as described above, the bit line can be shortened. This reduces the bit line capacitance and the storage capacitance of the memory cell.

[0359] The configurations, structures, methods, etc. described in this embodiment may be different from the configurations, structures, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0360] (Embodiment 4) This embodiment mode relates to an electronic component and an electronic device in which the memory device or the like shown in the above embodiment mode is incorporated. An example of a child device is shown.

[0361] <Electronic components> First, an example of an electronic component incorporating the storage device 1000 is shown in FIGS. This will be used to explain.

[0362] FIG. 24A shows an electronic component 700 and a substrate on which the electronic component 700 is mounted (a substrate 70 24(A) shows an oblique view of electronic component 700 having a memory device in mold 711. The memory device 1000 also includes a drive circuit layer 1500 and a plurality of memory The electronic component 700 has a memory layer 1200 having a memory cell array. The electronic component 700 is provided with a land on the outside of the mold 711. The land 712 is electrically connected to an electrode pad 713. 13 is electrically connected to the storage device 1000 by a wire 714. 0 is mounted on, for example, a printed circuit board 702. Then, each of them is electrically connected on the printed circuit board 702 to complete the mounting board 704. do.

[0363] FIG. 24B shows a perspective view of the electronic component 730. The electronic component 730 is a SiP (System in Package) em in package) or MCM (Multi Chip Module) This is an example. The electronic component 730 is mounted on a package substrate 732 (printed circuit board). A semiconductor device 735 and a plurality of memory cells are provided on the interposer 731. An apparatus 1000 is provided.

[0364] In the electronic component 730, the storage device 1000 is a high-bandwidth memory (HBM). In addition, the semiconductor device 735 is used as a 3-D MOS transistor. Integrated circuits (semiconductor devices) such as CPUs, GPUs, and FPGAs can be used.

[0365] The package substrate 732 is a ceramic substrate, a plastic substrate, or a glass epoxy substrate. The interposer 731 may be a silicon interposer, a resin interposer, or the like. A resin interposer or the like can be used.

[0366] The interposer 731 has a plurality of wirings and electrically connects a plurality of integrated circuits having different terminal pitches. The wiring has a function of electrically connecting the wiring. The wiring is provided in a single layer or in multiple layers. The interposer 731 supports the integrated circuit provided on the interposer 731 on the package substrate 7 The interposer has a function of electrically connecting to the electrode provided on the interposer. The interposer is sometimes called a "rewiring board" or "intermediate board." 1, a through electrode is provided, and the integrated circuit and the package substrate 732 are electrically connected by the through electrode. In addition, in silicon interposers, TSV ( Through Silicon Via can also be used.

[0367] It is preferable to use a silicon interposer as the interposer 731. Since there is no need to provide active elements in the interposer, it can be manufactured at a lower cost than an integrated circuit. On the other hand, the wiring of the silicon interposer is formed by the semiconductor process. This makes it easy to form fine wiring that is difficult to achieve with a resin interposer.

[0368] In HBM, a large number of wirings must be connected to achieve a wide memory bandwidth. For this reason, the interposer that mounts HBM requires fine, high-density wiring. Therefore, it is recommended to use a silicon interposer for mounting the HBM. is preferred.

[0369] In addition, in SiP and MCM using silicon interposers, the integrated circuit and the interposer The reliability is less likely to decrease due to the difference in the expansion coefficient between the silicon interposers. The silicon interposer has a highly flat surface, so the integrated circuit mounted on the silicon interposer and the silicon Connection failures between interposers are unlikely to occur. In particular, it is possible to mount multiple integrated circuits on an interposer. In a 2.5D package (2.5-dimensional mounting) where the devices are arranged side by side, the silicon interposer It is preferable to use the

[0370] A heat sink (heat dissipation plate) may be provided on top of the electronic component 730. When providing an interposer 731, it is preferable to align the height of the integrated circuits provided on the interposer 731. For example, in the electronic component 730 shown in this embodiment, the memory device 1000 and the semiconductor device 7 It is preferable to align the height of the 35.

[0371] In order to mount the electronic component 730 on another substrate, electrodes 733 are provided on the bottom of the package substrate 732. In FIG. 24B, an example in which the electrode 733 is formed using a solder ball is shown. By providing solder balls in a matrix on the bottom of the package substrate 732, a BGA (B In addition, the electrode 733 can be connected to a conductive pin. The bottom of the package substrate 732 may be provided with conductive pins in a matrix. This allows for pin grid array (PGA) implementation.

[0372] The electronic component 730 is not limited to BGA and PGA, and may be mounted on other substrates using various mounting methods. For example, SPGA (Staggered Pin Grid Arrangement) ray), LGA (Land Grid Array), QFP (Quad Flat Package), QFJ(Quad Flat J-leaded package) or QFN (Quad Flat Non-leaded package) A mounting method can be used.

[0373] This embodiment may be implemented in appropriate combination with the configurations described in other embodiments. is possible.

[0374] (Embodiment 5) In this embodiment mode, an application example of a memory device using the semiconductor device described in the above embodiment will be described. The semiconductor device described in the above embodiment is used in, for example, various electronic devices (e.g., Terminals, computers, smartphones, e-book readers, digital cameras (including video cameras) The present invention can be applied to storage devices such as video recorders, video recorders, and navigation systems. Here, the computer refers to a tablet computer, a notebook computer, or This includes desktop computers as well as large computers such as server systems. Alternatively, the semiconductor device according to the above embodiment may be used in a memory card (e.g., D card), USB memory, SSD (Solid State Drive) and other removable media This is applied to a removable storage device. Figures 25(A) to 25(E) show examples of the configuration of a removable storage device. For example, the semiconductor device shown in the above embodiment is a packaged memory cell. It is processed into memory chips and used in various storage devices and removable memory.

[0375] FIG. 25A is a schematic diagram of a USB memory. The USB memory 1100 has a housing 1101. 1102, a USB connector 1103, and a substrate 1104. 4 is housed in a housing 1101. For example, the substrate 1104 includes a memory chip 110 5, controller chip 1106 is attached. The semiconductor device described in the above embodiment can be incorporated into the semiconductor device 105 or the like.

[0376] FIG. 25(B) is a schematic diagram of the external appearance of an SD card, and FIG. 25(C) is a schematic diagram of the inside of an SD card. The SD card 1110 includes a housing 1111, a connector 1112, and a base. The substrate 1113 is housed in a housing 1111. For example, the substrate 11 13 has a memory chip 1114 and a controller chip 1115 attached thereto. By providing a memory chip 1114 on the back side of the substrate 1113, The capacity can be increased. In addition, a wireless chip having a wireless communication function is provided on the substrate 1113. This allows the host device and the SD card 1110 to wirelessly communicate with each other. This allows data to be read from and written to the memory chip 1114. The semiconductor device described in the above embodiment can be incorporated into the chip 1114 or the like.

[0377] FIG. 25(D) is a schematic diagram of the external appearance of the SSD, and FIG. 25(E) is a schematic diagram of the internal structure of the SSD. The SSD 1150 includes a housing 1151, a connector 1152, and a substrate 1153. The substrate 1153 is housed in the housing 1151. For example, the substrate 1153 has a The memory chip 1154, memory chip 1155, and controller chip 1156 are installed. The memory chip 1155 is a working memory for the controller chip 1156. For example, a DOSRAM chip may be used. By providing 54, the capacity of the SSD 1150 can be increased. The semiconductor device described in the above embodiment can be incorporated into the chip 1154 or the like.

[0378] The configurations, structures, methods, etc. described in this embodiment may be different from the configurations, structures, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0379] (Embodiment 6) In this embodiment, specific examples of electronic devices that can be used with the semiconductor device of one embodiment of the present invention will be described. This will be explained with reference to Figures 26(A) to (F).

[0380] More specifically, the semiconductor device according to one embodiment of the present invention includes a processor such as a CPU or a GPU. 26(A) to (F) show an embodiment of the present invention. Specific examples of electronic devices equipped with such processors, such as CPUs and GPUs, or chips, are given below.

[0381] <Electronic equipment and systems> A GPU or chip according to an embodiment of the present invention can be installed in various electronic devices. Examples of electronic devices include television sets, desktop or notebook computers, etc. Personal computers, computer monitors, digital signage tal Signage, large game machines such as pachinko machines, etc. In addition to electronic devices with large screens, digital cameras, digital video cameras, digital photos, Examples of the optical fiber include frames, mobile phones, portable game machines, personal digital assistants, and audio playback devices. Furthermore, by providing an integrated circuit or chip according to one embodiment of the present invention in an electronic device, It is possible to equip child devices with artificial intelligence.

[0382] The electronic device according to one embodiment of the present invention may include an antenna. By doing so, it is possible to display images and information on the display unit. And if a secondary battery is included, the antenna may be used for contactless power transmission.

[0383] The electronic device according to one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation Numbers, distance, light, liquids, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power (including the ability to measure radiation, flow rate, humidity, gradient, vibration, odor or infrared rays) It may have.

[0384] The electronic device according to one embodiment of the present invention can have various functions. Functions for displaying still images, videos, text images, etc. on the display, touch panel function, calendar Functions such as displaying date or time, running various software (programs) a function to read out a program or data recorded on a recording medium; The electronic device may have the following functions: Figures 26(A) to 26(F) show examples of the electronic device.

[0385] [mobile phone] FIG. 26(A) illustrates a mobile phone (smartphone), which is a type of information terminal. The information terminal 5500 includes a housing 5510 and a display unit 5511. As an interface, a touch panel is provided on the display unit 5511, and buttons are provided on the housing 551. It is provided at 0.

[0386] The information terminal 5500 uses artificial intelligence by applying the chip according to one embodiment of the present invention. It can run applications that use artificial intelligence. For example, an application that recognizes a conversation and displays the conversation content on the display unit 5511. The display unit 5511 recognizes characters, figures, etc. input by the user on the touch panel. The application to be displayed on the display unit 5511 and the application to perform biometric authentication such as fingerprint or voiceprint are displayed. Applications, etc.

[0387] [Information terminal 1] FIG. 26B shows a desktop information terminal 5300. The information terminal 5300 includes a main body 5301 of the information terminal, a display 5302, and a keyboard. The present invention has a first embodiment and a second embodiment.

[0388] The desktop information terminal 5300 is similar to the information terminal 5500 described above. By applying the chip of the present invention, it is possible to execute applications using artificial intelligence. Examples of applications that use artificial intelligence include design support software. , writing correction software, automatic menu generation software, etc. By using the laptop 5300, it is possible to develop new artificial intelligence.

[0389] In the above description, a smartphone and a desktop information terminal are used as examples of electronic devices. As shown in Figures 26(A) and 26(B), the smartphone and desktop The present invention can be applied to information terminals other than personal information terminals. Examples of information terminals other than personal information terminals include PDAs (Personal Digital Assistants). Assistant), notebook type information terminal, and workstation.

[0390] [electric appliances] FIG. 26(C) shows an electric refrigerator-freezer 5800, which is an example of an electric appliance. The refrigerator 5800 includes a housing 5801, a door for a refrigerator compartment 5802, a door for a freezer compartment 5803, etc. do.

[0391] By applying the chip of one embodiment of the present invention to the electric refrigerator-freezer 5800, artificial intelligence By utilizing artificial intelligence, The Electric Freezer Refrigerator 5800 is a refrigerator that can store food and drink. It also has a function to automatically generate menus based on the expiration date of ingredients, and a function to automatically generate menus based on the expiration date of ingredients, and the ... It can also have a function to automatically adjust the temperature to suit the ingredients being cooked.

[0392] In this example, an electric refrigerator-freezer is described as an electrical appliance, but other electrical appliances may also be used. Examples include vacuum cleaners, microwave ovens, electric ovens, rice cookers, water heaters, and induction cookers. , water servers, heating and cooling appliances including air conditioners, washing machines, dryers, Examples include audiovisual equipment.

[0393] [Game consoles] FIG. 26(D) shows a portable game machine 5200, which is an example of a game machine. The computer includes a housing 5201, a display portion 5202, buttons 5203, and the like.

[0394] By applying a GPU or chip according to one embodiment of the present invention to the portable game console 5200, It is possible to realize a portable game machine 5200 with low power consumption. In addition, the low power consumption allows: Since heat generation from the circuit can be reduced, the circuit itself, peripheral circuits, and The impact on the module can be reduced.

[0395] Furthermore, by applying a GPU or chip according to one embodiment of the present invention to the portable game machine 5200, This makes it possible to realize a portable game machine 5200 having artificial intelligence.

[0396] Originally, the game progress, the behavior of the creatures that appear in the game, the phenomena that occur in the game, etc. The expression is determined by the program that the game has, but the portable game machine 520 By applying artificial intelligence to 0, it is possible to express things in ways that are not limited to game programs. For example, the content of the player's questions, the game progress, the time, the characters that appear in the game, This makes it possible to express things such as a person's behavior changing as they change.

[0397] In addition, when playing a game that requires multiple players on the portable game machine 5200, the artificial intelligence This allows you to create anthropomorphic game players, so you can make your opponents artificially intelligent. By making the game a game player, you can play the game by yourself.

[0398] In FIG. 26(D), a portable game machine is illustrated as an example of a game machine. The game machine to which the GPU or chip of the present invention is applied is not limited to this. Examples of game machines that apply PU or chips include home game machines, Arcade game machines installed in entertainment facilities (game centers, amusement parks, etc.), sports facilities Examples include pitching machines for batting practice that will be installed in the stadium.

[0399] [Mobile object] The GPU or chip of one embodiment of the present invention is used in automobiles, which are moving objects, and in the vicinity of the driver's seat of the automobile. can be applied to.

[0400] FIG. 26(E1) shows an automobile 5700 as an example of a moving object, and FIG. 26(E2) shows an automobile FIG. 26(E2) is a diagram showing the area around the windshield in the interior of a vehicle. The display panels 5701, 5702, and 5703 are attached to the board. Also shown is a pillar mounted display panel 5704.

[0401] The display panels 5701 to 5703 display a speedometer, a tachometer, It can provide various information by displaying the distance traveled, fuel gauge, gear status, air conditioning settings, etc. In addition, the display items and layout displayed on the display panel can be adjusted to suit the user's preferences. The display panel can be changed as needed to suit the needs of the user, making it possible to enhance the design. The display panels 5701 to 5703 can also be used as lighting devices.

[0402] The display panel 5704 displays images from an imaging device (not shown) installed in the automobile 5700. By projecting images, it is possible to compensate for blind spots that are blocked by pillars. That is, by displaying an image from an imaging device provided on the outside of the automobile 5700, This can compensate for blind spots and increase safety. By doing so, the driver can check for safety more naturally and without feeling uneasy. 4 can also be used as a lighting device.

[0403] The GPU or chip of one embodiment of the present invention can be applied as a component of artificial intelligence, e.g. For example, the chip can be used in the autonomous driving system of the 5700 automobile. The chip can be used in systems that provide road guidance, risk prediction, etc. Display panel 57 The display panels 5701 to 5704 are configured to display information such as road guidance and risk prediction. Good too.

[0404] In the above description, an automobile is used as an example of a moving object. For example, the moving object may be a train, a monorail, a ship, an aircraft (helicopter, etc.) These include drones, unmanned aerial vehicles (drones), airplanes, and rockets. Applying the chip of one embodiment of the present invention to a moving object and providing a system using artificial intelligence can be done.

[0405] [Broadcasting System] The GPU or chip according to one embodiment of the present invention can be applied to a broadcasting system.

[0406] FIG. 26(F) shows a schematic diagram of data transmission in a broadcasting system. Specifically, FIG. 26(F) shows how radio waves (broadcast signals) transmitted from a broadcast station 5680 are received by televisions in each home. The diagram shows the path of the signal until it reaches the TV receiving device (TV) 5600. A broadcast signal received by an antenna 5650 is transmitted to the receiving device (not shown). The signal is then transmitted to the TV5600 via the

[0407] In FIG. 26(F), the antenna 5650 is a UHF (Ultra High Frequency) The antenna shown is a BS 110°CS Antennas and CS antennas can also be applied.

[0408] Radio waves 5675A and 5675B are broadcast signals for terrestrial broadcasting, and radio tower 5670 The received radio wave 5675A is amplified and radio wave 5675B is transmitted. By receiving radio waves 5675B with the Na5650, you can watch terrestrial TV broadcasts with the TV5600. The broadcasting system is not limited to the terrestrial broadcasting shown in FIG. 26(F), but may be any other broadcasting system. It may also be satellite broadcasting using an industrial satellite, data broadcasting via optical fiber lines, or the like.

[0409] The above-mentioned broadcasting system applies the chip according to one embodiment of the present invention to broadcast programs using artificial intelligence. The broadcasting station 5680 transmits broadcast data to the TV 5600 in each home. When the encoder is turned on, the broadcast data is compressed, and the antenna 5650 receives the broadcast data. When the data is received, the decoder of the receiving device included in the TV 5600 converts the broadcast data into By using artificial intelligence, for example, the compression method of the encoder can be improved. In motion compensation prediction, which is one of the methods, the recognition of display patterns contained in the displayed image It is also possible to perform intraframe prediction using artificial intelligence. For example, low-resolution broadcast data is received and the high-resolution TV5600 displays that broadcast data. When displaying the image, the decoder restores the broadcast data by performing up-conversion, etc. Image interpolation can be performed.

[0410] The AI-based broadcasting system described above is expected to be useful in the future, as the amount of broadcast data increases. It is suitable for revision (UHDTV: 4K, 8K) broadcasting.

[0411] In addition, as an application of artificial intelligence on the TV5600 side, for example, A recording device having the above-mentioned function may be provided. By having artificial intelligence learn the user's preferences, the system can automatically record programs that match the user's preferences. It is possible to draw

[0412] Electronic device described in the present embodiment, functions of the electronic device, application examples of artificial intelligence, and effects thereof etc. can be appropriately combined with the descriptions of other electronic devices.

[0413] The configurations, structures, methods, etc. described in this embodiment may be different from the configurations, structures, methods, etc. described in other embodiments. They can be used in appropriate combination. [Explanation of symbols]

[0414] 60 cells 61 Cells 100 Capacitive element 100a Capacitive element 100b Capacitive element 200 Transistors 200a transistor 200b transistor 204 Conductors 204_1 Conductor 204_2 Conductors 204a Conductor 204b Conductor 205 Conductors 205a Conductor 205b Conductor 210 Insulators 211 Insulators 212 Insulators 214 Insulators 216 Insulators 218 Conductors 222 Insulators 224 Insulators 230 Oxides 230a Oxide 230A Oxide film 230b Oxide 230B Oxide film 230c oxide 230C oxide film 238 Aperture 240 Conductors 241 Insulators 242 Conductors 242a Conductor 242A conductor layer 242b Conductor 242c conductor 243 Oxide 243a Oxide 243A Oxide film 243b Oxide 243B Oxide layer 246 Conductors 250 Insulator 250A Insulating Film 260 Conductors 260a Conductor 260Aa conductive film 260Ab conductive film 260b conductor 272 Insulators 273 Insulators 274 Insulators 280 Insulator 282 Insulators 283 Insulators 284 Insulators 287 Insulators 300 Transistors 311 Substrate 313 Semiconductor area 314a Low resistance area 314b Low resistance region 315 Insulators 316 Conductors 320 Insulator 322 Insulators 324 Insulators 326 Insulators 328 Conductors 330 Conductors 350 Insulator 352 Insulator 354 Insulators 356 Conductors 430 Conductors 600 cell array 600_n Cell Array 600_1 Cell Array 700 Electronic Components 702 Printed Circuit Board 704 Mounting Board 711 Mold 712 rand 713 Electrode Pads 714 Wire 730 Electronic Components 731 Interposer 732 Package Substrate 733 Electrode 735 Semiconductor Devices 901 Boundary area 902 Boundary area 1000 storage devices 1001 Wiring 1002 Wiring 1003 Wiring 1004 Wiring 1005 Wiring 1006 Wiring 1007 Wiring 1100 USB memory 1101 Case 1102 Cap 1103 USB connector 1104 Substrate 1105 Memory Chip 1106 Controller Chip 1110 SD card 1111 Case 1112 Connector 1113 Substrate 1114 Memory Chip 1115 Controller Chip 1150 SSD 1151 Case 1152 Connector 1153 PCB 1154 memory chip 1155 memory chip 1156 controller chip 1200 storage layer 1400 storage device 1411 Peripheral circuits 1420 row circuit 1430 column circuit 1440 Output circuit 1460 Control Logic Circuit 1470 Memory Cell Array 1471 Memory Cell 1472 memory cells 1473 Memory Cells 1500 Drive circuit layer 5200 Handheld Game Console 5201 Case 5202 Display section 5203 Button 5300 Desktop Information Terminal 5301 Main unit 5302 Display 5303 Keyboard 5500 Information terminal 5510 Case 5511 Display section 5600 TV 5650 Antenna 5670 radio tower 5675A radio wave 5675B Radio 5680 Broadcasting Station 5700 Automobiles 5701 Display Panel 5702 Display Panel 5703 Display Panel 5704 Display Panel 5800 Electric refrigerator-freezer 5801 Case 5802 Refrigerator door 5803 Freezer door

Claims

[Claim 1] A semiconductor device including a transistor and a capacitor element electrically connected to the transistor, The transistor is a first conductor and a second insulator on a first insulator; a third insulator on the first conductor and on the second insulator; and a fourth insulator on the third insulator; and a first oxide on the fourth insulator; and a second oxide and a third oxide on the first oxide; a second conductor in contact with an upper surface of the third insulator, a side surface of the fourth insulator, a side surface of the first oxide, a side surface of the second oxide, and an upper surface of the second oxide; a third conductor in contact with an upper surface of the third insulator, a side surface of the fourth insulator, a side surface of the first oxide, a side surface of the third oxide, and an upper surface of the third oxide; a fourth oxide on the first oxide; and a fifth insulator on the fourth oxide; and a fourth conductor on the fifth insulator; The capacitive element is a fifth conductor on the first insulator; and the third insulator on the fifth conductor; and the second conductor on the third insulator.

Images