Semiconductor device

Abstract

To provide a semiconductor device capable of accurately transmitting a potential of a node to a detection circuit.SOLUTION: A semiconductor device 1 includes: detection nodes 103 and 105 having a potential corresponding to an input voltage; detection circuits 20a and 20b for detecting the potential of the detection node; switch circuits 15a and 15b having a P-channel type MOS transistor and a pull-up resistor whose one end is connected to a gate of the MOS transistor, which are arranged between the detection node and the detection circuit; and connection paths 110 and 112 for connecting the detection node and a source of the MOS transistor. The potential corresponding to the input voltage is supplied to the other end of the pull-up resistor through a path different from the connection path, and thereby, the gate of the MOS transistor is pulled up so that the MOS transistor is off. When the MOS transistor is on, the potential of the detection node is transmitted to the detection circuit through the connection path and the MOS transistor.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device. [Background technology]

[0002] MOS (Metal Oxide Semiconductor) transistors have conventionally been used as switching elements in semiconductor devices (see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2018-78710 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, the present inventors have come to recognize the following problem. In a circuit of a semiconductor device, it is sometimes desired to detect the potential of a specific node. In this case, it is conceivable to place a switch including a MOS transistor between the detection circuit and the node so that the detection circuit for detecting this potential can be connected to the node as necessary. The present inventors have come to recognize that the operation of this switch may make it impossible to transmit the potential of the node to be detected to the detection circuit with high accuracy.

[0005] The present disclosure has been made in view of the above circumstances, and one of its exemplary objectives is to provide a semiconductor device capable of transmitting the potential of a node to a detection circuit with high accuracy. [Means for solving the problem]

[0006] A semiconductor device according to an embodiment of the present disclosure includes a detection node at a potential corresponding to an input voltage, a detection circuit for detecting the potential of the detection node, a switch circuit having a P-channel MOS transistor and a pull-up resistor having one end connected to the gate of the MOS transistor, which is disposed between the detection node and the detection circuit, and a connection path connecting the detection node and the source of the MOS transistor. The gate of the MOS transistor is pulled up so that the MOS transistor is turned off by supplying a potential corresponding to the input voltage to the other end of the pull-up resistor through a path separate from the connection path. When the MOS transistor is on, the potential of the detection node is transmitted to the detection circuit through the connection path and the MOS transistor.

[0007] Any combination of the above components and conversion of the expressions of the present disclosure between methods, devices, systems, etc. are also valid aspects of the present disclosure. Effect of the Invention

[0008] According to the present disclosure, it is possible to provide a semiconductor device capable of detecting the potential of a node with high accuracy. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a conceptual block diagram of a semiconductor device according to an embodiment of the present disclosure. [Diagram 2] FIG. 2 is a circuit diagram of a semiconductor device according to an embodiment of the present disclosure. [Diagram 3] FIG. 3 is a circuit diagram of a semiconductor device according to a comparative technique. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] (overview) A summary of some exemplary embodiments of the present disclosure will be described. This summary is intended to provide a simplified overview of some concepts of one or more embodiments for a basic understanding of the embodiments as a prelude to the detailed description that follows, and is not intended to limit the scope of the invention or disclosure. This summary is not intended to be an exhaustive overview of all possible embodiments, nor is it intended to identify key elements of all embodiments or to delineate the scope of some or all aspects. For convenience, the term "one embodiment" may be used to refer to one embodiment (example or variant) or multiple embodiments (examples or variants) disclosed in this specification.

[0011] A semiconductor device according to one embodiment includes a detection node at a potential corresponding to an input voltage, a detection circuit for detecting the potential of the detection node, a switch circuit having a P-channel MOS transistor and a pull-up resistor having one end connected to the gate of the MOS transistor, which are arranged between the detection node and the detection circuit, and a connection path connecting the detection node and the source of the MOS transistor. The gate of the MOS transistor is pulled up so that the MOS transistor is turned off by supplying a potential corresponding to the input voltage to the other end of the pull-up resistor through a path separate from the connection path. When the MOS transistor is on, the potential of the detection node is transmitted to the detection circuit through the connection path and the MOS transistor.

[0012] With this configuration, the gate of the MOS transistor is pulled up through a path separate from the connection path, so that even if a current flows through the pull-up resistor, the potential in the connection path is not affected by the current, and as a result, the potential of the detection node can be transmitted to the detection circuit with high accuracy.

[0013] In one embodiment, the semiconductor device may further include an input node to which an input voltage is supplied, an operation circuit that operates based on a voltage corresponding to the input voltage, and a current detection resistor arranged between the input node and the operation circuit for detecting a current flowing between the input node and the operation circuit.

[0014] In one embodiment, the detection node may be the operating circuit end of the current detection resistor, and the other end of the pull-up resistor may be connected to the input node end of the current detection resistor.

[0015] In one embodiment, the switch circuit may further include an N-channel MOS transistor, the drain of the N-channel MOS transistor being connected to one end of the pull-up resistor and the source of the N-channel MOS transistor being arranged so that a ground potential is supplied to the drain of the N-channel MOS transistor.

[0016] In one embodiment, the P-channel MOS transistor may be a P-channel DMOS (Double Diffused Metal Oxide Semiconductor) transistor.

[0017] In one embodiment, the semiconductor device may further include a control circuit that controls an operation of the switch circuit such that the P-channel MOS transistor is turned on when the input voltage is lower than a predetermined voltage.

[0018] (Embodiment) Hereinafter, preferred embodiments will be described with reference to the drawings. The same or equivalent components, parts, and processes shown in each drawing will be given the same reference numerals, and duplicated descriptions will be omitted as appropriate. In addition, the embodiments are illustrative and do not limit the disclosure and invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the disclosure and invention.

[0019] Fig. 1 is a conceptual block diagram of a semiconductor device 1 according to an embodiment of the present disclosure. As shown in Fig. 1, the semiconductor device 1 according to the embodiment includes a detection target circuit 10, a switch circuit 15, a detection circuit 20, and a control circuit 30. The detection target circuit 10 is connected to the detection circuit 20 via the switch circuit 15.

[0020] The detected circuit 10 has a functional circuit C and a detection node Ns connected to the functional circuit C. The functional circuit C may have any function and any configuration.

[0021] The control circuit 30 controls the operation of the switch circuit 15. Specifically, the control circuit 30 transmits an enable signal EN to the switch circuit 15 to control the on / off of the switch circuit 15. The detection node Ns of the circuit C is connected to the detection circuit 20 when the switch circuit 15 is on.

[0022] The detection circuit 20 detects the potential of the detection node Ns transmitted through the switch circuit 15 when the switch circuit 15 is on.

[0023] A specific circuit configuration and functions of the semiconductor device 1 according to an embodiment of the present disclosure will be described with reference to Fig. 2. Fig. 2 is a circuit diagram of the semiconductor device 1 according to an embodiment of the present disclosure. The semiconductor device 1 may constitute, for example, an LSI (Large Scale Integration). As shown in Fig. 2, the semiconductor device 1 according to this embodiment includes a detected circuit 10, a first switch circuit 15a, a second switch circuit 15b, a first detection circuit 20a, and a second detection circuit 20b.

[0024] The detected circuit 10 mainly includes an input node 100, an input path 101, an operational circuit 102, a current detection resistor 104, a switch 106, a comparator 108, a first connection path 110, a second connection path 112, a third connection path 114, and a fourth connection path 116.

[0025] An input voltage VIN is supplied from a power supply (not shown) to the input node 100. The power supply may be, for example, a DC / DC converter.

[0026] The operational circuit 102 is a device that operates based on a voltage corresponding to the input voltage V IN. The operational circuit 102 may be, for example, a linear regulator such as an LDO (Low Drop Out) having a power transistor.

[0027] The current detection resistor 104 is disposed between the input node 100 and the operation circuit 102 in order to detect the magnitude of a current flowing between the input node 100 and the operation circuit 102. An end of the current detection resistor 104 on the operation circuit 102 side is referred to as a first end 103, and an end of the current detection resistor 104 on the input node 100 side is referred to as a second end 105. The first end 103 is connected to the input node 100 via an input path 101. The second end 105 is connected to the operation circuit 102 (specifically, a power transistor or the like). Each of the first end 103 and the second end 105 is a detection node at a potential corresponding to the input voltage VIN. Hereinafter, the potential of the first end 103 is referred to as Vsa, and the potential of the second end 105 is referred to as Vsb.

[0028] The first connection path 110 is provided such that one end is connected to the first end 103 and the other end is connected to the first switch circuit 15a. The second connection path 112 is provided such that one end is connected to the second end 105 and the other end is connected to the second switch circuit 15b. The third connection path 114 is provided such that one end is connected to the input path 101 and the other end is connected to the first switch circuit 15a. The fourth connection path 116 is provided such that one end is connected to the input path 101 and the other end is connected to the second switch circuit 15b.

[0029] The comparator 108 is provided to detect an overcurrent in the operational circuit 102 based on the voltage across the current detection resistor 104. The comparator 108 is provided such that an inverting input terminal is connected to a first connection node 107 in the middle of the first connection path 110, and a non-inverting input terminal is connected to a second connection node 109 in the middle of the second connection path 112.

[0030] The switch 106 is provided in the first connection path 110 between the first end 103 and the first connection node 107. When the switch 106 is on, the potential Vsa of the first end 103 is transmitted to the non-inverting input terminal of the comparator 108 and the first switch circuit 15a through the first connection path 110. When the switch 106 is off, the first end 103 is cut off from the non-inverting input terminal of the comparator 108 and the first switch circuit 15a. In the following, various configurations will be described assuming that the switch 106 is on.

[0031] The comparator 108 outputs an output voltage Vocp according to the voltage across the current detection resistor 104. The output voltage Vocp is input to an overcurrent protection circuit (not shown). The overcurrent protection circuit can detect the current flowing through the current detection resistor 104 according to the output voltage Vocp, and specifically, can determine whether or not an overcurrent is flowing through the performance circuit 102. The overcurrent protection circuit may control the operation of the performance circuit 102 according to the result of the determination.

[0032] The first switch circuit 15a is disposed between the detected circuit 10 and the first detection circuit 20a. The first switch circuit 15a has transistors 150a and 152a and a pull-up resistor 154a. The transistor 150a is a P-channel MOS transistor. The transistor 152a is an N-channel MOS transistor. In this specification, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is referred to as a MOS transistor.

[0033] In this embodiment, the transistor 150a is a P-channel type double diffused metal oxide semiconductor (DMOS) transistor, and the transistor 150b is an N-channel type DMOS transistor, thereby enabling the first switch circuit 15a to withstand a high voltage.

[0034] The transistor 150a is provided such that its source is connected to the first connection path 110 and its drain is connected to the first detection circuit 20a. The pull-up resistor 154a may have a resistance value of, for example, about 1 MΩ. The pull-up resistor 154a is provided such that one end is connected to the gate of the transistor 150a and the other end is connected to the third connection path 114. The transistor 152a is provided such that a ground potential is supplied to its source and that its drain is connected to the gate of the transistor 150a. The transistor 152a is turned on or off in response to an enable signal EN1a input to its gate. The enable signal EN1a may be transmitted from the control circuit 30.

[0035] When the transistor 152a is off, a potential according to the input voltage VIN is supplied to the gate of the transistor 150a through the third connection path 114 and the pull-up resistor 154a, and the gate is pulled up. At this time, the potential Vsa of the first end 103 is supplied to the source of the transistor 150a through the first connection path 110. The potential Vsa of the first end 103 is lower than the potential of the input node 100 by the amount of the voltage drop in the current detection resistor 104. Therefore, when the transistor 152a is off, the potential of the gate of the transistor 150a is higher than the potential of the source, and therefore the transistor 150a is turned off.

[0036] When the transistor 152a is on, a potential close to the ground potential is supplied to the gate of the transistor 150a through the transistor 152a. As a result, the source potential of the transistor 150a becomes higher than the gate potential, and the transistor 150a is turned on. At this time, a current I1 flows from the input node 100 to the pull-up resistor 154a through the third connection path 114. When the transistor 150a is turned on, the potential Vsa of the first end 103 of the current detection resistor 104 is transmitted to the first detection circuit 20a through the first connection path 110 and the first switch circuit 15a (specifically, the transistor 150a).

[0037] A circuit element having a relatively low withstand voltage (for example, about 5 V) may be used in the circuit configuration (for example, the first detection circuit 20a) subsequent to the first switch circuit 15a. If the input voltage VIN is a voltage (for example, about 20 V) higher than the withstand voltage of the circuit element, when the first switch circuit 15a is turned on, a voltage according to the input voltage VIN is transmitted to the first detection circuit 20a, which may cause a malfunction in the circuit element of the first detection circuit 20a.

[0038] Therefore, the control circuit 30 may control the operation of the first switch circuit 15a so that the transistor 150a is turned on only when the input voltage VIN is within a predetermined voltage range. Specifically, the control circuit 30 may turn on the transistor 152a when the input voltage VIN is lower than a predetermined voltage (for example, the withstand voltage of the circuit elements of the first detection circuit 20a). This prevents a potential that may cause a malfunction in the circuit elements from being transmitted to the detection circuit 20a. As a result, a semiconductor device 1 with a high withstand voltage can be realized.

[0039] The first detection circuit 20a is a circuit for detecting the potential Vsa of the first end 103 of the detected circuit 10. The first detection circuit 20a according to the present embodiment includes switches 200a to 206a, transistors 210a to 216a, and resistance elements 220a and 222a.

[0040] The switches 200a, 202a, 204a, and 206a are connected in series in this order starting from the first switch circuit 15a. One end of the switch 200a on the first switch circuit 15a side is connected to the drain of the transistor 150a. One end of the switch 206a opposite to the first switch circuit 15a is connected to the transistors 210a and 216a.

[0041] A monitor circuit (not shown) is connected between the switch 200a and the switch 202a. When the switch 200a is on and the transistor 150a of the first switch circuit 15a is on, a potential Vma corresponding to the potential Vsa of the first end 103 of the detected circuit 10 is transmitted to the monitor circuit.

[0042] The transistors 210a and 212a are P-channel MOS transistors. The transistors 214a and 216a are N-channel MOS transistors. The transistor 210a is provided such that its source is connected to one end of the resistor element 220a, its gate is connected to the other end of the resistor element 220a, and its drain is connected to one end of the switch 206. The transistor 212a is provided such that its source is connected to one end of the resistor element 220a, its gate is connected to the other end of the resistor element 220a, and its drain is connected to one end of the resistor element 222a. The transistor 214a is provided such that its source is connected to ground and its drain is connected to the gates of the transistors 210a and 212a. The transistor 216a is provided between the switch 206a and the resistor element 222a. The other end of the resistor element 222a is connected to an output pin (not shown), and the transistor 216a outputs an output signal Vga to the output pin.

[0043] When an enable signal EN2a is input to the gate of the transistor 214a, the transistor 214a is turned on. When the transistor 214a is on, a potential close to the ground potential is supplied to the gates of the transistors 210a and 212a through the transistor 214a, and the transistors 210a and 212a are turned on. As a result, a potential corresponding to the potential transmitted to the first detection circuit 20a through the first switch circuit 15a is transmitted to the other end of the resistance element 222a through the transistors 210a, 212a and the resistance element 222a.

[0044] When an enable signal EN3a is input to the gate of the transistor 216a, the transistor 216a is turned on. As a result, a potential corresponding to the potential transmitted to the first detection circuit 20a through the first switch circuit 15a is transmitted to the other end of the resistance element 222a through the transistor 216a and the resistance element 222a.

[0045] The second switch circuit 16b includes transistors 150b and 152b and a pull-up resistor 154b. The transistor 150b is a P-channel MOS transistor. The transistor 152b is an N-channel MOS transistor. In this embodiment, the transistors 150b and 152b are each configured as a DMOS transistor. This allows the second switch circuit 15b to withstand a high voltage.

[0046] The transistor 150b is provided such that its source is connected to the second connection path 112 and its drain is connected to the second detection circuit 20b. The pull-up resistor 154b is provided such that one end is connected to the gate of the transistor 150b and the other end is connected to the fourth connection path 116. The transistor 152b is provided such that a ground potential is supplied to its source and that its drain is connected to the gate of the transistor 150b. The transistor 152b is turned on or off in response to an enable signal EN1b input to its gate. The enable signal EN1b may be transmitted from the control circuit 30.

[0047] When the transistor 152b is off, a potential corresponding to the input voltage VIN is supplied to the gate of the transistor 150b through the fourth connection path 116 and the pull-up resistor 154b. At this time, the potential Vsb of the second end 105 is supplied to the source of the transistor 150b through the second connection path 112. Therefore, when the transistor 152b is off, the potential of the gate is equal to the potential of the source in the transistor 150b, and the transistor 150b is off.

[0048] When the transistor 152b is on, a potential close to the ground potential is supplied to the gate of the transistor 150b through the transistor 152b. As a result, the source potential of the transistor 150b becomes higher than the gate potential, and the transistor 150b is turned on. At this time, a current I2 flows from the input node 100 to the pull-up resistor 154b through the fourth connection path 116. When the transistor 150b is turned on, the potential Vsb of the second end 105 of the current detection resistor 104 is transmitted to the second detection circuit 20b through the second connection path 112 and the second switch circuit 15b (specifically, the transistor 150b).

[0049] The second detection circuit 20b is a circuit for detecting the potential Vsb of the second end 105 of the detected circuit 10. The second detection circuit 20b has switches 200b to 206b, transistors 210b to 216b, and resistance elements 220b and 222b. The switches 200b to 206b, transistors 210b to 216b, and resistance elements 220b and 222b of the second detection circuit 20b may be configured and arranged similarly to the switches 200a to 206a, transistors 210a to 216a, and resistance elements 220a and 222a of the first detection circuit 20a.

[0050] A monitor circuit (not shown) is connected between the switch 200b and the switch 202b. When the switch 200b is on and the transistor 150b of the second switch circuit 15b is on, a potential Vmb corresponding to the potential Vsb of the second end 105 of the detected circuit 10 is transmitted to the monitor circuit. An output pin (not shown) is connected to the resistor element 222b, and an output signal Vgb is output to the output pin.

[0051] The potentials Vma and Vmb detected through the first detection circuit 20a and the second detection circuit 20b may be used to confirm whether the overcurrent protection circuit in the semiconductor device 1 is operating as designed. The magnitude of the current flowing through the current detection resistor 104 can be estimated based on the resistance value of the current detection resistor 104 and the difference between the potentials Vma and Vmb. The comparator 108 receives a voltage across the current detection resistor 104, and the comparator 108 and the overcurrent protection circuit operate according to the voltage. By monitoring the potentials Vma and Vmb through the first detection circuit 20a and the second detection circuit 20b, it can be confirmed whether the current flowing through the current detection resistor 104 at the time when the operation of the comparator 108 is switched is as designed, and it can be confirmed whether the overcurrent protection circuit is operating as designed.

[0052] In the semiconductor device 1 according to this embodiment, a first end 103 (detection node) of the current detection resistor 104 and a source of a transistor 150a of a first switch circuit 15a are connected by a first connection path 110. A potential corresponding to an input voltage VIN is supplied to the other end of the pull-up resistor 154a through a third connection path 114 separate from the first connection path 110. As a result, the gate of the transistor 150a is pulled up so that the transistor 150a is turned off.

[0053] In this embodiment, the transistor 152a is turned on to draw a current I1 from the pull-up resistor 154a into the transistor 152a, thereby turning on the transistor 150a. At this time, the current I1 flows through the third connection path 114, but this current I1 does not affect the potential of the first connection path 110. Therefore, according to the semiconductor device 1 of this embodiment, the potential Vsa of the first end 103 can be transmitted to the first detection circuit 20a with high accuracy.

[0054] Furthermore, according to the semiconductor device 1 of this embodiment, the potential Vsb can be transmitted from the second end 105 to the second detection circuit 20b with high accuracy, similar to the transmission of the potential Vsa from the first end 103 to the first detection circuit 20a.

[0055] The first detection circuit 20a or a circuit at a subsequent stage may use a circuit element with a relatively low withstand voltage (for example, 5V or less). According to the semiconductor device 1 of this embodiment, the potential Vsa of the first end 103 is transmitted to the first detection circuit 20a through the first switch circuit 15a. When the input voltage VIN is higher than the withstand voltage of the circuit element used in the first detection circuit 20a or the like, the first switch circuit 15a is turned off, and when the input voltage VIN becomes lower than the withstand voltage of the circuit element, the first switch circuit 15a is turned on, thereby making it possible to protect the circuit element used in the first detection circuit 20a or the like. Similarly, the second switch circuit 15b can be operated to protect the circuit element such as the second detection circuit 20b.

[0056] (Comparative Technology) Fig. 3 is a circuit diagram of a semiconductor device 9 according to a comparative technique. In Fig. 3, components having substantially the same functions as those of the semiconductor device 1 according to the above embodiment are denoted by the same reference numerals, and descriptions thereof will be omitted as appropriate. The semiconductor device 9 according to the comparative technique differs from the semiconductor device 1 according to the above embodiment mainly in that it does not include the third connection path 114 and the fourth connection path 116 according to the above embodiment.

[0057] A semiconductor device 9 according to the comparative technique includes a detected circuit 90, a first switch circuit 95a, a second switch circuit 95b, a first detection circuit 20a, and a second detection circuit 20b.

[0058] The detected circuit 90 differs from the detected circuit 10 according to the above embodiment mainly in that it does not include the third connection path 114 and the fourth connection path 116 according to the above embodiment.

[0059] The first switch circuit 95a according to the comparative technique includes transistors 150a and 152a and a pull-up resistor 954a. One end of the pull-up resistor 954a is connected to the gate of the transistor 150a. The other end of the pull-up resistor 954a according to the comparative technique is connected to the first connection path 110, unlike the pull-up resistor 154a according to the above embodiment.

[0060] When the transistor 152a is off, the source potential and the gate potential of the transistor 150a are the same, so that the transistor 150a is off. When the transistor 152a is on, a potential close to the ground potential is supplied to the gate of the transistor 150a. As a result, the source potential of the transistor 150a becomes higher than the gate potential, so that the transistor 150a is on.

[0061] When the transistor 150a is on, a current I5 corresponding to the voltage between the source and gate of the transistor 150a flows through the pull-up resistor 954a. This current I5 is a current corresponding to the current I3 flowing from the first end 103 to the source of the transistor 150a through the first connection path 110. When the transistor 150a is on, a voltage drop occurs between the first end 103 and the source of the transistor 150a due to the current I3 flowing through the wiring resistance of the first connection path 110. As a result, a potential shifted by the voltage drop from the potential Vsa of the first end 103 is transmitted to the first detection circuit 20a, and a potential Vma9 is transmitted to a monitor circuit (not shown) through the first detection circuit 20a, and a potential Vga9 ​​is output.

[0062] In contrast, in the semiconductor device 1 according to the above embodiment, the current I1 flowing through the pull-up resistor 154a flows through the third connection path 114, which is different from the first connection path 110. Therefore, in the semiconductor device 1 according to the above embodiment, when the transistor 150a is on, no voltage drop occurs in the potential transmitted to the first detection circuit 20a due to the current I1 flowing through the pull-up resistor 154a. Therefore, in the semiconductor device 1 according to the above embodiment, the potential Vsa of the first end 103 can be transmitted to the first detection circuit 20a with high accuracy.

[0063] The second switch circuit 15b according to the comparative technique includes transistors 150b and 152b and a pull-up resistor 954b. One end of the pull-up resistor 954b is connected to the gate of the transistor 150b. The other end of the pull-up resistor 954b according to the comparative technique is connected to the second connection path 112, unlike the pull-up resistor 154b according to the above embodiment.

[0064] When the transistor 152b is off, the source potential and the gate potential of the transistor 150b are the same, so that the transistor 150b is off. When the transistor 152b is on, a potential close to the ground potential is supplied to the gate of the transistor 150b via the transistor 152b. As a result, the source potential of the transistor 150b becomes higher than the gate potential, so that the transistor 150b is on.

[0065] When the transistor 150b is on, a current I6 corresponding to the voltage between the source and gate of the transistor 150b flows through the pull-up resistor 954b. This current I6 is a current corresponding to the current I4 flowing from the second end 105 to the source of the transistor 150b through the second connection path 112. When the transistor 150b is on, a voltage drop occurs between the second end 105 and the source of the transistor 150b due to the current I4 flowing through the wiring resistance of the second connection path 112. As a result, a potential shifted by the voltage drop from the potential Vsb of the second end 105 is transmitted to the second detection circuit 20b, and a potential Vmb9 corresponding to the transmitted potential is transmitted to a monitor circuit (not shown), and a potential Vgb9 is output.

[0066] In contrast, in the semiconductor device 1 according to the above embodiment, the current I2 flowing through the pull-up resistor 154b flows through the fourth connection path 116, which is different from the second connection path 112. Therefore, in the semiconductor device 1 according to the above embodiment, when the transistor 150b is on, no voltage drop occurs in the potential transmitted to the second detection circuit 20b according to the current I2 flowing through the pull-up resistor 154b. Therefore, in the semiconductor device 1 according to the above embodiment, the potential Vsb of the second end 105 can be transmitted to the second detection circuit 20b with high accuracy.

[0067] As described above, the semiconductor device 1 according to the above embodiment, unlike the semiconductor device 9 according to the comparative technique, can transmit the potential across the current detection resistor 104 to the first detection circuit 20a and the second detection circuit 20b through the first switch circuit 15a and the second switch circuit 15b while suppressing the voltage drop in the first connection path 110 and the second connection path 112. As a result, it becomes possible to accurately monitor the potential across the current detection resistor 104.

[0068] (supplement) Although the embodiments of the present disclosure have been described using specific terms, this description is merely an example to aid in understanding and does not limit the scope of the present disclosure or the claims, and the scope of the present invention is defined by the claims. In addition, not only the embodiments, but also embodiments, examples, and modified examples not described herein are included in the scope of the present invention.

[0069] For example, in the above embodiment, when the transistor 150a of the first switch circuit 15a is turned on, the transistor 152a is turned on to absorb the current I1 and supply a potential close to the ground potential to the gate of the transistor 150a. The configuration of the first switch circuit 15a is not limited to the example using the transistor 152a. The first switch circuit 15a may have various configurations capable of supplying the ground potential (or an equivalent potential) to the gate of the transistor 150a, instead of the transistor 152a. Similarly, the second switch circuit 15b may have various configurations capable of supplying the ground potential (or an equivalent potential) to the gate of the transistor 150b, instead of the transistor 150b.

[0070] Further, in the semiconductor device 1 according to the above embodiment, an example has been described in which the potential across the current detection resistor 104 is monitored. However, the present invention is not limited to this, and the semiconductor device 1 may be configured to monitor various nodes.

[0071] (Additional Note) One aspect of the technology disclosed in this specification can be understood as follows.

[0072] (Item 1) a detection node at a potential according to the input voltage; a detection circuit for detecting a potential of the detection node; a switch circuit disposed between the detection node and the detection circuit, the switch circuit having a P-channel MOS (Metal Oxide Semiconductor) transistor and a pull-up resistor having one end connected to a gate of the MOS transistor; a connection path connecting the detection node and a source of the MOS transistor; a gate of the MOS transistor is pulled up so that the MOS transistor is turned off by supplying a potential corresponding to the input voltage to the other end of the pull-up resistor through a path different from the connection path; a potential of the detection node is transmitted to the detection circuit through the connection path and the MOS transistor when the MOS transistor is on; Semiconductor device.

[0073] (Item 2) an input node to which the input voltage is supplied; an operation circuit that operates based on a voltage corresponding to the input voltage; a current detection resistor disposed between the input node and the operational circuit for detecting a current flowing between the input node and the operational circuit; Item 1. The semiconductor device according to item 1.

[0074] (Item 3) the detection node is an end of the current detection resistor on the operational circuit side, The other end of the pull-up resistor is connected to the end of the current detection resistor on the input node side. Item 3. The semiconductor device according to item 2.

[0075] (Item 4) the switch circuit further includes an N-channel MOS transistor, The N-channel MOS transistor is arranged such that a drain is connected to one end of the pull-up resistor and a ground potential is supplied to a source of the N-channel MOS transistor. Item 1. The semiconductor device according to item 1.

[0076] (Item 5) The P-channel MOS transistor is a P-channel DMOS (Double Diffused Metal Oxide Semiconductor) transistor. Item 1. The semiconductor device according to item 1.

[0077] (Item 6) A control circuit for controlling an operation of the switch circuit is further provided. the control circuit controls the operation of the switch circuit so that the P-channel MOS transistor is turned on when the input voltage is lower than a predetermined voltage. Item 1. The semiconductor device according to item 1. [Explanation of symbols]

[0078] 1 semiconductor device, 10 detected circuit, 15a first switch circuit, 15b second switch circuit, 20a first detection circuit, 20b second detection circuit, 100 input node, 102 operating circuit, 104 current detection resistor, 108 comparator, 110 first connection path, 112 second connection path, 114 third connection path, 116 fourth connection path, 150a, 152a, 150b, 152b transistors, 154a, 154b pull-up resistors.

Claims

1. a detection node at a potential according to the input voltage; a detection circuit for detecting a potential of the detection node; a switch circuit disposed between the detection node and the detection circuit, the switch circuit having a P-channel MOS (Metal Oxide Semiconductor) transistor and a pull-up resistor having one end connected to a gate of the MOS transistor; a connection path connecting the detection node and a source of the MOS transistor; a gate of the MOS transistor is pulled up so that the MOS transistor is turned off by supplying a potential corresponding to the input voltage to the other end of the pull-up resistor through a path different from the connection path; a potential of the detection node is transmitted to the detection circuit through the connection path and the MOS transistor when the MOS transistor is on; Semiconductor device.

2. an input node to which the input voltage is supplied; an operation circuit that operates based on a voltage corresponding to the input voltage; a current detection resistor disposed between the input node and the operational circuit for detecting a current flowing between the input node and the operational circuit; The semiconductor device according to claim 1 .

3. the detection node is an end of the current detection resistor on the operational circuit side, The other end of the pull-up resistor is connected to the end of the current detection resistor on the input node side. The semiconductor device according to claim 2 .

4. the switch circuit further includes an N-channel MOS transistor, The N-channel MOS transistor is disposed such that a drain thereof is connected to one end of the pull-up resistor and a ground potential is supplied to a source thereof. The semiconductor device according to claim 1 .

5. The P-channel MOS transistor is a P-channel DMOS (Double Diffused Metal Oxide Semiconductor) transistor. The semiconductor device according to claim 1 .

6. A control circuit for controlling an operation of the switch circuit is further provided. the control circuit controls the operation of the switch circuit so that the P-channel MOS transistor is turned on when the input voltage is lower than a predetermined voltage. The semiconductor device according to claim 1 .

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