Semiconductor device, manufacturing method of semiconductor device and electronic apparatus

Abstract

To realize a semiconductor device having high performance and reliability.SOLUTION: A semiconductor device 1 comprises: a transistor part 10; and a wiring line 20. The wiring line 20 comprises: a first conductor part 21 and a second conductor part 22 that surrounds the first conductor part in a cross-sectional view when being cut by a surface orthogonal to a direction D1 of current flowing. The first conductor part 21 has first resistivity, and the second conductor part 22 has second resistivity being higher than the first resistivity. By using of the wiring line 20, increasing of current density being close to the surface is suppressed by the second conductor part 22 even when high frequency current flows. This suppresses damage of the wiring line 20 due to a skin effect, and a situation in which performance of the transistor part 10 cannot be sufficiently exhibited is avoided due to damage of the wiring line 20.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device, a method for manufacturing a semiconductor device, and an electronic device. [Background technology]

[0002] A known wiring structure for semiconductor device wiring is one in which a core insulator is surrounded by gold, with platinum layered underneath the gold, and titanium-tungsten layered underneath the platinum. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 6-69362 [Patent Document 2] Japanese Patent Application Publication No. 5-109708 Summary of the Invention [Problem to be solved by the invention]

[0004] In a semiconductor device including a transistor section and wiring connected thereto, a high-frequency current may flow through the wiring. In wiring through which a high-frequency current flows, the current density near the surface of the wiring increases due to the skin effect, and the wiring may be damaged. Damage to the wiring may lead to a decrease in the performance and reliability of the semiconductor device, such as a failure to fully demonstrate the performance of the transistor section connected thereto.

[0005] In one aspect, the present invention aims to realize a semiconductor device having high performance and reliability. [Means for solving the problem]

[0006] In one aspect, a semiconductor device is provided, comprising: a transistor portion; and wiring connected to the transistor portion, wherein the wiring includes, in a cross-sectional view when cut along a plane perpendicular to a direction in which current flows, a first conductor portion having a first resistivity, and a second conductor portion having a second resistivity higher than the first resistivity and surrounding the first conductor portion.

[0007] In another aspect, there is provided a method for manufacturing the semiconductor device as described above, and an electronic device including the semiconductor device as described above. Effect of the Invention

[0008] According to one aspect, it is possible to realize a semiconductor device having high performance and reliability. [Brief description of the drawings]

[0009] [Figure 1] 1A and 1B are diagrams illustrating an example of a semiconductor device according to a first embodiment. [Diagram 2] 5A to 5C are diagrams illustrating modified examples of wiring according to the first embodiment. [Diagram 3] FIG. 1 is a diagram showing an example of a wiring structure. [Figure 4] FIG. 11 is a diagram showing the relationship between the depth from the surface of a wiring and the current density. [Diagram 5] FIG. 2 is a diagram (part 1) for explaining an example of a method for forming wiring according to the first embodiment. [Figure 6] FIG. 2 is a diagram (part 2) for explaining an example of a method for forming wiring according to the first embodiment. [Figure 7] FIG. 4 is a diagram (part 3) for explaining an example of a method for forming wiring according to the first embodiment. [Figure 8] 10A to 10C are diagrams illustrating a first example of a semiconductor device according to a second embodiment. [Figure 9] 11A to 11C are diagrams illustrating a second example of a semiconductor device according to a second embodiment. [Figure 10] 13A to 13C are diagrams illustrating an example of a semiconductor package according to a third embodiment. [Figure 11] FIG. 13 is a diagram illustrating an example of a power factor correction circuit according to a fourth embodiment. [Figure 12] FIG. 13 is a diagram illustrating an example of a power supply device according to a fifth embodiment. [Figure 13] FIG. 13 is a diagram illustrating an example of an amplifier according to a sixth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] [First embodiment] Fig. 1 is a diagram for explaining an example of a semiconductor device according to a first embodiment. Fig. 1(A) is a schematic cross-sectional view of a main part of an example of a semiconductor device. Fig. 1(B) is a schematic cross-sectional view of a main part of an example of wiring. Fig. 1(C) is a schematic perspective view of an example of a II cross section of Fig. 1(B).

[0011] A semiconductor device 1 shown in FIG. 1A includes a transistor portion 10 (Tr) and a wiring 20. The transistor section 10 is provided on a substrate 30. For example, a nitride semiconductor such as gallium nitride (GaN) or aluminum gallium nitride (AlGaN) is used for the substrate 30. For example, such a nitride semiconductor is used to form a high electron mobility transistor (HEMT) as the transistor section 10. In addition, a compound semiconductor such as gallium arsenide (GaAs), indium gallium arsenide (InGaAs), silicon germanium (SiGe), or a semiconductor such as silicon (Si) may be used for the substrate 30. Such a compound semiconductor or semiconductor may be used to form various transistor sections 10 such as a HEMT or a MIS (Metal Insulator Semiconductor) type field effect transistor (FET).

[0012] The wiring 20 is provided in an insulating layer 40. The insulating layer 40 covers the transistor section 10 of the substrate 30. The insulating layer 40 is made of various insulating materials such as silicon oxide (SiO) and silicon nitride (SiN). The wiring 20 in the insulating layer 40 is made of various conductive materials such as gold (Au), platinum (Pt), and titanium (Ti). In addition, the wiring 20 may be made of various conductive materials such as copper (Cu), aluminum (Al), tungsten (W), nickel (Ni), and tantalum (Ta). As described later, the wiring 20 is made of a combination of at least two conductive materials. The wiring 20 is connected to the transistor section 10 of the substrate 30. The wiring 20 is connected to at least one of the gate, source, and drain of the transistor section 10. FIG. 1A illustrates a pair of wirings 20 for input and output to the transistor section 10 as an example. For example, when the transistor section 10 is in operation, a current Ia input to the transistor section 10 flows through the input wiring 20, and a current Ib output from the transistor section 10 flows through the output wiring 20. A high-frequency current Ia or current Ib can flow through the wiring 20.

[0013] Fig. 1(B) illustrates an enlarged view of one of the wirings 20 in Fig. 1(A). In Fig. 1(B), the direction of a current flowing through the wiring 20, that is, the direction of an input current Ia or an output current Ib (illustrated as "Ia / Ib"), is defined as a direction D1.

[0014] FIG. 1C is a schematic diagram showing an example of a cross-sectional perspective view of the wiring 20 cut along a plane perpendicular to the direction D1. As an example, the wiring 20 is a wiring having a cross-sectional two-layer structure including a first conductor portion 21 and a second conductor portion 22 surrounding the first conductor portion 21. The first conductor portion 21 is a portion that is the central portion of the wiring 20. The second conductor portion 22 is a portion that is the outer peripheral portion of the wiring 20 surrounding the central portion of the wiring 20. The first conductor portion 21 and the second conductor portion 22 are made of different conductor materials. The first conductor portion 21 is made of a conductor material having a first resistivity. The second conductor portion 22 is made of a conductor material having a second resistivity higher than the first resistivity. For example, the first conductor portion 21 is made of a metal material having a low resistivity, such as Au. For example, the second conductor portion 22 is made of a metal material having a higher resistivity than Au, such as Pt or Ti.

[0015] The combination of metal materials that can be used for the first conductor part 21 and the second conductor part 22 is not limited to the illustrated ones. For example, the metal materials used for the first conductor part 21 and the second conductor part 22 are selected from various metal materials including Au, Pt, Ti, Cu, Al, W, Ni, Ta, etc., so that the second conductor part 22 has a higher resistivity than the first conductor part 21.

[0016] It is generally known that when a high-frequency current flows through a wiring having a cross-sectional single-layer structure, the current density near the surface may increase due to the skin effect. If the current density exceeds the allowable current density of the conductor material used for the wiring, the wiring may be damaged. Damage to the wiring may cause the performance of the transistor section connected to the wiring to be insufficient, and may result in a decrease in the performance and reliability of the semiconductor device including the wiring and the transistor section.

[0017] In contrast, in the wiring 20 having the structure shown in FIG. 1(C) in cross section, the first conductor 21 in the center having a first resistivity is surrounded by the second conductor 22 in the outer periphery having a second resistivity higher than the first resistivity. Therefore, even when a high-frequency current flows through the wiring 20, the second conductor 22 in the outer periphery prevents the current density near the surface of the wiring 20 from increasing, and a sufficient current can flow through the wiring 20. As a result, even when a high-frequency current flows through the wiring 20, damage caused by the skin effect is suppressed, and a decrease in the performance and reliability of the semiconductor device 1 caused by the damage to the wiring 20 is suppressed. That is, a situation in which the performance of the transistor unit 10 connected to the wiring 20 cannot be fully exhibited due to the damage to the wiring 20 is avoided, and a decrease in the performance and reliability of the semiconductor device 1 is suppressed.

[0018] By adopting the above-described wiring 20 as the wiring 20 connected to the transistor section 10, i.e., the wiring 20 including a first conductor section 21 and a second conductor section 22 whose resistivity increases toward the outside, a semiconductor device 1 having high performance and reliability is realized.

[0019] Fig. 2 is a diagram for explaining modified examples of the wiring according to the first embodiment. Fig. 2(A) shows a schematic perspective cross-sectional view of a main part of a first modified example of the wiring. Fig. 2(B) shows a schematic perspective cross-sectional view of a main part of a second modified example of the wiring. Fig. 2(A) and Fig. 2(B) each show a schematic example of a cross-sectional perspective view of the wiring cut along a plane perpendicular to the direction of current flow.

[0020] The wiring 20 shown in FIG. 2(A) is a wiring having a cross-sectional three-layer structure including a first conductor portion 21, a second conductor portion 22 surrounding the first conductor portion 21, and a third conductor portion 23 surrounding the second conductor portion 22. The first conductor portion 21, the second conductor portion 22, and the third conductor portion 23 of the wiring 20 shown in FIG. 2(A) are made of different conductor materials. The first conductor portion 21 is made of a conductor material having a first resistivity. The second conductor portion 22 is made of a conductor material having a second resistivity higher than the first resistivity. The third conductor portion 23 is made of a conductor material having a third resistivity higher than the second resistivity. For example, the first conductor portion 21 is made of a metal material such as Au having a low resistivity. For example, the second conductor portion 22 is made of a metal material such as Pt having a higher resistivity than Au. For example, the third conductor portion 23 is made of a metal material such as Ti having a higher resistivity than Pt.

[0021] The combination of metal materials that can be used for the first conductor portion 21, the second conductor portion 22, and the third conductor portion 23 is not limited to the above examples. For example, a combination of metal materials is selected from various metal materials such as Cu, Au, Al, W, Ni, Ta, Pt, Ti, etc., such that the second conductor portion 22 has a higher resistivity than the first conductor portion 21, and the third conductor portion 23 has a higher resistivity than the second conductor portion 22.

[0022] 2(A) has a structure in which the resistivity increases outward from the first conductor portion 21 to the second conductor portion 22 and the third conductor portion 23 in a cross-sectional view. Therefore, even when a high-frequency current flows through the wiring 20, a sufficient current can flow through the wiring 20 while suppressing an increase in current density near the surface of the wiring 20.

[0023] 2A may be connected to the transistor section 10 of the semiconductor device 1. With such wiring 20, when a high-frequency current flows, damage caused by the skin effect is suppressed, and a situation in which the performance of the transistor section 10 connected to the wiring 20 cannot be fully exhibited is avoided. With such wiring 20, a semiconductor device 1 with high performance and reliability is realized.

[0024] The wiring 20 shown in FIG. 2(B) includes a first conductor portion 21, a second conductor portion 22 surrounding the first conductor portion 21, a third conductor portion 23 surrounding the second conductor portion 22, and a fourth conductor portion 24 surrounding the third conductor portion 23. The first conductor portion 21, the second conductor portion 22, the third conductor portion 23, and the fourth conductor portion 24 of the wiring 20 shown in FIG. 2(B) are made of different conductor materials. The first conductor portion 21 is made of a conductor material having a first resistivity. The second conductor portion 22 is made of a conductor material having a second resistivity higher than the first resistivity. The third conductor portion 23 is made of a conductor material having a third resistivity higher than the second resistivity. The fourth conductor portion 24 is made of a conductor material having a fourth resistivity higher than the third resistivity. For example, the first conductor portion 21 is made of a metal material such as Au having a low resistivity. For example, the second conductor 22 is made of a metal material such as Al or Ni having a higher resistivity than Au, etc. For example, the third conductor 23 is made of a metal material such as Pt having a higher resistivity than Al or Ni, etc. For example, the fourth conductor 24 is made of a metal material such as Ti having a higher resistivity than Pt, etc.

[0025] The combination of metal materials that can be used for the first conductor portion 21, the second conductor portion 22, the third conductor portion 23, and the fourth conductor portion 24 is not limited to the above examples. For example, a combination of metal materials is selected from various metal materials such as Cu, Au, Al, W, Ni, Ta, Pt, Ti, etc., such that the second conductor portion 22 has a higher resistivity than the first conductor portion 21, the third conductor portion 23 has a higher resistivity than the second conductor portion 22, and the fourth conductor portion 24 has a higher resistivity than the third conductor portion 23.

[0026] 2(B) has a structure in which the resistivity increases outward in a cross-sectional view from the first conductor portion 21 to the second conductor portion 22, the third conductor portion 23, and the fourth conductor portion 24. Therefore, even when a high-frequency current flows through the wiring 20, it is possible to prevent an increase in current density near the surface of the wiring 20 and to allow a sufficient current to flow through the wiring 20.

[0027] 2B, a wiring 20 may be connected to the transistor section 10 of the semiconductor device 1. When a high-frequency current flows through such wiring 20, damage caused by the skin effect is suppressed, and the transistor section 10 connected to the wiring 20 is prevented from being unable to fully perform its functions. With such wiring 20, a semiconductor device 1 with high performance and reliability is also realized.

[0028] In this manner, the wiring 20 connected to the transistor portion 10 of the semiconductor device 1 can be a wiring 20 having a two-layer structure as shown in FIG. 1(C), a wiring 20 having a three-layer structure as shown in FIG. 2(A), or a wiring 20 having a four-layer structure as shown in FIG. 2(B).

[0029] Furthermore, the wiring 20 connected to the transistor portion 10 of the semiconductor device 1 may have a structure of five or more layers, so long as the resistivity increases toward the outside when viewed in cross section.

[0030] Here, the results of an investigation into the relationship between the wiring structure and the current density will be described with reference to FIGS. Figure 3 shows an example of a wiring structure. Figure 3(A) shows a schematic cross-sectional perspective view of a wiring having a single-layer structure. Figure 3(B) shows a schematic cross-sectional perspective view of a wiring having a three-layer structure.

[0031] 3A shows a single-layered wiring 20A having a cross-sectional dimension of W [μm] × W [μm] as the wiring structure A. The wiring 20A has a single-layered structure of Au.

[0032] Fig. 3(B) shows a three-layered wiring 20B with a cross-sectional dimension of W [μm] × W [μm] as the wiring structure B. The wiring 20B corresponds to the wiring 20 shown in Fig. 2(A). The wiring 20B has a three-layered structure having a first conductor 21 of Au, a second conductor 22 of Pt, and a third conductor 23 of Ti. The first conductor 21 has a dimension (length and width) of w1 [μm], the second conductor 22 has a dimension (length and width) of w2 [μm], and the third conductor 23 has a dimension (length and width) of w3 [μm].

[0033] For the wiring 20A having such wiring structure A and the wiring 20B having such wiring structure B, the relationship between the depth x from the surface and the current density was measured. Fig. 4 is a diagram showing the relationship between the depth from the surface of the wiring and the current density. In Fig. 4, the horizontal axis represents the depth x [μm] from the surface of the wiring, and the vertical axis represents the current density J [A / cm 2 The current conditions are 1GHz and 5A.

[0034] As shown in FIG. 4, in the wiring 20A having the wiring structure A with W=80 μm (length 80 μm×width 80 μm), the current density near the surface (near x=0 μm) is 10 6 A / cm 2 This is an extremely high current density, which may cause damage to the wiring 20A. In contrast, in the wiring 20A having the wiring structure A with W=100 μm (length 100 μm × width 100 μm), the current density near the surface (near x=0 μm) is 10 5 A / cm 2 In the wiring structure A, the current density near the surface is reduced by increasing the cross-sectional dimension from W=80 μm to W=100 μm.

[0035] On the other hand, the wiring 20B having the wiring structure B has a further current density reduction effect than the wiring 20A having the wiring structure A with W=100 μm. Here, the wiring 20B having the wiring structure B has a dimension of the first conductor 21 w1=80 μm, the dimension of the second conductor 22 w2=5 μm, and the dimension of the third conductor 23 w3=5 μm, and has an overall dimension W=100 μm. In this wiring 20B, as shown in FIG. 4, the current density near the surface (near x=0 μm) is further reduced to about half that of the wiring 20A having the wiring structure A with W=100 μm. In addition, in the wiring 20B in which the first conductor 21 with dimension w1=80 μm is made of Au, the current density is reduced to about one-seventh compared to the case in which the wiring 20A having the wiring structure A with a single-layer structure of Au with W=80 μm is used, that is, the case in which the Au portion has the same dimension is used. In the wiring 20B, the current density near the surface (near x=0 μm) is thus reduced, whereas the current density in the region inside is increased.

[0036] The wiring 20B (that is, the wiring 20 shown in FIG. 2(A) above) is capable of allowing a sufficient current to flow while suppressing an increase in current density near the surface. As described above, the wiring 20 connected to the transistor section 10 of the semiconductor device 1 includes a first conductor section 21 having a first resistivity and a second conductor section 22 having a second resistivity higher than the first resistivity and surrounding the first conductor section 21 (FIG. 1(C)). Alternatively, a wiring 20 further including a third conductor section 23 having a third resistivity higher than the second resistivity and surrounding the second conductor section 22 (FIG. 2(A)) is used. These wirings 20 prevent the current density near the surface from increasing, and prevent damage caused by the current density near the surface from increasing. This prevents the transistor section 10 from performing satisfactorily, and realizes a semiconductor device 1 with high performance and reliability.

[0037] If the thickness of the second conductor portion 22 and subsequent conductor portions provided outside the first conductor portion 21 exceeds 0 nm, the skin effect is suppressed compared to the case where no conductor portion is provided after the second conductor portion 22. Therefore, the thickness of the conductor portion after the second conductor portion 22 is set to exceed 0 nm.

[0038] Next, a method for forming the wiring 20 having the above-mentioned structure will be described. Here, as an example, a method for forming wiring 20 having a three-layer structure as shown in FIG. 2(A) will be described.

[0039] 5 to 7 are diagrams for explaining an example of a method for forming wiring according to the first embodiment. FIG. 5(A) shows a schematic cross-sectional view of an example of an insulating layer preparation step. FIG. 5(B) shows a schematic cross-sectional view of an example of a recess formation step. FIG. 5(C) shows a schematic cross-sectional view of an example of a third conductor first portion formation step. FIG. 6(A) shows a schematic cross-sectional view of an example of a second conductor first portion formation step. FIG. 6(B) shows a schematic cross-sectional view of an example of a first conductor formation step. FIG. 6(C) shows a schematic cross-sectional view of an example of a first resist removal step. FIG. 7(A) shows a schematic cross-sectional view of an example of a second conductor second portion formation step. FIG. 7(B) shows a schematic cross-sectional view of an example of a third conductor second portion formation step. FIG. 7C is a schematic cross-sectional view of a main part of an example of the second resist removal step.

[0040] First, an insulating layer 40 is prepared as shown in Fig. 5(A). A recess 41 is formed in the prepared insulating layer 40 as shown in Fig. 5(B). The recess 41 is formed in a region of the insulating layer 40 where the wiring 20 is to be formed. The recess 41 is formed by, for example, dry etching 41a.

[0041] After the recess 41 is formed, as shown in FIG. 5(C), a resist 50 having an opening 50a at a position corresponding to the recess 41 is formed on the insulating layer 40, for example, a two-layer resist 50. After the resist 50 is formed, a metal material such as Ti used for the third conductor 23 of the wiring 20 is deposited by a deposition method or the like. The metal material is deposited on the inner wall of the recess 41 of the insulating layer 40 and on the resist 50. The first portion 23a of the third conductor 23 (the bottom and sidewall of the third conductor 23) is formed by the metal material deposited on the inner wall of the recess 41. After the first portion 23a of the third conductor 23 is formed, the resist 50 is removed together with the metal material deposited thereon.

[0042] After removing the resist 50, as shown in FIG. 6(A), a resist 51 having an opening 51a at a position corresponding to the recess 41, for example a two-layered resist 51, is formed on the insulating layer 40. After forming the resist 51, a metal material such as Pt used for the second conductor 22 of the wiring 20 is deposited by a deposition method or the like. The metal material is deposited on the inner wall of the first portion 23a of the third conductor 23 formed in the recess 41 and on the resist 51. The first portion 22a of the second conductor 22 (bottom and sidewall of the second conductor 22) is formed by the metal material deposited on the inner wall of the first portion 23a of the third conductor 23. After forming the first portion 22a of the second conductor 22, the resist 51 is removed together with the metal material deposited thereon.

[0043] After the resist 51 is removed, as shown in FIG. 6(B), a resist 52 having an opening 52a at a position corresponding to the recess 41, for example a two-layered resist 52, is formed on the insulating layer 40. After the resist 52 is formed, a metal material such as Au used for the first conductor 21 of the wiring 20 is deposited by a deposition method or the like. The metal material is deposited on the inside of the first portion 22a of the second conductor 22 formed in the recess 41 and on the resist 52. The first conductor 21 is formed by the metal material deposited on the inside of the first portion 22a of the second conductor 22. After the first conductor 21 is formed, the resist 52 is removed together with the metal material deposited thereon. As a result, a state as shown in FIG. 6(C) is obtained.

[0044] After removing the resist 52, as shown in FIG. 7(A), a resist 53 having an opening 53a at a position corresponding to the recess 41 is formed on the insulating layer 40, for example, a two-layered resist 53. After forming the resist 53, a metal material such as Pt used for the second conductor 22 of the wiring 20 is deposited by a deposition method or the like. The metal material is deposited so as to cover the first conductor 21 formed in the recess 41 and to be connected to the first portion 22a of the second conductor 22 formed outside the first conductor 21. The metal material is also deposited on the resist 53. The second portion 22b of the second conductor 22 (upper portion of the second conductor 22) is formed by the metal material covering the first conductor 21 and connected to the first portion 22a of the second conductor 22. The first portion 22a and the second portion 22b form the second conductor 22 surrounding the first conductor 21. After the second conductor portion 22 is formed, the resist 53 is removed together with the metal material deposited thereon.

[0045] After the resist 53 is removed, as shown in FIG. 7B, a resist 54 having an opening 54a at a position corresponding to the recess 41, for example, a two-layered resist 54, is formed on the insulating layer 40. After the resist 54 is formed, a metal material such as Ti used for the third conductor 23 of the wiring 20 is deposited by a deposition method or the like. The metal material is deposited so as to cover the second conductor 22 formed in the recess 41 and to be connected to the first portion 23a of the third conductor 23 formed outside the second conductor 22. The metal material is also deposited on the resist 54. The second portion 23b of the third conductor 23 (the upper portion of the third conductor 23) is formed by the metal material covering the second conductor 22 and connected to the first portion 23a of the third conductor 23. The first portion 23a and the second portion 23b form the third conductor 23 surrounding the second conductor 22. After the third conductor 23 is formed, the resist 54 is removed together with the metal material deposited thereon. This results in the state shown in FIG.

[0046] 5(A) to 7(C), wiring 20 is formed which is provided in insulating layer 40 and includes a first conductor portion 21, a second conductor portion 22 surrounding the first conductor portion 21, and a third conductor portion 23 surrounding the second conductor portion 22. A metal material having a higher resistivity than the metal material of the first conductor portion 21 is used for the second conductor portion 22, and a metal material having a higher resistivity than the metal material of the second conductor portion 22 is used for the third conductor portion 23, thereby forming wiring 20 whose resistivity increases outward in a cross-sectional view.

[0047] Here, a method for forming a wiring 20 having a three-layer structure including the first conductor portion 21, the second conductor portion 22, and the third conductor portion 23 has been exemplified, but a wiring 20 having a two-layer structure or a four-layer structure or more can be formed according to this example. For example, when forming a wiring 20 having a two-layer structure including the first conductor portion 21 and the second conductor portion 22, the step of forming the third conductor portion 23 is omitted from the steps shown in Figs. 5(A) to 7(C) above. That is, the step of forming the first portion 23a of the third conductor portion 23 shown in Fig. 5(C) and the step of forming the second portion 23b of the third conductor portion 23 shown in Fig. 7(B) are omitted. Also, when forming a wiring 20 having a four-layer structure or more, a step of forming the conductor portions of the fourth layer and thereafter is added to the steps shown in Figs. 5(A) to 7(C) above. That is, before the process of forming the first portion 23a of the third conductor portion 23 shown in Figure 5(C), a process of forming the first portion (bottom and side wall portion) of the conductor portion on the fourth layer or later is added, and after the process of forming the second portion 23b of the third conductor portion 23 shown in Figure 7(B), a process of forming the second portion (upper portion) of the conductor portion on the fourth layer or later is added.

[0048] [Second embodiment] Here, an example of a semiconductor device to which the wiring having the configuration described in the first embodiment can be applied will be described as a second embodiment.

[0049] 8A and 8B are diagrams for explaining a first example of a semiconductor device according to the second embodiment. Fig. 8A is a schematic perspective view of a main part of the example of the semiconductor device. Fig. 8B is a schematic cross-sectional view taken along line VIIIb-VIIIb of Fig. 8A. Fig. 8C is a schematic cross-sectional view taken along line VIIIc-VIIIc of Fig. 8A.

[0050] The semiconductor device 100A shown in FIG. 8A is an example of a HEMT. The semiconductor device 100A includes a gate 110, a source 120, and a drain 130. The gate 110 includes a plurality of gate electrodes 111 (gate fingers) provided in an active region 100a defined by an element isolation region 100b, and a gate wiring 112 (gate bus line) connected thereto and provided in the element isolation region 100b. The source 120 is a plurality of island-shaped source electrodes 121 provided in the active region 100a, and a source via 122 is connected directly below each of the source electrodes 121. The drain 130 includes a plurality of drain electrodes 131 (drain fingers) provided in the active region 100a, and a drain wiring 132 (drain pad) connected thereto and provided in the element isolation region 100b. In the active region 100a, a plurality of source electrodes 121 and drain electrodes 131 are alternately arranged, and a gate electrode 111 is arranged between each pair of opposing source electrodes 121 and drain electrodes 131. In this way, a transistor portion 101A including a plurality of transistor elements is formed in the active region 100a.

[0051] The semiconductor device 100A has an active region 100a having a structure as shown in Fig. 8(B), for example. As shown in Fig. 8(B), the semiconductor device 100A includes a base substrate 140 and a semiconductor laminate structure 150.

[0052] The base substrate 140 may be made of various materials such as silicon carbide (SiC), Si, GaN, aluminum nitride (AlN), sapphire, diamond, etc. The base substrate 140 may have a single layer structure of one material, or a laminate structure of one or more materials.

[0053] The semiconductor laminated structure 150 is provided on the base substrate 140. The semiconductor laminated structure 150 includes an electron transit layer 151 and an electron supply layer 152. The electron transit layer 151 may include, for example, GaN. Alternatively, the electron transit layer 151 may include a nitride semiconductor such as AlGaN, indium gallium nitride (InGaN), or indium aluminum gallium nitride (InAlGaN). The electron transit layer 151 may have a single-layer structure of one type of nitride semiconductor, or a multilayer structure of one or more types of nitride semiconductors. The electron transit layer 151 is formed on the base substrate 140 by using a metal organic chemical vapor deposition (MOCVD) or metal organic vapor phase epitaxy (MOVPE) method, a molecular beam epitaxy (MBE) method, or the like.

[0054] The electron supply layer 152 may include, for example, AlGaN. Alternatively, the electron supply layer 152 may include a nitride semiconductor such as indium aluminum nitride (InAlN), InAlGaN, or AlN. The electron supply layer 152 may have a single-layer structure of one type of nitride semiconductor, or may have a stacked structure of one or more types of nitride semiconductors. The electron supply layer 152 is formed on the electron transit layer 151 by using a MOVPE method or the like.

[0055] Here, nitride semiconductors with different bandgaps are used for the electron transit layer 151 and the electron supply layer 152. A two-dimensional electron gas (2DEG) region 102 is generated in the electron transit layer 151 due to spontaneous polarization of the nitride semiconductor of the electron supply layer 152 and piezoelectric polarization generated in the electron supply layer 152 due to strain caused by a lattice constant difference between the electron transit layer 152 and the nitride semiconductor of the electron transit layer 151. A combination of nitride semiconductors that generates the 2DEG region 102 in the electron transit layer 151 is used for the electron transit layer 151 and the electron supply layer 152.

[0056] Although not shown here, a layer of AlN or the like may be provided between the base substrate 140 and the electron transit layer 151 as an initial layer, a layer of AlGaN or the like may be provided as a buffer layer, or a layer of GaN or the like doped with iron (Fe) may be provided. In addition, a layer of AlN, AlGaN or the like may be provided between the base substrate 140 and the electron transit layer 151 as a barrier layer (back barrier layer) for realizing a quantum well (quantum confinement) structure. A layer of AlGaN, InGaN or the like may be provided between the electron transit layer 151 and the electron supply layer 152 as a spacer layer. A layer of GaN or the like may be provided on the electron supply layer 152 as a cap layer. The semiconductor laminated structure 150 may include one or more of such initial layers, buffer layers, spacer layers, back barrier layers, cap layers, etc., in addition to the electron transit layer 151 and the electron supply layer 152.

[0057] 8(B), a gate electrode 111, a source electrode 121, and a drain electrode 131 are provided on the semiconductor laminate structure 150 in the active region 100a to form a transistor section 101A. On both sides of the gate electrode 111, a source electrode 121 and a drain electrode 131 are provided spaced apart from the gate electrode 111. To achieve a high breakdown voltage, the gate electrode 111 may be disposed closer to the source electrode 121 than the drain electrode 131, that is, in an asymmetric arrangement.

[0058] The gate electrode 111 is made of a metal material. For example, a laminate having Ni and Au provided thereon is provided as the gate electrode 111. The gate electrode 111 is formed by using a deposition method or the like. The gate electrode 111 is provided to function as, for example, a Schottky electrode. Alternatively, the gate electrode 111 may be provided on the semiconductor laminated structure 150 via a gate insulating film (not shown) to form an MIS type gate structure. The gate electrode 111 is connected to a gate wiring 112 (FIG. 8(A)) provided in the element isolation region 100b. The gate wiring 112 may be made of the same metal material as the gate electrode 111, or may be made of a metal material different from that of the gate electrode 111.

[0059] The source electrode 121 has a lower layer portion 121a and an upper layer portion 121b. The lower layer portion 121a and the upper layer portion 121b of the source electrode 121 are made of a metal material. For example, a laminate having Ti or Ta and Al provided thereon is provided as the lower layer portion 121a. The upper layer portion 121b may be made of a different metal material from that of the lower layer portion 121a, such as Au, Ni, Pt, or Ti. The source electrode 121 is formed by using a deposition method or the like. The source electrode 121 is provided so as to function as an ohmic electrode. The source via 122 penetrates the base substrate 140 and the semiconductor laminated structure 150 and is connected to the source electrode 121. The source via 122 is provided on the side of the base substrate 140 opposite to the semiconductor laminated structure 150 and is connected to a metal layer 123 that is at a ground (GND) potential. The source electrode 121 is connected to the GND via the source via 122 and the metal layer 123.

[0060] The drain electrode 131 has a lower layer portion 131a and an upper layer portion 131b. The lower layer portion 131a and the upper layer portion 131b of the drain electrode 131 are made of a metal material. For example, the lower layer portion 131a is a laminate having Ti or Ta and Al provided thereon. The upper layer portion 131b may be made of a different metal material from that of the lower layer portion 131a, such as Au, Ni, Pt, or Ti. The drain electrode 131 is formed by using a deposition method or the like. The drain electrode 131 is provided to function as an ohmic electrode. The lower layer portion 131a is provided in at least the active region 100a of the active region 100a and the element isolation region 100b (FIG. 8(A)). The lower layer portion 131a may be drawn to the element isolation region 100b (FIG. 8(A)). The upper layer portion 131b is provided on the lower layer portion 131a of the active region 100a, and is extended from the active region 100a to the element isolation region 100b. The upper layer portion 131b extended to the element isolation region 100b (when the lower layer portion 131a is also extended to the element isolation region 100b, the upper layer portion 131b and the lower layer portion 131a) function as the drain wiring 132 (FIG. 8(A)).

[0061] 8(B), an insulating layer 160 is provided on the semiconductor laminated structure 150 in the active region 100a. The insulating layer 160 is provided between the source electrode 121 and the drain electrode 131. The gate electrode 111 is covered with the insulating layer 160. The source electrode 121 and the drain electrode 131 are provided to penetrate the insulating layer 160.

[0062] In the semiconductor device 100A having the above configuration, during operation, a predetermined voltage is applied between the source electrode 121 and the drain electrode 131, and a predetermined voltage is applied to the gate electrode 111. The amount of charge passing through the 2DEG region 102 immediately below the gate electrode 111 between the source electrode 121 and the drain electrode 131 is controlled by the field effect caused by the voltage applied to the gate electrode 111, thereby controlling the output drain current. In this manner, a transistor function is realized in the transistor section 101A of the semiconductor device 100A.

[0063] The semiconductor device 100A is one form of the semiconductor device 1 (FIG. 1(A)) described in the first embodiment. The base substrate 140 and the semiconductor laminated structure 150 of the semiconductor device 100A are one form of the substrate 30 (FIG. 1(A)) described in the first embodiment. The transistor section 101A of the semiconductor device 100A is one form of the transistor section 10 (FIG. 1(A)) described in the first embodiment. The gate wiring 112 connected to the gate electrode 111 of the semiconductor device 100A, the source electrode 121 (upper layer 121b), and the drain wiring 132 (upper layer 131b) connected to the drain electrode 131 are one form of the wiring 20 (FIG. 1(A)) described in the first embodiment.

[0064] For example, a wiring 170 having a structure as shown in FIG. 8(C) is adopted for the drain wiring 132 of the semiconductor device 100A having the above-mentioned configuration. The drain wiring 132 is connected to the drain electrode 131 of the active region 100a, and at least the upper layer 131b of the lower layer 131a and the upper layer 131b of the drain electrode 131 is drawn to the element isolation region 100b. A high-frequency current may flow through the drain wiring 132. For example, a wiring 170 having a structure as shown in FIG. 8(C) is adopted for the drain wiring 132 (upper layer 131b drawn to the element isolation region 100b) of such an element isolation region 100b, or for the drain wiring 132 and the upper layer 131b of the drain electrode 131 of the active region 100a. That is, a wiring 170 having a three-layer structure including a first conductor portion 171, a second conductor portion 172, and a third conductor portion 173 is adopted.

[0065] In the wiring 170, the first conductor portion 171 is surrounded by the second conductor portion 172, and the second conductor portion 172 is surrounded by the third conductor portion 173. The first conductor portion 171, the second conductor portion 172, and the third conductor portion 173 of the wiring 170 are made of different conductor materials. The first conductor portion 171 is made of a conductor material having a first resistivity. The second conductor portion 172 is made of a conductor material having a second resistivity higher than the first resistivity. The third conductor portion 173 is made of a conductor material having a third resistivity higher than the second resistivity. For example, the first conductor portion 171 is made of a metal material such as Au having a low resistivity. For example, the second conductor portion 172 is made of a metal material such as Pt having a higher resistivity than Au. For example, the third conductor portion 173 is made of a metal material such as Ti having a higher resistivity than Pt.

[0066] The combination of metal materials that can be used for the first conductor portion 171, the second conductor portion 172, and the third conductor portion 173 is not limited to the above examples. For example, a combination of metal materials is selected from various metal materials such as Cu, Au, Al, W, Ni, Ta, Pt, Ti, etc., such that the second conductor portion 172 has a higher resistivity than the first conductor portion 171, and the third conductor portion 173 has a higher resistivity than the second conductor portion 172.

[0067] Wiring 170 has a structure in which, in a cross-sectional view, resistivity increases outward from first conductor portion 171 to second conductor portion 172 to third conductor portion 173. Therefore, even when a high-frequency current flows through wiring 170, a sufficient current can flow through wiring 170 while suppressing an increase in current density near the surface of wiring 170.

[0068] According to the semiconductor device 100A employing the wiring 170, even when a high-frequency current flows, damage due to the skin effect of the portion employing the wiring 170 is suppressed, and a situation in which the performance of the transistor unit 101A connected to the wiring 170 cannot be fully exhibited is avoided. By employing the wiring 170, the semiconductor device 100A having high performance and reliability is realized.

[0069] Here, an example is shown in which a wiring 170 as shown in Fig. 8(C) is adopted for the drain wiring 132 (upper layer 131b drawn out to the element isolation region 100b) in the element isolation region 100b, or for the drain wiring 132 and the upper layer 131b of the drain electrode 131 in the active region 100a. In addition, the wiring 170 can also be adopted for the gate wiring 112 of the semiconductor device 100A. The wiring 170 can also be adopted for the upper layer 121b of the source electrode 121 of the semiconductor device 100A.

[0070] Further, although an example has been shown here in which the semiconductor device 100A employs wiring 170 having a three-layer structure, the semiconductor device 100A may also employ wiring having a two-layer or four or more layer structure in accordance with the example described in the first embodiment above.

[0071] The semiconductor device 100A is manufactured, for example, as follows. First, a semiconductor laminated structure 150 is formed on a base substrate 140 by MOVPE or the like. Next, an element isolation region 100b is formed in the formed semiconductor laminated structure 150 by ion implantation of argon (Ar) or the like. This forms an active region 100a defined by the element isolation region 100b. Next, a predetermined metal material is deposited on the semiconductor laminated structure 150 by deposition or the like to form a gate electrode 111, a gate wiring 112, a lower layer 121a of the source electrode 121, and a lower layer 131a of the drain electrode 131. This forms a transistor section 101A.

[0072] Next, an insulating layer 160 is formed on the semiconductor laminated structure 150 in which the transistor portion 101A is formed. Next, an opening leading to the lower portion 121a of the source electrode 121 is formed in the formed insulating layer 160. An opening leading to the lower portion 131a of the drain electrode 131 and an opening corresponding to the region in which the drain wiring 132 is to be formed are formed in the insulating layer 160. Then, a predetermined metal material is deposited by a deposition method or the like in the opening leading to the lower portion 121a of the source electrode 121 formed in the insulating layer 160, to form the upper portion 121b of the source electrode 121. A predetermined metal material is deposited by a deposition method or the like in the opening leading to the lower portion 131a of the drain electrode 131 formed in the insulating layer 160 and an opening corresponding to the region in which the drain wiring 132 is to be formed, to form the upper portion 131b of the drain electrode 131 and the drain wiring 132.

[0073] For example, the semiconductor device 100A is manufactured by such steps. As an example, in the manufacturing process of the semiconductor device 100A, in the process of forming at least the drain wiring 132 among the upper layer 131b of the drain electrode 131 and the drain wiring 132, the wiring 170 having the structure shown in FIG. 8(C) is formed. For example, following the example of the process of FIG. 5(A) to FIG. 7(C) described for the formation of the wiring 20, the first conductor 171, the second conductor 172, and the third conductor 173 are formed in the opening of the insulating layer 160 with a metal material having a predetermined resistivity, thereby forming the wiring 170. In addition, the wiring 170 can also be formed in the process of forming the gate wiring 112. The wiring 170 can also be formed in the process of forming the upper layer 121b of the source electrode 121.

[0074] Incidentally, the wiring 170 is not limited to a three-layer structure, and a wiring having a two-layer or four or more layer structure as described in the first embodiment may also be formed. 9A and 9B are diagrams for explaining a second example of the semiconductor device according to the second embodiment. Fig. 9A is a schematic cross-sectional view of a main part of the example of the semiconductor device. Fig. 9B is a schematic cross-sectional view of Fig. 9A taken along line XI-IX.

[0075] The semiconductor device 100B shown in FIG. 9A is an example of a MIS type FET. The semiconductor device 100B includes a semiconductor substrate 180 such as Si. A source region 182 and a drain region 183 in which a predetermined conductive type impurity is introduced are provided in an active region 180a defined by an element isolation region 180b formed in the semiconductor substrate 180. A gate electrode 181 is provided on the semiconductor substrate 180 between the source region 182 and the drain region 183 via a gate insulating film 181a. A sidewall insulating film 181b is provided on the side wall of the gate electrode 181. Thus, a transistor portion 101B is formed in the active region 180a. An insulating layer 184 is provided on the semiconductor substrate 180 so as to cover the transistor portion 101B. A plug 195 connected to the source region 182 and the drain region 183 of the transistor portion 101B, and a wiring 190 connected to the plug 195 are provided in the insulating layer 184.

[0076] The semiconductor device 100B is one form of the semiconductor device 1 (FIG. 1(A)) described in the first embodiment. The semiconductor substrate 180 of the semiconductor device 100B is one form of the substrate 30 (FIG. 1(A)) described in the first embodiment. The transistor section 101B of the semiconductor device 100B is one form of the transistor section 10 (FIG. 1(A)) described in the first embodiment. The wiring 190 of the semiconductor device 100B is one form of the wiring 20 (FIG. 1(A)) described in the first embodiment.

[0077] For example, a high-frequency current may flow through the wiring 190 of the semiconductor device 100B having the above-described configuration. For such wiring 190, a three-layer structure wiring 190 including a first conductor portion 191, a second conductor portion 192, and a third conductor portion 193 as shown in FIG.

[0078] In the wiring 190, the first conductor portion 191 is surrounded by the second conductor portion 192, and the second conductor portion 192 is surrounded by the third conductor portion 193. The first conductor portion 191, the second conductor portion 192, and the third conductor portion 193 of the wiring 190 are made of different conductor materials. The first conductor portion 191 is made of a conductor material having a first resistivity. The second conductor portion 192 is made of a conductor material having a second resistivity higher than the first resistivity. The third conductor portion 193 is made of a conductor material having a third resistivity higher than the second resistivity. For example, the first conductor portion 191 is made of a metal material such as Au having a low resistivity. For example, the second conductor portion 192 is made of a metal material such as Pt having a higher resistivity than Au. For example, the third conductor portion 193 is made of a metal material such as Ti having a higher resistivity than Pt.

[0079] The combination of metal materials that can be used for the first conductor portion 191, the second conductor portion 192, and the third conductor portion 193 is not limited to the above examples. For example, a combination of metal materials is selected from various metal materials such as Cu, Au, Al, W, Ni, Ta, Pt, Ti, etc., such that the second conductor portion 192 has a higher resistivity than the first conductor portion 191, and the third conductor portion 193 has a higher resistivity than the second conductor portion 192.

[0080] Wiring 190 has a structure in which, in a cross-sectional view, resistivity increases outward from first conductor portion 191 to second conductor portion 192 to third conductor portion 193. Therefore, even when a high-frequency current flows through wiring 190, a sufficient current can flow through wiring 190 while suppressing an increase in current density near the surface of wiring 190.

[0081] According to the semiconductor device 100B employing the wiring 190, even when a high-frequency current flows, damage due to the skin effect of the portion employing the wiring 190 is suppressed, and a situation in which the performance of the transistor unit 101B connected to the wiring 190 cannot be fully exhibited is avoided. By employing the wiring 190, the semiconductor device 100B having high performance and reliability is realized.

[0082] Here, an example is shown in which a three-layer wiring 190 is used in the semiconductor device 100B, but the semiconductor device 100B can also use wiring having a two-layer or four or more layer structure, following the example described in the first embodiment above.

[0083] Although not shown here, the wiring connected to the gate electrode 181 may have a three-layer structure, or a two-layer or four or more-layer structure. The semiconductor device 100B is manufactured, for example, as follows.

[0084] First, an element isolation region 180b is formed in the semiconductor substrate 180 by using an STI (Shallow Trench Isolation) method or the like. As a result, an active region 180a defined by the element isolation region 180b is formed. Next, a gate electrode 181 is formed in the active region 180a of the semiconductor substrate 180 via a gate insulating film 181a, and a sidewall insulating film 181b is formed on the side wall of the gate electrode 181. Next, impurities of a predetermined conductivity type are introduced by ion implantation into the active region 180a on both sides of the gate electrode 181, and a source region 182 and a drain region 183 are formed. As a result, the transistor section 101B is formed. Next, an insulating layer 184 covering the transistor section 101B, and a plug 195 and wiring 190 connected to the source region 182 and the drain region 183 of the transistor section 101B are formed by a multilayer wiring process.

[0085] For example, the semiconductor device 100B is manufactured by such steps. As an example, in the process of forming the wiring 190 in the manufacture of such a semiconductor device 100A, the wiring 190 having the structure shown in Fig. 9(B) is formed. For example, following the example of the process of Fig. 5(A) to Fig. 7(C) described above for forming the wiring 20, a first conductor 191, a second conductor 192, and a third conductor 193 are formed of a metal material having a predetermined resistivity in an opening formed in the insulating layer 184 in a multilayer wiring process. In this way, the wiring 190 is formed.

[0086] Incidentally, the wiring 190 is not limited to the three-layer structure, but may have a two-layer or four-layer or more structure as described in the first embodiment. Also, the wiring (not shown) connected to the gate electrode 181 may have a three-layer structure or a two-layer or four-layer or more structure.

[0087] Here, a semiconductor device 100A, which is an example of a HEMT, and a semiconductor device 100B, which is an example of an MIS FET, are shown as semiconductor devices to which the wiring having the configuration described in the first embodiment can be applied. In addition, the wiring having the configuration described in the first embodiment can be applied to wiring connected to a transistor portion of various semiconductor devices including the transistor portion.

[0088] The first and second embodiments have been described above. The above-described semiconductor devices 1, 100A, 100B, etc. can be applied to various electronic devices. As an example, the following describes the case where the semiconductor device having the above-described configuration is applied to a semiconductor package, a power factor correction circuit, a power supply device, and an amplifier.

[0089] [Third embodiment] Here, an example of application of the semiconductor device having the above-mentioned configuration to a semiconductor package will be described as the third embodiment.

[0090] Fig. 10 is a diagram illustrating an example of a semiconductor package according to the third embodiment, which diagrammatically shows a plan view of a main part of the example of the semiconductor package. The semiconductor package 200 shown in Fig. 10 is an example of a discrete package. The semiconductor package 200 includes, for example, the semiconductor device 100A (Figs. 8(A) to 8(C)) as described in the first example of the second embodiment, a lead frame 210 on which the semiconductor device 100A is mounted, and a resin 220 that seals them.

[0091] The semiconductor device 100A is mounted on a die pad 210a of a lead frame 210, for example, by using a die attach material or the like (not shown). The semiconductor device 100A is provided with a pad 110a connected to the gate 110, a pad 120a connected to the source 120, and a pad 130a connected to the drain 130. The pads 110a, 120a, and 130a are connected to the gate lead 211, the source lead 212, and the drain lead 213 of the lead frame 210, respectively, by using wires 230 made of Au, Al, or the like. The lead frame 210, the semiconductor device 100A mounted thereon, and the wires 230 connecting them are sealed with a resin 220 so that parts of the gate lead 211, the source lead 212, and the drain lead 213 are exposed.

[0092] In the semiconductor device 100A, the metal layer 123 connected to the source 120 may be connected to a die pad 210a connected to a source lead 212 by using a conductive bonding material such as solder. For example, the semiconductor device 100A as described in the first example of the second embodiment is used, and a semiconductor package 200 having such a configuration is obtained.

[0093] As described above, in the semiconductor device 100A, a wiring having a structure in which the resistivity increases toward the outside in a cross-sectional view is provided at a predetermined portion such as the drain wiring 132. For example, a wiring 170 including a first conductor portion 171, a second conductor portion 172 surrounding the first conductor portion 171 and having a higher resistivity than the first conductor portion 171, and a third conductor portion 173 surrounding the second conductor portion 172 and having a higher resistivity than the second conductor portion 172 is provided. With the wiring having such a structure, even when a high-frequency current flows, it is possible to flow a sufficient current while suppressing an increase in current density near the surface. This makes it possible to suppress damage caused by the skin effect of the wiring, and to realize a high-performance and high-reliability semiconductor device 100A that can fully exhibit the performance of the transistor portion 101A connected to the wiring. Using such a semiconductor device 100A, a high-performance semiconductor package 200 is realized.

[0094] Although the semiconductor device 100A is taken as an example here, it is possible to obtain a semiconductor package in a similar manner using other semiconductor devices 1, 100B, etc. [Fourth embodiment] Here, an example of application of the semiconductor device having the above-mentioned configuration to a power factor correction circuit will be described as a fourth embodiment.

[0095] Fig. 11 is a diagram for explaining an example of a power factor correction circuit according to the fourth embodiment. Fig. 11 shows an equivalent circuit diagram of the example of the power factor correction circuit. The power factor correction (PFC) circuit 300 shown in FIG. 11 includes a switch element 310, a diode 320, a choke coil 330, a capacitor 340, a capacitor 350, a diode bridge 360, and an AC power supply 370 (AC).

[0096] In the PFC circuit 300, a drain electrode of a switch element 310 is connected to an anode terminal of a diode 320 and one terminal of a choke coil 330. A source electrode of the switch element 310 is connected to one terminal of a capacitor 340 and one terminal of a capacitor 350. The other terminal of the capacitor 340 is connected to the other terminal of the choke coil 330. The other terminal of the capacitor 350 is connected to a cathode terminal of the diode 320. A gate driver is connected to the gate electrode of the switch element 310. An AC power supply 370 is connected between both terminals of the capacitor 340 via a diode bridge 360, and a DC power supply (DC) is taken out from between both terminals of the capacitor 350.

[0097] For example, the semiconductor device 1, 100A, 100B, etc. described above is used for the switch element 310 of the PFC circuit 300 having such a configuration. As described above, in the semiconductor device 1, 100A, 100B, etc., the wiring 20, 170, 190, etc. having a structure in which the resistivity increases toward the outside in a cross-sectional view are provided at a predetermined portion connected to the transistor section 10, 101A, 101B, etc. With the wiring 20, 170, 190, etc. having such a structure, even when a high-frequency current flows, it is possible to flow a sufficient current while suppressing an increase in current density near the surface. This realizes a high-performance and high-reliability semiconductor device 1, 100A, 100B, etc. that can suppress damage caused by the skin effect of the wiring 20, 170, 190, etc. and can fully exhibit the performance of the transistor section 10, 101A, 101B, etc. Such a semiconductor device 1, 100A, 100B, etc. is used to realize a high-performance PFC circuit 300.

[0098] [Fifth embodiment] Here, an example in which the semiconductor device having the above-mentioned configuration is applied to a power supply device will be described as the fifth embodiment.

[0099] Fig. 12 is a diagram illustrating an example of a power supply device according to the fifth embodiment. Fig. 12 shows an equivalent circuit diagram of the example of the power supply device. The power supply device 400 shown in FIG. 12 includes a primary side circuit 410, a secondary side circuit 420, and a transformer 430 provided between the primary side circuit 410 and the secondary side circuit 420.

[0100] The primary side circuit 410 includes the PFC circuit 300 as described in the fourth embodiment above, and an inverter circuit, for example, a full-bridge inverter circuit 440, connected between both terminals of the capacitor 350 of the PFC circuit 300. The full-bridge inverter circuit 440 includes a plurality of switch elements, for example, four switch elements 441, 442, 443, and 444.

[0101] The secondary side circuit 420 includes a plurality of switch elements, three of which, as an example here, are a switch element 421, a switch element 422, and a switch element 423. For example, the above-mentioned semiconductor devices 1, 100A, 100B, etc. are used for the switch element 310 of the PFC circuit 300 included in the primary side circuit 410 of the power supply device 400 having such a configuration, the switch elements 441-444 of the full-bridge inverter circuit 440, and the switch elements 421-423 of the secondary side circuit 420.

[0102] As described above, in the semiconductor device 1, 100A, 100B, etc., the wiring 20, 170, 190, etc. having a structure in which the resistivity increases toward the outside in a cross-sectional view are provided at a predetermined portion connected to the transistor section 10, 101A, 101B, etc. With the wiring 20, 170, 190, etc. having such a structure, even when a high-frequency current flows, it is possible to flow a sufficient current while suppressing an increase in current density near the surface. This realizes a high-performance and high-reliability semiconductor device 1, 100A, 100B, etc. that can suppress damage caused by the skin effect of the wiring 20, 170, 190, etc. and can fully exhibit the performance of the transistor section 10, 101A, 101B, etc. Such a semiconductor device 1, 100A, 100B, etc. is used to realize a high-performance power supply device 400.

[0103] [Sixth embodiment] Here, an example of application of the semiconductor device having the above-mentioned configuration to an amplifier will be described as a sixth embodiment.

[0104] Fig. 13 is a diagram for explaining an example of an amplifier according to the sixth embodiment, showing an equivalent circuit diagram of the example of the amplifier. The amplifier 500 shown in FIG. 13 includes a digital predistortion circuit 510, a mixer 520, a mixer 530, and a power amplifier 540.

[0105] The digital predistortion circuit 510 compensates for nonlinear distortion of the input signal. The mixer 520 mixes the input signal SI, for which the nonlinear distortion has been compensated, with an AC signal. The power amplifier 540 amplifies the signal obtained by mixing the input signal SI with the AC signal. In the amplifier 500, for example, by switching a switch, the output signal SO can be mixed with the AC signal in the mixer 530 and sent to the digital predistortion circuit 510. The amplifier 500 can be used as a high-frequency amplifier or a high-power amplifier.

[0106] The semiconductor device 1, 100A, 100B, or the like is used in the power amplifier 540 of the amplifier 500 having such a configuration. As described above, in the semiconductor device 1, 100A, 100B, etc., the wiring 20, 170, 190, etc. having a structure in which the resistivity increases toward the outside in a cross-sectional view are provided at a predetermined portion connected to the transistor section 10, 101A, 101B, etc. With the wiring 20, 170, 190, etc. having such a structure, even when a high-frequency current flows, it is possible to flow a sufficient current while suppressing an increase in current density near the surface. This realizes a high-performance and high-reliability semiconductor device 1, 100A, 100B, etc. that can suppress damage caused by the skin effect of the wiring 20, 170, 190, etc. and fully exhibit the performance of the transistor section 10, 101A, 101B, etc. Such a semiconductor device 1, 100A, 100B, etc. is used to realize a high-performance amplifier 500.

[0107] Various electronic devices to which the semiconductor devices 1, 100A, 100B and the like are applied (such as the semiconductor package 200, the PFC circuit 300, the power supply device 400 and the amplifier 500 described in the third to sixth embodiments) can be mounted in various electronic devices or electronic devices. For example, they can be mounted in various electronic devices or electronic devices such as computers (personal computers, supercomputers, servers, etc.), smartphones, mobile phones, tablet terminals, sensors, cameras, audio equipment, measuring devices, inspection devices, manufacturing devices, transmitters, receivers, and radar devices. [Explanation of symbols]

[0108] 1, 100A, 100B Semiconductor device 10, 101A, 101B Transistor section 20, 20A, 20B, 170, 190 Wiring 21, 171, 191 First conductor 22, 172, 192 Second conductor 22a, 23a 1st part 22b, 23b 2nd part 23, 173, 193 Third conductor 24 Fourth conductor 30 Substrate 40, 160, 184 Insulation layer 41 Recess 41a Dry Etching 50, 51, 52, 53, 54 Resist 50a, 51a, 52a, 53a, 54a opening 100a, 180a active area 100b, 180b Element isolation region 102 2DEG area Gate 110 111, 181 Gate electrode 112 Gate wiring 120 Source 121 Source electrode 121a, 131a Lower part 121b, 131b Upper part 122 Source Via 123 Metal layer 130 Drain 131 Drain electrode 132 Drain wiring 140 Base substrate 150 Semiconductor stacked structure 151 Electron Transport Layer 152 Electron supply layer 180 Semiconductor Substrate 181a Gate insulating film 181b Sidewall insulating film 182 Source Region 183 Drain Region 195 Plug 110a, 120a, 130a pads 200 Semiconductor Packages 210 Lead Frame 210a Die pad 211 Gate Lead 212 Source Read 213 Drain Lead 220 Resin 230 Wire 300 PFC circuit 310, 421, 422, 423, 441, 442, 443, 444 Switch elements 320 Diode 330 Choke Coil 340, 350 Capacitor 360 Diode Bridge 370 AC power supply 400 power supply 410 Primary circuit 420 Secondary circuit 430 Trans 440 Full-bridge inverter circuit 500 Amplifier 510 Digital Pre-Distortion Circuit 520, 530 Mixer 540 Power Amplifier D1 direction

Claims

1. A transistor portion; A wiring connected to the transistor portion; Including, The wiring has a cross-sectional configuration in which the wiring is cut by a plane perpendicular to a direction in which a current flows. a first conductor portion having a first resistivity; a second conductor portion having a second resistivity higher than the first resistivity and surrounding the first conductor portion; 13. A semiconductor device comprising:

2. the first conductor portion includes Au; The semiconductor device according to claim 1 , wherein the second conductor portion includes Pt or Ti.

3. The wiring, in the cross-sectional view, The semiconductor device according to claim 1 , further comprising a third conductor portion having a third resistivity higher than the second resistivity and surrounding the second conductor portion.

4. the first conductor portion includes Au; the second conductor portion includes Pt, The semiconductor device according to claim 3 , wherein the third conductor portion contains Ti.

5. 2. The semiconductor device according to claim 1, wherein the wiring is at least one of a wiring connected to a drain of the transistor portion, a wiring connected to a source of the transistor portion, and a wiring connected to a gate of the transistor portion.

6. forming a transistor portion; forming a wiring connected to the transistor portion; Including, The step of forming wiring includes: In cross-sectional view when cut along a plane perpendicular to the direction of current flow, a first conductor portion having a first resistivity; a second conductor portion having a second resistivity higher than the first resistivity and surrounding the first conductor portion; and forming the wiring comprising the steps of:

7. A transistor portion; A wiring connected to the transistor portion; Including, The wiring has a cross-sectional configuration in which the wiring is cut by a plane perpendicular to a direction in which a current flows. a first conductor portion having a first resistivity; a second conductor portion having a second resistivity higher than the first resistivity and surrounding the first conductor portion; An electronic device comprising a semiconductor device including:

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