Amplifier circuit

Abstract

To provide a Doherty amplifier circuit that can improve power efficiency and reduce signal distortion.SOLUTION: An amplifier circuit 10 includes: a carrier amplifier 11 and a peak amplifier 21; a phase shift line 42; a power combiner that combines radio frequency signals input to a first terminal and a second terminal and outputs the combined signal from a third terminal; and an impedance element that is a resistor element or a capacitor. The carrier amplifier 11 is connected between a signal input terminal 120 and the first terminal, the peak amplifier 21 is connected between the signal input terminal 120 and one end of the phase shift line 42, the other end of the phase shift line 42 is connected to the second terminal, a signal output terminal 110 is connected to the third terminal, one end of the impedance element is connected to the second terminal, and the other end of the impedance element is connected to the signal output terminal 110.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an amplifier circuit. [Background technology]

[0002] Patent Document 1 discloses a Doherty amplifier circuit equipped with a carrier amplifier and a peak amplifier. In the Doherty amplifier circuit, when the power level of the input signal becomes large, the peak amplifier operates to adjust the load impedance at the output end of the carrier amplifier. This improves the efficiency and linearity of the Doherty amplifier circuit. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2016-127568 A Summary of the Invention [Problem to be solved by the invention]

[0004] In the case of a Doherty amplifier circuit, during peak amplifier operation, a carrier amplifier and a composite output signal of the peak amplifier are output from the carrier amplifier. However, if the load impedance at the output end of the carrier amplifier is not ideal, a part of the output signal of the peak amplifier may leak independently to the output terminal of the Doherty amplifier circuit without being combined with the output signal of the carrier amplifier. This may result in a deterioration in the power efficiency of the Doherty amplifier circuit, and a deterioration in the linearity of the gain, resulting in signal distortion.

[0005] The present invention has been made to solve the above-mentioned problems, and has an object to provide a Doherty amplifier circuit that can improve power efficiency and suppress signal distortion. [Means for solving the problem]

[0006] In order to achieve the above-mentioned object, an amplifier circuit according to one embodiment of the present invention includes an input terminal and an output terminal, a carrier amplifier and a peak amplifier, a first phase shift circuit, a power combiner that combines high-frequency signals input to the first terminal and the second terminal and outputs the power from a third terminal, and an impedance element which is a resistor element or a capacitor, wherein the carrier amplifier is connected between the input terminal and the first terminal, the peak amplifier is connected between the input terminal and one end of the first phase shift circuit, the other end of the first phase shift circuit is connected to the second terminal, the output terminal is connected to the third terminal, one end of the impedance element is connected to the second terminal, and the other end of the impedance element is connected to the output terminal.

[0007] Moreover, an amplifier circuit according to one embodiment of the present invention includes an input terminal and an output terminal, a carrier amplifier and a peak amplifier, a first phase shift circuit, a power combiner that combines high-frequency signals input to the first terminal and the second terminal and outputs the power from a third terminal, and an impedance element which is a resistor element or a capacitor, wherein the carrier amplifier is connected between the input terminal and the first terminal, the peak amplifier is connected between the input terminal and one end of the first phase shift circuit, the other end of the first phase shift circuit is connected to the second terminal, the output terminal is connected to the third terminal, one end of the impedance element is connected to the first terminal, and the other end of the impedance element is connected to the output terminal.

[0008] Moreover, an amplifier circuit according to one embodiment of the present invention includes an input terminal and an output terminal, a carrier amplifier and a peak amplifier, a first phase shift circuit, a power combiner that combines high-frequency signals input to the first terminal and the second terminal and outputs the power from a third terminal, and an impedance element which is a resistor element or a capacitor, wherein the carrier amplifier is connected between the input terminal and the first terminal, the peak amplifier is connected between the input terminal and one end of the first phase shift circuit, the other end of the first phase shift circuit is connected to the second terminal, the output terminal is connected to the third terminal, one end of the impedance element is connected to the second terminal, and the other end of the impedance element is connected to the first terminal. Effect of the Invention

[0009] According to the present invention, it is possible to provide a Doherty amplifier circuit that can improve power efficiency and suppress signal distortion. [Brief description of the drawings]

[0010] [Figure 1] 1 is a circuit configuration diagram of an amplifier circuit, a high-frequency circuit, and a communication device according to a first embodiment. [Diagram 2] FIG. 2 is a circuit configuration diagram of an amplifier circuit according to a comparative example. [Diagram 3] 4 is a graph showing the gain and load impedance characteristics of the amplifier circuits according to the example and the comparative example. [Figure 4] FIG. 11 is a circuit configuration diagram of an amplifier circuit according to a second embodiment. [Diagram 5] FIG. 11 is a circuit configuration diagram of an amplifier circuit according to a third embodiment. [Figure 6] FIG. 11 is a circuit configuration diagram of an amplifier circuit according to a fourth embodiment. [Figure 7] FIG. 11 is a circuit configuration diagram of an amplifier circuit according to a fifth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] The embodiments of the present invention will be described in detail below. Note that the embodiments described below are all comprehensive or specific examples. The numerical values, shapes, materials, components, arrangements and connection forms of the components, etc. shown in the following embodiments are merely examples and are not intended to limit the present invention. Among the components in the following examples and modifications, those not described in the independent claims are described as optional components. In addition, the size or size ratio of the components shown in the drawings is not necessarily strict. In each figure, substantially the same configuration is given the same symbol, and duplicated descriptions may be omitted or simplified.

[0012] In the following, terms indicating the relationship between elements, such as parallel and perpendicular, terms indicating the shape of an element, such as rectangular, and numerical ranges do not only indicate the strict meaning, but also include a substantially equivalent range, for example, a difference of about a few percent.

[0013] In the circuit configuration of the present disclosure, "connected" includes not only direct connection by a connection terminal and / or a wiring conductor, but also electrical connection via other circuit elements. "Connected between A and B" means connected to both A and B between A and B, and includes being connected in series to the path connecting A and B, as well as being connected in parallel (shunt) between the path and ground.

[0014] In addition, in this disclosure, a "signal path" means a transmission line composed of a wiring through which a high-frequency signal propagates, an electrode directly connected to the wiring, and a terminal directly connected to the wiring or the electrode.

[0015] In addition, in the circuit connection configuration of the present disclosure, "component (element) A is arranged in series on path B" means that both the signal input terminal and the signal output terminal of component (element) A are connected to the wiring, electrode, or terminal that constitutes path B. In addition, "multiple paths are connected in parallel" means that one end of each of the multiple paths is connected to the same wiring, electrode, or terminal.

[0016] (Embodiment) [1. Circuit configuration of amplifier circuit 10, high frequency circuit 1, and communication device 4] The circuit configurations of an amplifier circuit 10, a high-frequency circuit 1, and a communication device 4 according to Example 1 of the present embodiment will be described with reference to Fig. 1. Fig. 1 is a circuit configuration diagram of the amplifier circuit 10, the high-frequency circuit 1, and the communication device 4 according to Example 1.

[0017] [1.1 Circuit configuration of communication device 4] First, a description will be given of a circuit configuration of the communication device 4. As shown in Fig. 1, the communication device 4 according to the first embodiment includes a high-frequency circuit 1, an antenna 2, and an RF signal processing circuit (RFIC) 3.

[0018] The high-frequency circuit 1 transmits high-frequency signals between the antenna 2 and the RFIC 3. A detailed circuit configuration of the high-frequency circuit 1 will be described later.

[0019] The antenna 2 is connected to an antenna connection terminal 100 of the high-frequency circuit 1 , and transmits a high-frequency signal output from the high-frequency circuit 1 , and also receives a high-frequency signal from the outside and outputs it to the high-frequency circuit 1 .

[0020] The RFIC3 is an example of a signal processing circuit that processes a high-frequency signal, and is connected to the signal input terminal 120 and the signal output terminal 130 of the high-frequency circuit 1. Specifically, the RFIC3 performs signal processing on a received signal input via a receiving path of the high-frequency circuit 1 by down-conversion or the like, and outputs the received signal generated by the signal processing to a baseband signal processing circuit (BBIC, not shown). The RFIC3 also performs signal processing on a transmission signal input from the BBIC by up-conversion or the like, and outputs the transmission signal generated by the signal processing to the transmitting path of the high-frequency circuit 1. The RFIC3 also has a control unit that controls the circuit components of the high-frequency circuit 1. Note that a part or all of the functions of the RFIC3 as a control unit may be implemented outside the RFIC3, and may be implemented, for example, in the BBIC or the high-frequency circuit 1.

[0021] The RFIC 3 also functions as a control unit that controls the power supply voltage and bias voltage (or bias current) supplied to each amplifier in the radio frequency circuit 1. Specifically, the RFIC 3 outputs a control signal to the radio frequency circuit 1. Each amplifier in the radio frequency circuit 1 is supplied with a power supply voltage and bias voltage (or bias current) controlled by the control signal.

[0022] In the communication device 4 according to this embodiment, the antenna 2 is not an essential component.

[0023] [1.2 Circuit configuration of high-frequency circuit 1] Next, a description will be given of the circuit configuration of the high-frequency circuit 1. As shown in Fig. 1, the high-frequency circuit 1 includes an amplifier circuit 10, filters 61 and 62, a low-noise amplifier 31, a capacitor 71, an inductor 72, an antenna connection terminal 100, a signal input terminal 120, and a signal output terminal 130.

[0024] The filter 61 is connected between the signal output terminal 110 and the antenna connection terminal 100, and passes a transmission signal of band A among the transmission signals amplified by the amplifier circuit 10. The filter 62 is connected between the low-noise amplifier 31 and the antenna connection terminal 100, and passes a signal in the reception band of band A among the reception signals received by the antenna 2.

[0025] The filters 61 and 62 may form a duplexer for transmitting and receiving signals in band A, or may be a single filter for transmitting signals in a time division duplex (TDD) system. When the filters 61 and 62 are filters for TDD, a switch for switching between transmission and reception is disposed at least in one of the preceding and succeeding stages of the single filter.

[0026] The low noise amplifier 31 is connected between the filter 62 and the signal output terminal 130 , and amplifies the received signal of band A and outputs it to the RFIC 3 .

[0027] Capacitor 71 is a circuit element for impedance matching arranged in series between signal output terminal 110 and filter 61. Capacitor 71 may or may not be connected (in shunt arrangement) between the path connecting signal output terminal 110 and filter 61 and ground.

[0028] The inductor 72 is a circuit element for impedance matching that is connected (in shunt arrangement) between the ground and a path that connects the filter 61 and the antenna connection terminal 100. The inductor 72 may or may not be arranged in series between the filter 61 and the antenna connection terminal 100.

[0029] The high frequency circuit 1 may include a transmitting circuit that transmits a transmitting signal of a band B different from band A to the antenna 2, and a receiving circuit that transmits a receiving signal of band B received from the antenna 2 to the RFIC 3. Furthermore, the high frequency circuit 1 may be configured as a circuit that transmits and receives high frequency signals of three or more bands.

[0030] [1.3 Circuit configuration of amplifier circuit 10 according to embodiment 1] Next, the circuit configuration of the amplifier circuit 10 will be described in detail.

[0031] As shown in FIG. 1, the amplifier circuit 10 includes a signal input terminal 120, a signal output terminal 110, a carrier amplifier 11, a peak amplifier 21, phase shift lines 41 and 42, a distributor 50, a transformer 80, and a resistive element 70.

[0032] The signal input terminal 120 is an example of an input terminal, and is connected to the RFIC 3. The signal output terminal 110 is an example of an output terminal, and is connected to the antenna connection terminal 100 via the capacitor 71 and the filter 61. Each of the signal input terminal 120, the signal output terminal 110, and the antenna connection terminal 100 may be a metal conductor such as a metal electrode or a metal bump, or may be a point on a metal wiring.

[0033] Carrier amplifier 11 amplifies a high-frequency signal input to carrier amplifier 11. Carrier amplifier 11 is, for example, a class A (or class AB) amplifier circuit capable of amplifying all power levels of signals input to carrier amplifier 11, and is capable of highly efficient amplification particularly in the low output range and the medium output range. Carrier amplifier 11 is, for example, an inverting amplifier, which inverts the phase of an input signal and outputs it. An input end of the carrier amplifier is connected to signal input terminal 120 via distributor 50, and an output end is connected to transformer 80.

[0034] The peak amplifier 21 amplifies a high-frequency signal input to the peak amplifier 21. The peak amplifier 21 is, for example, a class C amplifier circuit capable of amplifying a signal input to the peak amplifier 21 in a region where the power level of the signal is high. A bias voltage smaller than the bias voltage applied to the amplifying transistor of the carrier amplifier 11 is applied to the amplifying transistor of the peak amplifier 21. As a result, the higher the power level of the signal input to the peak amplifier 21, the lower the output impedance. This allows the peak amplifier 21 to perform low-distortion amplification in a high-output region. The peak amplifier 21 is, for example, an inverting amplifier, and inverts the phase of the input signal and outputs it. The input end of the peak amplifier 21 is connected to the phase shift line 41, and the output end is connected to the phase shift line 42.

[0035] Each of the carrier amplifier 11 and the peak amplifier 21 has an amplifying transistor. The amplifying transistor is, for example, a bipolar transistor such as a heterojunction bipolar transistor (HBT) or a field effect transistor such as a metal-oxide-semiconductor field effect transistor (MOSFET).

[0036] The phase shift line 42 is an example of a first phase shift circuit, and is, for example, a quarter-wave transmission line. The phase shift line 42 delays the phase of a high-frequency signal input from one end thereof by 90° (quarter wavelength) and outputs the signal from the other end. Note that the phase shift line 42 (first phase shift circuit) does not have to have a form of a phase shift line, and may be, for example, an inductor element arranged in series in a path connecting the peak amplifier 21 and the transformer 80, or a low-pass filter composed of an inductor and a capacitor. One end of the phase shift line 42 is connected to the output end of the peak amplifier 21, and the other end is connected to the transformer 80.

[0037] The phase shift line 41 is an example of a second phase shift circuit, and is, for example, a quarter-wave transmission line. The phase shift line 41 delays the phase of a high-frequency signal input from one end thereof by 90° (quarter wavelength) and outputs the signal from the other end. Note that the phase shift line 41 (second phase shift circuit) does not have to have a form of a phase shift line, and may be, for example, an inductor element arranged in series on a path connecting the distributor 50 and the peak amplifier 21, or a low-pass filter composed of an inductor and a capacitor. One end of the phase shift line 41 is connected to the signal input terminal 120 via the distributor 50, and the other end is connected to the input terminal of the peak amplifier 21.

[0038] In addition, each of the phase-shift lines 41 and 42 is not limited to delaying the phase of the input band A high-frequency signal by exactly 90°, but may be any circuit that delays the phase of the input band A high-frequency signal within the range of (90°±20°).

[0039] The transformer 80 is an example of a power combiner, and has a first terminal, a second terminal, and a third terminal (not shown in FIG. 1), combines high-frequency signals input to the first terminal and the second terminal, and outputs the combined signal from the third terminal. The transformer 80 has coils 801 (first coil) and 802 (second coil) that are electromagnetically coupled to each other. One end of the coil 801 is connected to the output terminal of the carrier amplifier 11 via the first terminal, and the other end of the coil 801 is connected to the other end of the phase shift line 42 via the second terminal. One end of the coil 802 is connected to the signal output terminal 110 via the third terminal, and the other end of the coil 802 is connected to the ground. Note that one end of the coil 801 may be the first terminal, the other end of the coil 801 may be the second terminal, and one end of the coil 802 may be the third terminal.

[0040] The distributor 50 is an example of a power distributor, and is connected between the signal input terminal 120 and the input terminal of the carrier amplifier 11 and the input terminal of the peak amplifier 21. The distributor 50 has a fourth terminal, a fifth terminal, and a sixth terminal (not shown in FIG. 1), and distributes power of a high-frequency signal input to the fourth terminal at a predetermined distribution ratio, outputs one of the power-distributed high-frequency signals from the fifth terminal, and outputs the other power-distributed high-frequency signal from the sixth terminal. The fourth terminal is connected to the signal input terminal 120, the fifth terminal is connected to the input terminal of the carrier amplifier 11, and the sixth terminal is connected to one end of the phase-shift line 41.

[0041] The resistive element 70 is an example of a first resistive element and an example of an impedance element. One end of the resistive element 70 is connected to the other end (second terminal) of the coil 801, and the other end of the resistive element 70 is connected to the signal output terminal 110. The resistive element 70 is arranged in series in a bypass path different from the path connecting the second terminal, the coils 801 and 802, and the signal output terminal 110.

[0042] Here, the operation of a Doherty amplifier circuit having a carrier amplifier and a peak amplifier will be described with reference to an amplifier circuit 500 according to a comparative example.

[0043] A Doherty amplifier circuit is an amplifier circuit that achieves high efficiency by using multiple amplifiers as carrier amplifiers and peak amplifiers. In a Doherty amplifier circuit, a carrier amplifier means an amplifier that operates regardless of whether the power of the high-frequency signal (input) is low or high. In a Doherty amplifier circuit, a peak amplifier means an amplifier that mainly operates when the power of the high-frequency signal (input) is high. Therefore, when the input power of the high-frequency signal is low, the high-frequency signal is mainly amplified by the carrier amplifier, and when the input power of the high-frequency signal is high, the high-frequency signal is amplified and combined by the carrier amplifier and peak amplifier. Due to this operation, in a Doherty amplifier circuit, the load impedance seen from the carrier amplifier in the low output power region increases, improving efficiency at low output power. Also, the load impedance seen from the carrier amplifier in the high output power region decreases, improving linearity at high output power.

[0044] 2 is a circuit diagram of an amplifier circuit 500 according to a comparative example. The amplifier circuit 500 shown in the figure includes a signal input terminal 120, a signal output terminal 110, a carrier amplifier 11, a peak amplifier 21, phase shift lines 41 and 43, and a distributor 50. The amplifier circuit 500 according to the comparative example is different in configuration from the amplifier circuit 10 according to the first embodiment in that a phase shift line 43 is added instead of the phase shift line 42, and that a transformer 80 is not provided.

[0045] First, the load impedance of the carrier amplifier 11 when the carrier amplifier 11 and the peak amplifier 21 are operating (ON) (when a large signal is input) is impedance converted by the phase shift line 43, and becomes smaller than the load impedance of the carrier amplifier 11 when the carrier amplifier 11 is operating (ON) and the peak amplifier 21 is not operating (OFF) (when a small signal is input). Therefore, when a large signal is input, the carrier amplifier 11 and the peak amplifier 21 operate, making it possible to output a high power signal.

[0046] Next, when the carrier amplifier 11 is operating (ON) and the peak amplifier 21 is not operating (OFF) (when a small signal is input), the load impedance of the peak amplifier 21 is in an open state, and when a small signal is input, the load impedance of the carrier amplifier 11 is higher than when a large signal is input. Therefore, when a small signal is input, the load impedance of the carrier amplifier 11 becomes higher, allowing the amplifier circuit 500 to operate with high efficiency.

[0047] However, when the carrier amplifier 11 and the peak amplifier 21 are operating (when a large signal is input), the carrier amplifier 11 has a finite impedance and does not have an ideal impedance, so that a part of the output signal of the peak amplifier 21 may not be combined with the output signal of the carrier amplifier 11 and may leak independently to the signal output terminal 110. This may result in a deterioration in the power efficiency of the amplifier circuit 500 and a deterioration in the linearity of the gain, causing signal distortion.

[0048] In contrast to this, in the amplifier circuit 10 according to this embodiment, the signal leaking from the peak amplifier 21 to the signal output terminal 110 via the transformer 80 is offset by the signal transmitted through the bypass path, which is provided with the resistive element 70, thereby making it possible to suppress distortion of the output signal due to the operation of the peak amplifier 21.

[0049] The circuit state of the amplifier circuit 10 according to this embodiment will be specifically described below with reference to FIG.

[0050] As shown in Fig. 1, first, a high frequency main signal is input from the signal input terminal 120. Here, it is assumed that the phase of the high frequency main signal is 0° at node n1 on the path connecting the signal input terminal 120 and the distributor 50. It is assumed that the high frequency main signal is power-distributed by the distributor 50, output as the carrier main signal to the carrier amplifier 11 side, and output as the peak signal and the peak auxiliary signal to the peak amplifier 21 side. At node n2 on the path connecting the distributor 50 and the carrier amplifier 11, the phase of the carrier main signal remains unchanged and is 0°. Meanwhile, at node n4 on the path connecting the phase shift line 41 and the peak amplifier 21, the phases of the peak signal and the peak auxiliary signal are delayed by 90° by the phase shift line 41 and become -90°.

[0051] Next, the phase of the carrier main signal is inverted in carrier amplifier 11 and becomes -180° at node n3 on the path connecting the output end of carrier amplifier 11 and coil 801. On the other hand, the phases of the peak signal and peak auxiliary signal are inverted in peak amplifier 21 and become -270° at node n5 at the output end of peak amplifier 21, and become 0° at node n6 at the other end of coil 801, delayed by 90° by phase shift line 42.

[0052] Next, the signal amplified by the peak amplifier 21 is branched into a peak signal and a peak auxiliary signal at the other end of the coil 801. The peak signal passes through the coils 801 and 802 and reaches a node n7 on a path connecting the coil 802 and the signal output terminal 110. The peak auxiliary signal passes through the resistive element 70 and reaches the node n7. Here, since the peak signal is transmitted from the other end of the coil 801 to one end of the coil 802, the phase of the peak signal is inverted and becomes −180° at the node n7. On the other hand, since the peak auxiliary signal passes through the resistive element 70 and does not undergo a phase shift, it becomes 0° at the node n7. In other words, since the phases of the peak signal and the peak auxiliary signal are in an inverse phase relationship at the node n7, the peak signal and the peak auxiliary signal are substantially cancelled out at the node n7.

[0053] The resistance value of the resistive element 70 is determined so that the amplitudes of the peak signal and the peak auxiliary signal are approximately equal at the node n7.

[0054] This makes it possible to prevent a portion of the output signal from the peak amplifier 21 from leaking to the signal output terminal 110 alone.

[0055] 3 is a graph showing the gain and load impedance characteristics of the amplifier circuits according to Example 1 and Comparative Example. The upper part of the figure shows the gains of the carrier amplifier 11 and the peak amplifier 21 relative to the output power of the amplifier circuit, and the lower part of the figure shows the load impedance at the output terminal of the carrier amplifier 11.

[0056] 3, in a region where the output power of the amplifier circuit is high, the peak amplifier 21 is turned on. At the same time, the load impedance of the carrier amplifier 11 decreases, and the carrier amplifier 11 can output a high-power signal.

[0057] Moreover, in the amplifier circuit 500 according to the comparative example, the output signal of the peak amplifier 21 leaks independently to the signal output terminal 110, so that the gain of the amplifier circuit 500 increases with an increase in the output power, resulting in a deterioration in the linearity of the gain and an increase in signal distortion.

[0058] In contrast, the amplifier circuit 10 according to this embodiment can prevent the output signal of the peak amplifier 21 from leaking independently to the signal output terminal 110, so that the gain of the amplifier circuit 10 becomes approximately equal to the gain of the carrier amplifier 11 and the gain can be maintained constant, thereby suppressing signal distortion.

[0059] [1.4 Circuit configuration of amplifier circuit 10A according to embodiment 2] Next, a circuit configuration of the amplifier circuit 10A according to the second embodiment will be described in detail. FIG. 4 is a circuit configuration diagram of the amplifier circuit 10A according to the second embodiment. As shown in the figure, the amplifier circuit 10A includes a signal input terminal 120 and a signal output terminal 110, a carrier amplifier 11, a peak amplifier 21, phase shift lines 41 and 42, a distributor 50, a transformer 81, and a resistive element 73. The amplifier circuit 10A according to this embodiment has a different configuration from the amplifier circuit 10 according to the first embodiment. Hereinafter, the amplifier circuit 10A according to this embodiment will be described with a focus on different configurations, with a description of the same configurations as those of the amplifier circuit 10 according to the first embodiment omitted.

[0060] The input end of the carrier amplifier 11 is connected to a signal input terminal 120 via a distributor 50, and the output end is connected to a transformer 81. The input end of the peak amplifier 21 is connected to a phase shift line 41, and the output end is connected to a phase shift line .

[0061] The phase shift line 42 is an example of a first phase shift circuit, and is, for example, a quarter-wave transmission line. One end of the phase shift line 42 is connected to the output terminal of the peak amplifier 21, and the other end is connected to the transformer 81. One end of the phase shift line 41 is connected to the signal input terminal 120 via the distributor 50, and the other end is connected to the input terminal of the peak amplifier 21.

[0062] The transformer 81 is an example of a power combiner, and has a first terminal, a second terminal, and a third terminal (not shown in FIG. 4), combines high-frequency signals input to the first terminal and the second terminal, and outputs the combined signal from the third terminal. The transformer 81 has coils 811 (second coil) and 812 (first coil) that are electromagnetically coupled to each other. One end of the coil 811 and one end of the coil 812 are connected to the output terminal of the carrier amplifier 11 via the first terminal. The other end of the coil 811 is connected to the other end of the phase shift line 42 via the second terminal. One end of the coil 812 is connected to the signal output terminal 110 via the third terminal. Note that one end of the coil 811 and one end of the coil 812 may be the first terminal, the other end of the coil 812 may be the second terminal, and the other end of the coil 811 may be the third terminal.

[0063] Instead of the transformer 81, the power combiner may be a transmission line transformer constituted by two transmission lines that are electromagnetically coupled to each other.

[0064] The resistive element 73 is an example of a first resistive element and an example of an impedance element. One end of the resistive element 73 is connected to the other end (second terminal) of the coil 812, and the other end of the resistive element 73 is connected to the signal output terminal 110. The resistive element 73 is arranged in series in a bypass path different from the path connecting the second terminal, the coils 812 and 811, and the signal output terminal 110.

[0065] In the amplifier circuit 10A according to this embodiment, a bypass path provided with a resistive element 73 is provided so that a signal leaking from the peak amplifier 21 to the signal output terminal 110 via the transformer 81 is offset by a signal transmitted through the bypass path, thereby suppressing distortion of the output signal due to the operation of the peak amplifier 21.

[0066] Hereinafter, the circuit state of the amplifier circuit 10A according to this embodiment will be specifically described with reference to FIG.

[0067] As shown in Fig. 4, first, a high frequency main signal is input from the signal input terminal 120. Here, it is assumed that the phase of the high frequency main signal is 0° at node n1 on the path connecting the signal input terminal 120 and the distributor 50. It is assumed that the high frequency main signal is power-distributed by the distributor 50, output as the carrier main signal to the carrier amplifier 11 side, and output as the peak signal and the peak auxiliary signal to the peak amplifier 21 side. At node n2 on the path connecting the distributor 50 and the carrier amplifier 11, the phase of the carrier main signal remains unchanged and is 0°. Meanwhile, at node n4 on the path connecting the phase shift line 41 and the peak amplifier 21, the phases of the peak signal and the peak auxiliary signal are delayed by 90° by the phase shift line 41 and become -90°.

[0068] Next, the phase of the carrier main signal is inverted in carrier amplifier 11 and becomes -180° at node n3 on the path connecting the output end of carrier amplifier 11 and coil 811. On the other hand, the phases of the peak signal and peak auxiliary signal are inverted in peak amplifier 21 and become -270° at node n5 at the output end of peak amplifier 21, and become 0° at node n6 at the other end of coil 812, delayed by 90° by phase shift line 42.

[0069] Next, the signal amplified by the peak amplifier 21 is branched into a peak signal and a peak auxiliary signal at the other end of the coil 812. The peak signal passes through the coils 812 and 811 and reaches a node n7 on a path connecting the coil 811 and the signal output terminal 110. The peak auxiliary signal passes through the resistive element 73 and reaches the node n7. Here, the peak signal is transmitted from the other end of the coil 812 to the other end of the coil 811, so that the phase of the peak signal is inverted and becomes −180° at the node n7. On the other hand, the peak auxiliary signal passes through the resistive element 73 and does not undergo a phase shift, so that it becomes 0° at the node n7. In other words, the phases of the peak signal and the peak auxiliary signal are in an inverse phase relationship at the node n7, so that the peak signal and the peak auxiliary signal are substantially cancelled out at the node n7.

[0070] The resistance value of the resistive element 73 is determined so that the amplitudes of the peak signal and the peak auxiliary signal are approximately equal at the node n7.

[0071] This makes it possible to prevent a part of the output signal of the peak amplifier 21 from leaking independently to the signal output terminal 110. As a result, it is possible to provide an amplifier circuit 10A in which power efficiency is improved and the linearity of gain is improved, thereby suppressing signal distortion.

[0072] [1.5 Circuit configuration of amplifier circuit 10B according to the third embodiment] Next, a circuit configuration of the amplifier circuit 10B according to the third embodiment will be described in detail. FIG. 5 is a circuit configuration diagram of the amplifier circuit 10B according to the third embodiment. As shown in the figure, the amplifier circuit 10B includes a signal input terminal 120 and a signal output terminal 110, a carrier amplifier 11, a peak amplifier 21, phase shift lines 41 and 42, a distributor 50, a transformer 81, and a resistive element 74. The amplifier circuit 10B according to this embodiment has a different connection configuration from the amplifier circuit 10A according to the second embodiment. Hereinafter, the amplifier circuit 10B according to this embodiment will be described with a focus on different configurations, with the same configurations as those of the amplifier circuit 10A according to the second embodiment being omitted.

[0073] The resistive element 74 is an example of a first resistive element and also an example of an impedance element. One end of the resistive element 74 is connected to one end of the coil 811 and one end (first terminal) of the coil 812, and the other end of the resistive element 74 is connected to the signal output terminal 110. The resistive element 74 is connected in parallel with the coil 811.

[0074] In the amplifier circuit 10B according to this embodiment, a bypass path provided with a resistive element 74 is provided so that a signal leaking from the peak amplifier 21 to the signal output terminal 110 via the coils 812 and 811 is offset by a signal transmitted through the bypass path, thereby suppressing distortion of the output signal due to the operation of the peak amplifier 21.

[0075] Hereinafter, the circuit state of the amplifier circuit 10B according to this embodiment will be specifically described with reference to FIG.

[0076] As shown in Fig. 5, first, a high frequency main signal is input from the signal input terminal 120. Here, it is assumed that the phase of the high frequency main signal is 0° at node n1 on the path connecting the signal input terminal 120 and the distributor 50. It is assumed that the high frequency main signal is power-distributed by the distributor 50, output as the carrier main signal to the carrier amplifier 11 side, and output as the peak signal and the peak auxiliary signal to the peak amplifier 21 side. At node n2 on the path connecting the distributor 50 and the carrier amplifier 11, the phase of the carrier main signal remains unchanged and is 0°. Meanwhile, at node n4 on the path connecting the phase shift line 41 and the peak amplifier 21, the phases of the peak signal and the peak auxiliary signal are delayed by 90° by the phase shift line 41 and become -90°.

[0077] Next, the phase of the carrier main signal is inverted in carrier amplifier 11 and becomes -180° at node n3 on the path connecting the output end of carrier amplifier 11 and coil 811. On the other hand, the phases of the peak signal and peak auxiliary signal are inverted in peak amplifier 21 and become -270° at node n5 at the output end of peak amplifier 21, and become 0° at node n6 at the other end of coil 812, delayed by 90° by phase shift line 42.

[0078] Next, the signal amplified by the peak amplifier 21 is branched into a peak signal and a peak auxiliary signal at a connection point between one end of the coil 812 and one end of the coil 811. The peak signal passes through the coils 812 and 811 and reaches a node n7 on a path connecting the coil 811 and the signal output terminal 110. The peak auxiliary signal passes through the coils 812 and 811, which are electromagnetically coupled to each other, so that the phase of the peak signal is inverted and becomes −180° at the node n7. On the other hand, the peak auxiliary signal passes through the coil 812 and the resistive element 74, which are not electromagnetically coupled to each other, so that there is no phase shift and the peak auxiliary signal becomes 0° at the node n7. In other words, the phases of the peak signal and the peak auxiliary signal are in an inverse phase relationship at the node n7, so that the peak signal and the peak auxiliary signal are approximately offset at the node n7.

[0079] The resistance value of the resistive element 74 is determined so that the amplitudes of the peak signal and the peak auxiliary signal are approximately equal at the node n7.

[0080] This makes it possible to prevent a part of the output signal of the peak amplifier 21 from leaking independently to the signal output terminal 110. As a result, it is possible to provide an amplifier circuit 10B in which power efficiency is improved and the linearity of gain is improved, thereby suppressing signal distortion.

[0081] In the amplifier circuit 10B according to this embodiment, a first capacitor may be disposed in place of the resistive element 74. The first capacitor is an example of an impedance element, and one end of the first capacitor is connected to one end of the coil 811 and one end (first terminal) of the coil 812, and the other end of the first capacitor is connected to the signal output terminal 110. The first capacitor is connected in parallel to the coil 811.

[0082] This makes it possible to prevent a part of the output signal of the peak amplifier 21 from leaking independently to the signal output terminal 110. As a result, it is possible to provide an amplifier circuit 10B in which power efficiency is improved and the linearity of gain is improved, thereby suppressing signal distortion.

[0083] [1.6 Circuit configuration of amplifier circuit 10C according to embodiment 4] Next, the circuit configuration of the amplifier circuit 10C according to the fourth embodiment will be described in detail. FIG. 6 is a circuit configuration diagram of the amplifier circuit 10C according to the fourth embodiment. As shown in the figure, the amplifier circuit 10C includes a signal input terminal 120 and a signal output terminal 110, a carrier amplifier 11, a peak amplifier 21, phase shift lines 41 and 42, a distributor 50, a transformer 81, and a resistive element 75. The amplifier circuit 10C according to this embodiment has a different connection configuration from the amplifier circuit 10A according to the second embodiment. Hereinafter, the amplifier circuit 10C according to this embodiment will be described with a focus on different configurations, with the same configurations as those of the amplifier circuit 10A according to the second embodiment being omitted.

[0084] The resistive element 75 is an example of a first resistive element and an example of an impedance element. One end of the resistive element 75 is connected to the other end (second terminal) of the coil 812, and the other end of the resistive element 75 is connected to one end of the coil 811 and one end (first terminal) of the coil 812. The resistive element 75 is connected in parallel with the coil 812.

[0085] In the amplifier circuit 10C according to this embodiment, a bypass path provided with a resistive element 75 is provided so that a signal leaking from the peak amplifier 21 to the signal output terminal 110 via the coils 812 and 811 is offset by a signal transmitted through the bypass path, thereby suppressing distortion of the output signal due to the operation of the peak amplifier 21.

[0086] Hereinafter, the circuit state of the amplifier circuit 10C according to this embodiment will be specifically described with reference to FIG.

[0087] As shown in Fig. 6, first, a high frequency main signal is input from the signal input terminal 120. Here, it is assumed that the phase of the high frequency main signal is 0° at node n1 on the path connecting the signal input terminal 120 and the distributor 50. It is assumed that the high frequency main signal is power-distributed by the distributor 50, output as the carrier main signal to the carrier amplifier 11 side, and output as the peak signal and the peak auxiliary signal to the peak amplifier 21 side. At node n2 on the path connecting the distributor 50 and the carrier amplifier 11, the phase of the carrier main signal remains unchanged and is 0°. Meanwhile, at node n4 on the path connecting the phase shift line 41 and the peak amplifier 21, the phases of the peak signal and the peak auxiliary signal are delayed by 90° by the phase shift line 41 and become -90°.

[0088] Next, the phase of the carrier main signal is inverted in carrier amplifier 11 and becomes -180° at node n3 on the path connecting the output end of carrier amplifier 11 and coil 811. On the other hand, the phases of the peak signal and peak auxiliary signal are inverted in peak amplifier 21 and become -270° at node n5 at the output end of peak amplifier 21, and become 0° at node n6 at the other end of coil 812, delayed by 90° by phase shift line 42.

[0089] Next, the signal amplified by the peak amplifier 21 is branched into a peak signal and a peak auxiliary signal at node n6. The peak signal passes through coils 812 and 811 and reaches node n7 on a path connecting coil 811 and signal output terminal 110. The peak auxiliary signal passes through resistance element 75 and coil 811 and reaches node n7. Here, the peak signal passes through coils 812 and 811, which are electromagnetically coupled to each other, so the phase of the peak signal is inverted and becomes −180° at node n7. On the other hand, the peak auxiliary signal passes through coil 812 and resistance element 75, which are not electromagnetically coupled to each other, so there is no phase shift and the peak auxiliary signal becomes 0° at node n7. In other words, the phases of the peak signal and the peak auxiliary signal are in an inverse phase relationship at node n7, so the peak signal and the peak auxiliary signal are approximately offset at node n7.

[0090] The resistance value of the resistive element 75 is determined so that the amplitudes of the peak signal and the peak auxiliary signal are approximately equal at the node n7.

[0091] This makes it possible to prevent a part of the output signal of the peak amplifier 21 from leaking independently to the signal output terminal 110. As a result, it is possible to provide an amplifier circuit 10C in which power efficiency is improved and the linearity of gain is improved, thereby suppressing signal distortion.

[0092] In the amplifier circuit 10C according to this embodiment, a first capacitor may be disposed instead of the resistive element 75. The first capacitor is an example of an impedance element, and one end of the first capacitor is connected to the other end (second terminal) of the coil 812, and the other end of the first capacitor is connected to one end of the coil 811 and one end (first terminal) of the coil 812. The first capacitor is connected in parallel with the coil 812.

[0093] This makes it possible to prevent a part of the output signal of the peak amplifier 21 from leaking independently to the signal output terminal 110. As a result, it is possible to provide an amplifier circuit 10C in which power efficiency is improved and the linearity of gain is improved, thereby suppressing signal distortion.

[0094] [1.7 Circuit configuration of amplifier circuit 10D according to embodiment 5] Next, the circuit configuration of the amplifier circuit 10D according to the fifth embodiment will be described in detail. FIG. 7 is a circuit configuration diagram of the amplifier circuit 10D according to the fifth embodiment. As shown in the figure, the amplifier circuit 10D includes a signal input terminal 120 and a signal output terminal 110, a carrier amplifier 11, a peak amplifier 21, phase shift lines 41 and 42, a distributor 50, a transformer 81, and a capacitor 76. The amplifier circuit 10D according to this embodiment is different from the amplifier circuit 10A according to the second embodiment only in that the resistor element 73 is replaced with a capacitor 76. Hereinafter, the amplifier circuit 10D according to this embodiment will be described mainly with respect to the different configuration, with the description of the same configuration as that of the amplifier circuit 10A according to the second embodiment being omitted.

[0095] Capacitor 76 is an example of a first capacitor and also an example of an impedance element. One end of capacitor 76 is connected to the other end (second terminal) of coil 812, and the other end of capacitor 76 is connected to signal output terminal 110. Capacitor 76 is arranged in series on a bypass path different from the path connecting the second terminal, coils 812 and 811, and signal output terminal 110.

[0096] In the amplifier circuit 10D according to this embodiment, a bypass path provided with the capacitor 76 allows a signal leaking from the peak amplifier 21 to the signal output terminal 110 via the transformer 81 to be offset by a signal transmitted through the bypass path, thereby suppressing distortion of the output signal due to the operation of the peak amplifier 21.

[0097] Hereinafter, the circuit state of the amplifier circuit 10D according to this embodiment will be specifically described with reference to FIG.

[0098] As shown in FIG. 7, the signal amplified by the peak amplifier 21 is branched into a peak signal and a peak auxiliary signal at the other end of the coil 812. The peak signal passes through the coils 812 and 811 and reaches a node n7 on a path connecting the coil 811 and the signal output terminal 110. The peak auxiliary signal passes through the capacitor 76 and reaches the node n7. Here, the peak signal is transmitted from the other end of the coil 812 to the other end of the coil 811, so that the phase of the peak signal is inverted and becomes −180° at the node n7. On the other hand, the peak auxiliary signal passes through the capacitor 76 and does not undergo a phase shift, so that it becomes 0° at the node n7. In other words, the phases of the peak signal and the peak auxiliary signal are in an inverse phase relationship at the node n7, so that the peak signal and the peak auxiliary signal are substantially cancelled out at the node n7.

[0099] The capacitance value of the capacitor 76 is determined so that the amplitudes of the peak signal and the peak auxiliary signal at the node n7 are approximately equal.

[0100] This makes it possible to prevent a part of the output signal of the peak amplifier 21 from leaking independently to the signal output terminal 110. As a result, it is possible to provide an amplifier circuit 10D in which power efficiency is improved and the linearity of gain is improved, thereby suppressing signal distortion.

[0101] [2. Effects, etc.] As described above, the amplifier circuit 10 according to the first embodiment, the amplifier circuit 10A according to the second embodiment, and the amplifier circuit 10D according to the fifth embodiment each include a signal input terminal 120 and a signal output terminal 110, a carrier amplifier 11 and a peak amplifier 21, a phase shift line 42, a power combiner that combines high-frequency signals input to the first terminal and the second terminal and outputs the power from the third terminal, and an impedance element which is a resistor element or a capacitor, and the carrier amplifier 11 is connected between the signal input terminal 120 and the first terminal, the peak amplifier 21 is connected between the signal input terminal 120 and one end of the phase shift line 42, the other end of the phase shift line 42 is connected to the second terminal, the signal output terminal 110 is connected to the third terminal, one end of the impedance element is connected to the second terminal, and the other end of the impedance element is connected to the signal output terminal 110.

[0102] According to this, the bypass path provided with the impedance element cancels out the signal leaking from the peak amplifier 21 to the signal output terminal 110 via the power combiner with the signal transmitted through the bypass path, thereby suppressing distortion of the output signal caused by the operation of the peak amplifier 21. Therefore, it is possible to provide the amplifier circuits 10, 10A, and 10D in which the power efficiency is improved and the linearity of the gain is improved to suppress signal distortion.

[0103] Also, for example, in the amplifier circuits 10, 10A, and 10D, the carrier amplifier 11 and the peak amplifier 21 are each an inverting amplifier, and the phase shift line 42 is a phase shift line that delays the input signal by 90°.

[0104] This makes it possible to provide the Doherty amplifier circuits 10, 10A, and 10D with improved efficiency in the low output power range and improved linearity in the high output power range.

[0105] For example, in the amplifier circuit 10, the power combiner is a transformer 80 having coils 801 and 802, one end of the coil 801 is connected to a first terminal, the other end of the coil 801 is connected to a second terminal, one end of the coil 802 is connected to a third terminal, and the other end of the coil 802 is connected to ground.

[0106] This makes it possible to provide an amplifier circuit 10 with improved power efficiency and suppressed signal distortion.

[0107] For example, in amplifier circuits 10A and 10D, the power combiner is a transformer 81 having coils 811 and 812, one end of coil 811 and one end of coil 812 are connected to a first terminal, the other end of coil 812 is connected to a second terminal, and the other end of coil 811 is connected to a third terminal.

[0108] This makes it possible to provide amplifier circuits 10A and 10D with improved power efficiency and suppressed signal distortion.

[0109] Moreover, the amplifier circuit 10B of the third embodiment includes a signal input terminal 120 and a signal output terminal 110, a carrier amplifier 11 and a peak amplifier 21, a phase shift line 42, a power combiner that combines high-frequency signals input to the first terminal and the second terminal and outputs the power from the third terminal, and an impedance element which is a resistor element or a capacitor, in which the carrier amplifier 11 is connected between the signal input terminal 120 and the first terminal, the peak amplifier 21 is connected between the signal input terminal 120 and one end of the phase shift line 42, the other end of the phase shift line 42 is connected to the second terminal, the signal output terminal 110 is connected to the third terminal, one end of the impedance element is connected to the first terminal, and the other end of the impedance element is connected to the signal output terminal 110.

[0110] According to this, the bypass path provided with the impedance element allows the signal leaking from the peak amplifier 21 to the signal output terminal 110 via the power combiner to be offset by the signal transmitted through the bypass path, thereby suppressing distortion of the output signal caused by the operation of the peak amplifier 21. Therefore, it is possible to provide an amplifier circuit 10B in which power efficiency is improved and signal distortion is suppressed by improving the linearity of the gain.

[0111] Also, for example, in the amplifier circuit 10B, the carrier amplifier 11 and the peak amplifier 21 are each an inverting amplifier, and the phase shift line 42 is a phase shift line that delays the input signal by 90°.

[0112] This makes it possible to provide a Doherty amplifier circuit 10B with improved efficiency in the low output power range and improved linearity in the high output power range.

[0113] For example, in amplifier circuit 10B, the power combiner is a transformer 81 having coils 811 and 812, one end of coil 811 and one end of coil 812 are connected to a first terminal, the other end of coil 812 is connected to a second terminal, and the other end of coil 811 is connected to a third terminal.

[0114] This makes it possible to provide an amplifier circuit 10B in which power efficiency is improved and signal distortion is suppressed.

[0115] Moreover, the amplifier circuit 10C of the fourth embodiment includes a signal input terminal 120 and a signal output terminal 110, a carrier amplifier 11 and a peak amplifier 21, a phase shift line 42, a power combiner that combines high-frequency signals input to the first terminal and the second terminal and outputs the power from the third terminal, and an impedance element which is a resistor element or a capacitor, in which the carrier amplifier 11 is connected between the signal input terminal 120 and the first terminal, the peak amplifier 21 is connected between the signal input terminal 120 and one end of the phase shift line 42, the other end of the phase shift line 42 is connected to the second terminal, the signal output terminal 110 is connected to the third terminal, one end of the impedance element is connected to the second terminal, and the other end of the impedance element is connected to the first terminal.

[0116] According to this, the signal leaking from the peak amplifier 21 to the signal output terminal 110 via the power combiner is offset by the signal transmitted through the bypass path provided with the impedance element, thereby suppressing distortion of the output signal caused by the operation of the peak amplifier 21. Therefore, it is possible to provide an amplifier circuit 10C in which power efficiency is improved and signal distortion is suppressed by improving the linearity of the gain.

[0117] Also, for example, in the amplifier circuit 10C, the carrier amplifier 11 and the peak amplifier 21 are each an inverting amplifier, and the phase shift line 42 is a phase shift line that delays the input signal by 90°.

[0118] This makes it possible to provide a Doherty amplifier circuit 10C with improved efficiency in the low output power range and improved linearity in the high output power range.

[0119] For example, in amplifier circuit 10C, the power combiner is a transformer 81 having coils 811 and 812, one end of coil 811 and one end of coil 812 are connected to a first terminal, the other end of coil 812 is connected to a second terminal, and the other end of coil 811 is connected to a third terminal.

[0120] This makes it possible to provide an amplifier circuit 10C with improved power efficiency and suppressed signal distortion.

[0121] For example, the amplifier circuits 10, 10A, 10B, 10C and 10D further include a distributor 50 connected between the signal input terminal 120 and the input terminal of the carrier amplifier 11 and the input terminal of the peak amplifier 21, and a phase shift line 41 connected between the signal input terminal 120 and the input terminal of the peak amplifier 21.

[0122] This makes it possible to split an input high-frequency signal into two high-frequency signals having a predetermined phase difference.

[0123] Also, for example, in the amplifier circuits 10, 10A, 10B, 10C, and 10D, the phase shift line 41 is a phase shift line that delays the input signal by 90 degrees.

[0124] This makes it possible to split an input high-frequency signal into two high-frequency signals having a phase difference of 90°.

[0125] (Other embodiments, etc.) Although the amplifier circuit according to the embodiment of the present invention has been described above with reference to examples, the amplifier circuit according to the present invention is not limited to the above examples. The present invention also includes other examples realized by combining any of the components in the above examples, modifications obtained by applying various modifications to the above examples that would come to mind by a person skilled in the art without departing from the spirit of the present invention, and various devices incorporating the above amplifier circuit.

[0126] Furthermore, for example, in the amplifier circuit, high-frequency circuit, and communication device according to the above embodiments, other circuit elements, wiring, etc. may be inserted between the paths connecting the circuit elements and signal paths disclosed in the drawings.

[0127] The features of the amplifier circuit described based on each of the above embodiments will be described below.

[0128] <1> An input terminal and an output terminal; A carrier amplifier and a peak amplifier, A first phase shift circuit; a power combiner that combines high-frequency signals input to the first terminal and the second terminal and outputs the combined signal from a third terminal; an impedance element which is a resistor element or a capacitor; the carrier amplifier is connected between the input terminal and the first terminal, the peak amplifier is connected between the input terminal and one end of the first phase shift circuit, the other end of the first phase shift circuit is connected to the second terminal; the output terminal is connected to the third terminal; one end of the impedance element is connected to the second terminal, The other end of the impedance element is connected to the output terminal.

[0129] <2> each of the carrier amplifier and the peak amplifier is an inverting amplifier; The first phase shift circuit is a phase shift line that delays an input signal by 90°. <1> The amplifier circuit according to claim 1 .

[0130] <3> the power combiner is a transformer having a first coil and a second coil; One end of the first coil is connected to the first terminal, The other end of the first coil is connected to the second terminal, one end of the second coil is connected to the third terminal, The other end of the second coil is connected to ground. <1> or <2> The amplifier circuit according to claim 1 .

[0131] <4> the power combiner is a transformer having a first coil and a second coil; one end of the first coil and one end of the second coil are connected to the first terminal, The other end of the first coil is connected to the second terminal, The other end of the second coil is connected to the third terminal. <1> or <2> The amplifier circuit according to claim 1 .

[0132] <5> An input terminal and an output terminal; A carrier amplifier and a peak amplifier, A first phase shift circuit; a power combiner that combines high-frequency signals input to the first terminal and the second terminal and outputs the combined signal from a third terminal; an impedance element which is a resistor element or a capacitor; the carrier amplifier is connected between the input terminal and the first terminal, the peak amplifier is connected between the input terminal and one end of the first phase shift circuit, the other end of the first phase shift circuit is connected to the second terminal; the output terminal is connected to the third terminal; one end of the impedance element is connected to the first terminal, The other end of the impedance element is connected to the output terminal.

[0133] <6> each of the carrier amplifier and the peak amplifier is an inverting amplifier; The first phase shift circuit is a phase shift line that delays an input signal by 90°. <5> The amplifier circuit according to claim 1 .

[0134] <7> the power combiner is a transformer having a first coil and a second coil; one end of the first coil and one end of the second coil are connected to the first terminal, The other end of the first coil is connected to the second terminal, The other end of the second coil is connected to the third terminal. <5> or <6> The amplifier circuit according to claim 1 .

[0135] <8> An input terminal and an output terminal; A carrier amplifier and a peak amplifier, A first phase shift circuit; a power combiner that combines high-frequency signals input to the first terminal and the second terminal and outputs the combined signal from a third terminal; an impedance element which is a resistor element or a capacitor; the carrier amplifier is connected between the input terminal and the first terminal, the peak amplifier is connected between the input terminal and one end of the first phase shift circuit, the other end of the first phase shift circuit is connected to the second terminal; the output terminal is connected to the third terminal; one end of the impedance element is connected to the second terminal, The other end of the impedance element is connected to the first terminal.

[0136] <9> each of the carrier amplifier and the peak amplifier is an inverting amplifier; The first phase shift circuit is a phase shift line that delays an input signal by 90°. <8> The amplifier circuit according to claim 1 .

[0137] <10> the power combiner is a transformer having a first coil and a second coil; one end of the first coil and one end of the second coil are connected to the first terminal, The other end of the first coil is connected to the second terminal, The other end of the second coil is connected to the third terminal. <8> or <9> The amplifier circuit according to claim 1 .

[0138] <11> moreover, a power divider connected between the input terminal and an input end of the carrier amplifier and an input end of the peak amplifier; a second phase shift circuit connected between the input terminal and an input end of the peak amplifier; <1> ~ <10> 2. The amplifier circuit according to claim 1 ,

[0139] <12> The second phase shift circuit is a phase shift line that delays an input signal by 90°. <11> The amplifier circuit according to claim 1 . [Industrial Applicability]

[0140] The present invention can be widely used as an amplifier circuit arranged in a multi-band front end section in communication devices such as mobile phones. [Explanation of symbols]

[0141] 1 High-frequency circuits 2 Antennas 3 RF signal processing circuit (RFIC) 4. Communications equipment 10, 10A, 10B, 10C, 10D, 500 Amplification Circuit 11 Carrier Amplifier 21 Peak Amplifier 31 Low noise amplifier 41, 42, 43 phase shift line 50 distributor 61, 62 Filter 70, 73, 74, 75 Resistance elements 71, 76 Capacitor 72 Inductor 80, 81 Trans 100 Antenna connection terminal 110, 130 Signal output terminals 120 Signal input terminal 801, 802, 811, 812 coils

Claims

1. An input terminal and an output terminal; A carrier amplifier and a peak amplifier, A first phase shift circuit; a power combiner that combines high-frequency signals input to a first terminal and a second terminal and outputs the combined signal from a third terminal; an impedance element which is a resistor element or a capacitor; the carrier amplifier is connected between the input terminal and the first terminal, the peak amplifier is connected between the input terminal and one end of the first phase shift circuit, the other end of the first phase shift circuit is connected to the second terminal; the output terminal is connected to the third terminal; one end of the impedance element is connected to the second terminal, The other end of the impedance element is connected to the output terminal. Amplification circuit.

2. each of the carrier amplifier and the peak amplifier is an inverting amplifier; The first phase shift circuit is a phase shift line that delays an input signal by 90°.

2. The amplifier circuit according to claim 1.

3. the power combiner is a transformer having a first coil and a second coil; One end of the first coil is connected to the first terminal, The other end of the first coil is connected to the second terminal, One end of the second coil is connected to the third terminal, The other end of the second coil is connected to ground.

3. The amplifier circuit according to claim 1 or 2.

4. the power combiner is a transformer having a first coil and a second coil; one end of the first coil and one end of the second coil are connected to the first terminal, The other end of the first coil is connected to the second terminal, The other end of the second coil is connected to the third terminal.

3. The amplifier circuit according to claim 1 or 2.

5. An input terminal and an output terminal; A carrier amplifier and a peak amplifier, A first phase shift circuit; a power combiner that combines high-frequency signals input to a first terminal and a second terminal and outputs the combined signal from a third terminal; an impedance element which is a resistor element or a capacitor; the carrier amplifier is connected between the input terminal and the first terminal, the peak amplifier is connected between the input terminal and one end of the first phase shift circuit, the other end of the first phase shift circuit is connected to the second terminal; the output terminal is connected to the third terminal; one end of the impedance element is connected to the first terminal, The other end of the impedance element is connected to the output terminal. Amplification circuit.

6. each of the carrier amplifier and the peak amplifier is an inverting amplifier; The first phase shift circuit is a phase shift line that delays an input signal by 90°.

6. The amplifier circuit according to claim 5.

7. the power combiner is a transformer having a first coil and a second coil; one end of the first coil and one end of the second coil are connected to the first terminal, The other end of the first coil is connected to the second terminal, The other end of the second coil is connected to the third terminal.

7. The amplifier circuit according to claim 5 or 6.

8. An input terminal and an output terminal; A carrier amplifier and a peak amplifier, A first phase shift circuit; a power combiner that combines high-frequency signals input to a first terminal and a second terminal and outputs the combined signal from a third terminal; an impedance element which is a resistor element or a capacitor; the carrier amplifier is connected between the input terminal and the first terminal, the peak amplifier is connected between the input terminal and one end of the first phase shift circuit, the other end of the first phase shift circuit is connected to the second terminal; the output terminal is connected to the third terminal; one end of the impedance element is connected to the second terminal, The other end of the impedance element is connected to the first terminal. Amplification circuit.

9. each of the carrier amplifier and the peak amplifier is an inverting amplifier; The first phase shift circuit is a phase shift line that delays an input signal by 90°.

9. The amplifier circuit according to claim 8.

10. the power combiner is a transformer having a first coil and a second coil; one end of the first coil and one end of the second coil are connected to the first terminal, The other end of the first coil is connected to the second terminal, The other end of the second coil is connected to the third terminal.

10. The amplifier circuit according to claim 8 or 9.

11. moreover, a power divider connected between the input terminal and an input end of the carrier amplifier and an input end of the peak amplifier; a second phase shift circuit connected between the input terminal and an input end of the peak amplifier; 9. An amplifier circuit according to claim 1, 5 or 8.

12. The second phase shift circuit is a phase shift line that delays an input signal by 90°.

12. The amplifier circuit of claim 11.

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