Printed wiring board, printed circuit board, electronic device, and imaging device
The printed wiring board design addresses impedance mismatch issues by using ground patterns to stabilize impedance around through holes, ensuring high-speed signal transmission quality.
Patent Information
- Application Number
- JP2023106160
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-06-28
- Publication Date
- 2025-01-17
AI Technical Summary
Conventional methods struggle to maintain impedance matching between through holes and wiring on printed circuit boards, leading to impedance mismatch and signal quality degradation as signal speeds increase beyond 10 Gbps.
A printed wiring board design featuring a substrate with through holes, signal wiring, and ground layers, where ground patterns overlap clearances around the through holes to stabilize impedance, using GND patterns to reduce impedance mismatch.
The design effectively suppresses impedance mismatch between through holes and signal wiring, ensuring stable signal transmission at high speeds, maintaining impedance within 75Ω±10% and supporting transmission rates over 10 Gbps.
Smart Images

Figure 2025005792000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a printed wiring board, a printed circuit board, an electronic device, and an imaging device. [Background technology]
[0002] Data communication is carried out by digital signals between two semiconductor devices mounted on an electronic device. Digital signals are transmitted via wiring on a printed circuit board or a cable. The printed circuit board and the cable are connected via a connector.
[0003] In recent years, the transmission speed of digital signals has increased to over 10 Gbps, and in order to ensure signal quality, it is necessary to stabilize the impedance of transmission paths such as board wiring, connectors, and cables. In addition to the need to stabilize the impedance of each of the board wiring, connectors, and cables, impedance matching is also required at the connection points of each part. This is because the increase in signal speed has led to impedance mismatching in even minute parts having a negative effect on signal quality. Here, when mounting a connector on a board, a configuration is adopted in which a through hole perpendicular to the board plane is provided and the core wire of the connector is inserted into the through hole. Patent Document 1 discloses an impedance matching method for such a through hole. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] JP 2007-250885 A Summary of the Invention [Problem to be solved by the invention]
[0005] However, in the conventional technology described in Patent Document 1, in a configuration for transmitting high-speed signals, it was difficult to minimize the impedance mismatch between a through-hole for mounting a connector on a printed circuit board and the wiring connected to the through-hole. An object of the present invention is to provide a printed wiring board capable of suppressing impedance mismatch between a through hole and a wiring connected to the through hole, and a printed circuit board, an electronic device, and an imaging device using the same. [Means for solving the problem]
[0006] According to one aspect of the present invention, there is provided a printed wiring board having a substrate having a first surface and a second surface opposite to the first surface, a through hole provided in the substrate so as to penetrate between the first surface and the second surface, a wiring provided on the first surface and connected to the through hole, and a first ground layer provided on the first surface, the first ground layer having a first clearance located around the through hole and a first opening connected to the first clearance and including the wiring, and the first ground layer having a first ground pattern overlapping the first clearance and provided along the wiring in a plan view viewed perpendicular to the substrate. Effect of the Invention
[0007] According to the present invention, it is possible to suppress impedance mismatch between a through hole and a wiring connected to the through hole. [Brief description of the drawings]
[0008] [Figure 1A] FIG. 1 is a perspective view showing a printed circuit board according to a first embodiment. [Figure 1B] FIG. 1 is a plan view showing a printed circuit board according to a first embodiment. [Figure 1C] 1 is a cross-sectional view showing a printed circuit board according to a first embodiment. [Diagram 2]1 is a graph showing the results of a TDR simulation for Example 1 and a comparative example. [Figure 3A] FIG. 11 is a perspective view showing a printed circuit board according to a second embodiment. [Figure 3B] FIG. 11 is a plan view showing a printed circuit board according to a second embodiment. [Figure 3C] FIG. 6 is a cross-sectional view showing a printed circuit board according to a second embodiment. [Figure 3D] FIG. 11 is a plan view showing a second conductor layer in a printed circuit board according to a second embodiment. [Figure 3E] FIG. 11 is a plan view showing a third conductor layer in a printed circuit board according to a second embodiment. [Figure 4A] FIG. 11 is a perspective view showing a printed circuit board according to a third embodiment. [Figure 4B] FIG. 11 is a plan view showing a printed circuit board according to a third embodiment. [Figure 4C] FIG. 11 is a cross-sectional view showing a printed circuit board according to a third embodiment. [Figure 4D] FIG. 11 is a plan view showing a second conductor layer in a printed circuit board according to a third embodiment. [Figure 4E] FIG. 11 is a plan view showing a third conductor layer in a printed circuit board according to a third embodiment. [Diagram 5] 1 is a graph showing the results of a TDR simulation for Examples 2 and 3. [Figure 6] FIG. 13 is a schematic diagram showing an imaging device as an example of an electronic device according to a fourth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0009] [First embodiment] A printed circuit board according to a first embodiment of the present invention will be described with reference to Figures 1A to 1C. Figure 1A is a perspective view showing the printed circuit board according to this embodiment. Figure 1B is a plan view showing the printed circuit board according to this embodiment as viewed from the back surface side. Figure 1C is a cross-sectional view taken along line AB in Figure 1B.
[0010] As shown in FIGS. 1A to 1C, a printed circuit board 101 according to this embodiment includes a printed wiring board 102 and a connector 120 mounted on the printed wiring board 102.
[0011] Printed wiring board 102 is a substrate having signal wiring 103, through holes 104, and multiple ground layers (GND layers) 106. Printed wiring board 102 has a front surface and a back surface opposite to the front surface. Signal wiring 103 is provided on the back surface, which is a first surface of printed wiring board 102. Connector 120 is mounted on the front surface, which is a second surface of printed wiring board 102, via through holes 104, as described below.
[0012] The signal wiring 103 is a wiring through which a signal is transmitted, for example, an image signal indicating an image that requires high-speed transmission. Note that the signal transmitted to the signal wiring 103 is not limited to an image signal indicating an image, but may be various signals according to the type of device in which the printed circuit board 101 is used.
[0013] The multiple GND layers 106 include 12 GND layers 106a, 106b, 106c, 106d, 106e, 106f, 106g, 106h, 106k, 106m, 106n, and 106p. The GND layers 106 are conductor layers made of a conductor such as copper and connected to a reference potential such as a ground potential. The GND layer 106a is provided on the back surface of the printed wiring board 102 in the same layer as the signal wiring 103. The GND layers 106b, 106c, 106d, 106e, 106f, 106g, 106h, 106k, 106m, and 106n are provided in the inner layer of the printed wiring board 102 from the back surface side to the front surface side of the printed wiring board 102 in this order. The GND layer 106p is provided on the front surface of the printed wiring board 102. These multiple GND layers 106 are stacked with an insulating layer interposed between them.
[0014] The number of layers of the GND layer 106 is not limited to the above-mentioned 12 layers. For example, the GND layer 106 may be a single layer of only the GND layer 106a, or may be a multi-layer structure other than the 12 layers. The GND layer 106 provided on the inner layer of the printed wiring board 102 may also be a single layer or a multi-layer structure.
[0015] Through hole 104 is provided in printed wiring board 102 so as to penetrate between the front and back surfaces of printed wiring board 102. Through hole 104 is composed of a wall surface of a hole provided to penetrate between the front and back surfaces of printed wiring board 102 and a conductor such as copper formed on the peripheral portion of the hole on the front and back surfaces of printed wiring board 102. The hole of through hole 104 has a cross-sectional shape such as a circle, a rectangle, etc. into which core wire 1201 can be inserted according to the shape of core wire 1201 of connector 120 to be inserted into through hole 104.
[0016] A circular clearance 105 is provided in each layer of the multiple GND layers 106. The clearance 105 is a region where no conductor is provided in the GND layer 106. The clearance 105 is provided to have a circular planar shape around the through hole 104 with the through hole 104 at the center in a plan view perpendicular to the printed wiring board 102. The planar shape of the clearance 105 is not limited to a circle, and may be various shapes such as a polygon such as a rectangle, an ellipse, or a combination thereof depending on the layout of the signal wiring 103, the through hole 104, etc.
[0017] On the back surface of the printed wiring board 102, the signal wiring 103 is provided so as to extend to reach the through hole 104 and to be physically connected to the through hole 104. As a result, the signal wiring 103 and the through hole 104 are electrically connected to each other. On the other hand, the signal wiring 103 and the through hole 104 are electrically insulated from the multiple GND layers 106.
[0018] A strip-shaped opening 107 is provided along the signal wiring 103 in the GND layer 106a, which is the same layer as the signal wiring 103. The signal wiring 103 is included in the opening 107 and is arranged so as to extend through the center of the opening 107. The opening 107 has openings 107a and 107b. The opening 107a is arranged outside the clearance 105. The opening 107b is sandwiched between ground patterns (GND patterns) 106ax provided so as to be located on both sides of the signal wiring 103 in the GND layer 106a.
[0019] The GND pattern 106ax provided on the GND layer 106a is arranged so as to overlap with the clearance 105 and partially cover the clearance 105 in a plan view perpendicular to the printed wiring board 102. The GND patterns 106ax on both sides of the signal wiring 103 are arranged so as to be aligned with the signal wiring 103 in a plan view perpendicular to the printed wiring board 102. The GND patterns 106ax are arranged so as to leave a distance L1 between the center of the through hole 104 and the GND pattern 106ax in the extending direction of the signal wiring 103. The width of each of the GND patterns 106ax on both sides of the signal wiring 103 in a direction perpendicular to the extending direction of the signal wiring 103 reaches the outer periphery of the clearance 105 at the end on the through hole 104 side.
[0020] The opening 107a is connected to the clearance 105 via an opening 107b. Here, a gap L3 between the GND pattern 106ax and the signal wiring 103 in the opening 107b is narrower than a gap L2 between the GND layer 106a and the signal wiring 103 in the opening 107a.
[0021] The size relationship between the gap L2 and the gap L3 is not limited to the above relationship. As in the second and third embodiments described later, the gap L2 and the gap L3 may be equal, or the gap L2 may be narrower than the gap L3, but it is preferable that the gap L3 is narrower than the gap L2. That is, it is preferable that the gap L3 between the GND pattern 106ax and the signal wiring 103 is narrower than the gap L2 between the GND layer 106a and the signal wiring 103 at the opening 107a outside the clearance 105. By making the gap L3 narrower than the gap L2, the GND pattern 106ax can sufficiently reduce the increase in impedance of the signal wiring 103.
[0022] Of the GND layers 106 provided in the inner layers, the GND layers 106b, 106c, 106d, 106e, 106f, and 106g are each provided with a strip-shaped opening 108 so as to overlap the signal wiring 103 in a plan view perpendicular to the printed wiring board 102. The signal wiring 103 is included in each opening 108 in a plan view perpendicular to the printed wiring board 102 and is disposed so as to extend through the center of each opening 108. In each of the GND layers 106b, 106c, 106d, 106e, 106f, and 106g, the opening 108 is located outside the clearance 105 and is provided so as to be connected to the clearance 105.
[0023] The type of connector 120 is not particularly limited, but for example, it is a coaxial connector to which a coaxial cable is connected. The transmission standard of the signal output from connector 120 is not particularly limited, but it is Serial Digital Interface (SDI), CoaXPress (CXP), etc. Connector 120 is mounted on the back surface of printed wiring board 102. Connector 120 has core wire 1201 through which a signal is transmitted. Connector 120 is mounted on printed wiring board 102 with core wire 1201 inserted into through hole 104 connected to through hole 104 by soldering or the like. Connector 120 also has a GND terminal (not shown) that penetrates printed wiring board 102 and is electrically connected to GND layer 106.
[0024] In addition, elements such as active elements and passive elements may be mounted as mounting components on one or both of the front and back surfaces of printed wiring board 102, instead of or in addition to connector 120. Elements that can be mounted on printed wiring board 102 include, for example, a semiconductor device that processes a signal and outputs it to signal wiring 103, as in a fourth embodiment described later.
[0025] Recent high-speed signal transmission standards include standards such as SDI and CXP that transmit signals by matching impedance to 75 Ω single-ended. These standards mount a coaxial connector with an impedance of 75 Ω on the board and transmit signals using a coaxial cable with an impedance of 75 Ω. To comply with these standards, the through holes formed in the printed wiring board must also have an impedance of 75 Ω.
[0026] Conventional technology matches the impedance of through holes by controlling the diameter of the through holes and the diameter of the clearance around the through holes. The diameter of the clearance around the through holes that achieves an impedance of 75 Ω is larger than the diameter of the clearance around the through holes that achieves an impedance of 50 Ω for single-ended transmission or 100 Ω for differential transmission, which are adopted in many high-speed signal transmission standards. This is because increasing the distance between the through holes and the inner plane layers reduces the parasitic capacitance of the through holes and increases the impedance of the through holes.
[0027] In such a structure with a large clearance diameter, if impedance matching of the through hole is prioritized when electrically connecting the signal wiring and the through hole, the distance where the GND layer is not provided for the signal wiring becomes long. This increases the impedance of the signal wiring, causing impedance mismatch. On the other hand, if impedance matching is performed with priority given to the signal wiring, the clearance diameter is reduced, resulting in a decrease in the impedance of the through hole and causing impedance mismatch. Here, the case of impedance 75 Ω in single-ended transmission is shown as an example, but in other cases, such as impedance 50 Ω in single-ended transmission, impedance mismatch will become apparent if the signal transmission speed increases.
[0028] In contrast, in this embodiment, the GND pattern 106ax provided on the GND layer 106a is arranged so as to overlap the clearance 105 in a plan view perpendicular to the printed wiring board 102. The GND pattern 106ax can increase the diameter of the clearance 105 while reducing an increase in the impedance of the signal wiring 103, and can suppress a decrease in the impedance of the through hole 104. Thus, according to this embodiment, the impedance mismatch between the through hole 104 and the signal wiring 103 connected to the through hole 104 can be suppressed to a small value. By suppressing the impedance mismatch to a small value, in this embodiment, the quality of the signal to be transmitted is ensured, and high-speed transmission of, for example, more than 10 Gbps can be realized.
[0029] Example 1 The impedance characteristics of the printed circuit board 101 according to the first embodiment will be described below with specific numerical values. In Example 1, the printed circuit board 101 was configured as follows.
[0030] The printed wiring board 102 was a 12-layer board. The signal wiring 103 and the GND layers 106a and 106p were each 43 μm thick. The GND layers 106b, 106c, 106d, 106e, 106h, 106k, 106m, and 106n were each 18 μm thick. The GND layers 106f and 106g were each 35 μm thick.
[0031] The thicknesses of the insulating layers between the GND layers were as follows. That is, the thicknesses of the insulating layers between the GND layer 106a and the GND layer 106b, and between the GND layer 106n and the GND layer 106p were 165 μm. Also, the thicknesses of the insulating layers between the GND layer 106b and the GND layer 106c, between the GND layer 106d and the GND layer 106e, and between the GND layer 106f and the GND layer 106g were 100 μm. Also, the thicknesses of the insulating layers between the GND layer 106h and the GND layer 106k, and between the GND layer 106m and the GND layer 106n were also 100 μm. Also, the thicknesses of the insulating layers between the GND layer 106c and the GND layer 106d, between the GND layer 106e and the GND layer 106f, between the GND layer 106g and the GND layer 106h, and between the GND layer 106k and the GND layer 106m were 115 μm. The dielectric constant of the insulating layers was 4.3.
[0032] The width of the signal wiring 103 was 300 μm. The diameter of the through hole 104 was 700 μm. The diameter of the conductor layer portion of the through hole 104 was 900 μm. The diameter of the clearance 105 was 6 mm.
[0033] The distance L1 between the end of the GND pattern 106ax and the center of the through hole 104 was 1000 μm. Between the signal wiring 103 and the GND layer 106a, at the location outside the clearance 105 where the signal wiring 103 and the clearance 105 do not overlap, there was a gap L2 of 360 μm on each side. Between the signal wiring 103 and the GND pattern 106ax where the signal wiring 103 and the clearance 105 overlap, there was a gap L3 of 260 μm on each side. The GND layers 106b, 106c, 106d, 106e, 106f, and 106g were each provided with an opening 108 having a width of 1020 μm outside the clearance 105. Each opening 108 was arranged so as to overlap the signal wiring 103 in a plan view perpendicular to the printed wiring board 102.
[0034] (Transmission characteristics comparison) The TDR (Time Domain Reflectometry) characteristics of the above-mentioned Example 1 were confirmed by simulation. In the simulation, a step pulse signal was input to the signal wiring 103, and the impedance of the transmission path including the signal wiring 103, the through hole 104, and the connector 120 was analyzed from the waveform passing through the through hole 104 and the connector 120. In addition, in the simulation, the transmission path was modeled using HFSS by Ansys Inc. Furthermore, the TDR analysis was performed using HSPICE by Synopsys Inc.
[0035] In addition to Example 1, a similar simulation was performed for Comparative Examples 1 to 3 in which the GND pattern 106ax overlapping with the clearance 105 in Example 1 was removed. Comparative Example 1 is a case where the diameter of the clearance 105 is 2 mm, Comparative Example 2 is a case where the diameter of the clearance 105 is 4 mm, and Comparative Example 3 is a case where the diameter of the clearance 105 is 6 mm.
[0036] Fig. 2 is a graph showing the results of a simulation of the TDR characteristics performed for Example 1 and Comparative Examples 1 to 3. The vertical axis of Fig. 2 is the impedance (Ω) of the transmission line, and the horizontal axis is time (ns). In Fig. 2, the solid line indicates Example 1, the dashed line indicates Comparative Example 1 in which the diameter of clearance 105 is 2 mm, the long dashed line indicates Comparative Example 2 in which the diameter of clearance 105 is 4 mm, and the short dashed line indicates Comparative Example 3 in which the diameter of clearance 105 is 6 mm.
[0037] In the case of Example 1, the impedance was within 75Ω±10%. On the other hand, in the case of Comparative Example 1 in which the diameter of the clearance 105 was 2 mm, the impedance decreased to 45Ω. In addition, in the case of Comparative Example 2 in which the diameter of the clearance 105 was 4 mm, the impedance changed from 63Ω to 86Ω. In addition, in the case of Comparative Example 3 in which the diameter of the clearance 105 was 6 mm, the impedance increased to 104Ω.
[0038] The signal waveform is not adversely affected if the impedance fluctuation of the transmission line is within 75Ω±10% as in Example 1. In the cases of Comparative Examples 1 to 3, the impedance fluctuation exceeded 75Ω±10% in all cases.
[0039] In the case of Comparative Example 1, the diameter of the clearance 105 was 2 mm, so that the distance between the through hole 104 and the GND layer 106 was short, and the parasitic capacitance between them became large, and a large impedance drop occurred in the through hole 104. In the case of Comparative Example 3, the diameter of the clearance 105 was 6 mm, so that the distance between the through hole 104 and the GND layer 106 was long, and the parasitic capacitance between them became small, and no impedance mismatch occurred in the through hole 104. However, in the case of Comparative Example 3, the diameter of the clearance 105 was increased, so that the GND layer close to the signal wiring 103 disappeared, and the impedance of the signal wiring 103 increased significantly. In the case of Comparative Example 2, the diameter of the clearance 105 was 4 mm, so that the TDR characteristics were intermediate between Comparative Example 1, in which the diameter of the clearance 105 was 2 mm, and Comparative Example 3, in which the diameter of the clearance was 6 mm. In Comparative Example 2, the impedance of the signal wiring 103 did not decrease completely, and the impedance of the through hole 104 did not increase completely, and both impedances deviated from 75Ω±10%.
[0040] On the other hand, in Example 1, the GND layer is brought close to the signal wiring 103 only by the GND pattern 106ax of the GND layer 106a, and the signal wiring 103 is impedance-matched. In Example 1, the GND layer is overlapped on the clearance 105 only by the GND pattern 106ax, so that the parasitic capacitance between the through hole 104 and the GND layer 106 hardly increases, and the through hole 104 is also impedance-matched. As a result, in Example 1, the impedance mismatch between the signal wiring 103 and the through hole 104 can be suppressed to a small value.
[0041] [Second embodiment] A printed circuit board according to a second embodiment of the present invention will be described with reference to Figs. 3A to 3E. Fig. 3A is a perspective view showing a printed circuit board according to this embodiment. Fig. 3B is a plan view of the printed circuit board according to this embodiment as viewed from the back surface side. Fig. 3C is a cross-sectional view taken along line AB in Fig. 3B. Fig. 3D is a plan view showing a second conductor layer from the back surface side in the printed circuit board according to this embodiment. Fig. 3E is a plan view showing a third conductor layer from the back surface side in the printed circuit board according to this embodiment. Note that the same components as those in the first embodiment are given the same reference numerals and descriptions thereof will be omitted or simplified.
[0042] 3A to 3E, the printed circuit board 101 according to this embodiment has a basic configuration similar to that of the first embodiment. The printed circuit board 101 according to this embodiment is different from the first embodiment in the configurations of the GND layers 106a, 106b, and 106c.
[0043] In this embodiment, the GND layer 106a, which is the same layer as the signal wiring 103, is provided with a strip-shaped opening 107, as in the first embodiment. Also, in this embodiment, as in the first embodiment, the GND pattern 106ax is arranged so as to overlap with the clearance 105 and partially cover the clearance 105 in a plan view perpendicular to the printed wiring board 102. Also, the GND patterns 106ax on both sides of the signal wiring 103 are arranged so as to be aligned with the signal wiring 103, respectively, in a plan view perpendicular to the printed wiring board 102. Similarly to the first embodiment, the GND pattern 106ax is arranged so as to leave a distance L1 from the center of the through hole 104 to the GND pattern 106ax in the extension direction of the signal wiring 103.
[0044] On the other hand, in this embodiment, the gap L2 between the GND layer 106a and the signal wiring 103 in the opening 107a is equal to the gap L3 between the GND pattern 106ax and the signal wiring 103 in the opening 107b. Note that, in this embodiment, the gap L2 may be wider than the gap L3, as in the first embodiment.
[0045] In this embodiment, among the GND layers 106 provided in the inner layers, the GND layers 106b, 106c, 106d, 106e, 106f, and 106g are each provided with a strip-shaped opening 108, as in the first embodiment. The width of the opening 108 in a direction perpendicular to the extending direction of the signal wiring 103 is L10.
[0046] Furthermore, in this embodiment, GND patterns 106bx and 106cx are provided on the second and third GND layers 106b and 106c from the rear surface side of the printed wiring board 102, respectively.
[0047] The GND patterns 106bx provided on the GND layer 106b are arranged so as to overlap and partially cover the clearance 105 in a plan view perpendicular to the printed wiring board 102, and to be located on both sides of the signal wiring 103. An opening between the GND patterns 106bx is continuous with an opening 108 with a width L10. The GND patterns 106bx on both sides of the signal wiring 103 are arranged so as to be aligned with the signal wiring 103 in a plan view perpendicular to the printed wiring board 102. The GND patterns 106bx are arranged so as to leave a distance L1 between the center of the through hole 104 and the GND patterns 106bx in the extension direction of the signal wiring 103. In addition, the width of each of the GND patterns 106bx on both sides of the signal wiring 103 in a direction perpendicular to the extension direction of the signal wiring 103 is constant at L4 from the end on the through hole 104 side to the outer periphery of the clearance 105 in the extension direction of the signal wiring 103.
[0048] The GND patterns 106cx provided on the GND layer 106c are arranged so as to overlap and partially cover the clearance 105 in a plan view perpendicular to the printed wiring board 102, and to be located on both sides of the signal wiring 103. An opening between the GND patterns 106cx is connected to an opening 108 with a width L10. The GND patterns 106cx on both sides of the signal wiring 103 are arranged so as to be aligned with the signal wiring 103 in a plan view perpendicular to the printed wiring board 102. The GND patterns 106cx are arranged so as to leave a distance L1 between the center of the through hole 104 and the GND patterns 106cx in the extension direction of the signal wiring 103. In addition, the width of each of the GND patterns 106cx on both sides of the signal wiring 103 in a direction perpendicular to the extension direction of the signal wiring 103 is constant at L5 from the end on the through hole 104 side to the outer periphery of the clearance 105 in the extension direction of the signal wiring 103.
[0049] The size relationship between the widths of the GND patterns 106ax, 106bx, and 106cx is as follows: Width L4 of the inner layer GND pattern 106bx and width L5 of the inner layer GND pattern 106cx are narrower than the width of the GND pattern 106ax on the back side in the same direction. Also, width L5 of the GND pattern 106cx is narrower than width L4 of the GND pattern 106bx.
[0050] The area relationship between the GND patterns 106ax, 106bx, and 106cx is as follows: The area of the inner layer GND pattern 106bx and the area of the inner layer GND pattern 106cx are smaller than the area of the back side GND pattern 106ax. The area of the GND pattern 106cx is also smaller than the area of the GND pattern 106bx.
[0051] As in this embodiment, GND patterns 106bx, 106cx may be provided on the GND layers 106b, 106c, which are inner layers of the printed wiring board 102. By providing the GND patterns 106bx, 106cx on the GND layers 106b, 106c, which are inner layers, it is possible to further reduce an increase in impedance of the signal wiring 103. As a result, according to this embodiment, it is possible to further reduce the impedance mismatch between the through hole 104 and the signal wiring 103 connected to the through hole 104.
[0052] In this embodiment, the case where the GND patterns 106bx and 106cx are provided on the two GND layers 106b and 106c among the inner layers has been described, but the present invention is not limited to this. A GND pattern may be provided on one or more GND layers 106 among the inner layers, similar to the GND patterns 106bx and 106cx. In this case, the GND patterns can be provided on the multiple GND layers 106 so that the widths corresponding to the widths L4 and L5 of the GND patterns become smaller and the area of the GND patterns becomes smaller from the back side to the front side of the printed wiring board 102.
[0053] Example 2 The impedance characteristics of the printed circuit board 101 according to the second embodiment will be described below with specific numerical values. In Example 2, the printed circuit board 101 was configured as follows.
[0054] The printed wiring board 102 was a 12-layer board. The signal wiring 103 and the GND layers 106a and 106p were each 43 μm thick. The GND layers 106b, 106c, 106d, 106e, 106h, 106k, 106m, and 106n were each 18 μm thick. The GND layers 106f and 106g were each 35 μm thick.
[0055] The thicknesses of the insulating layers between the GND layers were as follows. That is, the thicknesses of the insulating layers between the GND layer 106a and the GND layer 106b, and between the GND layer 106n and the GND layer 106p were 165 μm. The thicknesses of the insulating layers between the GND layer 106b and the GND layer 106c, between the GND layer 106d and the GND layer 106e, and between the GND layer 106f and the GND layer 106g were 100 μm. The thicknesses of the insulating layers between the GND layer 106h and the GND layer 106k, and between the GND layer 106m and the GND layer 106n were also 100 μm. The thicknesses of the insulating layers between the GND layer 106c and the GND layer 106d, between the GND layer 106e and the GND layer 106f, between the GND layer 106g and the GND layer 106h, and between the GND layer 106k and the GND layer 106m were 115 μm. The dielectric constant of the insulating layers was 4.3.
[0056] The width of the signal wiring 103 was 300 μm. The diameter of the through hole 104 was 700 μm. The diameter of the conductor layer portion of the through hole 104 was 900 μm. The diameter of the clearance 105 was 6 mm.
[0057] The distance L1 between the end of the GND pattern 106ax and the center of the through hole 104 was 1000 μm. Between the signal wiring 103 and the GND layer 106a and the GND pattern 106ax, there was a gap L2 of 360 μm on each side. The GND layers 106b, 106c, 106d, 106e, 106f, and 106g were each provided with an opening 108 having a width L10 of 1020 μm outside the clearance 105. Each opening 108 was arranged so as to overlap with the signal wiring 103 in a plan view perpendicular to the printed wiring board 102.
[0058] The distance L1 between the end of the GND pattern 106bx and the center of the through hole 104 was 1000 μm. The width L4 of the GND pattern 106bx overlapping the clearance 105 was 1800 μm.
[0059] The distance L1 between the end of the GND pattern 106cx and the center of the through hole 104 was 1000 μm. The width L5 of the GND pattern 106cx overlapping the clearance 105 was 1300 μm.
[0060] The TDR characteristics of the above-mentioned Example 2 were confirmed by simulation in the same manner as Example 1. Fig. 5 is a graph showing the results of a simulation of the TDR characteristics performed for Example 2 and Example 3 described below. The vertical axis of Fig. 5 is the impedance (Ω) of the transmission line, and the horizontal axis is time (ns). In Fig. 5, the solid line indicates Example 2, and the dashed line indicates Example 3.
[0061] In the case of Example 2, the impedance was within 75Ω±10%. Since the inner layer GND patterns 106bx and 106cx are on the inner layer, parasitic capacitance occurs between the through hole 104 and both the front and back surfaces of the GND patterns 106bx and 106cx. Therefore, the parasitic capacitance may be larger than that of the GND pattern 106ax on the front layer. In contrast, in Example 2, the GND patterns 106bx and 106cx are provided to be narrower than the GND pattern 106ax, so that the parasitic capacitance occurring between the GND patterns 106bx and 106cx and the through hole 104 is reduced. As a result, in Example 2, the through hole 104 can also be impedance matched.
[0062] [Third embodiment] A printed circuit board according to a third embodiment of the present invention will be described with reference to Figs. 4A to 4E. Fig. 4A is a perspective view showing a printed circuit board according to this embodiment. Fig. 4B is a plan view of the printed circuit board according to this embodiment as viewed from the back surface side. Fig. 4C is a cross-sectional view taken along line AB in Fig. 4B. Fig. 4D is a plan view showing a second conductor layer from the back surface side in the printed circuit board according to this embodiment. Fig. 4E is a plan view showing a third conductor layer from the back surface side in the printed circuit board according to this embodiment. Note that the same components as those in the first and second embodiments are given the same reference numerals and descriptions thereof will be omitted or simplified.
[0063] 4A to 4E, the printed circuit board 101 according to this embodiment has a basic configuration similar to that of the second embodiment. The printed circuit board 101 according to this embodiment is different from the second embodiment in the planar shapes of the GND patterns 106ax, 106bx, and 106cx.
[0064] In this embodiment, the GND layer 106a, which is the same layer as the signal wiring 103, is provided with a strip-shaped opening 107 as in the second embodiment. Also in this embodiment, as in the second embodiment, the GND pattern 106ax is arranged so as to overlap with the clearance 105 and partially cover the clearance 105 in a plan view perpendicular to the printed wiring board 102. As in the second embodiment, the GND pattern 106ax is arranged so as to leave a distance L1 from the center of the through hole 104 to the GND pattern 106ax in the extension direction of the signal wiring 103.
[0065] On the other hand, in this embodiment, the GND pattern 106ax has a planar shape with a varying width. Specifically, the width of each of the GND patterns 106ax on both sides of the signal wiring 103 in a direction perpendicular to the extending direction of the signal wiring 103 increases from a width L6 at the end on the through-hole 104 side to the outer periphery of the clearance 105 in the extending direction of the signal wiring 103. That is, the width of the GND pattern 106ax on the side closer to the through-hole 104 is narrower than the width on the side farther from the through-hole 104.
[0066] In this embodiment, among the GND layers 106 provided in the inner layers, the GND layers 106b, 106c, 106d, 106e, 106f, and 106g are each provided with a strip-shaped opening 108, as in the second embodiment. The width of the opening 108 in a direction perpendicular to the extension direction of the signal wiring 103 is L10.
[0067] In this embodiment, similarly to the second embodiment, GND patterns 106bx and 106cx are provided on the second and third GND layers 106b and 106c from the rear surface side of the printed wiring board 102, respectively.
[0068] On the other hand, in this embodiment, the GND pattern 106bx has a planar shape with a varying width. Specifically, the width of each of the GND patterns 106bx on both sides of the signal wiring 103 in a direction perpendicular to the extending direction of the signal wiring 103 increases from a width L7 at the end on the through-hole 104 side to the outer periphery of the clearance 105 in the extending direction of the signal wiring 103. That is, the width of the GND pattern 106bx on the side closer to the through-hole 104 is narrower than the width on the side farther from the through-hole 104.
[0069] In this embodiment, the GND pattern 106cx has a planar shape with a varying width. Specifically, the width of each of the GND patterns 106cx on both sides of the signal wiring 103 in a direction perpendicular to the extending direction of the signal wiring 103 increases from a width L8 at the end on the through-hole 104 side to the outer periphery of the clearance 105 in the extending direction of the signal wiring 103. That is, the width of the GND pattern 106cx on the side closer to the through-hole 104 is narrower than the width on the side farther from the through-hole 104.
[0070] The size relationship between the widths L6, L7, and L8 of the GND patterns 106ax, 106bx, and 106cx is as follows: The width L7 of the inner layer GND pattern 106bx and the width L8 of the inner layer GND pattern 106cx are narrower than the width L6 of the GND pattern ax on the back side. Also, the width L8 of the GND pattern 106cx is narrower than the width L7 of the GND pattern 106bx.
[0071] The area relationship between the GND patterns 106ax, 106bx, and 106cx is as follows: The area of the inner layer GND pattern 106bx and the area of the inner layer GND pattern 106cx are smaller than the area of the back side GND pattern ax. The area of the GND pattern 106cx is smaller than the area of the GND pattern 106bx.
[0072] As in this embodiment, by changing the widths of the GND patterns 106ax, 106bx, and 106cx to narrow the width on the side closer to the through hole 104, it is possible to reduce the parasitic capacitance generated between these patterns and the through hole 104. As a result, according to this embodiment, it is possible to further reduce the impedance mismatch between the through hole 104 and the signal wiring 103 connected to the through hole 104.
[0073] In the first embodiment, the width of the GND pattern 106ax can be changed in the same manner as in the present embodiment. Also, in the case where a GND pattern is provided in one or more of the GND layers 106 among the inner layers in the same manner as in the second embodiment, the width of the GND pattern can be changed in the same manner as in the present embodiment.
[0074] Example 3 The impedance characteristics of the printed circuit board 101 according to the third embodiment will be described below with specific numerical values. In Example 3, the printed circuit board 101 was configured as follows.
[0075] The printed wiring board 102 was a 12-layer board. The signal wiring 103 and the GND layers 106a and 106p were each 43 μm thick. The GND layers 106b, 106c, 106d, 106e, 106h, 106k, 106m, and 106n were each 18 μm thick. The GND layers 106f and 106g were each 35 μm thick.
[0076] The thicknesses of the insulating layers between the GND layers were as follows. That is, the thicknesses of the insulating layers between the GND layer 106a and the GND layer 106b, and between the GND layer 106n and the GND layer 106p were 165 μm. The thicknesses of the insulating layers between the GND layer 106b and the GND layer 106c, between the GND layer 106d and the GND layer 106e, and between the GND layer 106f and the GND layer 106g were 100 μm. The thicknesses of the insulating layers between the GND layer 106h and the GND layer 106k, and between the GND layer 106m and the GND layer 106n were also 100 μm. The thicknesses of the insulating layers between the GND layer 106c and the GND layer 106d, between the GND layer 106e and the GND layer 106f, between the GND layer 106g and the GND layer 106h, and between the GND layer 106k and the GND layer 106m were 115 μm. The dielectric constant of the insulating layers was 4.3.
[0077] The width of the signal wiring 103 was 300 μm. The diameter of the through hole 104 was 700 μm. The diameter of the conductor layer portion of the through hole 104 was 900 μm. The diameter of the clearance 105 was 6 mm.
[0078] The distance L1 between the end of the GND pattern 106ax and the center of the through hole 104 was 1000 μm. The width L6 of the GND pattern 106ax at the end on the through hole 104 side was 700 μm. The width of the GND pattern 106ax was wider toward the outer periphery of the clearance 105. Between the signal wiring 103 and the GND layer 106a and the GND pattern 106ax, there was a gap L2 of 360 um on each side. The GND layers 106b, 106c, 106d, 106e, 106f, and 106g were each provided with an opening 108 with a width L10 of 1020 um outside the clearance 105. Each opening 108 was arranged so as to overlap with the signal wiring 103 in a plan view perpendicular to the printed wiring board 102.
[0079] A distance L1 between an end of the GND pattern 106bx and the center of the through hole 104 was 1000 μm. A width L7 at the end of the GND pattern 106bx overlapping the clearance 105 on the side of the through hole 104 was 500 μm. The width of the GND pattern 106bx became wider toward the outer periphery of the clearance 105.
[0080] A distance L1 between an end of the GND pattern 106cx and the center of the through hole 104 was 1000 μm. A width L8 at an end of the GND pattern 106cx overlapping the clearance 105 on the side of the through hole 104 was 300 μm. The width of the GND pattern 106cx became wider toward the outer periphery of the clearance 105.
[0081] The TDR characteristics of the above-mentioned Example 3 were confirmed by simulation in the same manner as Example 1. The above-mentioned Fig. 5 shows the simulation results of the TDR characteristics performed for Example 3 together with Example 2. In Fig. 5, the solid line indicates the above-mentioned Example 2, and the dashed line indicates Example 3.
[0082] In the case of the third embodiment, the impedance was within 75Ω±10%. As described above, since the GND patterns 106bx and 106cx of the inner layer are in the inner layer, parasitic capacitance occurs between the through hole 104 on both the front and back sides of the GND patterns 106bx and 106cx. Therefore, the parasitic capacitance between the through hole 104 can be larger than that of the GND pattern 106ax of the front layer. In contrast, in the third embodiment, the GND patterns 106bx and 106cx are provided so as to be narrower than the GND pattern 106ax. In addition, the width of the GND patterns 106ax, 106bx, and 106cx on the side closer to the through hole 104 is narrower. As a result, in the third embodiment, the parasitic capacitance occurring between the GND patterns 106ax, 106bx, and 106cx and the through hole 104 is reduced. In this way, in the third embodiment, the through hole 104 can also be impedance-matched.
[0083] [Fourth embodiment] An electronic device according to a fourth embodiment of the present invention will be described with reference to Fig. 6. Fig. 6 is a schematic diagram showing an imaging device as an example of the electronic device according to this embodiment. Note that the same components as those in the first to third embodiments are given the same reference numerals, and descriptions thereof will be omitted or simplified. In this embodiment, a digital camera, which is an imaging device, will be described as an example of an electronic device using a printed circuit board 101 according to any of the first to third embodiments.
[0084] 6, digital camera 200, which is an imaging device, is, for example, an industrial digital camera, and has a camera body 201 and a lens unit (lens barrel) 202 including a lens. Lens unit (lens barrel) 202 may be detachable from camera body 201, or may be provided integrally with camera body 201. Camera body 201 has housing 203, imaging unit 204 housed and arranged inside housing 203, and output terminal 205.
[0085] The imaging unit 204 has a printed circuit board 207 , the printed circuit board 101 according to any one of the first to third embodiments, and a cable 206 that electrically connects the printed circuit board 207 and the printed circuit board 101 .
[0086] The printed circuit board 207 has a printed wiring board 208 and a semiconductor device (first semiconductor device) 209 mounted on the printed wiring board 208. The first semiconductor device 209 is an image sensor serving as an imaging element. The image sensor is, for example, a CMOS (Complementary Metal Oxide Semiconductor) image sensor or a CCD (Charge Coupled Device) image sensor. The first semiconductor device 209 has a function of converting light incident via the lens unit 202 into an electrical signal.
[0087] The printed circuit board 101 has a printed wiring board 102, a semiconductor device (second semiconductor device) 210 mounted on the printed wiring board 102, and a connector 120. The second semiconductor device 210 is a digital signal processor as a processing circuit. The second semiconductor device 210 has a function of acquiring an electric signal from the first semiconductor device 209 which is an image sensor, correcting the acquired electric signal, and generating corrected image data. The second semiconductor device 210 outputs the generated image data as a signal to the signal wiring 103. The connector 120 is connected to the output terminal 205 by a cable 211 such as a coaxial cable. The printed circuit board 101 can output the image data generated by the second semiconductor device 210 as an output signal to the output terminal 205 via the signal wiring 103, the through hole 104, and the connector 120. The image data output to the output terminal 205 can be transmitted to a computer or the like which performs image processing on the image data via a cable such as a coaxial cable connected to the output terminal 205.
[0088] As in this embodiment, the printed circuit board 101 according to any one of the first to third embodiments can be used in a digital camera 200 to output image data via a connector 120 .
[0089] In this embodiment, the printed circuit board 101 according to any one of the first to third embodiments is used in an imaging device such as a digital camera as an example of an electronic device, but the present invention is not limited to this. The printed circuit board 101 according to any one of the first to third embodiments can be used in electronic devices such as X-ray panels, rigid endoscopes for medical use, network cameras, and copiers.
[0090] The present invention is not limited to the above-described embodiments, and many modifications are possible within the technical concept of the present invention. Furthermore, the effects described in the embodiments are merely a list of the most preferable effects resulting from the present invention, and the effects of the present invention are not limited to those described in the embodiments.
[0091] The disclosure of this embodiment includes the following configuration. (Configuration 1) a substrate having a first surface and a second surface opposite to the first surface; a through hole provided in the substrate so as to penetrate between the first surface and the second surface; a wiring provided on the first surface and connected to the through hole; a first ground layer provided on the first surface; the first ground layer is provided with a first clearance located around the through hole, and a first opening connected to the first clearance and including the wiring; The first ground layer has a first ground pattern that overlaps the first clearance and is provided along the wiring when viewed in a plan view perpendicular to the substrate. A printed wiring board comprising: (Configuration 2) one or more second ground layers provided on an inner layer of the substrate; the second ground layer is provided with a second clearance located around the through hole, and a second opening connected to the second clearance and overlapping with the wiring in a plan view perpendicular to the substrate; The second ground layer has a second ground pattern that overlaps the second clearance in the plan view and is provided along the wiring. 2. The printed wiring board according to configuration 1. (Configuration 3) The area of the second ground pattern is smaller than the area of the first ground pattern. 3. The printed wiring board according to configuration 2. (Configuration 4) The width of the second ground pattern is narrower than the width of the first ground pattern. 4. The printed wiring board according to configuration 2 or 3. (Configuration 5) The second ground patterns of the plurality of second ground layers have an area that decreases from the first surface toward the second surface. 5. The printed wiring board according to any one of configurations 2 to 4. (Configuration 6) The second ground patterns of the plurality of second ground layers have a width that narrows from the first surface toward the second surface. 6. The printed wiring board according to any one of configurations 2 to 5. (Configuration 7) The first ground pattern has a narrower width on a side closer to the through hole than on a side farther from the through hole. 7. The printed wiring board according to any one of configurations 1 to 6. (Configuration 8) The second ground pattern has a narrower width on a side closer to the through hole than on a side farther from the through hole. 7. The printed wiring board according to any one of configurations 2 to 6. (Configuration 9) A gap between the first ground pattern and the wiring is narrower than a gap between the first ground layer and the wiring in the first opening. 9. The printed wiring board according to any one of configurations 1 to 8. (Configuration 10) The first clearance has a circular planar shape. 10. The printed wiring board according to any one of configurations 1 to 9. (Configuration 11) A printed wiring board according to any one of configurations 1 to 10; a connector having a core wire, the core wire being inserted into the through hole and mounted on the printed wiring board; A printed circuit board comprising: (Configuration 12) The connector is a coaxial connector. 12. The printed circuit board of claim 11. (Configuration 13) A semiconductor device is mounted on the printed wiring board and outputs a signal to the wiring. 13. The printed circuit board according to claim 11 or 12. (Configuration 14) A housing and The printed circuit board according to any one of configurations 11 to 13, which is disposed inside the housing; 1. An electronic device comprising: (Configuration 15) A housing and 14. The printed circuit board according to any one of configurations 11 to 13, disposed inside the housing; and An imaging element disposed inside the housing; An imaging device comprising: [Explanation of symbols]
[0092] 101 Printed Circuit Board 102 Printed wiring board 103 Signal wiring 104 through hole 105 Clearance 106 GND layer 120 Connector
Claims
1. a substrate having a first surface and a second surface opposite the first surface; a through hole provided in the substrate so as to penetrate between the first surface and the second surface; a wiring provided on the first surface and connected to the through hole; a first ground plane provided on the first surface, the first ground layer is provided with a first clearance located around the through hole and a first opening connected to the first clearance and including the wiring; The first ground layer has a first ground pattern that overlaps the first clearance and is provided along the wiring in a plan view perpendicular to the substrate. A printed wiring board characterized by:
2. one or more second ground layers provided on an inner layer of the substrate; the second ground layer is provided with a second clearance located around the through hole, and a second opening connected to the second clearance and overlapping with the wiring in a plan view perpendicular to the substrate; The second ground layer has a second ground pattern that overlaps the second clearance in the plan view and is provided along the wiring.
2. The printed wiring board according to claim 1.
3. The area of the second ground pattern is smaller than the area of the first ground pattern.
3. The printed wiring board according to claim 2.
4. The width of the second ground pattern is narrower than the width of the first ground pattern.
4. The printed wiring board according to claim 2 or 3.
5. The second ground patterns of the plurality of second ground layers have an area that decreases from the first surface toward the second surface.
4. The printed wiring board according to claim 2 or 3.
6. The second ground patterns of the plurality of second ground layers have a width that narrows from the first surface toward the second surface.
4. The printed wiring board according to claim 2 or 3.
7. The first ground pattern has a width on a side closer to the through hole that is narrower than a width on a side farther from the through hole.
4. The printed wiring board according to claim 1, wherein the wiring board is made of a material selected from the group consisting of acrylic and acrylic.
8. The second ground pattern has a width on a side closer to the through hole that is narrower than a width on a side farther from the through hole.
4. The printed wiring board according to claim 2 or 3.
9. The gap between the first ground pattern and the wiring is narrower than the gap between the first ground layer and the wiring in the first opening.
4. The printed wiring board according to claim 1, wherein the wiring board is made of a material selected from the group consisting of acrylic and acrylic.
10. The first clearance has a circular planar shape.
4. The printed wiring board according to claim 1, wherein the wiring board is made of a material selected from the group consisting of acrylic and acrylic.
11. The printed wiring board according to any one of claims 1 to 3; a connector having a core wire, the core wire being inserted into the through hole and mounted on the printed wiring board; A printed circuit board comprising:
12. The connector is a coaxial connector.
12. The printed circuit board of claim 11.
13. a semiconductor device mounted on the printed wiring board and outputting a signal to the wiring; 12. The printed circuit board of claim 11.
14. The housing and The printed circuit board according to claim 11 disposed inside the housing; An electronic device comprising:
15. The housing and The printed circuit board of claim 11 disposed inside the housing; an imaging element disposed inside the housing; An imaging device comprising:
Citation Information
Patent Citations
Multilayer printed wiring board
JP2007250885A