Electronic component, semiconductor device and method for manufacturing semiconductor device

Abstract

To provide an electronic component, a semiconductor device, and a method for manufacturing the semiconductor device in which the life of resistors is hardly reduced.SOLUTION: An electronic component has an insulator, a first resistor on the insulator, a first insulating film on the first resistor and in contact with the first resistor, and a first metal adhesive material on the first insulating film and in contact with the first insulating film and a heat sink.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to an electronic component, a semiconductor device, and a method for manufacturing a semiconductor device. [Background technology]

[0002] Patent Document 1 discloses a technology related to a field effect transistor. This field effect transistor includes a plurality of power field effect transistor chips in an envelope, an impedance matching capacitor provided corresponding to the power field effect transistor chips, an input matching circuit board, and an output matching circuit board. This field effect transistor is characterized in that at least one of the connections between the plurality of power field effect transistor chips or between the power field effect transistor chip and the impedance matching capacitor is made by a resistive film. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 63-86904 Summary of the Invention [Problem to be solved by the invention]

[0004] For example, in electronic components such as semiconductor devices, a circuit using resistors is formed. In such circuits, power is consumed in the resistors, and heat is generated in the resistors. Therefore, a base material made of, for example, alumina is used for heat dissipation. However, when the power consumption in the resistors is large, the thermal conductivity of alumina is insufficient for heat dissipation. When heat dissipation is insufficient, the life of the resistors is easily shortened due to heat generation.

[0005] An object of the present disclosure is to provide an electronic component, a semiconductor device, and a method for manufacturing a semiconductor device in which the life span of a resistor is less likely to be shortened. [Means for solving the problem]

[0006] [1] An electronic component according to one embodiment of the present disclosure includes an insulator, a first resistor provided on the insulator, a first insulating film provided on the first resistor and in contact with the first resistor, and a first metal adhesive provided on the first insulating film, in contact with the first insulating film, and in contact with a heat sink.

[0007] By interposing the first insulating film between the first resistor and the first metal adhesive, insulation between the first resistor and the first metal adhesive is maintained even if the first metal adhesive is provided on the first insulating film. Heat generated in the first resistor is transferred to the first insulating film in contact with the first resistor, and then reaches the first metal adhesive in contact with the first insulating film. The first metal adhesive is also in contact with the heat sink. As a result, the heat generated in the first resistor is dissipated to the heat sink via the first metal adhesive, in addition to being dissipated to the insulator. Therefore, it is possible to realize an electronic component with improved heat dissipation efficiency and a resistor whose lifespan is not easily shortened.

[0008] [2] In the electronic component of [1] above, the insulator may be provided on a heat sink. By providing the insulator on the heat sink, heat dissipated from the resistor to the insulator is transferred to the heat sink. This makes it difficult for the heat dissipated from the resistor to accumulate in the insulator, and makes it easier for the heat to be dissipated to the heat sink. Therefore, the efficiency of heat dissipation via the insulator is improved.

[0009] [3] In the electronic component of [1] or [2] above, the first insulating film may include at least one of glass and ceramic. By making the first insulating film glass or ceramic, the first insulating film can be applied locally. This makes it easier to apply the first insulating film onto the first resistor. In addition, since glass or ceramic generally has high heat resistance, it is possible to withstand the heat of the molten first metal adhesive.

[0010] [4] A semiconductor device according to an embodiment of the present disclosure may be a semiconductor device in which the electronic component according to [1] above is mounted on a heat sink, and may include a semiconductor chip provided on the heat sink and a capacitor provided on the heat sink. The semiconductor chip may be electrically connected to the capacitor and the first resistor by wires. The current passing through the semiconductor chip and the capacitor is consumed in the first resistor, and the first resistor generates heat. Therefore, by providing a first metal adhesive on the first resistor, it is possible to dissipate heat efficiently.

[0011] [5] In the semiconductor device of [4] above, the semiconductor chip may be a transistor. The first resistor may be a resistor for low-frequency path or for preventing oscillation. Generally, in an amplifier such as a transistor, the power consumption in the resistor is large. Therefore, a first metal adhesive is provided on the first resistor of the semiconductor device. Heat generated in the first resistor is dissipated to the heat sink via the first metal adhesive in addition to being dissipated to the insulator. Therefore, the heat dissipation efficiency of the semiconductor device is improved.

[0012] [6] In the semiconductor device according to the above [4] or [5], the semiconductor chip may have a silicon carbide substrate. The first metal adhesive may be a silver paste.

[0013] [7] The semiconductor device according to any one of [4] to [6] above may further include a second resistor provided on the insulator, a second insulating film provided on the second resistor and in contact with the second resistor, and a second metal adhesive provided on the second insulating film and in contact with the second insulating film. The second resistor may have a resistance value different from that of the first resistor. By providing a second resistor having a resistance value different from that of the first resistor and changing the connection of the resistors in the semiconductor device, it becomes possible to easily change the circuit configuration.

[0014] [8] In any one of the semiconductor devices [4] to [7] above, the insulator may be a frame provided on the heat sink and having an opening therein. A semiconductor chip and a capacitor may be disposed inside the opening. The frame and the heat sink may be members constituting a package of the semiconductor device. For heat dissipation, an insulator is provided in contact with the first resistor. The insulator is provided on the heat sink as a frame for the package of the semiconductor device. In this way, the frame also serves as the insulator, thereby reducing the number of components mounted on the semiconductor device.

[0015] [9] In the semiconductor device of [8] above, the frame may have a side surface on the inside of the opening. A half via may be provided on the side surface. A portion of the first metal adhesive between a portion in contact with the first insulating film and a portion in contact with the heat sink may be accommodated in the half via. The half via can more reliably guide the first metal adhesive to a desired position on the heat sink. Therefore, the first metal adhesive can be applied to a desired position with high precision.

[0016]

[10] A method for manufacturing a semiconductor device according to one embodiment of the present disclosure includes the steps of: preparing a frame body made of an insulator, the frame body having an opening therein and adhered to a heat sink; forming a resistor on the frame body; forming an insulating film in contact with the resistor; and dispensing a metal adhesive in contact with the insulating film and the heat sink.

[0017] By providing the insulating film in contact with the resistor, insulation of the resistor is maintained even when a metal adhesive is provided in contact with the insulating film. Heat generated in the resistor is transferred to the insulating film in contact with the resistor and then reaches the metal adhesive in contact with the insulating film. The metal adhesive is also in contact with the heat sink. As a result, the heat generated in the resistor is dissipated to the heat sink via the metal adhesive in addition to being dissipated to the insulator. This makes it possible to realize a manufacturing method for electronic components that improves heat dissipation efficiency and is less likely to shorten the lifespan of the resistor.

[0018]

[11] The method for manufacturing a semiconductor device according to

[10] above may further include a step of mounting a semiconductor chip and a capacitor on the heat sink after the dropping step. The method for manufacturing an electronic component may include applying a metal adhesive to an area on the heat sink where the semiconductor chip and the capacitor are to be mounted in the dropping step. In the same step, the metal adhesive is applied and dropped on the area on the heat sink where the semiconductor chip and the capacitor are to be mounted and on the insulating film. This reduces the number of steps and improves work efficiency. Effect of the Invention

[0019] According to the present disclosure, it is possible to provide an electronic component, a semiconductor device, and a method for manufacturing a semiconductor device in which the life span of a resistor is less likely to be shortened. [Brief description of the drawings]

[0020] [Figure 1] FIG. 1 is a plan view showing a semiconductor device according to a first embodiment of the present disclosure. [Diagram 2] FIG. 2 is a cross-sectional view taken along the line II-II shown in FIG. [Diagram 3] FIG. 3 is a cross-sectional view taken along line III-III shown in FIG. [Figure 4] FIG. 4 is a diagram showing a manufacturing process of the semiconductor device according to the first embodiment. [Diagram 5] FIG. 5 is a plan view showing a lead frame. [Figure 6] FIG. 6 is a diagram showing a manufacturing process of the semiconductor device according to the first embodiment. [Figure 7] FIG. 7 is a diagram showing a manufacturing process of the semiconductor device according to the first embodiment. [Figure 8] FIG. 8 is a plan view showing a semiconductor device according to a first modification. [Figure 9] FIG. 9 is a perspective view showing a part of a semiconductor device according to a first modification. [Figure 10] FIG. 10 is a plan view showing a semiconductor device according to a second modification. [Figure 11]FIG. 11 is a diagram showing a manufacturing process of the semiconductor device according to the second modification. [Figure 12] FIG. 12 is a plan view showing a semiconductor device according to a third modification. [Figure 13] FIG. 13 is a cross-sectional view taken along line XIII-XIII shown in FIG. [Figure 14] FIG. 14 is a plan view showing a semiconductor device according to a fourth modification. [Figure 15] FIG. 15 is a plan view showing a semiconductor device according to a fifth modification. [Figure 16] 16A to 16C are diagrams showing a manufacturing process of a semiconductor device according to the fifth modification. [Figure 17] FIG. 17 is a diagram showing a manufacturing process of a semiconductor device according to the fifth modification. [Figure 18] FIG. 18 is a diagram showing a manufacturing process of a semiconductor device according to the fifth modification. [Figure 19] FIG. 19 is a plan view showing a semiconductor device according to the sixth modification. [Figure 20] FIG. 20 is a cross-sectional view taken along the line XX-XX shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0021] Specific examples of the electronic component, semiconductor device, and semiconductor device manufacturing method of the present disclosure will be described below with reference to the drawings. Note that the present invention is not limited to these examples, but is indicated by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims. In the following description, the same elements in the description of the drawings will be given the same reference numerals, and duplicate descriptions will be omitted.

[0022] (First embodiment) FIG. 1 is a plan view showing a semiconductor device A according to a first embodiment of the present disclosure. FIG. 2 is a cross-sectional view taken along line II-II in FIG. 1. FIG. 3 is a cross-sectional view taken along line III-III in FIG. 1. An xyz orthogonal coordinate system is shown in the figure. The semiconductor device A is an example of an electronic component of the present disclosure. The semiconductor device A includes a package P. The package P includes a stem 12, a frame 11, and a lid 19 (see FIG. 7). In other words, the stem 12, the frame 11, and the lid 19 are members that constitute the package P. The stem 12 is a plate-like body and has a rectangular shape in a plan view. A cross section perpendicular to the extension direction of the stem 12 has a rectangular shape. The stem 12 has a surface 12a. The surface 12a is a surface of the stem 12 that faces a direction perpendicular to the extension direction of the stem 12. The material of the stem 12 is a metal such as copper (Cu). The stem 12 functions as a heat sink. The stem 12 is set to a reference potential (ground potential).

[0023] The frame 11 is an insulator fixed on the surface 12a of the stem 12. The frame 11 has a rectangular frame shape in a plan view, and has an opening 11h therein that is rectangular when viewed from the normal direction of the surface 12a. The frame 11 includes surfaces 11a to 11e. Surfaces 11a to 11d are the surfaces of the frame 11 on the opposite side to the stem 12, facing in a direction perpendicular to the extension direction of the frame 11. Surfaces 11a and 11c are aligned along the y direction (short side direction of the frame 11). Surfaces 11b and 11d are aligned along the x direction (longitudinal direction of the frame 11). The distance L1 in the x direction between the outer edge and inner edge of the frame 11 at the surface 11a is larger than the distance L2 in the y direction between the outer edge and inner edge of the frame 11 at the surface 11b. Furthermore, the distance L1 is greater than the distance L3 in the y direction between the outer edge and the inner edge of the frame 11 at the surface 11d. The surface 11e is the inner side surface of the opening 11h of the frame 11, and is a surface that is continuous with the surface 11a along the y direction. The cross section perpendicular to the extending direction of the frame 11 has a rectangular shape. The material of the frame 11 is a ceramic such as alumina (Al2O3). The thermal conductivity of alumina is, for example, about 32 W / (m·K). The frame 11 is made of, for example, a single-layer alumina.

[0024] The semiconductor device A also includes a terminal 61, a terminal 62, a resistor 21 (first resistor), a pattern 15, and a pattern 16. The terminal 61 is provided at the center of the surface 11b. The terminal 62 is provided at the center of the surface 11d. The terminals 61 and 62 have a rectangular shape in a plan view. The terminals 61 and 62 are conductive and plated with gold (Au). The terminal 61 is, for example, an input terminal. The terminal 62 is, for example, an output terminal. The resistor 21 is provided at the center of the surface 11a, closer to the inner edge of the frame 11 than the outer edge of the frame 11, in contact with the surface 11a. The resistor 21 has a rectangular film shape. The material of the resistor 21 is, for example, an alloy containing at least one conductor selected from silver (Ag), palladium (Pd), and platinum (Pt). The resistor 21 is a resistor for a low-frequency path. The patterns 15 and 16 are arranged side by side in the y direction on the surface 11a in contact with the surface 11a. The patterns 15 and 16 are arranged on both sides of the resistor 21 in the y direction in contact with the resistor 21, sandwiching the resistor 21 between them. The pattern 15 is arranged on the terminal 61 side with respect to the resistor 21. The pattern 16 is arranged on the terminal 62 side with respect to the resistor 21. The patterns 15 and 16 are covered at their centers with a ceramic coat 10 (see FIG. 4). Only the ends of the patterns 15 and 16 are exposed from the ceramic coat 10. The patterns 15 and 16 are in the form of a rectangular film. The material of the patterns 15 and 16 is, for example, a metal such as tungsten (W), platinum (Pt), silver (Ag), or copper (Cu), or an alloy thereof. The patterns 15 and 16 are plated with gold (Au).

[0025] Furthermore, the semiconductor device A includes a semiconductor chip 100, capacitors 71 to 74, and wires 81 to 91. The semiconductor chip 100 is provided in the center of the surface 12a inside the opening 11h of the frame 11. The back surface of the semiconductor chip 100 is conductively bonded to the surface 12a of the stem 12 via a metal adhesive 41. The semiconductor chip 100 is, for example, a transistor. When the semiconductor chip 100 is, for example, a nitride semiconductor, the substrate is, for example, a silicon carbide (SiC) substrate, a silicon (Si) substrate, a gallium nitride (GaN) substrate, or a sapphire (Al2O3) substrate. The semiconductor layer on the substrate includes, for example, a nitride semiconductor layer such as a gallium nitride layer, an aluminum gallium nitride (AlGaN) layer, and / or an indium gallium nitride (InGaN) layer. When the transistor is a GaN HEMT (Gallium Nitride High Electron Mobility Transistor), the semiconductor layer includes a gallium nitride channel layer provided on the substrate and an aluminum gallium nitride barrier layer provided on the channel layer. When the semiconductor chip 100 is, for example, a gallium arsenide (GaAs)-based semiconductor, the substrate is, for example, a gallium arsenide substrate. The semiconductor layer provided on the substrate includes, for example, an arsenide semiconductor layer such as a gallium arsenide layer, an aluminum gallium arsenide (AlGaAs) layer, and / or an indium gallium arsenide (InGaAs) layer. The semiconductor chip 100 may be a silicon semiconductor such as an LDMOS (Laterally Diffused Metal Oxide Semiconductor). The capacitors 71 to 74 are provided on the surface 12a inside the opening 11h of the frame 11. The capacitors 71 and 72 are provided on both sides of the semiconductor chip 100 in the y direction, sandwiching the semiconductor chip 100 therebetween. Capacitor 71 is provided closer to terminal 61 with respect to the semiconductor chip 100. Capacitor 72 is provided closer to terminal 62 with respect to the semiconductor chip 100. Capacitor 73 and capacitor 74 are provided closer to resistor 21 with respect to the semiconductor chip 100. Capacitor 73 is provided closer to terminal 62 with respect to the semiconductor chip 100. Capacitor 74 is provided closer to terminal 61 with respect to the semiconductor chip 100.The capacitor 71 is composed of a metal film 71a, a ceramic block 71b, and a stem 12. The capacitor 72 is composed of a metal film 72a, a ceramic block 72b, and a stem 12. The capacitor 73 is composed of a metal film 73a, a ceramic block 73b, and a stem 12. The capacitor 74 is composed of a metal film 74a, a ceramic block 74b, and a stem 12. The capacitors 71 and 72 function as a part of a matching circuit in the semiconductor device A. The back surfaces of the ceramic blocks 71b to 74b are bonded to the surface 12a of the stem 12 via a metal adhesive 41. The wire 81 connects the pattern 15 and the metal film 74a of the capacitor 74. The wire 82 connects the pattern 16 and the metal film 73a of the capacitor 73. The wire 83 connects the metal film 73a of the capacitor 73 to the terminal 62. Wires 84 and 88 connect the terminal 61 and the metal film 71a of the capacitor 71. Wires 85 and 89 electrically connect the metal film 71a of the capacitor 71 and the semiconductor chip 100. Wires 86 and 90 electrically connect the semiconductor chip 100 and the metal film 72a of the capacitor 72. Wires 87 and 91 connect the metal film 72a of the capacitor 72 and the terminal 62. Wires 81 to 91 are, for example, bonding wires.

[0026] The semiconductor device A functions as, for example, a high-frequency amplifier device. An input signal input to a terminal 61 is input to a semiconductor chip 100 through a matching circuit including a capacitor 71. A signal amplified in the semiconductor chip 100 is output from the terminal 62 through a matching circuit including a capacitor 72. In a circuit including a resistor 21, a capacitor 73, and a capacitor 74, low-frequency components are suppressed. At that time, power is consumed in the resistor 21.

[0027] The semiconductor device A includes an insulating film 30 (first insulating film) and a metal adhesive 40 (first metal adhesive). The insulating film 30 coats the resistor 21. The insulating film 30 covers the entire resistor 21. The insulating film 30 is in contact with the resistor 21. The insulating film 30 has an elliptical shape in a plan view. The inner diameter of the insulating film 30 in the x direction is shorter than the inner diameter of the insulating film 30 in the y direction. The insulating film 30 is a solidified paste material. The material of the insulating film 30 is, for example, glass containing silicon (Si). The thermal conductivity of glass is, for example, about 1 W / (m·K). The metal adhesive 40 is provided on the insulating film 30 and is in contact with the entire insulating film 30. The metal adhesive 40 is also in contact with the surface 11a. As shown in FIG. 3, the portion of the metal adhesive 40 in contact with the insulating film 30 and the surface 11a extends in the x direction. The metal adhesive 40 is also in contact with the surface 11e, and the portion of the metal adhesive 40 in contact with the surface 11e extends in the z direction. The metal adhesive 40 is also in contact with the surface 12a of the stem 12, and the portion of the metal adhesive 40 in contact with the stem 12 extends in the x direction and the y direction. The metal adhesive 40 is in continuous contact with the insulating film 30, the frame 11, and the stem 12. The metal adhesive 40 spreads in a semicircular shape in the x direction from the inner edge of the frame 11 on the surface 11a. The metal adhesive 40 spreads in an elliptical shape in the x direction from the inner edge of the frame 11 on the surface 12a. The metal adhesive 40 is made of a metal that melts at a temperature of, for example, 180° C. or higher and 350° C. or lower. The material of the metal adhesive 40 is, for example, silver paste or solder. The thermal conductivity of silver (Ag) is, for example, about 427 W / (m·K). The thermal conductivity of Sn-Ag-Cu solder is, for example, approximately 55 W / (m·K). The material of metal adhesive 40 may be the same as the material of metal adhesive 41, or may be different.

[0028] 4 to 7 are referred to for the manufacturing method of the semiconductor device A according to the first embodiment of the present disclosure. First, a frame 11 having an opening 11h therein and made of an insulator is prepared. As shown in FIG. 4(a), the opening 11h is provided in the center of a green sheet 11g made of ceramic before firing. Next, as shown in FIG. 4(b), patterns 13, 14, 15, and 16 are provided on the green sheet 11g by pattern printing. The pattern 13 is a metal pattern and is disposed in the center of the surface 11b. The pattern 14 is a metal pattern and is disposed in the center of the surface 11d. The material of the patterns 13 and 14 is a metal such as tungsten (W), platinum (Pt), silver (Ag), or copper (Cu), or an alloy thereof. Then, as shown in FIG. 4(c), a ceramic coat 10 is applied to the center of the pattern 15 and the center of the pattern 16. At this time, only the ends of the patterns 15 and 16 are exposed. The ceramic coat 10 is a paste material containing ceramic. Thereafter, the green sheet 11g and the ceramic coat 10 are fired to form the frame 11.

[0029] Next, a metal pattern (not shown) is formed on the rear surface of the frame body 11. After that, the stem 12 is bonded to the rear surface of the frame body 11. FIG. 5 is a plan view showing the lead frame 17. The lead frame 17 is arranged on the frame body 11. The lead frame 17 is located on both sides of the frame body 11 in the y direction, sandwiching the frame body 11 therebetween. The lead frame 17 includes a tie bar 18a and a tie bar 18b. The tie bar 18a and the tie bar 18b are located on both sides of the frame body 11 in the y direction. The tie bar 18a is brought into contact with the pattern 13. The tie bar 18b is brought into contact with the pattern 14. Then, as shown in FIG. 6(a), the tie bar 18a and the pattern 13 are bonded and fixed with a brazing material containing, for example, silver, copper, or an alloy thereof. Similarly, the tie bar 18b and the pattern 14 are bonded and fixed with a brazing material containing, for example, silver, copper, or an alloy thereof. Then, the stem 12, the pattern 15, the pattern 16, the tie bar 18a, and the tie bar 18b are plated with gold (Au). Then, as shown in FIG. 6(b), a film for the resistor 21 connected to the pattern 15 and the pattern 16 is formed between the pattern 15 and the pattern 16 on the frame body 11, and the film is fired together with the frame body 11 to form the resistor 21. Then, as shown in FIG. 6(c), an insulating film 30 that contacts the resistor 21 is formed on the resistor 21. The insulating film 30 is provided on the resistor 21 so as to cover the entire resistor 21, for example, by printing a glass coat. Then, the glass coat is fired together with the frame body 11 to form the insulating film 30. Then, the tie bar 18a and the tie bar 18b are separated from the main body of the lead frame 17. As a result, the tie bar 18a becomes the terminal 61, and the tie bar 18b becomes the terminal 62.

[0030] Next, a metal adhesive 41 is applied to the semiconductor chip 100 and the area where the capacitors 71 to 74 are to be mounted, and at the same time, a metal adhesive 40 is dropped so as to contact the insulating film 30 and the stem 12, as shown in FIG. 7(a). The melting temperature of the metal adhesive 40 is, for example, 180° C. or higher and 350° C. or lower. Then, the semiconductor chip 100 and the capacitors 71 to 74 are fixed and mounted on the stem 12. Next, wires 81 to 91 are provided, as shown in FIG. 7(b). Finally, a lid 19 is attached onto the frame 11, as shown in FIG. 7(c). The lid 19 is plate-shaped.

[0031] The effects obtained from the semiconductor device A having the above configuration and the manufacturing method of the semiconductor device A will be described. In the semiconductor device A, power is consumed in the resistor 21, so heat is generated in the resistor 21. In general, in an amplifier such as a transistor, the power consumption in the resistor is large. Since the resistor 21 is provided on the frame body 11, the heat generated in the resistor 21 is dissipated through the frame body 11. However, when the power consumption in the resistor 21 is large, the thermal conductivity of the frame body 11 is insufficient for heat dissipation. Therefore, in the semiconductor device A according to the first embodiment, an insulating film 30 and a metal adhesive 40 are provided. The insulating film 30 is interposed between the resistor 21 and the metal adhesive 40. As a result, even if the metal adhesive 40 is provided on the insulating film 30, insulation between the resistor 21 and the metal adhesive 40 is maintained. The thickness of the insulating film 30 is sufficiently thin, and the heat generated in the resistor 21 is transmitted to the insulating film 30 in contact with the resistor 21, and then reaches the metal adhesive 40 in contact with the insulating film 30. The metal adhesive 40 is also in contact with the stem 12. As a result, the heat generated in the resistor 21 is dissipated to the stem 12 via the metal adhesive 40 in addition to being dissipated to the frame 11. This makes it possible to realize a semiconductor device A and a manufacturing method for the semiconductor device A in which the heat dissipation efficiency is improved and the life of the resistor 21 is not likely to be shortened. Furthermore, in the same manufacturing process, the metal adhesive 41 is applied to the semiconductor chip 100 on the stem 12, the portions on which the capacitors 71 to 74 are mounted, and onto the insulating film 30. This makes it possible to realize a manufacturing method for the semiconductor device A in which the number of processes is reduced and work efficiency is improved.

[0032] By providing the frame body 11 on the stem 12, the heat dissipated from the resistor 21 to the frame body 11 is transferred to the stem 12. This makes it difficult for the heat dissipated from the resistor 21 to accumulate in the frame body 11, and makes it easier for the heat to be dissipated to the stem 12. Therefore, the efficiency of heat dissipation through the frame body 11 is improved.

[0033] The current passing from capacitor 73 to capacitor 74 passes through resistor 21, causing resistor 21 to generate heat. Therefore, by providing metal adhesive 40 on resistor 21, it becomes possible to dissipate heat efficiently. Also, an insulator is provided in contact with resistor 21 for heat dissipation. The insulator is provided on stem 12 as frame 11 of the package in semiconductor device A. In this way, frame 11 also serves as an insulator on which resistor 21 is mounted, thereby reducing the number of components mounted on semiconductor device A.

[0034] As in this embodiment, the insulating film 30 may include at least one of glass and ceramic. By using, for example, glass as the insulating film 30, the insulating film 30 can be applied locally. This makes it easier to apply the insulating film 30 onto the resistor 21. In addition, since glass generally has high heat resistance, it is possible for the insulating film 30 to withstand the heat of the molten metal adhesive 40.

[0035] (First Modification) FIG. 8 is a plan view showing a semiconductor device B according to the first modification. FIG. 9 is a perspective view showing a part of the semiconductor device B according to the first modification. In FIG. 9, the insulating film 30 and the metal adhesive 40 are omitted. The semiconductor device B is different from the semiconductor device A in the following points, and is the same in other points. The semiconductor device B includes a package R instead of the package P. The package R includes a frame 11BC instead of the frame 11. The other configurations of the package R are the same as those of the package P. In this modification, a half via 11f is provided in the center of the face 11e of the frame 11BC. The half via 11f has a semicircular shape in a plan view (as viewed from the normal direction of the face 12a). The surface of the half via 11f is plated with gold (Au). A portion of the metal adhesive 40 between a portion in contact with the insulating film 30 and a portion in contact with the stem 12 is accommodated in the half via 11f.

[0036] In the semiconductor device B having the above configuration, the half via 11f can more reliably guide the metal adhesive 40 to a desired position on the stem 12. Therefore, the metal adhesive 40 can be applied to a desired position on the stem 12 with high precision.

[0037] (Second Modification) FIG. 10 is a plan view showing a semiconductor device C according to a second modified example. The semiconductor device C differs from the semiconductor device B in the following respects, but is otherwise the same. In the semiconductor device C, an insulating film 30c (first insulating film) is provided on the frame body 11BC instead of the insulating film 30. The insulating film 30c covers the entire resistor 21. The insulating film 30c is in contact with the resistor 21. The insulating film 30c has a rectangular shape in a plan view. The insulating film 30c is a solidified paste material. The material of the insulating film 30c is, for example, ceramic. The metal adhesive 40 is provided on the insulating film 30c and is in contact with the entire insulating film 30c.

[0038] A manufacturing method of the semiconductor device C according to the second modification of the present disclosure will be described with reference to FIG. 11. The manufacturing method of the semiconductor device C is the same as the manufacturing method of the semiconductor device A up to the step of pattern printing the resistor 21 on the frame body 11BC. As shown in FIG. 11(a), after the resistor 21 is provided between the pattern 15 and the pattern 16, a paste-like ceramic coat that becomes the insulating film 30c is applied on the resistor 21. The ceramic coat covers the entire resistor 21. After the ceramic coat is applied, the semiconductor device C is fired to solidify the ceramic coat and become the insulating film 30c. Then, the lead frame (not shown) is separated from the tie bar. Next, as shown in FIG. 11(b), the metal adhesive 40 is dropped so as to contact the insulating film 30c and the stem 12. At the same time, the metal adhesive 41 is applied to the mounting surface of the semiconductor chip 100 and the capacitors 71 to 74. Then, the semiconductor chip 100 and the capacitors 71 to 74 are mounted on the surface 12a. The manufacturing method of the semiconductor device C is the same as the manufacturing method of the semiconductor device A.

[0039] In the semiconductor device C having the above configuration, even if the insulating film 30 is replaced with the insulating film 30c, a locally insulating film can be formed. Furthermore, since ceramics generally have high heat resistance, they can withstand the heat of the molten metal adhesive 40. Furthermore, it is also possible to provide the insulating film 30c on the resistor 21 in the same process as the process of providing the ceramic coat 10 on the patterns 15 and 16. In this case, the number of processes can be reduced. Therefore, the work efficiency in manufacturing the semiconductor device C is improved.

[0040] (Third Modification) FIG. 12(a) is a plan view showing a semiconductor device D according to a third modification. FIG. 12(b) is a view of the semiconductor device D with the semiconductor chip 100, the capacitors 71 to 74, and the metal adhesive 40 omitted. FIG. 13 is a cross-sectional view taken along the line XIII-XIII shown in FIG. 12. The semiconductor device D is different from the semiconductor device A in the following respects, and is the same in other respects. In the semiconductor device D, the resistor 21, the pattern 15, and the pattern 16 are provided in a portion other than the frame body 11. That is, the semiconductor device D includes a resistance component 201. The resistance component 201 includes a substrate 23, an insulator 31 (first insulating film), the resistor 21, the pattern 15, and the pattern 16. As shown in FIG. 12(a), the resistance component 201 is provided on the opposite side of the semiconductor chip 100 with respect to the capacitors 73 and 74. The resistor 21 is embedded in the center of the resistance component 201, and the patterns 15 and 16 are exposed from both ends of the resistance component 201. The resistance component 201 has a rectangular shape in a plan view. The substrate 23 is provided on the surface 12a. The substrate 23 is made of a ceramic material such as alumina. As shown in FIG. 13, the resistor 21 is provided on the substrate 23 and in contact with the substrate 23. The insulator 31 is provided on the substrate 23 and the resistor 21, in contact with the substrate 23 and the resistor 21, and covers the resistor 21. The insulator 31 is made of a ceramic material such as alumina. As shown in FIG. 12(a), a metal adhesive 40 is provided on the insulator 31.

[0041] In the semiconductor device D having the above configuration, the resistor 21 is insulated from the metal adhesive 40 by the insulator 31 instead of the insulating film 30. The resistor component 201 can be pre-assembled. Therefore, by incorporating the resistor component 201 into the semiconductor device D, the process of insulating the resistor 21 can be omitted. Therefore, the work efficiency in manufacturing the semiconductor device D is improved.

[0042] (Fourth Modification) FIG. 14 is a plan view showing a semiconductor device E according to a fourth modification. The semiconductor device E is different from the semiconductor device A in the following points, and is the same in other points. The semiconductor device E further includes a resistor 22 (second resistor), a pattern 15E, and a pattern 16E. The resistor 22 is provided in contact with the surface 11c, closer to the inner edge of the frame 11 with respect to the outer edge of the frame 11 at the center of the surface 11c. The resistor 22 has a rectangular film shape. The material of the resistor 22 is, for example, an alloy containing at least one conductor selected from silver (Ag), palladium (Pd), and platinum (Pt). An insulating film 32 (second insulating film) is provided on the resistor 22. A metal adhesive 42 (second metal adhesive) is provided on the insulating film 32. The insulating film 32 and the metal adhesive 42 are the same as the insulating film 30 and the metal adhesive 40, respectively. The resistor 22 has a resistance value different from that of the resistor 21. For example, the length in the y direction of resistor 22 is different from the length in the y direction of resistor 21. Patterns 15E and 16E are provided side by side in the y direction on surface 11c. Patterns 15E and 16E are provided in contact with resistor 22, on either side of resistor 22 in the y direction.

[0043] In the semiconductor device E having the above configuration, the resistor 22 has a resistance value different from that of the resistor 21. By providing the resistor 22 having a resistance value different from that of the resistor 21 and changing the connection of the resistors in the semiconductor device E, it becomes possible to easily change the circuit configuration.

[0044] (Fifth Modification) FIG. 15 is a plan view showing a semiconductor device F according to a fifth modification. The semiconductor device F differs from the semiconductor device A in the following points, and is otherwise the same. The resistor 21, the pattern 15, and the pattern 16 of the semiconductor device F are arranged side by side in the x direction between the terminal 61 and the inner edge of the frame body 11 (i.e., on the surface 11b shown in FIG. 1). The pattern 16, the resistor 21, and the pattern 15 are arranged side by side in this order. The resistor 21 of this modification is a resistor for preventing oscillation. The semiconductor device F also includes a capacitor 75 and a capacitor 76 instead of the capacitor 71. The semiconductor device F does not include the capacitor 73 and the capacitor 74. The capacitor 75 and the capacitor 76 are arranged side by side in the x direction. The capacitor 75 and the capacitor 76 are provided on the surface 12a between the semiconductor chip 100 and the terminal 61. The semiconductor device F also includes a wire 77 to a wire 80 and a wire 92 to a wire 99 instead of the wire 81 to the wire 85, the wire 88, and the wire 89. Wire 92 connects terminal 61 and pattern 15. Wire 93 connects terminal 61 and pattern 16. Wires 80 and 94 connect pattern 15 and capacitor 75. Wires 79 and 95 connect pattern 16 and capacitor 76. Wires 78, 96, and 97 connect capacitor 75 and semiconductor chip 100. Wires 77, 98, and 99 connect capacitor 76 and semiconductor chip 100.

[0045] 16 to 18 are referred to for a manufacturing method of a semiconductor device F according to the fifth modified example of the present disclosure. First, a frame 11 having an opening 11h therein and made of an insulator is prepared. As shown in FIG. 16(a), the opening 11h is provided in the center of a green sheet 11g made of ceramic before firing. Next, as shown in FIG. 16(b), patterns 13 to 16 are provided on the green sheet 11g by pattern printing. The pattern 13 is disposed in the center of the surface 11b, closer to the outer edge of the green sheet 11g than the opening 11h. Then, as shown in FIG. 16(c), a ceramic coat 10 is applied to the center of the pattern 15 and the center of the pattern 16. At this time, only the ends of the pattern 15 and the pattern 16 are exposed. Then, the green sheet 11g and the ceramic coat 10 are fired to form the frame 11.

[0046] Next, a metal pattern (not shown) is formed on the back surface of the frame body 11. Then, the stem 12 is bonded to the back surface of the frame body 11. Then, as shown in FIG. 17(a), a lead frame including the tie bars 18a and 18b is placed on the frame body 11. Then, the stem 12, the pattern 15, the pattern 16, the tie bars 18a, and the tie bars 18b are plated with gold (Au). Then, as shown in FIG. 17(b), a film for the resistor 21 connected to the pattern 15 and the pattern 16 is formed between the pattern 15 and the pattern 16 on the frame body 11, and the film is fired together with the frame body 11 to form the resistor 21. Then, as shown in FIG. 17(c), an insulating film 30 that contacts the resistor 21 is formed on the resistor 21. The insulating film 30 is provided on the resistor 21, for example, by printing a glass coat, so as to cover the entire resistor 21. Then, the glass coat is fired together with the frame body 11 to form the insulating film 30. Thereafter, tie bar 18a and tie bar 18b are cut off from the main body of the lead frame, whereby tie bar 18a becomes terminal 61 and tie bar 18b becomes terminal 62.

[0047] Next, a metal adhesive 41 is applied to the area where the semiconductor chip 100, the capacitor 72, the capacitor 75, and the capacitor 76 are to be mounted, and at the same time, a metal adhesive 40 is dropped so as to contact the insulating film 30 and the stem 12, as shown in FIG. 18(a). Thereafter, the semiconductor chip 100, the capacitor 72, the capacitor 75, and the capacitor 76 are fixed and mounted on the stem 12. Next, as shown in FIG. 18(b), wires 77, 80, 86, 87, and 90 are provided as wires 99. Finally, a lid 19 is attached onto the frame 11, as shown in FIG. 18(c).

[0048] The semiconductor device F having the above configuration also provides the same effects as the semiconductor device A. Furthermore, the resistor 21 can be arranged in various locations. Depending on the arrangement of the resistor 21 and the connection of the wires, semiconductor devices for various purposes can be realized.

[0049] (Sixth Modification) FIG. 19(a) is a plan view showing a semiconductor device G according to a sixth modified example. FIG. 19(b) is a view of the semiconductor device G with the metal adhesive 40 and the wires omitted. FIG. 20 is a cross-sectional view taken along the line XX-XX shown in FIG. 19. The semiconductor device G is different from the semiconductor device D in the following respects, and is the same in other respects. The semiconductor device G includes a resistance component 202 instead of the resistance component 201. The resistance component 202 includes a substrate 23, an insulating film 30, a resistor 21, a pattern 15, and a pattern 16. As shown in FIG. 19(a), the resistance component 202 is provided on the opposite side of the semiconductor chip 100 with respect to the capacitors 73 and 74. The resistor 21 is embedded in the center of the resistance component 202, and the patterns 15 and 16 are exposed from both ends of the resistance component 202. The resistance component 202 has a rectangular shape in a plan view. The resistor 21 is provided on the substrate 23 and is in contact with the substrate 23. The insulating film 30 is provided on the substrate 23 and the resistor 21, and covers the entire resistor 21. The insulating film 30 is in contact with the substrate 23 and the resistor 21. As shown in FIG. 19(a), a metal adhesive material 40 is provided on the insulating film 30.

[0050] In the semiconductor device G having the above configuration, the same effects as those of the semiconductor device D can be obtained.

[0051] The present invention has been specifically described above based on the embodiments and modifications, but the present invention is not limited to the above embodiments and modifications, and can be modified within the scope of the present invention. For example, the metal adhesive 40 is not limited to the above embodiments and modifications, and may cover the entire insulating film 30. The insulating film 30 is not limited to the above embodiments and modifications, and may cover only a part of the resistor 21. In addition, the above embodiments and modifications show an example in which one half via 11f is provided on the surface 11e, but a plurality of half vias 11f may be provided on the surface 11e. In addition, the above embodiments and modifications show an example in which the resistor 21 is a resistor for a low frequency path and for preventing oscillation, but the resistor 21 may be a resistor for an attenuator. [Explanation of symbols]

[0052] 10…Ceramic coat 11,11BC…frame body 11a~11e,12a...side 11f...Half Via 11g…Green sheet 11h…Aperture 12…Stem 13~16,15E,16E…Pattern 17...Lead frame 18a, 18b…Tie bar 19…Lid 21, 22…Resistance 23...Substrate 30, 30c, 32...insulating film 31...Insulator 40,41,42…Metal adhesive 61,62…Terminal 71~76…Capacitor 71a~74a...Metal film 71b~74b…Ceramic block 77~99…Wire 100…Semiconductor chips 201, 202...Resistance components A to G: Semiconductor device L1~L3…interval P, R…Package

Claims

1. An insulator; A first resistor provided on the insulator; a first insulating film provided on the first resistor and in contact with the first resistor; a first metal adhesive provided on the first insulating film, in contact with the first insulating film, and in contact with a heat sink; An electronic component comprising:

2. The electronic component of claim 1 , wherein the insulator is disposed on the heat sink.

3. The electronic component according to claim 1 , wherein the first insulating film includes at least one of glass and ceramic.

4. 2. A semiconductor device in which the electronic component according to claim 1 is mounted on the heat sink, A semiconductor chip provided on the heat sink; a capacitor provided on the heat sink; Equipped with the semiconductor chip is electrically connected to the capacitor and the first resistor by wires.

5. the semiconductor chip is a transistor, 5. The semiconductor device according to claim 4, wherein the first resistor is a resistor for passing a low frequency or for preventing oscillation.

6. the semiconductor chip has a silicon carbide substrate; The semiconductor device of claim 4 , wherein the first metal adhesive is a silver paste.

7. A second resistor provided on the insulator; a second insulating film provided on the second resistor and in contact with the second resistor; a second metal adhesive provided on the second insulating film and in contact with the second insulating film; Further equipped with The semiconductor device according to claim 4 , wherein the second resistor has a resistance value different from that of the first resistor.

8. the insulator is a frame provided on the heat sink and having an opening therein; The semiconductor chip and the capacitor are disposed inside the opening; 7. The semiconductor device according to claim 4, wherein the frame and the heat sink are members that constitute a package of the semiconductor device.

9. The frame has a side surface on the inside of the opening, A half via is provided on the side surface, 9. The semiconductor device according to claim 8, wherein a portion of said first metal adhesive material between a portion in contact with said first insulating film and a portion in contact with said heat sink is accommodated in said half via.

10. A step of preparing a frame that is bonded onto a heat sink, has an opening therein, and is made of an insulating material; forming a resistor on the frame; forming an insulating film on and in contact with the resistor; dispensing a metal adhesive material in contact with the insulating film and the heat sink; A manufacturing method of a semiconductor device comprising:

11. The method further includes the step of mounting a semiconductor chip and a capacitor on the heat sink after the step of dropping the heat sink. The method for manufacturing a semiconductor device according to claim 10 , wherein in the step of dropping, the metal adhesive is applied to an area on the heat sink where the semiconductor chip and the capacitor are to be mounted.

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