Optical integrated device, optical transmitter, and optical transceiver

Abstract

To provide an optical integrated device and the like capable of reducing a workload required for mounting in a chip provided with an optical waveguide having electro-optical effect.SOLUTION: An optical integrated device comprises a first chip provided with optical circuits and a second chip provided with an optical waveguide including a material having a great electro-optical effect in comparison with a material of the first chip. In the optical integrated device, the first chip is mounted in a trench formed on the second chip, and the first chip and the second chip are optically coupled by butt coupling.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an optical integrated device, an optical transmitter, and an optical transceiver. [Background technology]

[0002] FIG. 24 is a schematic plan view showing an example of the optical integrated device 100, and FIG. 25 is a schematic cross-sectional view showing an example of the optical integrated device 100. For convenience of explanation, the schematic cross-sectional view is a schematic cross-sectional view of the optical integrated device 100 shown in FIG. 24. The optical integrated device 100 has an optical modulator chip 110, a Micro Lens Array (MLA) 121, a Polarization Rotator (PR) 122, a Polarization Beam Combiner (PBC) 123, and an optical fiber array 130. The optical modulator chip 110 is, for example, a Thin-Film LiNbO3 (TF-LN) modulator chip. The optical modulator chip 110 has a TF-LN optical waveguide 111, a TF-LN optical modulator 112, an input section 113, a first output section 114A, and a second output section 114B. On a chip end surface 110A of the optical modulator chip 110, an input section 113, a first output section 114A, and a second output section 114B are arranged.

[0003] The optical waveguide 111 in the optical modulator chip 110 includes an input waveguide 111A, a folded waveguide 111B, a first output waveguide 111C1, and a second output waveguide 111C2. The input waveguide 111A is a TF-LN waveguide that extends linearly from the input section 113 of the optical modulator chip 110 in the longitudinal direction of the optical modulator chip 110. The folded waveguide 111B is a TF-LN waveguide that folds back from the input waveguide 111A and connects to the input stage of the optical modulator 112. The first output waveguide 111C1 is a TF-LN waveguide that connects the output stage of the optical modulator 112 and the first output section 114A of the optical modulator chip 110. The second output waveguide 111C2 is a TF-LN waveguide that connects the output stage of the optical modulator 112 and the second output section 114B of the optical modulator chip 110.

[0004] The optical modulator 112 has an optical waveguide and an electrode for applying an electric signal to the optical waveguide, and optically modulates the light passing through the optical waveguide by applying an electric signal from the electrode. The optical fiber array 130 has an input optical fiber 131A for inputting light and an output optical fiber 131B for outputting light.

[0005] The MLA 121 is an optical component connected to a chip end surface 110A of the optical modulator chip 110, which optically couples the TF-LN optical waveguide 111 and the optical fiber array 130. The MLA 121 is connected to an input optical fiber 131A in the optical fiber array 130, and inputs light from the input optical fiber 131A to the input waveguide 111A. The MLA 121 outputs TE polarized signal light from the optical modulator 112 to the PR 122 and the PBC 123. The PR 122 rotates the polarization of the signal light from the optical modulator 112 by 90 degrees through the MLA 121, and outputs the TM polarized signal light after the polarization rotation to the PBC 123. The PBC 123 polarization-multiplexes the TE polarized signal light obtained from the optical modulator 112 via the MLA 121 and the TM polarized signal light after polarization rotation, and outputs the polarization-multiplexed signal light to the output optical fiber 131B in the optical fiber array 130. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2020-134609 A [Patent Document 2] US Patent Application Publication No. 2016 / 0116680 [Patent Document 3] JP 2020-021015 A [Patent Document 4] US Patent Application Publication No. 2015 / 0355421 [Patent Document 5] JP 2001-324654 A Summary of the Invention [Problem to be solved by the invention]

[0007] In the optical integrated device 100, the optical axes of the optical waveguide 111 on the chip end surface 110A of the optical modulator chip 110 and the MLA 121 are aligned, and the optical modulator chip 110 and the MLA 121 are fixed with an adhesive A. Then, an alignment operation is required to align the optical axes of the PR 122, the PBC 123, and the optical fiber array 130 with respect to the MLA 121.

[0008] However, since the optical waveguide 111 in the optical modulator chip 110 is a TF-LN optical waveguide having an electro-optic effect, the optical mode field diameter is small and high-precision alignment work is required. Therefore, the workload required for mounting a chip having an optical waveguide having an electro-optic effect is large.

[0009] In one aspect, an object of the present invention is to provide an optical integrated device or the like that can reduce the workload required for mounting a chip having an optical waveguide having an electro-optic effect. [Means for solving the problem]

[0010] An optical integrated device according to one embodiment includes a first chip having an optical circuit and a second chip having an optical waveguide including a material having a larger electro-optic effect than a material of the first chip. In the optical integrated device, the first chip is mounted in a trench formed on the second chip, and the first chip and the second chip are optically coupled by butt coupling. Effect of the Invention

[0011] According to one aspect, it is possible to reduce the workload required for mounting a chip having an optical waveguide having an electro-optic effect. [Brief description of the drawings]

[0012] [Figure 1] FIG. 1 is a schematic plan view showing an example of an optical integrated device according to a first embodiment. [Diagram 2] FIG. 2 is a schematic cross-sectional view showing an example of an optical integrated device. [Diagram 3] FIG. 3 is a schematic plan view showing an example of an optical integrated device according to the second embodiment. [Figure 4] FIG. 4 is a schematic cross-sectional view showing an example of an optical integrated device. [Diagram 5] FIG. 5 is a schematic plan view showing an example of an optical integrated device according to the third embodiment. [Figure 6] FIG. 6 is a schematic cross-sectional view showing an example of an optical integrated device. [Figure 7] FIG. 7 is a schematic plan view showing an example of an optical integrated device according to the fourth embodiment. [Figure 8] FIG. 8 is a schematic cross-sectional view showing an example of an optical integrated device. [Figure 9] FIG. 9 is a schematic plan view showing an example of an optical integrated device according to the fifth embodiment. [Figure 10] FIG. 10 is a schematic cross-sectional view showing an example of an optical integrated device. [Figure 11] FIG. 11 is a schematic plan view showing an example of an optical integrated device according to the sixth embodiment. [Figure 12] FIG. 12 is a schematic cross-sectional view showing an example of an optical integrated device. [Figure 13] FIG. 13 is a schematic plan view showing an example of an optical integrated device according to the seventh embodiment. [Figure 14] FIG. 14 is a schematic cross-sectional view showing an example of an optical integrated device. [Figure 15] FIG. 15 is a schematic plan view showing an example of the optical integrated device of Example 8. As shown in FIG. [Figure 16] FIG. 16 is a schematic cross-sectional view showing an example of an optical integrated device. [Figure 17] FIG. 17 is a schematic plan view showing an example of an optical integrated device according to the ninth embodiment. [Figure 18] FIG. 18 is a schematic cross-sectional view showing an example of an optical integrated device. [Figure 19] FIG. 19 is a schematic plan view showing an example of the optical integrated device according to the tenth embodiment. [Figure 20] FIG. 20 is a schematic cross-sectional view showing an example of an optical integrated device. [Figure 21] FIG. 21 is a schematic plan view showing an example of the optical integrated device of the eleventh embodiment. [Figure 22] FIG. 22 is a schematic cross-sectional view showing an example of an optical integrated device. [Figure 23] FIG. 23 is an explanatory diagram illustrating an example of an optical transceiver according to this embodiment. [Figure 24] FIG. 24 is a schematic plan view showing an example of an optical integrated device. [Diagram 25] FIG. 25 is a schematic cross-sectional view showing an example of an optical integrated device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, examples of the optical integrated device and the like disclosed in the present application will be described in detail with reference to the drawings. Note that the disclosed technology is not limited to these examples. In addition, the following examples may be appropriately combined as long as no contradiction occurs. EXAMPLES

[0014] FIG. 1 is a schematic plan view showing an example of an optical integrated device 1 of Example 1, and FIG. 2 is a schematic cross-sectional view showing an example of the optical integrated device 1. For convenience of explanation, the schematic cross-sectional view is a schematic cross-sectional view of the optical integrated device 1. The optical integrated device 1 has a second chip 2 having a second optical waveguide 11 having an electro-optic effect, a first chip 3 having an optical circuit 24 and a first optical waveguide 23, and an optical fiber array 4. The second chip 2 is, for example, a chip having an electro-optic effect such as TF-LN (Thin-Film LiNbO3). The second chip 2 is a thin-film substrate of LN with a submicron thickness. The first chip 3 is, for example, a silicon photonics (SiPh) chip. The optical fiber array 4 has an input-side optical fiber 4A for inputting light and an output-side optical fiber 4B for outputting light.

[0015] The second chip 2 has a second optical waveguide 11 made of a TF-LN material, an optical modulator 12 made of a TF-LN material, a trench 13 formed on the chip end surface 2A1, an input section 14, a first output section 15A, and a second output section 15B. The trench 13 is formed on the chip end surface 2A1 of the second chip 2, and has a terrace structure for mounting the first chip 3. The input section 14 is disposed on the second bonding surface 13A of the trench 13, and is a section for inputting light from the first optical waveguide 23 of the first chip 3. The second bonding surface 13A is a surface that abuts against the first bonding surface 3A of the first chip 3 described later. The first output section 15A and the second output section 15B are disposed on the second bonding surface 13A of the trench 13, and are sections for outputting the signal light from the optical modulator 12 to the first optical waveguide 23 of the first chip 3.

[0016] The second optical waveguide 11 has an input waveguide 11A, a folded waveguide 11B, a first output waveguide 11C1, and a second output waveguide 11C2. The input waveguide 11A is a linear TF-LN optical waveguide that extends from the input section 14 in the longitudinal direction of the second chip 2 and connects to the folded waveguide 11B. The folded waveguide 11B is a folded TF-LN waveguide that connects the input waveguide 11A and the input stage of the optical modulator 12. The first output waveguide 11C1 is a TF-LN waveguide that connects the output stage of the optical modulator 12 and the first output section 15A. The second output waveguide 11C2 is a TF-LN waveguide that connects the output stage of the optical modulator 12 and the second output section 15B.

[0017] The first chip 3 has a first input section 21A, a second input section 21B, a third input section 21C, a first output section 22A, a second output section 22B, a first optical waveguide 23, and an optical circuit 24. The optical circuit 24 has a PR (Polarization Rotator) 24A formed of a Si material, and a PBC (Polarization Beam Combiner) 24B formed of a Si material. The first input section 21A is disposed on a surface connected to the optical fiber array 4, and is a section that inputs light from an optical fiber 4A on the input side in the optical fiber array 4. The first output section 22A is disposed on a first joint surface 3A that abuts against the second joint surface 13A of the second chip 2, and is a section that outputs light from the first input section 21A to the second chip 2. The second input section 21B is disposed on the first joint surface 3A, and is a section that inputs light from the optical modulator 12 in the second chip 2 to the PR 24A. The third input section 21C is disposed on the first joint surface 3A, and is a section that inputs light from the optical modulator 12 in the second chip 2 to the PBC 24B. The second output section 22B is disposed on the surface that is connected to the optical fiber array 4, and is a section that outputs signal light from the PBC 24B to the optical fiber 4B on the output side in the optical fiber array 4.

[0018] The first optical waveguide 23 has an input waveguide 23A, a first input waveguide 23B1, a second input waveguide 23B2, and an output waveguide 23C. The input waveguide 23A is a Si waveguide that connects between the first input section 21A and the first output section 22A. The first input waveguide 23B1 is a Si waveguide that connects between the second input section 21B and the PR24A. The second input waveguide 23B2 is a Si waveguide that connects between the third input section 21C and the PBC24B. The output waveguide 23C is a Si waveguide that connects between the second output section 22B and the PBC24B.

[0019] PR24A is a polarization rotation unit that rotates the TE polarized signal light from the first input waveguide 23B1 by 90 degrees to convert it into TM polarized signal light and outputs the TM polarized signal light to PBC24B. PBC24B is a polarization multiplexing unit that polarization multiplexes the TE polarized signal light from the second input waveguide 23B2 and the TM polarized signal light after polarization rotation from PR24A and outputs the polarization multiplexed signal light to output waveguide 23C.

[0020] A trench 13 having a terrace structure for mounting the first chip 3, for example, face-down, is provided in a portion near the chip end surface 2A1 of the second chip 2. The trench 13 is formed, for example, by etching the surface of the second chip 2. As described above, the first output section 22A, the first input section 21A, and the second input section 21B are arranged on the second bonding surface 13A, which is the wall surface of the trench 13.

[0021] When the first chip 3 is mounted face-down in the trench 13 of the second chip 2, the second optical waveguide 11 of the second chip 2 and the first optical waveguide 23 of the first chip 3 are optically coupled by butt coupling using adhesive A. As a result, the input section 14 in the second chip 2 and the first output section 22A in the first chip 3 are optically connected. Furthermore, the first output section 15A in the second chip 2 and the second input section 21B of the first chip 3 are optically connected, and the second output section 15B in the second chip 2 and the third input section 21C of the first chip 3 are optically connected.

[0022] Furthermore, by connecting the first chip 3 to the optical fiber array 4 with adhesive A, the first input section 21A is optically connected to the input side optical fiber 4A, and the second output section 22B is optically connected to the output side optical fiber 4B.

[0023] In the optical integrated device 1 of the first embodiment, the first chip 3 having an optical circuit 24 is mounted on a trench 13 in the second chip 2 having an electro-optic effect, and the second optical waveguide 11 of the second chip 2 and the first optical waveguide 23 of the first chip 3 are optically coupled by butt coupling. As a result, it is no longer necessary to mount the components PR24A and PBC24B individually, which reduces the number of components and significantly reduces the workload required for mounting the second chip 2 having an electro-optic effect.

[0024] Generally, an LN modulator chip is larger in size than a SiPh chip, and when a trench is formed on the SiPh chip to mount an LN modulator, the size of the SiPh chip must be increased to match the size of the LN modulator. In contrast, in the optical integrated device 1 of the first embodiment, it is not necessary to match the size of the first chip 3, which is a SiPh chip, to the size of the second chip 2, which is an LN modulator chip, so that waste of the first chip 3 can be eliminated.

[0025] Since the first chip 3 is mounted face-down on the trench 13 in the second chip 2, the depth of the trench 13 formed on the second chip 2 can be made shallow. Therefore, the burden of etching when forming the trench 13 can be reduced.

[0026] The optical modulator 12 of the second chip 2 is an optical modulator made of TF-LN crystal, and therefore a large electro-optic effect can be obtained, thereby making it possible to reduce the drive voltage of the modulator.

[0027] Since the first chip 3 is a SiPh chip, it is possible to miniaturize the optical circuit 24 including the PR 24A and the PBC 24B.

[0028] For convenience of explanation, the first chip 3 is mounted face-down on the trench 13 of the second chip 2, but face-up mounting is also possible and can be modified as appropriate. Since the first optical waveguide 23 is formed near the chip surface in the first chip 3, the first chip 3 can be mounted face-up on the trench 13 of the second chip 2 by deepening the depth of the trench 13.

[0029] Although TF-LN is exemplified as the material for the electro-optic effect, it is not limited to this and may be, for example, TF-Barium Titanate, and may be changed as appropriate. For example, TF-BTO (BaTiO3), TF-PLZT (PbLaZrTiO3), and TF-PZT (PbZrTiO3) may be used as the material for the electro-optic effect.

[0030] In the optical integrated device 1 of the first embodiment, the second optical waveguide 11 in the second chip 2 and the first optical waveguide 23 in the first chip 3 are optically coupled by butt coupling. However, if the distance X between the input waveguide 11A and the first output waveguide 11C1 of the second optical waveguide 11 in the second chip 2 becomes wider, the deviation of the optical axis becomes larger when the arrangement angle of the first chip 3 is deviated when the first chip 3 is mounted on the second chip 2. As a result, the coupling loss between the second optical waveguide 11 and the first optical waveguide 23 becomes large. Therefore, an embodiment for dealing with such a situation will be described below as the second embodiment. EXAMPLES

[0031] FIG. 3 is a schematic plan view showing an example of the optical integrated device 1A of the second embodiment, and FIG. 4 is a schematic cross-sectional view showing an example of the optical integrated device 1A. The same components as those of the optical integrated device 1 of the first embodiment are denoted by the same reference numerals, and the description of the overlapping components and operations is omitted. The butt coupling point is a point where the interval X between the input waveguide 11A1 and the first output waveguide 11C1 at the butt coupling point of the second chip 2 and the interval X between the input waveguide 23A and the first input waveguide 23B1 at the butt coupling point of the first chip 3 are narrowed. The butt coupling point is a portion where the second chip 2 and the first chip 3 are optically coupled by butt coupling. The interval X between the input waveguide 11A1 and the first output waveguide 11C1 and the interval X between the input waveguide 23A and the first input waveguide 23B1 are narrower than the interval X1 between the optical fiber 4A on the input side and the optical fiber 4B on the output side.

[0032] When the first chip 3 is face-down mounted in the trench 13 of the second chip 2, the second optical waveguide 11 of the second chip 2 and the first optical waveguide 23 of the first chip 3 are optically coupled by butt coupling using the adhesive A. That is, the input waveguide 11A1 of the input unit 14 in the second chip 2 and the input waveguide 23A of the first output unit 22A in the first chip 3 are optically connected. The first output waveguide 11C1 of the first output unit 15A in the second chip 2 and the first input waveguide 23B1 of the second input unit 21B of the first chip 3 are optically connected. Furthermore, the second output waveguide 11C2 of the second output unit 15B in the second chip 2 and the second input waveguide 23B2 of the third input unit 21C of the first chip 3 are optically connected.

[0033] Since the interval X between the input waveguide 11A1 and the first output waveguide 11C1 of the second chip 2 is narrowed, the radius of curvature of the folded waveguide 11B1 is smaller than that of the folded waveguide 11B shown in FIG.

[0034] The input waveguide 23A1 in the first chip 3 is curved so that the distance between the input waveguide 23A1 and the output waveguide 23C in the first chip 3 matches the distance X1 between the optical fiber 4A on the input side and the optical fiber 4B on the output side of the optical fiber array 4.

[0035] In the optical integrated device 1A of the second embodiment, the interval X between the input waveguide 11A1 and the first output waveguide 11C1 at the butt-coupling point of the second chip 2 is made narrower than the interval X1 between the optical fiber 4A on the input side and the optical fiber 4B on the output side of the optical fiber array 4. As a result, the tolerance due to the deviation of the arrangement angle of the first chip 3 when the first chip 3 is mounted is relaxed, and the deterioration of the coupling loss between the second optical waveguide 11 and the first optical waveguide 23 can be suppressed.

[0036] In the optical integrated device 1A of the second embodiment, the distance X between the input waveguide 11A1 and the first output waveguide 11C1 of the second chip 2 is narrowed, so that the radius of curvature of the folded waveguide 11B1 is small. As a result, there is a risk of radiation loss occurring in the folded waveguide 11B1. Therefore, an embodiment for dealing with such a situation will be described below as the third embodiment. EXAMPLES

[0037] Fig. 5 is a schematic plan view showing an example of an optical integrated device 1B of Example 3, and Fig. 6 is a schematic cross-sectional view showing an example of the optical integrated device 1B. The same components as those in the optical integrated device 1A of Example 2 are given the same reference numerals, and the description of the overlapping components and operations is omitted. The diameter of the folded waveguide 11B2 in the second chip 2 is wider than the distance between the input waveguide 11A2 and the first output waveguide 11C1 at the butt coupling point in the second chip 2.

[0038] In the optical integrated device 1B of the third embodiment, the diameter X2 of the folded waveguide 11B2 in the second chip 2 is made larger than the distance X between the input waveguide 11A2 and the first output waveguide 11C1 at the butt-coupling point in the second chip 2. As a result, the radius of curvature of the folded waveguide 11B2 is increased, and radiation loss in the folded waveguide 11B2 can be suppressed.

[0039] In the optical integrated device 1B of Example 3, high accuracy is required for the alignment work for aligning the optical axes of the second optical waveguide 11 of TF-LN having a small optical mode field diameter and the first optical waveguide 23, so the workload for mounting is large. Therefore, in order to deal with such a situation, an embodiment of the present invention will be described below as Example 4. EXAMPLES

[0040] FIG. 7 is a schematic plan view showing an example of an optical integrated device 1C of Example 4, and FIG. 8 is a schematic cross-sectional view showing an example of the optical integrated device 1C. The same components as those of the optical integrated device 1B of Example 3 are denoted by the same reference numerals, and the description of the overlapping components and operations is omitted. The second chip 2 has a test output section 15A1, a test waveguide 15A2 connected to the test output section 15A1, and a GC (Grating Coupler) 15A3 connected to the test waveguide 15A2 and connected to an optical fiber 5 that outputs test light. The test output section 15A1 is disposed between the input section 14 of the second joint surface 13A in the trench 13 and the second output section 15B. The test waveguide 15A2 is a TF-LN waveguide that is disposed between the input waveguide 11A1 of the input unit 14 and the second output waveguide 11C2 of the second output unit 15B and connects to the test output unit 15A1. The GC15A3 is a coupler that connects the test waveguide 15A2 and the optical fiber 5.

[0041] The first chip 3 has a test input section 25A1, a test waveguide 25A2 connected to the test input section 25A1, and a loop mirror 25A3 connected to the test waveguide 25A2. The test input section 25A1 is disposed between the first output section 22A and the third input section 21C of the first joint surface 3A of the first chip 3, and is connected to the test output section 15A1 of the second chip 2. The test waveguide 25A2 is disposed between the input waveguide 23A1 of the first output section 22A and the second input waveguide 23B2 of the third input section 21C, and is a Si waveguide connected to the test input section 25A1. The loop mirror 25A3 is a mirror connected to the test waveguide 25A2 and reflects the test light input from the test waveguide 25A2.

[0042] When the first chip 3 is mounted in the trench 13 of the second chip 2, the test output section 15A1 in the second chip 2 and the test input section 25A1 in the first chip 3 are connected. The GC 15A3 outputs the test light from the optical fiber 5 from the test waveguide 15A2 in the second chip 2 to the test waveguide 25A2 in the first chip 3 via the test input section 25A1. Furthermore, the loop mirror 25A3 reflects the test light input from the test waveguide 25A2 to the test waveguide 25A2 and outputs it to the test waveguide 15A2. Then, the GC 15A3 outputs the reflected light of the test light from the test waveguide 15A2 to a test monitor (not shown). The test monitor receives the reflected light of the test light. The test monitor can then reliably perform alignment work to align the optical axes of the second optical waveguide 11 of the second chip 2 and the first optical waveguide 23 of the first chip 3 based on the power of the reflected light.

[0043] In the optical integrated device 1C of the fourth embodiment, the GC 15A3 in the second chip 2 and the loop mirror 25A3 in the first chip 3 are optically connected by the test waveguides 15A2 and 25A2. Furthermore, in the optical integrated device 1C, an alignment operation can be performed to align the optical axes of the second optical waveguide 11 in the second chip 2 and the first optical waveguide 23 in the first chip 3 based on the power of the reflected light of the loop mirror 25A3 with respect to the test light input from the GC 15A3. As a result, the workload required for optically coupling the second optical waveguide 11 and the first optical waveguide 23 can be reduced.

[0044] A test monitor connected to GC15A3 monitors the power of the reflected light, and when the power of the reflected light is at a predetermined level, it can determine that the optical axes of the second optical waveguide 11 of the second chip 2 and the first optical waveguide 23 in the first chip 3 are aligned. When the power of the reflected light is below a predetermined level, the test monitor can determine that the optical axes of the second optical waveguide 11 and the first optical waveguide 23 are not aligned.

[0045] In addition, since the path from GC15A3 to the loop mirror 25A3 is independent of the path for inputting and outputting light to the optical modulator 12, the impact on the performance of the modulator caused by the test light and reflected light used by GC15A3 and the loop mirror 25A3 provided for the mounting work can be suppressed.

[0046] In the optical integrated device 1C, if the GC 15A3 and the optical fiber 5 are not aligned, it is not possible to accurately determine whether the test waveguide 15A2 in the second chip 2 and the test waveguide 25A2 in the first chip 3 are aligned. Therefore, an embodiment for dealing with such a situation will be described below as Example 5. EXAMPLES

[0047] Fig. 9 is a schematic plan view showing an example of an optical integrated device 1D of Example 5, and Fig. 10 is a schematic cross-sectional view showing an example of the optical integrated device 1D. Note that the same components as those of the optical integrated device 1C of Example 4 are given the same reference numerals, and the description of the overlapping components and operations will be omitted. The second chip 2 has a first GC 16A3, a first test waveguide 16A2, and a first loop mirror 16A1 in addition to a test output section 15A1, a test waveguide 15A2, and a GC 15A3.

[0048] The GC15A3 is connected to the first optical fiber in the two-core fiber array 5A and to the test waveguide 15A2, and outputs the first test light from the first optical fiber to the test waveguide 15A2. The GC15A3 outputs the first reflected light from the test waveguide 15A2 to the test monitor. The test output section 15A1 of the test waveguide 15A2 is connected to the test input section 25A1 of the first chip 3, and outputs the first test light from the GC15A3 and outputs the first reflected light from the test input section 25A1 to the test waveguide 15A2. The test monitor connected to the GC15A3 receives the first reflected light.

[0049] The first GC 16A3 is connected to the second optical fiber in the two-core fiber array 5A and to the first test waveguide 16A2, and outputs the second test light from the second optical fiber to the first test waveguide 16A2. The first GC 16A3 outputs the second reflected light from the first test waveguide 16A2 to the test monitor. The first test waveguide 16A2 is a TF-LN optical waveguide that connects the first GC 16A3 and the first loop mirror 16A1. The first loop mirror 16A1 inputs the second test light from the first test waveguide 16A2 and reflects it to the first test waveguide 16A2 as the second reflected light for the second test light. Then, the test monitor connected to the first GC 16A3 receives the second reflected light.

[0050] The first GC 16A3 is connected to the second optical fiber in the two-core fiber array 5A, and outputs the second test light from the second optical fiber to the first test waveguide 16A2. The first loop mirror 16A1 outputs the second test light from the first test waveguide 16A2 to the first test waveguide 16A2 as the second reflected light. Then, the test monitor connected to the first GC 16A3 receives the second reflected light from the first test waveguide 16A2. The test monitor checks the alignment between the first GC 16A3 and the second optical fiber in the second chip 2 based on the power of the second reflected light. If the power of the first reflected light is equal to or higher than a predetermined level, the test monitor determines that the alignment between the GC 16A3 in the second chip 2 and the second optical fiber, that is, the alignment between the second chip 2 and the two-core fiber array 5A, is achieved.

[0051] After it is determined that the second chip 2 and the two-core fiber array 5A are aligned, the GC 15A3 outputs a first test light from a first optical fiber in the two-core fiber array 5A to the test waveguide 15A2. The loop mirror 25A3 outputs a first reflected light from the test waveguide 15A2 to the test waveguide 15A2 in response to the first test light. Then, the test monitor connected to the GC 15A3 receives the first reflected light from the test waveguide 15A2. The test monitor can accurately determine whether the second optical waveguide 11 in the second chip 2 and the first optical waveguide 23 in the first chip 3 are aligned based on the power of the first reflected light.

[0052] In the optical integrated device 1D, a case has been exemplified in which the test waveguide 25A2 connected to a single loop mirror 25A3 in the first chip 3 is connected to the test waveguide 15A2 in the second chip 2. However, the first chip 3 is not limited to a single loop mirror 25A3, and multiple loop mirrors may be used, and such an embodiment will be described below as Example 6. EXAMPLES

[0053] Fig. 11 is a schematic plan view showing an example of an optical integrated device 1E of Example 6, and Fig. 12 is a schematic cross-sectional view showing an example of the optical integrated device 1E. Note that the same components as those in the optical integrated device 1D of Example 5 are given the same reference numerals, and descriptions of the overlapping components and operations will be omitted. The optical integrated device 1E differs from the optical integrated device 1D in that a plurality of loop mirrors, for example, two loop mirrors, are arranged in the first chip 3.

[0054] The second chip 2 has a third GC 15B3, a third test waveguide 15B2, and a third test output section 15B1 arranged outside the optical modulator 12. Furthermore, the second chip 2 has a fourth GC 15C3, a fourth test waveguide 15C2, and a fourth test output section 15C1 arranged outside the input waveguide 11A1.

[0055] The third GC 15B3 is connected to the first optical fiber in the three-core fiber array 5B and to the third test waveguide 15B2, and outputs the third test light from the first optical fiber to the third test waveguide 15B2. The third GC 15B3 outputs the third reflected light of the third test light from the third test waveguide 15B2 to the test monitor. The third test output section 15B1 of the third test waveguide 15B2 is connected to the third test input section 25B1 of the first chip 3, and outputs the third test light from the third GC 15B3 and inputs the third reflected light of the third test light from the third test input section 25B1.

[0056] The fourth GC 15C3 is connected to the third optical fiber in the three-core fiber array 5B and to the fourth test waveguide 15C2, and outputs the fourth test light from the third optical fiber to the fourth test waveguide 15C2. The fourth GC 15C3 outputs the fourth reflected light from the fourth test waveguide 15C2 to the test monitor. The fourth test output section 15C1 of the fourth test waveguide 15C2 is connected to the fourth test input section 25C1 of the first chip 3, and outputs the fourth test light from the fourth GC 15C3 and inputs the fourth reflected light from the fourth test input section 25C1 to the fourth test light.

[0057] The first chip 3 has a third test input section 25B1, a third test waveguide 25B2, and a third loop mirror 25B3. The first chip 3 has a fourth test input section 25C1, a fourth test waveguide 25C2, and a fourth loop mirror 25C3.

[0058] The third test waveguide 25B2 is a Si waveguide that is disposed outside the first input waveguide 23B1, which is one end of the first chip 3, and connects the third test input section 25B1 and the third loop mirror 25B3. The third loop mirror 25B3 inputs the third test light from the third test waveguide 25B2 and reflects it to the third test waveguide 25B2 as a third reflected light of the third test light.

[0059] The fourth test waveguide 25C2 is a Si waveguide that is disposed outside the input waveguide 23A1, which is the other end of the first chip 3, and connects the fourth test input unit 25C1 and the fourth loop mirror 25C3. The fourth loop mirror 25C3 inputs the fourth test light from the fourth test waveguide 25C2 and reflects it to the fourth test waveguide 25C2 as a fourth reflected light of the fourth test light.

[0060] The third GC 15B3 is connected to the first optical fiber in the three-core fiber array 5B, and outputs the third test light from the first optical fiber to the third test waveguide 15B2. The third loop mirror 25B3 reflects the third test light from the third test waveguide 15B2 to the third test waveguide 15B2 as the third reflected light. Then, the test monitor connected to the third GC 15B3 receives the third reflected light from the third test waveguide 15B2. The test monitor corrects the tilt of the first chip 3 while checking the alignment arrangement between the second optical waveguide 11 in the second chip 2 and the first optical waveguide 23 in the first chip 3 based on the power of the third reflected light.

[0061] The fourth GC 15C3 is connected to the third optical fiber in the three-core fiber array 5B, and outputs the fourth test light from the third optical fiber to the fourth test waveguide 15C2. The fourth loop mirror 25C3 reflects the fourth test light from the fourth test waveguide 15C2 to the fourth test waveguide 15C2 as a fourth reflected light. Then, the test monitor connected to the fourth GC 15C3 receives the fourth reflected light from the fourth test waveguide 15C2. The test monitor corrects the tilt of the first chip 3 while checking the alignment arrangement between the second optical waveguide 11 in the second chip 2 and the first optical waveguide 23 in the first chip 3 based on the power of the fourth reflected light.

[0062] In the optical integrated device 1E of the sixth embodiment, the tilt of the first chip 3 is corrected by using two loop mirrors in the first chip 3, while achieving alignment between the second optical waveguide 11 in the second chip 2 and the first optical waveguide 23 in the first chip 3. As a result, it is possible to achieve high-precision alignment between the optical modulator 12 and the PBC 24B and between the optical modulator 12 and the PR 24A.

[0063] Then, when the power of the third reflected light and the fourth reflected light are each equal to or above a predetermined level, the test monitor can accurately determine that the second optical waveguide 11 in the second chip 2 and the first optical waveguide 23 in the first chip 3 are aligned.

[0064] For convenience of explanation, the third test waveguide 15B2 and the fourth test waveguide 15C2 are used to determine whether the second optical waveguide 11 and the first optical waveguide 23 are aligned using test light from two waveguides. However, the number of waveguides is not limited to two, that is, two butt coupling points, and three or more waveguides may be used, and a test waveguide, a GC, and a loop mirror may be disposed at each position, and may be changed as appropriate.

[0065] Furthermore, at the butt-coupling point between the second chip 2 and the first chip 3, the optical waveguide becomes perpendicular to the second bonding surface 13A of the second chip 2 and the first bonding surface 3A of the first chip 3. As a result, it is considered that the reflected return light at the butt-coupling point returns to the optical waveguide, and the reflected return light makes the light from the light source unstable. Therefore, an embodiment for dealing with such a situation will be described below as Example 7. EXAMPLES

[0066] Fig. 13 is a schematic plan view showing an example of an optical integrated device 1F of Example 7, and Fig. 14 is a schematic cross-sectional view showing an example of the optical integrated device 1F. The same components as those of the optical integrated device 1E of Example 6 are given the same reference numerals, and the description of the overlapping components and operations is omitted. The optical integrated device 1F differs from the optical integrated device 1E in that the second bonding surface 13A1 of the trench 13 and the first bonding surface 3E1 of the first chip 3E are inclined with respect to the optical waveguides of the second chip 2A and the first chip 3E at the butt coupling point between the second chip 2A and the first chip 3E.

[0067] The first chip 3E has a planar shape of a parallelogram. The first chip 3E has a structure in which a first joint surface 3E1 at a butt coupling point of the first chip 3E is inclined with respect to the first optical waveguide .

[0068] The second chip 2A has a structure in which the wall surface of the trench 13, that is, the second joint surface 13A1 at the butt coupling point of the second chip 2A, is inclined with respect to the second optical waveguide 11.

[0069] At a butt-coupling point where input waveguide 23A of first chip 3E and input waveguide 11A1 of second chip 2A are connected, second joint surface 13A1 and first joint surface 3E1 abut against each other at an angle to the optical waveguide.

[0070] At the butt coupling point where the first input waveguide 23B1 of the first chip 3E and the first output waveguide 11C1 of the second chip 2A are connected, the second joint surface 13A1 and the first joint surface 3E1 abut at an angle to the optical waveguide.

[0071] At a butt coupling point where the second input waveguide 23B2 of the first chip 3E and the second output waveguide 11C2 of the second chip 2A are connected, the second joint surface 13A1 and the first joint surface 3E1 abut in an oblique state with respect to the optical waveguide.

[0072] At the butt coupling point where the third test waveguide 25B2 of the first chip 3E and the third test waveguide 15B2 of the second chip 2A are connected, the second bonding surface 13A1 and the first bonding surface 3E1 abut at an angle to the optical waveguide.

[0073] At the butt coupling point where the fourth test waveguide 25C2 of the first chip 3E and the fourth test waveguide 15C2 of the second chip 2A are connected, the second bonding surface 13A1 and the first bonding surface 3E1 abut at an angle to the optical waveguide.

[0074] In the optical integrated device 1F of the seventh embodiment, the second bonding surface 13A1 and the first bonding surface 3E1 are inclined with respect to the optical waveguides of the second chip 2A and the first chip 3E at the butt-coupling point between the second chip 2A and the first chip 3E. As a result, reflected back light at the butt-coupling point can be suppressed.

[0075] However, in the optical integrated device 1F of Example 7, since the planar shape of the first chip 3E is a parallelogram, it is possible that the number of first chips 3E obtained when cut out from the silicon wafer may be small. Therefore, an embodiment for dealing with such a situation will be described below as Example 8. EXAMPLES

[0076] Fig. 15 is a schematic plan view showing an example of an optical integrated device 1G of Example 8, and Fig. 16 is a schematic cross-sectional view showing an example of the optical integrated device 1G. The same components as those in the optical integrated device 1E of Example 6 are denoted by the same reference numerals, and descriptions of the overlapping components and operations are omitted. The optical integrated device 1G differs from the optical integrated device 1E in that a waveguide is disposed obliquely with respect to the second bonding surface 13A of the second chip 2B and the first bonding surface 3B1 of the first chip 3B at the butt coupling point between the second chip 2B and the first chip 3B.

[0077] The waveguide near the first output portion 22A of the input waveguide 23A of the first chip 3B is the diagonal waveguide 23A11. The waveguide near the input portion 14 of the input waveguide 11A1 of the second chip 2B is the diagonal waveguide 11A11. The diagonal waveguides 23A11 and 11A11 are optically coupled to each other by butt coupling, thereby optically connecting the input waveguide 23A and the input waveguide 11A1.

[0078] The waveguide near the second input portion 21B of the first input waveguide 23B1 of the first chip 3B is a diagonal waveguide 23B11. The waveguide near the first output portion 15A of the first output waveguide 11C1 of the second chip 2B is a diagonal waveguide 11C11. The diagonal waveguides 23B11 and 11C11 are optically coupled to each other by butt coupling, thereby optically connecting the first output waveguide 11C1 and the first input waveguide 23B1.

[0079] The waveguide near the third input portion 21C of the second input waveguide 23B2 of the first chip 3B is a diagonal waveguide 23B21. The waveguide near the second output portion 15B of the second output waveguide 11C2 of the second chip 2B is a diagonal waveguide 11C21. The diagonal waveguides 23B21 and 11C21 are optically coupled to each other by butt coupling, thereby optically connecting the second output waveguide 11C2 and the second input waveguide 23B2.

[0080] The third test waveguide 25B2 of the first chip 3B has a diagonal waveguide 25B21 as a waveguide near the third test input portion 25B1. The third test waveguide 15B2 of the second chip 2B has a diagonal waveguide 15B21 as a waveguide near the third test output portion 15B1. The diagonal waveguides 25B21 and 15B21 are optically coupled to each other by butt coupling, thereby optically connecting the third test waveguide 15B2 and the third test waveguide 25B2.

[0081] The fourth test waveguide 25C2 of the first chip 3B has a diagonal waveguide 25C21 near the fourth test input section 25C1. The fourth test waveguide 15C2 of the second chip 2B has a diagonal waveguide 15C21 near the fourth test output section 15C1. The diagonal waveguides 25C21 and 15C21 are optically coupled to each other by butt coupling, thereby optically connecting the fourth test waveguide 15C2 and the fourth test waveguide 25C2.

[0082] In the optical integrated device 1G of the eighth embodiment, the diagonal waveguides at the butt-coupling points between the second chip 2B and the first chip 3B are optically coupled by butt-coupling, so that reflected back light at the butt-coupling points can be suppressed. Moreover, since the planar shape of the first chip 3B is rectangular, the number of chips that can be cut out from the silicon wafer can be greater than that of the first chip 3E of the seventh embodiment.

[0083] Moreover, the optical integrated device 1G for suppressing reflected back light at the butt-coupling point is not limited to the structure of the eighth embodiment, and another embodiment will be described below as a ninth embodiment. EXAMPLES

[0084] Fig. 17 is a schematic plan view showing an example of an optical integrated device 1H of Example 9, and Fig. 18 is a schematic cross-sectional view showing an example of the optical integrated device 1H. The same components as those of the optical integrated device 1E of Example 6 are denoted by the same reference numerals, and the description of the overlapping components and operations will be omitted. The optical integrated device 1H is different from the optical integrated device 1E in that the second bonding surface 13A1 of the second chip 2A and the first bonding surface 3C1 of the first chip 3C are inclined with respect to the optical waveguides of the second chip 2A and the first chip 3C at the butt coupling point between the second chip 2A and the first chip 3C.

[0085] The second chip 2A has a structure in which the second bonding surface 13A1 of the trench 13, that is, the chip end surface at the butt coupling point of the second chip 2A, is inclined with respect to the second optical waveguide 11.

[0086] The planar shape of the first chip 3C remains rectangular, but compared to Figure 11, the first optical waveguide 23, PR24A and PBC24B are arranged at an angle, and the first bonding surface 3C1 at the butt coupling point of the first chip 3C is configured to be angled with respect to the first optical waveguide 23.

[0087] At a butt-coupling point where input waveguide 23A of first chip 3C and input waveguide 11A1 of second chip 2A are connected, second joint surface 13A1 and first joint surface 3C1 abut against each other at an angle to the waveguide.

[0088] At a butt coupling point where first input waveguide 23B1 of first chip 3C and first output waveguide 11C1 of second chip 2A are connected, second joint surface 13A1 and first joint surface 3C1 abut at an angle to the waveguide.

[0089] At a butt coupling point where the second input waveguide 23B2 of the first chip 3C and the second output waveguide 11C2 of the second chip 2A are connected, the second joint surface 13A1 and the first joint surface 3C1 abut in an oblique state relative to the waveguide.

[0090] At the butt coupling point where the third test waveguide 25B2 of the first chip 3C and the third test waveguide 15B2 of the second chip 2A are connected, the second bonding surface 13A1 and the first bonding surface 3C1 abut at an angle to the waveguide.

[0091] At a butt-coupling point where the fourth test waveguide 25C2 of the first chip 3C and the fourth test waveguide 15C2 of the second chip 2A are connected, the second bonding surface 13A1 and the first bonding surface 3C1 abut at an angle to the waveguide.

[0092] In the optical integrated device 1H of the ninth embodiment, the second bonding surface 13A1 and the first bonding surface 3C1 are inclined with respect to the waveguides of the second chip 2A and the first chip 3C at the butt-coupling point between the second chip 2A and the first chip 3C. As a result, reflected back light at the butt-coupling point can be suppressed.

[0093] Next, a mode in which an optical fiber array 4 is connected to a first chip 3C in an optical integrated device 1H according to a ninth embodiment will be described below as a tenth embodiment. EXAMPLES

[0094] Fig. 19 is a schematic plan view showing an example of an optical integrated device 1J of Example 10, and Fig. 20 is a schematic cross-sectional view showing an example of the optical integrated device 1J. Note that the same components as those of Example 9 are given the same reference numerals, and descriptions of the overlapping components and operations will be omitted. The optical integrated device 1J shown in Fig. 19 has a configuration in which a first chip 3C and an optical fiber array 4 in an optical integrated device 1H of Example 9 are connected to each other in an aligned manner by an optical adhesive A1.

[0095] The first chip 3C abuts against a fourth bonding surface 4X of the optical fiber array 4 at a third bonding surface 3C2, which is a chip end surface opposing a first bonding surface 3C1 adjacent to the second chip 2A.

[0096] The optical fiber array 4 has a fourth bonding surface 4X adjacent to the third bonding surface 3C2 of the first chip 3C that is inclined with respect to the axial direction of the optical fiber array 4, so that the input side optical fiber 4A1 and the output side optical fiber 4B1 are arranged at an angle with respect to the fourth bonding surface 4X of the optical fiber array 4.

[0097] The first chip 3C is aligned with the second chip 2A and fixed with an optical adhesive A. The input waveguide 23A of the third bonding surface 3C2 of the first chip 3C is optically connected to the optical fiber 4A1 on the input side of the optical fiber array 4, and the output waveguide 23C of the third bonding surface 3C2 is optically connected to the optical fiber 4B1 on the output side of the optical fiber array 4. Then, the fourth bonding surface 4X of the optical fiber array 4 and the third bonding surface 3C2 of the first chip 3C are bonded with an adhesive A1. The optical integrated device 1J can be aligned with the optical fiber array 4.

[0098] In the optical integrated device 1J of Example 10, the first chip 3C and the optical fiber array 4 are aligned. However, the optical fiber array 4 may be arranged at any angle on the first chip 3C depending on the driver position of the optical modulator 12 and the shape of the package, and can be changed as appropriate. Therefore, such an embodiment will be described below as Example 11. EXAMPLES

[0099] Fig. 21 is a schematic plan view showing an example of an optical integrated device 1K of Example 11, and Fig. 22 is a schematic cross-sectional view showing an example of the optical integrated device 1K. Note that the same components as those in Example 9 are given the same reference numerals, and descriptions of the overlapping components and operations will be omitted. The optical integrated device 1K shown in Fig. 21 is configured such that an optical fiber array 4 is connected by an optical adhesive A3 at an angle position of 90 degrees with respect to the axial direction of a first chip 3D in an optical integrated device 1H of Example 9.

[0100] The first chip 3D has a fifth bonding surface 3D2 that is bonded to the optical fiber array 4 on a chip side perpendicular to the first bonding surface 3D1 that is bonded to the second chip 2B at an angle of 90 degrees with respect to the axial direction of the first chip 3D. The first chip 3D has an output waveguide 23C1 and an input waveguide 23A1. The input waveguide 23A1 is a bent waveguide that bends from the fifth bonding surface 3D2 toward the first bonding surface 3D1. The output waveguide 23C1 is a bent waveguide that bends from the fifth bonding surface 3D2 toward the PBC 24B.

[0101] The optical fiber array 4 has a fourth joint surface 4X that is joined to the fifth joint surface 3D2 of the first chip 3D and is inclined with respect to the axial direction of the optical fiber array 4. The optical fiber 4A2 on the input side and the optical fiber 4B2 on the output side are disposed obliquely with respect to the fourth joint surface 4X of the optical fiber array 4.

[0102] The first chip 3D is aligned with the second chip 2B and fixed with an optical adhesive A. The input waveguide 23A1 of the fifth joint surface 3D2 of the first chip 3D is optically connected to the optical fiber 4A2 on the input side of the optical fiber array 4, and the output waveguide 23C1 of the fifth joint surface 3D2 is optically connected to the optical fiber 4B2 on the output side of the optical fiber array 4. The fourth joint surface 4X of the optical fiber array 4 and the fifth joint surface 3D2 of the first chip 3D are joined with an adhesive A3. The optical fiber array 4 can be arranged at an angle of 90 degrees with respect to the axial direction of the optical integrated device 1K.

[0103] In the optical integrated device 1K of the eleventh embodiment, the optical fiber array 4 is disposed at an angle of 90 degrees with respect to the axial direction of the optical integrated device 1K, which can contribute to miniaturization of the package.

[0104] Incidentally, the waveguides such as the second optical waveguide 11 and the first optical waveguide 23 may be, for example, a rib waveguide, a ridge waveguide, a rectangular waveguide, or a high mesa waveguide. A rib waveguide is preferable because light seeps into the slab portion, so it is less affected by roughness of the core sidewall and allows low-loss propagation. A rectangular waveguide is preferable because it has strong light confinement and therefore reduces loss even if the bending radius R is made small. In addition, the waveguide may be a low-loss curved waveguide, and can be changed as appropriate.

[0105] The first optical waveguide 23 may be a PLC with both the core and clad being SiO2, an InP waveguide, or a GaAs waveguide. It may also be a Si waveguide with a core of Si, a lower clad being SiO2, and an upper clad being SiO2 or air, SiN, or the like. When the waveguide is a Si waveguide, the relative refractive index difference is large, so that light is confined strongly, and therefore a low-loss curved waveguide can be realized even with a small bending radius R, which is preferable because it allows the optical device to be miniaturized.

[0106] Next, an optical transceiver 50 employing the optical integrated device 1 of this embodiment will be described. FIG. 23 is an explanatory diagram showing an example of an optical transceiver 50 employing the optical integrated device 1. The optical transceiver 50 shown in FIG. 23 has an optical transmitter / receiver 51 and a DSP (Digital Signal Processor) 52. The optical transmitter / receiver 51 has an optical modulator element 54, a driver circuit 55, an optical receiver element 56, and a TIA (Transimpedance Amplifier) ​​57. The DSP 52 controls the entire optical transmitter / receiver 51. The DSP 52 is an electrical component that performs digital signal processing, such as IQ modulation processing of a transmission signal and demodulation processing of a reception signal.

[0107] The DSP 52 executes processing such as encoding of transmission data, generates an electrical signal including the transmission data, and outputs the generated electrical signal to a driver circuit 55. The driver circuit 55 drives the optical modulator element 54 in response to the electrical signal from the DSP 52. The optical modulator element 54 incorporates an optical integrated device 1 including an optical modulator that optically modulates signal light.

[0108] The optical receiver element 56 converts the signal light into an electric signal. The TIA 57 amplifies the electric signal after the electric conversion, and outputs the amplified electric signal to the DSP 52. The DSP 52 performs processing such as decoding the electric signal obtained from the TIA 57 to obtain received data.

[0109] For ease of explanation, the optical transceiver 50 has been illustrated as incorporating an optical modulator element 54 and an optical receiver element 56, but the optical transceiver 50 may be an optical transmitter incorporating only the optical modulator element 54, and may be modified as appropriate.

[0110] Furthermore, each component of each unit shown in the figure does not necessarily have to be physically configured as shown in the figure. In other words, the specific form of distribution and integration of each unit is not limited to that shown in the figure, and all or part of them can be functionally or physically distributed and integrated in any unit depending on various loads, usage conditions, etc.

[0111] Furthermore, the various processing functions performed by each device may be executed in whole or in part on a CPU (Central Processing Unit) (or a microcomputer such as an MPU (Micro Processing Unit) or an MCU (Micro Controller Unit)). It goes without saying that the various processing functions may be executed in whole or in part on a program analyzed and executed by a CPU (or a microcomputer such as an MPU or an MCU), or on hardware using wired logic.

[0112] The following supplementary notes are further disclosed regarding the above-described embodiments including the present example.

[0113] (Note 1) In an optical integrated device having a first chip having an optical circuit and a second chip having an optical waveguide including a material having a larger electro-optic effect than a material of the first chip, An optical integrated device, characterized in that the first chip is mounted in a trench formed on the second chip, and the first chip and the second chip are optically coupled by butt coupling.

[0114] (Appendix 2) The second chip is an optical modulator connected to the optical waveguide; The optical circuit includes: a polarization rotation unit that rotates the polarization of the signal light from the optical modulator; a polarization multiplexing unit that polarization-multiplexes the signal light from the optical modulator and the signal light after polarization rotation by the polarization rotation unit; 2. The optical integrated device according to claim 1, comprising:

[0115] (Appendix 3) The second chip is A second joining surface; and a second optical waveguide disposed obliquely with respect to the second joint surface; The first chip includes: a first joint surface in contact with the second joint surface; a first optical waveguide disposed obliquely with respect to the first joint surface and connected to the second optical waveguide; 2. The optical integrated device according to claim 1, comprising:

[0116] (Appendix 4) The second chip is A second optical waveguide; and a second interface of the trench that is oblique to the second optical waveguide; The first chip includes: a first optical waveguide connected to the second optical waveguide; a first bonding surface that is inclined with respect to the first optical waveguide and abuts against the second bonding surface; 2. The optical integrated device according to claim 1, comprising:

[0117] (Appendix 5) The second chip is A second optical waveguide; and a second diagonal waveguide that is diagonal to the second optical waveguide and is connected to the second optical waveguide; The first chip includes: the first optical waveguide; a first diagonal waveguide that is diagonal to the first optical waveguide and connects to the second diagonal waveguide; 2. The optical integrated device according to claim 1, comprising:

[0118] (Appendix 6) The first chip is 2. The optical integrated device according to claim 1, wherein the optical integrated device is mounted face-down on the trench formed on the second chip.

[0119] (Appendix 7) The second chip is 2. The optical integrated device of claim 1, comprising a thin-film LN (LiNbO3) crystal material.

[0120] (Additional Note 8) The second optical waveguide in the second chip is a second input waveguide connected to the first chip; a folded waveguide that connects the second input waveguide and an optical modulator by folding back; 2. The optical integrated device according to claim 1, further comprising: a second output waveguide connected to the optical modulator and connected to the first chip.

[0121] (Appendix 9) The optical integrated device according to appendix 8, characterized in that the diameter of the folded waveguide is longer than the distance between the second input waveguide and the second output waveguide at a junction where the first chip and the second chip are butt-coupled.

[0122] (Supplementary Note 10) The first optical waveguide in the first chip is a first input waveguide connecting an input optical fiber and the second input waveguide; a first output waveguide connecting an output optical fiber and the second output waveguide; 9. The optical integrated device according to claim 8, characterized in that a distance between the second input waveguide and the second output waveguide at a junction where the first chip and the second chip are butt-coupled is narrower than a distance between the first input waveguide and the first output waveguide at a junction surface between the input optical fiber and the output optical fiber.

[0123] (Appendix 11) The first chip comprises: A reflecting mirror is provided. The second chip includes: a third optical waveguide connected to the reflecting mirror; a coupler that is connected to the third optical waveguide; The reflecting mirror is 9. The optical integrated device according to claim 8, wherein when test light from the coupler is input to the third optical waveguide, a reflected light of the input test light is reflected back to the coupler.

[0124] (Appendix 12) The second chip comprises: A fourth optical waveguide; and a first coupler connected to the fourth optical waveguide; a first reflecting mirror connected to the fourth optical waveguide; The first reflecting mirror is 12. The optical integrated device according to claim 11, wherein when test light from the first coupler is input to the fourth optical waveguide, a reflected light of the input test light is reflected back to the first coupler.

[0125] (Appendix 13) An optical transmitter having an optical modulator element for modulating light using an electrical signal and transmitting a transmission light, The optical modulator element includes: An optical transmitting device incorporating an optical integrated device having a first chip having an optical circuit and a second chip having an optical waveguide including a material having a larger electro-optic effect than the material of the first chip, wherein the first chip is mounted in a trench formed on the second chip, and the first chip and the second chip are optically coupled by butt coupling.

[0126] (Supplementary Note 14) An optical transceiver having an optical modulator element for optically modulating light using a transmission signal to transmit a transmission light, and an optical receiver element for receiving a reception signal from the reception light using light, The optical modulator element includes: An optical transceiver incorporating an optical integrated device having a first chip having an optical circuit and a second chip having an optical waveguide including a material having a larger electro-optic effect than the material of the first chip, wherein the first chip is mounted in a trench formed on the second chip, and the first chip and the second chip are optically coupled by butt coupling. [Explanation of symbols]

[0127] 1. Optical integrated devices 2. The second chip 3. The First Chip 11 Second optical waveguide 11A1 Input waveguide 11B Folded waveguide 11C1 First output waveguide 11C2 Second output waveguide 12 Optical Modulator 13. Trench 15A2 Test Waveguide 15A3 GC 23 First optical waveguide 23A Input Waveguide 23C Output Waveguide 24 Optical circuit 24A PR 24B PBC 25A3 Loop Mirror 50 Optical Transceiver 54 Optical Modulator Element 56 Optical receiver element

Claims

1. An optical integrated device having a first chip having an optical circuit and a second chip having an optical waveguide including a material having a larger electro-optic effect than a material of the first chip, an optical integrated device, characterized in that the first chip is mounted in a trench formed on the second chip, and the first chip and the second chip are optically coupled by butt coupling.

2. The second chip includes: an optical modulator connected to the optical waveguide; The optical circuit includes: a polarization rotation unit that rotates the polarization of the signal light from the optical modulator; a polarization multiplexing unit that polarization-multiplexes the signal light from the optical modulator and the signal light after polarization rotation by the polarization rotation unit; 2. The optical integrated device according to claim 1, further comprising:

3. The second chip includes: A second joining surface; and a second optical waveguide disposed obliquely with respect to the second joint surface; The first chip includes: a first joint surface in contact with the second joint surface; a first optical waveguide disposed obliquely with respect to the first joint surface and connected to the second optical waveguide; 2. The optical integrated device according to claim 1, further comprising:

4. The second chip includes: Thin film LN (LiNbO 3 2. The optical integrated device according to claim 1, characterized in that it comprises a crystalline material.

5. The second optical waveguide in the second chip includes: a second input waveguide connecting to the first chip; a folded waveguide that connects the second input waveguide and an optical modulator by folding back; 2. The optical integrated device according to claim 1, further comprising: a second output waveguide connected to said optical modulator and connected to said first chip.

6. 6. The optical integrated device according to claim 5, further comprising a structure in which a diameter of the folded waveguide is longer than a distance between the second input waveguide and the second output waveguide at a junction surface where the first chip and the second chip are butt-coupled.

7. The first optical waveguide in the first chip includes: a first input waveguide connecting an input optical fiber and the second input waveguide; a first output waveguide connecting an output optical fiber and the second output waveguide; having 6. The optical integrated device according to claim 5, wherein the first chip and the second chip have a structure in which a distance between the second input waveguide and the second output waveguide at a joint surface where they are butt-coupled is narrower than a distance between the first input waveguide and the first output waveguide at a joint surface between the input optical fiber and the output optical fiber.

8. The first chip includes: A reflecting mirror is provided. The second chip includes: a third optical waveguide connected to the reflecting mirror; a coupler connected to the third optical waveguide; The reflecting mirror is 6. The optical integrated device according to claim 5, wherein when test light from said coupler is input to said third optical waveguide, a reflected light of said input test light is reflected back to said coupler.

9. An optical transmitter having an optical modulator element that modulates light using an electrical signal and transmits a transmission light, The optical modulator element includes: An optical transmitting device incorporating an optical integrated device having a first chip having an optical circuit and a second chip having an optical waveguide including a material having a larger electro-optic effect than the material of the first chip, wherein the first chip is mounted in a trench formed on the second chip, and the first chip and the second chip are optically coupled by butt coupling.

10. An optical transceiver having an optical modulator element that uses a transmission signal to optically modulate light and transmits the transmission light, and an optical receiver element that uses light to receive a reception signal from the reception light, The optical modulator element includes: An optical transceiver incorporating an optical integrated device having a first chip having an optical circuit and a second chip having an optical waveguide including a material having a larger electro-optic effect than a material of the first chip, the first chip being mounted in a trench formed on the second chip, and the first chip and the second chip being optically coupled by butt coupling.

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