Semiconductor switch

Abstract

To suppress a loss which is generated in a resistance element in an RC circuit.SOLUTION: A semiconductor switch comprises: a series circuit in which a normally-off type switching element and (n) pieces of normally-on type transistors are connected in series, a control terminal of a first transistor being electrically connected to a second main terminal of the switching element in the series circuit; a clamp circuit which clamps a voltage generated between control terminals of adjacent transistors and a voltage generated between a control terminal of an (n)th transistor and a first main terminal; an RC circuit in which a first resistance element and a capacitance element are connected in series between the second main terminal of the switching element and the control terminal of the first transistor, between control terminals of two adjacent transistors and between the control terminal of the (n)th transistor and the first main terminal; a second resistance element which is connected in parallel to the RC circuit; and a diode which is connected in parallel to the first resistance element.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to semiconductor switches. [Background technology]

[0002] 2. Description of the Related Art Conventionally, a switching device is known that includes a plurality of transistors connected in series to a switching element, and an RC circuit connected to each control terminal of the plurality of transistors (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 5399520 Summary of the Invention [Problem to be solved by the invention]

[0004] When the switching device described above is turned on, the charge discharged from the capacitive element in the RC circuit is passed through the resistive element in the RC circuit and charged to the control terminal of the transistor. At this time, if the power output from the capacitive element in the RC circuit is large, excessive instantaneous power loss occurs in the resistive element in the RC element, which may damage the resistive element.

[0005] The present disclosure provides a semiconductor switch capable of suppressing losses occurring in a resistive element in an RC circuit. [Means for solving the problem]

[0006] The semiconductor switch according to the first aspect is a normally-off switching element having a control terminal, a first main terminal, and a second main terminal; and a series circuit in which n normally-on transistors, each having a control terminal, a first main terminal, and a second main terminal (where n is an integer equal to or greater than 2), are connected in series, and the control terminal of a first transistor among the n transistors is electrically connected to the second main terminal of the switching element; a clamp circuit that clamps a voltage generated between the control terminals of adjacent transistors among the n transistors and a voltage generated between the control terminal of an n-th transistor among the n transistors and the first main terminal; an RC circuit in which a first resistive element and a capacitive element are connected in series between the second main terminal of the switching element and the control terminal of a first transistor, between the control terminals of two adjacent transistors among the n number of transistors, and between the control terminal of the nth transistor and the first main terminal; A second resistive element connected in parallel to the RC circuit; a diode connected in parallel to the first resistor element.

[0007] A second aspect is the semiconductor switch of the first aspect, A difference between the time constants of adjacent RC circuits may be equal to a time constant of the RC circuit provided between the control terminal and the first main terminal of an n-th transistor.

[0008] A third aspect is the semiconductor switch of the first or second aspect, The difference in time constant between adjacent RC circuits may be 10 ns or more and 20 ns or less.

[0009] A fourth aspect is the semiconductor switch according to any one of the first to third aspects, The first resistor element may have a resistance value of 50Ω or less.

[0010] A fifth aspect is the semiconductor switch according to any one of the first to fourth aspects, The switching element and each of the n transistors may include a third resistor element connected in series to the control terminal.

[0011] A sixth aspect is the semiconductor switch of the fifth aspect, The sum of the resistance value of the first resistor element and the resistance value of the third resistor element may be 20 Ω or more and 50 Ω or less.

[0012] A seventh aspect is the semiconductor switch of the sixth aspect, The third resistor element may have a resistance value of 10Ω or less.

[0013] An eighth aspect is a semiconductor switch according to any one of the first to seventh aspects, The clamp circuit includes: The n-th transistor may include a plurality of diodes each having an anode electrically connected to the control terminal of the corresponding transistor. The plurality of diodes may include a first diode having a cathode electrically connected to the control terminal of the transistor adjacent to the corresponding transistor, and a second diode having a cathode electrically connected to the first main terminal of the n-th transistor.

[0014] A ninth aspect is the semiconductor switch of the eighth aspect, The rated voltage of the first diode may be 80% or more and 95% or less of the rated voltage of the corresponding transistor.

[0015] A tenth aspect is the semiconductor switch according to any one of the first to ninth aspects, The second resistor element may have a resistance value of 1 MΩ or more and 10 MΩ or less. Effect of the Invention

[0016] According to the present disclosure, it is possible to suppress losses occurring in resistive elements in an RC circuit. [Brief description of the drawings]

[0017] [Figure 1] FIG. 1 is a diagram showing a first configuration example of a pulse power supply to which a semiconductor switch according to an embodiment is applied; [Diagram 2] FIG. 11 is a diagram showing a second configuration example of a pulse power supply to which the semiconductor switch of one embodiment is applied. [Diagram 3] FIG. 2 is a circuit diagram illustrating a configuration example of a semiconductor switch according to an embodiment. [Figure 4] 1 is a diagram showing the relationship between a difference Y between the time constants of adjacent RC circuits and the maximum shared voltage among the voltages shared by each of a plurality of semiconductor elements. [Diagram 5] FIG. 11 is a circuit diagram showing a configuration example of a semiconductor switch according to a comparative example; [Figure 6] FIG. 1 illustrates an example of both positive and negative overvoltages. [Figure 7] FIG. 13 is a diagram illustrating a case where both positive and negative overvoltages are clamped. [Figure 8] FIG. 2 is a diagram illustrating a configuration of a semiconductor switch according to a first comparative example. [Figure 9] FIG. 11 is a diagram illustrating a configuration of a semiconductor switch according to a second comparative example. [Figure 10] FIG. 2 is a diagram illustrating a configuration of a semiconductor switch according to a first embodiment. [Figure 11] FIG. 13 is a diagram illustrating voltage sharing among elements in the semiconductor switch of Comparative Example 1. [Figure 12] FIG. 11 is a diagram illustrating voltage sharing among elements in the semiconductor switch of Comparative Example 2. [Figure 13] FIG. 11 is a diagram illustrating the power consumption of each resistive element in an RC circuit in a semiconductor switch of Comparative Example 2. [Figure 14] FIG. 4 is a diagram illustrating voltage sharing among elements in the semiconductor switch of the first embodiment. [Figure 15] FIG. 4 is a diagram illustrating the power consumption of each resistive element in the RC circuit in the semiconductor switch of the first embodiment. [Figure 16] This is a voltage drive signal input between the gate and source of each semiconductor element. [Figure 17] This is the pulse voltage applied to the load when there is no short circuit in the load. [Figure 18]11A and 11B are diagrams illustrating voltage waveforms between the gate and source of each semiconductor element when a load is short-circuited. [Figure 19] FIG. 19 is a diagram showing the voltage waveforms in FIG. 18 with the time axis expanded. [Figure 20] FIG. 13 is a diagram showing waveforms of clamped gate-source voltages of each semiconductor element when a load is short-circuited. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] The following describes the embodiments.

[0019] Fig. 1 is a diagram showing a first configuration example of a pulse power supply to which a semiconductor switch according to an embodiment is applied. The pulse power supply 201 shown in Fig. 1 is a high-voltage pulse power supply circuit that applies a high-voltage pulse generated by a pulse generating circuit 10 to a load 11. The pulse power supply 201 includes the pulse generating circuit 10 and a control circuit 19.

[0020] The pulse generating circuit 10 includes a capacitor 18 that is charged by a DC power supply 12 via a resistor 13, a resistor 14 that limits the discharge current from the capacitor 18, a semiconductor switch SW1 that is connected in series with the resistor 14, and a resistor 15 that is connected in series with the semiconductor switch SW1. The pulse generating circuit 10 further includes a drive circuit 16 that drives the semiconductor switch SW1. The resistance value of the resistor 15 is sufficiently larger than the resistance value of the resistor 14.

[0021] The control circuit 19 generates a high-voltage pulse to be applied to the load 11 by causing the drive circuit 16 to switch the semiconductor switch SW1, which is a high-voltage semiconductor switch.

[0022] While the semiconductor switch SW1 is on, a high voltage is applied from the capacitor 18 to the load 11. While the semiconductor switch SW1 is off, the high voltage applied to the load 11 is released. This generates a high voltage pulse that is applied to the load 11.

[0023] 2 is a diagram showing a second configuration example of a pulse power supply to which the semiconductor switch of one embodiment is applied. As in the pulse power supply 202 shown in FIG. 2, the pulse generating circuit 10 may be a half-bridge type inverter circuit.

[0024] The pulse generating circuit 10 includes a capacitor 18 that is charged by a DC power supply 12 via a resistor 13, a resistor 14 that limits the discharge current from the capacitor 18, a high-side semiconductor switch SW1, a low-side semiconductor switch SW2, and a resistor 15 connected in parallel to the semiconductor switch SW2. The pulse generating circuit 10 further includes a drive circuit 16 that drives the semiconductor switch SW1, and a drive circuit 17 that drives the semiconductor switch SW2. The resistance value of the resistor 15 is sufficiently larger than the resistance value of the resistor 14.

[0025] The control circuit 19 generates a high voltage pulse to be applied to the load 11 by causing the drive circuits 16 and 17 to perform complementary switching of the upper and lower high voltage semiconductor switches, ie, the semiconductor switch SW1 and the semiconductor switch SW2.

[0026] During a period when the semiconductor switch SW1 is on and the semiconductor switch SW2 is off, a high voltage is applied from the capacitor 18 to the load 11. During a period when the semiconductor switch SW1 is off and the semiconductor switch SW2 is on, the charge stored in the load 11 is discharged via the semiconductor switch SW2. This generates a high voltage pulse that is applied to the load 11.

[0027] Fig. 3 is a circuit diagram showing an example of a configuration of a semiconductor switch according to an embodiment. A semiconductor switch 101 shown in Fig. 3 is applicable to the semiconductor switch SW1 or the semiconductor switch SW2. The semiconductor switch 101 includes a first terminal 31, a second terminal 32, and a third terminal 33.

[0028] 1, 2 and 3, when the semiconductor switch 101 is the above-mentioned semiconductor switch SW1, the first terminal 31 is electrically connected to the node 20, the second terminal 32 is electrically connected to the node 21, and the third terminal 33 is electrically connected to the drive circuit 16. When the semiconductor switch 101 is the above-mentioned semiconductor switch SW2, referring to FIGS. 1 and 3, the first terminal 31 is electrically connected to the node 21, the second terminal 32 is electrically connected to the node 22, and the third terminal 33 is electrically connected to the drive circuit 17. A high-level or low-level voltage signal is input to the third terminal 33 from the drive circuit 16 or the drive circuit 17.

[0029] 3, semiconductor switch 101 is a circuit having a configuration in which multiple semiconductor elements are connected in series. Semiconductor switch 101 includes a normally-off switching element M0 and a series circuit 30 in which n normally-on transistors J1 to Jn are connected in series. n is an integer of 2 or more.

[0030] The switching element M0 is a normally-off type semiconductor element. Examples of the switching element M0 include semiconductor switching elements such as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), a Junction Field Effect Transistor (JFET), a Static Induction Transistor (SIT), a Bipolar Junction Transistor (BJT), or an Insulated Gate Bipolar Transistor (IGBT).

[0031] A MOSFET, JFET, or BJT has a gate corresponding to the control terminal, a drain corresponding to the first main terminal, and a source corresponding to the second main terminal. A BJT has a base corresponding to the control terminal, a collector corresponding to the first main terminal, and an emitter corresponding to the second main terminal. An IGBT has a gate corresponding to the control terminal, a collector corresponding to the first main terminal, and an emitter corresponding to the second main terminal.

[0032] The switching element M0 may be a low-voltage element using Si (silicon) or a high-voltage element using a wide bandgap semiconductor such as SiC (silicon carbide) or GaN (gallium nitride). The switching element M0 is, for example, a switching element using a wide bandgap semiconductor such as a SiC-MOSFET. By employing an element using a wide bandgap semiconductor, the voltage that can be shared by the switching element M0 out of the voltage applied between the first terminal 31 and the second terminal 32 can be increased, and the semiconductor switch 101 can be made to withstand high voltage. This makes it possible to increase the voltage that can be applied to the load 11 via the semiconductor switch 101, for example.

[0033] 3 illustrates an example in which the switching element M0 is a MOSFET having a gate G0, a drain D0, and a source S0. Unless otherwise specified, the following description will be given of the case in which the switching element M0 is a MOSFET.

[0034] The transistors J1 to Jn are normally-on type semiconductor elements, and examples of the transistors J1 to Jn include semiconductor switching elements such as normally-on type JFETs or MOSFETs.

[0035] The gates G1 to Gn correspond to the control terminals of the transistors J1 to Jn, the drains D1 to Dn correspond to the first main terminals of the transistors J1 to Jn, and the sources S1 to Sn correspond to the second main terminals of the transistors J1 to Jn.

[0036] The transistors J1 to Jn may be low-voltage elements using Si (silicon) or the like, but are preferably high-voltage elements using wide bandgap semiconductors such as SiC (silicon carbide) or GaN (gallium nitride). The transistors J1 to Jn are, for example, transistors using wide bandgap semiconductors such as SiC-JFETs. By employing elements using wide bandgap semiconductors, the voltage that can be shared by the transistors J1 to Jn out of the voltage applied between the first terminal 31 and the second terminal 32 can be increased, and the semiconductor switch 101 can be made to withstand high voltage. This makes it possible to increase the voltage that can be applied to the load 11 via the semiconductor switch 101, for example.

[0037] 3 illustrates a case where each of the transistors J1 to Jn is a JFET having a gate, a drain, and a source. Unless otherwise specified, the following description will be given of the case where the transistors J1 to Jn are JFETs.

[0038] The n transistors J1 to Jn in the series circuit 30 are connected in series from the first transistor J1 to the nth transistor Jn in the direction from the source to the drain (in other words, from the second terminal 32 to the first terminal 31). The source S1 of the first transistor J1 is electrically connected to the drain D0 of the switching element M0. The gate G1 of the first transistor J1 is electrically connected to the source S0 of the switching element M0 via the resistor elements RG1 and RB0. In this manner, the transistor J1 is cascode-connected to the switching element M0. The drain Dk of the kth transistor Jk is electrically connected to the source Sk+1 of the (k+1)th transistor Jk+1, where k is an integer from 1 to (n-1).

[0039] A drain Dn of the n-th transistor Jn is electrically connected to the first terminal 31. A source S0 of the switching element M0 is electrically connected to the second terminal 32. Thus, the series circuit 30 forms a current path between the first terminal 31 and the second terminal 32. A gate G0 of the switching element M0 is electrically connected to the third terminal 33.

[0040] The semiconductor switch 101 includes a first clamp circuit 40. The first clamp circuit 40 clamps the voltage occurring between the gates of adjacent transistors among the n transistors J1 to Jn, and the voltage occurring between the gate Gn and drain Dn of the n-th transistor Jn. By clamping these voltages, the first clamp circuit 40 can protect the drain-source region of each of the transistors J1 to Jn from overvoltage. Between the gates of adjacent transistors among the transistors J1 to Jn means between the gate G1 of the transistor J1 and the gate G2 of the transistor J2, between the gate G2 of the transistor J2 and the gate G3 of the transistor J3, ..., between the gate Gn-1 of the transistor Jn-1 and the gate Gn of the transistor Jn.

[0041] In this example, the first clamp circuit 40 is provided for each of the n transistors J1 to Jn, and includes a plurality of diodes CD1 to CDn, the anodes of which are electrically connected to the gates of the corresponding transistors.

[0042] The diodes CD1 to CDn-1 are an example of a first diode whose cathode is electrically connected to the gate of a transistor adjacent to the corresponding transistor. The diodes CD1 to CDn-1 are clamp diodes that clamp the voltage generated between the gates of adjacent transistors among the n transistors J1 to Jn. The diodes CD1 to CDn-1 are each electrically connected between adjacent gate nodes among the gate nodes GN1 to GNn.

[0043] 3, the diode CD1 is one of the first diodes having an anode electrically connected to the gate G1 of the corresponding transistor J1 and a cathode electrically connected to the gate G2 of the transistor J2 adjacent to the corresponding transistor J1. The other first diodes are similar. For example, the diode CDn-1 is one of the first diodes having an anode electrically connected to the gate Gn-1 of the corresponding transistor Jn-1 and a cathode electrically connected to the gate Gn of the transistor Jn adjacent to the corresponding transistor Jn-1.

[0044] The rated voltage of the diodes CD1 to CDn-1 is set to, for example, 80% to 95% of the rated voltage of the corresponding transistor. By setting the rated voltage in this manner, in the event of an overvoltage, the anode-cathode of any of the diodes CD1 to CDn-1 is more likely to short-circuit before the drain-source of the transistor corresponding to that diode. This reduces the possibility of the drain-source of each of the transistors J1 to Jn failing due to an overvoltage.

[0045] The diode CDn is an example of a second diode whose cathode is electrically connected to the first main terminal of the nth transistor. The diode CDn is a clamp diode that clamps the voltage generated between the gate Gn and drain Dn of the nth transistor Jn. The diode CDn is electrically connected between the gate node GNn and the drain Dn of the transistor Jn.

[0046] In the example shown in FIG. 3, the diode CDn is a second diode whose anode is electrically connected to the gate Gn of the corresponding n-th transistor Jn and whose cathode is electrically connected to the drain Dn of the n-th transistor Jn.

[0047] In FIG. 3, the semiconductor switch 101 includes an RC circuit in which a resistive element RA0 and a capacitive element C0 are connected in series between the source S0 of the switching element M0 and the gate G1 of the first transistor J1. The semiconductor switch 101 includes an RC circuit between the gates of two adjacent transistors among the n transistors J1 to Jn. For example, an RC circuit in which a resistive element RA1 and a capacitive element C1 are connected in series is connected between the gate G1 and the gate G2 of two adjacent transistors J1 and J2. Similarly, an RC circuit in which a resistive element RAn-1 and a capacitive element Cn-1 are connected in series is connected between the gate Gn-1 and the gate Gn of two adjacent transistors Jn-1 and Jn. The semiconductor switch 101 includes an RC circuit in which a resistive element RAn and a capacitive element Cn are connected in series between the gate G0 and the drain Dn of the nth transistor Jn. The resistive elements RA0 to RAn are an example of a first resistive element.

[0048] These RC circuits stabilize the voltage between the gate and source of the switching element M0 and each of the n transistors J1 to Jn during a transition such as when the semiconductor switch 101 is turned on or off.

[0049] In the semiconductor switch 101, a gate drive signal is input between the gate G0 and source S0 of the normally-off switching element M0 located in the lowest stage of the circuit. This allows the operation of the entire switch, which is made up of the switching element M0, which is the drive element, and the transistors J1 to Jn, which are passive elements, and simplifies drive control. However, because these semiconductor elements operate in order from the lowest stage, the synchronization between these semiconductor elements is poor, and voltage sharing tends to be concentrated in the semiconductor elements in the lower stages. This synchronization characteristic can be improved by adjusting the time constant of the RC circuit connected in parallel to each semiconductor element.

[0050] In order to improve the synchronization characteristics of the semiconductor switch 101, it is preferable to make the upper semiconductor elements share the transient voltage faster than the lower semiconductor elements. For example, the time constant of the RC circuit connected in parallel to each semiconductor element is set to a value that makes the upper semiconductor elements share the transient voltage faster than the lower semiconductor elements.

[0051] Let Y be the difference in the time constants of adjacent RC circuits, and k be an integer between 1 and (n-1). In this case, the difference Y is: Y=C k ×RA k -C k+1 ×RA k+1 =C n ×RA n ...Formula 1 The time constants of the multiple RC circuits may be adjusted to satisfy the following equation. As a result, the increase in the voltage shared by the transistors J1 to Jn is adjusted during the process of turning off the semiconductor switch 101 (transient state in which the transistors J1 to Jn are turned off in turn). This improves the balance of voltage sharing and improves the synchronism between the semiconductor elements. Equation 1 indicates that the difference Y between the time constants of adjacent RC circuits is equal to the time constant of the RC circuit provided between the gate Gn and drain Dn of the n-th transistor Jn.

[0052] Fig. 4 is a diagram showing the relationship between the difference Y in the time constants of adjacent RC circuits and the maximum shared voltage among the voltages shared by each of the multiple semiconductor elements. Fig. 4 shows the case where n=11. According to Fig. 4, by setting the difference Y in the time constants to be between 10 ns or more and 20 ns or less, the shared voltage of the switching element M0, which has the highest shared voltage among the multiple semiconductor elements, becomes 2 / 3 or less of the rated voltage (1200V) of the multiple semiconductor elements. As a result, synchronism can be ensured, and the durability of each semiconductor element is improved by reducing the maximum shared voltage of the multiple semiconductor elements.

[0053] In particular, when the resistance values ​​of the resistor elements RA1 to RAn are 50Ω or less, synchronism can be ensured compared to when the resistance value exceeds 50Ω, and the durability of each semiconductor element is improved by reducing the maximum shared voltage of the multiple semiconductor elements.

[0054] 3, the semiconductor switch 101 includes resistor elements RB0 to RBn connected in parallel to each of a plurality of RC circuits. The resistor elements RB0 to RBn are an example of second resistor elements. When the semiconductor switch 101 is in a steady on state, the resistor elements RB0 to RBn stabilize the voltages shared by the switching element M0 and the n transistors J1 to Jn.

[0055] If the resistance value of each of the resistive elements RB0 to RBn is equal to or greater than 1 MΩ and equal to or less than 10 MΩ, the steady state in the on state of the semiconductor switch 101 becomes particularly stable.

[0056] 3, the semiconductor switch 101 may include resistance elements RG0 to RGn connected in series to the gates of the switching element M0 and the n transistors J1 to Jn. The resistance elements RG0 to RGn are an example of a third resistance element. The resistance elements RG0 to RGn are damping resistors that improve the stability of the operations of the switching element M0 and the n transistors J1 to Jn.

[0057] When the sum of the resistance values ​​of the resistor elements RA0 and RG1 is 20Ω or more and 50Ω or less, gate oscillation of the transistor J1 can be suppressed more effectively than when the sum is less than 20Ω, and the switching speed of the transistor J1 can be increased more effectively than when the sum exceeds 50Ω. For the same reason, the sum of the resistance values ​​of the other first resistor elements such as resistor element RAn-1 and the other third resistor elements such as resistor element RGn is also preferably 20Ω or more and 50Ω or less. The resistance value of the third resistor element such as resistor element RG1 included in the sum may be 0Ω.

[0058] In particular, when the resistance value of each of the resistance elements RG0 to RGn is 10 Ω or less, the effects of the parasitic inductance and parasitic capacitance of the switching element M0 and the n transistors J1 to Jn are suppressed, thereby particularly improving the operational stability of the switching element M0 and the n transistors J1 to Jn.

[0059] 3, the semiconductor switch 101 includes diodes BD0 to BDn connected in parallel to a plurality of resistance elements RA0 to RAn, respectively. The anode of each of the diodes BD0 to BDn is connected to one end of a corresponding resistance element among the plurality of resistance elements RA0 to RAn, and in this example, is connected between the resistance element and the capacitance element of the RC circuit. The cathode of each of the diodes BD0 to BDn is connected to the other end of the corresponding resistance element among the plurality of resistance elements RA0 to RAn. In this example, the cathode of each of the diodes BD0 to BDn-1 is electrically connected to the gate of a corresponding transistor among the plurality of transistors J1 to Jn, and the cathode of the diode BDn is electrically connected to the drain of the transistor Jn.

[0060] When the semiconductor switch 101 is turned on, most of the current flowing from each of the capacitance elements C0 to Cn-1 in the multiple RC circuits to each of the gates G1 to Gn of the transistors J1 to Jn passes through the diodes BD0 to BDn-1, which are bypasses for the multiple resistance elements RA0 to RAn-1. For example, most of the current flowing from the capacitance element C0 to the gate G1 of the transistor J1 passes through the diode BD0, which is a bypass for the resistance element RA0. Most of the current flowing from the capacitance element Cn-1 to the gate Gn of the transistor Jn passes through the diode BDn-1, which is a bypass for the resistance element RAn-1. Also, when the semiconductor switch 101 is turned on, most of the current flowing from the capacitance element Cn to the drain Dn of the transistor Jn passes through the diode BDn, which is a bypass for the resistance element RAn.

[0061] In this way, the current discharged from each of the capacitance elements C0 to Cn in the multiple RC circuits flows through the corresponding diode BD0 to BDn, and the voltage across each of the multiple resistance elements RA0 to RAn is clamped by the forward voltage of the corresponding diode BD0 to BDn. This allows the instantaneous power loss occurring in the resistance elements RA0 to RAn to be sufficiently suppressed relative to the rated power of the resistance elements RA0 to RAn. The suppression of the instantaneous power loss reduces the possibility of the resistance elements RA0 to RAn being damaged. Furthermore, the required rated power is lowered, making it easier to select the resistance elements RA0 to RAn from a limited variety of parts.

[0062] The semiconductor switch 101 may include a second clamp circuit 50. The second clamp circuit 50 clamps the voltages occurring between the gate and source of the switching element M0 and each of the n transistors J1 to Jn in both positive and negative polarities. By clamping these voltages in both positive and negative polarities, the second clamp circuit 50 can protect the gate and source of the switching element M0 and each of the n transistors J1 to Jn from both positive and negative overvoltages. The second clamp circuit 50 protects between the gate G0 and source S0 of the switching element M0, between the gate G1 and source S1 of the transistor J1, ..., and between the gate Gn and source Sn of the transistor Jn from both positive and negative overvoltages.

[0063] In this example, the second clamp circuit 50 includes a first clamp unit TD0 that clamps the voltage generated between the gate G0 and source S0 of the switching element M0 in both positive and negative polarities. The first clamp unit TD0 has the same characteristics as multiple Zener diodes connected with their forward directions in the opposite directions to each other between the gate G0 and source S0 of the switching element M0.

[0064] In this example, the second clamp circuit 50 includes a plurality of second clamp units TD1 to TDn that are provided for each of the n transistors J1 to Jn and clamp the voltage occurring between the gate and source of the corresponding transistor in both positive and negative polarities. The second clamp unit TD1 has the same characteristics as a plurality of Zener diodes connected with their forward directions in opposite directions between the gate G1 and source S1 of the transistor J1. The same is true for the other second clamp units. For example, the second clamp unit TDn has the same characteristics as a plurality of Zener diodes connected with their forward directions in opposite directions between the gate Gn and source Sn of the transistor Jn.

[0065] Examples of the first clamp portion TD0 or the second clamp portions TD1 to TDn include a TVS (Transient Voltage Suppressor) diode, a varistor, a surge arrester, and a micro gap that generates a micro gap discharge.

[0066] Here, a phenomenon in which an overvoltage occurs between the gate and source of each of the switching element M0 and the n transistors J1 to Jn, and the necessity for protection against the overvoltage will be described.

[0067] 1 or 2, the semiconductor switches SW1 and SW2 open and close a voltage of, for example, several kV. In Fig. 2, the source of the low-side semiconductor switch SW2 is grounded at node 22, which has a constant potential, so the source potential of the semiconductor switch SW2 is constant. In contrast, the source terminal of the high-side semiconductor switch SW1 is connected to node 21, which is in a floating state, so the source potential of the semiconductor switch SW1 changes depending on the circuit operation.

[0068] During a period in which a voltage of several kV is being applied to the load 11 (semiconductor switch SW1 is on and semiconductor switch SW2 is off), if a short circuit occurs in the load 11, the potential of the node 21 drops from several kV to zero potential in several tens of ns to several us. At this time, since the semiconductor switch SW1 is in the on state, the sources S0 to Sn of each semiconductor element in the semiconductor switch SW1 and the drains D0 to Dn of each semiconductor element have approximately the same potential as the node 21. For this reason, if a short circuit occurs in the load 11, the sources S0 to Sn of each semiconductor element and the drains D0 to Dn of each semiconductor element drop to zero potential.

[0069] However, even if a short circuit occurs in the load 11, the potential of the gates G0 to Gn of the semiconductor elements in the semiconductor switch SW1 does not drop immediately. Therefore, when the semiconductor switch 100 shown in FIG. 5, which does not include the second clamp circuit 50 shown in FIG. 3, is applied to the semiconductor switch SW1, high-speed overvoltages of both positive and negative polarities may occur between the gate and source of each of the switching element M0 and the transistors J1 to Jn (see FIG. 6). The rated voltage between the gate and source of each of the switching element M0 and the transistors J1 to Jn may be only a few volts to 20 volts. Therefore, if a positive or negative overvoltage occurs between the gate and source when the load 11 is shorted, a short circuit may occur between the gate and source, and one of the semiconductor elements among the switching element M0 and the transistors J1 to Jn may be damaged.

[0070] In contrast, the semiconductor switch 101 of one embodiment shown in Fig. 3 includes a second clamp circuit 50 that clamps the voltages occurring between the gate and source of the switching element M0 and each of the n transistors J1 to Jn in both positive and negative polarities. These voltages are clamped in both positive and negative polarities by the second clamp circuit 50, as shown in Fig. 7. Therefore, it is possible to protect the switching element M0 and each of the n transistors J1 to Jn from both positive and negative overvoltages between the gate and source.

[0071] 3, a drive signal for turning on or off the switching element M0 is input between the gate G0 and source S0 of the switching element M0. Therefore, if the capacitance of the first clamp section TD0 is 5% or less of the input capacitance of the switching element M0, an error caused in the drive signal during normal operation except when the load 11 is short-circuited can be suppressed.

[0072] 3, a drive signal for turning on or off the transistors J1 to Jn is input between the gate and source of each of the transistors J1 to Jn. Therefore, if the capacitance of each of the second clamp sections TD1 to TDn is 5% or less of the input capacitance of the corresponding transistor among the n transistors J1 to Jn, an error caused in the drive signal during normal operation except when the load 11 is short-circuited can be suppressed.

[0073] The input capacitance corresponds to the sum of the gate-drain capacitance and the gate-source capacitance in the case of a MOSFET, for example, and corresponds to the sum of the gate-collector capacitance and the gate-emitter capacitance in the case of an IGBT, for example.

[0074] Next, comparative examples and examples will be described.

[0075] The high-voltage pulse generator used in high-voltage pulse testing outputs a pulse waveform by switching DC voltage at high speed using a high-voltage switch. To achieve high-speed operation, semiconductor elements are used for the high-voltage switch.

[0076] <Example 1> The high-voltage switch is a six-stage switch in which one SiC-MOSFET (switching element M0) with a maximum rating of 1.2 kV and five SiC-JFETs (transistors J1 to J5) with a maximum rating of 1.2 kV are connected in series. The theoretical maximum withstand voltage is 1.2 kV x 6 = 7.2 kV. The pulse power supply used is the pulse power supply 201 shown in Figure 1. The drive circuit 16 operates the semiconductor switch SW1 by inputting a voltage drive signal of -3 V / +15 V between the gate and source of the SiC-MOSFET of the semiconductor switch SW1.

[0077] Example 1 uses Comparative Example 1 (FIG. 8), Comparative Example 2 (FIG. 9), and Example 1 (FIG. 10) as the semiconductor switch SW1. Example 1 shows an analysis result of the shared voltage of each element (switching element M0 and transistors J1-J5) in the semiconductor switch SW1 and the power consumption of the resistance elements RA0-RAn when the output voltage of 7.2 kV from the DC power supply 12 is opened and closed by the semiconductor switch SW1.

[0078] In the semiconductor switch 301 of Comparative Example 1 (FIG. 8), the transient state circuit is a capacitance element C 10 ~C 15 Fig. 11 is a diagram showing the voltage distribution of each element in the semiconductor switch of Comparative Example 1. As shown in Fig. 11, when semiconductor switch 301 is turned off, voltage tends to concentrate on the lowest switching element M0, and it is understood that the balance of voltage distribution is poor. Just before semiconductor switch 301 is turned on, the voltage distributed to the lowest switching element M0 is about twice the voltage distributed to the highest transistor J5.

[0079] In the semiconductor switch 302 of the comparative example 2 (FIG. 9), the transient state circuit is a resistor element R 10 ~R 15 and the capacitance element C 10 ~C 15 FIG. 12 is a diagram showing the voltage sharing of each element in the semiconductor switch of Comparative Example 2. As shown in FIG. 12, the increase in the shared voltage of each element when the semiconductor switch 302 is turned off is adjusted by adjusting the time constant of the RC circuit. This improves the balance of the voltage sharing and improves the synchronism between the semiconductor elements. However, when the semiconductor switch 302 is turned on, the capacitance element C 1m The energy of the resistive element R 1m Through the transistor J m+1 (m is an integer between 0 and 4). Therefore, when the semiconductor switch 302 is turned on, the capacitance element C 1m When the energy of increases, the resistive element R 1m The power consumption of the resistor element R 1mmay be damaged.

[0080] In the semiconductor switch 401 of the first embodiment (FIG. 10), the transient state circuit is a resistor element R 10 ~R 15 and the capacitance element C 10 ~C 15 It is an RC circuit containing a diode D 20 ~D 25 is the resistive element R 10 ~R 15 Diode D is connected in parallel to 20 ~D 25 is the resistive element R 10 ~R 15 When the semiconductor switch 401 is turned on, the capacitance element C 1m From transistor J m+1 Most of the charging current to the gate of 1m Diode D 2m Pass through.

[0081] 14 is a diagram showing voltage sharing among the elements in the semiconductor switch of the first embodiment. As shown in FIG. 14, the increase in the shared voltage among the elements when the semiconductor switch 401 is turned off is adjusted by adjusting the time constant of the RC circuit. This improves the balance of voltage sharing and improves the synchronism between the semiconductor elements. In addition, when the semiconductor switch 401 is turned on, the capacitance element C 1m From transistor J m+1 Most of the charging current to the gate of 1m Diode D 2m Therefore, as shown in Figure 15, the resistance element R 1m The increase in power consumption is suppressed.

[0082] <Example 2> The high-voltage switch is a 12-stage switch in which one SiC-MOSFET (switching element M0) with a maximum rating of 1.2 kV and eleven SiC-JFETs (transistors J1 to J11) with a maximum rating of 1.2 kV are connected in series. The theoretical maximum withstand voltage is 1.2 kV x 12 = 14.4 kV. The rated voltage between the gate and source of each semiconductor element is ±20 V. The pulse power supply uses the pulse power supply 202 shown in FIG. 2. The output voltage of the DC power supply 12 is set to 7 kV. The drive circuits 16 and 17 input voltage drive signals of -3 V / +15 V complementarily between the gate and source of each SiC-MOSFET of the semiconductor switches SW1 and SW2, thereby causing the semiconductor switches SW1 and SW2 to operate complementarily. FIG. 16 shows the voltage drive signals input between the gate and source of each semiconductor element. FIG. 17 shows the pulse voltage applied to the load 11 when the load 11 is not short-circuited.

[0083] Fig. 18 is a diagram showing the voltage waveforms between the gate and source of each semiconductor element when the load 11 is short-circuited. The short-circuit of the load 11 occurs at approximately 31 μs. Fig. 19 is a diagram showing the voltage waveforms of Fig. 18 with the time axis enlarged. It can be seen that a high-speed overvoltage exceeding the rated voltage of the element occurred when the load 11 was short-circuited.

[0084] In order to prevent this high-speed overvoltage, the semiconductor switch 101 of this embodiment is adopted for the high-voltage switch (semiconductor switches SW1, SW2) in FIG. 2. The first clamp unit TD0 and the second clamp units TD1 to TDn use TVS (Transient Voltage Suppressor) diodes. The capacitance of the TVS diode is 25 pF, which is 2.3% of the input capacitance (about 1.1 nF) of each semiconductor element. A low capacitance (5% or less of the input capacitance of the semiconductor element) type TVS diode is used so as not to affect the gate-source waveform during normal operation. The operating voltage of the TVS diode is ±16 V. In order to suppress positive and negative overvoltages, two TVS diodes with an operating voltage of 16 V are connected in the opposite directions. FIG. 20 is a diagram showing the waveform of the clamped gate-source voltage of each semiconductor element when the load 11 is short-circuited. As shown in FIG. 20, it is shown that the overvoltage falls within the rated gate-source voltage.

[0085] As described above, the embodiment has been described, but the above embodiment is presented as an example, and the present invention is not limited to the above embodiment. The above embodiment can be implemented in various other forms, and various combinations, omissions, substitutions, modifications, etc. can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are included in the scope of the invention and its equivalents described in the claims.

[0086] Applications of the semiconductor switch of the present embodiment are not limited to high-voltage pulse power supplies, but may also include, for example, power conversion devices. [Explanation of symbols]

[0087] 10 Pulse Generator Circuit 11 Load 12 DC power supply 13,14,15 Resistance 16,17 Drive circuit 18 Capacitor 19 Control circuit 20, 21, 22 nodes 30 Series Circuit 40 First clamp circuit 50 Second clamp circuit 100,101,301,302,401 Semiconductor switches 201,202 Pulse power supply BD0~BDn Diodes CD1~CDn Diodes RA0 to RAn Resistance elements TD0 First clamp part TD1~TDn Second clamp section

Claims

1. a normally-off switching element having a control terminal, a first main terminal, and a second main terminal; and a series circuit in which n normally-on transistors, each having a control terminal, a first main terminal, and a second main terminal, are connected in series, where n is an integer equal to or greater than 2, and the control terminal of a first transistor among the n transistors is electrically connected to the second main terminal of the switching element; a clamp circuit that clamps a voltage generated between the control terminals of adjacent transistors among the n transistors and a voltage generated between the control terminal of an n-th transistor among the n transistors and the first main terminal; an RC circuit in which a first resistance element and a capacitance element are connected in series between the second main terminal of the switching element and the control terminal of a first transistor, between the control terminals of two adjacent transistors among the n number of transistors, and between the control terminal of the nth transistor and the first main terminal; A second resistive element connected in parallel to the RC circuit; a diode connected in parallel to the first resistive element.

2. 2. The semiconductor switch according to claim 1, wherein a difference between the time constants of adjacent RC circuits is equal to a time constant of the RC circuit provided between the control terminal and the first main terminal of an n-th transistor.

3. 3. The semiconductor switch according to claim 1, wherein a difference between the time constants of the adjacent RC circuits is 10 ns or more and 20 ns or less.

4. 3. The semiconductor switch according to claim 1, wherein the first resistor element has a resistance value of 50Ω or less.

5. 3. The semiconductor switch according to claim 1, further comprising a third resistive element connected in series with the switching element and the control terminal of each of the n transistors.

6. 6. The semiconductor switch according to claim 5, wherein a sum of a resistance value of the first resistor element and a resistance value of the third resistor element is 20 Ω or more and 50 Ω or less.

7. The semiconductor switch according to claim 6 , wherein the third resistor element has a resistance value of 10Ω or less.

8. The clamp circuit includes: a plurality of diodes provided for the n transistors, the anodes of the diodes being electrically connected to the control terminals of the corresponding transistors; 3. The semiconductor switch according to claim 1, wherein the plurality of diodes include a first diode having a cathode electrically connected to the control terminal of the transistor adjacent to the corresponding transistor, and a second diode having a cathode electrically connected to the first main terminal of an n-th transistor.

9. 9. The semiconductor switch according to claim 8, wherein the rated voltage of the first diode is 80% to 95% of the rated voltage of the corresponding transistor.

10. 3. The semiconductor switch according to claim 1, wherein the second resistor element has a resistance value of 1 MΩ or more and 10 MΩ or less.

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