Meta-surface antenna manufactured using mass transfer technology

Abstract

To provide a meta-surface antenna using mass transfer technologies.SOLUTION: A unit cell can be used for a meta-surface, meta-material, or beamforming antenna. The unit cell includes a metal layer attached to a substrate. The metal layer defines an iris opening for the unit cell. One or more tunable capacitance devices are positioned within or across the iris opening. Each tunable capacitance device is to tune resonance frequency of the unit cell. Mass transfer technologies or self-assembly processes may be used to position the tunable capacitance devices.SELECTED DRAWING: Figure 3A

Description

[Technical field]

[0001] (Related Applications) This application is a continuation of and claims the benefit of U.S. Provisional Application No. 62 / 887,239, filed August 15, 2019, and U.S. Nonprovisional Application No. 16 / 991,924, filed August 12, 2020, which are incorporated by reference in their entireties.

[0002] (Technical field) FIELD OF THE DISCLOSURE Embodiments of the present invention relate to wireless communications, and more particularly, embodiments of the present invention relate to wireless antennas utilizing devices fabricated using mass transfer techniques. [Background technology]

[0003] Metasurface antennas have recently emerged as a new technology for generating steered directional beams from lightweight, low-cost, and planar physical platforms. Such metasurface antennas are currently used in many applications, e.g., satellite communications.

[0004] Metasurface antennas can comprise metamaterial antenna elements that can selectively couple energy from a feed wave to produce a controllable beam for use in communications. These antennas can achieve performance comparable to phased array antennas from an inexpensive and easy-to-manufacture hardware platform.

[0005] The use of simpler elements compared to phased arrays makes metasurfaces easier and faster to operate. However, these elements do not provide the same level of control that can be achieved with phase shifters and amplifiers that are common in phased array architectures. Some implementations of metasurface-based antennas do not provide independent control of both the magnitude and phase of each individual element in the array. Such control may be desirable. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] US Patent Application Publication No. 2015 / 0236412 Summary of the Invention

[0007] Various embodiments of unit cells, cell rotations, arrays, tunable capacitance devices, apertures, aperture segmentation, templates, assemblies and self-assembly methods for fabrication, mass transfer techniques, drive circuits, metasurface antennas, metamaterial antennas, beamforming antennas, assemblies and components are described herein.

[0008] One embodiment is a unit cell for a metasurface, metamaterial, or beamforming antenna. The unit cell includes a substrate and a metal layer attached to the substrate. The metal layer defines an iris opening. One or more tunable capacitance devices are positioned within or across the iris opening. Each tunable capacitance device is for adjusting a resonant frequency of the unit cell.

[0009] One embodiment is an antenna. The antenna has one or more substrates that define an antenna aperture. The antenna aperture has a plurality of unit cells. Each unit cell has a metal layer attached to a portion of the one or more substrates. The metal layer defines an iris aperture. One or more tunable capacitance devices are positioned within or across the iris aperture. Each tunable capacitance device is tunable to a resonant frequency of a unit cell. The one or more tunable capacitance devices of the unit cells have a uniform orientation across at least a portion of the antenna aperture.

[0010] One embodiment is a method of manufacturing an antenna, antenna component, or electronically scanned array. The method includes disposing unit cells on a substrate. Each unit cell has a metal layer attached to the substrate and defining an iris aperture. One or more tunable capacitance devices are positioned within or across the iris aperture. Each tunable capacitance device will tune the resonant frequency of the unit cell. The method includes attaching the one or more tunable capacitance devices as part of completing each of a plurality of unit cells.

[0011] One embodiment is a method of fabricating an electronically scanned array using mass transfer techniques. The method includes providing a substrate having a metal layer. The metal layer is attached to the substrate to define iris apertures. Using a self-assembly process, one or more tunable capacitance devices are aligned to each of the iris apertures. The one or more capacitance devices are bonded to the substrate while aligned to the iris apertures.

[0012] Other aspects and advantages of the present disclosure will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, which illustrate, by way of example, the principles of the described embodiments.

[0013] The described embodiments and their advantages can be best understood by referring to the following description taken in conjunction with the accompanying drawings, which are not intended to limit in any way the changes in form and detail that may be made to the described embodiments by those skilled in the art without departing from the spirit and scope of the described embodiments. [Brief description of the drawings]

[0014] [Figure 1A] FIG. 1C is a cross-sectional view of a unit cell design implemented and tuned using bias electrodes and through-vias for one embodiment of a metasurface antenna. [Figure 1B] FIG. 1B is a top view of the unit cell design of FIG. 1A for one embodiment of a metasurface antenna. [Diagram 2] FIG. 13 is a top view of a unit cell design using through vias. [Figure 3A] FIG. 13 is a top view of a unit cell design that does not require through vias. [Figure 3B] FIG. 13 is a top view of another unit cell design that does not require through vias. [Figure 3C] FIG. 13 is a top view of another unit cell design that does not require through vias. [Figure 4] FIG. 13 is a top view of a semicircular disk unit cell which allows the rotation of the diode to be kept uniform while the rest of the unit cell can have a different rotation. [Figure 5A] FIG. 2 is a bottom view of a circular diode. [Figure 5B] FIG. 2 is a cross-sectional view of an unpackaged circular diode. [Figure 5C] Cross-section of a circular diode package [Figure 6] FIG. 13 is a top view of an implementation of a large circular or rectangular aperture with diodes having uniform orientation in a hexagonal subarray. [Figure 7] FIG. 13 is a top view showing an implementation of a large rectangular aperture with diodes having uniform orientation within a rectangular subarray. [Figure 8A] FIG. 13 illustrates how the use of segmentation can simplify cell rotation and diode placement. [Figure 8B] FIG. 8B shows a variation of the design of FIG. 8A in which the orientation of the diode is separated into three sections. [Figure 8C] FIG. 8C shows how the design from FIG. 8B can be implemented using small rectangular stamps. [Figure 9A] FIG. 13 shows a unit cell with two symmetrically positioned diodes with a resistive bias electrode directly connected to the patch electrode. [Figure 9B] FIG. 1 shows a unit cell with a single diode and a resistive bias line connected directly to the patch electrode. [Figure 10] FIG. 1 is a flow diagram illustrating a manufacturing method for one embodiment of a metasurface antenna. [Figure 11] FIG. 1 is a top view of a diode integration with vias produced using a thin film process. [Figure 12] 12 is a cross-sectional view taken along line AB of the diode integrated portion of FIG. 11. [Figure 13] FIG. 13 is a cross-sectional view of an assembly site using an assembly template. [Figure 14] FIG. 1 is a top view of an assembly template on a glass substrate before assembly. [Figure 15A] 1 is a cross-sectional view of parts being assembled in one embodiment of the self-assembly process. [Figure 15B] FIG. 13 is a perspective view of parts to be assembled for a further embodiment of the self-assembly process. [Figure 16] FIG. 1 shows the parts assembled in a desired orientation using ferromagnetic pads and magnets. [Figure 17]FIG. 13 illustrates a part including a double-sided diode die assembled using an iris aperture as part of an assembly template. [Figure 18] FIG. 13 illustrates a part including a single-sided diode die assembled using an iris aperture as part of an assembly template. [Figure 19A] FIG. 13 shows another embodiment of an antenna element including a diode-TFT array-iris connection. [Figure 19B] FIG. 13 shows another embodiment of an antenna element including a diode-TFT array-iris connection. [Figure 20A] FIG. 13 is an embodiment of a circuit schematic illustrating an equivalent or representation of an electronic circuit of a tunable iris aperture unit cell for a metasurface or metamaterial antenna. [Figure 20B] FIG. 13 is an embodiment of a circuit schematic illustrating an equivalent or representation of an electronic circuit of a tunable iris aperture unit cell for a metasurface or metamaterial antenna. [Figure 21] FIG. 1 is a circuit diagram of one embodiment of a cylindrically fed holographic radial aperture antenna. [Figure 22] FIG. 2 is a perspective view of a row of antenna elements including a ground plane and a reconfigurable resonator layer. [Diagram 23] FIG. 2 is a side view of one embodiment of a cylindrical feed antenna structure. [Figure 24] FIG. 13 illustrates another embodiment of an antenna system having outgoing waves. [Diagram 25] FIG. 2 is a diagram showing one embodiment of the arrangement of a matrix driving circuit for antenna elements. [Figure 26] FIG. 1 illustrates one embodiment of a TFT package. [Figure 27] 1 is a block diagram illustrating one embodiment of a communication system having simultaneous transmit and receive paths. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Improved designs of metasurface elements, more specifically tunable components, of metasurface or metamaterial antennas are described herein in various embodiments. Methods for fabricating metasurface elements, more specifically tunable components, of metasurface or metamaterial antennas are described herein in various embodiments. Various designs are for an array of iris apertures and unit cells on a substrate, using diodes as varactors to tune the resonant frequency of the iris aperture. The design and placement of the metasurface elements in a metasurface or metamaterial antenna impacts the function and performance of the antenna.

[0016] Generally speaking, aspects of the present application correspond to systems, methods, and devices related to tunable metasurface antennas, such as for use in holographic beamforming. Metasurface antennas can be fabricated using mass transfer techniques. By way of example, mass transfer can include a number of different methods and techniques for fabricating high-resolution direct-view displays using discrete components. Mass transfer techniques allow for the transfer of thousands or millions of components or packages (such as tunable components) onto a substrate in a single placement operation for application in radio frequency ("RF") applications. Such approaches facilitate massive scalability of discrete components. Without limitation, tunable components include, but are not limited to, microelectromechanical systems ("MEMS"), varactor diodes, PIN diodes, MOSFET / BJT / HEMT, dual diodes (varactors), and ferroelectric diodes.

[0017] Aspects of the present application relate to the application of mass transfer technologies and techniques to antenna manufacturing. In one aspect, the application of mass transfer technologies corresponds to antenna design. In order to implement discrete varactor diodes or other tunable components, the antenna array or antenna elements are designed in a way that allows the implementation of the discrete components. At the same time, the performance parameters of the antenna, such as, for example, but not limited to, radiation efficiency, are taken into account. In the following, some antenna element designs are described in detail.

[0018] In another aspect, the application of mass transfer technology and techniques is applied to bias circuits. Tunable metasurface antennas incorporate bias networks that allow control of antenna elements on an array, including individual control of antenna elements. The components of the metasurface antenna and their relative positions are designed so as not to interfere with the antenna's radio frequency (RF) signal. Some bias circuit components are described in detail below.

[0019] In a further aspect, the application of mass transfer technologies and techniques can accommodate integration and topology approaches, which generally accommodate facilitating interoperability of components in mass-produced antennas. Below, several integration and topology approaches are described for single layer substrates, multi-layer substrates, and multi-layer thin films on single layer substrates.

[0020] In yet another aspect, the application of mass transfer technologies and techniques can affect scalability, and several scalability aspects are discussed in detail below.

[0021] In one embodiment, the metamaterial antenna has individual tunable antenna elements assembled with micrometer or millimeter scale parts originating from different processes. For example, in one embodiment, diodes fabricated on a GaAs substrate need to be assembled on a glass substrate with a TFT (thin film transistor) matrix. Such assembly can be done by a traditional pick-and-place method, where individual individual components are placed on the substrate. For example, the individual components can be picked up by a robot arm and placed on the assembly site on the glass substrate. However, the traditional pick-and-place method corresponds to a serial assembly process requiring long assembly times and high costs. Especially for small and thin parts, pick-and-place methods become inefficient because undesirable adhesion may occur due to electrostatic forces, van der Waals interactions, or surface tension. Furthermore, serial pick-and-place methods are extremely slow if the features to be assembled are not arranged with respect to a rectangular grid. This is a serious problem in the case of metasurface and metamaterial antennas, since the antenna features are repeated in a radial grid.

[0022] In other embodiments, the individual elements can be assembled in a parallel process often referred to as "self-assembly." Self-assembly is a stochastic process in which energy, e.g., agitation, is applied to a system to create free parts, e.g., unassembled parts, that move across a glass substrate, and these parts interact with their surroundings to find a low-energy state, e.g., parts that are assembled in matching grooves on the glass substrate. Additionally, the self-assembly process does not depend on a rectangular grid to operate efficiently.

[0023] (Antenna Design) In one aspect, multiple antenna unit cell designs include iris apertures (or slots) and patches as core antenna components. A metasurface or metamaterial antenna has many such iris apertures and unit cells, for example, an array (or multiple arrays) of iris apertures and unit cells. Referring to FIG. 1A and FIG. 1B, a diode is mounted (connected) to the unit cell to make the resonant frequency of the unit cell tunable. That is, the diode tunes the unit cell. Bias lines are used to provide the necessary tuning voltage to the varactor. Plated thru vias are used as electrical RF connections between the diode and the iris metallization, as well as DC connection grounds for the diode. It is noted that although the terms "connected" and "connected" are used throughout this specification, a connected component may be coupled to one or more other intervening elements while having an electrical connection.

[0024] FIG. 1A is a cross-sectional view of a unit cell design implemented and tuned using a bias electrode 110 and a through via 106 for one embodiment of a metasurface antenna. In this embodiment, the diode 102 acts as a varactor (i.e., a variable voltage-controlled capacitor) to tune the resonant frequency of the unit cell. In one embodiment, one terminal of the diode 102 is connected to the iris metal 114 through the substrate 108 using a through via 106, and the other terminal of the diode is connected to the patch electrode 104. The voltage applied to these two terminals of the diode 102 controls the capacitance of the varactor. In one embodiment, both the patch electrode 104 and the bias electrode 110 connected to the patch electrode 104 are attached to the substrate 108 (e.g., glass, flexible substrate, printed circuit board (PCB)), and the diode 102 is connected to a portion of the top of the patch electrode 104 and to the through via 106, so that the diode 102 is coupled to the substrate 108 but spaced apart from the substrate 108. An iris metal 114 is attached to the bottom of the substrate 108 and forms an iris opening (or slot) 112 below the diode 102 .

[0025] In operation, the effective electromagnetic properties of each unit cell of FIG. 1A, as well as other unit cell designs herein, can be controlled by dropping a voltage across a diode 102 (e.g., a varactor diode) that is used as a voltage tunable capacitor for the RF radiating antenna element. Varying the diode voltage changes the capacitance, shifting the resonance of the resonator (i.e., antenna element). In other words, varying the diode voltage changes the effective capacitance of the radiating antenna element, and the change in effective capacitance changes the behavior of the radiating element. In this way, the varactor diode is a tunable element for the radiating antenna element in beamforming. Thus, adjusting the diode voltage adjusts the resonance of the antenna element to achieve beamforming.

[0026] FIG. 1B is a top view of the unit cell design of FIG. 1A for one embodiment of a metasurface antenna. The diode 102 spans an iris aperture 112 formed in an iris metal 114 attached to a substrate 108 (see also FIG. 1A). In some embodiments, the iris aperture 112 is an elongated shape with parallel sides and rounded ends, resembling an elongated flattened oval. Alternatively, the iris aperture 112 does not have rounded ends and / or parallel sides. Additional shapes of the iris aperture 112 may be devised for other embodiments. A patch electrode 104 connected to one terminal of the diode 102 is on one side of the iris aperture 112, and a through via 106 connected to the other terminal of the diode 102 is on the opposite side of the iris aperture 112. To avoid interference with the RF waves at the iris opening 112 , the bias electrode 110 connected to the patch electrode 104 is also on one side of the iris opening 112 and does not extend beyond the iris opening 112 .

[0027] Alternative embodiments of unit cell designs are shown in Figures 2, 3A, 3B, and 3C. The embodiment shown in Figure 2 incorporates through vias. Figure 1B can be implemented using through vias as well. The embodiments shown in Figures 3A, 3B, and 3C do not include vias to couple the diodes to the iris metal layer. Eliminating the vias can provide manufacturing efficiencies and costs.

[0028] 2 is a top view of a unit cell design using through vias 106. This design features two diodes 102 perpendicular to and spanning an iris aperture 112, either end-to-end or back-to-back. The two diodes 102 each have one terminal connected to a patch electrode 104 (on the patch layer), which is connected to a bias electrode 110. In one embodiment, the bias electrode 110 runs longitudinally from the center of the iris aperture 112 past one elongated end of the iris aperture 112 down the center of the iris aperture. In this arrangement, the iris aperture 112 and the two diodes 102 are symmetrical about the bias electrode 110. The other terminal of each diode 102 is connected to the respective iris metal using a through via 106 (i.e., two through vias 106, one on each side of the iris aperture 112). The two diodes 102 as varactors in this configuration create two capacitors in series, each with a capacitance C, which combined can be considered as half the capacitance, C / 2. The operation of such a circuit is similar to the single varactor configuration. By doubling the value of each capacitance, the combined capacitance value becomes the same as a single varactor. The main advantage of the dual varactor design is that a bias line can be inserted without affecting the RF performance. Other designs have a resistive bias line to decouple the DC circuit from the RF.

[0029] 3A is a top view of a unit cell design that does not require through vias. In this design, the diodes 102 are oriented lengthwise parallel to and at the center of the iris opening 112. There are two patch electrodes 104 in the patch layer, one connected to each end of the diodes 102 and to each terminal. There are two bias electrodes 110, one connected to each respective patch electrode 104, that extend lengthwise past each end of the iris opening 112 along the centerline.

[0030] 3B is a top view of a further unit cell design that does not require through vias. Similar to the unit cell design of FIG. 2, this design features two diodes 102 connected end-to-end across an iris aperture 112. One bias electrode 110 running along the centerline of the iris aperture 112 is connected to a patch electrode, which is connected to an electrode 302, also along the centerline, that is connected to opposing terminals of the diodes 102. The opposing terminals of the diodes 102 are each connected to a respective patch electrode 104 and bias electrode 110 that are parallel to the centerline bias electrode 110 and to either side of the iris aperture 112.

[0031] 3C is a top view of a further unit cell design that does not require through vias. Similar to the unit cell designs of FIGS. 1A and 1B, this unit cell design features a single diode 102 that spans the iris opening. Each terminal of the diode 102 is connected to a respective patch electrode 104 and bias electrode 110. These two bias electrodes 110 extend parallel to and on either side of the iris opening 112, without extending across or obscuring the iris opening 112.

[0032] One of the challenges in using mass transfer techniques for various metasurface antennas is that in some embodiments, the antenna has an array of unit cells, and each unit cell has an arbitrary rotation. However, in diode manufacturing, it can be difficult and costly to create a wafer with thousands of diodes with arbitrary rotations. An alternative approach is to use diodes with a uniform orientation on the wafer, and rotate the diodes as they are transferred by pick-and-place or mass transfer techniques. However, this technique can also be extremely difficult, slow, and costly.

[0033] 4 is a top view of a semicircular disk unit cell in which the rotation of the diodes can be uniformly oriented across the array while the remainder of each unit cell, including the iris defined by the iris metal, can have a different rotation. For example, as shown in FIG. 4, in multiple arrangements of unit cells with different rotations, the diodes 404 are all oriented parallel to one another, i.e., with a shared constant 0 degree diode rotation (or any other constant amount of rotation in further embodiments). In one embodiment, the iris aperture 402 and electrode 406, all formed of iris metal, are in a constant orientation relative to one another within the unit cell, and the unit cell is rotated for various arrangements within the array for the antenna (or antenna components). For example, the iris metal defines an opening called the iris aperture 402 to define the electrode 406, and in each arrangement or instance of the unit cell, metal material is removed from the circular or rounded portion of the metal layer of the electrode 406 as shown in FIG. 4.

[0034] More specifically, the unit cell design of FIG. 4 does not require rotation of the diode 404 on the wafer or during the transfer process. In one embodiment, the unit cell incorporates two electrodes 406 having the shape of a semicircular disk with a gap between them. Using this cell design, the orientation of the diode 404 can be kept unchanged while the rotation of the unit cell is changed. At any rotation of the cell, the diode bridges between the two semicircular disk electrodes 406, and no rotation of the diode 404 is required. Different rotations may result in a change in resonant frequency, but this can be compensated for by a customized iris length, i.e., the length of the iris opening 402, for each of the multiple unit cells placed throughout the array. The uniform orientation of the diodes 404 on the wafer simplifies the mass transfer and alignment of the diodes 404 to the unit cells in the array of unit cells, and allows all the diodes 404 to be placed during manufacturing with the same orientation even with different rotations of the iris opening (and therefore the antenna element), especially when using linear array placement techniques.

[0035] In another embodiment, a circular discrete component (e.g., a diode) can be used, as shown in Figures 5A, 5B, and 5C. This is a rotationally symmetric component with electrode pads that are also rotationally symmetric. Such a circular component can be manufactured either as an unpackaged circular diode (see Figure 5B) or as a conventional rectangular diode die packaged in a circular package (see Figure 5C).

[0036] 5A is a bottom view of a circular diode. The circular portion has rotationally symmetrical bonding pads. One terminal of the diode is available for connection at a bonding pad at the center of the circular portion, i.e., circular bonding pad-1 502. The other terminal of the diode is available for connection at a bonding pad at the ring of the circular portion, i.e., ring bonding pad-2 504.

[0037] In alternative embodiments, the circular diode has a junction diode or a metal-insulator-semiconductor (MIS) diode structure. This can be achieved by adjusting the doping profile and / or the insulator / electrode location. FIG. 5B is a cross-sectional view of an unpackaged circular diode. There are two circular diode embodiments, a junction diode 508 and a MIS (metal-insulator-semiconductor) diode 510, each of which is a die without a package. In the junction diode 508, a central circular n-terminal is connected to a bond pad-1 502, and a ring-shaped outer p-terminal surrounding the circular n-terminal is connected to a ring-shaped bond pad-2 504. In the MIS diode 510, the central terminal has an oxide 512 and a bond pad-1 502, and the outer terminal is connected to a bond pad-2 504. In one embodiment, the oxide 512 of the MIS diode 510 is thin enough for quantum mechanical tunneling to occur from the metal to the semiconductor across the insulator.

[0038] Other types of diode structures can also be tailored to build package-free circular diodes.

[0039] Alternatively, a circular diode component can be constructed using a circular package and a conventional diode die. The conventional die can be attached to the circular package with solder paste aligned to the central bond pad (bond pad 1) and wire bonding from the other electrode to the outer bond pad. FIG. 5C is a cross-sectional view of a circular diode package. The circular component has a circular package pad. A packaged diode 518 has a diode die 520, which in this embodiment is rectangular, inside the package. One or more bond wires 522 connect electrode 2 514 of the diode die 520 to ring-shaped bond pad-2 504 of the package for one terminal of the diode die 520. Solder 524 or other electrical connection material connects electrode 1 516 of the diode die 520 to central circular bond pad 1 502 of the package for the other terminal of the diode die 520.

[0040] In one embodiment, the metasurface has unit cells that do not have a uniform diode orientation. For example, the orientation of the unit cells varies with position on the metasurface. This has a large impact on the cost of the diodes and their movement. To realize this concept, in one embodiment, the arrangement of the unit cells must be on a rectangular lattice, while the rotation can be arbitrary. With the proposed rotation-independent unit cell design and uniform diode orientation, the entire antenna surface (aperture) can be built by mass transfer techniques using the die as a reticle to populate the larger surface. In this case, the antenna aperture is fabricated from a small wafer that is all the same reprint. Figures 6 and 7 show two embodiments of populating a large antenna surface with diodes from a semiconductor wafer in a circle or a rectangle shape, respectively, but the wafer is a reprint of the same wafer design. It should be noted that arranging antenna elements on a ring or a spiral is generally inefficient, but can be done in further embodiments.

[0041] In most mass transfer techniques, the size of the tooling head (or stamp) that transfers the diodes from the wafer to the target substrate is relatively small compared to the size of the target substrate, e.g., antenna aperture. FIG. 6 is a top view of the implementation of a large circular antenna aperture 604 by a hexagonal transfer tool or stamp with a smaller size. During each transfer step, one hexagonal area is implemented on the target substrate. The hexagonal tool or hexagonal shaped tooling head can pick up and place each of the array of diodes 606 with uniform orientation on the semiconductor wafer die 608. The shape of the transfer tool head, hexagonal in this example, is independent of the shape of the wafer and also independent of the shape of the apertures 602, 604. The hexagonal array in FIG. 6 is a possible pattern of diode transfer mapped onto possible rectangular and circular (or other shaped) apertures. Thus, the circular aperture 604 has an array of iris openings, each of which is tunable via a respective diode 606 of a respective unit cell. The large aperture can be other shapes in further embodiments. One embodiment has a rectangular aperture 602 that is created using several hexagonal transfer tool(s). In various embodiments, a single transfer tool can be used to transfer each diode 606 or pair of diodes 606 (or other tunable capacitance devices) for placement, for example, in a serial pick-and-place operation, or multiple transfer tools can be used for parallel transfer.

[0042] 7 is a top view showing the implementation of a large rectangular antenna aperture 702 with a rectangular moving tool (stamp). The rectangular shaped moving tool can implement a small rectangular area 704 for each moving step. The diodes on the wafer 704 and on the target substrate 706 can have a uniform orientation. The large aperture can be of other shapes in further embodiments.

[0043] Additionally, the segmentation of the antenna aperture shown can be used to simplify rotation of the diodes and reduce issues with their placement. In one embodiment, instead of covering a rotation range of 0 to 180 degrees, the unit cell only needs to cover a rotation range of 0 to 90 degrees, and the segmentation does the rest by rotating the segments. This simplifies the proposed rotation-independent unit cell design.

[0044] FIG. 8A illustrates the use of segmentation to simplify cell rotation and diode placement. In this embodiment, a circular antenna aperture 802 has four segments 804, each occupying a quarter of a circle (or a quadrant of a disk). In one embodiment, the four segments 804 are not physically separate segments, but in other embodiments they may be. Each segment 804 has diodes 806 aligned in parallel across the segment 804, with each diode 806 being a unit cell. The four segments 804 are arranged in the circular aperture 802 with rotation angles of 0 degrees, 90 degrees, 180 degrees, and 270 degrees. In this way, the rotation of the unit cell does not need to cover the range from 0 degrees to 180 degrees, but only the range from 0 degrees to 90 degrees.

[0045] The rotation of the diodes can be further discretized to simplify the design process. Figure 8B shows a quadrant of the full circle of Figure 8A where the orientation of the diodes has been further discretized into three sections. The orientation of the diodes in each of the illustrated 30 degree sections is uniform, but the orientation changes from one area to the next. With this concept, instead of covering 90 degrees of rotation of the cell, the design only needs to cover 30 degrees. Discretization of other angles may also be possible.

[0046] Figure 8C shows how the design from Figure 8B can be implemented using small rectangular stamps. In each of the 30 degree sections, the orientation of the diodes is uniform, allowing for fast movement of the diodes during fabrication. Along the boundary between two adjacent sections, the orientation of the diodes can be any direction.

[0047] (Bias circuit) To tune a varactor diode, a tuning voltage must be applied between the two sides of the diode. The embodiments shown in Figures 1A, 1B, 2, 3A, 3B, and 3C include examples of bias traces that can be used. In one embodiment, the bias electrodes are arranged and / or positioned so as not to interfere with or couple with the RF signal generated by the antenna element. Therefore, the bias circuit is a determining factor for the selection of the unit cell design concept. Figures 9A and 9B show two different embodiments in which the bias electrodes do not interfere with the RF signal. The embodiments differ in that the bias circuit can use conductive or resistive bias.

[0048] FIG. 9A shows two symmetrical diodes 102 with a conductive bias electrode 902 (also called a conductive bias line) directly connected to the patch electrode 104. Similar to the unit cells of FIGS. 2 and 3B, this unit cell has two diodes 102 end-to-end or back-to-back, spanning the iris aperture 112. In this design, each diode 102 has a respective through via 106 connected to one terminal, and the two diodes 102 have a common terminal connected to a patch electrode 104 located in the center of the iris aperture 112. The conductive bias line (electrode) 902 connects to the patch electrode 104 and extends along the centerline of the iris aperture 112 beyond one end of the iris aperture 112. That is, the conductive bias electrode 902 is directly connected to the patch electrode 104 across the center of the iris aperture 112, such that the diodes 102, the through via 106, and the iris aperture 112 are symmetrical about the conductive bias electrode 902. Due to the symmetry of the conductive bias line 902 and the location of the patch-bias line connections, the conductive bias line 902 does not interfere with the RF signal.

[0049] One way to decouple the bias line from the patch electrode while maintaining a DC connection is to use a resistive bias line and / or a discrete resistor. FIG. 9B shows a single diode 102 with a conductive bias line directly connected to the patch electrode using a resistive bias line 904 (also called a resistive bias electrode). Similar to the unit cells of FIG. 1B and FIG. 3C, this unit cell has one diode 102 across one iris opening 112. Here, one terminal of the diode 102 is connected to a through via 106 and the other terminal of the diode 102 is connected to the patch electrode 104. The resistive bias line 904 is connected to the patch electrode 104, with the connection offset to the side of the iris opening 112. The resistive bias line 904 has an added resistance caused by a square meandering line in one embodiment. Other shapes can be used to increase the overall length of the line and thus increase the resistance beyond that of a straight bias line. Connecting the conductive resistive bias line 904 directly without the added resistance would have a significant effect on the RF signal, which is avoided with the added resistance. A variety of different materials can be used to create the resistive bias lines, such as indium tin oxide (ITO), chromium, titanium, indium gallium oxide (IGZO), indium zinc oxide (IZO), and organic conductors, to name a few. The materials and design of these bias lines will be selected based on the resistance value required.

[0050] (Integration and Topology) The embodiments shown in Figures 1A, 1B, and 2 can be manufactured using double-sided processing of the substrate. In one embodiment, the layers required for the driving circuitry (in this case the thin film transistor (TFT) matrix) are first deposited on the top (or one) side of the substrate where the patch electrodes are present. Then, etching and metal deposition steps create through-vias to electrically connect the two sides of the substrate. Finally, the iris layer, i.e. the metal layer used to form the iris opening, will be deposited and patterned on the opposite (or second) side of the substrate. Then, individual elements, e.g. diodes, can be assembled and / or otherwise attached to the substrate to complete the fabrication. Figure 10 shows an example of a flow diagram illustrating one embodiment of such a fabrication method of an embodiment for a metasurface antenna.

[0051] 10, thin film transistors are deposited in operation 1002. For example, thin film transistors are deposited on a substrate using various semiconductor processing steps and materials.

[0052] Next, in action 1004, a through via is created. In one embodiment, various well-known semiconductor processing steps and materials are used to form an aperture for the via, and metal is deposited in the opening to form the connection; that is, for the avoidance of ambiguity, the term "via" can be used to describe an opening or a metal connection through an opening.

[0053] In operation 1006, an iris layer is deposited. In one embodiment, using various well-known semiconductor processing steps and materials, the iris layer is formed by depositing a metal layer and etching the metal layer to define the iris opening and further geometric features in various embodiments. For example, electrodes can be formed in the iris layer.

[0054] In operation 1008, the individual elements are fabricated, for example, diodes are fabricated on a substrate and each diode is positioned within a unit cell having an iris opening.

[0055] Alternatively, all patterning and assembly can be performed on one side of the substrate. In this method, the individual tunable elements are assembled on the same side of the substrate where the TFT matrix is ​​patterned, or the iris features of the RF elements are fabricated on the same side of the substrate where the TFT matrix is ​​present. This method allows the fabrication of RF antennas on a single substrate without double-sided processing of the substrate and / or through-via connections. This method uses the metal layer required for patterning the iris metal as the electrical connection between the individual tunable elements and the TFT matrix. In this disclosure, this is referred to as the "iris interconnect." Top and cross-sectional views of the connections are shown in Figures 11 and 12.

[0056] Figure 11 is a top view of one embodiment of an antenna element including a diode-TFT array-iris connection. Such an antenna element can be part of a tunable slot antenna. This embodiment is substantially similar to the embodiment of Figure 9A, in which all elements are on one side of a substrate (monolithic), in contrast to Figures 1A and 1B.

[0057] 11, the iris metal 1114 is etched (i.e., removed in places) to form the iris opening 1104, and the iris metal 1106 (e.g., a portion of the metal layer used as the iris metal 1114) remains in the center of the iris opening 1104 as, for example, the patch electrode 104 (see FIGS. 2 and 9A). Two individual tunable elements 1108 and 1110 (e.g., varactors (e.g., varactor diodes), diodes 102) are arranged end-to-end or back-to-back across the iris opening 1104, each having one terminal connected to the iris metal 1106 (e.g., patch electrode 104) and a respective bonding pad 1112, which is used to supply a tuning voltage to the antenna element. The remaining bonding pads 1112 of the individual tunable elements 1110 are outside the iris opening 1104 for connection to the iris metal 1114 (connections not shown). The iris metal 1106 has a connection 1102 to a transistor, such as a conductive bias electrode 902 (also called a conductive bias line, see FIG. 9A), which connects to a TFT or other transistor (not shown) that is circuitry for controlling the tunable elements 1108, 1110.

[0058] FIG. 12 is a cross-sectional view of the diode-TFT array-iris connection of FIG. 11 along line AB. In one embodiment, fabrication begins with creating a TFT matrix on a glass substrate 1210. By way of example, any one of a variety of TFT fabrication techniques can be utilized. The layers used to fabricate the TFT matrix typically include multiple metal layers for electrical connections and multiple dielectric layers for passivation. In this method, fabrication of the TFT array ends with a passivation layer 1212 covering the TFT matrix. In this passivation layer 1212, apertures have been created that match the iris interconnect areas, and the individual tunable elements 1206 (see also individual tunable elements 1108 and 1110 in FIG. 11) will later be connected to the TFT matrix. Additionally, metal traces 1216 that align with the apertures and iris interconnects in the passivation layer 1212 are patterned to make the connection to the TFT matrix. This connection can use one of the metal layers in the TFT matrix fabrication (eg gate metal, source metal).

[0059] In one embodiment, the iris metal 1204 layer is a few micrometers thick and is deposited on the glass substrate 1210 using, for example, sputtering, electroplating, or e-beam evaporation, or other processes that can be devised. This metal layer is later etched to create the iris openings 112, 402 (see, for example, Figures 1A-4, 9A and 9B), where all metal in the iris opening area is removed. By way of example, the iris metal is deposited on the glass substrate 1210 on which the TFT matrix has already been patterned. Additionally, a portion of the iris metal layer, commonly referred to as the iris interconnect, is retained for electrical connection between the individual tunable elements 1206 and the TFT matrix. The iris metal 1204 and the iris interconnect are protected by the iris passivation layer 1202, which is a dielectric layer (e.g., SiNx).

[0060] Furthermore, openings are formed in the iris passivation layer for connecting the individual tunable elements 1206 to the iris metal 1204 and iris interconnect via respective element bond pads 1208. This connection of the individual tunable element(s) 1206 to the bonding or bond pads 1208 can be made using solder 1214. Alternatively, such connections between the tunable element bond pads and the iris metal in this and other disclosed embodiments can be made using conductive paste, conductive polymer, conductive epoxy, silver epoxy, etc. instead of solder. Individual components can be assembled to the substrate using a variety of methods, including, but not limited to, pick and place, self-assembly, etc.

[0061] The individual tunable elements 1108, 1110, and 1206 are shown in FIGS. 11 and 12 as rectangular in shape. However, one skilled in the art will appreciate that aspects of the present application are not limited to rectangular individual elements. They can have different shapes, such as, for example, circular, triangular, etc. The bonding pads on the individual tunable elements 1108, 1110, and 1206 can also be on different surfaces. For example, a bonding pad can be on the top surface and another bonding pad can be on the bottom surface. The bonding pads may cover a portion of the surface or the entire surface. In this case, the first electrical connection is made using a conductive paste or solder as in the methods described above, and the second electrical connection is achieved by deposition of an additional metal layer to connect the top electrode to the iris.

[0062] (Scalability) Discrete tunable capacitors are used as components to be assembled into the metamaterial antenna. These can be varactor diodes, various semiconductor diodes (PIN diodes, MOSFETs, BJTs, HEMTs, etc.), or MEMS structures. In one embodiment, the assembly site, i.e. the final location of the components, is a glass substrate 1210 (e.g., as shown in FIG. 12) that is already patterned for a TFT drive matrix to apply the desired voltages to the assembled components to control the antenna elements (e.g., to turn them completely or partially off (e.g., disable) and on (e.g., enable) the antenna elements). Other substrates may be used in further embodiments.

[0063] According to aspects of the present application, in one embodiment, the self-assembly process is directed to assembling components at a designed location with a pre-determined orientation. The self-assembly process can include, but is not limited to, using an assembly template (stencil) with designed gaps that match the shape of the parts, using a vapor or air-water interface, as well as designing hydrophobic and hydrophilic regions on the parts and assembly sites to control assembly position and orientation with surface tension, and designing the parts to be magnetizable to control assembly position and orientation with a magnetic field. The above-mentioned methods can be used alone or in combination in various embodiments to assemble individual tuning elements at designed positions on a glass substrate with unique orientations. In some embodiments of the assembly method, the individual tunable elements are in a liquid, gas, or vacuum environment, and agitation is applied before or during application of a magnetic field in the self-assembly process.

[0064] FIG. 13 is a cross-sectional view of an assembly site with an assembly template 1302. According to an exemplary embodiment, one assembly method can combine shape matching and the use of magnetic fields during the assembly process. In one such method, the assembly template 1302 is used to fix the components while they are placed in the desired assembly location called the assembly site 1304. The assembly template 1302 is thus an intermediate with designed gaps that are aligned with the assembly site 1304 before the components (e.g., individual tunable elements 1206) are distributed for the self-assembly process. In one embodiment, the openings in the assembly template 1302 are designed to match the shape of the components (e.g., individual tunable elements 1206) with some tolerance (see FIGS. 12, 13, and 14). In one example, rectangular components (see individual tunable elements 1502 in FIG. 15A and individual tunable elements 1506 in FIG. 15B) are used and placed on the assembly site 1304. However, other shapes are also available. This rectangular component has multiple axes of symmetry and can be assembled into a site in four different orientations in some embodiments. This symmetry is removed in some embodiments by depositing a ferromagnetic material (e.g., Ni or other similar metal / material) onto one of the component's bond pads. A magnet is placed beneath the assembly site to attract one or more of the individual tunable elements, or portions thereof (e.g., one end of the element), into the assembly site in unique orientations. In this case, magnetic forces are employed to achieve these orientations.

[0065] It is noted that in one embodiment, the assembly template 1302 remains after assembly and does not affect the RF operation of the antenna (see FIGS. 13-16). In one embodiment, the iris metal can form both the iris opening and the assembly template 1302 (see FIGS. 17 and 18), both of which remain after assembly. Alternatively, all or part of the assembly template 1302 is removed after placement of the individual tunable elements. For example, the assembly template 1302 is formed as a removable structure (see FIGS. 13-16, where the assembly template 1302 can be removed by processing subsequent to FIG. 16).

[0066] Figure 14 is a top view of the assembly template 1302 on the glass substrate 1210 (see Figure 13) prior to assembly. The assembly template 1302 is aligned to the glass substrate 1210, for example by various techniques in device processing, such that the assembly template 1302 is aligned with the iris features 1406 on the glass substrate 1210. The openings 1404 in the assembly template 1302 align with the iris features 1406 and also align with areas 1402 not covered by the iris passivation layer 1202 (see Figure 13) on the glass substrate 1210 for purposes of electrical connection to the individual tunable elements. In Figure 13, such areas 1402 are filled with solder 1214, and the individual tunable elements align with the openings 1404 in the assembly template 1302 (see Figure 14) and will make the solder connections (see Figures 13 and 16).

[0067] 15A is a cross-sectional view of components being assembled in one embodiment of the self-assembly process, where individual tunable elements 1502 have ferromagnetic bond pads 1504 wrapped around three faces on opposing ends of a rectangular component, such as a varactor or diode. Magnetic forces are used to attract the ferromagnetic bond pads 1504, and thus the individual tunable elements 1502, into place in one embodiment of the self-assembly process. Each bond pad 1504 covers an end face and portions of two sides at that end of the component, or an end face and portions of four sides as a cap at that end of the component, in various embodiments.

[0068] Instead of or in addition to magnetic forces, shape matching can also be used in the self-assembly process. In shape matching, the parts are designed with asymmetric shapes and the assembly template is designed with asymmetric openings so that the parts fit into the assembly site with a unique orientation. In another embodiment, the assembly process uses hydrophilic and / or hydrophobic surfaces to determine the assembly location. Generally, in various embodiments, a combination of these methods can be used. For example, hydrophilic and / or hydrophobic surfaces are used to determine the assembly location and magnetic forces are used to determine the orientation of the parts. Agitation can be applied in various forms of the self-assembly process. Agitation acts as a disintegration force to remove parts that are in the assembly site but are misoriented.

[0069] 15B is a perspective view of the assembled parts in a further embodiment of the self-assembly process, in which individual tunable elements 1506 have ferromagnetic bond pads 1504 on one surface at opposite ends of a rectangular component (e.g., a varactor or diode).

[0070] 16 shows the parts assembled in a desired orientation using ferromagnetic pads and magnets 1606. The magnets 1606 can be electromagnets or permanent magnets, or two or more of these, in various combinations and arrangements in various embodiments. The magnets 1606 attract the ferromagnetic bonding pads 1604 of the individual tunable elements 1608 in a self-assembly process, and the individual tunable elements 1608 move into position within the apertures of the assembly template 1302 and align with the solder 1214 for connection to the iris metal 1204. An appropriate heating process can be applied to melt the solder 1214 and form the electrical connection to the individual tunable elements 1608.

[0071] An assembly template 1302 is placed on top of the glass substrate 1210 before starting the assembly. The assembly template 1302 is aligned with the alignment marks so that each gap in the template is aligned with the assembly site 1304 (see FIG. 13). As shown in FIG. 16, a magnet 1606 is placed directly under each iris opening to generate a magnetic field that exerts a force on the ferromagnetic parts (see FIGS. 15A and 15B) used in this example. The parts are then distributed on the template and vibration is applied to the system. The amplitude, frequency and direction of the vibration can be adjusted to achieve the most efficient assembly. It has also been shown in the literature that the direction of vibration can be changed during assembly to prevent parts from clumping together. A camera-based feedback loop can be used to adjust the vibration parameters. Once the target assembly amount is achieved, the vibration will be removed from the system. To speed up the assembly, more parts can be distributed in the first stage than the assembly sites.

[0072] After the components are transferred to the assembly site in the correct orientation, the magnets 1606 are removed. The glass substrate 1210 and assembly template 1302 are heated to reflow the solder 1214 and make electrical connections between the individual tunable elements 1608 and the appropriate metal on the glass substrate 1210. In this example, the solder 1214 is pre-patterned on the glass substrate prior to assembly. Alternatively, the solder 1214 can be pre-patterned on the components prior to assembly. Also, other conductive materials (such as thermal or UV responsive solder paste, nanoparticles, ACF bond, etc.) can be used instead of solder for the electrical connections. Once the electrical connections are made, the assembly template 1302 can be removed and the substrate is ready for the next step in the manufacturing process.

[0073] Alternatively, the iris metal opening can be used as part of the assembly template. In this method, the thickness of the part is limited by the thickness of the iris metal. This limitation necessitates the use of a diode die without a package. Examples of assembled diode dies are shown in Figures 17 and 18. In Figure 17, a double-sided diode die 1702 with electrodes on both sides is assembled into the iris slot, and electrical connections are made to the iris metal 1204 using a post-assembly metal deposition and patterning step. In Figure 18, a single-sided diode die 1802 with electrodes on the same side is assembled into the iris slot. Prior to the iris metal deposition, a second connection is patterned in the iris opening area with a via 1708. This connection is used to connect the diode to the iris metal 1204 after the diode is assembled.

[0074] 17 shows a part including a double-sided diode die 1702 assembled using an iris opening as part of the assembly template. One side and respective terminals of each of the double-sided diode dies 1702 are electrically connected to vias 1708 using solder 1706 for connection to a TFT matrix or other circuitry. The opposing side and respective terminals of each of the double-sided diode dies 1702 have connections 1704 to the iris metal 1204, which may be formed by a metal layer. The asymmetry distinguishes between the top and bottom of the diode die 1702. Note that in one embodiment, the unit cell (slot) has a rotational degree of freedom relative to a fixed diode orientation, but still connects the diode to the iris metal 1204.

[0075] 18 shows a part including single-sided diode dies 1802 assembled using an iris aperture as part of the assembly template. The two terminals of each single-sided diode die 1802 are suitably connected using solder. Here, two adjacent terminals of two adjacent single-sided diode dies 1802, i.e., one terminal from one diode and an adjacent terminal from the other diode, are connected to each other and to vias 1708 using solder 1706. Two opposing terminals of the two single-sided diode dies 1802, i.e., the other terminal from one diode and the other terminal from the other diode, are connected to the respective iris metal 1204 using solder 1806.

[0076] (Examples of Antenna Embodiments) The techniques described above can be used with planar satellite antennas. Embodiments of such planar antennas are disclosed. The planar antenna includes one or more arrays of antenna elements on an antenna aperture. In one embodiment, the antenna aperture is a metasurface antenna aperture, such as the antenna apertures described below. In one embodiment, the antenna elements comprise diodes and varactors as described above. In one embodiment, the planar antenna is a cylindrically fed antenna including a matrix drive circuit that uniquely addresses and drives each of the antenna elements that are not arranged in rows and columns. In one embodiment, the elements are arranged in a ring.

[0077] In one embodiment, an antenna aperture having one or more arrays of antenna elements is comprised of a plurality of segments coupled together. When coupled together, the combination of segments forms closed concentric rings of antenna elements. In one embodiment, the concentric rings are concentric about the antenna feed.

[0078] (Antenna system example) In one embodiment, the planar antenna is part of a metamaterial antenna system or an antenna having a metasurface as described herein. An embodiment of a metamaterial antenna system for a communications satellite ground station is described. In one embodiment, the antenna system is a component or subsystem of a satellite ground station (ES) operating on a mobile platform (e.g., air, sea, land, etc.) that operates using either Ka-band or Ku-band frequencies for civil commercial satellite communications. It should be noted that embodiments of the antenna system can also be used in ground stations that are not on a mobile platform (e.g., fixed or transportable ground stations).

[0079] In one embodiment, the antenna system uses surface scattering metamaterial technology (e.g., antenna elements) to form and steer transmit and receive beams via separate antennas. In one embodiment, the antenna system is an analog system, as opposed to antenna systems that utilize digital signal processing to electrically form and steer beams (such as phased array antennas).

[0080] In one embodiment, the antenna system is comprised of three functional subsystems: (1) a waveguiding structure based on a cylindrical wave feed architecture; (2) an array of wave scattering metamaterial unit cells that are part of the antenna elements; and (3) a control structure that uses holographic principles to command the formation of a tunable radiation field (beam) from the metamaterial scattering elements.

[0081] (Antenna Elements) Figure 19A is a top view of another embodiment of an antenna element including a diode-TFT array-iris connection. Such an antenna element can be part of a tunable slot antenna. This embodiment is similar to the embodiment of Figures 9B and 11 in that all elements are on one side of a substrate (monolithic), in contrast to the embodiment of Figures 1A and 1B.

[0082] 19A, the iris metal 1914 is etched (i.e., removed in places) to form the iris opening 1904. One individual tunable element 1908 (e.g., varactor, varactor diode, diode 102) is placed across the iris opening 1904 with one terminal and a respective bonding pad 1912 connected to a patch 1906 (e.g., patch electrode 104) that is outside the iris opening 1904 and used to provide a tuning voltage for the antenna element. In one embodiment, the patch 1906 is formed on a separate metal layer from the iris metal layer. The remaining bonding pads 1912 of the individual tunable element 1908 are outside the iris opening 1904 for connection to the iris metal via pads 1909. In one embodiment, the pads 1909 are formed on the same metal layer as the patch 1906. Pad 1909 is connected to the iris metal with a through via 1916 (FIG. 19B) at connection point 1930. The iris metal has a connection 1902 to a transistor / drive circuit, such as a conductive bias electrode 902 (also called a conductive bias line, see FIG. 9A), which connects to a TFT or other transistor (not shown), which is the circuitry for controlling the tunable element 1908.

[0083] FIG. 19B is a cross-sectional view of the diode-TFT array-iris connection of FIG. 19A along line AB. In one embodiment, the fabrication of the antenna element of FIG. 19A and 19B is performed similarly to the fabrication of the antenna element of FIG. 11 and 12, except for the design differences. That is, the fabrication starts with the creation of a TFT matrix on a glass substrate 1910. By way of example, any of a variety of TFT fabrication techniques can be used. The layers used in the fabrication of the TFT matrix typically include multiple metal layers for electrical connections and multiple dielectric layers for passivation. In this method, the fabrication of the TFT array ends with a passivation layer 1941 that covers the TFT matrix. In the passivation layer 1941, apertures are created that correspond to the via structures that connect the TFT array to the patch 1906 and the connection 1902 (see FIG. 19A). The connection 1902 and the patch 1906 are formed on a metal layer that is separate from the iris metal layer, which can be called the patch metal layer. In the iris metal layer, openings separate from the iris apertures are created at the via locations of the TFT array and patch metal. This via structure is not shown in Figures 19A and 19B. The metal traces connecting each TFT to the driver IC, i.e., the Row and Column traces of the TFT matrix, can be fabricated under the iris metal using a metal layer for the TFT matrix, or on top of the iris metal using an additional metal layer.

[0084] In one embodiment, the iris metal layer (i.e., the metal layer in which the iris opening 1904 is formed) is a few micrometers thick and is deposited on the glass substrate 1910 using sputtering, electroplating, or electron beam evaporation. This metal layer is later etched to create the iris openings 112, 402, 1904 (see, e.g., Figures 1A-4, 9A and 9B), where all metal in the iris opening area is removed. By way of example, the iris metal is deposited on the glass substrate 1910 on which the TFT matrix has already been patterned. The iris metal layer in which the iris opening 1904 is formed is protected by the iris passivation layer 1931, which is a dielectric layer (e.g., SiNx). In a further embodiment, the TFT matrix (e.g., a circuit with thin film transistors) is deposited on top of the iris metal, e.g., on top of the iris passivation layer 1931.

[0085] Furthermore, openings are formed in the iris passivation layer to connect pads (e.g., pad 1909) on the patch metal layer to the iris metal. Additional openings, including vias 1916, are created in the passivation layer overlying the patch metal layer (1931) to connect the patches 1906 and pads 1909 to the individual tunable elements 1908 through their respective element bond pads 1912. This connection to the bond pads or bond pads 1912 of the individual tunable elements 1908 can be made using solder 1934. Alternatively, such connections between the bond pads of the tunable elements and the iris metal in this and other disclosed embodiments can be made using conductive pastes, polymers, conductive epoxies, silver epoxies, etc. instead of solder. Individual components can be assembled to the substrate using a variety of methods, including, but not limited to, pick and place, self-assembly, etc.

[0086] The individual tunable elements 1908 are shown in FIGS. 19A and 19B as rectangular in shape. However, one skilled in the art will appreciate that aspects of the present application are not limited to rectangular individual elements. They can have different shapes, such as circular, triangular, etc. The bonding pads on the individual tunable elements 1908 can also be on different surfaces. For example, a bonding pad can be on the top surface and another bonding pad can be on the bottom surface. The bonding pads can cover a portion of the surface or the entire surface. In this case, the first electrical connection is made using a conductive paste or solder as in the methods described above, and the second electrical connection is achieved by deposition of an additional metal layer to connect the top electrode to the iris.

[0087] 20A and 20B show the electronic circuit equivalent or representation of a tunable iris aperture unit cell for a metasurface or metamaterial antenna. FIG. 20A is a circuit representing the iris aperture 112 and diode 102 in the embodiment depicted in FIGS. 2 and 9A. The inductance of the iris aperture 112 is L Iris The circuit is represented by four inductors 2002, 2004, 2006, and 2008, each of which is a varactor and has a C Varactor Two variable capacitors 2010, labeled as , represent diodes 102 and are in series with each other. The series combination of variable capacitors 2010 is in parallel with the inductors of the two branches, iris inductor 2002 is in series with iris inductor 2006 and iris inductor 2004 is in series with iris inductor 2008. The tunable capacitance of the varactor or variable capacitor 2010 is controlled by a DC voltage source 2012 and can be made time variable to update the resonant state of the unit cell and control the properties of the metasurface or metamaterial for the operation of the antenna.

[0088] FIG. 20B is a circuit diagram illustrating the iris opening 112 and the diode 102 in the embodiment depicted in FIGS. 1B and 9B. The inductance of the iris opening 112 is LIris The inductor is represented by four inductors 2002, 2004, 2006, and 2008, labeled C. Varactor One variable capacitor 210, a varactor labeled C, represents the diode 102, Patch 20. The varactor or tunable capacitance of variable capacitor 2010 is controlled by DC voltage source 2012 and can be made time variable to update the resonant state of the unit cell and control the properties of the metasurface or metamaterial for the operation of the antenna.

[0089] FIG. 21 is a schematic diagram of one embodiment of a cylindrically fed holographic radial aperture antenna. Referring to FIG. 21, the antenna aperture has one or more arrays 2101 of antenna elements 2103 arranged in concentric rings around the input feed 2102 of the cylindrically fed antenna. In one embodiment, the antenna elements 2103 are radio frequency (RF) resonators that radiate RF energy. In one embodiment, the antenna elements 2103 include both Rx and Tx irises that are interleaved and distributed across the surface of the antenna aperture. Such Rx and Tx irises or slots can be grouped in sets of three or four or more, each set for a band that is controlled separately and simultaneously. Examples of such antenna elements with irises are described in more detail below. It is noted that the RF resonators described herein can be used in antennas that do not include a cylindrical feed.

[0090] In one embodiment, the antenna includes a coaxial feed that is used to provide a cylindrical wave feed via the input feed 2102. In one embodiment, the cylindrical wave feed architecture feeds the antenna from a central point with excitation that radiates cylindrically outward from the feed point. That is, the cylindrical feed antenna generates a concentric feed wave that travels outward. Nevertheless, the shape of the cylindrical feed antenna around the cylindrical feed can be circular, square, or any shape. In another embodiment, the cylindrical feed antenna generates a feed wave that travels inward. In such a case, the feed wave most likely originates from a circular structure.

[0091] In one embodiment, the antenna element 2103 comprises an iris (iris aperture) and the aperture antenna of Figure 21 is used to generate a shaped main beam by using excitation from a cylindrical feed to radiate the iris aperture via a tunable diode and / or varactor. In one embodiment, the antenna can be excited to radiate a horizontally or vertically polarized electric field at a desired scan angle.

[0092] In one embodiment, each scattering element of the antenna system is part of a unit cell as described above. In one embodiment, the unit cell is driven by the direct drive embodiment described above. In one embodiment, the diode / varactor in each unit cell has a top conductor associated with its patch electrode (e.g., iris metal) to a bottom conductor associated with the slot. The diode / varactor can be controlled to adjust the bias voltage between the iris aperture and the patch electrode. Taking advantage of this property, in one embodiment, the diode / varactor integrates an on / off switch for energy transfer from a guided wave to the unit cell. When switched on, the unit emits electromagnetic waves like an electrically small dipole antenna. It should be noted that the teachings herein are not limited to having a unit cell that operates binary with respect to energy transfer.

[0093] In one embodiment, the feed geometry of this antenna system allows the antenna elements to be positioned at a forty-five degree (45°) angle relative to the wave vector in the wave feed. However, other positions may be used (e.g., a 40° angle). This positioning of the elements allows for control of the free space waves received by the elements or transmitted / radiated from the elements. In one embodiment, the antenna elements are positioned with an inter-element spacing that is less than the free space wavelength of the antenna's operating frequency. For example, with four scattering elements per wavelength, the elements of a 30 GHz transmit antenna would be approximately 2.5 mm (i.e., 1 / 4 of a 10 mm free space wavelength at 30 GHz).

[0094] In one embodiment, the two sets of elements are orthogonal to each other and simultaneously have equal amplitude excitation when controlled to the same tuned state. Rotating the elements ±45 degrees relative to the feed excitation achieves both desirable features at once. Rotating one set 0 degrees and the other 90 degrees achieves the orthogonal goal but not the goal of equal amplitude excitation. Note that 0 degrees and 90 degrees can be used to achieve isolation when feeding a unitary array of antenna elements from two sides.

[0095] The amount of radiated power from each unit cell is controlled by applying a voltage to the patch electrodes using a controller. Traces to each patch electrode are used to supply a voltage to the patch electrodes. This voltage is used to tune or detune the capacitance and therefore the resonant frequency of the individual elements to perform the beamforming. The voltage required varies depending on the diode / varactor used.

[0096] In one embodiment, as described above, a matrix drive is used to apply voltages to the patch electrodes and drive each cell separately from all other cells, without having a separate connection (direct drive) to each cell. Because of the high density of elements, matrix drive is an efficient way to address each cell individually.

[0097] In one embodiment, the control structure for the antenna system has two main components: an antenna array controller including drive electronics for the antenna system that underlies the wave scattering structure of the surface scattering antenna elements as described herein, while a matrix drive switching array is interspersed throughout the radiating RF array in a manner that does not interfere with the radiation. In one embodiment, the drive electronics for the antenna system comprises a consumer LCD control for use in a commercial television set that adjusts the bias voltage for each scattering element by adjusting the amplitude or duty cycle of the AC bias signal to that element.

[0098] In one embodiment, the antenna array controller also includes a microprocessor that executes the software. The control structure may also incorporate sensors (e.g., GPS receiver, 3-axis compass, 3-axis accelerometer, 3-axis gyro, 3-axis magnetometer, etc.) to provide position and orientation information to the processor. The position and orientation information may be provided to the processor by other systems in the ground station and / or may be part of the antenna system.

[0099] More specifically, the antenna array controller controls which elements are turned off and on, and at what phase and amplitude levels at the operating frequency. The elements are selectively detuned at operating frequencies by application of voltages.

[0100] For transmission, the controller supplies an array of voltage signals to the RF patches to generate a modulation or control pattern. The control pattern tunes the elements to different states. In one embodiment, multi-state control is used where different elements are turned on and off to different levels to more closely approximate a sinusoidal control pattern as opposed to a square wave (i.e., a sinusoidal gray shade modulation pattern). In one embodiment, rather than some elements radiating and others not radiating, some elements radiate more strongly than others. Variable emission is achieved by applying specific voltage levels that adjust the dielectric constant of the liquid crystal by different amounts, thereby variably detuning the elements and causing some elements to radiate more strongly than others.

[0101] The generation of focused beams by an array of metamaterial elements can be explained by the phenomena of constructive and destructive interference. Individual electromagnetic waves will add together if they have the same phase when they meet in free space (constructive interference) and will cancel each other out if they have opposite phase when they meet in free space (destructive interference). If the slots in a slotted antenna are positioned such that each successive slot is positioned at a different distance from the excitation point of the guided wave, the scattered wave from that element will have a different phase than the scattered wave of the previous slot. If the slots are spaced a quarter of a guided wavelength apart, each slot will scatter the wave with a quarter phase delay from the previous slot.

[0102] This array can be used to increase the number of constructive and destructive interference patterns that can be generated, so that, theoretically, the beam can be steered in any direction, plus or minus ninety degrees (90°), from the boresight of the antenna array using the principles of holography. Thus, by controlling which metamaterial unit cells are turned on or off (i.e., by changing the pattern of which cells are turned on and which are turned off), different patterns of constructive and destructive interference can be generated and the antenna can change the direction of the main beam. The time required to turn the unit cells on and off dictates the speed at which the beam can be switched from one position to another.

[0103] In one embodiment, the antenna system generates one steerable beam for the uplink antenna and one steerable beam for the downlink antenna. In one embodiment, the antenna system uses metamaterial technology to receive the beams, decode the signal from the satellite, and form a transmit beam that is directed to the satellite. In one embodiment, the antenna system is an analog system, as opposed to antenna systems that use digital signal processing to electrically form and steer beams (such as phased array antennas). In one embodiment, the antenna system is considered a "surface" antenna, which is planar and relatively thin, especially when compared to conventional satellite antenna receivers.

[0104] 22 shows a perspective view of a row of antenna elements, including a ground plane 2245 and a reconfigurable resonator layer 2230. The reconfigurable resonator layer 2230 includes an array 2212 of tunable slots 2210 that can be configured to point the antenna in a desired direction. Each of the tunable slots 2210 can be tuned / adjusted by changing a voltage, which changes the capacitance of the varactor diode, resulting in a frequency shift and therefore a change in the amplitude and phase of the radiating antenna element. Proper adjustment of the phase and amplitude of the antenna elements in the array allows for beam forming and beam steering.

[0105] A control module 2280 or controller is coupled to the reconfigurable resonator layer 2230 and modulates the array 2212 of tunable slots 2210 by varying the voltage to the diodes / varactors. The control module 2280 may include a field programmable gate array ("FPGA"), a microprocessor, a controller, a system on a chip (SoC), or other processing logic. In one embodiment, the control module 2280 includes logic (e.g., a multiplexer) for driving the array 2212 of tunable slots 2210. In one embodiment, the control module 2280 receives data including specifications regarding a holographic diffraction pattern to be driven onto the array 2212 of tunable slots 2210. The holographic diffraction pattern is generated in response to the spatial relationship between the antenna and the satellite, and this holographic diffraction pattern steers the downlink beam (and uplink beam, if the antenna system performs the transmission) into the appropriate direction for communication. Although not depicted in the figures, a control module similar to control module 2280 can drive each array of tunable slots described in various embodiments in this disclosure.

[0106] Radio frequency ("RF") holography can also be implemented using similar techniques that can generate a desired RF beam when an RF reference beam encounters an RF holographic diffraction pattern. In the case of satellite communications, the reference beam is in the form of a feed wave, such as feed wave 2205 (in some embodiments, around 20 GHz). To convert the feed wave into a radiation beam (either for transmission or reception purposes), an interference pattern between the desired RF beam (object beam) and the feed wave (reference beam) is calculated. The interference pattern is driven as a diffraction pattern onto the array of tunable slots 2210 such that the feed wave is "steered" into the desired RF beam (having a desired shape and direction). In other words, the feed wave encountering the holographic diffraction pattern "reconstructs" the object beam, which is formed according to the design requirements of the communications system. The holographic diffraction pattern encompasses the excitation of each element and is expressed as a wave equation in a waveguide, w in and w as a wave equation for outgoing waves out Using and, w hologram =w in *w out It is calculated by:

[0107] The voltage between the patch electrode and the iris opening can be modulated to tune the antenna element (e.g., tunable resonator / slot). Adjusting the voltage changes the capacitance of the slot (e.g., tunable resonator / slot). Thus, the reactance of the slot (e.g., tunable resonator / slot) can be changed by changing the capacitance. Also, the resonant frequency of the slot can be calculated as follows: TIFF2025013343000002.tif13150, where f is the resonant frequency of the slot, and L and C are the inductance and capacitance of the slot, respectively. The resonant frequency of the slot affects the energy radiated from the feed wave 2205 propagating through the waveguide. As an example, if the feed wave 2205 is 20 GHz, the resonant frequency of the slot 2210 can be tuned (by varying the capacitance) to 17 GHz, such that the slot 2210 substantially does not couple energy from the feed wave 2205. Alternatively, the resonant frequency of the slot 2210 may be tuned to 20 GHz, such that the slot 2210 couples energy from the feed wave 2205 and radiates this energy into free space. While the given example is binary (fully radiate or not at all), full grayscale control of the reactance, and therefore the resonant frequency of the slot 2210, is possible with voltage distribution over a multi-value range. Thus, the energy emitted from each slot 2210 can be precisely controlled, allowing detailed holographic diffraction patterns to be formed by the array of tunable slots.

[0108] In one embodiment, the tunable slots in a row are spaced apart by λ / 5. Other spacings may be used. In one embodiment, each tunable slot in a row is spaced apart by λ / 2 from the nearest tunable slot in an adjacent row, such that commonly oriented tunable slots in different rows are spaced apart by λ / 4, although other spacings are possible (e.g., λ / 5, λ / 6.3). In another embodiment, each tunable slot in a row is spaced apart by λ / 3 from the nearest tunable slot in an adjacent row.

[0109] FIG. 23 is a side view of one embodiment of a cylindrically fed antenna structure. This antenna uses a dual layer feed structure (i.e., two layers of feed structure) to generate an inward traveling wave. In one embodiment, the antenna includes a circular profile, but this is not required; that is, a non-circular inward traveling structure can be used. In one embodiment, the antenna structure in FIG. 23 includes a coaxial feed section, such as that described in U.S. Patent Publication No. 2015 / 0236412, filed November 21, 2014, entitled "Dynamic Polarization and Coupling Control from a Steerable Cylindrically Fed Holographic Antenna."

[0110] 23, a coaxial pin 2301 is used to excite the field underneath the antenna. In one embodiment, the coaxial pin 2301 is a readily available 50 Ω coaxial pin. The coaxial pin 2301 is bonded (e.g., bolted) to the bottom of the antenna structure, which is a conductive ground plane 2302.

[0111] Separate from the conductive ground plane 2302 is a gap conductor 2303 which is an internal conductor. In one embodiment, the conductive ground plane 2302 and the gap conductor 2303 are parallel to each other. In one embodiment, the distance between the ground plane 2302 and the gap conductor 2303 is 0.1 to 0.15 inches. In another embodiment, this distance may be λ / 2, where λ is the wavelength of the traveling wave at the operating frequency.

[0112] Ground plane 2302 is separated from gap conductors 2303 via spacers 2304. In one embodiment, spacers 2304 are foam or air spacers. In one embodiment, spacers 2304 include plastic spacers.

[0113] Above the gap conductor 2303 is a dielectric layer 2305. In one embodiment, the dielectric layer 2305 is plastic. The purpose of the dielectric layer 2305 is to slow down the traveling wave compared to the free space velocity. In one embodiment, the dielectric layer 2305 slows down the traveling wave by 30% with respect to free space. In one embodiment, the range of refractive index suitable for beam forming is 1.2-1.8, with free space having a refractive index equal to 1 by definition. Other dielectric spacer materials, such as plastic, may be used to achieve this effect. It should be noted that materials other than plastic may be used as long as they provide the desired wave slowing effect. Alternatively, the dielectric layer 2305 may be a material with a dispersive structure, such as a periodic sub-wavelength metallic structure that may be defined by machining or lithography.

[0114] The RF array 2306 is on top of the dielectric layer 2305. In one embodiment, the distance between the gap conductor 2303 and the RF array 2306 is 0.1 to 0.15 inches. In another embodiment, the distance is λ eff / 2, and λ eff is the effective wavelength in the medium at the design frequency.

[0115] The antenna includes sides 2307 and 2308. The sides 2307 and 2308 are angled such that the traveling wave feed from the coaxial pin 2301 propagates from the area below the gap conductor 2303 (spacer layer) to the area above the gap conductor 2303 (dielectric layer) via reflection. In one embodiment, the angle of the sides 2307 and 2308 is a 45° angle. In an alternative embodiment, the sides 2307 and 2308 can be replaced with a continuous radius to achieve reflection. Although FIG. 23 shows angled sides with a 45° angle, other angles may be used to achieve signal transmission from the lower feed to the upper feed. That is, considering that the effective wavelength of the lower feed is generally different from the upper feed, some deviation from the ideal 45° angle can be used to aid transmission from the lower feed level to the upper feed level. For example, in another embodiment, the 45° angle is replaced by a single step. The step at one end of the antenna extends around the dielectric layers, the gap conductor, and the spacer layer. The other end of these layers has two identical steps.

[0116] In operation, a feed wave is launched from the coaxial pin 2301 and travels concentrically outward from the coaxial pin 2301 in the region between the ground plane 2302 and the gap conductor 2303. The concentric outward wave is reflected by the sides 2307, 2308 and travels inward in the region between the gap conductor 2303 and the RF array 2306. Reflections from the edges of the circular perimeter ensure that the waves remain in phase (i.e., in-phase reflection). The traveling wave is slowed down by the dielectric layer 2305. At this point, the traveling wave begins to interact with and excite the elements of the RF array 2306 to obtain the desired scattering.

[0117] A termination 2309 is included in the antenna at the geometric center of the antenna to terminate the traveling wave. In one embodiment, the termination 2309 comprises a pin termination (e.g., a 50 Ω pin). In another embodiment, the termination 2309 comprises an RF absorber that terminates unused energy and prevents it from reflecting back through the feed structure of the antenna. These can be used on top of the RF array 2306.

[0118] Fig. 24 shows another embodiment of an antenna system with outward waves. Referring to Fig. 24, two ground planes 2410, 2411 are substantially parallel to each other with a dielectric layer 2412 (e.g., a plastic layer) between the ground planes 2410, 2411. An RF absorber 2419 (e.g., a resistor) couples the two ground planes 2410, 2411 together. A coaxial pin 2415 (e.g., 50 Ω) feeds the antenna. An RF array 2416 is on top of the dielectric layer 2412 and the ground plane 2411.

[0119] In operation, a feed wave is fed through the coaxial pin 2415 and travels concentrically outwards to interact with the elements of the RF array 2416 .

[0120] The cylindrical feed in both antennas of Figures 23 and 24 improves the service angle of the antenna. In one embodiment, the antenna system has a service angle of seventy-five degrees (75°) in all directions from the boresight, instead of a service angle of plus or minus forty-five degrees in azimuth (±45° Az) and plus or minus twenty-five degrees in elevation (±25° El). As with any beamforming antenna composed of many individual radiators, the overall antenna gain depends on the gain of the constituent elements, which are themselves angle dependent. When common radiating elements are used, the overall antenna gain typically decreases as the beam is pointed away from the boresight. A significant gain drop of about 6 dB is expected 75 degrees off the boresight.

[0121] Embodiments of the antenna with a cylindrical feed solve one or more problems, including: greatly simplifying the feed structure compared to antennas fed with an integrated splitter network, thus reducing the total antenna and antenna feed required; reducing sensitivity to manufacturing and control errors by maintaining high beam performance with coarser control (extending to simple binary control); providing a more favorable side lobe pattern compared to a linear feed, since a cylindrically oriented feed results in spatially diverse side lobes in the far field; and allowing the polarization to be dynamic, including allowing left-hand circular, right-hand circular and linear polarization, without the need for a polarizer.

[0122] (Array of Wave Scattering Elements) The RF array 2306 of Figure 23 and the RF array 2416 of Figure 24 comprise a wave scattering subsystem that includes a group of patch antennas (e.g., scatterers) that act as radiators. The patch antenna group comprises an array of scattering metamaterial elements.

[0123] In one embodiment, the cylindrical feed geometry of this antenna system allows the unit cell elements to be positioned at a forty-five degree (45°) angle relative to the wave vector in the wave feed. This positioning of the elements allows for control of the polarization of the free-space waves emanating from or received by the elements. In one embodiment, the unit cells are positioned with an inter-element spacing that is less than the free-space wavelength of the antenna's operating frequency. For example, with four scattering elements per wavelength, the elements of a 30 GHz transmit antenna would be approximately 2.5 mm (i.e., ¼ of a 10 mm free-space wavelength at 30 GHz).

[0124] (Cell Placement) In one embodiment, the antenna elements are arranged in a cylindrical feeding antenna aperture in a manner that allows for systematic matrix driving circuits. The arrangement of cells includes an arrangement of transistors for matrix driving. FIG. 25 shows one embodiment of the arrangement of matrix driving circuits for the antenna elements. Referring to FIG. 25, a row controller 2501 is coupled to transistors 2511 and 2512 via row selection signals Row1 and Row2, respectively, and a column controller 2502 is coupled to transistors 2511 and 2512 via column selection signal Column1. Also, transistor 2511 is coupled to antenna element 2521 via a connection to patch 2531, and transistor 2512 is coupled to antenna element 2522 via a connection to patch 2532.

[0125] In the first approach to realize a matrix drive circuit on a cylindrically fed antenna where unit cells are arranged in a non-regular grid, two steps are performed. In the first step, the cells are arranged in concentric rings, each of which is connected to a transistor placed beside the cell, which acts as a switch to drive each cell separately. In the second step, the matrix drive circuit is constructed to connect every transistor with a unique address as required by the matrix drive approach. The matrix drive circuit is constructed by row and column traces (similar to LCD), but since the cells are arranged on a ring, there is no systematic way to assign a unique address to each transistor. This mapping problem results in a very complex circuit to cover all the transistors and significantly increases the number of physical traces to be routed. Due to the high density of the cells, these traces hinder the RF performance of the antenna due to coupling effects. Also, due to the complexity and high packing density of the traces, the routing of the traces cannot be done by commercially available layout tools.

[0126] In one embodiment, the matrix drive circuitry is predefined before the cells and transistors are placed. This ensures a minimum number of traces are required to drive all the cells, each with a unique address. This scheme reduces the complexity of the drive circuitry and simplifies the routing, thereby improving the RF performance of the antenna.

[0127] More specifically, in one approach, in a first step, the cells are arranged on a square grid made up of rows and columns that represent the unique address of each cell. In a second step, the cells are grouped and transformed into concentric rings while preserving the cell addresses and connectivity to the rows and columns defined in the first step. The goal of this transformation is not only to arrange the cells on rings, but also to keep the distance between cells and between rings constant throughout the aperture. There are several ways to group the cells to achieve this goal.

[0128] In one embodiment, a TFT package is used to allow for alignment and unique addressing in a matrix drive. Figure 26 shows one embodiment of a TFT package. Referring to Figure 26, a TFT with input and output ports and hold capacitors 2603 is shown. There are two input ports connected to traces 2601 and two output ports connected to traces 2602, and rows and columns are used to connect the TFTs together. In one embodiment, the row and column traces cross at a 90° angle to reduce and possibly minimize coupling between the row and column traces. In one embodiment, the row traces and column traces are on different layers.

[0129] (Example of a full-duplex communication system) In another embodiment, the combined antenna aperture is used in a full duplex communication system. Figure 27 is a block diagram of one embodiment of a communication system having simultaneous transmit and receive paths. Although only one transmit path and one receive path are shown, the communication system may include more than one transmit path and / or more than one receive path.

[0130] 27, antenna 2701 includes two spatially interleaved antenna arrays independently operable to simultaneously transmit and receive at different frequencies as described above. In one embodiment, antenna 2701 is coupled to a diplexer 2745. This coupling can be by one or more feed networks. In one embodiment, in the case of a radially fed antenna, diplexer 2745 combines the two signals and the connection between antenna 2701 and diplexer 2745 is a single wideband feed network capable of carrying both frequencies.

[0131] The diplexer 2745 is coupled to a low noise block down converter (LNB) 2727, which performs noise filtering, down conversion and amplification functions in a manner well known in the art. In one embodiment, the LNB 2727 resides in an outdoor unit (ODU). In another embodiment, the LNB 2727 is integrated into the antenna arrangement. The LNB 2727 is coupled to a modem 2760, which is coupled to a computing system 2740 (e.g., a computer system, modem, etc.).

[0132] The modem 2760 includes an analog-to-digital converter (ADC) 2722 coupled to the LNB 2727 to convert the received signal output from the diplexer 2745 to digital format. Once converted to digital format, the signal is demodulated by a demodulator 2723 and decoded by a decoder 2724 to obtain the data encoded on the received signal. The decoded data is then sent to a controller 2725, which sends it to the computing system 2740.

[0133] The modem 2760 also includes an encoder 2730 that encodes data to be transmitted from the computing system 2740. The encoded data is modulated by a modulator 2731 and then converted to analog by a digital-to-analog converter (DAC) 2732. The analog signal is then filtered by a BUC (upconvert and high pass amplifier) ​​2733 and provided to one port of a diplexer 2745. In one embodiment, the BUC 2733 resides in an outdoor unit (ODU).

[0134] Diplexer 2745, operating in a manner well known in the art, provides the transmit signal to antenna 2701 for transmission.

[0135] A controller 2750 controls an antenna 2701, which includes two arrays of antenna elements on a single compound physical aperture.

[0136] The communication system would be modified to include the combiner / arbiter described above. In such a case, the combiner / arbiter would be after the modems and before the BUC and LNB.

[0137] It should be noted that the full-duplex communication system shown in FIG. 27 has several applications including Internet communications, vehicle communications (including software updates), and the like.

[0138] 1-27, it should be understood that for further embodiments, in variations of the embodiments described herein, other tunable capacitors, tunable capacitance dies, packaged dies, microelectromechanical systems (MEMS) devices, or other tunable capacitance devices can be disposed in the aperture or elsewhere. The techniques for mass transfer can be applied to further embodiments, including the placement of various dies, packaged dies, or MEMS devices on various substrates for electronic scanning arrays and various additional electrical, electronic, electromechanical devices.

[0139] All of the methods and tasks described herein can be performed by a computer system and can be fully automated. The computer system can include several different computers or computing devices (e.g., physical servers, workstations, storage arrays, cloud computing resources, etc.) that communicate and interoperate over a network to perform the described functions. Each such computing device typically includes a processor (or several processors) that executes program instructions or modules stored in a memory or other non-transitory computer-readable storage medium or device (e.g., semiconductor storage device, disk drive, etc.). Various functions disclosed herein can be embodied in such program instructions or can be implemented in the computer system's application-specific circuitry (e.g., ASIC or FPGA). When a computer system includes several computing devices, these devices can be, but are not required to be, co-located. The results of the disclosed methods and tasks can be persistently stored by converting physical storage devices, such as semiconductor memory chips or magnetic disks, to different states. In some embodiments, the computer system can be a cloud-based computing system in which processing resources are shared by several different business entities or other users.

[0140] Depending on the embodiment, certain operations, events, or functions of any of the processes or algorithms described herein may be performed in a different order, added, combined, or omitted entirely (e.g., not all operations or events described are required to implement an algorithm). Furthermore, in certain embodiments, operations or events may be performed not sequentially, but simultaneously, for example, using multi-threaded processing, interrupt processing, or on multiple processors or processor cores, or other parallel architectures.

[0141] The various exemplary logic blocks, modules, routines, and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware (e.g., ASIC or FPGA devices), computer software running on computer hardware, or a combination of both. Furthermore, the various exemplary logic blocks and modules described in connection with the embodiments disclosed herein may be implemented or executed by a machine, such as a processor device, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. The processor device may be a microprocessor, but alternatively, the processor device may be a controller, a microcontroller, or a state machine, combinations thereof, and the like. The processor device may include electrical circuitry configured to process computer-executable instructions. In another embodiment, the processor device includes an FPGA or other programmable device that performs logical operations without processing computer-executable instructions. A processor device may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in combination with a DSP core, or other such configurations. Although described herein primarily with respect to digital technology, a processor device may also include primarily analog components. For example, some or all of the rendering techniques described herein may be implemented with analog circuitry or mixed analog and digital circuitry.The computing environment can include any type of computer system, such as, but not limited to, a microprocessor-based computer system, a mainframe computer, a digital signal processor, a portable computing device, a device controller, or a computational engine within an appliance.

[0142] Elements of the methods, processes, routines, or algorithms described in connection with the embodiments disclosed herein may be embodied directly in hardware, in software modules executed by a processor device, or in a combination of the two. The software modules may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable disk, a CD-ROM, or any other form of non-transitory computer-readable storage medium. An exemplary storage medium may be coupled to the processor device such that the processor device can read information from, and write information to, the storage medium. Alternatively, the storage medium may be integral to the processor device. The processor device and the storage medium may be stored in an ASIC. The ASIC may be included in a user terminal. In the alternative, the processor device and the storage medium may reside as discrete components in a user terminal.

[0143] As used herein, conditional language, particularly "can," "could," "might," "may," "eg," and the like, is generally intended to convey that one embodiment includes certain features, elements, or steps while other embodiments do not, unless otherwise specified or understood in the context in which it is used. Thus, such conditional language is not generally intended to imply that the features, elements, or steps are in any way required for one or more embodiments, or that one or more embodiments necessarily include logic for determining whether those features, elements, or steps are included in or performed in a particular embodiment, with or without other input or prompting. Terms such as "comprising," "including," "having," and the like, are synonymous, inclusive, and open-ended, and do not exclude additional elements, features, acts, operations, etc. Additionally, the term "or" is used in an inclusive (not exclusive) sense, e.g., when used to connect a list of elements, the term "or" means one, some, or all of the elements in the list.

[0144] Disjunctive expressions such as the phrase "at least one of X, Y, or Z" are understood in conjunction with the context as being generally used to indicate that an item, term, etc. is either X, Y, or Z, or a combination thereof (e.g., X, Y, or Z), unless otherwise indicated. Thus, such disjunctive expressions are generally not intended, and should not be interpreted, to require that a particular embodiment require that at least one of X, at least one of Y, and at least one of Z, respectively, be present.

[0145] Although the above detailed description has shown, described and pointed out novel features applicable to various embodiments, it will be understood that various omissions, substitutions and changes in the form and details of the illustrated apparatus or algorithms can be made without departing from the spirit of the disclosure. As will be recognized, the specific embodiments described herein can be embodied in forms that do not provide all of the features and advantages described herein, since some features can be used or practiced separately from others. The scope of the specific embodiments disclosed herein is indicated by the appended claims, rather than the foregoing description. All changes that come within the meaning and range of equivalency of the claims are intended to be embraced within their scope. [Explanation of symbols]

[0146] 112 Iris opening 102 Diode 110 Bias electrode 104 Patch Electrode

Claims

1. 1. A unit cell for a metasurface, metamaterial, or beamforming antenna, comprising: A substrate; a metal layer attached to the substrate and defining an iris opening; one or more tunable capacitance devices located within or across the iris opening, each for tuning a resonant frequency of the unit cell; A unit cell comprising:

2. 10. The unit cell of claim 1, further comprising an assembly template formed by a structure on the substrate for aligning the one or more tunable capacitance devices during assembly of the unit cell.

3. The unit cell of claim 2 , wherein the assembly template is removable.

4. The unit cell of claim 2 , wherein the assembly template remains in structure on the substrate after assembly of the unit cell.

5. The unit cell of claim 2 , wherein the assembly template is formed by a metal layer in which the iris opening is defined.

6. The one or more tunable capacitance devices include an individual diode, and the unit cell comprises: a through via connecting one terminal of said one individual diode to said metal layer on one side of said iris opening; patch electrodes connected to opposing terminals of said one individual diode; A bias electrode connected to the patch electrode; 13. The unit cell of claim 1 further comprising:

7. 7. The unit cell of claim 6, wherein the bias electrode is resistive and comprises a resistive bias line or a resistor.

8. The one or more tunable capacitance devices include two individual diodes, and the unit cell comprises: a patch electrode connected to one terminal of each of the two individual diodes; a first through via connecting a first portion of the metal layer on a first side of the iris opening to another terminal of a first one of the two individual diodes; a second through via connecting a second portion of the metal layer on a second side of the iris opening to another terminal of a second one of the two individual diodes; 13. The unit cell of claim 1 further comprising:

9. The one or more tunable capacitance devices include an individual diode, and the unit cell comprises: a first patch electrode connected to a first terminal of the one individual diode, the one individual diode being oriented parallel to and into the iris opening; a second patch electrode connected to a second terminal of the one individual diode; 13. The unit cell of claim 1 further comprising:

10. the one or more tunable capacitance devices include the first discrete diode and a second discrete diode, and the unit cell comprises: a first patch electrode located on a first side of the iris opening and connected to a first terminal of the first discrete diode; a second patch electrode located on a second side of the iris opening and connected to a first terminal of the second discrete diode; a third electrode located along a centerline of the iris opening and connected to a second terminal of each of the first and second discrete diodes; 13. The unit cell of claim 1 further comprising:

11. The one or more tunable capacitance devices include an individual diode, and the unit cell comprises: a first patch electrode located on a first side of the iris opening and connected to a first terminal of one of the individual diodes; a second patch electrode located on a second side of the iris opening and connected to a second terminal of one of the individual diodes; 13. The unit cell of claim 1 further comprising:

12. the one or more tunable capacitance devices include a discrete diode; 2. The unit cell of claim 1 , wherein the metal layer further defines a first electrode and a second electrode for the one individual diode, the first electrode and the second electrode each having a semicircular shape that supports uniform rotation of the one individual diode relative to differing rotations of the remainder of the unit cell in multiple arrangements of the unit cell in the antenna array.

13. 2. The unit cell of claim 1 , wherein the one or more tunable capacitance devices include an unpackaged circular diode or a diode with a circular diode package, the circular diode or the circular diode package having at least one of a circular bond pad and a ring shaped bond pad.

14. 10. The unit cell of claim 1, wherein the one or more tunable capacitance devices include a tunable capacitance device having at least one of a circular bond pad and a ring shaped bond pad.

15. 10. The unit cell of claim 1 , wherein each of the one or more tunable capacitance devices includes one or more ferromagnetic bonding pads.

16. An antenna, one or more substrates defining an antenna aperture having a plurality of unit cells; Each of the plurality of unit cells comprises: a metal layer attached to a portion of the one or more substrates and defining an iris opening; one or more tunable capacitance devices located within or across the iris opening, the one or more tunable capacitance devices having a uniform orientation across at least a portion of the antenna aperture; Including, an antenna.

17. 17. The antenna of claim 16, wherein the one or more tunable capacitance devices have a uniform orientation for different rotations of the remainder of the unit cell.

18. 17. The antenna of claim 16, wherein the antenna aperture includes a plurality of segments, each of the plurality of segments having a subset of the one or more tunable capacitance devices having a uniform orientation across the segment, the subset including one of the plurality of segments as at least a portion of the antenna aperture.

19. The antenna of claim 16 , wherein the antenna aperture is circular.

20. 17. The antenna of claim 16, wherein the antenna aperture is rectangular.

21. 1. A method comprising: disposing each of a plurality of unit cells on a substrate, each of the plurality of unit cells including a metal layer attached to the substrate and defining an iris opening, the disposing step including disposing one or more tunable capacitance devices within or across the iris opening, each for tuning a resonant frequency of the unit cell; attaching the one or more tunable capacitance devices as part of completing each of the plurality of unit cells; A method comprising:

22. The method of claim 21 , wherein the one or more tunable capacitance devices have a uniform orientation across the substrate.

23. 22. The method of claim 21 , wherein the plurality of unit cells have uniform orientations of the one or more tunable capacitance devices relative to different rotations of the remainder of the unit cells.

24. depositing a thin film transistor on the substrate; depositing a through via on the substrate; 22. The method of claim 21 further comprising:

25. 22. The method of claim 21, further comprising depositing a thin film transistor over the metal layer that defines the iris opening of the plurality of unit cells.

26. 22. The method of claim 21, further comprising depositing a thin film transistor beneath the metal layer that defines an iris opening of the plurality of unit cells.

27. 22. The method of claim 21, further comprising: disposing the one or more tunable capacitance devices for each of the plurality of unit cells on the substrate using one or more hexagonal transfer tools.

28. 22. The method of claim 21, further comprising: using one or more rectangular transfer tools to place the one or more tunable capacitance devices for each of the plurality of unit cells on the substrate.

29. 22. The method of claim 21 , further comprising: disposing a fabrication template on the substrate to receive one or more tunable capacitance devices located within or across the iris opening of each of the plurality of unit cells.

30. 22. The method of claim 21 , wherein attaching the one or more tunable capacitance devices to complete each of the plurality of unit cells comprises a self-assembly process using one or more magnets to attract ferromagnetic bonding pads of the one or more tunable capacitance devices to each of the plurality of unit cells.

31. 22. The method of claim 21, further comprising applying agitation in a self-assembly process to position the one or more tunable capacitance devices within or across the iris opening of each of the plurality of unit cells.

32. disposing a fabrication template over the substrate; aligning the one or more tunable capacitance devices within the assembly template for each of the plurality of unit cells using one or more magnets to attract ferromagnetic bonding pads of the one or more tunable capacitance devices; 22. The method of claim 21 further comprising:

33. 1. A method for fabricating an electronically scanned array using mass transfer techniques, comprising: aligning, using a self-assembly process, one or more tunable capacitance devices to each of a plurality of iris openings defined by a metal layer bonded to a substrate; coupling the one or more tunable capacitance devices to the substrate while aligned with each of the plurality of iris openings; A method comprising:

34. 34. The method of claim 33, wherein each of the one or more tunable capacitance devices includes a ferromagnetic portion, and the self-assembly process uses a magnetic field to align the one or more tunable capacitance devices.

35. 34. The method of claim 33, wherein the self-assembly process comprises stirring.

36. 34. The method of claim 33, wherein the self-assembly process includes using an assembly template formed by the metal layer that defines the plurality of iris openings.

37. The method of claim 33 , wherein the self-assembly process includes using an assembly template attached to the substrate.

38. 34. The method of claim 33, wherein the self-assembly process includes each of the one or more tunable capacitance devices having a shape that conforms to the assembly template.

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