Semiconductor device and vehicle

Abstract

To prevent the generation of an operation failure of a semiconductor device due to scattering of a bonding material for bonding a main electrode and a conductive plate of a semiconductor element.SOLUTION: A semiconductor device (1) comprises: a wiring board (2); a semiconductor element (3A) arranged onto the wiring board; and a lead (4A) bonded by a main electrode and bonding materials (901 and 902) provided onto an upper surface of the semiconductor element. The main electrode of the semiconductor element includes a first pad (303) and a second pad (304) that are divided by an insulation layer (306) extended in a first direction. The lead includes a bottom surface (413) that is deformed on an upper surface side at a position which is directed to an insulation layer of a bonding surface (401) facing the main electrode of the semiconductor element. A concave part (410) extended in the first direction (Y direction) is formed. In a concave part of the lead, at least one end in the first direction is positioned at an end in the first direction of the lead in a plan view of the bonding surface. A region which is not contacted to the bonding material in the bottom surface is continued from the one end to the other end in the first direction of the concave part.SELECTED DRAWING: Figure 10C

Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a vehicle. [Background technology]

[0002] Among semiconductor devices used in power conversion devices such as inverter devices, there are some in which the main electrodes of the semiconductor element are joined to the conductor plate by a joining material such as solder. Some of these types of semiconductor devices have a recess formed in the conductor plate to accommodate the solder in order to improve the joining reliability (see, for example, Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2019 / 244492 [Patent Document 2] JP 2012-104709 A Summary of the Invention [Problem to be solved by the invention]

[0004] In the above-mentioned semiconductor device, when the main electrode of the semiconductor element and the conductor plate are joined with a bonding material, the molten bonding material may splash and remain on unintended parts of the surface of the semiconductor element, which may cause the semiconductor device to malfunction.

[0005] The present invention has been made in view of the above-mentioned problems, and has as its object to prevent malfunction of a semiconductor device caused by scattering of a bonding material that bonds a main electrode of a semiconductor element to a conductive plate. [Means for solving the problem]

[0006] A semiconductor device according to one embodiment of the present invention comprises a wiring board, a semiconductor element arranged on the wiring board, and a lead joined to a main electrode provided on an upper surface of the semiconductor element by a bonding material, wherein the main electrode of the semiconductor element has a first pad and a second pad separated by an insulating layer extending in a first direction, the lead has a bottom surface displaced toward the upper surface opposite the bonding surface at a position facing the insulating layer on a bonding surface facing the main electrode of the semiconductor element, and a recess extending in the first direction is formed, at least one of both ends in the first direction of the recess is located at an end of the lead in the first direction when viewed in a plan view of the bonding surface, and an area of ​​the bottom surface that is not in contact with the bonding material is continuous from one end of the recess in the first direction to the other end of the recess. Effect of the Invention

[0007] According to the present invention, it is possible to prevent malfunction of a semiconductor device caused by scattering of a bonding material that bonds a main electrode of a semiconductor element to a conductive plate. [Brief description of the drawings]

[0008] [Figure 1] 1 is a top view illustrating a configuration example of a semiconductor device according to an embodiment; [Diagram 2] 2 is a cross-sectional side view showing a configuration example of the semiconductor device taken along line AA' in FIG. [Diagram 3] 2 is a diagram illustrating an example of a circuit configuration of an inverter device to which the semiconductor device of FIG. 1 is applied. [Figure 4] 1 is a top view showing a configuration example of an upper surface electrode of a semiconductor element; [Diagram 5] 5 is a cross-sectional view showing a configuration example of a semiconductor element taken along line BB' in FIG. 4. [Figure 6A] 1 is a cross-sectional view showing a conventional example of a lead joined to a main electrode on the upper surface of a semiconductor element. [Figure 6B] FIG. 4 is a partial top view showing a preferred example of a planar shape of the molten bonding material. [Figure 6C] FIG. 13 is a partial top view showing an example of a bridge occurring in the molten bonding material. [Figure 6D] 6D is a cross-sectional view illustrating a state of the bonding material taken along line CC' in FIG. 6C. FIG. [Figure 6E] 6D is a cross-sectional view illustrating a state of the bonding material taken along line DD' in FIG. 6C. FIG. [Figure 6F] 6D is a cross-sectional view illustrating a state of the bonding material taken along line EE' in FIG. 6C. FIG. [Figure 7] 1 is a perspective view illustrating a shape of a lead according to an embodiment; [Figure 8] 5 is a cross-sectional view illustrating a shape of a lead according to an embodiment. FIG. [Figure 9] 1A to 1C are cross-sectional views illustrating an example of a method for forming a lead according to an embodiment. [Figure 10A] 10A to 10C are cross-sectional views illustrating a state of molten bonding material in a step of bonding a lead according to an embodiment; [Figure 10B] 10A to 10C are cross-sectional views illustrating a state of molten bonding material in a step of bonding a lead according to an embodiment; [Figure 10C] 10A to 10C are cross-sectional views illustrating a state of molten bonding material in a step of bonding a lead according to an embodiment; [Figure 11A] 13A and 13B are top views showing modified examples of the lead shape. [Figure 11B] 11B is a cross-sectional view illustrating a state of the molten bonding material taken along line FF' in FIG. 11A. [Figure 12] 1 is a schematic plan view showing an example of a vehicle to which a semiconductor device according to the present invention is applied; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, the embodiments of the present invention will be described in detail with reference to the drawings. The X-axis, Y-axis, and Z-axis in each of the drawings are shown for the purpose of defining planes and directions in the illustrated semiconductor device. The X-axis, Y-axis, and Z-axis are mutually orthogonal and form a right-handed system. In the following description, the direction parallel to the X-axis is called the X-direction, the direction parallel to the Y-axis is called the Y-direction, and the direction parallel to the Z-axis is called the Z-direction. Furthermore, when each of the X-direction, Y-direction, and Z-direction is associated with the direction of the arrows (positive and negative) of the X-axis, Y-axis, and Z-axis shown in the drawings, the "positive side" or "negative side" is added.

[0010] In this specification, the Z direction may be referred to as the up-down direction. In this specification, "up" and "upper" are intended to be on the positive side of the Z direction relative to a reference surface, member, position, etc., and "lower" and "lower" are intended to be on the negative side of the Z direction relative to a reference surface, member, position, etc. For example, when it is described that "a member B is placed on a member A," the member B is placed on the positive side of the Z direction as viewed from the member A. Also, when it is described that "the upper surface of a member A" is a surface located at the end of the member A on the positive side of the Z direction and facing the positive side of the Z direction. In this specification, "top view" is intended to be a planar view of the target item (e.g., a semiconductor device, etc.) as viewed from the positive side of the Z direction. In this specification, "side view" is intended to be a planar view of the target item as viewed from the negative side or positive side of the X direction, and a planar view as viewed from the negative side of the X direction may be referred to as a "left side view," and a planar view as viewed from the positive side of the X direction may be referred to as a "right side view." These directions and surfaces are terms used for convenience of explanation, and the corresponding relationship with each of the directions of the X-axis, Y-axis, and Z-axis may change depending on the mounting posture of the semiconductor device, etc. For example, in this specification, the surface of the semiconductor element facing the wiring board is called the bottom surface, and the surface opposite the bottom surface is called the top surface, but this is not limited to this, and the surface facing the wiring board may be called the top surface, and the surface opposite the bottom surface may be called the bottom surface. The bottom surface and the top surface of the semiconductor element may be called side surfaces. In addition, the aspect ratio and the size relationship between each member in each figure are merely shown diagrammatically, and do not necessarily match the relationship in the semiconductor device or the like that is actually manufactured. For convenience of explanation, it is assumed that the size relationship between each member is exaggerated.

[0011] Furthermore, the semiconductor device exemplified in the following description may be applied to a power conversion device such as an inverter device for industrial or electrical equipment (e.g., an in-vehicle motor). For this reason, in the following description, detailed descriptions of configurations, functions, operations, manufacturing methods, etc. that are the same as or similar to those of known semiconductor devices will be omitted.

[0012] Fig. 1 is a top view showing a configuration example of a semiconductor device according to an embodiment. Fig. 2 is a cross-sectional side view showing a configuration example of a semiconductor device cut along line A-A' in Fig. 1. The cross-sectional side view of Fig. 2 shows a right side view of a portion of the semiconductor device cut along line A-A' in Fig. 1 to the left of line A-A'. Also, hatching indicating a cross section of an encapsulant that encapsulates a semiconductor element and the like is omitted in Fig. 2.

[0013] The semiconductor device 1 illustrated in FIGS. 1 and 2 includes a wiring board 2, semiconductor elements 3A, 3B, leads 4A, 4B, bonding wires 5A, 5B, a case 6, a cooler 7, and a sealing material 8.

[0014] Wiring board 2 includes insulating substrate 200, first conductor pattern 211 and second conductor pattern 212 provided on the upper surface of insulating substrate 200, and third conductor pattern 213 provided on the lower surface of insulating substrate 200. Wiring board 2 may be, for example, a DCB (Direct Copper Bonding) substrate or an AMB (Active Metal Brazing) substrate. Wiring board 2 may also be called a laminated substrate, an insulating circuit board, or the like.

[0015] The insulating substrate 200 is not limited to a specific substrate. The insulating substrate 200 may be a ceramic substrate formed of a ceramic material such as aluminum oxide (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), or a composite material of aluminum oxide (Al2O3) and zirconium oxide (ZrO2). The insulating substrate 200 may be, for example, a substrate formed of an insulating resin such as an epoxy resin, a substrate formed by impregnating a base material such as glass fiber with an insulating resin, or a substrate formed by coating the surface of a flat metal core with an insulating resin.

[0016] The first conductor pattern 211 and the second conductor pattern 212 provided on the upper surface of the insulating substrate 200 function as wiring components, and are formed of, for example, a metal plate or a metal foil of copper, aluminum, etc. The first conductor pattern 211 and the second conductor pattern 212 may be called a conductor layer, a conductor plate, a conductive layer, a wiring pattern, etc.

[0017] The two semiconductor elements 3A and 3B arranged on the upper surface of the wiring board 2 are each composed of an RC (Reverse Conducting)-IGBT element that integrates the functions of an IGBT (Insulated Gate Bipolar Transistor) element, which is a switching element, and a diode element such as an FWD (Free Wheeling Diode) element connected in reverse parallel to the IGBT element. Each of these types of semiconductor elements 3A and 3B has a first main electrode (not shown) on the lower surface and second main electrodes 303, 304 and a control electrode (gate electrode) 305 on the upper surface. When the switching elements of the semiconductor elements 3A and 3B are IGBT elements, the first main electrode on the lower surface side may be called a collector electrode, and the second main electrodes 303, 304 on the upper surface side may be called an emitter electrode. In addition, the substrate on which the switching elements and diode elements in the semiconductor elements 3A and 3B are formed is not limited to a silicon substrate, and may be, for example, a SiC (Silicon Carbide) substrate, a GaN (Gallium Nitride) substrate, or the like. In the following description, when the two semiconductor elements 3A and 3B are to be distinguished, they will be referred to as a first semiconductor element 3A and a second semiconductor element 3B. When the two semiconductor elements are not to be distinguished, they may be referred to as a "semiconductor element 3." In the following description, the two second main electrodes 303, 304 provided on the upper surface of a single semiconductor element 3 may be referred to as a first pad 303 and a second pad 304.

[0018] In the semiconductor device 1 of Figures 1 and 2, the first semiconductor element 3A is disposed on the upper surface of the first conductor pattern 211, and the second semiconductor element 3B is disposed on the upper surface of the second conductor pattern 212. The first conductor pattern 211 is bonded to a first main electrode (not shown) provided on the lower surface of the first semiconductor element 3A by a bonding material (not shown). The second conductor pattern 212 is bonded to a first main electrode (not shown) provided on the lower surface of the second semiconductor element 3B by a bonding material (not shown). The bonding material may be a well-known bonding material such as solder.

[0019] The first main electrode provided on the lower surface of the first semiconductor element 3A is electrically connected to the first main terminal 610 provided on the case 6 via the first conductor pattern 211. The method of electrically connecting the first conductor pattern 211 and the first main terminal 610 is not limited to a specific method. The first conductor pattern 211 and the first main terminal 610 are electrically connected, for example, via a block-shaped conductor member (conductor block) provided on the upper surface of the first conductor pattern 211. The second main electrodes 303 and 304 provided on the upper surface of the first semiconductor element 3A are electrically connected to the second conductor pattern 212 via the first lead 4A. The first lead 4A is formed by bending a conductor plate such as a copper plate, and may be called a lead frame or the like. The first lead 4A has a portion joined to the second main electrodes 303, 304 of the first semiconductor element 3A by known bonding materials 901, 902 (see FIG. 10A) such as solder, and another portion joined to the second conductor pattern 212 by known bonding materials such as solder (not shown). In the following description, the bonding material 901 will be referred to as the first solder 901, and the bonding material 902 will be referred to as the second solder 902. The control electrode 305 provided on the upper surface of the first semiconductor element 3A is electrically connected to the control terminal 640 provided on the case 6 by the bonding wire 5A. The number of the control electrodes 305 is not limited to one, and two or more may be arranged.

[0020] The first main electrode provided on the lower surface of the second semiconductor element 3B is electrically connected to the third main terminal 630 provided on the case 6 via the second conductor pattern 212. The method of electrically connecting the second conductor pattern 212 and the third main terminal 630 is not limited to a specific method. The second conductor pattern 212 and the third main terminal 630 are electrically connected, for example, via a block-shaped conductor member (conductor block) 222 provided on the upper surface of the second conductor pattern 212. The second main electrodes 303 and 304 provided on the upper surface of the second semiconductor element 3B are electrically connected to the second main terminal 620 provided on the case 6 via the second lead 4B. The second lead 4B is formed by bending a conductor plate such as a copper plate, similar to the first lead 4A, and may be called a lead frame or the like. The second lead 4B has a portion joined to the second main electrodes 303, 304 of the second semiconductor element 3B by a known joining material 9B such as solder, and another portion joined to the second main terminal 620. The method for electrically connecting the second lead 4B and the second main terminal 620 is not limited to a specific method. The second lead 4B is joined to the second main terminal 620 by, for example, laser welding, ultrasonic bonding, or the like. In addition, the control electrode 305 provided on the upper surface of the second semiconductor element 3B is electrically connected to a control terminal 645 provided on the case 6 by a bonding wire 5B.

[0021] The method of electrically connecting two conductive members in semiconductor device 1 may be a method different from the above-mentioned method. For example, the electrical connection between first conductor pattern 211 of wiring board 2 and first main terminal 610 of case 6, and the electrical connection between second conductor pattern 212 and third main terminal 630 may be performed using a bonding material such as solder. In addition, second lead 6B and second main terminal 620 may be electrically connected via a conductor pattern provided on the upper surface of wiring board 2 (insulating substrate 200) that is different from first conductor pattern 211 and second conductor pattern 212.

[0022] The third conductor pattern 213 provided on the lower surface of the insulating substrate 200 functions as a heat-conducting member that conducts heat generated by the first semiconductor element 3A and the second semiconductor element 3B to the cooler 7, and is formed of, for example, a metal plate or metal foil such as copper or aluminum. The third conductor pattern 213 is joined to the upper surface of the cooler 7 by a joining material (not shown) such as solder. The cooler 7 has a coolant flow path in which a plurality of fins are arranged, and exchanges heat between the fins whose temperature has increased due to the heat from the first semiconductor element 3A and the second semiconductor element 3B and the coolant flowing through the flow path. The cooler 7 may be an optional component in the semiconductor device 1 of this embodiment. The semiconductor device 1 of this embodiment may be, for example, a device in which the wiring board 2 is joined to the upper surface of a heat dissipation base separate from the cooler 7, and the heat dissipation base may be thermally connected to the cooler 7 separate from the semiconductor device 1. In this type of semiconductor device 1, the heat dissipation base and the cooler 7 may be in close contact with each other by a heat-conducting material such as thermal grease or thermal compound.

[0023] The case 6 includes a case member 600 having an accommodating portion 650 capable of accommodating the wiring board 2 arranged on the upper surface of the cooler 7, the first semiconductor element 3A and the second semiconductor element 3B, the first lead 4A and the second lead 4B, bonding wires 5A, 5B, etc., and the above-mentioned first main terminal 610, second main terminal 620, third main terminal 630, control terminal 640, and control terminal 645.

[0024] The case member 600 of the case 6 illustrated in FIG. 1 and FIG. 2 has a generally ring-shaped top view with a storage section (hollow section) 650 with an open upper end and lower end, and the wiring board 2 and the like are stored in the storage section 650. The above-mentioned first main terminal 610, second main terminal 620, third main terminal 630, control terminal 640, and control terminal 645 each have an inner terminal portion exposed in the storage section 650 of the case member 600 and an outer terminal portion exposed from the upper surface of the case member 600, and are provided integrally with the case member 600. This type of case 6 is manufactured by a well-known manufacturing method such as a method using insert molding. The shapes of the first main terminal 610, second main terminal 620, third main terminal 630, control terminal 640, and control terminal 645 are not limited to the shapes illustrated in FIG. 1 and FIG. 2. For example, the first main terminal 610, the second main terminal 620, and the third main terminal 630 may each be bent so that the outer terminal portion exposed from the upper surface of the case member 600 fits along the upper surface of the case member 600.

[0025] The case 6 has a case member 600 bonded to the top surface of the cooler 7 (or heat dissipation base) by, for example, an adhesive. The accommodation portion 650 of the case 6 is filled with a sealant 8 that seals the wiring board 2, the first semiconductor element 3A and the second semiconductor element 3B, the first lead 4A and the second lead 4B, the bonding wires 5A and 5B, etc. The sealant 8 may be, for example, an epoxy resin or a silicone gel. The sealant 8 may be a combination of two or more types of insulating materials. The accommodation portion 650 of the case 6 may have, for example, an opening on the upper end side covered with a lid.

[0026] 1 and 2 includes one single-phase inverter circuit. By using three such semiconductor devices 1, for example, a three-phase inverter device can be configured.

[0027] FIG. 3 is a diagram showing an example of a circuit configuration of an inverter device to which the semiconductor device of FIG. 1 is applied.

[0028] 3 shows an example of a circuit configuration of a voltage-type three-phase inverter device as an example of the circuit configuration of the inverter device 11. The inverter device 11 includes three single-phase inverter circuits 1101(U), 1101(V), and 1101(W), a smoothing capacitor 1102, and a control circuit 1103. The single-phase inverter circuit 1101(U) converts DC to AC and outputs it as U-phase AC. The single-phase inverter circuit 1101(V) converts DC to AC and outputs it as V-phase AC. The single-phase inverter circuit 1101(W) converts DC to AC and outputs it as W-phase AC. In this specification, the three phases in the three-phase AC are called the U-phase, V-phase, and W-phase, but may be called by other names.

[0029] The inverter device 11 has three single-phase inverter circuits 1101(U), 1101(V), and 1101(W) connected in parallel with a smoothing capacitor 1102. The circuit configurations of the three single-phase inverter circuits 1101(U), 1101(V), and 1101(W) illustrated in the equivalent circuit of Fig. 3 correspond to the circuits formed in one semiconductor device 1 described above with reference to Figs. 1 and 2.

[0030] The inverter device 11 has a first input terminal IN(P) for connecting the positive electrode of the DC power supply 12, a second input terminal IN(N) for connecting the negative electrode of the DC power supply 12, and output terminals OUT(U), OUT(V), and OUT(W) for outputting three-phase AC. The first input terminal IN(P) is connected to a first main terminal 610 of the semiconductor device 1, and the second input terminal IN(N) is connected to a second main terminal 620 of the semiconductor device 1. The output terminals OUT(U), OUT(V), and OUT(W) are connected to a third main terminal 630 of the semiconductor device 1.

[0031] Each of the single-phase inverter circuits 1101(U), 1101(V), and 1101(W) illustrated in Fig. 3 is a half-bridge inverter circuit. In the single-phase inverter circuit 1101(U), a collector electrode of a switching element 320 (e.g., an IGBT element) in a first semiconductor element 3A connected between a first input terminal IN(P) sometimes called an upper arm and an output terminal OUT(U) is connected to the first input terminal IN(P) via a first main terminal 610. In the single-phase inverter circuit 1101(U), an emitter electrode of a switching element 322 in a second semiconductor element 3B connected between a second input terminal IN(N) sometimes called a lower arm and an output terminal OUT(U) is connected to a second input terminal IN(N) via a second main terminal 620. An emitter electrode of the upper arm switching element 320 and a collector electrode of the lower arm switching element 322 in the single-phase inverter circuit 1101(U) are connected to an output terminal OUT(U) that outputs a U-phase AC current in the three-phase AC current via a third main terminal 630. A diode element 321 is connected in anti-parallel to the upper arm switching element 320, and a diode element 323 is connected in anti-parallel to the lower arm switching element 322. The other two single-phase inverter circuits 1101(V) and 1101(W) have a configuration in which the output terminal OUT(U) in the above-mentioned single-phase inverter circuit 1101(U) is replaced with output terminals OUT(V) and OUT(W), respectively.

[0032] The AC output from each of the single-phase inverter circuits 1101(U), 1101(V), and 1101(W) is controlled so that the phases are shifted by 120 degrees from each other by a control signal applied from a control circuit 1103 to the gate of the switching element 320 of the upper arm (the control electrode 305 of the first semiconductor element 3A) via a control terminal 640 and a control signal applied to the gate of the switching element 322 of the lower arm (the control electrode 305 of the second semiconductor element 3B) via a control terminal 645. A load (e.g., an AC motor) 13 that operates on AC is connected to output terminals OUT(U), OUT(V), and OUT(W) of the inverter device 11.

[0033] The circuit configuration of the inverter device 11 including the semiconductor device 1 of this embodiment is not limited to the circuit configuration illustrated in FIG. 3. The operation of the inverter device 11 including the semiconductor device 1 of this embodiment is not limited to a specific operation. For example, one semiconductor device 1 may be configured to include three single-phase inverter circuits 1101(U), 1101(V), and 1101(W) illustrated in FIG. 3. In other words, the semiconductor device 1 may be configured such that three sets of the wiring board 2, the first semiconductor element 3A and the second semiconductor element 3B, the first lead 4A and the second lead 4B, and the bonding wires 5A and 5B illustrated in FIG. 1 and FIG. 2 are accommodated in one case 6. For example, the inverter circuit included in the semiconductor device 1 is not limited to the half-bridge inverter circuit described above with reference to FIG. 3, but may be a full-bridge inverter circuit.

[0034] Furthermore, the inverter device 11 described above with reference to FIG. 3 is merely an example of a device to which the semiconductor device 1 according to the present embodiment is applied.

[0035] The switching elements 320 and 322 of the first semiconductor element 3A and the second semiconductor element 3B are not limited to the IGBT elements described above, and may be, for example, power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), BJTs (Bipolar Junction Transistors), etc. When the switching elements are MOSFET elements, the main electrodes on the lower surfaces of the first semiconductor element 3A and the second semiconductor element 3B may be called drain electrodes, and the main electrodes 303 and 304 on the upper surfaces may be called source electrodes. The diode elements 321 and 323 may be, for example, SBDs (Schottky Barrier Diodes), JBS (Junction Barrier Schottky) diodes, MPS (Merged PN Schottky) diodes, PN diodes, etc. The control electrodes 305 provided on the upper surfaces of the first semiconductor element 3A and the second semiconductor element 3B may include gate electrodes and auxiliary electrodes. For example, the auxiliary electrode may be an auxiliary emitter electrode or an auxiliary source electrode electrically connected to the main electrode on the upper surface side and serving as a reference potential for the gate potential. The auxiliary electrode may be a temperature sensing electrode electrically connected to a temperature sensing section that may be included in the inverter device 11 or the like and measuring the temperatures of the first semiconductor element 3A and the second semiconductor element 3B. These electrodes (the second main electrodes 303, 304 and the control electrode 305 including the gate electrode and the auxiliary electrode) formed on the upper surfaces of the first semiconductor element 3A and the second semiconductor element 3B may be collectively called upper surface electrodes. The substrate on which the switching elements 320 and 322 and the diode elements 321 and 323 are formed is not limited to a silicon substrate and may be, for example, a SiC (silicon carbide) substrate, a GaN (gallium nitride) substrate, or the like.

[0036] In addition, the switching element and the diode element described as being included in one semiconductor element in the single-phase inverter circuit described above with reference to Fig. 3 may be provided by separate semiconductor elements. For example, the switching element 320 and the diode element 321 of the upper arm may be provided by a semiconductor element in which the switching element 320 is formed and a semiconductor element in which the diode element 321 is formed. The shape, number of arrangements, arrangement locations, etc. of the semiconductor elements can be changed as appropriate. The layout of the conductor patterns as wiring components provided on the upper surface side of the wiring board 2 is changed depending on the type, shape, number of arrangements, arrangement locations, etc. of the semiconductor elements.

[0037] In the semiconductor device 1 of this embodiment, a second main electrode such as an emitter electrode (or a source electrode) provided on the upper surface of a single semiconductor element 3 is divided into a first pad 303 and a second pad 304 as illustrated in FIG.

[0038] Fig. 4 is a top view showing a configuration example of an upper surface electrode of a semiconductor element, and Fig. 5 is a cross-sectional view showing a configuration example of a semiconductor element taken along line BB' in Fig. 4.

[0039] In the semiconductor element 3 used in the semiconductor device 1 of this embodiment, as shown in, for example, FIG. 4 and FIG. 5, a first main electrode 301 (collector electrode or drain electrode) is formed on the lower surface of a semiconductor substrate 300. In addition, second main electrodes 303 and 304 (emitter electrode or source electrode) and a control electrode 305 as a gate electrode are formed on the upper surface of the semiconductor substrate 300. The control electrode 305 is formed on the upper surface of the semiconductor substrate 300 via, for example, an insulating film 302 that may be called a gate insulating film. The second main electrode is divided into a first pad 303 and a second pad 304, and a runner portion 305a extending from the control electrode 305 along the upper surface of the semiconductor substrate 300 passes between the first pad 303 and the second pad 304 on the upper surface of the semiconductor substrate 300. The runner portion 305a is covered with an insulating layer 306.

[0040] A plating layer 307 for improving the bonding reliability with a bonding material is formed on the upper surfaces of the first pad 303 and the second pad 304. The plating layer 307 is also divided by an insulating layer 306 that covers the runner portion 305a of the control electrode 305.

[0041] The configuration of the semiconductor element 3 is not limited to the configuration exemplified in FIGS.

[0042] 4 and 5, scattering of the bonding material that bonds the second main electrode and the lead of the semiconductor element 3 may cause malfunction of the semiconductor element 3. Scattering of the bonding material and malfunction will be described with reference to Figures 6A to 6F.

[0043] FIG. 6A is a cross-sectional view showing a conventional example of a lead bonded to a main electrode on the upper surface of a semiconductor element. FIG. 6B is a partial top view showing a preferred example of a planar shape of a molten bonding material. FIG. 6C is a partial top view showing an example of a bridge formed in the molten bonding material. FIG. 6D is a cross-sectional view illustrating the state of the bonding material at the position of line CC' in FIG. 6C. FIG. 6E is a cross-sectional view illustrating the state of the bonding material at the position of line D-D' in FIG. 6C. FIG. 6F is a cross-sectional view illustrating the state of the bonding material at the position of line E-E' in FIG. 6C.

[0044] 6A shows a lead 4C having a flat bonding surface 401 (a surface facing the upper surface of the semiconductor element 3) as a conventional example of a lead to be bonded to main electrodes (first pad 303 and second pad 304) on the upper surface of the semiconductor element 3. When bonding the first pad 303 and second pad 304 on the upper surface of the semiconductor element 3 to the lead 4C, a plate-shaped solder 9 is disposed between the upper surface of the semiconductor element 3 and the lead 4C, and the plate-shaped solder 9 is heated and melted. Before being heated and melted, the plate-shaped solder 9 is also present on the insulating layer 306 separating the first pad 303 and the second pad 304 (in other words, between the insulating layer 306 and the bonding surface 401 of the lead 4C). However, the surface of the insulating layer 306 has a lower solder wettability than the plating layer 307 formed on the surfaces of the first pad 303 and the second pad 304, so when the plate-shaped solder 9 is heated and melted, the molten solder on the insulating layer 306 flows onto the first pad 303 and the second pad 304. Therefore, the heated and melted solder 9 separates into a first solder 901 on the first pad 303 and a second solder 902 on the second pad 304, as illustrated in Figures 6B and 6C. In other words, a cavity is formed between the semiconductor element 3 and the lead 4 that penetrates the solder layer along the extension direction of the insulating layer 306.

[0045] As illustrated in FIG. 6B, the insulating layer 306 passing between the first pad 303 and the second pad 304 includes a first section 306a and a third section 306c in which the gap between the first pad 303 and the second pad 304 is a first gap G1, and a second section 306b in which the gap is a second gap G2 larger than the first gap G1. The second section 306b is located between the first section 306a and the third section 306c in the extension direction (Y direction) of the runner section 305a of the control electrode 305 covered by the insulating layer 306. The first gap G1 and the second gap G2 are not limited to a specific value. The first gap G1 may be, for example, 166 μm. When the first pad 303 and the second pad 304 have such a planar shape, if a lead 4C having a flat bonding surface 401 is used, bridges 903-905 connecting the first solder 901 on the first pad 303 and the second solder 902 on the second pad 304 may be formed in the first section 306a and the third section 306c, as shown in Figures 6D, 6E, and 6F, for example.

[0046] The bridges 903-905 may come into contact with the upper surface of the insulating layer 306 and the lower surface (bonding surface 401) of the lead 4C, as illustrated in, for example, FIG. 6E and FIG. 6F. When the bridges 903-905 in such a state exist, the air remaining in the space (gap) isolated from the outside space by the bridges may thermally expand, and the solder in the bridge portion may be pushed outward along the extending direction of the insulating layer 306 (the runner portion 305a of the control electrode 305) and scattered. The solder scattered outward along the extending direction of the insulating layer 306 may adhere to, for example, the surface of the control electrode 305. The solder adhered to the surface of the control electrode 305 may cause, for example, a connection failure when connecting a bonding wire or an electrical connection between the control electrode 305 and another conductor that should be electrically insulated.

[0047] Furthermore, in the case of a configuration in which solder is filled into a groove formed on the joint surface of the lead (the surface facing the semiconductor element) as in Patent Documents 1 and 2, when the heated and melted solder is filled into the groove, voids are generated in the solder layer, and the expansion of the voids can cause the solder to splash.

[0048] Fig. 7 is a perspective view illustrating a shape of a lead according to an embodiment, Fig. 8 is a cross-sectional view illustrating a shape of a lead according to an embodiment, and Fig. 9 is a cross-sectional view illustrating an example of a method for forming a lead according to an embodiment.

[0049] 7 and 8 show examples of the shape of a terminal portion 400 having a bonding surface 401 facing the first pad 303 and the second pad 304 of the first lead 4A connected to the second main electrode (the first pad 303 and the second pad 304) of the first semiconductor element 3A in the semiconductor device 1 described above with reference to FIGS. 1 and 2. In the terminal portion 400, a portion of the lower surface (bonding surface) 401 facing the first semiconductor element 3A that faces the insulating layer 306 of the first semiconductor element 3A is displaced upward, and a recess 410 extending along the extension direction of the insulating layer 306 is formed. The width W1 of the recess 410 may be equal to or larger than the first gap G1 between the first pad 303 and the second pad 304 of the first semiconductor element 3A. For example, when the first gap G1 is 166 μm, the width W1 of the recess 410 may be equal to or larger than 166 μm. The depth D of the recess 410 is smaller than the depth corresponding to the thickness T of the terminal portion 400 and is set to a depth such that the inside of the recess 410 is not filled with molten solder.

[0050] 7 and 8, the recess 410 of the terminal portion 400 of the first lead 4A is preferably shaped such that only the portion of the terminal portion 400 forming the recess 410 (in other words, the portion facing the insulating layer 306 of the semiconductor element 3) is displaced upward and protrudes. Furthermore, the recess 410 is preferably shaped such that the first wall surface 411 and the second wall surface 412 facing each other are perpendicular to the lower surface of the terminal portion 400 (the bottom surface 413 of the recess 410). The recess 410 having such a shape can, for example, suppress the inflow of molten solder into the recess 410 and suppress the recess 410 from being filled with solder.

[0051] The method of forming the recess 410 of the terminal portion 400 illustrated in Fig. 7 and Fig. 8 is not limited to a specific method. The recess 410 can be formed, for example, by half-punching (half-cutting) using a metal mold (punching die) as illustrated in Fig. 9. The half-punching is a process in which the terminal portion 400 of the first lead 4A is sandwiched between a die 1401 and a stripper 1402, and a punch 1403 is pressed into the terminal portion 400 to such an extent that the terminal portion 400 does not come out, thereby deforming the terminal portion. Only the portion of the terminal portion 400 pressed by the punch 1403 is displaced downward, and a protrusion 420 on the opposite side to the recess 410 is formed.

[0052] Fig. 10A is a cross-sectional view illustrating a state of a molten bonding material in a step of bonding a lead according to an embodiment, Fig. 10B is a cross-sectional view illustrating a state of a molten bonding material in a step of bonding a lead according to an embodiment, and Fig. 10C is a cross-sectional view illustrating a state of a molten bonding material in a step of bonding a lead according to an embodiment.

[0053] 7 and 8 is used instead of the lead 4C illustrated in FIG. 6A, when the plate-shaped solder 9 is disposed between the first semiconductor element 3A and the first lead 4A, the portion of the upper surface of the plate-shaped solder 9 facing the recess 410 does not contact the first lead 4A. In other words, the upper surface of the plate-shaped solder 9 contacts the first lead 4A in two separate regions, that is, the region overlapping the first pad 303 of the first semiconductor element 3A in a plan view and the region overlapping the second pad 304. Therefore, when the plate-shaped solder 9 is heated and melted, due to the surface tension of the melted solder and its low wettability to the insulating layer 306, it is separated into the first solder 901 on the first pad 303 and the second solder 902 on the second pad 304, for example, as shown in FIG. 10A.

[0054] Also, when the first lead 4A having the recess 410 is used, the above-mentioned bridges 903 to 905 may be generated on the insulating layer 306 in the process of the molten solder separating into the first solder 901 and the second solder 902. However, the recess 410 having the bottom surface 413 displaced upward is formed at a position facing the insulating layer 306 on the lower surface of the terminal portion 400 of the first lead 4A. Therefore, when the bridges 903 to 905 are generated on the insulating layer 306, for example, as shown in FIG. 10B and FIG. 10C, a hole that communicates the two spaces separated by the bridge 903 is formed by the upper surface 903a of the bridge 903 and the wall surfaces 411, 412 and bottom surface 413 of the recess 410 of the first lead 4A. In other words, the area of ​​the bottom surface 413 of the recess 410 that is not in contact with the solder is in a continuous state from one end to the other end in the extension direction of the recess 410. This makes it possible to prevent scattering of the molten bonding material caused by air expansion due to voids occurring inside the heated and melted solder in the semiconductor device 1 of this embodiment. Therefore, in the semiconductor device 1 of this embodiment, it is possible to prevent malfunction of the semiconductor device caused by scattering of the bonding material that bonds the main electrode of the semiconductor element 3 and the conductor plate.

[0055] Although detailed description with reference to the drawings is omitted, the second lead 4B electrically connected to the second main electrodes 303, 304 on the upper surface of the second semiconductor element 3B can be configured similarly to the first lead 4A to prevent malfunction of the semiconductor device due to scattering of the bonding material. Specifically, the terminal portion of the second lead 4B having a bonding surface facing the second main electrodes 303, 304 on the upper surface of the second semiconductor element 3B forms a recess 410 extending in the extension direction (Y direction in FIG. 1) of the insulating layer 306 separating the first pad 303 and the second pad 304, which is the extension direction of the runner portion 305a in a plan view (top view). This prevents the solder remaining on the insulating layer 306 and forming bridges 903 to 905 from scattering and adhering to the control electrode 305 arranged in the extension direction of the insulating layer 306.

[0056] The layout of the upper surface electrodes of the semiconductor element 3 according to this embodiment is not limited to the layout described above with reference to Figures 1 and 4. The emitter electrode or source electrode arranged as the second main electrode on the upper surface of the semiconductor element 3 may be divided into three or more parts, for example, rather than being limited to two. The terminal portion of the lead electrically connected to the second main electrode divided into three or more parts may have a recess formed only at a position, in plan view, that overlaps with an insulating layer in the insulating layer (runner portion 305a) dividing the second main electrode, where a control electrode to which solder scattered at a position extended in the extension direction is not desired to adhere is arranged.

[0057] The recess 410 described above extends from one end to the other end of the terminal portion 400 in plan view along the extension direction of the insulating layer 306 (runner portion 305a) dividing the second main electrode of the semiconductor element 3. However, as described above with reference to FIG. 6B, the insulating layer 306 dividing the second main electrode of the semiconductor element 3 may have a portion (second section 306b) in the center portion in the extension direction that is wider than the sections on both sides (first section 306a and third section 306c). When such a semiconductor element 3 is used, no bridge due to the heated and melted solder occurs in the second section having a wider width of the insulating layer 306. Therefore, the recess 410 formed in the terminal portion 400 of the lead 4A may be intermittently formed in the section of the insulating layer 306 (runner portion 305a) dividing the second main electrode of the semiconductor element 3 where a bridge due to the heated and melted solder is likely to occur.

[0058] Fig. 11A is a top view showing a modified example of the shape of the lead, and Fig. 11B is a cross-sectional view showing an example of the state of the molten bonding material taken along the line FF' in Fig. 11A.

[0059] 11A and 11B, a first recess 410A overlapping with the first section 306a of the insulating layer 306 in a plan view and a second recess 410B overlapping with the third section 306c of the insulating layer 306 are formed in the joint surface 401 of the terminal portion 400 in the lead 4A illustrated. The end of the first recess 410A closer to the center of the terminal portion 400 in a plan view and the end of the second recess 410B closer to the center of the terminal portion 400 in a plan view each extend into the second section 306b and are separated by a section having a length L in the extension direction.

[0060] When such first recess 410A and second recess 410B are formed, for example, as shown by the thick dotted line in Fig. 11B, even if a bridge of molten solder occurs at the position of the first section closest to the second section and at the position of the third section closest to the second section, the area of ​​the bottom surface of each recess that does not come into contact with the solder continues from one end to the other end in the extension direction. This prevents the air in the gap caused by the bridge of molten solder from expanding and scattering the solder.

[0061] In addition, in the lead 4A of this embodiment, a convex portion 420 corresponding to the concave portion 410 formed on the lower surface is generated on the upper surface of the terminal portion 400 connected to the second main electrode of the semiconductor element 3. Therefore, when the encapsulant 8 is filled in the housing portion 650 of the case 6, the contact area between the upper surface of the terminal portion 400 of the lead 4A and the encapsulant 8 increases, and peeling of the encapsulant 8 on the upper surface of the terminal portion 400 is less likely to occur. In addition, as illustrated in FIG. 11B, by dividing the convex portion generated on the upper surface of the terminal portion 400 into two, the contact area between the upper surface of the terminal portion 400 of the lead 4A and the encapsulant 8 is further increased, and peeling of the encapsulant on the upper surface of the terminal portion 400 is less likely to occur. In addition, by dividing the convex portion generated on the upper surface of the terminal portion 400 into two, for example, the effect of mitigating the thermal stress generated at the interface between the upper surface of the terminal portion 400 and the encapsulant due to the difference in thermal expansion coefficient is increased, and peeling of the encapsulant on the upper surface of the terminal portion 400 can be more unlikely to occur.

[0062] Although the semiconductor device 1 of the above-mentioned embodiment is not limited to a specific use, the semiconductor device 1 equipped with the cooler 7 is particularly suitable for use in a high temperature environment. For example, the semiconductor device 1 of the above-mentioned embodiment can be applied to a power conversion device such as an inverter device for an in-vehicle motor. A vehicle to which the semiconductor device 1 according to the present invention is applied will be described with reference to FIG. 12.

[0063] Fig. 12 is a schematic plan view showing an example of a vehicle to which the semiconductor device according to the present invention is applied. Vehicle 1501 shown in Fig. 12 is, for example, a four-wheeled vehicle having four wheels 1502. Vehicle 1501 may be, for example, an electric vehicle in which the wheels are driven by a motor or the like, or a hybrid vehicle that uses the power of an internal combustion engine in addition to a motor. Furthermore, the vehicle to which semiconductor device 1 is applied is not limited to a four-wheeled vehicle, and may be a two-wheeled vehicle, a railroad car, or the like.

[0064] Vehicle 1501 includes a drive unit 1503 that applies power to wheels 1502, and a control device 1504 that controls drive unit 1503. Drive unit 1503 may be composed of at least one of an engine, a motor, and a hybrid of an engine and a motor, for example.

[0065] The control device 1504 performs control (e.g., power control) of the driving unit 1503. The control device 1504 includes the semiconductor device 1 including the cooler 7 of the above-described embodiment. The semiconductor device 1 can be configured to perform power control for the driving unit 1503.

[0066] The embodiments of the semiconductor device 1 according to the present invention are not limited to the above-mentioned embodiments, and may be modified, substituted, or altered in various ways without departing from the spirit of the technical idea. Furthermore, if the technical idea can be realized in a different way due to technological progress or a derived technology, the invention may be implemented using that method. Therefore, the claims cover all embodiments that may be included within the scope of the technical idea.

[0067] The features of the above-described embodiment will be summarized below.

[0068] The semiconductor device according to the above-described embodiment includes a wiring board, a semiconductor element arranged on the wiring board, and a lead bonded to a main electrode provided on an upper surface of the semiconductor element by a bonding material, wherein the main electrode of the semiconductor element has a first pad and a second pad separated by an insulating layer extending in a first direction, the lead has a bottom surface displaced toward the upper surface opposite the bonding surface at a position facing the insulating layer on the bonding surface facing the main electrode of the semiconductor element, and a recess extending in the first direction is formed, and at least one end of the recess of the lead in the first direction is located at the end of the lead in the first direction when viewed in a plan view of the bonding surface, and an area of ​​the bottom surface that is not in contact with the bonding material is continuous from one end of the recess in the first direction to the other end of the recess.

[0069] In the semiconductor device of the above embodiment, the semiconductor element further has a conductive runner portion arranged on the upper surface, extending in the first direction inside the insulating layer dividing the first pad and the second pad, and a control electrode connected to one end of the runner portion in the first direction and exposed on the upper surface, wherein the control electrode is exposed at a position extending from the recess of the lead in the first direction.

[0070] In the semiconductor device according to the above embodiment, the recess of the lead extends from one end to the other end of the lead in the first direction in a plan view of the bonding surface.

[0071] In the semiconductor device of the above embodiment, the insulating layer divides the first pad and the second pad so that between a first section and a third section, in which the gap between the first pad and the second pad is a first gap, there is a second section, in which the gap between the first pad and the second pad is a second gap larger than the first gap, and the bonding surface of the lead has a separate recess at a position facing the insulating layer, the one end of which is within the second section in a planar view of the bonding surface and the other end of which extends to the end of the lead in the first direction.

[0072] In the semiconductor device according to the above embodiment, the width of the recess of the lead in a plan view of the bonding surface is equal to or larger than the first gap.

[0073] In the semiconductor device according to the above embodiment, the recess of the lead is formed by displacing the portion of the lead facing the insulating layer by half-blanking.

[0074] In the semiconductor device of the above embodiment, a bridge of bonding material is provided on the insulating layer of the semiconductor element, the bridge connecting a first bonding material on the first pad and a second bonding material on the second pad, and spaced apart from the bottom surface of the recess of the lead.

[0075] The semiconductor device according to the above embodiment further includes a cooler that is thermally connected to a surface of the wiring board opposite to the surface on which the semiconductor element is arranged.

[0076] The vehicle according to the above-described embodiment includes the semiconductor device according to the above-described embodiment. [Industrial Applicability]

[0077] As described above, the present invention can prevent malfunctions of semiconductor devices caused by scattering of bonding material that bonds the main electrode of a semiconductor element to a conductor plate, and is particularly useful for industrial or electrical semiconductor devices used as power conversion devices, and for vehicles. [Explanation of symbols]

[0078] 1 Semiconductor device 2 Wiring board 200 Insulating Substrate 211, 212, 213 Conductor patterns 222 Conductor Block 3, 3A, 3B semiconductor device 300 Semiconductor Substrate 301 First main electrode 302 Insulating film 303 Second main electrode (first pad) 304 Second main electrode (second pad) 305 Control Electrode 305a Runner Section 306 Insulating layer 307 plating layer 320, 322 Switching element 321, 323 Diode elements 4A, 4B, 4C leads 400 Terminal section 401 Joint surface 410, 410A, 410B recess 411, 412 Wall 413 Bottom 420 Convex 5A, 5B Bonding Wire 6 Cases 600 Case material 610, 620, 630 main terminal 640, 645 Control terminal 650 Storage unit 7 Cooler 8. Encapsulating materials 9, 901, 902 Solder 903, 904, 905 Bridge 11 Inverter device 1101(U), 1101(V), 1101(W) Single-phase inverter circuit 1102 Smoothing capacitor 1103 Control circuit 12 DC power supply 13 Load 1401 Die 1402 Stripper 1403 Punch 1501 vehicles 1502 wheels 1503 Drive unit 1504 Control device

Claims

1. a wiring board; a semiconductor element disposed on the wiring board; and a lead bonded to a main electrode provided on an upper surface of the semiconductor element by a bonding material; the main electrode of the semiconductor element has a first pad and a second pad separated by an insulating layer extending in a first direction; the lead has a bottom surface displaced toward an upper surface opposite to the bonding surface at a position facing the insulating layer on a bonding surface facing the main electrode of the semiconductor element, and a recess extending in the first direction is formed; At least one end of the recess of the lead in the first direction is located at an end of the lead in the first direction in a plan view of the bonding surface, and a region of the bottom surface that is not in contact with the bonding material is continuous from one end of the recess in the first direction to the other end. Semiconductor device.

2. the semiconductor element further includes a conductive runner portion disposed on the top surface, extending in the first direction within the insulating layer dividing the first pad and the second pad, and a control electrode connected to one end of the runner portion in the first direction and exposed on the top surface; The control electrode is exposed at a position extending from the recess of the lead in the first direction. The semiconductor device according to claim 1 .

3. The semiconductor device according to claim 1 , wherein the recess of the lead extends from one end to the other end of the lead in the first direction in a plan view of the bonding surface.

4. the insulating layer divides the first pad and the second pad such that a second section, in which a gap between the first pad and the second pad is a second gap larger than the first gap, is present between a first section and a third section, in which a gap between the first pad and the second pad is a first gap; The bonding surface of the lead has a separate recess at a position facing the insulating layer, the separate recess having one end within the second section in a plan view of the bonding surface and the other end extending to an end of the lead in the first direction. The semiconductor device according to claim 1 .

5. The semiconductor device according to claim 4 , wherein a width of the recess of the lead in a plan view of the bonding surface is equal to or greater than the first gap.

6. 2. The semiconductor device according to claim 1, wherein the recesses of the leads are formed by displacing portions of the leads facing the insulating layer by half-blanking.

7. 2. The semiconductor device according to claim 1, further comprising a bridge of bonding material on the insulating layer of the semiconductor element, the bridge connecting a first bonding material on the first pad and a second bonding material on the second pad, and spaced apart from a bottom surface of the recess of the lead.

8. 2. The semiconductor device according to claim 1, further comprising a cooler thermally connected to a surface of said wiring board opposite to a surface on which said semiconductor element is arranged.

9. A vehicle comprising the semiconductor device according to any one of claims 1 to 8.

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