Optical detection device and electronic apparatus

Abstract

To provide an optical detection device that is advantageous for miniaturization.SOLUTION: An optical detection device according to one embodiment of the present disclosure includes: a semiconductor layer; a plurality of pixels which include a first pixel having a photoelectric conversion element provided in the semiconductor layer; and a trench which is provided between the adjacent pixels in the semiconductor layer. The first pixel comprises: a transistor which is provided on a first surface side of the semiconductor layer; a first semiconductor region of a first conductivity type which is provided on the first surface side of the semiconductor layer; and a first contact which is electrically connected to the first semiconductor region. The transistor includes a second semiconductor region of a second conductivity type and a third semiconductor region. The first semiconductor region is provided so as to be adjacent to the second semiconductor region. The second semiconductor region and the third semiconductor region have different sizes.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present disclosure relates to light detection devices and electronic devices. [Background technology]

[0002] A device has been proposed in which each pixel has a GND (ground) contact and which performs photoelectric conversion on incident light (Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2019 / 220945 Summary of the Invention [Problem to be solved by the invention]

[0004] It is desirable for a light detecting device to be able to accommodate miniaturization.

[0005] It is desirable to provide a photodetector that is advantageous for miniaturization. [Means for solving the problem]

[0006] A photodetector according to an embodiment of the present disclosure includes a semiconductor layer, a plurality of pixels including a first pixel having a photoelectric conversion element provided in the semiconductor layer, and a trench provided in the semiconductor layer between adjacent pixels. The first pixel includes a transistor provided on a first surface side of the semiconductor layer, a first semiconductor region of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact electrically connected to the first semiconductor region. The transistor has a second semiconductor region and a third semiconductor region of a second conductivity type. The first semiconductor region is provided adjacent to the second semiconductor region. The second semiconductor region and the third semiconductor region have different sizes. A photodetector according to an embodiment of the present disclosure includes a semiconductor layer, a plurality of pixels including a first pixel having a photoelectric conversion element provided in the semiconductor layer, and a trench provided in the semiconductor layer between the plurality of adjacent pixels. The first pixel includes a first semiconductor region of a first conductivity type provided on a first surface side of the semiconductor layer, a first contact electrically connected to the first semiconductor region, a transistor having a second semiconductor region and a third semiconductor region of a second conductivity type respectively provided in the first region on the first surface side of the semiconductor layer, and a separation portion provided around the first region. The first semiconductor region is provided adjacent to the second semiconductor region. The size of the first region on the second semiconductor region side is smaller than the size of the first region on the third semiconductor region side. A photodetector according to an embodiment of the present disclosure includes a semiconductor layer, a plurality of pixels including a first pixel having a first photoelectric conversion element and a second photoelectric conversion element provided in the semiconductor layer, and a trench provided in the semiconductor layer between the plurality of adjacent pixels. The first pixel includes a first transistor provided on a first surface side of the semiconductor layer, a first semiconductor region of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact electrically connected to the first semiconductor region. The first transistor has a second semiconductor region and a third semiconductor region of a second conductivity type. The first semiconductor region is provided adjacent to the second semiconductor region. The second semiconductor region and the third semiconductor region have different sizes. An electronic device according to an embodiment of the present disclosure includes an optical system and a photodetector that receives light transmitted through the optical system. The photodetector includes a semiconductor layer, a plurality of pixels including a first pixel having a photoelectric conversion element provided in the semiconductor layer, and a trench provided in the semiconductor layer between the plurality of adjacent pixels. The first pixel includes a transistor provided on the first surface side of the semiconductor layer, a first semiconductor region of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact electrically connected to the first semiconductor region. The transistor includes a second semiconductor region and a third semiconductor region of a second conductivity type. The first semiconductor region is provided adjacent to the second semiconductor region. The second semiconductor region and the third semiconductor region have different sizes. An electronic device according to an embodiment of the present disclosure includes an optical system and a photodetector that receives light transmitted through the optical system. The photodetector includes a semiconductor layer, a plurality of pixels including a first pixel having a first photoelectric conversion element and a second photoelectric conversion element provided in the semiconductor layer, and a trench provided in the semiconductor layer between the plurality of adjacent pixels. The first pixel includes a first transistor provided on the first surface side of the semiconductor layer, a first semiconductor region of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact electrically connected to the first semiconductor region. The first transistor includes a second semiconductor region and a third semiconductor region of a second conductivity type. The first semiconductor region is provided adjacent to the second semiconductor region. The second semiconductor region and the third semiconductor region have different sizes. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a block diagram showing an example of a schematic configuration of an imaging device which is an example of a light detection device according to a first embodiment of the present disclosure. [Diagram 2] FIG. 2 is a diagram showing an example of pixel arrangement of the imaging device according to the first embodiment of the present disclosure. [Diagram 3] FIG. 3 is a diagram for explaining an example of a circuit configuration of a pixel of the imaging device according to the first embodiment of the present disclosure. [Figure 4A] FIG. 4A is a diagram for explaining another example of a circuit configuration of a pixel of the imaging device according to the first embodiment of the present disclosure. [Figure 4B] FIG. 4B is a diagram for explaining another example of the circuit configuration of the pixel of the imaging device according to the first embodiment of the present disclosure. [Diagram 5] FIG. 5 is a diagram illustrating an example of a planar configuration of a pixel of the imaging device according to the first embodiment of the present disclosure. [Figure 6] FIG. 6 is a diagram illustrating an example of a cross-sectional configuration of a pixel of the imaging device according to the first embodiment of the present disclosure. [Figure 7] FIG. 7 is a diagram illustrating an example of a cross-sectional configuration of a pixel of the imaging device according to the first embodiment of the present disclosure. [Figure 8]FIG. 8 is a diagram showing an example of an arrangement of pixel transistors in the imaging device according to the first embodiment of the present disclosure. [Figure 9] FIG. 9 is a diagram showing another example of an arrangement of pixel transistors in the imaging device according to the first embodiment of the present disclosure. [Figure 10] FIG. 10 is a diagram showing another example of an arrangement of pixel transistors in the imaging device according to the first embodiment of the present disclosure. [Figure 11] FIG. 11 is a diagram illustrating an example of a cross-sectional configuration of the imaging device according to the first embodiment of the present disclosure. [Figure 12] FIG. 12 is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to the first modification of the present disclosure. [Figure 13] FIG. 13 is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to Modification 2 of the present disclosure. [Figure 14] FIG. 14 is a diagram showing another example of the planar configuration of pixels in an imaging device according to the second modification of the present disclosure. [Figure 15A] FIG. 15A is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to Modification 3 of the present disclosure. [Figure 15B] FIG. 15B is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to Modification 3 of the present disclosure. [Figure 16] FIG. 16 is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to the fourth modification of the present disclosure. [Figure 17] FIG. 17 is a diagram illustrating an example of a cross-sectional configuration of a pixel of an imaging device according to the fourth modification of the present disclosure. [Figure 18A] FIG. 18A is a diagram showing another example of a cross-sectional configuration of a pixel of an imaging device according to the fourth modification of the present disclosure. [Figure 18B] FIG. 18B is a diagram showing another example of the cross-sectional configuration of a pixel of an imaging device according to Modification 4 of the present disclosure. [Figure 19A] FIG. 19A is a diagram showing another example of the planar configuration of pixels in an imaging device according to the fourth modification of the present disclosure. [Figure 19B] FIG. 19B is a diagram showing another example of the planar configuration of pixels in an imaging device according to the fourth modification of the present disclosure. [Figure 20] FIG. 20 is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to the fifth modification of the present disclosure. [Figure 21] FIG. 21 is a diagram illustrating an example of pixel arrangement in an imaging device according to the second embodiment of the present disclosure. [Figure 22] FIG. 22 is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to the second embodiment of the present disclosure. [Figure 23] FIG. 23 is a diagram illustrating another example of a planar configuration of pixels in an imaging device according to the second embodiment of the present disclosure. [Figure 24] FIG. 24 is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to the sixth modification of the present disclosure. [Diagram 25] FIG. 25 is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to the seventh modification of the present disclosure. In FIG. [Figure 26] FIG. 26 is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to Modification 8 of the present disclosure. In FIG. [Figure 27A] FIG. 27A is a diagram showing another example of a planar configuration of pixels in an imaging device according to Modification 8 of this disclosure. [Figure 27B] FIG. 27B is a diagram showing another example of the planar configuration of pixels in an imaging device according to Modification 8 of the present disclosure. [Figure 28] FIG. 28 is a diagram showing another example of the planar configuration of pixels in an imaging device according to the eighth modification of the present disclosure. In FIG. [Figure 29] FIG. 29 is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to Modification 9 of the present disclosure. In FIG. [Diagram 30] FIG. 30 is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to Modification 9 of the present disclosure. [Figure 31A] FIG. 31A is a diagram showing another example of a planar configuration of pixels in an imaging device according to Modification 9 of the present disclosure. [Figure 31B] FIG. 31B is a diagram showing another example of the planar configuration of pixels in an imaging device according to Modification 9 of the present disclosure. [Diagram 32] FIG. 32 is a diagram illustrating an example of a planar configuration of a pixel of an imaging device according to a tenth modification of the present disclosure. [Figure 33A] FIG. 33A is a diagram showing another example of the planar configuration of pixels in an imaging device according to the tenth modification of this disclosure. [Figure 33B] FIG. 33B is a diagram showing another example of the planar configuration of pixels in an imaging device according to Modification 10 of the present disclosure. [Figure 33C] FIG. 33C is a diagram showing another example of the planar configuration of pixels in an imaging device according to the tenth modification of this disclosure. [Figure 33D] FIG. 33D is a diagram showing another example of the planar configuration of pixels in an imaging device according to the tenth modification of this disclosure. [Figure 33E] FIG. 33E is a diagram showing another example of the planar configuration of pixels in an imaging device according to the tenth modification of this disclosure. [Figure 33F] FIG. 33F is a diagram showing another example of the planar configuration of pixels in an imaging device according to the tenth modification of this disclosure. [Diagram 34] FIG. 34 is a block diagram illustrating an example of the configuration of an electronic device having an imaging device. [Diagram 35] FIG. 35 is a block diagram showing an example of a schematic configuration of a vehicle control system. [Diagram 36] FIG. 36 is an explanatory diagram showing an example of the installation positions of the outside-of-vehicle information detection unit and the imaging unit. [Figure 37] FIG. 37 is a diagram showing an example of a schematic configuration of an endoscopic surgery system. [Figure 38] FIG. 38 is a block diagram showing an example of a functional configuration of the camera head and the CCU. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The description will be made in the following order. 1. First embodiment 2. Second embodiment 3. Application Examples 4. Application Examples

[0009] <1. First embodiment> 1 is a block diagram showing an example of a schematic configuration of an imaging device which is an example of a photodetection device according to a first embodiment of the present disclosure. The photodetection device is a device capable of detecting incident light. The imaging device 1 which is a photodetection device has a plurality of pixels P having photoelectric conversion units (photoelectric conversion elements) and is configured to perform photoelectric conversion on incident light to generate a signal. The imaging device 1 can receive light transmitted through an optical system (not shown) including an optical lens to generate a signal.

[0010] The imaging device 1 is configured, for example, using a semiconductor substrate (e.g., a silicon substrate) on which a plurality of pixels P are provided. The photoelectric conversion unit of each pixel P of the imaging device 1 is, for example, a photodiode (PD) and is configured to be capable of photoelectrically converting light. The imaging device 1 has, as an imaging area, a region (pixel section 100) in which a plurality of pixels P are two-dimensionally arranged in a matrix. The pixel section 100 of the imaging device 1 can also be referred to as a pixel array in which a plurality of pixels P are arranged. The photoelectric conversion unit of each pixel P can also be referred to as a photoelectric conversion region.

[0011] The imaging device 1 captures incident light (image light) from a subject to be measured via an optical system including an optical lens. The imaging device 1 captures an image of the subject formed by the optical lens. The imaging device 1 can generate pixel signals by photoelectrically converting the received light (e.g., visible light, infrared light, etc.). The imaging device 1, which is a light detection device, is a device that can receive incident light and generate a signal, and can also be called a light receiving device.

[0012] The imaging device 1 (photodetection device) may be configured as an image sensor, for example. The imaging device 1 may be a complementary metal oxide semiconductor (CMOS) image sensor, for example. The imaging device 1 may be used in various electronic devices, such as digital still cameras, video cameras, and mobile phones.

[0013] 1, the imaging device 1 includes a pixel unit 100, a pixel driving unit 111, a signal processing unit 112, a control unit 113, and a processing unit 114. The imaging device 1 is also provided with, for example, a plurality of control lines L1 and a plurality of signal lines L2.

[0014] The control line L1 is a signal line capable of transmitting a signal for controlling the pixel P, and is connected to the pixel driving unit 111 and the pixel P of the pixel unit 100. In the example shown in Fig. 1, in the pixel unit 100, a plurality of control lines L1 are wired for each pixel row made up of a plurality of pixels P arranged in the horizontal direction (row direction). The control line L1 is configured to transmit a control signal for reading out a signal from the pixel P.

[0015] The multiple control lines L1 for each pixel row of the imaging device 1 include, for example, wiring for transmitting a signal for controlling a transfer transistor, wiring for transmitting a signal for controlling a selection transistor, wiring for transmitting a signal for controlling a reset transistor, etc. The control lines L1 can also be called drive lines (pixel drive lines) for transmitting signals for driving the pixels P.

[0016] The signal line L2 is a signal line capable of transmitting a signal from the pixel P, and is connected to the pixel P of the pixel unit 100 and the signal processing unit 112. In the pixel unit 100, for example, the signal line L2 is wired for each pixel column composed of a plurality of pixels P aligned in the vertical direction (column direction). The signal line L2 is a vertical signal line, and is configured to transmit a signal output from the pixel P.

[0017] The pixel driving unit 111 is configured to be able to drive each pixel P of the pixel unit 100. The pixel driving unit 111 is a driving circuit and is configured by a plurality of circuits including, for example, a buffer, a shift register, an address decoder, etc. The pixel driving unit 111 generates a signal for driving the pixel P and outputs the signal to each pixel P of the pixel unit 100 via a control line L1. The pixel driving unit 111 is controlled by the control unit 113 and controls the pixels P of the pixel unit 100.

[0018] The pixel driving unit 111 generates signals for controlling the pixels P, such as a signal for controlling a transfer transistor of the pixel P, a signal for controlling a selection transistor, and a signal for controlling a reset transistor, and supplies the signals to each pixel P via a control line L1. The pixel driving unit 111 can control reading out pixel signals from each pixel P. The pixel driving unit 111 can also be referred to as a pixel control unit configured to be able to control each pixel P. The pixel driving unit 111 and the control unit 113 can also be referred to as a pixel control unit collectively.

[0019] The signal processing unit 112 is configured to be able to execute signal processing of the input pixel signal. The signal processing unit 112 is a signal processing circuit, and has, for example, a load circuit, an AD (Analog Digital) conversion circuit, a horizontal selection switch, etc. As an example, the load circuit is configured by a current source capable of supplying a current to the amplification transistor of the pixel P. The load circuit, together with the amplification transistor of the pixel P, configures, for example, a source follower circuit.

[0020] The signal processing unit 112 may have an amplifier circuit configured to amplify a signal read from the pixel P via the signal line L2. A load circuit, an amplifier circuit, an AD conversion circuit, etc. are provided for each of the multiple signal lines L2, for example. A load circuit, an amplifier circuit, an AD conversion circuit, etc. may be provided for each pixel column of the pixel unit 100.

[0021] A signal output from each pixel P selected and scanned by the pixel driving unit 111 is input to the signal processing unit 112 via a signal line L2. The signal processing unit 112 can perform signal processing such as AD conversion of the signal of the pixel P and CDS (Correlated Double Sampling). The signal of each pixel P transmitted through each signal line L2 is subjected to signal processing by the signal processing unit 112 and output to the processing unit 114.

[0022] The processing unit 114 is configured to be able to perform signal processing on the input signal. The processing unit 114 is a signal processing circuit, and is configured, for example, by a circuit that performs various types of signal processing on pixel signals. The processing unit 114 may include a processor and a memory. The processing unit 114 performs signal processing on pixel signals input from the signal processing unit 112, and outputs the processed pixel signals. The processing unit 114 can perform various types of signal processing, for example, noise reduction processing, tone correction processing, etc.

[0023] The control unit 113 is configured to be able to control each unit of the imaging device 1. The control unit 113 receives an externally provided clock, data instructing an operation mode, and the like, and can also output data such as internal information of the imaging device 1. The control unit 113 is a control circuit, and has, for example, a timing generator configured to be able to generate various timing signals.

[0024] The control unit 113 controls the driving of the pixel driving unit 111 and the signal processing unit 112 based on various timing signals (pulse signals, clock signals, etc.) generated by a timing generator. The control unit 113 and the processing unit 114 may be integrally configured.

[0025] The pixel driving unit 111, the signal processing unit 112, the control unit 113, the processing unit 114, etc. may be provided on one semiconductor substrate, or may be provided separately on multiple semiconductor substrates. The imaging device 1 may have a structure (a stacked structure) configured by stacking multiple substrates. Some or all of the signal processing unit 112, the control unit 113, and the processing unit 114 may be configured integrally.

[0026] Fig. 2 is a diagram showing an example of pixel arrangement of the imaging device according to the first embodiment. A pixel P of the imaging device 1 has a photoelectric conversion unit 12, a lens 21, and a filter 22. As shown in Fig. 2, the incident direction of light from a subject is the Z-axis direction, the left-right direction on the paper perpendicular to the Z-axis direction is the X-axis direction, and the up-down direction on the paper perpendicular to the Z-axis and X-axis directions is the Y-axis direction. In the following figures, directions may be indicated based on the directions of the arrows in Fig. 2.

[0027] In the imaging device 1, for example, a lens 21 and a filter 22 may be provided on the side where light from an optical system such as an imaging lens is incident (see also FIG. 11 described later). The lens 21 (lens unit) is a lens that collects light, and is an optical member also called an on-chip lens. The lens 21 is provided above the photoelectric conversion unit 12, for example, for each pixel P or for each set of multiple pixels P.

[0028] Light from a subject to be measured is incident on the lens 21 via an optical system such as an imaging lens. The lens 21 guides the incident light to the photoelectric conversion unit 12 of the pixel P. The photoelectric conversion unit 12 of the pixel P performs photoelectric conversion on the light incident via the lens 21 and the filter 22.

[0029] The filter 22 is configured to selectively transmit light of a specific wavelength range among the incident light. The filter 22 is, for example, an RGB color filter, a filter that transmits infrared light, etc. The filter 22 is provided above the photoelectric conversion unit 12, for example, for each pixel P or for each set of multiple pixels P.

[0030] The pixels P provided in the pixel section 100 of the imaging device 1 include, for example, a pixel (R pixel) provided with a filter 22 that transmits red (R) light, a pixel (G pixel) provided with a filter 22 that transmits green (G) light, and a pixel (B pixel) provided with a filter 22 that transmits blue (B) light. In the pixel section 100, a plurality of R pixels, a plurality of G pixels, and a plurality of B pixels are repeatedly arranged.

[0031] The R pixels, G pixels, and B pixels are arranged, for example, according to a Bayer array. The R pixels, G pixels, and B pixels can generate R component pixel signals, G component pixel signals, and B component pixel signals, respectively. The imaging device 1 can obtain RGB pixel signals. Note that the pixel arrangement is not limited to the above example, and can be set arbitrarily.

[0032] As an example, the R pixels, G pixels, and B pixels may each be arranged in a 2×2 pixel unit. For example, in the pixel unit 100, four adjacent R pixels, four adjacent G pixels, and four adjacent B pixels are repeatedly arranged. It can also be said that the R pixels, G pixels, and B pixels are each periodically arranged in 2 rows and 2 columns.

[0033] The filter 22 provided in the pixel P of the pixel unit 100 is not limited to a primary color (RGB) color filter, and may be a complementary color filter such as Cy (cyan), Mg (magenta), or Ye (yellow). A filter corresponding to W (white), that is, a filter that transmits light of all wavelengths of incident light, may be disposed. The filter 22 may be a filter that transmits infrared light.

[0034] In addition, the filter 22 may be omitted as necessary in the imaging device 1. The filter 22 may not be provided in some or all of the pixels P of the imaging device 1. For example, the filter 22 may not be provided in the pixels P that receive white (W) light and perform photoelectric conversion.

[0035] 3 is a diagram for explaining an example of a circuit configuration of a pixel of the imaging device according to the first embodiment. The pixel P of the imaging device 1 has a photoelectric conversion unit 12 (photoelectric conversion element), a transfer transistor TR, a floating diffusion FD, and a readout circuit 20. The photoelectric conversion unit 12 is configured to receive light and generate a signal. The photoelectric conversion unit 12 is a light receiving unit (light receiving element) and is configured to be able to generate electric charges by photoelectric conversion.

[0036] The readout circuit 20 is configured to be capable of outputting a signal based on the charge photoelectrically converted. The readout circuit 20 can read out a pixel signal based on the charge photoelectrically converted by the photoelectric conversion unit 12. In the imaging device 1, the readout circuit 20 is provided for a plurality of pixels P. The imaging device 1 has a configuration in which a single readout circuit 20 is shared by a plurality of pixels P. This makes it possible to reduce the number of elements (e.g., the number of transistors) per pixel P (or per photoelectric conversion unit 12). The imaging device 1 can have a structure that is advantageous for miniaturizing pixels.

[0037] 3, a readout circuit 20 is arranged for every four pixels P (referred to as pixels Pa to Pd). Pixels Pa, Pb, Pc, and Pd share one readout circuit 20. For example, 2×2 pixels constituted by adjacent pixels Pa to Pd share one readout circuit 20.

[0038] The imaging device 1 can read out pixel signals of each of the 2×2 pixels by operating the readout circuit 20 in a time-division manner. The imaging device 1 can also read out a pixel signal obtained by adding up the signals of each of the 2×2 pixels. For example, the imaging device 1 can read out a pixel signal corresponding to the sum of charges photoelectrically converted by each of the 2×2 pixels.

[0039] 3, the photoelectric conversion unit 12 is a photodiode (PD) that converts incident light into electric charges. The photoelectric conversion unit 12 (photodiode PD of pixel Pa to photodiode PD of pixel Pd in ​​FIG. 3) can perform photoelectric conversion to generate electric charges according to the amount of received light.

[0040] The transfer transistors TR (in FIG. 3, the transfer transistors TR of pixel Pa to transfer transistors TR of pixel Pd) are configured to be capable of transferring charges photoelectrically converted in the photoelectric conversion unit 12 to the floating diffusion FD. The transfer transistors TR are controlled by a signal STR to electrically connect or disconnect the photoelectric conversion unit 12 and the floating diffusion FD. The transfer transistors TR can transfer charges photoelectrically converted and accumulated in the photoelectric conversion unit 12 to the floating diffusion FD.

[0041] 3, the transfer transistors TR of pixels Pa to Pd are on / off controlled by different signals. The transfer transistor TR of pixel Pa is controlled by a signal STR1, and the transfer transistor TR of pixel Pb is controlled by a signal STR2. The transfer transistor TR of pixel Pc is controlled by a signal STR3, and the transfer transistor TR of pixel Pd is controlled by a signal STR4.

[0042] The floating diffusion FD is an accumulation unit and is configured to be able to accumulate the transferred electric charge. The floating diffusion FD can accumulate the electric charge photoelectrically converted by the photoelectric conversion unit 12. The floating diffusion FD can also be said to be a retention unit capable of retaining the transferred electric charge. The floating diffusion FD accumulates the transferred electric charge and converts it into a voltage according to the capacity of the floating diffusion FD.

[0043] 3, the readout circuit 20 includes an amplification transistor AMP, a selection transistor SEL, and a reset transistor RST. The amplification transistor AMP is configured to generate and output a signal based on the charge accumulated in the floating diffusion FD. The amplification transistor AMP can generate and output a signal based on the charge converted by the photoelectric conversion unit 12.

[0044] 3, the gate of the amplification transistor AMP is electrically connected to the floating diffusion FD of each pixel P, and receives the voltage converted by the floating diffusion FD. The drain of the amplification transistor AMP is connected to a power supply line through which a power supply voltage VDD is supplied.

[0045] The source of the amplifier transistor AMP is connected to a signal line L2 via a selection transistor SEL. The amplifier transistor AMP is configured to generate a signal based on the charge stored in the floating diffusion FD, i.e., a signal based on the voltage of the floating diffusion FD, and output the signal to the signal line L2.

[0046] The selection transistor SEL is configured to be capable of controlling the output of a pixel signal. The selection transistor SEL is electrically connected in series to the amplification transistor AMP, for example, as shown in the example of FIG. 3. The selection transistor SEL is configured to be controlled by a signal SSEL and to be capable of outputting a signal from the amplification transistor AMP to a signal line L2. The selection transistor SEL can control the output timing of the pixel signal.

[0047] The selection transistor SEL is configured to be capable of outputting a signal based on the charge converted by the photoelectric conversion unit 12. The selection transistor SEL can output a pixel signal of the pixel P to a signal line L2. The selection transistor SEL may be electrically connected between a power supply line to which a power supply voltage VDD is applied and the amplification transistor AMP. Furthermore, the selection transistor SEL may be omitted as necessary.

[0048] The reset transistor RST is configured to be able to reset the voltage of the floating diffusion FD. In the example shown in Fig. 3, the reset transistor RST is electrically connected to a power supply line to which a power supply voltage VDD is applied, and is configured to reset the charge of the pixel P.

[0049] The reset transistor RST is controlled by a signal SRST, and can reset the charge accumulated in the floating diffusion FD and reset the voltage of the floating diffusion FD. In the example shown in Fig. 3, the reset transistor RST electrically connects the power supply line and the floating diffusion FD and can discharge the charge accumulated in the floating diffusion FD. The reset transistor RST can discharge the charge accumulated in the photoelectric conversion unit 12 via the transfer transistor TR.

[0050] 4A is a diagram for explaining another example of the circuit configuration of a pixel of the imaging device according to the first embodiment. The readout circuit 20 may have a transistor FDG as in the example shown in FIG. 4A. As an example, the transistor FDG is configured to be able to electrically connect the floating diffusion FD and the reset transistor RST. For example, the transistor FDG is controlled by a signal SFDG to electrically connect or disconnect the floating diffusion FD and the reset transistor RST.

[0051] When the transistor FDG is turned on, the capacitance added to the floating diffusion FD of the pixel P increases, and the conversion efficiency (gain) when converting electric charge to voltage is switched. The transistor FDG is a switching transistor used to set the conversion efficiency. The transistor FDG can change the conversion efficiency by switching the capacitance connected to the gate of the amplification transistor AMP.

[0052] The transistor FDG may be electrically connected in series to the reset transistor RST, or may be electrically connected in parallel to the reset transistor RST. The transistor FDG may be configured to be able to electrically connect the floating diffusion FD and the capacitive element C1, as in the example shown in FIG. 4B. For example, the transistor FDG is controlled by a signal SFDG to electrically connect or disconnect the floating diffusion FD and the capacitive element C1. By switching the connection state of the capacitive element C1, it is possible to change the conversion efficiency.

[0053] The above-mentioned transfer transistor TR, amplification transistor AMP, selection transistor SEL, transistor FDG (switching transistor), and reset transistor RST are each a MOS transistor (MOSFET) having a gate, a source, and a drain terminal.

[0054] 3, 4A, and 4B, the transfer transistor TR, the amplification transistor AMP, the selection transistor SEL, the transistor FDG, and the reset transistor RST are each configured as an NMOS transistor. The transistor of the pixel P may be configured as a PMOS transistor. The transistor of the pixel P may be configured as a 3D transistor, for example, a Fin-type transistor (Fin FET).

[0055] The imaging device 1 may have a configuration in which five or more pixels P, for example, eight pixels P, share one readout circuit 20. For example, in the imaging device 1, a readout circuit 20 is arranged for every eight pixels P, and 2×4 pixels share one readout circuit 20.

[0056] The pixel driving unit 111 (see Figure 1) of the imaging device 1 supplies control signals to the gates of the transfer transistor TR, selection transistor SEL, transistor FDG, reset transistor RST, etc. of each pixel P via the above-mentioned control line L1, turning the transistors on (conducting state) or off (non-conducting state).

[0057] The multiple control lines L1 for each pixel row of the imaging device 1 include, for example, a wiring for transmitting a signal STR that controls the transfer transistor TR, a wiring for transmitting a signal SSEL that controls the selection transistor SEL, a wiring for transmitting a signal SFDG that controls the transistor FDG, a wiring for transmitting a signal SRST that controls the reset transistor RST, and the like.

[0058] The transfer transistor TR, the selection transistor SEL, the transistor FDG, the reset transistor RST, and the like are on / off controlled by a pixel driving unit 111. The pixel driving unit 111 controls the readout circuit 20 of each pixel P to output a pixel signal from each pixel P to a signal line L2. The pixel driving unit 111 can control the reading out of the pixel signal of each pixel P to the signal line L2.

[0059] Fig. 5 is a diagram showing an example of a planar configuration of a pixel of the imaging device according to the first embodiment. Figs. 6 and 7 are diagrams showing an example of a cross-sectional configuration of a pixel of the imaging device. Fig. 6 shows an example of a pixel configuration in the direction of line A-A' shown in Fig. 5. Fig. 7 shows an example of a pixel configuration in the direction of line B-B' shown in Fig. 5.

[0060] Each pixel P of the imaging device 1 has, for example, a structure shown in Figures 5 to 7. The pixel P has a photoelectric conversion unit 12, a transfer transistor TR, a floating diffusion FD, a pixel transistor 30, and a semiconductor region 35. The pixel transistor 30 is, for example, a transistor of the readout circuit 20 described above.

[0061] The pixel transistor 30 is used as an amplification transistor AMP, a selection transistor SEL, a transistor FDG, a reset transistor RST, or the like. The pixel transistor 30 of a part of the pixels P may be a dummy transistor. The readout circuit 20 may include a dummy transistor as the pixel transistor 30.

[0062] Each transistor of the readout circuit 20, such as the amplification transistor AMP, the selection transistor SEL, the transistor FDG, and the reset transistor RST, is provided, for example, separately for a plurality of pixels P as pixel transistors 30 and shared by the plurality of pixels P. By configuring the imaging device 1 in this manner, it is possible to reduce the number of transistors in one pixel P.

[0063] The imaging device 1 is configured using a substrate 101 including a semiconductor layer 110. The substrate 101 is configured of a semiconductor substrate such as a Si (silicon) substrate. On the substrate 101 including the semiconductor layer 110, for example, the above-mentioned photoelectric conversion unit 12 and readout circuit 20, etc. are formed.

[0064] The substrate 101 may be formed using an SOI (Silicon On Insulator) substrate, a SiGe (Silicon Germanium) substrate, other compound semiconductor materials, etc. In the example shown in FIGS. 5 to 7, the substrate 101 is formed to include a semiconductor layer 110 and a wiring layer 120.

[0065] 6 and 7, the semiconductor layer 110 has a surface 11S1 and a surface 11S2 that face each other. The surface 11S2 is the surface opposite to the surface 11S1. The surface 11S1 of the semiconductor layer 110 is, for example, an element formation surface on which elements such as transistors are formed. A gate electrode, a gate insulating film (for example, a gate oxide film), and the like are provided on the surface 11S1 of the semiconductor layer 110. The surface 11S2 of the semiconductor layer 110 is, for example, a light receiving surface (light incident surface).

[0066] In the semiconductor layer 110, a plurality of photoelectric conversion units 12 (photoelectric conversion elements) are provided along a surface 11S1 and a surface 11S2 of the semiconductor layer 110. In the semiconductor layer 110, for example, a plurality of photoelectric conversion units 12 are embedded and formed. The photoelectric conversion units 12 can also be called a photoelectric conversion layer. The photoelectric conversion units 12 are provided between the surface 11S1 and the surface 11S2 of the semiconductor layer 110.

[0067] The semiconductor layer 110 has a well 25 as shown in Fig. 6 and Fig. 7. The well 25 is, for example, a p-type semiconductor region, or a p-type well (p-well). In the example shown in Fig. 6 and Fig. 7, the well 25, which is a p-type well region, is provided in the semiconductor layer 110. The photoelectric conversion unit 12 is configured to include a semiconductor region 15 provided in the well 25. The semiconductor region 15 is, for example, an n-type semiconductor region.

[0068] A transfer transistor TR, a floating diffusion FD, a pixel transistor 30, a semiconductor region 35, and the like are provided on the surface 11S1 side of the semiconductor layer 110. The floating diffusion FD includes an n-type semiconductor region, for example, as shown in FIG.

[0069] As shown in Fig. 5 to Fig. 7, the imaging device 1 is provided with trenches 91 and trenches 92. The trenches 91 and trenches 92 are each provided between adjacent pixels P in the semiconductor layer 110. The trenches 91 and trenches 92 are provided between the photoelectric conversion units 12 of adjacent pixels P, and separate the pixels P (or the photoelectric conversion units 12). It can also be said that the pixels P have a structure partitioned by the trenches 91 and trenches 92.

[0070] The trenches 91 and 92 are each an isolation portion (groove portion) and are made of, for example, an insulating material. At least a portion of each of the trenches 91 and 92 is provided at the boundary between adjacent pixels P (or photoelectric conversion portions 12). The trench 91 has a shallow trench isolation (STI) structure and is provided on the surface 11S1 side of the semiconductor layer 110. The trench 92 has a full trench isolation (FTI) structure and is provided so as to penetrate the semiconductor layer 110.

[0071] 5 to 7, the trench 91 is provided in the semiconductor layer 110 so as to surround the transfer transistor TR, the floating diffusion FD, the pixel transistor 30, the semiconductor region 35, etc. In addition, the trench 92 is provided in the semiconductor layer 110 so as to surround the photoelectric conversion unit 12. The trenches 91 and 92 are provided in a lattice shape in a plan view so as to surround each of the photoelectric conversion units 12 of each pixel P. The trenches 91 and 92 can also be referred to as inter-pixel isolation units or inter-pixel isolation walls.

[0072] In the trenches 91 and 92, for example, an insulating film (insulator) such as an oxide film (e.g., a silicon oxide film) or a nitride film (e.g., a silicon nitride film) is provided. The trenches 91 and 92 may be filled with polysilicon, a metal material, another insulating material, or the like. Furthermore, a gap (cavity) may be provided in the trenches 91 and 92. The trench 92 may be formed in the trench 91. For example, the trench 92 may be provided from the trench 91 provided on the surface 11S1 side of the semiconductor layer 110 to the surface 11S2 of the semiconductor layer 110.

[0073] Further, the imaging device 1 is provided with a trench 93. The trench 93 is, for example, an isolation portion (groove portion) having an STI structure. An insulating film such as an oxide film (for example, a silicon oxide film) or a nitride film (for example, a silicon nitride film) is provided in the trench 93. The trench 93 (isolation portion) is provided on the surface 11S1 side of the semiconductor layer 110 and isolates the elements. The trench 93 is formed between the pixel transistor 30 and the floating diffusion FD, between the pixel transistor 30 and the transfer transistor TR, between the transfer transistor TR and the semiconductor region 35, etc.

[0074] The imaging device 1 is provided with a plurality of regions (active regions) partitioned by isolation portions (trenches). The imaging device 1 has, for example, an active region 81 and an active region 82 provided in a semiconductor layer 110 of a substrate 101. As an example, as shown in Fig. 5, in each pixel P of the imaging device 1, an active region 81 and an active region 82 surrounded by a trench 93 (or trench 91) are formed. The active regions 81 and 82 are, for example, regions isolated by the trench 93.

[0075] The active region 81 and the active region 82 are, for example, regions of the semiconductor layer 110 (or the well 25 of the semiconductor layer 110) electrically isolated by trenches 93 and 91, and are island-shaped regions. As in the examples shown in FIGS. 5 and 6, the pixel transistor 30 and the semiconductor region 35 are provided in the active region 81. In addition, the transfer transistor TR and the floating diffusion FD are provided in the active region 82.

[0076] The transfer transistor TR has a gate insulating film 45 and a gate electrode 46. The transfer transistor TR has a vertical gate structure, for example. At least a part of each of the gate insulating film 45 and the gate electrode 46 of the transfer transistor TR is provided in the semiconductor layer 110. At least a part of each of the gate insulating film 45 and the gate electrode 46 is provided by digging into the semiconductor layer 110, for example, as shown in the example of FIG.

[0077] For example, the gate electrode 46 and the gate insulating film 45 of the transfer transistor TR may be formed in the semiconductor layer 110 so as to reach the photoelectric conversion unit 12. The transfer transistor TR has a vertical gate (VG) structure and may also be called a vertical transistor. In the example shown in FIG. 7, each of the gate electrode 46 and the gate insulating film 45 of the transfer transistor TR is disposed so as to be partially embedded in the semiconductor layer 110, for example.

[0078] 7, the gate electrode 46 of the transfer transistor TR may be provided in the semiconductor layer 110 from between the floating diffusion FD and the trench 91 to the region of the photoelectric conversion unit 12. The gate insulating film 45 is formed along the gate electrode 46 in the semiconductor layer 110. The transfer transistor TR may have a planar gate structure. The transfer transistor TR may be configured as, for example, a planar type transistor.

[0079] The semiconductor region 35 is a semiconductor region of the same conductivity type as the well 25, and is provided on the surface 11S1 side of the semiconductor layer 110. The semiconductor region 35 is provided relative to the well 25 in the active region 81, and is electrically connected to the well 25. The semiconductor region 35 is, for example, a p-type semiconductor region, and is a region formed using p-type impurities.

[0080] The semiconductor region 35 has, for example, a higher impurity concentration than the impurity concentration of the well 25, and is a p+ type semiconductor region. The semiconductor region 35, which is a p+ region, is a p+ type diffusion region and can also be said to be a p+ type conductive region. The semiconductor region 35 is electrically connected to a contact 55. The contact 55 is provided in the wiring layer 120 of the substrate 101.

[0081] 6, the semiconductor region 35 is connected to a contact 55 provided on the semiconductor region 35, and is electrically connected to a wiring (not shown) of the wiring layer 120 via the contact 55. The contact 55 is electrically connected to the well 25 by the semiconductor region 35.

[0082] The contact 55 is, for example, in ohmic contact with the semiconductor region 35, and is electrically connected to the well 25 via the semiconductor region 35. A predetermined potential (voltage) is supplied to the region of the well 25 electrically connected to the semiconductor region 35 by the wiring of the wiring layer 120, the contact 55, etc.

[0083] The contact 55 is a well contact, and the semiconductor region 35 is a well contact region. The contact 55 and the semiconductor region 35 are disposed, for example, for each pixel P. The semiconductor region 35 and the contact 55 together can also be referred to as a well contact region.

[0084] The semiconductor region 35 is electrically connected to a reference potential line in the wiring layer 120 via, for example, a contact 55, and a reference potential is applied to the semiconductor region 35 and the well 25. As an example, a GND potential (ground potential) is applied to the semiconductor region 35 and the well 25 via the contact 55.

[0085] The pixel transistor 30 has a semiconductor region 31, a semiconductor region 32, a semiconductor region 33, a gate insulating film 41, and a gate electrode 42. The semiconductor regions 31 to 33 are each provided for a well 25 in an active region 81. It can also be said that the semiconductor regions 32, 33, etc. are arranged to replace part of the well 25. The semiconductor region 31 and the semiconductor region 32 (or the semiconductor region 33) have mutually different conductivity types.

[0086] The semiconductor region 31 is a region where a channel is formed (channel region). The semiconductor region 31 is formed in a region below the gate electrode 42 and the gate insulating film 41, for example, as shown in the example diagrammatically by the dashed line in Fig. 5. The semiconductor region 31 is, for example, a p-type semiconductor region, and is a region formed using p-type impurities. The semiconductor region 31 is a p-type diffusion region, and can also be called a p-type conductive region.

[0087] The semiconductor region 32 and the semiconductor region 33 are the source region and the drain region of the pixel transistor 30. One of the semiconductor regions 32, 33 is the source region of the pixel transistor 30, and the other of the semiconductor regions 32, 33 is the drain region of the pixel transistor 30. The semiconductor region 32 and the semiconductor region 33 can be configured to have different sizes (width, area, etc.) from each other, as in the example shown in FIG.

[0088] The semiconductor region 32 and the semiconductor region 33 are, for example, n-type semiconductor regions and are regions formed using n-type impurities. The semiconductor region 32 and the semiconductor region 33 are, for example, formed by doping (adding) n-type impurities into a region of the semiconductor layer 110. The semiconductor region 32 and the semiconductor region 33 are, for example, n-type diffusion regions and can also be called n-type conductive regions.

[0089] The semiconductor region 32 is connected to a contact 52 provided on the semiconductor region 32, and is electrically connected to a wiring (not shown) of the wiring layer 120 via the contact 52. The semiconductor region 33 is connected to a contact 53 provided on the semiconductor region 33, and is electrically connected to a wiring of the wiring layer 120 via the contact 53.

[0090] A semiconductor region 32 and a semiconductor region 33 are disposed around the gate electrode 42 of the pixel transistor 30. The pixel transistor 30 having the semiconductor regions 32 and 33 is formed in a region around the transfer transistor TR. The pixel transistor 30 is configured as, for example, a planar type transistor. Note that the shape of the pixel transistor 30 is not limited to the example shown in FIG. 5 and can be changed as appropriate.

[0091] The gate insulating film 41 of the pixel transistor 30 is provided on a channel region (semiconductor region 31) of the pixel transistor 30. The gate insulating film 41 (e.g., a gate oxide film) is provided between the semiconductor region 31, which is the channel region, and a gate electrode 42. The gate electrode 42 is provided on the gate insulating film 41. The gate electrode 42 is provided above the semiconductor region 31 of the semiconductor layer 110 with the gate insulating film 41 interposed therebetween.

[0092] The pixel transistor 30 may be configured as a Fin type transistor. For example, the gate electrode 42 of the pixel transistor 30 is provided on the surface 11S1 side of the semiconductor layer 110 so as to sandwich a part of the semiconductor layer 110. As an example, the part of the gate electrode 42 is provided in the semiconductor layer 110 so as to sandwich a part of the semiconductor layer 110 that becomes a channel region of the pixel transistor 30, with the gate insulating film 41 interposed therebetween.

[0093] For example, the gate electrode 42 of the pixel transistor 30 and the semiconductor region 31 serving as the channel region may each have a fin shape. The pixel transistor 30 may have a portion of the gate electrode 42 provided by digging into the semiconductor layer 110 as a fin portion. The pixel transistor 30 may have a dug-in gate structure. For example, the pixel transistor 30 has a dug-in fin structure and may also be called a dug-in fin transistor.

[0094] The gate insulating film 41 of the pixel transistor 30 and the gate insulating film 45 of the transfer transistor TR are each formed of, for example, a single layer film made of one of silicon oxide (SiO), silicon oxynitride (SiON), hafnium oxide (HfO), etc., or a laminated film made of two or more of these. The gate insulating films 41 and 45 may be formed using a high dielectric constant material having a dielectric constant higher than that of silicon oxide, such as a hafnium-based insulating film.

[0095] The gate electrode 42 of the pixel transistor 30 and the gate electrode 46 of the transfer transistor TR are made of, for example, polysilicon (Poly-Si). The gate electrodes 42 and 46 may be made of a metal material or a metal compound. The gate electrodes 42 and 46 may be made of, for example, titanium nitride (TiN), tantalum nitride (TaN), tungsten (W), or the like. Sidewalls may be provided on the side surfaces of the gate electrode 42 and the gate electrode 46, respectively.

[0096] The contacts 52, 53, and 55 are each made of a conductive material. For example, the contacts 52, 53, and 55 are each formed by embedding (filling) a conductive material such as tungsten (W) in a contact hole. Each of the contacts 52, 53, and 55 may be made of a metal material such as aluminum (Al) or copper (Cu), or may be made of other materials.

[0097] In the imaging device 1, the semiconductor region 35 is provided adjacent to the pixel transistor 30. For example, in the pixel P, the semiconductor region 35 is provided adjacent to the source region or the drain region of the pixel transistor 30. The semiconductor region 35 and the source region or the drain region of the pixel transistor 30 are provided in an active region 81, as shown in FIG. 5 and other figures. For example, the semiconductor region 35 is disposed adjacent to the semiconductor region 33 of the pixel transistor 30 on the surface 11S1 side of the semiconductor layer 110, with a part of the well 25 interposed therebetween.

[0098] The semiconductor region 35 is provided, for example, adjacent to an end (side) of the semiconductor region 33 which is the source region or drain region of the pixel transistor 30. The semiconductor region 35 may be disposed adjacent to the semiconductor region 32. The semiconductor region 35 may also be provided in the vicinity of the gate of the pixel transistor 30.

[0099] In the imaging device 1, the semiconductor region 35 is provided adjacent to the pixel transistor 30. This allows the imaging device 1 to have a structure that is advantageous for miniaturization. Compared to a case in which the semiconductor region 35 and the pixel transistor 30 are provided in different active regions, the area of ​​the region in which the transistors and the like are arranged in the pixel P can be increased. It is possible to increase the size (e.g., gate width, gate length, etc.) of the transistor arranged in the pixel P.

[0100] In this embodiment, it is possible to increase the area of ​​the pixel transistor 30 as shown in the example of Fig. 5. This allows the size of the transistor in the readout circuit 20, for example the amplifying transistor AMP, to be increased, making it possible to suppress noise mixed into the pixel signal.

[0101] In particular, it is possible to improve the area efficiency in fine pixels and increase the size of the pixel transistor 30. This makes it possible to improve the characteristics of the transistors (amplification transistor AMP, selection transistor SEL, transistor FDG, reset transistor RST, etc.) of the readout circuit 20.

[0102] In the imaging device 1 according to the present embodiment, the source region and the drain region of the pixel transistor 30 are configured to have different sizes. For example, in the imaging device 1, of the semiconductor region 32 and the semiconductor region 33 of the pixel transistor 30, the size of the semiconductor region 33 adjacent to the semiconductor region 35, which is a well contact region, is smaller than the size of the semiconductor region 32.

[0103] 5, the semiconductor region 33 and the semiconductor region 35 are provided adjacent to each other in the X-axis direction. As in the example shown in FIG. 5, the width of the semiconductor region 33 in the X-axis direction may be smaller than the width of the semiconductor region 32 in the X-axis direction. Of the semiconductor region 32 and the semiconductor region 33, the size (e.g., width) of the semiconductor region 33 is made relatively small. Note that when the semiconductor region 35 is disposed adjacent to the semiconductor region 32, the size (e.g., width) of the semiconductor region 32 may be smaller than the size of the semiconductor region 33.

[0104] Thus, in the imaging device 1, the semiconductor region 33 has a size or shape different from that of the semiconductor region 32. For example, the size of the semiconductor region 33 is determined so that the interval (distance) between the semiconductor region 35, which is a well contact region, and the semiconductor region 33, which is a source region (or drain region), is secured. This makes it possible to alleviate the electric field (potential gradient) between the well contact region and the semiconductor region 33. This makes it possible to suppress noise from being mixed into pixel signals and suppress deterioration in image quality.

[0105] In particular, even in fine pixels, the electric field generated between the well contact region (semiconductor region 35) and the semiconductor region 33 (or semiconductor region 32) can be alleviated. This makes it possible to suppress the quality of the pixel signal from being degraded, and to suppress degradation of the image quality. For example, it becomes possible to suppress the occurrence of defects (faults) such as white dots in an image due to a strong electric field between the well contact region and the source region (or drain region) of the pixel transistor 30.

[0106] Fig. 8 is a diagram showing an example of the arrangement of pixel transistors in the imaging device according to the first embodiment. In Fig. 8, 2 x 2 pixels are shown, with four pixels P being pixels Pa to Pd, which share a readout circuit 20. The other pixels P in the imaging device 1 may also have a similar configuration to that shown in Fig. 8.

[0107] 8, the pixel Pa is provided with an amplification transistor AMP as the pixel transistor 30. The pixel Pb is provided with a selection transistor SEL as the pixel transistor 30. The pixel Pc is provided with a reset transistor RST as the pixel transistor 30. Furthermore, the pixel Pd is provided with a dummy transistor as the pixel transistor 30.

[0108] In the imaging device 1, for example, a wiring L3 is provided as in the example shown in Fig. 8. The floating diffusion FD of each of the multiple pixels P that share the readout circuit 20 is electrically connected to the transistor of the readout circuit 20 via the wiring L3. In the example shown in Fig. 8, the floating diffusion FD of each of the pixels Pa to Pd is electrically connected to the gate electrode of the amplification transistor AMP, which is the pixel transistor 30 of the pixel Pa, via the wiring L3.

[0109] The wiring L3 is a wiring shared by the four pixels Pa to Pd. The wiring L3 is formed using a metal material such as aluminum (Al) or tungsten (W). The wiring L3 may be formed using polysilicon (Poly-Si) or another conductive material.

[0110] 9 and 10 are diagrams showing other examples of arrangement of pixel transistors in the imaging device according to the first embodiment. The transistors of the readout circuit 20 may be arranged as shown in Fig. 9 or 10. In the example shown in Fig. 9, the readout circuit 20 has an amplification transistor AMP, a selection transistor SEL, a reset transistor RST, and a transistor FDG.

[0111] 9, the pixel Pa has an amplification transistor AMP as the pixel transistor 30. The pixel Pb has a selection transistor SEL as the pixel transistor 30. The pixel Pc has a reset transistor RST as the pixel transistor 30. Moreover, the pixel Pd has a transistor FDG as the pixel transistor 30.

[0112] The readout circuit 20 may have a plurality of amplification transistors AMP (amplification transistor AMP1 and amplification transistor AMP2 in FIG. 10) electrically connected in parallel to each other. In the example shown in FIG. 10, an amplification transistor AMP1 is arranged in pixel Pa, and an amplification transistor AMP2 is arranged in pixel Pb. The readout circuit 20 may generate and output a pixel signal by the amplification transistors AMP1 and AMP2 connected in parallel to each other. This makes it possible to reduce noise mixed into the pixel signal.

[0113] Fig. 11 is a diagram showing an example of a cross-sectional configuration of an imaging device according to the first embodiment. As shown in Fig. 11, imaging device 1 has, for example, a light guiding section 90, a semiconductor layer 110, and a wiring layer 120. Imaging device 1 has a configuration in which light guiding section 90, semiconductor layer 110, and wiring layer 120 are stacked in the Z-axis direction.

[0114] 11, a wiring layer 120 is provided on a surface 11S1 side of the semiconductor layer 110. A light guiding section 90 is provided on a surface 11S2 side of the semiconductor layer 110. The light guiding section 90 is provided on the side where light from the optical system is incident, and the wiring layer 120 is provided on the side opposite to the side where the light is incident. The imaging device 1 is a so-called backside illumination type imaging device.

[0115] The wiring layer 120 includes, for example, a conductor film and an insulating film, and has a plurality of wirings and vias (VIAs). The wiring layer 120 includes, for example, two or more layers of wirings, or three or more layers of wirings. The wiring layer 120 may include five or more layers of wirings. The wiring layer 120 has a configuration in which a plurality of wirings are stacked with an insulating film interposed therebetween as an interlayer insulating film (interlayer insulating layer). The insulating film of the wiring layer 120 can also be called an interlayer insulating film (interlayer insulating layer).

[0116] The wiring of the wiring layer 120 is formed using a metal material such as aluminum (Al), tungsten (W), copper (Cu), etc. The wiring of the wiring layer 120 may be configured using polysilicon (Poly-Si) or other conductive materials. The interlayer insulating film is formed using, for example, silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), etc.

[0117] As described above, for example, the photoelectric conversion unit 12, the readout circuit 20, and the like are provided in the semiconductor layer 110 and the wiring layer 120. In addition, the pixel driving unit 111, the signal processing unit 112, the control unit 113, the processing unit 114, and the like described above can be provided on a substrate separate from the semiconductor layer 110, or on the semiconductor layer 110 and the wiring layer 120.

[0118] The trenches 91 and 92 are provided between adjacent photoelectric conversion units 12 to separate the photoelectric conversion units 12. The trenches 91 and 92 are provided in the semiconductor layer 110 so as to surround the photoelectric conversion units 12. Note that, as shown in FIG. 8 and other figures, the trenches 91 and 92 are formed in a lattice shape in a plan view and are arranged so as to surround each of the multiple photoelectric conversion units 12.

[0119] 11 is laminated on the semiconductor layer 110 in a thickness direction perpendicular to the surface 11S2 of the semiconductor layer 110. The light guiding section 90 has, for example, a lens 21 and a filter 22, and guides incident light to the semiconductor layer 110 side.

[0120] The lens 21 is provided on the filter 22, for example, for each pixel P or for each set of multiple pixels P. Light from a subject is incident on the lens 21 via an optical system such as an imaging lens. The photoelectric conversion unit 12 performs photoelectric conversion on the light incident via the lens 21 and the filter 22.

[0121] 11, the imaging device 1 is provided with a light shielding portion 23. The light shielding portion 23 (light shielding film) is made of a material that blocks light, and is provided at the boundary between adjacent pixels P. For example, at least a part of the light shielding portion 23 (light shielding material) is provided between adjacent filters 22, and may be located at the boundary between the adjacent filters 22.

[0122] The light shielding portion 23 is made of, for example, a metal material that blocks light (aluminum (Al), tungsten (W), copper (Cu), etc.). The light shielding portion 23 may be made of a material that absorbs light. The light shielding portion 23 may be made of, for example, polysilicon. In the imaging device 1, the light shielding portion 23 is provided to suppress light leakage to surrounding pixels P. Unnecessary light is prevented from leaking to the surroundings, and color mixing can be suppressed.

[0123] The imaging device 1 may have at least one of a fixed charge film and an anti-reflection film. The fixed charge film and the anti-reflection film are provided, for example, on the surface 11S2 side of the semiconductor layer 110. The fixed charge film is a film having a fixed charge, and may be formed using a high dielectric material. As an example, the fixed charge film is made of a metal oxide such as hafnium oxide or aluminum oxide.

[0124] The fixed charge film is, for example, a film having a negative fixed charge. As an example, the fixed charge film is provided between the semiconductor layer 110 and the filter 22. By providing the fixed charge film, the generation of dark current at the interface of the semiconductor layer 110 is suppressed. The fixed charge film may be formed of another metal oxide film, or may be formed using a metal nitride film or a metal oxynitride film. As the fixed charge film, a film having a positive fixed charge may be provided.

[0125] The anti-reflection film is, for example, made of an insulating material such as silicon nitride (SiN) or silicon oxide (SiO). The anti-reflection film is provided, for example, so as to be laminated with a fixed charge film. The anti-reflection film is provided, for example, between the semiconductor layer 110 and the filter 22, and reduces (suppresses) reflection. The anti-reflection film may be made of a metal compound (metal oxide, metal nitride, etc.) such as aluminum oxide, hafnium oxide, or tantalum oxide, or may be made of other materials.

[0126] [Actions and Effects] The photodetector according to the present embodiment includes a semiconductor layer (semiconductor layer 110), a plurality of pixels including a first pixel (e.g., pixel Pa) having a photoelectric conversion element (photoelectric conversion unit 12) provided in the semiconductor layer, and trenches (trench 91, trench 92) provided in the semiconductor layer between the plurality of adjacent pixels. The first pixel includes a transistor (pixel transistor 30) provided on the first surface side of the semiconductor layer, a first semiconductor region (semiconductor region 35) of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact (contact 55) electrically connected to the first semiconductor region. The transistor has a second semiconductor region and a third semiconductor region (semiconductor region 32, semiconductor region 33) of a second conductivity type. The first semiconductor region is provided so as to be adjacent to the second semiconductor region (e.g., semiconductor region 33). The second semiconductor region and the third semiconductor region have different sizes.

[0127] In the photodetector (imaging device 1) according to this embodiment, the semiconductor region 35 is provided adjacent to the semiconductor region 33 which is the source region or drain region of the pixel transistor 30. The semiconductor region 33 and the semiconductor region 32 have different sizes. Therefore, the imaging device 1 can have a structure that is advantageous for miniaturization of pixels. It is possible to reduce the electric field between the semiconductor region 35 and the semiconductor region 33. It is possible to realize a photodetector that is advantageous for miniaturization.

[0128] Next, a modified example of the present disclosure will be described. In the following, the same components as those in the above embodiment are denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

[0129] (1-1. Variation 1) 12 is a diagram showing an example of a planar configuration of a pixel of an imaging device according to Modification 1 of the present disclosure. The imaging device 1 may be configured so that the size (area, width, etc.) of the active region 81 on the source region side is different from the size of the active region 81 on the drain region side. The active region 81 is configured to have different sizes (e.g. widths) on the source region side and the drain region side of the pixel transistor 30, for example.

[0130] In the imaging device 1, as one example, the size of the active region 81 on the semiconductor region 33 side closer to the semiconductor region 35, which is a well contact region, may be smaller than the size of the active region 81 on the semiconductor region 32 side. As in the example shown in Fig. 12, the width W1 in the X-axis direction of the active region 81 on the semiconductor region 33 side may be smaller than the width W2 in the X-axis direction of the active region 81 on the semiconductor region 32 side.

[0131] In the imaging device 1, the size of the semiconductor region 33 close to the semiconductor region 35, which is a well contact region, may be smaller than the size of the semiconductor region 32. In the example shown in Fig. 12, the width of the semiconductor region 33 in the X-axis direction is smaller than the width of the semiconductor region 32 in the X-axis direction.

[0132] When the semiconductor region 35 is disposed adjacent to the semiconductor region 32, the size of the active region 81 on the semiconductor region 32 side closer to the semiconductor region 35 may be smaller than the size of the active region 81 on the semiconductor region 33 side. For example, the width of the active region 81 on the semiconductor region 32 side may be smaller than the width of the active region 81 on the semiconductor region 33 side.

[0133] In the photodetector according to this modification, the first pixel (pixel P) has a first region (active region 81) of a semiconductor layer in which the second semiconductor region and the third semiconductor region (semiconductor region 32, semiconductor region 33) are provided, and a separation portion (trench 93) provided around the first region. The size of the first region on the second semiconductor region side is smaller than the size of the first region on the third semiconductor region side.

[0134] In the photodetector (imaging device 1) according to this modification, for example, in a region where the pixel transistor 30 is arranged, the size of the active region 81 on the semiconductor region 33 side is smaller than the size of the active region 81 on the semiconductor region 32 side. This makes it possible to reduce the electric field between the semiconductor region 35 and the semiconductor region 33. It is possible to prevent noise from being mixed into pixel signals and to prevent deterioration in image quality.

[0135] (1-2. Variation 2) Fig. 13 is a diagram showing an example of a planar configuration of a pixel of an imaging device according to Modification 2. Of a portion of an active region 81 near a semiconductor region 35 and the semiconductor region 33 (or the semiconductor region 32), only the portion of the active region 81 may be made smaller as in the example shown in Fig. 13.

[0136] For example, the size of the active region 81 on the semiconductor region 33 side closer to the semiconductor region 35 is smaller than the size of the active region 81 on the semiconductor region 32 side. In the example shown in Fig. 13, the width W1 in the X-axis direction of the active region 81 on the semiconductor region 33 side is smaller than the width W2 in the X-axis direction of the active region 81 on the semiconductor region 32 side.

[0137] The size of the semiconductor region 33 close to the semiconductor region 35 may be approximately the same as the size of the semiconductor region 32, or may be larger than the size of the semiconductor region 32. When the semiconductor region 35 is provided adjacent to the semiconductor region 32, the size of the active region 81 on the semiconductor region 32 side close to the semiconductor region 35 may be smaller than the size of the active region 81 on the semiconductor region 33 side.

[0138] The photodetector according to this modification includes a semiconductor layer (semiconductor layer 110), a plurality of pixels including a first pixel having a photoelectric conversion element provided in the semiconductor layer, and trenches (trench 91, trench 92) provided in the semiconductor layer between the plurality of adjacent pixels. The first pixel includes a first semiconductor region (semiconductor region 35) of a first conductivity type provided on the first surface side of the semiconductor layer, a first contact (contact 55) electrically connected to the first semiconductor region, a transistor (pixel transistor 30) having a second semiconductor region and a third semiconductor region (semiconductor region 32, semiconductor region 33) of a second conductivity type respectively provided in the first region on the first surface side of the semiconductor layer, and a separation portion (trench 93) provided around the first region (active region 81). The first semiconductor region is provided so as to be adjacent to the second semiconductor region. The size of the first region on the second semiconductor region side is smaller than the size of the first region on the third semiconductor region side.

[0139] In the photodetector (imaging device 1) according to this modification, for example, the size of the active region 81 on the semiconductor region 33 side is smaller than the size of the active region 81 on the semiconductor region 32 side. This makes it possible to reduce the electric field between the semiconductor region 35 and the semiconductor region 33. It is possible to prevent noise from being mixed into pixel signals and to prevent deterioration in image quality.

[0140] Fig. 14 is a diagram showing another example of the planar configuration of a pixel of an imaging device according to Modification 2. In the imaging device 1, as shown by a dotted line in Fig. 14, the width of the active region 81 in the X-axis direction (or Y-axis direction) may, for example, gradually decrease (become thinner). In the example shown in Fig. 14, the active region 81 has a portion P1 whose width decreases toward the semiconductor region 35. In this case as well, it is possible to reduce the electric field between the well contact region and the source region (or drain region) of the pixel transistor 30, and to prevent defects such as white spots from occurring in an image.

[0141] (1-3. Variation 3) 15A and 15B are diagrams showing an example of a planar configuration of a pixel of an imaging device according to Modification 3. The shape of the semiconductor region 31 serving as a channel region is not limited to the above example. The shape of the active region 81 below the gate electrode 42 of the pixel transistor 30 and the shape of the semiconductor region 31 can be changed as appropriate.

[0142] In the imaging device 1, the width of the semiconductor region 31 in the X-axis direction (or the Y-axis direction) may become smaller as it approaches the semiconductor region 33 (or the semiconductor region 32) adjacent to the semiconductor region 35, which is a well contact region. In the example shown in FIG. 15A, it can also be said that the width of the semiconductor region 31 in the X-axis direction becomes smaller as it moves away from the semiconductor region 32.

[0143] The semiconductor region 31 may have a trapezoidal shape, for example, as shown in Fig. 15A. The semiconductor region 31 may have a polygonal shape or other shapes. As shown in Fig. 15B, the semiconductor region 31 may have a pentagonal shape in a plan view.

[0144] In the photodetector (imaging device 1) according to this modification, the size of the channel region (semiconductor region 31) on the second semiconductor region (e.g., semiconductor region 33) side is smaller than the size of the channel region on the third semiconductor region (e.g., semiconductor region 32) side. In the case of this modification as well, it is possible to reduce the electric field between the semiconductor region 35 and the semiconductor region 33. It is possible to prevent noise from being mixed into pixel signals and to prevent deterioration in image quality.

[0145] (1-4. Variation 4) Fig. 16 is a diagram showing an example of a planar configuration of a pixel of an imaging device according to Modification 4. Fig. 17 is a diagram showing an example of a cross-sectional configuration of a pixel of an imaging device. Fig. 17 shows a schematic diagram of an example of a pixel configuration in the direction of line A-A' shown in Fig. 16.

[0146] In the imaging device 1 according to this modification, a conductor region 36 is provided as shown in Fig. 16 and Fig. 17. The conductor region 36 is provided around the semiconductor region 35. At least a portion of the conductor region 36 is provided in contact with the semiconductor region 35. The conductor region 36 is formed adjacent to the semiconductor region 35, for example, on the surface 11S1 side of the semiconductor layer 110. In the example shown in Fig. 17, the conductor region 36 is located above and inside the trenches 91, 92.

[0147] The conductor region 36 is made of, for example, polysilicon doped with an impurity. The conductor region 36 (conductive portion) may be made of other conductive materials (for example, metal materials, etc.). The conductor region 36 has, for example, an impurity concentration higher than the impurity concentration of the well 25.

[0148] The contact 55 is provided on the conductor region 36. The contact 55 is electrically connected to the semiconductor region 35 and the well 25 via the conductor region 36. In the imaging device 1 according to the present modification, the semiconductor region 35 provided in the well 25 and the contact 55 are electrically connected via the conductor region 36. By forming the well contact and the well contact region into a side contact structure, it is possible to improve the area efficiency of the pixel P.

[0149] In addition, it is possible to reduce the impurity concentration of the semiconductor region 35 required for electrical connection with the contact 55. By reducing the impurity concentration of the semiconductor region 35, it is possible to reduce the electric field between the semiconductor region 35 and the semiconductor region 33 (source region or drain region) of the pixel transistor 30. This makes it possible to suppress the occurrence of defects in the pixel transistor 30. It is also possible to prevent an increase in noise mixed into the pixel signal.

[0150] In the imaging device 1, the semiconductor regions 35 of each of a number of adjacent pixels P (for example, pixels Pa to Pd in ​​FIGS. 8, 9, etc.) can be electrically connected to a contact 55 via a common conductor region 36. Furthermore, the conductor region 36 can be disposed above and within a trench 91, as shown in FIG. 17. In this case, it is possible to prevent unnecessary parasitic capacitance from being generated in the imaging device 1. For example, it is possible to prevent unnecessary parasitic capacitance from being added to the transistors of the readout circuit 20.

[0151] 18A and 18B are diagrams showing another example of a cross-sectional configuration of a pixel of an imaging device according to Modification 4. As shown in FIG. 18A, the conductor region 36 may be provided on a surface 11S1 of the semiconductor layer 110. In the example shown in FIG. 18A, the conductor region 36 is provided in the wiring layer 120. As shown in the example shown in FIG. 18B, a part of the conductor region 36 may be provided in the semiconductor layer 110. A part of the conductor region 36 may be formed in a trench 91.

[0152] 19A and 19B are diagrams showing another example of the planar configuration of a pixel of an imaging device according to Modification 4. The imaging device 1 may be configured so that the size (area, width, etc.) of the active region 81 on the source region side is different from the size of the active region 81 on the drain region side. For example, as in the example shown in FIG. 19A, in the region where the pixel transistor 30 is arranged, the width of the active region 81 on the semiconductor region 33 side close to the semiconductor region 35 which is a well contact region may be smaller than the width of the active region 81 on the semiconductor region 32 side.

[0153] The shape of the active region 81 under the gate electrode 42 of the pixel transistor 30 and the shape of the semiconductor region 31 are not limited to the example shown in Fig. 19A. The semiconductor region 31 serving as the channel region may have a trapezoidal shape as shown in Fig. 19B. The semiconductor region 31 may have a pentagonal shape or another shape in a plan view.

[0154] (1-5. Variation 5) Fig. 20 is a diagram showing an example of a planar configuration of a pixel of an imaging device according to Modification 5. As shown in Fig. 20, the imaging device 1 may have a semiconductor region 37. The semiconductor region 37 is provided around the floating diffusion FD in the semiconductor layer 110. The semiconductor region 37 is made of polysilicon doped with impurities, for example. Note that the semiconductor region 37 may be made of other conductive materials. At least a portion of the semiconductor region 37 is provided in contact with the floating diffusion FD.

[0155] The floating diffusions FD of the multiple pixels P (pixels Pa to Pd in ​​FIG. 8 and other figures) that share the readout circuit 20 can be electrically connected to each other via the semiconductor region 37. The floating diffusions FD of the pixels Pa to Pd are electrically connected to the amplification transistor AMP, reset transistor RST, and the like of the readout circuit 20 via the semiconductor region 37.

[0156] In the imaging device 1 according to this modification, as described above, the floating diffusion FD and the semiconductor region 37 have a side-contact structure, which makes it possible to improve the area efficiency of the pixel P. It becomes possible to secure the area of ​​the region in which the transistors and the like are arranged in the pixel P.

[0157] <2. Second embodiment> Next, a second embodiment of the present disclosure will be described. In the following, the same components as those in the above-described embodiment are denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

[0158] Fig. 21 is a diagram showing an example of pixel arrangement of an imaging device according to a second embodiment of the present disclosure. A pixel P of the imaging device 1 has a plurality of photoelectric conversion units 12 (photoelectric conversion unit 12a and photoelectric conversion unit 12b in the example shown in Fig. 21). Photoelectric conversion unit 12b is provided next to photoelectric conversion unit 12a. It can also be said that a pixel having photoelectric conversion unit 12a and a pixel having photoelectric conversion unit 12b are provided.

[0159] In this embodiment, one lens 21 (lens unit) is provided for a plurality of photoelectric conversion units 12, for example, two photoelectric conversion units 12 (photoelectric conversion unit 12a, photoelectric conversion unit 12b). The photoelectric conversion unit 12a and the photoelectric conversion unit 12b receive light that has passed through different regions of an optical system such as an imaging lens, and perform pupil division.

[0160] Phase difference data (phase difference information) can be obtained by using a first pixel signal based on the charge photoelectrically converted by the photoelectric conversion unit 12a and a second pixel signal based on the charge photoelectrically converted by the photoelectric conversion unit 12b. Phase difference data can be used to perform phase difference AF (Auto Focus).

[0161] The readout circuit 20 is configured to be capable of outputting a first pixel signal and a second pixel signal of each pixel P that shares the readout circuit 20. The readout circuit 20 can also read out a pixel signal corresponding to the charge obtained by adding up the charge converted by the photoelectric conversion unit 12a and the charge converted by the photoelectric conversion unit 12b.

[0162] 22 is a diagram showing an example of a planar configuration of a pixel of the imaging device according to the second embodiment. A pixel P of the imaging device 1 includes transfer transistors TRa, TRb, floating diffusions FDa, FDb, pixel transistors 30a, 30b, and a semiconductor region 35.

[0163] The transfer transistor TRa is configured to be capable of transferring charges photoelectrically converted by the photoelectric conversion unit 12a to the floating diffusion FDa, and the transfer transistor TRb is configured to be capable of transferring charges photoelectrically converted by the photoelectric conversion unit 12b to the floating diffusion FDb.

[0164] The floating diffusion FDa can accumulate charges photoelectrically converted by the photoelectric conversion unit 12a. The floating diffusion FDb can accumulate charges photoelectrically converted by the photoelectric conversion unit 12b. The transfer transistor TRa and the floating diffusion FDa are provided in, for example, the active region 82a. The transfer transistor TRb and the floating diffusion FDb are provided in, for example, the active region 82b.

[0165] The readout circuit 20 is configured to be capable of outputting, for example, a pixel signal based on the charge accumulated in the floating diffusion FDa, a pixel signal based on the charge accumulated in the floating diffusion FDb, etc. Also, for example, the readout circuit 20 is configured to be capable of outputting a pixel signal according to the charge obtained by adding up the charge accumulated in the floating diffusion FDa and the charge accumulated in the floating diffusion FDb.

[0166] The pixel transistor 30a and the pixel transistor 30b are, for example, transistors of the readout circuit 20. The semiconductor region 32a and the semiconductor region 33a are the source region and the drain region of the pixel transistor 30a. One of the semiconductor regions 32a and 33a is the source region of the pixel transistor 30a, and the other of the semiconductor regions 32a and 33a is the drain region of the pixel transistor 30a.

[0167] The semiconductor region 32b and the semiconductor region 33b are the source region and the drain region of the pixel transistor 30b. One of the semiconductor regions 32b and 33b is the source region of the pixel transistor 30b, and the other of the semiconductor regions 32b and 33b is the drain region of the pixel transistor 30b.

[0168] The pixel transistors 30a and 30b are used as an amplification transistor AMP, a selection transistor SEL, a transistor FDG, a reset transistor RST, or the like. The pixel transistor 30a or the pixel transistor 30b of some pixels P may be a dummy transistor. The readout circuit 20 may include a dummy transistor as the pixel transistor 30a or the pixel transistor 30b.

[0169] Fig. 23 is a diagram showing another example of the planar configuration of a pixel of the imaging device according to the second embodiment. The imaging device 1 may have a separation portion 95a and a separation portion 95b as in the example shown in Fig. 23. The separation portion 95a and the separation portion 95b are each configured to include a trench, for example. The separation portion 95a and the separation portion 95b are each provided between the photoelectric conversion portion 12a and the photoelectric conversion portion 12b in the semiconductor layer 110, for example.

[0170] The isolation portion 95a and the isolation portion 95b may be made of an insulating material or may be made of a semiconductor region formed by ion implantation. For example, the isolation portion 95a and the isolation portion 95b may be made of a p-type semiconductor region or an n-type semiconductor region.

[0171] The separation portion 95a is provided, for example, between adjacent floating diffusions FD on the surface 11S1 side of the semiconductor layer 110. In the example shown in Fig. 23, the separation portion 95a is formed between the floating diffusions FDa and FDb.

[0172] The separator 95b is provided between adjacent pixel transistors 30 on the surface 11S1 side of the semiconductor layer 110. In the example shown in Fig. 23, the separator 95b is formed between the pixel transistor 30a and the pixel transistor 30b. The semiconductor region 35 is provided between the separator 95a and the separator 95b in a plan view, for example, as shown in Fig. 23.

[0173] In the imaging device 1 according to the present embodiment, the semiconductor region 35 is provided adjacent to the pixel transistor 30a and the pixel transistor 30b. For example, in the pixel P, the semiconductor region 35 is disposed adjacent to the source region or drain region of the pixel transistor 30a and the source region or drain region of the pixel transistor 30b.

[0174] 23, the semiconductor region 35, the source region or drain region of the pixel transistor 30a, and the source region or drain region of the pixel transistor 30b are provided, for example, in an active region 81. The semiconductor region 35 is provided adjacent to the semiconductor region 33a of the pixel transistor 30a and the semiconductor region 33b of the pixel transistor 30b. The semiconductor region 35 may be disposed adjacent to the semiconductor regions 32a and 32b.

[0175] Thus, in this embodiment, the semiconductor region 35 is provided adjacent to the pixel transistor 30a and the pixel transistor 30b. Therefore, the imaging device 1 can have a structure that is advantageous for miniaturization. Compared to a case where the semiconductor region 35 and the pixel transistors 30a and 30b are provided separately, the area of ​​the region in which the transistors and the like are arranged in the pixel P can be increased. It is possible to increase the size of the transistors arranged in the pixel P.

[0176] In the imaging device 1, the pixel transistors 30a and 30b are configured so that the source region and the drain region have different sizes. For example, of the semiconductor region 32a and the semiconductor region 33a of the pixel transistor 30a, the size (width, area, etc.) of the semiconductor region 33a adjacent to the semiconductor region 35, which is a well contact region, is smaller than the size of the semiconductor region 32a.

[0177] Furthermore, of the semiconductor region 32b and the semiconductor region 33b of the pixel transistor 30b, the size (width, area, etc.) of the semiconductor region 33b adjacent to the semiconductor region 35, which is a well contact region, is smaller than the size of the semiconductor region 32b. By configuring the imaging device 1 in this way, it is possible to reduce the electric field between the well contact region and the source region (or the drain region). It is possible to suppress noise mixed into the pixel signal.

[0178] [Actions and Effects] The photodetector according to the present embodiment includes a semiconductor layer (semiconductor layer 110), a plurality of pixels including a first pixel having a first photoelectric conversion element and a second photoelectric conversion element (photoelectric conversion unit 12a, photoelectric conversion unit 12b) provided in the semiconductor layer, and trenches (trench 91, trench 92) provided between the plurality of adjacent pixels in the semiconductor layer. The first pixel includes a first transistor (for example, pixel transistor 30a) provided on the first surface side of the semiconductor layer, a first semiconductor region (semiconductor region 35) of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact (contact 55) electrically connected to the first semiconductor region. The first transistor has a second semiconductor region and a third semiconductor region (semiconductor region 32a, semiconductor region 33a) of a second conductivity type. The first semiconductor region is provided so as to be adjacent to the second semiconductor region. The second semiconductor region and the third semiconductor region have different sizes.

[0179] In the photodetector (imaging device 1) according to this embodiment, the semiconductor region 35 is provided adjacent to the semiconductor region 33a which is the source region or drain region of the pixel transistor 30a. The semiconductor region 33a and the semiconductor region 32a have different sizes. Therefore, the imaging device 1 can have a structure that is advantageous for miniaturization of pixels. It is possible to reduce the electric field between the semiconductor region 35 and the semiconductor region 33a. It is possible to realize a photodetector that is advantageous for miniaturization.

[0180] Next, a modified example of the present disclosure will be described. In the following, the same components as those in the above embodiment are denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

[0181] (2-1. Variation 6) Fig. 24 is a diagram showing an example of a planar configuration of a pixel of an imaging device according to Modification 6 of the present disclosure. The imaging device 1 may be configured such that the size of an active region 81 on the source region side is different from the size of an active region 81 on the drain region side. For example, as in the example shown in Fig. 24, in a region where the pixel transistor 30a is arranged, the width of the active region 81 on the semiconductor region 33a side close to the semiconductor region 35, which is a well contact region, may be smaller than the width of the active region 81 on the semiconductor region 32a side.

[0182] Furthermore, the width of the active region 81 on the semiconductor region 33b side closer to the semiconductor region 35, which is a well contact region, may be smaller than the width of the active region 81 on the semiconductor region 32b side. When the semiconductor region 35 is disposed adjacent to the semiconductor regions 32a and 32b, the size (width) of the semiconductor region 32a may be smaller than the size of the semiconductor region 33a. Moreover, the size of the semiconductor region 32b may be smaller than the size of the semiconductor region 33b.

[0183] (2-2. Variation 7) Fig. 25 is a diagram showing an example of a planar configuration of a pixel of an imaging device according to Modification 7. An active region 81 under the gate electrode 42a of the pixel transistor 30a and a semiconductor region 31a serving as a channel region may have a trapezoidal shape as in the example shown in Fig. 25. An active region 81 under the gate electrode 42b of the pixel transistor 30b and a semiconductor region 31b serving as a channel region may have a trapezoidal shape. In addition, for example, an active region 81 under the gate electrode 42a (or gate electrode 42b) and a semiconductor region 31a (or semiconductor region 31b) may have a pentagonal shape.

[0184] (2-3. Variation 8) 26 is a diagram showing an example of a planar configuration of a pixel of an image pickup device according to Modification 8. The image pickup device 1 may have a conductor region 36 that electrically connects the contact 55 and the semiconductor region 35. The conductor region 36 is made of polysilicon doped with impurities, as an example. The conductor region 36 may be formed using other conductive materials.

[0185] Each pixel P of the imaging device 1 may have a structure shown in Fig. 27A or 27B. For example, the size (e.g., width) of the active region 81 on the source region side may be different from the size of the active region 81 on the drain region side. In addition, the shape of the channel region may be a trapezoid or a pentagon.

[0186] Fig. 28 is a diagram showing another example of the planar configuration of a pixel of an imaging device according to Modification Example 8. The imaging device 1 may have a semiconductor region 37 that electrically connects a plurality of floating diffusions FD, as in the example shown in Fig. 28. For example, the floating diffusions FDa and FDb are electrically connected to each other via the semiconductor region 37.

[0187] In the imaging device 1, the semiconductor region 37 is provided, for example, in the semiconductor layer 110. The semiconductor region 37 is made of, for example, polysilicon doped with impurities. The semiconductor region 37 may be made of other conductive materials. The semiconductor region 37 may be formed on the semiconductor layer 110. A part of the semiconductor region 37 may be provided in the semiconductor layer 110.

[0188] Furthermore, the semiconductor region 37 may be provided for, for example, a plurality of adjacent pixels P (for example, pixels Pa to Pd). The floating diffusions FD of the respective pixels P may be electrically connected to each other via the common semiconductor region 37.

[0189] (2-4. Variation 9) Fig. 29 is a diagram showing an example of a planar configuration of a pixel of an imaging device according to Modification 9. As shown in Fig. 29, the semiconductor region 35 may be provided between the semiconductor region 33a, which is the source region or drain region of the pixel transistor 30a, and the semiconductor region 33b, which is the source region or drain region of the pixel transistor 30b. In this case, it is possible to ensure a distance between the contact 55 and the channel regions of the pixel transistors 30a and 30b.

[0190] The semiconductor region 35 may be disposed between the semiconductor region 32a, which is the source region or drain region of the pixel transistor 30a, and the semiconductor region 32b, which is the source region or drain region of the pixel transistor 30b. The imaging device 1 may have a separation portion 95a and a separation portion 95b, as in the example shown in FIG.

[0191] 29 or 30, the semiconductor region 35 (or the active region 81) may have a first portion 61 and a second portion 62. The first portion 61 is provided adjacent to the pixel transistors 30a and 30b in the horizontal direction (X-axis direction) in a plan view. The first portion 61 is disposed, for example, adjacent to each of the gates of the pixel transistors 30a and 30b.

[0192] Moreover, the second portion 62 is in contact with the first portion 61 in the vertical direction (the Y-axis direction). The contact 55 is provided in the second portion 62. The contact 55 is provided on the second portion 62. The first portion 61 has, for example, an impurity concentration lower than an impurity concentration of the second portion 62.

[0193] The semiconductor region 35 is located between the isolation portion 95a and isolation portion 95b, and the contact 55 is separated from the channel region of each of the pixel transistors 30a and 30b. This makes it possible to suppress noise from being mixed into the pixel signal and to suppress a decrease in the accuracy of phase difference detection. It is also expected that a decrease in image quality can be suppressed. Furthermore, by separating (moving away) the contact 55 from the channel region, it is also possible to lower the impurity concentration near the portion where the channel region and the semiconductor region 35 are adjacent to each other. This enables a design that alleviates the generation of a strong electric field.

[0194] Moreover, the first portion 61 has, for example, an impurity concentration lower than the impurity concentration of the second portion 62 connected to the contact 55. By lowering the impurity concentration of the first portion 61, it is possible to suppress the generation of a strong electric field between the first portion 61 and the channel region. This is expected to reduce noise mixed into pixel signals.

[0195] 31A and 31B are diagrams showing another example of the planar configuration of a pixel of an imaging device according to Modification 9. The imaging device 1 may be configured so that the size of the active region 81 on the source region side is different from the size of the active region 81 on the drain region side. For example, as in the example shown in FIG. 31A, the width of the active region 81 on the semiconductor region 33 side relatively close to the semiconductor region 35, which is a well contact region, may be smaller than the width of the active region 81 on the semiconductor region 32 side.

[0196] 31B, the active region 81 and the semiconductor region 31a (or the semiconductor region 31b) below the gate electrode 42a (or the gate electrode 42b) of the pixel transistor 30 may have a trapezoidal shape. The semiconductor regions 31a and 31b may have a pentagonal shape or another shape.

[0197] (2-5. Variation 10) Fig. 32 is a diagram showing an example of a planar configuration of a pixel of an imaging device according to Modification 10. As in the example shown in Fig. 32, one pixel transistor 30 may be provided for each of the photoelectric conversion units 12a and 12b. The pixel transistor 30 is, for example, a transistor of the readout circuit 20, and is arranged for each pixel P. Note that the pixel transistors 30 of some of the pixels P may be dummy transistors.

[0198] The semiconductor region 35 is provided, for example, in the pixel P so as to be adjacent to the source region or the drain region of the pixel transistor 30. In the example shown in Fig. 32, the semiconductor region 35 is provided so as to be adjacent to the semiconductor region 33 of the pixel transistor 30. In the case of this modification, the size of the transistor disposed in the pixel P can be increased, and the characteristics of the amplification transistor AMP of the readout circuit 20 and the like can be improved.

[0199] In particular, the area efficiency in fine pixels can be improved, and the size of the pixel transistor 30 can be increased. This makes it possible to improve the characteristics of the transistors in the readout circuit 20. It is possible to prevent the quality of the pixel signal from deteriorating, and thus to prevent deterioration in the image quality.

[0200] In the imaging device 1, the source region and the drain region of the pixel transistor 30 are configured to have different sizes. For example, of the semiconductor region 32 and the semiconductor region 33 of the pixel transistor 30, the size of the semiconductor region 33 adjacent to the semiconductor region 35, which is a well contact region, is smaller than the size of the semiconductor region 32.

[0201] 32, the semiconductor region 33 and the semiconductor region 35 are provided adjacent to each other in the Y-axis direction. The width of the semiconductor region 33 in the Y-axis direction may be smaller than the width of the semiconductor region 32 in the Y-axis direction. When the semiconductor region 35 is disposed adjacent to the semiconductor region 32, the size of the semiconductor region 32 may be smaller than the size of the semiconductor region 33.

[0202] Thus, in the imaging device 1, the semiconductor region 33 has a size or shape different from that of the semiconductor region 32. For example, the size of the semiconductor region 33 is determined so that the interval (distance) between the semiconductor region 35 and the semiconductor region 33 is secured. This makes it possible to relax the electric field between the well contact region and the semiconductor region 33. This makes it possible to suppress the inclusion of noise in the pixel signal and suppress deterioration in image quality.

[0203] In particular, even in fine pixels, it is possible to reduce the electric field generated between the well contact region (semiconductor region 35) and the semiconductor region 33 (or semiconductor region 32). This makes it possible to suppress the quality of pixel signals from deteriorating, and to suppress the degradation of image quality. It is also possible to suppress the occurrence of defects such as white spots in images.

[0204] 33A to 33F are diagrams showing another example of the planar configuration of a pixel of an imaging device according to Modification 10. As in the example shown in Fig. 33A, the imaging device 1 may be configured so that the size of the active region 81 on the source region side is different from the size of the active region 81 on the drain region side. The semiconductor region 31 of the imaging device 1 may have a trapezoidal shape as shown in Fig. 33B.

[0205] As shown in the example of Fig. 33C, the imaging device 1 may have the above-mentioned conductor region 36 that electrically connects the contact 55 and the semiconductor region 35. As shown in the example of Fig. 33D, the active region 81 may be configured to have different sizes, shapes, etc. on the source region side and the drain region side. As shown in the example of Fig. 33E, the semiconductor region 31 of the imaging device 1 may have a trapezoidal shape.

[0206] 33F, the imaging device 1 may have a semiconductor region 37 that electrically connects a plurality of floating diffusions FD. For example, the floating diffusions FDa and FDb are electrically connected to each other via the semiconductor region 37.

[0207] <3. Application Examples> The imaging device 1 and the like can be applied to any type of electronic device equipped with an imaging function, for example, a camera system such as a digital still camera or a video camera, a mobile phone equipped with an imaging function, etc. Fig. 34 shows a schematic configuration of an electronic device 1000.

[0208] The electronic device 1000 includes, for example, a lens group 1001, an imaging device 1, a DSP (Digital Signal Processor) circuit 1002, a frame memory 1003, a display unit 1004, a recording unit 1005, an operation unit 1006, and a power supply unit 1007, which are interconnected via a bus line 1008.

[0209] The lens group 1001 captures incident light (image light) from a subject and forms an image on the imaging surface of the imaging device 1. The imaging device 1 converts the amount of incident light formed on the imaging surface by the lens group 1001 into an electrical signal on a pixel-by-pixel basis and supplies the signal to the DSP circuit 1002 as a pixel signal.

[0210] The DSP circuit 1002 is a signal processing circuit that processes a signal supplied from the imaging device 1. The DSP circuit 1002 outputs image data obtained by processing the signal from the imaging device 1. The frame memory 1003 temporarily holds the image data processed by the DSP circuit 1002 on a frame-by-frame basis.

[0211] The display unit 1004 is, for example, a panel-type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel, and records image data of moving images or still images captured by the imaging device 1 in a recording medium such as a semiconductor memory or a hard disk.

[0212] The operation unit 1006 outputs operation signals for various functions of the electronic device 1000 in accordance with operations by a user. The power supply unit 1007 appropriately supplies various types of power to the DSP circuit 1002, the frame memory 1003, the display unit 1004, the recording unit 1005, and the operation unit 1006 as operating power sources to these power sources.

[0213] <4. Application Examples> (Example of application to moving objects) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, a robot, etc.

[0214] FIG. 35 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a moving object control system to which the technology according to the present disclosure can be applied.

[0215] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 35, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also, as functional configurations of the integrated control unit 12050, a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053 are illustrated.

[0216] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0217] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as head lamps, back lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves or signals of various switches transmitted from a portable device that replaces a key may be input to the body system control unit 12020. The body system control unit 12020 receives the input of these radio waves or signals and controls the door lock device, power window device, lamps, and the like of the vehicle.

[0218] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture an image outside the vehicle and receives the captured image. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for a person, a car, an obstacle, a sign, or characters on a road surface, based on the received image.

[0219] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0220] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing.

[0221] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the outside-of-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0222] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on the driver's operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0223] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside-vehicle information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0224] The audio / video output unit 12052 transmits at least one output signal of audio and video to an output device capable of visually or audibly notifying information to passengers in the vehicle or the outside of the vehicle. In the example of Fig. 35, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as the output device. The display unit 12062 may include at least one of an on-board display and a head-up display, for example.

[0225] FIG. 36 is a diagram showing an example of the installation position of the imaging unit 12031.

[0226] In FIG. 36, a vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as an imaging unit 12031.

[0227] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the upper part of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The images of the front acquired by the imaging units 12101 and 12105 are mainly used to detect a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.

[0228] 36 shows an example of the imaging ranges of the imaging units 12101 to 12104. An imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and an imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, an overhead image of the vehicle 12100 viewed from above is obtained by superimposing the image data captured by the imaging units 12101 to 12104.

[0229] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of a plurality of imaging elements, or may be an imaging element having pixels for detecting a phase difference.

[0230] For example, the microcomputer 12051 can extract, as a preceding vehicle, a three-dimensional object that is the closest three-dimensional object on the travel path of the vehicle 12100 and travels at a predetermined speed (for example, 0 km / h or more) in approximately the same direction as the vehicle 12100, by calculating the distance to each three-dimensional object in the imaging ranges 12111 to 12114 and the change over time of this distance (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104. Furthermore, the microcomputer 12051 can set a vehicle distance to be secured in advance in front of the preceding vehicle, and perform automatic brake control (including follow-up stop control) and automatic acceleration control (including follow-up start control). In this way, cooperative control can be performed for the purpose of automatic driving that travels autonomously without relying on the driver's operation.

[0231] For example, the microcomputer 12051 classifies and extracts three-dimensional object data on three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0232] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured images of the imaging units 12101 to 12104. The recognition of such a pedestrian is performed, for example, by a procedure of extracting feature points in the captured images of the imaging units 12101 to 12104 as infrared cameras, and a procedure of performing pattern matching processing on a series of feature points that indicate the contour of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the captured images of the imaging units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.

[0233] An example of a mobile object control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to, for example, the imaging unit 12031 among the configurations described above. Specifically, for example, the imaging device 1 or the like can be applied to the imaging unit 12031. By applying the technology according to the present disclosure to the imaging unit 12031, it becomes possible to obtain a high-definition captured image. It becomes possible to perform high-precision control using the captured image in the mobile object control system.

[0234] (Application example to endoscopic surgery system) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be applied to an endoscopic surgery system.

[0235] FIG. 37 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to the present disclosure (the present technology) can be applied.

[0236] 37 shows a state in which an operator (doctor) 11131 is performing surgery on a patient 11132 on a patient bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 is composed of an endoscope 11100, other surgical tools 11110 such as an insufflation tube 11111 and an energy treatment tool 11112, a support arm device 11120 that supports the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are mounted.

[0237] The endoscope 11100 is composed of a lens barrel 11101, a region of a predetermined length from the tip of which is inserted into a body cavity of a patient 11132, and a camera head 11102 connected to the base end of the lens barrel 11101. In the illustrated example, the endoscope 11100 is configured as a so-called rigid scope having a rigid lens barrel 11101, but the endoscope 11100 may be configured as a so-called flexible scope having a flexible lens barrel.

[0238] An opening into which an objective lens is fitted is provided at the tip of the lens barrel 11101. A light source device 11203 is connected to the endoscope 11100, and light generated by the light source device 11203 is guided to the tip of the lens barrel by a light guide extending inside the lens barrel 11101, and is irradiated via the objective lens toward an observation target in the body cavity of the patient 11132. The endoscope 11100 may be a direct-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0239] An optical system and an image sensor are provided inside the camera head 11102, and reflected light (observation light) from an observation target is collected on the image sensor by the optical system. The observation light is photoelectrically converted by the image sensor to generate an electrical signal corresponding to the observation light, i.e., an image signal corresponding to an observation image. The image signal is transmitted to a camera control unit (CCU) 11201 as RAW data.

[0240] The CCU 11201 is configured with a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), etc., and performs overall control of the operations of the endoscope 11100 and the display device 11202. Furthermore, the CCU 11201 receives an image signal from the camera head 11102, and performs various types of image processing on the image signal, such as development processing (demosaic processing), for displaying an image based on the image signal.

[0241] Under the control of the CCU 11201, the display device 11202 displays an image based on an image signal that has been subjected to image processing by the CCU 11201.

[0242] The light source device 11203 is composed of a light source such as an LED (Light Emitting Diode), and supplies the endoscope 11100 with irradiation light when photographing an operation site or the like.

[0243] The input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various information and instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs an instruction to change the imaging conditions (type of irradiated light, magnification, focal length, etc.) of the endoscope 11100.

[0244] The treatment tool control device 11205 controls the driving of the energy treatment tool 11112 for cauterizing tissue, incising, sealing blood vessels, etc. The insufflation device 11206 sends gas into the body cavity of the patient 11132 via the insufflation tube 11111 to inflate the body cavity for the purpose of securing the field of view of the endoscope 11100 and securing the working space of the surgeon. The recorder 11207 is a device capable of recording various information related to the surgery. The printer 11208 is a device capable of printing various information related to the surgery in various formats such as text, image, or graph.

[0245] The light source device 11203 that supplies irradiation light to the endoscope 11100 when photographing the surgical site can be composed of a white light source composed of, for example, an LED, a laser light source, or a combination of these. When the white light source is composed of a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so that the white balance of the captured image can be adjusted in the light source device 11203. In this case, it is also possible to capture images corresponding to each of the RGB colors in a time-division manner by irradiating the observation object with laser light from each of the RGB laser light sources in a time-division manner and controlling the driving of the image sensor of the camera head 11102 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter to the image sensor.

[0246] The light source device 11203 may be controlled to change the intensity of the light it outputs at predetermined time intervals. The driving of the image sensor of the camera head 11102 may be controlled in synchronization with the timing of the change in the light intensity to obtain images in a time-division manner, and the images may be synthesized to generate an image with a high dynamic range that is free of so-called blackout and whiteout.

[0247] The light source device 11203 may be configured to supply light of a predetermined wavelength band corresponding to the special light observation. In the special light observation, for example, by utilizing the wavelength dependency of light absorption in body tissue, a narrow band light is irradiated compared to the irradiated light (i.e., white light) during normal observation, and a predetermined tissue such as blood vessels on the mucous membrane surface is photographed with high contrast, so-called narrow band imaging is performed. Alternatively, in the special light observation, a fluorescent observation may be performed in which an image is obtained by fluorescence generated by irradiating an excitation light. In the fluorescent observation, it is possible to irradiate an excitation light to a body tissue and observe the fluorescence from the body tissue (autofluorescence observation), or to locally inject a reagent such as indocyanine green (ICG) into the body tissue and irradiate the body tissue with excitation light corresponding to the fluorescent wavelength of the reagent to obtain a fluorescent image. The light source device 11203 may be configured to supply narrow band light and / or excitation light corresponding to such special light observation.

[0248] FIG. 38 is a block diagram showing an example of the functional configuration of the camera head 11102 and the CCU 11201 shown in FIG.

[0249] The camera head 11102 has a lens unit 11401, an imaging unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 has a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other by a transmission cable 11400 so as to be able to communicate with each other.

[0250] The lens unit 11401 is an optical system provided at the connection portion with the lens barrel 11101. Observation light taken in from the tip of the lens barrel 11101 is guided to the camera head 11102 and enters the lens unit 11401. The lens unit 11401 is configured by combining a plurality of lenses including a zoom lens and a focus lens.

[0251] The imaging unit 11402 is composed of an imaging element. The imaging element constituting the imaging unit 11402 may be one (so-called single-plate type) or multiple (so-called multi-plate type). When the imaging unit 11402 is composed of a multi-plate type, for example, each imaging element may generate an image signal corresponding to each of RGB, and a color image may be obtained by combining the image signals. Alternatively, the imaging unit 11402 may be configured to have a pair of imaging elements for acquiring image signals for the right eye and the left eye corresponding to 3D (Dimensional) display. By performing 3D display, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical site. Note that when the imaging unit 11402 is composed of a multi-plate type, multiple lens units 11401 may be provided corresponding to each imaging element.

[0252] Furthermore, the imaging unit 11402 does not necessarily have to be provided in the camera head 11102. For example, the imaging unit 11402 may be provided inside the lens barrel 11101, immediately behind the objective lens.

[0253] The driving unit 11403 is configured by an actuator, and moves the zoom lens and focus lens of the lens unit 11401 by a predetermined distance along the optical axis under the control of the camera head control unit 11405. This allows the magnification and focus of the image captured by the imaging unit 11402 to be appropriately adjusted.

[0254] The communication unit 11404 is configured by a communication device for transmitting and receiving various information to and from the CCU 11201. The communication unit 11404 transmits the image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as RAW data.

[0255] Furthermore, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201, and supplies the control signal to the camera head control unit 11405. The control signal includes information on the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value at the time of capturing the image, and / or information specifying the magnification and focus of the captured image.

[0256] The image capturing conditions such as the frame rate, exposure value, magnification, and focus may be appropriately specified by a user, or may be automatically set by the control unit 11413 of the CCU 11201 based on an acquired image signal. In the latter case, the endoscope 11100 is equipped with a so-called AE (Auto Exposure) function, AF (Auto Focus) function, and AWB (Auto White Balance) function.

[0257] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal received from the CCU 11201 via the communication unit 11404.

[0258] The communication unit 11411 is configured with a communication device for transmitting and receiving various information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted from the camera head 11102 via the transmission cable 11400.

[0259] Furthermore, the communication unit 11411 transmits, to the camera head 11102, a control signal for controlling the driving of the camera head 11102. The image signal and the control signal can be transmitted by electrical communication, optical communication, or the like.

[0260] The image processing unit 11412 performs various types of image processing on the image signal, which is RAW data sent from the camera head 11102 .

[0261] The control unit 11413 performs various controls related to imaging of the surgical site etc. by the endoscope 11100 and display of the captured image obtained by imaging the surgical site etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102.

[0262] Further, the control unit 11413 causes the display device 11202 to display the captured image showing the surgical site, etc., based on the image signal that has been image-processed by the image processing unit 11412. At this time, the control unit 11413 may recognize various objects in the captured image using various image recognition techniques. For example, the control unit 11413 can recognize surgical tools such as forceps, specific living body parts, bleeding, mist when the energy treatment tool 11112 is used, etc., by detecting the shape and color of the edge of an object included in the captured image. When the control unit 11413 causes the display device 11202 to display the captured image, it may use the recognition result to superimpose various types of surgery support information on the image of the surgical site. By superimposing and presenting the surgery support information to the surgeon 11131, the burden on the surgeon 11131 can be reduced and the surgeon 11131 can proceed with the surgery reliably.

[0263] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable for communication of electrical signals, an optical fiber for optical communication, or a composite cable of these.

[0264] Here, in the illustrated example, communication is performed wired using a transmission cable 11400, but communication between the camera head 11102 and the CCU 11201 may also be performed wirelessly.

[0265] An example of an endoscopic surgery system to which the technology according to the present disclosure can be applied has been described above. Of the configurations described above, the technology according to the present disclosure can be suitably applied to, for example, the imaging unit 11402 provided in the camera head 11102 of the endoscope 11100. By applying the technology according to the present disclosure to the imaging unit 11402, it is possible to provide a high-definition endoscope 11100.

[0266] Although the present disclosure has been described above by way of the embodiment, modifications, application examples, and application examples, the present technology is not limited to the above-described embodiment, etc., and various modifications are possible. For example, although the above-described modifications have been described as modifications of the above-described embodiment, the configurations of the modifications can be appropriately combined.

[0267] In the above embodiments, an imaging device has been described as an example, but the photodetection device of the present disclosure may be, for example, a device that receives incident light and converts the light into an electric charge. The output signal may be a signal of image information or a signal of distance measurement information. The photodetection device (imaging device) may be applied to an image sensor, a distance measurement sensor, and the like. Note that the present disclosure is not limited to a back-illuminated image sensor, but may also be applied to a front-illuminated image sensor.

[0268] The light detection device according to the present disclosure may also be applied as a distance measurement sensor capable of measuring distances using a time-of-flight (TOF) method. The light detection device (imaging device) may also be applied as a sensor capable of detecting an event, for example, an event-driven sensor (also called an event vision sensor (EVS), an event driven sensor (EDS), a dynamic vision sensor (DVS), or the like).

[0269] A photodetector according to an embodiment of the present disclosure includes a semiconductor layer, a plurality of pixels including a first pixel having a photoelectric conversion element provided in the semiconductor layer, and a trench provided in the semiconductor layer between the plurality of adjacent pixels. The first pixel includes a transistor provided on a first surface side of the semiconductor layer, a first semiconductor region of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact electrically connected to the first semiconductor region. The transistor has a second semiconductor region and a third semiconductor region of a second conductivity type. The first semiconductor region is provided adjacent to the second semiconductor region. The second semiconductor region and the third semiconductor region have sizes different from each other. Therefore, the photodetector can have a structure advantageous for miniaturization of pixels. It is possible to realize a photodetector advantageous for miniaturization.

[0270] A photodetector according to an embodiment of the present disclosure includes a semiconductor layer, a plurality of pixels including a first pixel having a photoelectric conversion element provided in the semiconductor layer, and a trench provided in the semiconductor layer between the plurality of adjacent pixels. The first pixel includes a first semiconductor region of a first conductivity type provided on a first surface side of the semiconductor layer, a first contact electrically connected to the first semiconductor region, a transistor having a second semiconductor region and a third semiconductor region of a second conductivity type respectively provided in the first region on the first surface side of the semiconductor layer, and a separation portion provided around the first region. The first semiconductor region is provided so as to be adjacent to the second semiconductor region. The size of the first region on the second semiconductor region side is smaller than the size of the first region on the third semiconductor region side. Therefore, the photodetector can have a structure advantageous for miniaturization of pixels. It is possible to realize a photodetector advantageous for miniaturization.

[0271] In addition, the effects described in this specification are merely examples and are not limited to the description, and other effects may be obtained. In addition, the present disclosure may have the following configurations. (1) A semiconductor layer; A plurality of pixels including a first pixel having a photoelectric conversion element provided in the semiconductor layer; a trench provided between adjacent pixels in the semiconductor layer; Equipped with the first pixel includes a transistor provided on a first surface side of the semiconductor layer, a first semiconductor region of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact electrically connected to the first semiconductor region; the transistor has a second semiconductor region and a third semiconductor region of a second conductivity type; the first semiconductor region is provided adjacent to the second semiconductor region, The second semiconductor region and the third semiconductor region have different sizes. Light detection device. (2) The size of the second semiconductor region is smaller than the size of the third semiconductor region. The light detection device according to (1) above. (3) the second semiconductor region and the first semiconductor region are provided adjacent to each other in a first direction, The width of the second semiconductor region in the first direction is smaller than the width of the third semiconductor region. The optical detection device according to (1) or (2). (4) The first pixel has a first region of the semiconductor layer in which the second semiconductor region and the third semiconductor region are provided, and a separation portion provided around the first region. The optical detection device according to any one of (1) to (3). (5) The size of the first region on the second semiconductor region side is smaller than the size of the first region on the third semiconductor region side. The light detection device according to (4) above. (6) The first semiconductor region is provided adjacent to the second semiconductor region in the first region. The optical detection device according to (4) or (5) above. (7) the first pixel includes a floating diffusion provided in a second region of the semiconductor layer, and a transfer transistor capable of transferring charges converted by the photoelectric conversion element to the floating diffusion; The separation portion is provided between the first region and the second region. The photodetector according to any one of (4) to (6). (8) the second semiconductor region is one of a source region and a drain region; The third semiconductor region is the other of the source region and the drain region. The optical detection device according to any one of (1) to (7). (9) the first semiconductor region is a p-type semiconductor region, The second semiconductor region and the third semiconductor region are each an n-type semiconductor region. The photodetector according to any one of (1) to (8). (10) the transistor has a channel region between the second semiconductor region and the third semiconductor region; The size of the channel region on the second semiconductor region side is smaller than the size of the channel region on the third semiconductor region side. The photodetector according to any one of (1) to (9) above. (11) a first well of the first conductivity type provided in the semiconductor layer; the first semiconductor region is provided in the first well; The first contact is electrically connected to the first well through the first semiconductor region. The optical detection device according to any one of (1) to (10) above. (12) a conductor region in contact with a portion of the first semiconductor region and provided inside the trench; The first contact is provided on the conductor region and is electrically connected to the first semiconductor region via the conductor region. The photodetector according to any one of (1) to (11) above. (13) The conductor region is provided in the semiconductor layer. The light detection device according to (12) above. (14) the plurality of pixels includes a second pixel adjacent to the first pixel, The first pixel and the second pixel each have the photoelectric conversion element, a floating diffusion, the transistor, and the first semiconductor region. The photodetector according to any one of (1) to (13) above. (15) a conductor region electrically connecting the first semiconductor region of the first pixel and the first semiconductor region of the second pixel. The light detection device according to (14) above. (16) a fourth semiconductor region electrically connecting the floating diffusion of the first pixel and the floating diffusion of the second pixel; a second contact electrically connected to the fourth semiconductor region; Further equipped The optical detection device according to (14) or (15) above. (17) a readout circuit including the transistor and capable of outputting a signal based on the charge photoelectrically converted by the photoelectric conversion element; The transistor is an amplifier transistor, a select transistor, a reset transistor, a switching transistor, or a dummy transistor. The photodetector according to any one of (1) to (16) above. (18) Further comprising a lens provided on a second surface side opposite to the first surface of the semiconductor layer, The photoelectric conversion element performs photoelectric conversion on the light transmitted through the lens. The photodetector according to any one of (1) to (17) above. (19) A semiconductor layer; A plurality of pixels including a first pixel having a photoelectric conversion element provided in the semiconductor layer; a trench provided between adjacent pixels in the semiconductor layer; Equipped with The first pixel is a first semiconductor region of a first conductivity type provided on a first surface side of the semiconductor layer; a first contact electrically connected to the first semiconductor region; a transistor having a second semiconductor region and a third semiconductor region of a second conductivity type respectively provided in a first region on the first surface side of the semiconductor layer; a separation portion provided around the first region; Including, the first semiconductor region is provided adjacent to the second semiconductor region, The size of the first region on the second semiconductor region side is smaller than the size of the first region on the third semiconductor region side. Light detection device. (20) the first pixel includes a floating diffusion provided in a second region of the semiconductor layer, and a transfer transistor capable of transferring charges converted by the photoelectric conversion element to the floating diffusion; The separation portion is provided between the first region and the second region. The light detection device according to (19) above. (twenty one) A semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element and a second photoelectric conversion element provided in the semiconductor layer; a trench provided between adjacent pixels in the semiconductor layer; Equipped with the first pixel includes a first transistor provided on a first surface side of the semiconductor layer, a first semiconductor region of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact electrically connected to the first semiconductor region; the first transistor has a second semiconductor region and a third semiconductor region of a second conductivity type; the first semiconductor region is provided adjacent to the second semiconductor region, The second semiconductor region and the third semiconductor region have different sizes. Light detection device. (twenty two) The size of the second semiconductor region is smaller than the size of the third semiconductor region. The light detection device according to (21) above. (twenty three) the second semiconductor region and the first semiconductor region are provided adjacent to each other in a first direction, The width of the second semiconductor region in the first direction is smaller than the width of the third semiconductor region. The optical detection device according to (21) or (22) above. (twenty four) the first pixel includes a first region of the semiconductor layer in which the second semiconductor region and the third semiconductor region are provided, The size of the first region on the second semiconductor region side is smaller than the size of the first region on the third semiconductor region side. The photodetector according to any one of (21) to (23). (twenty five) the first pixel includes a second transistor provided on a first surface side of the semiconductor layer, the first transistor and the second transistor have the second semiconductor region and the third semiconductor region of the second conductivity type, respectively; The first semiconductor region is provided adjacent to the second semiconductor region of the first transistor and the second semiconductor region of the second transistor. The photodetector according to any one of (21) to (24). (26) The first pixel is a second transistor provided on the first surface side of the semiconductor layer; a first isolation portion provided between the first transistor and the second transistor; A first floating diffusion and a second floating diffusion; a second isolation portion provided between the first floating diffusion and the second floating diffusion; have The photodetector according to any one of (21) to (25) above. (27) The first semiconductor region is provided between the first isolation portion and the second isolation portion. The optical detection device according to (26) above. (28) An optical system; a light detection device that receives light transmitted through the optical system; Equipped with The light detection device includes: A semiconductor layer; A plurality of pixels including a first pixel having a photoelectric conversion element provided in the semiconductor layer; a trench provided between adjacent pixels in the semiconductor layer; having the first pixel includes a transistor provided on a first surface side of the semiconductor layer, a first semiconductor region of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact electrically connected to the first semiconductor region; the transistor has a second semiconductor region and a third semiconductor region of a second conductivity type; the first semiconductor region is provided adjacent to the second semiconductor region, The second semiconductor region and the third semiconductor region have different sizes. electronic equipment. (29) An optical system; a light detection device that receives light transmitted through the optical system; Equipped with The light detection device includes: A semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element and a second photoelectric conversion element provided in the semiconductor layer; a trench provided between adjacent pixels in the semiconductor layer; having the first pixel includes a first transistor provided on a first surface side of the semiconductor layer, a first semiconductor region of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact electrically connected to the first semiconductor region; the first transistor has a second semiconductor region and a third semiconductor region of a second conductivity type; the first semiconductor region is provided adjacent to the second semiconductor region, The second semiconductor region and the third semiconductor region have different sizes. electronic equipment. [Explanation of symbols]

[0272] Reference Signs List 1: imaging device, 12: photoelectric conversion section, 20: readout circuit, 21: lens, 25: well, 30: pixel transistor, 31, 32, 33, 35: semiconductor region, 52, 53, 55: contact, 91, 92, 93: trench, 101: substrate, 110: semiconductor layer.

Claims

1. A semiconductor layer; A plurality of pixels including a first pixel having a photoelectric conversion element provided in the semiconductor layer; a trench provided between adjacent pixels in the semiconductor layer; Equipped with the first pixel includes a transistor provided on a first surface side of the semiconductor layer, a first semiconductor region of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact electrically connected to the first semiconductor region; the transistor has a second semiconductor region and a third semiconductor region of a second conductivity type; the first semiconductor region is provided adjacent to the second semiconductor region, The second semiconductor region and the third semiconductor region have different sizes. Light detection device.

2. The size of the second semiconductor region is smaller than the size of the third semiconductor region.

2. The optical detection device according to claim 1.

3. the second semiconductor region and the first semiconductor region are provided adjacent to each other in a first direction, The width of the second semiconductor region in the first direction is smaller than the width of the third semiconductor region.

2. The optical detection device according to claim 1.

4. The first pixel has a first region of the semiconductor layer in which the second semiconductor region and the third semiconductor region are provided, and a separation portion provided around the first region.

2. The optical detection device according to claim 1.

5. The size of the first region on the second semiconductor region side is smaller than the size of the first region on the third semiconductor region side.

5. The optical detection device according to claim 4.

6. The first semiconductor region is provided adjacent to the second semiconductor region in the first region.

5. The optical detection device according to claim 4.

7. the first pixel includes a floating diffusion provided in a second region of the semiconductor layer, and a transfer transistor capable of transferring charges converted by the photoelectric conversion element to the floating diffusion; The separation portion is provided between the first region and the second region.

5. The optical detection device according to claim 4.

8. the second semiconductor region is one of a source region and a drain region, The third semiconductor region is the other of the source region and the drain region.

2. The optical detection device according to claim 1.

9. the first semiconductor region is a p-type semiconductor region, The second semiconductor region and the third semiconductor region are each an n-type semiconductor region.

2. The optical detection device according to claim 1.

10. the transistor has a channel region between the second semiconductor region and the third semiconductor region; The size of the channel region on the second semiconductor region side is smaller than the size of the channel region on the third semiconductor region side.

2. The optical detection device according to claim 1.

11. a first well of the first conductivity type provided in the semiconductor layer; the first semiconductor region is provided in the first well; The first contact is electrically connected to the first well through the first semiconductor region.

2. The optical detection device according to claim 1.

12. a conductor region in contact with a portion of the first semiconductor region and provided inside the trench; The first contact is provided on the conductor region and is electrically connected to the first semiconductor region via the conductor region.

2. The optical detection device according to claim 1.

13. The conductor region is provided in the semiconductor layer.

13. The optical detection device of claim 12.

14. the plurality of pixels includes a second pixel adjacent to the first pixel, The first pixel and the second pixel each include the photoelectric conversion element, a floating diffusion, the transistor, and the first semiconductor region.

2. The optical detection device according to claim 1.

15. a conductor region electrically connecting the first semiconductor region of the first pixel and the first semiconductor region of the second pixel; 15. The optical detection device of claim 14.

16. a fourth semiconductor region electrically connecting the floating diffusion of the first pixel and the floating diffusion of the second pixel; a second contact electrically connected to the fourth semiconductor region; Further equipped 15. The optical detection device of claim 14.

17. a readout circuit including the transistor and capable of outputting a signal based on the charge photoelectrically converted by the photoelectric conversion element; The transistor is an amplifier transistor, a select transistor, a reset transistor, a switching transistor, or a dummy transistor.

2. The optical detection device according to claim 1.

18. The semiconductor layer further includes a lens provided on a second surface side opposite to the first surface, The photoelectric conversion element performs photoelectric conversion on the light transmitted through the lens.

2. The optical detection device according to claim 1.

19. A semiconductor layer; A plurality of pixels including a first pixel having a photoelectric conversion element provided in the semiconductor layer; a trench provided between adjacent pixels in the semiconductor layer; Equipped with The first pixel is a first semiconductor region of a first conductivity type provided on a first surface side of the semiconductor layer; a first contact electrically connected to the first semiconductor region; a transistor having a second semiconductor region and a third semiconductor region of a second conductivity type, the second semiconductor region and the third semiconductor region being respectively provided in a first region on the first surface side of the semiconductor layer; A separation portion provided around the first region; Including, the first semiconductor region is provided adjacent to the second semiconductor region, The size of the first region on the second semiconductor region side is smaller than the size of the first region on the third semiconductor region side. Light detection device.

20. the first pixel includes a floating diffusion provided in a second region of the semiconductor layer, and a transfer transistor capable of transferring charges converted by the photoelectric conversion element to the floating diffusion; The separation portion is provided between the first region and the second region.

20. The optical detection device of claim 19.

21. A semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element and a second photoelectric conversion element provided in the semiconductor layer; a trench provided between adjacent pixels in the semiconductor layer; Equipped with the first pixel includes a first transistor provided on a first surface side of the semiconductor layer, a first semiconductor region of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact electrically connected to the first semiconductor region; the first transistor has a second semiconductor region and a third semiconductor region of a second conductivity type; the first semiconductor region is provided adjacent to the second semiconductor region, The second semiconductor region and the third semiconductor region have different sizes. Light detection device.

22. The size of the second semiconductor region is smaller than the size of the third semiconductor region.

22. The optical detection device of claim 21.

23. the second semiconductor region and the first semiconductor region are provided adjacent to each other in a first direction, The width of the second semiconductor region in the first direction is smaller than the width of the third semiconductor region.

22. The optical detection device of claim 21.

24. the first pixel includes a first region of the semiconductor layer in which the second semiconductor region and the third semiconductor region are provided, The size of the first region on the second semiconductor region side is smaller than the size of the first region on the third semiconductor region side.

22. The optical detection device of claim 21.

25. the first pixel includes a second transistor provided on a first surface side of the semiconductor layer, the first transistor and the second transistor each have the second semiconductor region and the third semiconductor region of the second conductivity type, The first semiconductor region is provided adjacent to the second semiconductor region of the first transistor and the second semiconductor region of the second transistor.

22. The optical detection device of claim 21.

26. The first pixel is a second transistor provided on the first surface side of the semiconductor layer; a first isolation portion provided between the first transistor and the second transistor; a first floating diffusion and a second floating diffusion; a second isolation portion provided between the first floating diffusion and the second floating diffusion; have 22. The optical detection device of claim 21.

27. The first semiconductor region is provided between the first isolation portion and the second isolation portion.

27. The optical detection device of claim 26.

28. An optical system; a light detection device that receives light transmitted through the optical system; Equipped with The light detection device includes: A semiconductor layer; A plurality of pixels including a first pixel having a photoelectric conversion element provided in the semiconductor layer; a trench provided between adjacent pixels in the semiconductor layer; having the first pixel includes a transistor provided on a first surface side of the semiconductor layer, a first semiconductor region of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact electrically connected to the first semiconductor region; the transistor has a second semiconductor region and a third semiconductor region of a second conductivity type; the first semiconductor region is provided adjacent to the second semiconductor region, The second semiconductor region and the third semiconductor region have different sizes. electronic equipment.

29. An optical system; a light detection device that receives light transmitted through the optical system; Equipped with The light detection device includes: A semiconductor layer; a plurality of pixels including a first pixel having a first photoelectric conversion element and a second photoelectric conversion element provided in the semiconductor layer; a trench provided between adjacent pixels in the semiconductor layer; having the first pixel includes a first transistor provided on a first surface side of the semiconductor layer, a first semiconductor region of a first conductivity type provided on the first surface side of the semiconductor layer, and a first contact electrically connected to the first semiconductor region; the first transistor has a second semiconductor region and a third semiconductor region of a second conductivity type; the first semiconductor region is provided adjacent to the second semiconductor region, The second semiconductor region and the third semiconductor region have different sizes. electronic equipment.

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