RF limiter circuit

Abstract

To avoid deterioration of power limit performance of a RF limiter circuit that can avoid decrease in a voltage applied between an anode and a cathode of a diode due to an influence of parasitic inductance and that can be applied to RF receivers or the like.SOLUTION: A RF limiter circuit 10 includes a diode 11 and a RF chalk 12. A ground side of the RF limiter circuit 10 is connected to the ground via the RF chalk 12. In the RF limiter circuit 10, the RF chalk 12 is used for connection to a circuit return (ground) so that an influence of parasitic inductance is reduced. When a RF signal at a voltage VRF is input into the RF limiter circuit, a RF voltage VRF is applied to an anode of the diode. While a cathode of the diode is connected to the ground, DC resistance between return and ground becomes zero (0 Ω) by the RF chalk. In addition, RF resistance between return and ground becomes infinite (∞ Ω) by the RF chalk.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to RF limiter circuits. [Background technology]

[0002] The basic configuration of a conventional RF limiter circuit is where the anode of a diode is connected to the hot of the circuit and the cathode of the diode is connected to the return (ground) of the circuit.

[0003] The RF limiter circuit allows the signal to pass without restriction as long as the RF voltage of the input signal does not exceed the ON voltage threshold of the diode. However, when the RF voltage of the input signal rises and exceeds the ON voltage threshold of the diode, current flows to ground through the diode. In this case, power is consumed in the diode, so the output voltage and output power are limited.

[0004] RF limiter circuits are often used in devices that require high sensitivity, wide dynamic range, and power durability. For example, in a low noise amplifier used in an RF receiver, when a low power signal is received, the RF limiter circuit outputs the signal as is to the downstream circuit, such as the amplifier or demodulator. However, if an excessively large received signal is applied due to an operational error during testing, the RF limiter circuit limits the power and outputs a power that will not damage the downstream circuit.

[0005] Patent Document 1 discloses a limiter circuit in which an open stub and a short stub are added to the basic configuration. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2019-149770 A Summary of the Invention [Problem to be solved by the invention]

[0007] The basic configuration of the RF limiter circuit had an issue in that the RF voltage applied between the anode and cathode of the diode was reduced due to the effect of parasitic inductance (or normal mode noise) of ground vias and other elements provided on the return side, resulting in a decrease in power limiting performance.

[0008] The present disclosure aims to make it possible to avoid degradation of the power limiting performance of an RF limiter circuit. [Means for solving the problem]

[0009] The RF limiter circuit of the present disclosure comprises: It includes a diode and an RF choke. The return side of the diode is connected to ground through the RF choke. Effect of the Invention

[0010] According to the present disclosure, it is possible to prevent the voltage applied between the anode and cathode of the diode from decreasing due to the influence of parasitic inductance, and therefore to prevent a decrease in the power limiting performance of the RF limiter circuit. [Brief description of the drawings]

[0011] [Figure 1] 1 is a configuration diagram of an RF limiter circuit 10 according to a first embodiment. [Diagram 2] FIG. 1 is a diagram showing the configuration of a conventional RF limiter circuit. [Diagram 3] FIG. 11 is a configuration diagram of an RF limiter circuit 20 according to a second embodiment. [Figure 4] FIG. 11 is a configuration diagram of an RF limiter circuit 30 according to a third embodiment. [Diagram 5] FIG. 11 is a configuration diagram of an RF limiter circuit 39 according to a third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] In the embodiments and drawings, the same or corresponding elements are denoted by the same reference numerals. Descriptions of elements denoted by the same reference numerals as those of elements already described will be omitted or simplified as appropriate.

[0013] Embodiment 1 The RF limiter circuit 10 will be described with reference to FIG.

[0014] The RF limiter circuit is also called a limiter circuit or a high frequency limiter. RF is an abbreviation for Radio Frequency.

[0015] ***Configuration Description*** The RF limiter circuit 10 includes a diode 11 and an RF choke 12 . An RF choke 12 is connected in series between the cathode of diode 11 and ground. For example, an inductor or a 1 / 4 wavelength short stub is used as the RF choke 12. Also, for example, a 1 / 4 wavelength line is used as the RF choke 12.

[0016] The return side of the diode 11 is connected to ground via an RF choke 12 .

[0017] ***Explanation of Operation*** When an RF signal of voltage VRF is input to the RF limiter circuit 10, the RF voltage VRF is applied to the anode of the diode 11. The cathode of diode 11 is connected to ground, but the DC resistance between the return and ground is made zero (0 Ω) by RF choke 12. In addition, the RF resistance between the return and ground is made infinite (∞ Ω) by RF choke 12. Therefore, the voltage drop due to the parasitic inductance can be ignored, and the anode-cathode voltage of the diode 11 becomes VRF.

[0018] When VRF exceeds the ON voltage threshold of diode 11, current flows from diode 11 to ground. This causes power to be consumed in the diode 11, limiting the output voltage and output power from the RF limiter circuit 10.

[0019] ***Features of the First Embodiment*** The RF limiter circuit 10 is an RF limiter circuit that uses an RF choke 12 for connection to the circuit return (ground). In the RF limiter circuit 10, an RF choke 12 is used in the circuit return connection to reduce the effects of parasitic inductance. The RF limiter circuit 10 can be applied to an RF receiver or the like.

[0020] ***Advantages of the First Embodiment*** FIG. 2 shows the configuration of a conventional RF limiter circuit. In a conventional RF limiter circuit, the return side of the diode is connected directly to ground. Therefore, the voltage applied between the anode and cathode of the diode decreases due to the effect of parasitic inductance of a ground via or the like provided on the return side, and the power limiting performance decreases.

[0021] On the other hand, in the RF limiter circuit 10, the return side of the diode 11 is connected to ground via an RF choke 12 (see FIG. 1). This makes it possible to ignore the influence of parasitic inductance such as ground vias. This makes it possible to prevent the voltage applied between the anode and cathode of the diode 11 from decreasing due to the influence of parasitic inductance. As a result, it is possible to prevent the power limiting performance of the RF limiter circuit 10 from decreasing.

[0022] Embodiment 2 The RF limiter circuit 20 will be described with reference to FIG. 3, focusing mainly on the points that differ from the first embodiment.

[0023] ***Configuration Description*** The RF limiter circuit 20 is an RF limiter circuit to which a DC voltage VDC is applied. In other words, the RF limiter circuit 20 is an RF limiter circuit to which a DC bias voltage is applied. DC stands for direct current.

[0024] The RF limiter circuit 20 includes an RF choke 21 in addition to the diode 11 and the RF choke 12 . An RF choke 21 is connected between a DC voltage source 22 and the anode of the diode 11 . The hot side of diode 11 is connected to a DC voltage source 22 via an RF choke 21 .

[0025] ***Explanation of Operation*** The diode 11 of the RF limiter circuit 20 is turned on at a voltage lower than the on-voltage threshold of the diode 11 of the RF limiter circuit 10, and a current flows.

[0026] ***Effects of the second embodiment*** According to the second embodiment, the diode 11 can be turned on at a lower RF voltage VRF. Therefore, the output voltage and output power from the RF limiter circuit 20 can be limited at a lower RF voltage VRF.

[0027] Embodiment 3 The RF limiter circuit 30 will be described with reference to FIG. 4, focusing mainly on the points that differ from the first embodiment.

[0028] ***Configuration Description*** The RF limiter circuit 30 is an RF limiter circuit that reduces the influence of normal mode noise.

[0029] The RF limiter circuit 30 includes a diode 11 and an RF choke 12 as well as an SE-DE conversion circuit 31 and a DE-SE conversion circuit 32 . The SE-DE conversion circuit 31 is a circuit that performs conversion from single-end (SE) to differential-end (DE). The DE-SE conversion circuit 32 is a circuit that performs conversion from a differential end (DE) to a single end (SE).

[0030] The SE-DE conversion circuit 31 is connected to the input side of the RF limiter circuit 30 . The DE-SE conversion circuit 32 is connected to the output side of the RF limiter circuit 30 .

[0031] An RF voltage of VRF / 2 is applied to the anode of the diode 11. An RF voltage of −VRF / 2 is applied to the cathode of the diode 11.

[0032] *** Description of the Example *** FIG. 5 shows the configuration of the RF limiter circuit 39. The RF limiter circuit 39 is the RF limiter circuit 30 applied to the second embodiment. The RF limiter circuit 39 includes a diode 11, an RF choke 12, an RF choke 21, an SE-DE conversion circuit 31 and a DE-SE conversion circuit 32.

[0033] ***Effects of the Third Embodiment*** According to the third embodiment, the influence of normal mode noise can be cancelled, that is, the resistance to normal mode noise can be improved.

[0034] ***Supplementary explanation of implementation form*** Each embodiment is an example of a preferred embodiment, and is not intended to limit the technical scope of the present disclosure. Each embodiment may be implemented in part or in combination with other embodiments.

[0035] For example, the RF limiter circuit (10, 20, 30, 39) may be combined with a matching circuit, DC cut at the input / output terminals, use of multiple diodes, diode arraying, threshold adjustment by feedback control, and the like. [Explanation of symbols]

[0036] 10 RF limiter circuit, 11 diode, 12 RF choke, 20 RF limiter circuit, 21 RF choke, 22 DC voltage source, 30 RF limiter circuit, 31 SE-DE conversion circuit, 32 DE-SE conversion circuit, 39 RF limiter circuit.

Claims

1. a diode; and an RF choke; The return side of the diode is connected to ground through the RF choke. RF limiter circuit.

2. The diode, a first RF choke, and a second RF choke are included in the RF choke. The hot side of the diode is connected to a DC voltage source through the second RF choke.

2. The RF limiter circuit of claim 1.

3. a first conversion circuit connected to an input side of the RF limiter circuit and performing single-end to differential-end conversion; a second conversion circuit connected to an output side of the RF limiter circuit and performing a differential end to single end conversion; Equipped 3. The RF limiter circuit according to claim 1 or 2.

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