Display device, control method for display device, and control program for display device

Abstract

To provide a display device capable of improving the image deterioration due to unstable operation of an electrochromic element when a driving voltage to the electrochromic element by a driving circuit is switched.SOLUTION: A display device has: an image display device that has a plurality of pixels; a light control device that has a light control image display unit having a plurality of light control pixels and switches transmissivity of each light control pixel; and a control unit that switches the transmissivity of the light control pixel in a corresponding region of the light control image display unit that corresponds to an object region in the image to low transmissivity. The light control pixel has an electrochromic element and a pixel circuit. The pixel circuit has: a driving circuit that is connected to one electrode of the electrochromic element and outputs a driving voltage to the electrode in accordance with a signal voltage; a switching transistor that outputs the signal voltage to the input of the driving circuit in accordance with an input scan signal; and a capacitor element that is connected to the input of the driving circuit and keeps the signal voltage that is output to the driving circuit. The driving circuit is a CMOS circuit using a transistor with an enhanced characteristic.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a display device, a control method for a display device, and a control program for a display device. [Background technology]

[0002] An electrochromic element is an element that can be switched between a light-blocking state in which it blocks light and a transparent state in which it transmits light, by switching a driving voltage applied between electrodes.

[0003] A driving circuit using a complementary metal-oxide semiconductor (CMOS) circuit has been proposed as a driving circuit for supplying a driving voltage to an electrochromic element, and the driving circuit is provided for each light-adjusting pixel including an electrochromic element.

[0004] For example, the following Patent Document 1 discloses a CMOS circuit as a configuration of a drive circuit that transmits a voltage corresponding to a data voltage to an electrochromic light switching element. The CMOS circuit is composed of an n-type field effect transistor and a p-type field effect transistor. The two field effect transistors of the CMOS circuit are connected to a positive voltage line and a negative voltage line, respectively. The CMOS circuit outputs the voltage of the positive voltage line or the voltage of the negative voltage line to the electrochromic light switching element according to the input data voltage. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Special Publication No. 2004-518159 Summary of the Invention [Problem to be solved by the invention]

[0006] However, a shoot-through current can flow through the CMOS circuit that constitutes the drive circuit that outputs the drive voltage to the electrochromic element when the drive voltage is switched, and if this uncontrolled shoot-through current flows into the electrochromic element, the operation of the electrochromic element becomes unstable.

[0007] The present invention has been made to solve the above problems. That is, an object of the present invention is to provide a display device, a control method for a display device, and a control program for a display device that can improve degradation of image quality caused by instability in the operation of an electrochromic element when a drive voltage to the electrochromic element is switched by a drive circuit. [Means for solving the problem]

[0008] a dimming device having a dimming image display unit having a plurality of dimming pixels and switching a transmittance of each dimming pixel of the dimming image display unit; and a control unit which switches the transmittance of the dimming pixel in a corresponding area of ​​the dimming image display unit, which corresponds to an object area in the image, to a low transmittance, wherein the dimming pixel has an electrochromic element and a pixel circuit, the pixel circuit having: a drive circuit connected to one electrode of the electrochromic element and outputting a drive voltage to the electrode in response to an input signal voltage; a switching transistor which outputs the supplied signal voltage to an input of the drive circuit in response to an input scanning signal; and a capacitive element connected to the input of the drive circuit and holding the signal voltage output to the drive circuit, wherein the drive circuit is a CMOS circuit using transistors having enhancement characteristics. Effect of the Invention

[0009] The drive circuit, which is connected to one electrode of the electrochromic element and outputs a drive voltage to that electrode in response to an input signal voltage, is a CMOS circuit using transistors with enhancement characteristics, which improves the degradation of image quality caused by instability in the operation of the electrochromic element when the drive circuit switches the drive voltage to the electrochromic element. [Brief description of the drawings]

[0010] [Figure 1A] FIG. 1 is a diagram showing a configuration of an electrochromic element. [Figure 1B] FIG. 1 is a diagram showing a configuration of an electrochromic element. [Figure 1C] FIG. 1 is a diagram showing a configuration of an electrochromic element. [Diagram 2] FIG. 2 is a diagram showing a configuration of a dimming image display device (including a dimming image display unit). [Diagram 3] FIG. 2 is a diagram showing a configuration of a dimming image display device (including a dimming image display unit). [Figure 4] FIG. 2 is a block diagram showing a hardware configuration of the display device. [Diagram 5] 4 is a perspective view showing a positional relationship between a dimming image display section of the dimming image display device and an image display section of the image display device. FIG. [Figure 6] 2 is a block diagram showing a hardware configuration of a control unit of the display device. FIG. [Figure 7] FIG. 1 is an explanatory diagram for explaining an example of a situation in which the display device is used; [Figure 8] FIG. 11 is an explanatory diagram for explaining another example of a situation in which the display device is used. [Figure 9A] FIG. 11 is an explanatory diagram of a comparative example for explaining a shoot-through current flowing in a CMOS circuit using a TFT having depletion characteristics. [Figure 9B] FIG. 11 is an explanatory diagram of a comparative example for explaining a shoot-through current flowing in a CMOS circuit using a TFT having depletion characteristics. [Figure 9C]FIG. 11 is an explanatory diagram of a comparative example for explaining a shoot-through current flowing in a CMOS circuit using a TFT having depletion characteristics. [Figure 10] FIG. 13 is a diagram showing the transfer characteristics of PMOS and NMOS in the CMOS circuit of the driver circuit. [Figure 11] 11 is a diagram showing a through current that occurs when a signal voltage input to a drive circuit is switched; [Figure 12A] FIG. 2 is a diagram showing a dimming pixel circuit. [Figure 12B] FIG. 11 is a timing chart showing a write operation of a signal voltage to a dimming pixel. [Figure 12C] 12C is a diagram showing the state of an electrochromic element of a dimming pixel to which a signal voltage is written in the timing chart of FIG. 12B. FIG. [Figure 13] FIG. 11 is a flowchart showing the operation of the display device. [Figure 14A] FIG. 2 is a diagram showing a dimming pixel circuit. [Figure 14B] FIG. 11 is a timing chart showing a write operation of a signal voltage to a dimming pixel. [Figure 14C] 14C is a diagram showing the state of an electrochromic element of a dimming pixel to which a signal voltage is written in the timing chart of FIG. 14B. FIG. [Figure 15] FIG. 11 is a flowchart showing the operation of the light-adjusting image display device. [Figure 16A] FIG. 2 is a diagram showing a dimming pixel circuit. [Figure 16B] FIG. 11 is a timing chart showing a write operation of a signal voltage to a dimming pixel. [Figure 16C] 11 is an explanatory diagram for explaining the order of writing signal voltages and reset voltages to dimming pixels for each row. FIG. [Figure 17] FIG. 11 is a flowchart showing the operation of the light-adjusting image display device. [Figure 18A] FIG. 2 is a diagram showing a dimming pixel circuit. [Figure 18B] FIG. 11 is a timing chart showing a write operation of a signal voltage to a dimming pixel. [Figure 18C]12B is a diagram showing the state of the electrochromic element of each dimming pixel before and after a signal voltage is written in the timing chart of FIG. 12A. FIG. [Figure 19] FIG. 11 is a flowchart showing the operation of the light-adjusting image display device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, a dimming pixel circuit for driving an electrochromic element, a display device, a control method for the display device, and a control program for the display device will be described in detail with reference to the drawings. The embodiments described are merely exemplary, and various modifications are possible from such embodiments. Hereinafter, in the drawings, the same reference numerals refer to the same components, and the size of each component in the drawings is exaggerated for clarity and convenience of description.

[0012] Hereinafter, the expressions "upper" or "above" include not only what is directly above / below / left / right in contact, but also what is above / below / left / right without contact.

[0013] Terms such as first and second are used to describe various components, but are used only to distinguish one component from another, and are not intended to limit the components to differing materials or structures.

[0014] The singular expressions include the plural expressions unless the context clearly indicates otherwise. In addition, when a part "comprises" a certain element, this does not mean that other elements are excluded, but that other elements may be further included, unless otherwise specified to the contrary.

[0015] In addition, terms such as "unit" and "module" used in the specification refer to a unit that processes one or more functions or operations, and may be embodied in hardware or software, or a combination of hardware and software.

[0016] (First embodiment) <Electrochromic element 110> 1A to 1C are diagrams showing the configuration of an electrochromic element 110. Fig. 1A shows the state of the electrochromic element 110 when no voltage is applied. Fig. 1B shows the state of the electrochromic element 110 in a light-shielding state. Fig. 1C shows the state of the electrochromic element 110 in a transparent state (light-transmitting state).

[0017] The electrochromic element 110 includes a first substrate 10, a first electrode 20 (counter electrode) formed on the first substrate 10, a second substrate 50, and a second electrode 40 (working electrode) formed on the second substrate 50. The electrochromic element 110 includes an electrolyte layer 30 sealed between the opposing first electrode 20 and second electrode 40. The electrolyte layer 30 includes an electrochromic material. The electrochromic element 110 includes a bank material 60 provided between the first substrate 10 and the second substrate 50 for sealing the electrolyte layer 30 for each dimming pixel 100 (see FIG. 2, etc.). The bank material 60 may not be provided.

[0018] The first substrate 10 and the second substrate 50 may be insulating substrates having light-transmitting properties. The first substrate 10 and the second substrate 50 are made of, for example, glass or resin.

[0019] The first electrode 20 and the second electrode 40 include a transparent electrode film having light transmitting properties. The transparent electrode film is made of, for example, ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), SnO 2 and ZnO.

[0020] The electrolyte layer 30 may be configured to include an electrolyte, an electrochromic material, a mediator, and a solvent. The electrolyte contained in the electrolyte layer 30 has a function of promoting the oxidation-reduction of the electrochromic material. The electrolyte is preferably a supporting electrolyte. For example, a lithium salt, a potassium salt, or a sodium salt may be used as the electrolyte. For example, the lithium salt may be lithium chloride (LiCl), lithium bromide (LiBr), lithium iodide (LiI), lithium tetrafluoroborate (LiBF 4 ) and lithium perchlorate (LiClO 4 ), etc. Potassium salts include potassium chloride (KCl), potassium bromide (KBr), and potassium iodide (KI). Sodium salts include sodium chloride (NaCl), sodium bromide (NaBr), and sodium iodide (NaI), etc. The electrolyte may include bromine, for example, tetrabutylammonium bromide (TBABr), etc.

[0021] An electrochromic material is a substance that undergoes an electrochemical oxidation-reduction reaction. In an electrochromic material, deposition on an electrode surface and dissolution into the electrolyte layer 30 occur due to electrochemical oxidation and reduction reactions. The electrochromic material may include one or more metal elements selected from the group consisting of silver (Ag), bismuth (Bi), chromium (Cr), iron (Fe), cadmium (Cd), cobalt (Co), nickel (Ni), tin (Sn), lead (Pb), and copper (Cu).

[0022] The mediator is a material that can perform oxidation and reduction with electrochemically lower energy than the electrochromic material. For example, the oxidized form of the mediator can provide and receive electrons from an electrochromic material such as silver as needed, thereby promoting the dissolution of the electrochromic material into the electrolyte layer 30. For example, a salt of copper (II) ions can be used as the mediator, and specifically, copper chloride (CuCl 2 ), copper sulfate (CuSO 4 ) or copper bromide (CuBr 2 ) etc. can be used.

[0023] The solvent dissolves the electrolyte, the electrochromic material, and the mediator, and stably holds them. For example, a polar solvent, an organic solvent, an ionic liquid, an ion-conductive polymer, or a polymer electrolyte can be used as the solvent. For example, DMSO (Dimethyl Sulfoxide), propylene carbonate, N,N-dimethylformamide, tetrahydrofuran, acetonitrile, polyvinyl sulfuric acid, polystyrene sulfonic acid, or polyacrylic acid can be used as the solvent.

[0024] A sealant (not shown) is arranged in a frame shape along the periphery of the first substrate 10 and the second substrate 50. The electrolyte layer 30 can be filled in the space surrounded by the first substrate 10, the second substrate 50, and the sealant. The sealant is made of, for example, an ultraviolet curing resin or a thermosetting resin.

[0025] As shown in FIG. 1A, when no voltage is applied between the first electrode 20 and the second electrode 40, the electrochromic material containing metal ions m+, such as silver ions, is dissolved in the electrolyte layer 30.

[0026] 1B, when a voltage is applied between the first electrode 20 and the second electrode 40 so that the first electrode 20 becomes a positive electrode, metal ions m+ in the electrolyte layer 30 are reduced, and a metal m such as silver is precipitated on the surface of the second electrode 40. At this time, the light transmittance of the electrochromic element 110 may decrease to about 1%. That is, the electrochromic element 110 is in a light-shielding state. In the light-shielding state, the precipitated metal m reflects visible light, and a mirror surface may be formed on the surface of the second electrode 40.

[0027] 1C, when a voltage is applied between the first electrode 20 and the second electrode 40 so that the first electrode 20 becomes a negative electrode, the metal m deposited on the surface of the second electrode 40 is oxidized to become metal ions m+. At this time, the light transmittance of the electrochromic element 110 can increase to about 75%. In other words, the electrochromic element 110 becomes transparent.

[0028] Hereinafter, the states of the electrochromic element 110, including the light-blocking state and the transparent state, are also simply referred to as the "states of the electrochromic element 110."

[0029] <Light-adjusting image display device 1> 2 and 3 are diagrams showing the configuration of the light control image display device 1. The light control image display device 1 includes a plurality of light control pixels 100 arranged at equal intervals in the row and column directions. As shown in FIG. 2, the light control pixel 100 includes an electrochromic element 110 and a light control pixel circuit 70. The light control pixel circuit 70 may include a drive circuit 120, a capacitance element 130, and a switching transistor 140. The drive circuit 120, the capacitance element 130, and the switching transistor 140 are formed as a circuit pattern on a semiconductor substrate (not shown) using, for example, a general semiconductor process. The semiconductor substrate may be mounted on a light-transmitting substrate (not shown) together with the electrochromic element 110.

[0030] An image displayed by the plurality of dimming pixels 100 is referred to as a dimming image 7 (see FIG. 7, etc.).

[0031] The electrochromic element 110 can be approximated by an equivalent circuit in which a capacitance element and a resistance element are connected in parallel.

[0032] The driving circuit 120 is configured by a CMOS circuit. The output of the driving circuit 120 is connected to a first electrode 20, which is one electrode of the electrochromic element 110. The other electrode of the electrochromic element 110, which is a second electrode 40, is connected to a ground line (GND), and a ground potential Vss is constantly applied to the second electrode 40. The input of the driving circuit 120 is connected to an output of the switching transistor 140, and is connected to a signal line through which a dimming signal voltage Vsig is supplied via the switching transistor 140. The driving circuit 120 is connected to a first power supply line and a second power supply line, and a first power supply voltage Vcc1 is constantly supplied from the first power supply line, and a second power supply voltage Vcc2 is constantly supplied from the second power supply line. The switching transistor 140 is configured by one MOS (for example, an NMOS (n-ch MOS transistor)), and has a drain electrode connected to a signal line, a source electrode connected to an input of the driving circuit 120, and a gate electrode connected to a scanning signal line. In addition, a capacitance element 130 is connected between the input of the drive circuit 120 and the source electrode of the switching transistor 140. The switching transistor 140 outputs the dimming signal voltage Vsig, which is supplied to the drain electrode from a signal line, to the input of the drive circuit 120 in response to a scanning signal Vscan input to the gate electrode. At this time, the dimming signal voltage Vsig output to the input of the drive circuit 120 is held in the capacitance element 130. When the dimming signal voltage Vsig is input, the drive circuit 120 outputs a drive voltage to the first electrode 20 of the electrochromic element 110 in response to the input dimming signal voltage Vsig. Specifically, the drive circuit 120 outputs the first power supply voltage Vcc1 or the second power supply voltage Vcc2 as a drive voltage to the first electrode 20 of the electrochromic element 110 in response to the dimming signal voltage Vsig.

[0033] The first power supply voltage Vcc1 is, for example, +4 V. The second power supply voltage Vcc2 is, for example, -4 V. The scanning signal Vscan is a pulse voltage with a high of +10 V and a low of -13 V. The dimming signal voltage Vsig is a pulse voltage with a high of +10 V and a low of -10 V.

[0034] When the first power supply voltage Vcc1 is output as a high drive voltage to the first electrode 20 of the electrochromic element 110, the electrochromic element 110 is in a light-blocking state. When the second power supply voltage Vcc2 is output as a low drive voltage to the first electrode 20 of the electrochromic element 110, the electrochromic element 110 is in a transparent state.

[0035] A scanning signal line for supplying a scanning signal Vscan is provided for each row. In other words, the same scanning signal line is connected to all the dimming pixels 100 (e.g., dimming pixel 111 and dimming pixel 112, etc.) in one row, and another scanning signal line is connected to all the dimming pixels 100 (e.g., dimming pixel 121 and dimming pixel 122, etc.) in another row. The same scanning signal Vscan is supplied to the dimming pixels 100 in the same row. A signal line for supplying a dimming signal voltage Vsig is provided for each column. In other words, the same signal line is connected to all the dimming pixels (e.g., dimming pixel 111 and dimming pixel 121, etc.) in one column, and another signal line is connected to all the dimming pixels (e.g., dimming pixel 121 and dimming pixel 122, etc.) in the other column. The same dimming signal voltage Vsig is supplied to the dimming pixels 100 in the same column. The dimming signal voltage Vsig may be a time-division multiplexed signal that is synchronized with the scanning signal Vscan and is a voltage to be written to each dimming pixel 100. This causes the dimming signal voltage Vsig to be written to each dimming pixel 100 for each row. That is, the dimming signal voltage Vsig corresponding to a frame of one dimming image is written to the dimming pixel 100 for each row (that is, held in the capacitance element 130).

[0036] As shown in FIG. 3, the dimming image display device 1 is equipped with a control unit 1000, a dimming signal drive circuit unit 2000 (column driver), and a scanning signal drive circuit unit 3000 (row driver). The control unit 1000 includes a CPU, a memory, a storage, and a power supply circuit, and controls the dimming signal drive circuit unit 2000 and the scanning signal drive circuit unit 3000. The control unit 1000 constitutes a computer. The dimming scan signal Vscan can be supplied or output to each dimming pixel 100 through wiring by the scanning signal drive circuit unit 3000. The dimming signal voltage Vsig can be supplied or output to each dimming pixel 100 through wiring by the dimming signal drive circuit unit 2000. The first power supply voltage Vcc1, the second power supply voltage Vcc2, and the ground potential Vss can be generated by the control unit 1000, for example, and supplied to each dimming pixel 100 through wiring. Furthermore, the first power supply voltage Vcc1, the second power supply voltage Vcc2, and the ground potential Vss can be supplied or output to each dimming pixel 100 through wiring via the dimming signal drive circuit unit 2000 or the scanning signal drive circuit unit 3000. The multiple dimming pixels 100 included in the dimming image display device 1 configure a dimming image display unit 4000 (see FIG. 4).

[0037] <Display device 5> Fig. 4 is a block diagram showing a hardware configuration of a display device 5 including the light adjusting image display device 1 and the image display device 2. Fig. 5 is a perspective view showing the positional relationship between the light adjusting image display unit 4000 of the light adjusting image display device 1 and the image display unit 7000 of the image display device 2. Fig. 6 is a block diagram showing the hardware configuration of a control unit 1000 of the display device 5.

[0038] The display device 5 includes a dimming image display device 1 and an image display device 2. The dimming image display device 1 includes a dimming image display unit 4000 including a plurality of dimming pixels 100. The image display device 2 includes an image display unit 7000, an image signal drive circuit unit 5000, an image scanning signal drive circuit unit 6000, and a control unit 1000. The dimming image display device 1 and the image display device 2 may share a single control unit 1000.

[0039] <Control unit 1000> The control unit 1000 includes a CPU (Central Processing Unit) 1001, a ROM (Read Only Memory) 1002, a RAM (Random Access Memory) 1003, a storage 1004, a communication interface 1005, a power supply circuit 1006, and a signal generating unit 1007. Each component may be connected to each other via a bus.

[0040] The CPU 1001 controls each component of the display device 5 and performs various arithmetic processing in accordance with programs recorded in the ROM 1002 or storage 1004. The functions of the CPU 1001 will be described in detail later.

[0041] The ROM 1002 stores various programs and various data.

[0042] The RAM 1003 serves as a working area for temporarily storing programs and data.

[0043] The storage 1004 is configured by a solid state drive (SDD) or the like, and stores various programs including an operating system, and various data.

[0044] The communication interface 1005 is an interface for communicating with other devices. As the communication interface 1005, a wired or wireless communication interface conforming to various standards is used.

[0045] The power supply circuit 1006 generates and outputs power supply voltages (first power supply voltage Vcc1, second power supply voltage Vcc2, etc.) For example, a BGR (Bandgap Reference) circuit may be used as the power supply circuit.

[0046] The signal generating unit 1007 generates and outputs an image signal, an image scanning signal, a dimming signal, and a dimming scanning signal. The image signal and the image scanning signal are signals for displaying the image 9 on the image display unit 7000. The signal generating unit 1007 generates an image signal and an image scanning signal based on image data under the control of the CPU 1001. The image signal and the image scanning signal are signals for displaying the image 9 on the image display unit 7000. The signal generating unit 1007 generates a dimming signal and a dimming scanning signal based on dimming data under the control of the CPU 1001. The dimming signal and the dimming scanning signal are signals for displaying the dimming image 7 on the dimming image display unit 4000. The image data and the dimming data are received from an external device (not shown) via the communication interface 1005. The image data are data corresponding to the image 9. That is, the image data are data that specify the color of each pixel 7001 for each frame of the image 9. The dimming data are data corresponding to the dimming image 7. That is, the light adjustment data is data that defines, for each frame of the light adjustment image 7, whether each light adjustment pixel 100 is in a light-shielding state or a transparent state.

[0047] The image signal driving circuit unit 5000 generates an image signal voltage Vi based on the image signal output from the control unit 1000, and outputs it to the image display unit 7000. The image scanning signal driving circuit unit 6000 generates an image scanning signal voltage Vsi based on the image scanning signal output from the control unit 1000, and outputs it to the image display unit 7000.

[0048] The image display unit 7000 includes a plurality of pixels 7001, and the plurality of pixels 7001 display an image 9 (see FIG. 7, etc.).

[0049] The dimming signal drive circuit unit 2000 generates a dimming signal voltage Vsig based on the dimming signal output from the control unit 1000, and outputs it to the dimming image display unit 4000. The dimming scan signal drive circuit unit 3000 generates a dimming scan signal voltage Vscan based on the dimming scan signal output from the control unit 1000, and outputs it to the dimming image display unit 4000.

[0050] The dimming image display unit 4000 displays a dimming image 7 using a plurality of dimming pixels 100 .

[0051] Although not shown, the control unit 1000 generates a first power supply voltage Vcc1 and a second power supply voltage Vcc2, as well as various power supply voltages for the dimming scan signal and the dimming signal, by a power supply circuit, and supplies various signals to the dimming image display unit 4000 via a dimming signal drive circuit unit 2000 or a dimming scan signal drive circuit unit 3000. Similarly, the control unit 1000 supplies various signals to the image display unit 7000 via the image signal drive circuit unit 5000 or the image scan signal drive circuit unit 6000 using the power supply voltages generated by the power supply circuit.

[0052] The dimming image display section 4000 and the image display section 7000 are the same size, and the image 9 and the dimming image 7 can be arranged to overlap when viewed from a common perpendicular direction (the direction of the arrow in FIG. 5 ) that is a common perpendicular direction of both from the dimming image display section 4000 to the image display section 7000. That is, the dimming image display section 4000 and the image display section 7000 can be arranged so that two perpendicular lines passing through their respective centers overlap. As a result, the dimming image 7 is arranged in the background of the image 9 when viewed from the common perpendicular direction, so that the background of the pixel 100 in the image 9 that corresponds to the pixel 100 in the transparent state of the dimming image 7 becomes transparent. On the other hand, the background of the pixel 100 in the image 9 that corresponds to the pixel 100 in the light-shielded state of the dimming image 7 becomes opaque.

[0053] Each pixel 7001 of the image display unit 7000 may include a red light emitting element, a green light emitting element, and a blue light emitting element, so that the image display unit 7000 may display a color image 9.

[0054] The CPU 1001 can put the dimming pixels 100 in a region of the dimming image display section 4000 corresponding to an object region 99 (see FIG. 7, etc.) in the image 9 (hereinafter referred to as the "corresponding region 199") into a light-shielding state, and put the region of the dimming image display section 4000 other than the corresponding region into a transparent state. That is, the CPU 1001 switches the transmittance of the dimming pixels 100 in the corresponding region 199 to a low transmittance, and switches the transmittance of the region of the dimming pixels 100 other than the corresponding region 199 to a high transmittance. The object region 99 can be arbitrarily set as a region where the background should be put into a light-shielding state. For example, the object region 99 is a region of a still image, and a region where specific information or a drawing is displayed.

[0055] Fig. 7 is an explanatory diagram for explaining an example of a situation in which the display device 5 is used. In the example of Fig. 7, the display device 5 is used as a guide screen at the front desk of a hotel. In Fig. 7, the light-adjusting pixels 100 in the light-shielded state are shown in black, and the light-adjusting pixels 100 in the transparent state are shown in white.

[0056] In FIG. 7, the area of ​​the still image in which the guide text or map is displayed in the image 9 is set as the object area 99, and the dimming pixels 100 in the corresponding area 199 of the dimming image display unit 4000 corresponding to the object area 99 are in a shaded state.

[0057] Information on the object area 99 is included in the dimming data. That is, the dimming data is data that specifies whether each dimming pixel 100 is in a light-shielding state or a transparent state for each frame of the dimming image 7. Therefore, the dimming pixels 100 that are specified to be in a light-shielding state define the object area 99. The CPU 1001 sets the object area 99 based on the dimming data.

[0058] The CPU 1001 may detect the object region 99 based on the image 9. In this case, the dimming data is not necessary. The CPU 1001 detects and sets, for example, a region of a still image detected by a time subtraction method or a background subtraction method as the object region 99. The CPU 1001 may detect and set, as the object region 99, a region of a still image in the image 9 using a trained model of a neural network that has been trained to detect a region of a still image in the image 9 from the image 9.

[0059] The CPU 1001 may determine whether to put the object region 99 into a light-shielding state (low transmittance). The CPU 1001 may determine whether to put the object region 99 into a light-shielding state, for example, based on an instruction from a user. If the CPU 1001 determines that the object region 99 should be put into a light-shielding state, it puts the dimming pixels 100 in the corresponding region 199 into a light-shielding state. If the CPU 1001 determines that the object region should not be put into a light-shielding state, it puts all the dimming pixels 100 in the dimming image display unit 400 into a transparent state.

[0060] Fig. 8 is an explanatory diagram for explaining another example of a situation in which the display device 5 is used. In the example of Fig. 8, the display device 5 is used for a navigation screen arranged in front of the windshield of a vehicle. In Fig. 8, the light-adjusting pixels 100 in a transparent state are shown in white.

[0061] In FIG. 8, the CPU 1001 has determined not to put the object area 99 in a shading state, and as a result, all of the dimming pixels 100 are in a transparent state, including the dimming pixels 100 in the corresponding area 199 that corresponds to the object area 99 of the still image in which road traffic information and a map are displayed in the image 9.

[0062] In this embodiment, the CMOS circuit of the drive circuit 120 uses a TFT (Thin Film Transistor) with an enhancement characteristic. That is, the CMOS circuit of the drive circuit 120 is made of a PMOS (p-ch MOS transistor) and an NMOS (n-ch MOS transistor) with an enhancement characteristic. This makes it possible to suppress a through current that may flow into the CMOS circuit of the drive circuit 120 when the drive circuit 120 switches the drive voltage. This makes it possible to prevent the operation of the electrochromic element 110 from becoming unstable due to the uncontrolled through current flowing into the electrochromic element 110.

[0063] 9A to 9C are diagrams illustrating a comparative example for explaining a shoot-through current flowing in a CMOS circuit using a TFT having depletion characteristics.

[0064] FIG. 9A shows the transfer characteristics of PMOS and NMOS with depletion characteristics. FIG. 9B shows the through current flowing in a CMOS circuit using a TFT with depletion characteristics. FIG. 9C shows the through current flowing in an electrochromic element 110 connected to a CMOS circuit. As shown in FIG. 9A, the PMOS and NMOS with depletion characteristics do not turn off when the gate-source voltage Vgs is 0V, and a drain current Ids flows. Therefore, when the input to the CMOS circuit switches from High to Low, both the PMOS and the NMOS conduct (turn ON) near the gate threshold voltages Vth_p and Vth_n, respectively, and flow the drain current Ids. This generates a through current indicated by an arrow in FIG. 9B. As shown in FIG. 9C, when an electrochromic element 110 is connected to a CMOS circuit, an uncontrolled through current indicated by an arrow flows into the electrochromic element 110, making the operation of the electrochromic element 110 unstable.

[0065] FIG. 10 is a diagram showing the transfer characteristics of the PMOS and NMOS of the CMOS circuit of the drive circuit 120 of this embodiment. As shown in FIG. 10, the PMOS and NMOS having the enhancement characteristic are turned off when the gate-source voltage Vgs is 0V, and the drain current Ids does not flow. Therefore, when the input to the drive circuit 120 switches from High to Low, both the PMOS and the NMOS are turned off, and the drain current Ids does not flow. That is, the CMOS circuit of the drive circuit 120 becomes highly resistant in a region where the input drive voltage (corresponding to Vgs) is a value between the gate threshold voltage Vth_p of the PMOS and the gate threshold voltage Vth_n of the NMOS. Therefore, even if the dimming signal voltage Vsig input to the drive circuit 120 switches, the generation of the through current can be suppressed.

[0066] FIG. 11 is a diagram showing a through current generated when the dimming signal voltage Vsig input to the drive circuit 120 is switched. In FIG. 11, the dashed line indicates the through current flowing through the CMOS circuit of the comparative example. The solid line indicates the through current flowing through the CMOS circuit of the drive circuit 120 of the present embodiment. The CMOS circuit of the comparative example is composed of PMOS and NMOS with depletion characteristics, so a relatively large through current is generated, and the through current flows into the electrochromic element 110, making the operation of the electrochromic element 110 unstable. On the other hand, the CMOS circuit of the drive circuit 120 of the present embodiment is composed of PMOS and NMOS with enhancement characteristics, so the through current is suppressed.

[0067] The light adjusting image display device 1 displays a light adjusting image by putting the electrochromic element 110 of each light adjusting pixel into a light blocking state or a transparent state for each frame of the light adjusting image based on the light adjusting image data.

[0068] <Writing Operation of Dimming Signal Voltage Vsig to Dimming Pixel 100> The operation of writing the dimming signal voltage Vsig to the dimming pixel 100 will be described.

[0069] Fig. 12A is a diagram showing the dimming pixel circuit 70 of the dimming pixel 100. In Fig. 12A, the electrochromic element 110 is also shown. Fig. 12B is a diagram showing a timing chart of a write operation of the dimming signal voltage Vsig to the dimming pixel 100. Fig. 12C is a diagram showing a state of the electrochromic element 110 of the dimming pixel 100 to which the dimming signal voltage Vsig is written in the timing chart of Fig. 12B. In Fig. 12C, the light-shielding state is shown in black, and the transparent state is shown in white.

[0070] 12B shows a timing chart for writing the dimming signal voltage Vsig to each of three arbitrary dimming pixels 100 arranged in a column direction. n, n+1, and n+2 indicate row numbers. For ease of explanation, the following description focuses on the operation of writing the dimming signal voltage Vsig to the dimming pixels 100 of row numbers n, n+1, and n+2 in an arbitrary column.

[0071] As described above, a scanning signal line for supplying a scanning signal Vscan is provided for each row. Therefore, the dimming signal voltage Vsig is written to the dimming pixels 100 for each row. When the scanning signal is High (+10V), the switching transistor 140 is turned on, and the dimming signal voltage Vsig is held in the capacitance element 130, thereby writing the dimming signal voltage Vsig to the dimming pixels 100. In the example of FIG. 12B, the dimming signal voltage Vsig is written to the dimming pixels 100 in the order of the nth row, the n+1th row, and the n+2th row. The scanning signal Vscan for writing the dimming signal voltage Vsig to the nth row of dimming pixels 100 is indicated as Vscan_n. The scanning signal Vscan for writing the dimming signal voltage Vsig to the nth row of dimming pixels 100 is indicated as Vscan_n+1. The scanning signal Vscan for writing the dimming signal voltage Vsig to the dimming pixels 100 in the n+2th row is indicated as Vscan_n+2.

[0072] The dimming signal voltage Vsig is time-division multiplexed with the dimming signal voltage Vsig to be written to each dimming pixel 100. In the example of Fig. 12B, a dimming signal voltage Vsig is illustrated in which the dimming signal voltage Vsig (+10V) for putting the dimming pixels 100 in the nth row into the light-shielding state, the dimming signal voltage Vsig (-10V) for putting the dimming pixels 100 in the n+1th row into the transparent state, and the dimming signal voltage Vsig (+10V) for putting the dimming pixels 100 in the n+2th row into the light-shielding state.

[0073] The dimming signal voltage Vsig is written sequentially to the dimming pixels 100 of each row at the timing when the switching transistors 140 of each row are sequentially turned on by the scanning signal Vscan. As a result, the dimming signal voltage Vsig is held in the capacitance element 130, and node A becomes a voltage corresponding to the dimming signal voltage Vsig. Specifically, when the dimming signal voltage Vsig for putting the electrochromic element 110 of the dimming pixel 100 in a light-shielding state is written, node A becomes +10 V. When the dimming signal voltage Vsig for putting the electrochromic element 110 of the dimming pixel 100 in a transparent state is written, node A becomes -10 V.

[0074] When the dimming signal voltage Vsig (+10V) for putting the electrochromic element 110 of the dimming pixel 100 of the nth row into a light-shielding state is written to the dimming pixel 100, node B of the dimming pixel 100 of the nth row becomes the driving voltage (+4V) output by the driving circuit 120 in response to the dimming signal voltage Vsig. Note that in FIG. 12B, the voltage of node C, which is the ground potential Vss, is also shown. When the dimming signal voltage Vsig (-10V) for putting the electrochromic element 110 of the dimming pixel 100 of the nth row into a transparent state is written to the dimming pixel 100, node B of the nth row becomes the driving voltage (-4V) output by the driving circuit 120 in response to the dimming signal voltage Vsig. When the dimming signal voltage Vsig (+10V) for putting the dimming pixels 100 in the n+2th row into a light-shielded state is written to the dimming pixels 100, node B of the dimming pixels 100 in the n+2th row becomes the driving voltage (+4V) output by the driving circuit 120 in response to the dimming signal voltage Vsig.

[0075] Depending on the driving voltage (voltage of node B), the state of the electrochromic element 110 of each dimming pixel 100 is switched. In FIG. 12B, the current I EC is shown.

[0076] 12C, a scanning signal Vscan_n is input to the dimming pixels 100 in the nth row and a dimming signal voltage Vsig is written thereto, thereby causing the electrochromic elements 110 of the dimming pixels 100 in the nth row to enter a light-shielding state. A scanning signal Vscan_n+1 is input to the dimming pixels 100 in the n+1th row and a dimming signal voltage Vsig is written thereto, thereby causing the electrochromic elements 110 of the dimming pixels 100 in the n+1th row to enter a transparent state. A scanning signal Vscan_n+2 is input to the dimming pixels 100 in the n+2th row and a dimming signal voltage Vsig is written thereto, thereby causing the electrochromic elements 110 of the dimming pixels 100 in the n+2th row to enter a light-shielding state.

[0077] 13 is a diagram showing a flowchart of the operation of the display device 5. This flowchart can be executed by the CPU 1001 based on a program.

[0078] The CPU 1001 determines whether or not light adjustment data is input (S1). That is, the CPU 1001 determines whether or not light adjustment data is input via the communication interface 1005.

[0079] When the CPU 1001 determines that the dimming data is input (S1: YES), it generates a dimming signal and a dimming scanning signal based on the dimming data (S2).

[0080] When the CPU 1001 determines that no dimming data has been input (S1: NO), it stores n frames of image data in the storage 1004 (S3). n can be set according to the response speed of the electrochromic element. For example, the CPU 1001 stores image data for every 10 frames. The control unit 1000 can store image data for n frames and successively update the stored image data with new image data.

[0081] The CPU 1001 determines whether or not there is an object region 99 in the image 9 based on the image data of n frames (S4). When the CPU 1001 determines that there is no object region 99 (S4: NO), it generates a light control signal that sets all the light control pixels 100 to a transparent state (S5). Note that in step S5, a light control signal that sets all the light control pixels 100 to a light-shielded state may be generated.

[0082] When the CPU 1001 determines that an object region 99 is present in the image 9 (S4: YES), it determines whether or not to put a corresponding region 199 corresponding to the object region 99 into a light-shielded state (S6). When the CPU 1001 determines that the corresponding region 199 corresponding to the object region 99 should not be put into a light-shielded state (S6: NO), it generates a light control signal that puts all the dimming pixels 100 into a transparent state (S5). As described above, in step S5, a light control signal that puts all the dimming pixels 100 into a light-shielded state may be generated.

[0083] When the CPU 1001 determines that the corresponding area 199 corresponding to the object area 99 is to be placed in a light-shielded state (S6: YES), it generates a light control signal that places the light control pixels 100 in the corresponding area 199 corresponding to the object area 99 in a light-shielded state (S7).

[0084] Second embodiment The second embodiment will be described. The difference between the first embodiment and the second embodiment is that a reset circuit 150 (see FIG. 14A) is provided to make the output of the drive circuit 120 floating at a predetermined timing. In other respects, the second embodiment is similar to the first embodiment, so that the overlapping descriptions will be omitted or simplified.

[0085] Fig. 14A is a diagram showing the dimming pixel circuit 70 of the dimming pixel 100. In Fig. 14A, the electrochromic element 110 is also shown. Fig. 14B is a diagram showing a timing chart of a write operation of the dimming signal voltage Vsig to the dimming pixel 100. Fig. 14C is a diagram showing a state of the electrochromic element 110 of the dimming pixel 100 to which the dimming signal voltage Vsig is written in the timing chart of Fig. 14B. In Fig. 14C, the light-shielding state is shown in black, and the transparent state is shown in white.

[0086] As shown in FIG. 14A, the dimming pixel circuit 70 may include a drive circuit 120, a capacitance element 130, a switching transistor 140, and a reset circuit 150. The reset circuit 150 is connected between the input of the drive circuit 120 and a reset voltage line to which a reset voltage Vrst is supplied. When a reset signal Vscan2 is input from a reset signal line, the reset circuit 150 outputs the supplied reset voltage Vrst to the input of the drive circuit 120. The reset voltage Vrst is a voltage that makes the output of the drive circuit 120 floating when input to the input of the drive circuit 120. That is, the reset voltage Vrst is a voltage that turns off both the PMOS and NMOS of the CMOS circuit of the drive circuit 120 when input to the input of the drive circuit 120. The reset circuit 150 may be composed of, for example, an NMOS. In this case, the source electrode of the NMOS of the reset circuit 150 is connected to the reset voltage line, the drain electrode is connected to the input of the drive circuit 120, and the gate electrode is connected to the reset signal line.

[0087] A reset signal line for supplying the reset signal Vscan2 may be provided for each row. Therefore, the output of the drive circuit 120 may be floated for each row based on the reset signal Vscan2. By floating the output of the drive circuit 120, one electrode of the electrochromic element 110 is floated, so that the leakage current flowing through the electrochromic element 110 can be blocked. The leakage current flowing through the electrochromic element 110 continues to flow even after the state of the electrochromic element 110 is switched to either the light-shielding state or the transparent state. As a result, the leakage current flowing through the electrochromic element 110 of each dimming pixel 100 flows into the first power supply voltage Vcc1 to which the other electrode of the electrochromic element 110 is connected, causing a voltage drop in the first power supply voltage Vcc1. This increases the response time of the electrochromic element 110 (the time required for the state to be switched). In this embodiment, at the timing when the electrochromic element 110 of the dimming pixel 100 switches from a transparent state to a light-shielding state, or from a light-shielding state to a transparent state (the timing when the reaction time has elapsed), the reset signal Vscan2 cuts off the leakage current flowing through the electrochromic element 110. This makes it possible to suppress a voltage drop in the first power supply voltage Vcc1 due to the leakage current, and to prevent an increase in the reaction time of the electrochromic element 110.

[0088] 14B shows a timing chart for writing the dimming signal voltage Vsig to each of any of a plurality of dimming pixels 100 arranged in a column direction. n, n+1, ..., n+m indicate row numbers. For simplicity, the following description will be focused on the operation of writing the dimming signal voltage Vsig to the dimming pixels 100 of row numbers n, n+1, ..., n+m in any one column, as in the description of the first embodiment. In FIG. 14B, the subscript q of the dimming signal voltage Vsig indicates the column number of the any one column.

[0089] A scanning signal line for supplying a scanning signal Vscan is provided for each row. Therefore, the dimming signal voltage Vsig is written to the dimming pixels 100 for each row. When the scanning signal is High (+10V), the switching transistor 140 is turned on, and the dimming signal voltage Vsig is held in the capacitance element 130, thereby writing the dimming signal voltage Vsig to the dimming pixels 100. In the example of FIG. 14B, the dimming signal voltage Vsig is written to the dimming pixels 100 in the order of the nth row, the n+1th row, ..., the n+mth row. The scanning signal Vscan for writing the dimming signal voltage Vsig to the nth row of dimming pixels 100 is indicated as Vscan_n. The scanning signal Vscan for writing the dimming signal voltage Vsig to the nth row of dimming pixels 100 is indicated as Vscan_n+1. The scanning signal Vscan for writing the dimming signal voltage Vsig to the dimming pixels 100 in the n+mth row is indicated as Vscan_n+m.

[0090] The dimming signal voltage Vsig is time-division multiplexed with the dimming signal voltage Vsig to be written to each dimming pixel 100. In the example of Fig. 14B, a dimming signal voltage Vsig is illustrated in which a dimming signal voltage Vsig (+10V) for putting the dimming pixels 100 in the nth row into a light-shielded state and a dimming signal voltage Vsig (-10V) for putting the dimming pixels 100 in the n+1th row into a transparent state are time-division multiplexed.

[0091] At the timing when the switching transistors 140 of each row are sequentially turned on by the scanning signal Vscan, the dimming signal voltage Vsig is sequentially written to the dimming pixels 100 of each row. As a result, the dimming signal voltage Vsig is held in the capacitance element 130, and the node A becomes a voltage corresponding to the dimming signal voltage Vsig.

[0092] When a dimming signal voltage Vsig (+10V) for putting the dimming pixel 100 in the nth row into a light-shielded state is written to the dimming pixel 100, node B of the dimming pixel 100 in the nth row becomes a drive voltage (+4V) output by the drive circuit 120 in response to the dimming signal voltage Vsig. Note that Fig. 14B also shows the voltage of node C, which is the ground potential Vss. When a dimming signal voltage Vsig (-10V) for putting the dimming pixel 100 in the nth row into a transparent state is written to the dimming pixel 100, node B of the nth row becomes a drive voltage (-4V) output by the drive circuit 120 in response to the dimming signal voltage Vsig. When the dimming signal voltage Vsig (-10V) for putting the dimming pixel 100 in the n+mth row into a transparent state is written to the dimming pixel 100, node B of the dimming pixel 100 in the n+mth row becomes the driving voltage (-4V) output by the driving circuit 120 in response to the dimming signal voltage Vsig.

[0093] At the timing when the electrochromic element 110 of the dimming pixel 100 switches from a transparent state to a light-shielding state, or from a light-shielding state to a transparent state, the output of the drive circuit 120 of the dimming pixel 100 is made floating by the reset signal Vscan2. In the example of FIG. 14B, for example, after the state of the electrochromic element 110 of the dimming pixel 100 of the nth row is switched, the reset signal Vscan2 to the dimming pixel 100 of the nth row is made High, so that the voltage of the input (node ​​A) of the drive circuit 120 is made the reset voltage Vrst (for example, 0 V). This makes the output (node ​​B) of the drive circuit 120 floating. In other words, the timing when the reset signal Vscan2 is made High is the timing after the electrochromic element 110 of the dimming pixel 100 of one row is switched to either the transparent state or the light-shielding state. This timing is preferably a timing at which the scanning signal that turns on the switching transistor 140 is not input to the input of the switching transistor 140 of any of the dimming pixels 100. This timing can be adjusted by trimming based on an experiment or the like.

[0094] Depending on the driving voltage (voltage of node B), the state of the electrochromic element 110 of each dimming pixel 100 is switched. In FIG. 14B, the current I EC In the dimming pixel 100 to which the reset signal Vscan2 is input, after the reset signal Vscan2 is input, the current I EC is no longer flowing.

[0095] As shown in FIG. 14C, the scanning signal Vscan_n is input to the dimming pixels 100 in the nth row, and the dimming signal voltage Vsig is written to the dimming pixels 100 in the nth row, so that the electrochromic elements 110 of the dimming pixels 100 in the nth row are in a light-shielding state. At this time, the reset signal Vscan2 is not input to the dimming pixels 100 in the nth row. The scanning signal Vscan_n+1 is input to the dimming pixels 100 in the nth row, and the dimming signal voltage Vsig is written to the dimming pixels 100 in the nth row, so that the electrochromic elements 110 of the dimming pixels 100 in the nth row are in a transparent state. At this time, the reset signal Vscan2 is not input to the dimming pixels 100 in the nth row. The scanning signal Vscan_n+m is input to the dimming pixels 100 in the nth row, and the dimming signal voltage Vsig is written to the dimming pixels 100 in the nth row, so that the electrochromic elements 110 of the dimming pixels 100 in the nth row are in a transparent state. At this time, the reset signal Vscan2 is not input to the dimming pixels 100 in the nth row. The scanning signal Vscan_n+m+1 is input to the dimming pixels 100 in the n+m+1 row, and the dimming signal voltage Vsig is written to the dimming pixels 100 in the n+m+1 row, so that the electrochromic elements 110 of the dimming pixels 100 in the n+m+1 row are put into a light-shielding state. At this time, the reset signal Vscan2 is not input to the dimming pixels 100 in the n+m+1 row.

[0096] 15 is a diagram showing a flowchart of the operation of the light-adjusting image display device 1. This flowchart can be executed by the control unit 1000 based on a program.

[0097] The control unit 1000 writes the dimming signal voltage Vsig to the dimming pixels 100 in any n rows (S101).

[0098] The control unit 1000 judges whether the reaction of the electrochromic elements 110 of the nth row of dimming pixels 100 is complete (S102). That is, the control unit 1000 judges whether the electrochromic elements 110 of the nth row of dimming pixels 100 have completed switching from a transparent state to a light-shielding state, or from a light-shielding state to a transparent state. In addition, the judgment of whether the switching operation is completed can be performed by experimentally obtaining in advance the response time of the electrochromic elements 110 (the response time for changing from a transparent state to a light-shielding state, or the response time for changing from a light-shielding state to a transparent state) of the electrochromic elements 110, the size of the dimming pixels 100, the characteristics of the electrochromic elements 110, and other ambient temperature dependencies, and storing the data in the storage 1004 of the control unit 1000 for use.

[0099] If the control unit 1000 determines that the reaction of the electrochromic elements 110 of the dimming pixels 100 in the nth row is not complete (S102: NO), it writes the dimming signal voltage Vsig to the dimming pixels 100 in another row (e.g., the row below the nth row) (S104).

[0100] When the control unit 1000 determines that the reaction of the electrochromic elements 110 of the dimming pixels 100 in the nth row is complete (S102: YES), it writes a reset voltage Vrst to the dimming pixels 100 in the nth row (S103).

[0101] Third embodiment A third embodiment will be described. The difference between the second embodiment and the reset circuit 150 is that the reset voltage Vrst is superimposed on the dimming signal voltage Vsig by time division multiplexing, and the output of the drive circuit 120 is made floating at a predetermined timing. In other respects, the present embodiment is similar to the second embodiment, so that the overlapping description will be omitted or simplified.

[0102] FIG. 16A is a diagram showing the dimming pixel circuit 70 of the dimming pixel 100. The dimming pixel circuit 70 of this embodiment is the same as that of the first embodiment. In FIG. 16A, an electrochromic element 110 is also shown. FIG. 16B is a diagram showing a timing chart of the write operation of the dimming signal voltage Vsig to the dimming pixel 100. FIG. 16C is an explanatory diagram for explaining the order of writing the dimming signal voltage Vsig and the reset voltage Vrst to the dimming pixel 100 for each row.

[0103] 16A, the dimming pixel circuit 70 may include a drive circuit 120, a capacitance element 130, and a switching transistor 140. The absence of the reset circuit 150 allows the aperture ratio of the dimming pixel 100 to be increased compared to the second embodiment. The aperture ratio is defined as the area of ​​the electrochromic element 110 divided by the area of ​​the dimming pixel 100.

[0104] 16B shows a timing chart for writing the dimming signal voltage Vsig to each of any of a plurality of dimming pixels 100 arranged in a column direction. n, n+1, ..., n+m indicate row numbers. For simplicity, the following description will be focused on the operation of writing the dimming signal voltage Vsig to the dimming pixels 100 of row numbers n, n+1, ..., n+m in any one column, as in the description of the first embodiment. In FIG. 16B, the subscript q of the dimming signal voltage Vsig indicates the column number of the any one column.

[0105] A scanning signal line for supplying a scanning signal Vscan is provided for each row. Therefore, the dimming signal voltage Vsig is written to the dimming pixels 100 for each row. When the scanning signal is High (+10V), the switching transistor 140 is turned on, and the dimming signal voltage Vsig is held in the capacitance element 130, thereby writing the dimming signal voltage Vsig to the dimming pixels 100. In the example of FIG. 16B, the dimming signal voltage Vsig is written to the dimming pixels 100 in the order of nth row, n+1th row, ..., n+mth row. The scanning signal Vscan for writing the dimming signal voltage Vsig to the dimming pixels 100 in the nth row is indicated as Vscan_n. The scanning signal Vscan for writing the dimming signal voltage Vsig to the dimming pixels 100 in the nth row is indicated as Vscan_n+1. The scanning signal Vscan for writing the dimming signal voltage Vsig to the dimming pixels 100 in the n+mth row is indicated as Vscan_n+m.

[0106] The dimming signal voltage Vsig is time-division multiplexed with the dimming signal voltage Vsig to be written to each dimming pixel 100. In the example of Fig. 16B, a dimming signal voltage Vsig is illustrated in which a dimming signal voltage Vsig (+10V) for putting the dimming pixels 100 in the nth row into a light-shielded state and a dimming signal voltage Vsig (-10V) for putting the dimming pixels 100 in the n+1th row into a transparent state are time-division multiplexed.

[0107] In this embodiment, the reset voltage Vrst is further superimposed on the dimming signal voltage Vsig by time division multiplexing. The reset voltage Vrst superimposed on the dimming signal voltage Vsig is written to the dimming pixel 100 by the switching transistor 140 of the dimming pixel 100 being turned on by the scanning signal Vscan and being held in the capacitance element 130 of the dimming pixel 100.

[0108] At the timing when the switching transistors 140 of each row are sequentially turned on by the scanning signal Vscan, the dimming signal voltage Vsig is sequentially written to the dimming pixels 100 of each row. As a result, the dimming signal voltage Vsig is held in the capacitance element 130, and the node A becomes a voltage corresponding to the dimming signal voltage Vsig.

[0109] After the dimming signal voltage Vsig is written to the dimming pixel 100 of one row (e.g., row n), the dimming signal voltage Vsig is set to the reset voltage Vrst at a timing before the dimming signal voltage Vsig is written to the next row (e.g., row n+1), and the output of the drive circuit 120 of the dimming pixel 100 of the nk row, which is the row k rows before (k rows above) the one row, is made floating. The nk row is a row in which the electrochromic element 110 has switched (reaction has been completed) from the transparent state to the light-shielding state or from the light-shielding state to the transparent state when the dimming signal voltage Vsig is written to the dimming pixel 100 of the n row. The nk row is preferably the row closest to the n row among the rows in which the electrochromic element 110 has switched from the transparent state to the light-shielding state or from the light-shielding state to the transparent state when the dimming signal voltage Vsig is written to the dimming pixel 100 of the n row. The value of k can be determined based on an experiment or the like.

[0110] 16C, for example, after the dimming signal voltage Vsig is written to the dimming pixel 100 in the nth stage (nth row), the reset voltage Vrst is written to the dimming pixel in the nkth stage (nkth row). Then, such writing of the dimming signal voltage Vsig and the reset voltage Vrst is repeated up to the final stage (final row).

[0111] In the example of the timing chart in Fig. 16B, a dimming signal voltage Vsig (+10V) for putting the dimming pixel 100 in the nth row into a light-shielded state is written to the dimming pixel 100, and node B of the dimming pixel 100 in the nth row becomes a driving voltage (+4V) output by the driving circuit 120 in response to the dimming signal voltage Vsig. Note that Fig. 16B also shows the voltage of node C, which is the ground potential Vss. A dimming signal voltage Vsig (-10V) for putting the dimming pixel 100 in the nth column into a transparent state is written to the dimming pixel 100, and node B of the nth row becomes a driving voltage (-4V) output by the driving circuit 120 in response to the dimming signal voltage Vsig. When a dimming signal voltage Vsig (-10V) for putting the dimming pixel 100 in the n+mth column into a transparent state is written to the dimming pixel 100, node B of the dimming pixel 100 in the n+mth column becomes the driving voltage (-4V) output by the driving circuit 120 in response to the dimming signal voltage Vsig.

[0112] Depending on the driving voltage (the voltage of node B), the state of the electrochromic element 110 of each dimming pixel 100 is switched. In FIG. 16B, the current I EC In the dimming pixel 100 to which the reset voltage Vrst is written, the current I EC is no longer flowing.

[0113] 17 is a diagram showing a flowchart of the operation of the light-adjusting image display device 1. This flowchart can be executed by the control unit 1000 based on a program.

[0114] The control unit 1000 writes the dimming signal voltage Vsig to the dimming pixels 100 in any n rows (S201).

[0115] The control unit 1000 writes a reset voltage to the n-th row of dimming pixels 100 (S202). As described above, the n-th row is a row in which the electrochromic element 110 is switched from the transparent state to the light-shielding state or from the light-shielding state to the transparent state when the dimming signal voltage Vsig is written to the n-th row of dimming pixels 100. The value of k can be stored in advance in the storage of the control unit 1000 and used.

[0116] (Fourth embodiment) A fourth embodiment will be described. The difference between the fourth embodiment and the first embodiment is that, in the present embodiment, when a dimming pixel 100 that has been set to a transparent state in one frame of a dimming image is also set to a transparent state in the next frame, the dimming signal voltage Vsig is not written to the dimming pixel 100. In other respects, the present embodiment is similar to the first embodiment, so that repeated explanations will be omitted or simplified.

[0117] FIG. 18A is a diagram showing the dimming pixel circuit 70 of the dimming pixel 100. The dimming pixel circuit 70 of this embodiment is the same as that of the first embodiment. In FIG. 18A, the electrochromic element 110 is also shown. FIG. 18B is a diagram showing a timing chart of the write operation of the dimming signal voltage Vsig to the dimming pixel 100. FIG. 18C is a diagram showing the state of the electrochromic element 110 of each dimming pixel 100 before and after the dimming signal voltage Vsig is written in the timing chart of FIG. 18B. In FIG. 18C, the light-shielding state is shown in black, and the transparent state is shown in white.

[0118] 18A, the dimming pixel circuit 70 may include a drive circuit 120, a capacitance element 130, and a switching transistor 140. As will be described later, a reset voltage Vrst is superimposed on the dimming signal voltage Vsig supplied to the switching transistor 140 by time division multiplexing.

[0119] 18B shows a timing chart for writing the dimming signal voltage Vsig to each of any of a plurality of dimming pixels 100 arranged in a column direction. n, n+1, and n+2 indicate row numbers. For ease of explanation, the following description will focus on the operation of writing the dimming signal voltage Vsig to the dimming pixels 100 of row numbers n, n+1, and n+2 in any one column, as in the first embodiment, unless otherwise specified. In FIG. 18B, the subscript m of the dimming signal voltage Vsig indicates the column number of the any one column.

[0120] A scanning signal line for supplying a scanning signal Vscan is provided for each row. Therefore, the dimming signal voltage Vsig is written to the dimming pixels 100 for each row. When the scanning signal is High (+10V), the switching transistor 140 is turned on (ON), and the dimming signal voltage Vsig is held in the capacitance element 130, thereby writing the dimming signal voltage Vsig to the dimming pixels 100. In the example of FIG. 18B, the dimming signal voltage Vsig is written to the dimming pixels 100 in the order of the nth row, the n+1th row, and the n+2th row. The scanning signal Vscan for writing the dimming signal voltage Vsig to the nth row of dimming pixels 100 is indicated as Vscan_n. The scanning signal Vscan for writing the dimming signal voltage Vsig to the nth row of dimming pixels 100 is indicated as Vscan_n+1. The scanning signal Vscan for writing the dimming signal voltage Vsig to the dimming pixels 100 in the n+2th row is indicated as Vscan_n+2.

[0121] The dimming signal voltage Vsig is time-division multiplexed with the dimming signal voltage Vsig and the reset voltage Vrst to be written to each dimming pixel 100. In the example of Fig. 18B, the dimming signal voltage Vsig is time-division multiplexed with the dimming signal voltage Vsig (+10V) for changing the dimming pixels 100 in the nth row from a transparent state to a light-shielding state, the reset voltage Vrst (e.g., 0V) for maintaining the transparent state of the dimming pixels 100 in the n+1th row, and the dimming signal voltage Vsig (+10V) for changing the dimming pixels 100 in the n+2th row from a light-shielding state to a transparent state.

[0122] In this embodiment, as described above, the reset voltage Vrst is superimposed on the dimming signal voltage Vsig by time division multiplexing. The reset voltage Vrst superimposed on the dimming signal voltage Vsig is held in the capacitance element 130 of the dimming pixel 100 by the switching transistor 140 of the dimming pixel 100 being turned on by the scanning signal Vscan. As a result, the reset voltage Vrst is input to the drive circuit 120, and the output of the drive circuit 120 becomes floating (high impedance).

[0123] At the timing when the switching transistors 140 of each row are sequentially turned on by the scanning signal Vscan, the dimming signal voltage Vsig is sequentially written to the dimming pixels 100 of each row. As a result, the dimming signal voltage Vsig is held in the capacitance element 130, and the node A becomes a voltage corresponding to the dimming signal voltage Vsig.

[0124] The control unit 1000 supplies a reset voltage Vrst as the dimming signal voltage Vsig to the dimming pixel 100 that is in a transparent state in the current dimming image frame and is also to be in a transparent state in the next frame. This prevents the dimming signal voltage Vsig from being rewritten to the dimming pixel 100 in the next frame, thereby reducing unnecessary power consumption due to rewriting. Specifically, by supplying a drive voltage (e.g., −4V) for turning the electrochromic element 110 into a transparent state through rewriting, the leakage current flowing through the electrochromic element 110 is cut off, thereby reducing unnecessary power consumption.

[0125] As shown in FIG. 18C , for example, a dimming pixel 100 in which the electrochromic element 110 has been set to a transparent state in the previous frame (Frame_a) may also be set to a transparent state in the next frame (Frame_(a+1)). In other words, there may be a dimming pixel 100 including an electrochromic element 110 that is in a transparent state in the current frame and is also set to a transparent state in the next frame. As described above, in this case, the control unit 1000 supplies the dimming pixel 100 with a reset voltage Vrst as the dimming signal voltage Vsig, thereby setting the output of the drive circuit 120 of the dimming pixel 100 to a high impedance. The electrochromic element 110 has a memory property of a transparent state. Therefore, the electrochromic element 110 in a transparent state maintains the transparent state even if a drive voltage for setting the electrochromic element 110 to a transparent state is not supplied.

[0126] 19 is a diagram showing a flowchart of the operation of the light-adjusting image display device 1. This flowchart can be executed by the control unit 1000 based on a program.

[0127] The control unit 1000 determines for each dimming pixel 100 whether the dimming pixel 100 includes an electrochromic element 110 in a transparent state in the current frame (S301).

[0128] When the control unit 1000 determines that the dimming pixel 100 being judged is not a dimming pixel 100 that includes an electrochromic element 110 that is in a transparent state in the current frame (S301: NO), the control unit 1000 executes the process of step S301.

[0129] When the control unit 1000 determines that the dimming pixel 100 being judged is a dimming pixel 100 that includes an electrochromic element 110 that is in a transparent state in the current frame (S301: YES), it determines whether the dimming pixel 100 is a dimming pixel 100 that includes an electrochromic element 110 that will be made transparent in the next frame (S302).

[0130] When the control unit 1000 determines that the dimming pixel 100 being judged is not a dimming pixel 100 that includes an electrochromic element 110 that will be set to a transparent state in the next frame (S302: NO), the control unit 1000 executes the process of step S301.

[0131] When the control unit 1000 determines that the dimming pixel 100 being judged is a dimming pixel 100 that includes an electrochromic element 110 that will be set to a transparent state in the next frame (S302: YES), it writes a reset voltage to the dimming pixel 100 (S303).

[0132] The embodiment provides the following advantages.

[0133] The drive circuit, which is connected to one electrode of the electrochromic element and outputs a drive voltage to that electrode in response to an input signal voltage, is a CMOS circuit using transistors with enhancement characteristics, which improves the degradation of image quality caused by instability in the operation of the electrochromic element when the drive circuit switches the drive voltage to the electrochromic element.

[0134] In addition, the electrochromic material of the electrochromic element contains one or more metal elements selected from the group consisting of silver, bismuth, chromium, iron, cadmium, cobalt, nickel, tin, lead, and copper. This effectively improves the instability of the operation of the electrochromic element when the drive voltage to the electrochromic element by the drive circuit is switched, even if an electrochromic element in which instability of the electrochromic element 110 increases due to a shoot-through current of the drive circuit is used.

[0135] In addition, a reset circuit is provided that outputs the supplied reset voltage to the input of the drive circuit when a reset signal is input, and the output of the drive circuit is made floating when the reset signal is input. This makes it possible to cut off leakage current in dimming pixels of other stages when writing a signal voltage to a dimming pixel, thereby suppressing voltage drops in power supplies, etc. due to leakage current.

[0136] Also, a plurality of dimming pixels are arranged two-dimensionally to form a plurality of rows and a plurality of columns, and the inputs of the switching transistors of the same row are connected to each other. A scanning signal that turns on the switching transistor of a dimming pixel constituting one row is input to the input of the switching transistor of the dimming pixel constituting the one row, and a signal voltage supplied to the switching transistor is output to the drive circuit. Then, a scanning signal is input to the input of the switching transistor of the dimming pixel constituting the one row before the scanning signal is input to the input of the switching transistor of the dimming pixel constituting the one row, and a reset voltage is supplied to the switching transistor of the dimming pixel constituting another row in which the electrochromic element is switched to either the transparent state or the light-shielding state, and a scanning signal is input to output the reset voltage to the drive circuit. As a result, when a signal voltage is written to the dimming pixel, the leak current in the dimming pixel of another stage can be blocked, so that the voltage drop of the power supply, etc. due to the leak current can be suppressed and the decrease in the aperture ratio can be prevented.

[0137] In addition, when the next dimming image frame is displayed, a reset voltage is output to the input of the drive circuit of the dimming pixel including the electrochromic element that is in a transparent state in the current dimming image frame and is also in a transparent state in the next dimming image frame, thereby making it possible to suppress unnecessary power consumption during rewriting.

[0138] The above-described embodiments are merely examples, and those skilled in the art will understand that various modifications and equivalent embodiments are possible. Therefore, the disclosed embodiments should be considered from an explanatory perspective, not a limiting one. The scope of the invention is set forth in the claims, and all configurations within the scope of the claims should be interpreted as being included in the scope of the invention. [Explanation of symbols]

[0139] 1. Dimmable image display device 2 Image display device, 5 display device, 7 dimming images, 9 images, 99 object regions, 199 Corresponding Areas, 100 dimming pixels, 1000 control unit, 2000 row drivers, 3000 line driver, 4000 Dimmable image display unit, 7000 image display unit, 7001 pixels, 110 Electrochromic elements, 100 dimming pixels, 70 Dimming pixel circuit, 120 Drive circuit, 130 Capacitive element, 140 switching transistor, 150 Reset circuit.

Claims

1. an image display device having a plurality of pixels for displaying an image; A light control device having a light control image display section having a plurality of light control pixels and switching a transmittance of each light control pixel of the light control image display section; a control unit that switches the transmittance of the light control pixels in a corresponding area of ​​the light control image display unit, the corresponding area being an object area in the image, to a low transmittance; The light-adjusting pixel includes an electrochromic element and a pixel circuit, The pixel circuit includes: a drive circuit connected to one electrode of the electrochromic element and configured to output a drive voltage to the electrode in response to an input signal voltage; a switching transistor that outputs the supplied signal voltage to an input of the drive circuit in response to an input scanning signal; a capacitance element connected to the input of the drive circuit and holding the signal voltage output to the drive circuit; The display device, wherein the driving circuit is a CMOS circuit using transistors having enhancement characteristics.

2. The control unit is The display device according to claim 1 , wherein the object area is detected based on the image, and the transmittance of the light adjustment pixels in the corresponding area that corresponds to the detected object area is set to a low transmittance.

3. The control unit is 2. The display device of claim 1, further comprising: a determination as to whether the object region is to have a low transmittance; if it is determined that the object region is to have a low transmittance, the transmittance of the dimming pixels of the corresponding region is set to a low transmittance; and if it is determined that the object region is not to have a low transmittance, the transmittance of all the dimming pixels is set to a high transmittance.

4. The electrochromic element comprises: Two electrodes facing each other; an electrolyte layer sandwiched between the two electrodes and including an electrochromic material including one or more metal elements selected from the group consisting of silver, bismuth, chromium, iron, cadmium, cobalt, nickel, tin, lead, and copper; The display device according to claim 1 ,

5. a reset circuit that outputs a supplied reset voltage to the input of the drive circuit when a reset signal is input; The reset voltage is a voltage that causes the output of the drive circuit to float when it is output to the input of the drive circuit. The display device according to claim 1 .

6. a plurality of pixels each having the pixel circuit according to claim 5, the plurality of pixels being two-dimensionally arranged to form a plurality of rows and a plurality of columns; The inputs of the switching transistors in the same row are connected together; The inputs of the reset circuits in the same row are connected together; A display device comprising a control unit that inputs the reset signal to the input of the reset circuit of the pixels constituting a row by inputting the scanning signal that turns on the switching transistor to the input of the switching transistor of the pixels constituting a row, and outputting the signal voltage supplied to the switching transistor to the input of the drive circuit, so that the electrochromic element of the pixels constituting the row is switched to either a transparent state or a light-blocking state.

7. a plurality of pixels each having the pixel circuit according to claim 1, the plurality of pixels being two-dimensionally arranged to form a plurality of rows and a plurality of columns; The inputs of the switching transistors in the same row are connected together; a control unit which, after inputting the scanning signal for making the switching transistor conductive to the input of the switching transistor of the pixel constituting one row and outputting the signal voltage supplied to the switching transistor to the drive circuit, supplies a reset voltage to the switching transistor of the pixel constituting another row in which the electrochromic element has been switched to either a transparent state or a light-shielding state before inputting the scanning signal to the input of the switching transistor of the pixel constituting the one row, and inputs the scanning signal to output the reset voltage to the drive circuit; The display device, wherein the reset voltage is a voltage that causes an output of the CMOS circuit to float when it is output to the input of the drive circuit.

8. a pixel circuit including: a pixel circuit including: The control unit outputs the reset voltage to the input of the driving circuit of the pixel including the electrochromic element that is transparent in the current image frame and will also be transparent in the next image frame when displaying the next image frame.

9. A control method by the control unit of the display device according to claim 1, A control method comprising the step (a) of detecting the object area based on the image, and switching the transmittance of the dimming pixels of the corresponding area corresponding to the detected object area to a low transmittance.

10. A control method by the control unit of the display device according to claim 1, (b) determining whether to make the object region low-transmittance; and (c) switching the transmittance of the dimming pixels of the corresponding area to a low transmittance when it is determined in step (b) that the object area should have a low transmittance, and switching the transmittance of all of the dimming pixels to a high transmittance when it is determined that the object area should not have a low transmittance.

11. An electrochromic element; a drive circuit connected to one electrode of the electrochromic element and configured to output a drive voltage to the electrode in response to an input signal voltage; a switching transistor that outputs the supplied signal voltage to an input of the drive circuit in response to an input scanning signal; a capacitance element connected to the input of the drive circuit and holding the signal voltage output to the drive circuit; a reset circuit that outputs a reset voltage to be supplied to the input of the drive circuit when a reset signal is input; A method for controlling a display device, the method comprising the steps of: a plurality of the pixels are two-dimensionally arranged to form a plurality of rows and a plurality of columns; inputs of the switching transistors in the same row are connected to each other; and inputs of the reset circuits in the same row are connected to each other; a step of inputting the scanning signal for making the switching transistor conductive to the input of the switching transistor of the pixel constituting one row, and outputting the signal voltage supplied to the switching transistor to the input of the drive circuit, so that the electrochromic element of the pixel constituting one row is switched to either a transparent state or a light-shielding state, and then inputting the reset signal to the input of the reset circuit of the pixel constituting one row; The method for controlling a display device, wherein the reset voltage is a voltage that causes an output of the drive circuit to float when the reset voltage is output to the input of the drive circuit.

12. An electrochromic element; a drive circuit connected to one electrode of the electrochromic element and configured to output a drive voltage to the electrode in response to an input signal voltage; a switching transistor that outputs the supplied signal voltage to an input of the drive circuit in response to an input scanning signal; a capacitance element connected to the input of the drive circuit and holding the signal voltage output to the drive circuit; A method for controlling a display device, the method comprising the steps of: a plurality of the pixels are two-dimensionally arranged to form a plurality of rows and a plurality of columns; and inputs of the switching transistors in the same row are connected to each other; a step of inputting the scanning signal for making the switching transistor conductive to the input of the switching transistor of the pixel constituting one row, and outputting the signal voltage supplied to the switching transistor to the drive circuit, and then supplying a reset voltage to the switching transistor of the pixel constituting another row in which the electrochromic element has been switched to either a transparent state or a light-shielding state and inputting the scanning signal, thereby outputting the reset voltage to the drive circuit, The method for controlling a display device, wherein the reset voltage is a voltage that causes an output of the drive circuit to float when the reset voltage is output to the input of the drive circuit.

13. 13. A method for controlling a display device according to claim 11, further comprising a step of outputting the reset voltage to an input of the drive circuit of the pixel including the electrochromic element that is transparent in a current image frame and is also transparent in a next image frame when the next image frame is displayed.

14. A control program for the display device according to claim 1, A control program for causing a computer to execute step (a) of detecting the object area based on the image, and switching the transmittance of the dimming pixels of the corresponding area corresponding to the detected object area to a low transmittance.

15. A control program for the display device according to claim 1, (b) determining whether to make the object region low-transmittance; and (c) switching the transmittance of the dimming pixels of the corresponding area to a low transmittance if it is determined in step (b) that the object area should have a low transmittance, and switching the transmittance of all of the dimming pixels to a high transmittance if it is determined that the object area should not have a low transmittance.

16. An electrochromic element; a drive circuit connected to one electrode of the electrochromic element and configured to output a drive voltage to the electrode in response to an input signal voltage; a switching transistor that outputs the supplied signal voltage to an input of the drive circuit in response to an input scanning signal; a capacitance element connected to the input of the drive circuit and holding the signal voltage output to the drive circuit; a reset circuit that outputs a reset voltage to be supplied to the input of the drive circuit when a reset signal is input; a control program for a display device, the control program comprising: a plurality of the pixels are two-dimensionally arranged to form a plurality of rows and a plurality of columns; inputs of the switching transistors in the same row are connected to each other; and inputs of the reset circuits in the same row are connected to each other; a step of inputting the scanning signal for making the switching transistor conductive to the input of the switching transistor of the pixel constituting one row, and outputting the signal voltage supplied to the switching transistor to the input of the drive circuit, so that the electrochromic element of the pixel constituting one row is switched to either a transparent state or a light-shielding state, and then inputting the reset signal to the input of the reset circuit of the pixel constituting one row; A control program for a display device for causing a computer to execute processing, wherein the reset voltage is a voltage that causes the output of the drive circuit to float when output to the input of the drive circuit.

17. An electrochromic element; a drive circuit connected to one electrode of the electrochromic element and configured to output a drive voltage to the electrode in response to an input signal voltage; a switching transistor that outputs the supplied signal voltage to an input of the drive circuit in response to an input scanning signal; a capacitance element connected to the input of the drive circuit and holding the signal voltage output to the drive circuit; A control program for a display device, the pixels being two-dimensionally arranged to form a plurality of rows and a plurality of columns, and inputs of the switching transistors in the same row being connected to each other, a step of inputting the scanning signal for making the switching transistor conductive to the input of the switching transistor of the pixel constituting one row, and outputting the signal voltage supplied to the switching transistor to the drive circuit, and then supplying a reset voltage to the switching transistor of the pixel constituting another row in which the electrochromic element has been switched to either a transparent state or a light-shielding state and inputting the scanning signal, thereby outputting the reset voltage to the drive circuit, A control program for a display device for causing a computer to execute processing, wherein the reset voltage is a voltage that causes the output of the drive circuit to float when output to the input of the drive circuit.

18. 18. A control program for a display device as described in claim 16 or 17, wherein the processing includes a step of outputting the reset voltage to an input of the drive circuit of the pixel including the electrochromic element that is transparent in the current image frame and will also be transparent in the next image frame when the next image frame is displayed.

Images