Display device and driving method of display device

Abstract

To provide a display device including a plurality of display regions and having reduced power consumption.SOLUTION: A display device comprises: a substrate having a display region DR including three or more divided regions DR1 to DR3 arranged in a first direction on a main surface; scanning lines GL extending in the first direction, data lines SL extending in a second direction, a plurality of pixels PX, and scanning line connection wiring lines BL extending in the second direction, which are arranged in each of the divided regions; data line drive circuits respectively connected to the data lines in each of the divided regions; and a plurality of scanning line drive circuits 60 corresponding to each of the divided regions. The scanning line drive circuits and the data line drive circuits 70 are respectively arrayed in the first direction outside the display region, each of the scanning line connection wiring lines electrically connects the scanning line drive circuit to the scanning line, and the scanning line drive circuits and the data line drive circuits display an image at a frame frequency different from each other in at least a pair of divided regions adjacent to each other among the three or more divided regions.SELECTED DRAWING: Figure 4A

Description

[Technical field]

[0001] The present disclosure relates to a display device and a method for driving the display device. [Background technology]

[0002] Display devices such as liquid crystal display devices and organic electroluminescence (EL) display devices are widely used in various fields. For example, in the field of vehicles, information such as speed and rotation speed is displayed on display devices instead of the mechanical speedometers and tachometers that have been used conventionally.

[0003] For example, Patent Document 1 discloses a vehicle equipped with a display device located in front of the driver's seat for displaying speed, rotation speed, etc., and a display device located on the passenger seat side for displaying map information, movies, etc. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2022-072294 A Summary of the Invention [Problem to be solved by the invention]

[0005] As the number of display devices mounted on a vehicle increases, the increase in power consumption by the display devices becomes a problem. The present disclosure has an object to provide a display device having multiple display areas and reduced power consumption, and a method for driving the display device. [Means for solving the problem]

[0006] A display device and a method for driving the display device according to an embodiment of the present disclosure include a substrate having a main surface having a display area and a non-display area located around the display area, the display area including three or more divided areas arranged adjacent to each other along a first direction, a plurality of scanning lines arranged in each divided area, the plurality of scanning lines extending in the first direction and arranged in a second direction intersecting the first direction, a plurality of data lines arranged in each divided area, the plurality of data lines extending in the second direction and arranged in the first direction, a plurality of pixels arranged in each divided area, the plurality of pixels being arranged in an area surrounded by a pair of data lines among the plurality of data lines and a pair of scanning lines among the plurality of scanning lines, and a plurality of scanning line junctions arranged in each divided area, extending in the second direction and arranged in the first direction. the control device outputs a start signal independently to the start signal wiring connected to the scanning line driving circuit of each divided region, so that the scanning line driving circuit and the data line driving circuit display images at frame frequencies different from each other in at least a pair of adjacent divided regions among the three or more divided regions. Effect of the Invention

[0007] According to an embodiment of the present disclosure, a display device having a plurality of display areas and reduced power consumption, and a method for driving the display device are provided. [Brief description of the drawings]

[0008] [Figure 1]FIG. 1 is a schematic diagram showing a dashboard of a vehicle on which a display device according to a first embodiment is mounted. [Figure 2A] FIG. 2A is a schematic cross-sectional view showing the configuration of a display device. [Figure 2B] FIG. 2B is a schematic cross-sectional view showing another configuration of the display device. [Diagram 3] FIG. 3 is a plan view of the substrate. [Figure 4A] FIG. 4A shows a schematic plan view of an active matrix substrate. [Figure 4B] FIG. 4B is a schematic plan view showing another example of the configuration of the active matrix substrate. [Diagram 5] FIG. 5 is a circuit diagram showing an example of the configuration of a pixel. [Figure 6] FIG. 6 shows the arrangement of the scanning lines, the scanning line connecting wiring, and the connection points CP in each divided region. [Figure 7] Figures 7 (a) to (c) and (d) to (f) are schematic diagrams showing the luminance of pixels near the boundary between the first and second division regions, the applied scanning signal, and an equivalent circuit diagram of parasitic capacitance and parasitic resistance, respectively. [Figure 8] Figures 8 (a) to (c) and (d) to (f) are schematic diagrams showing the luminance of pixels near the boundary between the second and third division regions, the applied scanning signal, and an equivalent circuit diagram of parasitic capacitance and parasitic resistance, respectively. [Figure 9] FIG. 9 shows another example of the arrangement of the scanning lines, the scanning line connecting wiring, and the connection points CP. [Figure 10] Figures 10 (a) to (c) and (d) to (f) are schematic diagrams showing the luminance of pixels near the boundary between the first and second division regions in the arrangement example shown in Figure 9, the applied scanning signal, and an equivalent circuit diagram of parasitic capacitance and parasitic resistance, respectively. [Figure 11] FIG. 11 shows another example of the arrangement of the scanning lines, the scanning line connecting wiring, and the connection points CP. [Figure 12]Figures 12(a) to (c) and (d) to (f) are schematic diagrams showing the luminance of pixels near the boundary between the first and second division regions in the arrangement example shown in Figure 11, the applied scanning signal, and an equivalent circuit diagram of parasitic capacitance and parasitic resistance, respectively. [Figure 13A] FIG. 13A is an enlarged plan view showing a part of the active matrix substrate. [Figure 13B] FIG. 13B is an enlarged plan view showing a part of another example of the configuration of the active matrix substrate. [Figure 14] FIG. 14 is a diagram for explaining overlapping of scanning lines between adjacent divided regions. [Figure 15] FIG. 15 shows an example of a cross-sectional structure of a liquid crystal display device taken along line AA in FIG. [Figure 16] FIG. 16 is a schematic enlarged plan view of an active matrix substrate further including dummy scanning line connecting wiring. [Figure 17] FIG. 17 is a plan view showing another example of the arrangement of the scanning line driving circuit. [Figure 18] FIG. 18 is a plan view showing another example of the arrangement of the scanning line driving circuit. [Figure 19] FIG. 19 shows the timing of scanning the scanning lines when independent images are displayed in three divided areas according to the second embodiment. [Figure 20] FIG. 20 shows the scanning timing of the second division region and the timing of the clock signal and the data signal. [Figure 21] FIG. 21 shows the timing of scanning the scanning lines when an independent image is displayed in each divided area according to the third embodiment. [Figure 22] FIG. 22 shows the timing of scanning the scanning lines in three divided regions according to the third embodiment. [Diagram 23] FIG. 23 shows the timing of scanning the scanning lines in another example of the driving method. [Figure 24] FIG. 24 shows the timing of scanning the scanning lines in another example of the driving method. [Diagram 25]FIG. 25 is a block diagram showing all the control signals for driving the pixels. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] In the case where a vehicle is equipped with multiple display devices, if the display devices can be arranged in one place so that the display areas are connected, it is believed that it will be possible to provide an excellent design, such as displaying an integrated image in multiple display areas as necessary. For example, if the display device for displaying speed, rotation speed, etc. in Patent Document 1 and the display device that extends from the driver's seat to the passenger seat and displays map information, movies, etc. are integrated, it is believed that it will be possible to provide an excellent interior design and obtain an excellent display effect.

[0010] On the other hand, when the number of display areas of a display device increases and the area of ​​the entire display area increases, the power consumption may also increase. In vehicles that use a motor as a driving source, such as hybrid cars and electric cars, it is preferable that the power consumption of the display device is small so that the driving range can be as long as possible. In view of such problems, the present disclosure has conceived a new display device and a driving method for the display device that can suppress power consumption.

[0011] (First embodiment) Hereinafter, the present embodiment will be described based on the drawings. The present disclosure is not limited to the following embodiments, and appropriate design changes can be made within the scope of the configuration of the present disclosure. In the following description, the same parts or parts having similar functions are commonly used with the same reference numerals in different drawings, and repeated description thereof may be omitted. In addition, each configuration described in the embodiment and the modified example may be appropriately combined or modified within the scope of the gist of the present disclosure. In order to make the description easier to understand, in the drawings referred to below, the configuration may be shown in a simplified or schematic manner, or some of the components may be omitted. In addition, the dimensional ratio between the components shown in each figure does not necessarily indicate the actual dimensional ratio.

[0012] 1 is a schematic diagram showing a dashboard 200 of a vehicle equipped with a display device 101 of this embodiment. The dashboard 200 is located at the front of the vehicle interior. The display device 101 is disposed on the upper part of the dashboard, from the driver's seat 201 to the passenger seat 202. In other words, the display device 101 is located in front of the driver's seat 201 and the passenger seat 202, and is an integrated single device.

[0013] The display device 101 may be various flat displays. For example, the display device 101 may be a liquid crystal display device, an organic EL display device, an LED display device, electronic paper, or the like. In this embodiment, the display device 101 is a liquid crystal display device.

[0014] 2A is a schematic cross-sectional view showing a configuration in which display device 101 is a liquid crystal display device. Display device 101 includes a liquid crystal panel 50 and a control device 90. Furthermore, liquid crystal panel 50 includes an active matrix substrate 40, a counter substrate 80, and a liquid crystal layer 81.

[0015] The active matrix substrate 40 includes a substrate 10 having a principal surface 10a. As described in detail below, the principal surface 10a has a display region DR and a non-display region NR located around the display region DR so as to surround the display region DR. The display region DR is an area that contributes to image display, and the non-display region is an area that does not display images.

[0016] As will be described in more detail below, the active matrix substrate 40 includes a plurality of scan lines, a plurality of data lines, and a plurality of pixels, each pixel being connected to one of the plurality of scan lines and one of the plurality of data lines.

[0017] The active matrix substrate 40 and the counter substrate 80 are attached to each other with a predetermined gap therebetween by a seal 82 arranged in the non-display region NR, and a liquid crystal layer 81 is arranged between the active matrix substrate 40 and the counter substrate 80 in a region surrounded by the seal 82. In this embodiment, a color filter is provided on the surface of the counter substrate 30 facing the liquid crystal layer 81. However, the color filter may be provided on the active matrix substrate 40.

[0018] The liquid crystal panel 50 further includes a plurality of scanning line driving circuits 60 and a plurality of data line driving circuits 70. The scanning line driving circuit 60 and the data line driving circuit 70 are arranged in an area other than the display area DR of the substrate 10, and drive the scanning lines and the data lines, respectively. In this embodiment, the scanning line driving circuit 60 is arranged in the non-display area NR. Meanwhile, the data line driving circuit 70 is arranged on the flexible substrate 51. As shown in FIG. 2B, the plurality of data line driving circuits 70 may be mounted in the non-display area NR of the substrate 10.

[0019] The control device 90 includes a substrate 91 and a timing controller 92 mounted on the substrate 91. The control device 90 is connected to the active matrix substrate 40 via a flexible substrate 51. The timing controller 92 receives a video signal from an external host computer and generates a start signal and an image signal. The generated start signal and image signal are output to the scanning line driving circuit 60 and the data line driving circuit 70.

[0020] The display device 101 further includes a pair of polarizing plates 96 and a backlight 95. The pair of polarizing plates 96 are positioned to sandwich the active matrix substrate 40 and the counter substrate 80. The backlight 95 is disposed to face one of the pair of polarizing plates 96.

[0021] 3 is a plan view of the substrate 10. The substrate 10 has a longer direction in the x-axis direction (first direction) which is horizontal rather than in the y-axis direction (second direction) which is vertical. The shape of the substrate 10 is not particularly limited as long as the first direction is the longer direction, and may be, for example, a rectangle, an oval, or an ellipse. In this embodiment, the substrate 10 has a rectangular shape with the x-axis direction as the longer direction, and the two upper corners aligned in the x-axis direction are rounded.

[0022] As described above, the main surface 10a has a display area DR and a non-display area NR. In this embodiment, the display area DR has a shape that is roughly similar to the outer shape of the substrate 10, that is, a rectangular shape whose longitudinal direction is the x-axis direction, with the upper two corners aligned in the x-axis direction rounded. The non-display area NR is located around the display area DR. In this embodiment, the non-display area NR surrounds the display area.

[0023] The display region DR includes three or more divided regions arranged adjacent to each other along the x-axis direction. In this embodiment, the display region DR includes a first divided region DR1, a second divided region DR2, and a third divided region DR3. The second divided region DR2 is located between the first divided region DR1 and the third divided region DR3, and the third divided region DR3 is located on the positive side in the x-axis direction relative to the first divided region DR1. The first divided region DR1 and the second divided region DR2 are separated by a boundary line BD12, and the second divided region DR2 and the third divided region DR3 are separated by a boundary line BD23. The boundary line BD12 and the boundary line BD23 are parallel to the y-axis direction.

[0024] The first divided region DR1 and the third divided region DR3 have a rectangular shape with one corner rounded, whereas the second divided region DR2 has a rectangular shape. Therefore, in this embodiment, the shapes of two adjacent divided regions in the display region DR are different from each other.

[0025] As shown in FIG. 3, in each divided region, the maximum width in the x-axis direction is greater than the maximum height in the y-axis direction. In the first divided region DR1, the maximum width w1 is greater than the maximum height h1. Similarly, in the second divided region DR2, the maximum width w2 is greater than the maximum height h2, and in the third divided region DR3, the maximum width w3 is greater than the maximum height h3. That is, the relationships w1>h1, w2>h2, and w3>h3 are satisfied, respectively. In this embodiment, h1=h2=h3, and the relationship w3>w1>w2 is satisfied.

[0026] Fig. 4A shows a schematic plan view of an active matrix substrate 40. In Fig. 4A, for ease of understanding, the first division region DR1 and the second division region DR2 are shown as rectangles. For ease of explanation, the first division region DR1, the second division region DR2, and the third division region DR3 are shown as having the same shape.

[0027] The active matrix substrate 40 includes a plurality of scanning lines GL, a plurality of data lines SL, a plurality of scanning line connecting wires BL, and a plurality of pixels PX in each of the first division region DR1, the second division region DR2, and the third division region DR3.

[0028] In each divided region, the multiple scanning lines GL extend in the x-axis direction and are arranged in the y-axis direction. The multiple data lines SL extend in the y-axis direction and are arranged in the x-axis direction. The multiple scanning line connection wirings BL extend in the y-axis direction and are arranged in the x-axis direction. The scanning lines GL in each divided region are not connected to the scanning lines GL in the adjacent divided regions.

[0029] 5 is a circuit diagram showing a configuration example of a pixel PX. Each pixel PX is disposed in an area surrounded by a pair of data lines SL among a plurality of data lines SL and a pair of scanning lines GL among the plurality of scanning lines GL. The pixel PX includes a TFT and a pixel electrode PE. Specifically, the gate electrode of the TFT is connected to the scanning line GL, the source electrode is connected to the data line SL, and the drain electrode is connected to the pixel electrode.

[0030] 4A, the scanning line driving circuits 60 are arranged corresponding to the first division region DR1, the second division region DR2, and the third division region DR3, respectively. Also, the data line driving circuits 70 are arranged corresponding to the first division region DR1, the second division region DR2, and the third division region DR3, respectively.

[0031] The plurality of scanning line driving circuits 60 and the plurality of data line driving circuits 70 are arranged in the x-axis direction outside the display region DR. In this embodiment, the scanning line driving circuit 60 and the data line driving circuit 70 are arranged in the x-axis direction, sandwiching the first division region DR1, the second division region DR2, and the third division region DR3. The scanning line driving circuit 60 is arranged in the non-display region NR located on the positive side in the y-axis direction from each division region. On the other hand, the data line driving circuit 70 is arranged on the flexible substrate 51 connected to the non-display region NR located on the negative side in the y-axis direction from each division region. However, as shown in FIG. 4B, the plurality of data line driving circuits 70 may be arranged in the non-display region NR.

[0032] In this embodiment, the scanning line driving circuit 60 is integrally (monolithically) formed on the substrate 10. For example, the scanning line driving circuit 60 includes a plurality of TFTs, and these TFTs are formed simultaneously with the TFTs of the pixels PX. The scanning line driving circuit 60 may be configured as a bare chip or a packaged chip, and may be mounted in the non-display area NR of the substrate 10. The scanning line driving circuit 60 may be configured as a bare chip or a packaged chip, and may be mounted on a flexible substrate, and the flexible substrate may be mounted on the non-display area NR of the substrate 10.

[0033] The data line driving circuit 70 is configured as a bare chip or a packaged chip, and is mounted on the flexible substrate 51. The data line driving circuit 70 is configured as a bare chip or a packaged chip, and may be mounted in the non-display area NR of the substrate 10.

[0034] 4A, in each divided region, each of the scanning line driving circuits 60 is shown as having two elements, but the number of scanning line driving circuits in each divided region may be one, or may be divided into three or more. The same is true for the data line driving circuit 70, and in each divided region, each of the data line driving circuits 70 is shown as having four elements, but the number of scanning line driving circuits in each divided region may be one to three, or five or more.

[0035] In each divided region, one end of each of the data lines SL is extended to the non-display region NR and connected to the data line driving circuit 70 via wiring formed on the flexible substrate 51. One end of each of the scanning line connecting wirings BL is extended to the non-display region NR and connected to the scanning line driving circuit 60 of each divided region. Each of the scanning line connecting wirings BL is connected to a connection point CP arranged at a position where it intersects with one of the scanning lines GL. In this embodiment, for redundancy, a pair of adjacent scanning line connecting wirings BL are connected to the same scanning line GL. The same scanning signal is applied to a pair of adjacent scanning line connecting wirings BL. By adopting such a configuration, even if one of the scanning line connecting wirings BL is disconnected or the connection at the connection point CP between the scanning line connecting wiring BL and the scanning line GL is defective during the manufacture of the display device 101, the other scanning line connecting wiring BL can ensure the connection between the scanning line driving circuit and the scanning line GL.

[0036] Since the scanning line connection wiring BL is arranged in the pixel as described later, the aperture ratio of the pixel is reduced. Therefore, in order to prevent a large change in the aperture ratio of the pixels arranged in the y-axis direction, it is preferable that the scanning line connection wiring BL is extended in the y-axis direction from the scanning line driving circuit 60 side beyond the connection point CP to the opposite side of the scanning line driving circuit 60. For example, in each divided region, it is preferable that 70% or more of the multiple scanning line connection wirings have a length of 70% or more of the width of the display region in the y-axis direction.

[0037] In addition, it is preferable that the number of the scanning lines GL arranged in one of a pair of adjacent divided regions is equal to the number of the scanning lines arranged in the other of the pair of divided regions. This makes the number of pixels in the y-axis direction equal in the pair of adjacent divided regions. If the heights of the divided regions in the y-axis direction are equal, when a single integrated image is displayed in the first divided region DR1, the second divided region DR2, and the third divided region DR3, i.e., the entire display region DR, the image can be displayed with a uniform pixel density in the entire display region.

[0038] The timing controller 92 is electrically connected to the scanning line driving circuit 60 by a flexible substrate 51 connected to the substrate 91 and a plurality of wirings arranged in the non-display region NR of the substrate 10. The plurality of wirings includes, for example, a plurality of start signal wirings 21-23, 21A-23A, clock signal wirings 24, 24A, and constant voltage wirings 25, 25A. Although the clock signal wirings 24, 24A are shown as single lines, the clock signal wirings 24, 24A may include, for example, a plurality of clock signal wirings having different phases.

[0039] The constant voltage wiring 25, 25A may include, for example, a power supply wiring for applying a drive voltage and a common wiring for applying a scanning line voltage. The scanning line voltage may include a high-level voltage Vgh for turning the TFT ON and a low-level voltage Vgl for turning the TFT OFF.

[0040] In order for the timing controller 92 to output a start signal to the scanning line driving circuit 60 of each divided region independently, the scanning line driving circuits 60 of the first divided region DR1, the second divided region DR2, and the third divided region DR3 and the timing controller 92 are connected by start signal wirings 21, 22, and 23, respectively. In this embodiment, since two scanning line driving circuits 60 are arranged in each divided region, the two scanning line driving circuits 60 of the first divided region DR1, the second divided region DR2, and the third divided region DR3 are connected to each other by cascade start signal wirings 21A, 22A, and 23A. The start signal specifies the timing to start scanning the scanning lines in each divided region.

[0041] On the other hand, the clock signal that specifies the timing (speed) of scanning the scanning lines GL of each divided region, and the power supply voltage and scanning line voltage that are supplied to the scanning line driving circuit 60 may be common values ​​or the same signals for the scanning line driving circuits 60 of each divided region. For this reason, the clock signal wiring 24 and the constant voltage wiring 25 are connected to, for example, the timing controller 92 and one scanning line driving circuit 60 of at least one of the divided regions, and the scanning line driving circuit 60 to which the clock signal wiring 24 and the constant voltage wiring 25 are connected is connected to other scanning line driving circuits 60 in the same divided region and scanning line driving circuits 60 in other divided regions by the clock signal wiring 24A and the constant voltage wiring 25A. In other words, the scanning line driving circuits 60 of a pair of adjacent divided regions are connected by the clock signal wiring 24A and the constant voltage wiring 25A. By connecting the scanning line driving circuits 60 of different divided regions by the clock signal wiring 24A and the constant voltage wiring 25A, the number of wirings between the control device 90 including the timing controller 92 and the active matrix substrate 40 can be reduced.

[0042] Similarly, the timing controller 92 is electrically connected to the data line driving circuit 70 by a plurality of wirings formed on the flexible substrate 51. The wirings include image signal wirings for transmitting image signals. Furthermore, in order to suppress deterioration of the liquid crystal, the display device 101 may perform polarity inversion driving. In this case, the plurality of wirings may include a control signal wiring 26 for transmitting an output polarity control signal for alternately inverting the polarity of the data signal output from the data line driving circuit 70.

[0043] FIG. 25 is a block diagram showing all the control signals for driving the pixels. The timing controller 92 of the control device 90 receives a first video signal, a second video signal, and a third video signal from a host computer of the vehicle in order to display a first image, a second image, and a third image, which are independent of each other, in the first division region DR1, the second division region DR2, and the third division region DR3, respectively. As described later, at least one of the first to third video signals has a frame frequency different from the other two. Each video signal includes a video data signal (VData) and a video synchronization signal (VSync). Although the timing controller 92 is shown as one element in FIG. 25, the timing controller 92 may be divided into three corresponding to each division region.

[0044] The timing controller 92 generates an image signal and a start signal from each video data signal and video synchronization signal, and outputs them to the data line driving circuit 70 and the scanning line driving circuit 60. The control device 90 also supplies a scanning line voltage to the scanning line driving circuit. The scanning line voltage includes an off voltage VgL that turns the TFT OFF and an on voltage VgH that turns the TFT ON. For example, the off voltage VgL is −6V, and the on voltage VgH is +20V.

[0045] The data line driving circuit 70 receives an image signal, generates a data signal, and outputs it to the data line SL. The data signal is composed of a voltage value corresponding to the luminance gradation of each of RGB. When the display device 101 performs polarity inversion driving, the voltage value of the data signal is, for example, in the range of 0 to 12 V with 6 V as the reference. That is, data signals of 3 V and 9 V have polarities inverted from each other but show the same luminance gradation. For simplification, it is assumed here that the TFT has ideal characteristics. In an actual TFT, the voltage is appropriately adjusted so that the same luminance gradation is obtained for the positive polarity and the negative polarity. The scanning line driving circuit 60 receives a start signal, generates a scanning signal, and outputs it to the scanning line GL. The scanning signal is composed of two values, an off voltage VgL and an on voltage VgH.

[0046] The TFT of each pixel is turned on at the timing of the on-voltage VgH of the scanning signal by connecting the gate to the scanning line GL and the source to the data line SL, so that a predetermined voltage of the data signal applied to the source is applied to the pixel electrode PE via the drain of the TFT.

[0047] A reference voltage is applied to the common electrode 15 (FIG. 15). For example, a voltage of 6 V is applied. As a result, a pixel application voltage, which is the voltage difference between the voltages applied to the pixel electrode PE and the common electrode 15, is applied to the liquid crystal layer 81 sandwiched between the common electrode 15 and the pixel electrode PE, and the liquid crystal is oriented according to the value of the pixel application voltage.

[0048] The timing controller 92 generates a start signal and an image signal from the video synchronization signal and the video data signal of the first to third video signals, and controls the scanning line driving circuit 60 and the data line driving circuit 70 so that at least one of the first, second and third images is displayed at a frame frequency different from that of the other two. For example, the first image is an image that displays various meters of an automobile, such as a speedometer and a tachometer, and contains images that move quickly, and is therefore displayed at a frame frequency of 120 Hz. The second image is an image of map information from a car navigation system, and has little image change due to fast movement, and is therefore displayed at a frame frequency of, for example, 10 Hz. The third image is a general TV or video image, such as an image of a live sports broadcast, and is displayed at a frame frequency of 60 Hz.

[0049] According to the display device 101, it is possible to display images in some divided regions of the display region DR at a frame frequency different from that of the other regions. Therefore, it is possible to reduce power consumption by lowering the frame frequency of images displayed in some divided regions. At this time, it is possible to perform smooth display even with fast movements by displaying images at a high frame frequency in the other divided regions, and it is possible to achieve both high-quality display and low power consumption.

[0050] In addition, since a plurality of scanning line driving circuits are arranged in the x-axis direction outside the display area, and the scanning lines are electrically connected to the scanning line driving circuits using scanning line connection wiring extending in the same direction as the data lines, it is possible to avoid arranging the scanning line driving circuits at the ends of the scanning lines, that is, at positions adjacent to the divided areas in the x-axis direction. This allows adjacent divided areas to be arranged adjacent to each other. Therefore, it is possible to make the gaps between the images displayed in the divided areas less noticeable. For example, when the first image, the second image, and the third image are integrated to form one image, it is possible to reduce or eliminate the areas between the divided areas where images are not displayed, thereby providing an excellent display.

[0051] As described above, when the first image, the second image, and the third image are integrated to form one image, that is, when one image is displayed in the entire display area DR, it is preferable that there is no difference in luminance at the boundaries of the divided areas. In order to achieve such a display, it is preferable that the positions of the connection points CP between the scanning line connection wiring BL and the scanning lines GL satisfy a specific relationship between the divided areas. This relationship will be described in detail below.

[0052] 6 shows the arrangement of the scanning lines GL, the scanning line connection wiring BL, and the connection points CP in each divided region. In each divided region, one connection point CP1 is determined from among the multiple connection points CP, and another connection point CP2 is determined, which is located farther from the upper end DRe of the display region DR than the connection point CP1.

[0053] Let the distances between the connection points CP1 and CP2 located on one of a pair of adjacent divided regions sandwiching the boundary lines BD12 and BD23 and the boundary line be L1a and L1b respectively, and let the distances between the connection points CP1 and CP2 located on the other of the pair of divided regions and the boundary line be L2a and L2b respectively.

[0054] In this embodiment, the distances L1a, L1b, L2a, and L2b satisfy the following relationship of formula (1).

[0055] (L1b - L1a)×(L2b - L2a)>0 ··· (1) For example, in FIG. 6, consider the connection points CP1 and CP2 arranged in the first divided region DR1 and the second divided region DR2. The distances L1a, L1b, L2a, and L2b between the boundary line BD12 located between the first divided region DR1 and the second divided region DR2 and the connection points are such that L1a > L1b in the first divided region DR1 and L2a > L2b in the second divided region DR2. Therefore, the relationship of formula (1) is satisfied.

[0056] Similarly, consider the connection points CP1 and CP2 arranged in the second divided region DR2 and the third divided region DR3. The distances L1a, L1b, L2a, and L2b between the boundary line BD23 located between the second divided region DR2 and the third divided region DR3 and the connection points are such that L1a < L1b in the second divided region DR2 and L2a < L2b in the third divided region DR3. Therefore, the relationship of formula (1) is satisfied.

[0057] That is, if the arrangement pattern of the connection points when the relationship between the distances between the connection points CP1 and CP2 and the boundary line is L1a > L1b or L2a > L2b is defined as pattern A, and the arrangement pattern of the connection points when L1a < L1b or L2a < L2b is defined as pattern B, then on the left side and the right side of the boundary line, the AA or BB arrangement patterns satisfy the relationship of formula (1).

[0058] A scanning signal for turning each pixel PX ON / OFF, which is output from the scanning line drive circuit, is applied to the scanning line connection wiring BL and the scanning line GL. This scanning signal has a pulse waveform when output from the scanning line drive circuit. However, due to parasitic resistance and parasitic capacitance according to the distance from the scanning line drive circuit to the pixel PX, the waveform becomes dull, and the effective time for which the pixel PX is ON becomes shorter. As a result, the brightness of the pixel decreases according to the parasitic resistance and parasitic amount. In two adjacent divided regions separated by a boundary line, the influence of parasitic resistance and parasitic capacitance on the pixel closest to the boundary line of each divided region can be evaluated as follows.

[0059] As shown in FIG. 7, in each divided region, the scanning lines GL and the scanning line connecting wirings BL are divided into four, and the parasitic resistances of the divided portions are Rg and Rb, respectively, and the parasitic capacitances are Cg and Cb, respectively.

[0060] 7(a), (b), and (c) in the first division region DR1, and (d), (e), and (f) in the second division region DR2, the positions of the scanning line connecting wiring BL and the connection points CP of the scanning lines GL, and the parasitic resistances Rg, Rb and parasitic capacitances Cg, Cb that are located from the scanning line driving circuit to the pixel adjacent to the boundary line DB12 and affect the scanning lines are shown. (a) and (d) show the scanning lines GL at the top of each division region in the y-axis direction, (b) and (e) show the scanning lines GL at the center of each division region in the y-axis direction, and (c) and (f) show the scanning lines GL at the bottom of each division region in the y-axis direction.

[0061] As shown in FIG. 7, the parasitic resistance and parasitic capacitance affecting the pixel adjacent to the boundary line DB12 are four times Rg / Cg or Rb / Cb in any of (a) to (f), assuming that Rg / Cg and Rb / Cb are equal. Therefore, the waveform of the scanning signal applied to the pixel closest to the boundary line DB12 in the first division region DR1 and the pixel closest to the boundary line DB12 in the second division region DR2 are rounded to the same extent, and are affected by the parasitic resistance and parasitic capacitance to the same extent. Therefore, the decrease in pixel luminance due to the parasitic resistance and parasitic capacitance is also to the same extent, and the pixel emits light with the same luminance. In FIG. 7 and the following FIGS. 8, 10, and 12, the shaded rectangles indicate the luminance of the pixel, and the lighter the shaded area, the higher the luminance. Therefore, the luminance difference between the pixels on either side of the boundary line BD12 is small, and the boundary line is hardly noticeable. Furthermore, in the first divided region DR1, the luminance of pixels adjacent to the boundary line DB12 is approximately the same regardless of their position in the y-axis direction.

[0062] 8 is a diagram for explaining the influence of parasitic resistance and parasitic capacitance on pixels adjacent to the boundary line BD23 in the second division region DR2 and the third division region DR3. In the second division region DR2 and the third division region DR3, the influence of parasitic resistance and parasitic capacitance on pixels varies depending on the position in the y-axis direction. In other words, the influence of parasitic resistance and parasitic capacitance increases as the pixel is positioned lower, that is, toward the negative side along the y-axis direction.

[0063] Specifically, as shown in (a) and (d), pixels connected to the scanning line GL at the top of each divided region in the y-axis direction are affected by parasitic resistance and parasitic capacitance of two Rg / Cg or Rb / Cb. As shown in (b) and (e), pixels connected to the scanning line GL at the center of each divided region in the y-axis direction are affected by parasitic resistance and parasitic capacitance of four Rg / Cg or Rb / Cb. Also, as shown in (c) and (f), pixels connected to the scanning line GL at the bottom of each divided region in the y-axis direction are affected by parasitic resistance and parasitic capacitance of six Rg / Cg or Rb / Cb.

[0064] Therefore, in each of the second divided region DR2 and the third divided region DR3, for the pixels adjacent to the boundary line BD23, the more downward the position, the greater the smear of the waveform of the applied scanning signal, and the lower the luminance of the pixel. However, if the positions in the y-axis direction are the same, the influence of the parasitic resistance and the parasitic capacitance on the pixels closest to the boundary line DB12 is the same between the second divided region DR2 and the third divided region DR3. For this reason, the luminance difference between the pixels sandwiching the boundary line BD23 is small, and the boundary line is hardly noticeable.

[0065] FIG. 9 shows an example where the distances L1a, L1b, L2a, and L2b do not satisfy the formula (1). As shown in FIG. 9, with respect to the boundary line BD12, for example, in the first divided region DR1, it is assumed that the relationship L1a > L1b is satisfied, and in the second divided region DR2, the relationship L2a < L2b is satisfied. That is, the arrangement pattern of AB is satisfied. In this case, as shown in FIGS. 10(a) and 10(d), in the upper part in the y-axis direction, the pixels adjacent to the boundary line BD12 in the first divided region DR1 are more affected by the parasitic resistance and the parasitic capacitance than the pixels adjacent to the boundary line BD12 in the second divided region DR2, and the luminance decreases. For this reason, the boundary line BD12 due to the luminance difference becomes noticeable.

[0066] Also, as shown in FIGS. 10(c) and 10(f), in the lower part in the y-axis direction, the pixels adjacent to the boundary line BD12 in the second divided region DR2 are more affected by the parasitic resistance and the parasitic capacitance than the pixels adjacent to the boundary line BD12 in the first divided region DR1, and the luminance decreases. For this reason, the boundary line BD12 due to the luminance difference becomes noticeable.

[0067] Also, as shown in FIG. 11, with respect to the boundary line BD12, for example, in the first divided region DR1, it is assumed that the relationship L1a < L1b is satisfied, and in the second divided region DR2, the relationship L2a > L2b is satisfied. That is, the arrangement pattern of BA is satisfied. 12(a) and (d), in the upper portion in the y-axis direction, the pixels adjacent to the boundary line BD12 of the second division region DR2 are more affected by the parasitic resistance and parasitic capacitance than the pixels adjacent to the boundary line BD12 of the first division region DR1, and the luminance decreases. For this reason, the boundary line BD12 due to the luminance difference becomes noticeable.

[0068] 12(c) and (f), in the lower portion in the y-axis direction, the pixels adjacent to the boundary line BD12 of the first division region DR1 are more affected by the parasitic resistance and parasitic capacitance than the pixels adjacent to the boundary line BD12 of the second division region DR2, resulting in a decrease in luminance. For this reason, the boundary line BD12 due to the difference in luminance becomes noticeable.

[0069] In this manner, according to the display device 101, the position of the connection point between the scanning line GL and the scanning line connecting wiring BL satisfies the relationship of formula (1), thereby suppressing the effect of pixel luminance reduction due to the effects of parasitic resistance and parasitic capacitance near the boundary between two adjacent divided regions, and enabling a display in which luminance differences (luminance separation) are unlikely to occur at the boundary between the two divided regions.

[0070] In this embodiment, three divided regions are arranged along the x-axis direction, but even if four or more are arranged, the arrangement pattern of the connection points in two divided regions on either side of a boundary line is repeated as AA, BB, AA, BB, etc., thereby enabling image display in which differences in luminance are unlikely to occur at any boundary line. Also, in this embodiment, the arrangement pattern of the connection points in the first and second divided regions is AA, but it may be BB. In this case, the arrangement pattern of the connection points in the second and third divided regions is AA.

[0071] In addition, when the arrangement of the connection points in two adjacent divided regions satisfies Expression (1), it is preferable that the direction in which the scanning line driving circuit 60 scans the scanning line connection wiring BL is different from the scanning direction of the scanning line driving circuit arranged in one region of a pair of adjacent divided regions sandwiching the boundary line and the scanning direction of the scanning line driving circuit arranged in the other region. In this way, by determining the scanning direction, the scanning directions of the scanning lines in two adjacent divided regions become equal to each other. Specifically, when the scanning lines in one region of a pair of adjacent divided regions are scanned from top to bottom, the scanning lines in the other region are also scanned from top to bottom. Also, when the scanning lines in one region of a pair of adjacent divided regions are scanned from bottom to top, the scanning lines in the other region are also scanned from bottom to top.

[0072] Also, when the relationships L1a > L1b and L2a > L2b are satisfied, the scanning line GLs in a pair of divided regions are each scanned from top to bottom by the scanning line driving circuits in a pair of adjacent divided regions scanning the scanning line connection wiring in the direction toward the boundary line. Also, when the relationships L1a < L1b and L2a < L2b are satisfied, the scanning line GLs in a pair of divided regions are each scanned from top to bottom by the scanning line driving circuits in a pair of adjacent divided regions scanning the scanning line connection wiring in the direction away from the boundary line.

[0073] Next, an example of the specific configuration of the pixels in the display device 101 will be described. FIG. 13A is a plan view showing an enlarged part of the active matrix substrate 40 of the display device 101. As shown in FIG. 13A, each of the plurality of pixels PX is, in this embodiment, either a red pixel (indicated by R), a green pixel (indicated by G), or a blue pixel (indicated by B). Also, pixels of the same color are arranged in the y-axis direction, and in the x-axis direction, red pixels, green pixels, and blue pixels are repeatedly arranged in this order. The arrangement of the plurality of pixels is not limited to this example and may further include yellow pixels or white pixels. Also, the arrangement of each pixel may follow a Bayer array.

[0074] Furthermore, a configuration as shown in Fig. 13B may be used in which pixels of the same color are arranged in the x-axis direction, and red, green, and blue pixels are arranged repeatedly in this order in the y-axis direction. In this configuration, the scanning lines are separated for red, green, and blue pixels, and scanning speed is three times faster than in the configuration shown in Fig. 13A, but the data lines are shared by red, green, and blue pixels, so the number of expensive data line driving circuits can be reduced to one third.

[0075] In addition, since pixels of the same color are arranged in the x-axis direction, when the liquid crystal display device has a structure in which a color filter is arranged on the counter substrate, color shift due to misalignment in the x-axis direction between the active matrix substrate and the counter substrate can be suppressed. For example, when such a display device is curved along the x-axis direction, the positions of pixels on the active matrix substrate and the positions of pixels on the counter substrate are misaligned in the x-axis direction due to the difference in the radii of curvature between the active matrix substrate and the counter substrate. However, since pixels of the same color are arranged in the x-axis direction, the display of different colors is suppressed even if the positions are misaligned.

[0076] In the active matrix substrate 40, when the distance between a pair of pixels of the same color that are included in a pair of adjacent divided regions and are closest in the x-axis direction is d1, and the distance between a pair of pixels of the same color that are included in one of a pair of adjacent divided regions and are closest in the x-axis direction is d2, it is preferable that d1 and d2 are equal. For example, as shown in Fig. 13A and Fig. 13B, when the distance between the green pixel closest to the boundary line BD12 in the first divided region DR1 and the green pixel closest to the boundary line BD12 in the second divided region DR2 is d1, d1=d2. When the distance between the two green pixels closest to each other in the x-axis direction in the second divided region DR2 is d2', it is more preferable that d1=d2=d2'.

[0077] By satisfying this relationship, the first divided region DR1 and the second divided region DR2 are continuous in the x-axis direction without an extra space being arranged between two pixels sandwiching the boundary line BD12. Therefore, when integrally displaying an image continuous in the first divided region DR1 and the second divided region DR2, no break in the divided region occurs, and excellent display can be performed.

[0078] Also, each scanning line arranged in one of a pair of adjacent divided regions preferably overlaps with one of a plurality of scanning lines arranged in the other in the y-axis direction when viewed from the x-axis direction. For example, as shown in FIG. 14, the scanning line GL in the first divided region DR1 overlaps with the scanning line GL in the second divided region DR2 in the region indicated by hatching in the y-axis direction. That is, the amount of deviation Pe in the y-axis direction between the scanning line GL in the first divided region DR1 and the scanning line GL in the second divided region DR2 is preferably smaller than the width Wg of the scanning line GL (Pe < Wg). More preferably, Pe < 1 / 2Wg is satisfied. It is preferable that the same relationship is satisfied for the scanning line GL arranged in the second divided region DR2 and the third divided region DR3.

[0079] By arranging the scanning line GL in this way, the pixels in the first divided region DR1 and the pixels in the second divided region DR2 are suppressed from shifting in the y-axis direction at the boundary line BD12. Therefore, when integrally displaying an image continuous in the first divided region DR1 and the second divided region DR2, no break in the divided region occurs, and excellent display can be performed. Similarly, the pixels in the second divided region DR2 and the pixels in the third divided region DR3 are suppressed from shifting in the y-axis direction at the boundary line BD23. Therefore, when integrally displaying an image continuous in the first divided region DR1, the second divided region DR2, and the third divided region DR3, no break in the divided region occurs, and even more excellent display can be performed.

[0080] In each divided region, the multiple scanning line connection wirings BL are arranged in the x-axis direction at the arrangement pitch in the x-axis direction of pixels of the same color among the multiple pixels PX. For example, as shown in FIG. 13A, in the first divided region DR1, the arrangement pitch in the x-axis direction of green pixels is d2, so the arrangement pitch p1 of the scanning line connection wirings BL is equal to d2. Similarly, in the second divided region DR2, the arrangement pitch p2 of the scanning line connection wirings BL is equal to d2'.

[0081] Moreover, it is preferable that each scanning line connection wiring BL overlaps with either or both of the blue pixel and the red pixel among the red pixel, the green pixel, and the blue pixel adjacent in the x-axis direction. In the example shown in FIG. 13A, the scanning line connection wiring overlaps with the blue pixel and is arranged in the blue pixel. As described above, by arranging the scanning line connection wiring BL, the aperture ratio of the pixel in which the scanning line connection wiring BL is arranged is reduced. Since the human eye has a higher visibility of green than red and blue among red, blue, and green, if the scanning line connection wiring BL is arranged in the green pixel to reduce the aperture ratio, the reduction in luminance is felt strongly. Therefore, by arranging the scanning line connection wiring BL in the red pixel or the blue pixel in which the influence on luminance due to the reduction in aperture ratio is relatively small, the influence on luminance due to the reduction in aperture ratio can be further suppressed.

[0082] Fig. 15 shows an example of a cross-sectional structure of a liquid crystal display device taken along line AA in Fig. 13A. In an active matrix substrate 40, a first insulating layer 11 is disposed on a substrate 10, and data lines SL and scanning line connecting wiring BL are disposed on the first insulating layer 11. The data lines SL and scanning line connecting wiring BL extend in the y-axis direction and do not intersect with each other. For this reason, they can be formed of a metal layer in the same layer. For example, the data lines SL and scanning line connecting wiring BL can be formed simultaneously by forming a metal layer so as to cover the first insulating layer 11 and performing patterning.

[0083] A second insulating layer 12 is disposed on the first insulating layer 11 to cover the data lines SL and the scanning line connecting wiring BL, and an interlayer insulating layer 13 that flattens the unevenness of the second insulating layer 12 is disposed on the second insulating layer 12. A pixel electrode PE is disposed on the interlayer insulating layer 13, and a third insulating layer 14 is disposed so as to cover the pixel electrode PE. Furthermore, a common electrode 15 is disposed on the third insulating layer.

[0084] An opposing substrate 80 is disposed in correspondence with the active matrix substrate 40 at a predetermined distance, and a liquid crystal layer 81 is disposed between the opposing substrate 80 and the active matrix substrate 40 .

[0085] In this manner, since the scanning line connecting wiring BL can be formed from the same metal layer as the data lines SL, it is possible to form the scanning line connecting wiring without increasing the number of manufacturing steps.

[0086] As described above, it is preferable that the scanning line connection wiring BL is arranged in the x-axis direction at the same pitch as the arrangement pitch of pixels of the same color in the x-axis direction. In this arrangement, if the number of pixels in a set of adjacent red, blue, and green pixels in the x-axis direction is greater than the number of pixels in the y-axis direction, there will be pixels on which the scanning line connection wiring BL is not arranged. In this case, the aperture ratio of the pixels on which the scanning line connection wiring BL is not arranged will be high, and the aperture ratio of the pixels in each divided region will not be uniform.

[0087] In such a case, the active matrix substrate 40 may further include at least one dummy scanning line connecting wiring extending in the y-axis direction and arranged in the x-axis direction. Fig. 16 is a schematic enlarged plan view of an active matrix substrate 40' further including a dummy scanning line connecting wiring DL. The scanning line connecting wiring BL and the dummy scanning line connecting wiring DL are arranged in the x-axis direction at the above-mentioned arrangement pitch p1 of the scanning line connecting wiring BL. In other words, when the scanning line connecting wiring BL is arranged in a blue pixel, the dummy scanning line connecting wiring DL is also arranged in a blue pixel.

[0088] As a result, either the scanning line GL or the dummy scanning line connecting wiring DL is disposed in the blue pixel, thereby making it possible to prevent the aperture ratio of the blue pixel from varying depending on the location.

[0089] The dummy scanning line connection wiring DL is not involved in driving the scanning line GL, and is therefore not connected to either the scanning line driving circuit 60 or the scanning line GL. However, if it becomes a floating electrode that is not connected to either potential, problems such as static electricity accumulation and potential differences due to differences in the amount of charge accumulated between the dummy scanning line connection wirings DL may occur. For this reason, the active matrix substrate 40 further includes at least one common wiring CL extending in the x-axis direction, and each dummy scanning line connection wiring DL is preferably connected to at least one common wiring CL. The common wiring CL is connected to an electrode to which a predetermined potential such as a reference potential is applied. A plurality of dummy scanning line connection wirings DL may be connected to the same common wiring CL.

[0090] The common lines CL intersect with, for example, the scanning line connecting lines BL, and also with the data lines.

[0091] In this manner, by arranging the dummy scanning line connecting wirings DL in pixels in which no scanning line connecting wirings BL are arranged, the aperture ratio of the pixels can be made constant.

[0092] Furthermore, when the number of pixels in a set of adjacent red, blue, and green pixels in the x-axis direction is more than twice the number of pixels in the y-axis direction, a configuration is adopted in which the scanning line connecting wiring has redundancy as shown in FIG. 4A, and two adjacent scanning line connecting wirings BL are connected to the same scanning line GL, and a dummy scanning line connecting wiring DL may be further provided as necessary.

[0093] Various modifications are possible to the display device 101 of the present disclosure. First, in the above embodiment, the display device is a liquid crystal display device, but as described above, it may be a display device having another structure, such as an organic EL display device. The display device of the present disclosure can be suitably used in display devices of various structures in which a pixel connected to a selected scanning line is turned on by selectively applying a scanning signal to the scanning line, and each pixel is illuminated with a brightness according to a data signal supplied from a data line.

[0094] In the present embodiment, the scanning line driving circuit 60 and the data line driving circuit 70 face each other across each divided region. However, the scanning line driving circuit 60 may be disposed on the same side as the data line driving circuit 70 with respect to each divided region.

[0095] For example, as shown in Fig. 17, the scanning line driving circuit may be disposed on the same flexible substrate 51 as the data line driving circuit. In this case, for example, if the data lines for driving red pixels, green pixels, and blue pixels are designated SLr, SLg, and SLb, respectively, among the multiple data lines, each scanning line connecting wiring BL may be disposed adjacent to the data line SLr for driving the red pixels. For example, wiring for connecting to the data lines SLr, SLg, and SLb may be disposed on the front side of the flexible substrate 51, and wiring for connecting to the scanning line connecting wiring BL may be disposed on the back side.

[0096] 18, a driving circuit 65 in which a scanning line driving circuit and a data line driving circuit are housed in one package may be configured and disposed on the flexible substrate 51. That is, the driving circuit 65 may serve as both a scanning line driving circuit and a data line driving circuit. The driving circuit 65 may have data lines SL and scanning line connecting wiring BL arranged in the x-axis direction in the order of data lines SLr, SLg, SLb, and scanning line connecting wiring BL, and may be connected to the driving circuit 65, as in the case of FIG.

[0097] Furthermore, the shape and size of the display area DR and the number of divided areas included in the display area DR are merely examples, and the shape, size, and number are not limited to those in the above embodiment.

[0098] Second embodiment A method for driving the display device of this embodiment will be described. Fig. 19 shows the timing of scanning the scanning lines GL when displaying independent images in the first division region DR1, the second division region DR2, and the third division region DR3 of the display device 101. In Fig. 19, three signal groups for displaying images (first image, second image, and third image) in the first division region DR1, the second division region DR2, and the third division region DR3 are shown at the top, center, and bottom, respectively, and a scanning timing chart showing the scanning status of the panel. Specifically, video synchronization signals (Vsync 1, Vsync 2, Vsync 3), start signals (SP 1, SP 2, SP 3), output polarity control signals (S-Dr Pol 1, S-Dr Pol 2, S-Dr Pol 3), and scanning timing charts (Panel Scan 1, Panel Scan 2, Panel Scan 3) are shown at the top, center, and bottom, respectively.

[0099] 19, the frame frequency of the image displayed in the first divided region DR1 is changed to 120 Hz, 60 Hz, and 120 Hz. The frame frequency of the image displayed in the second divided region DR2 is changed to 10 Hz, 120 Hz, 60 Hz, and 120 Hz. The frame frequency of the image displayed in the third divided region DR3 is changed to 60 Hz and 120 Hz.

[0100] FIG. 20 shows the timings of the master clock signal (M Sync) and the video data signal (V Data) in addition to the four signal groups of the second divided region DR2. The scanning timing chart does not show the actual signals, but shows the scanning period and the polarity of the data signal during scanning, with the thick solid line indicating that the data signal is applied with a positive (+) polarity and the thin solid line indicating that the data signal is applied with a negative (-) polarity. The symbols + and - shown in the lower part of the scanning timing chart indicate the polarity of the data signal, and the symbols A, B, C... indicate the value (content) of the data signal. In addition, the polarity of positive and negative means that the voltage is positive (high voltage) or negative (low voltage) with respect to the reference potential, that is, the voltage of the common electrode of the pixel. Therefore, depending on the setting of the reference potential, even if the polarity is negative, the voltage actually applied may be a positive voltage. The control device 90 generates a start signal based on the video synchronization signal of the image to be displayed in each divided region, and outputs it to the scanning line driving circuit 60 of each divided region. Additionally, the controller 90 inverts the output of the output polarity control signal from 0 to 1 or from 1 to 0 each time a video sync signal is received.

[0101] The scanning line driving circuit 60 of each divided area starts scanning the scanning lines GL by receiving a start signal. The scanning of the scanning lines GL is performed based on a scanning line clock signal that is input commonly to each divided area. Therefore, when the number of scanning lines GL arranged in each divided area is equal, the scanning period for scanning the multiple scanning lines GL arranged in the y direction in each divided area once is equal to each other. Furthermore, even if the frame frequency is different, the scanning period is constant and does not change because the scanning line clock signal is the same. On the other hand, the length of the subsequent pause period changes depending on the frame frequency. The lower the frame frequency, the longer the pause period.

[0102] During the idle period, the scanning of the scanning line GL is not performed, and the last displayed data signal is maintained. This can reduce power consumption. The length of the idle period is preferably an integer multiple of one scanning period. When this condition is satisfied, in a pair of adjacent divided regions among the first divided region DR1, the second divided region DR2, and the third divided region DR3, when the interval between start signals applied to the scanning line driving circuit 60 of one region is Tspa and the interval between start signals applied to the scanning line driving circuit 60 of the other region is Tspb, and Na and Nb are any natural numbers, the relationship Nb×Tspa=Na×Tspb is satisfied. Since Tspa and Tspb are frame periods, 1 / Tspa and 1 / Tspb are frame frequencies. In other words, when changing the frame frequency of the image displayed in each divided area, if the frame frequency is selected to satisfy the relationship of Nb×Tspa Na×Tspb, the timing of ON / OFF of switching elements such as TFTs during scanning can be made common throughout the entire display area using a common scanning line clock signal, and the configuration of the entire driving system of the display device 101 can be simplified. When scanning the scanning lines, a data signal is applied. At this time, the data line driving circuit 70 outputs a data signal with a polarity according to the value of the output polarity control signal. For example, when the output polarity control signal is 1, the data signal is output with a positive polarity, and when the output polarity control signal is 0, the data signal is output with a negative polarity. This inverts the polarity of the voltage applied to the liquid crystal for each frame, suppressing bias in the voltage applied to the liquid crystal. During the period when the data line driving circuit 70 stops updating the data signal corresponding to the display image, the control device 90 stops outputting the start signal.

[0103] By performing such control, even if the frame frequency changes at any timing in each divided region, the polarity inversion of the data signal can be maintained before and after the timing of switching the frame frequency. The polarity inversion of the data signal may be performed for the entire divided region, for each scanning line (row line inversion), for each data line (column line inversion or column inversion), or for each pixel (dot inversion). When driving the liquid crystal panel 50 by column inversion or dot inversion, it is preferable that the number of multiple data lines SL arranged in each divided region is an even number. By satisfying this condition, for example, in a usage scene in which one continuous video is displayed in three regions DR1, DR2, and DR3 at the same frame frequency, the polarity of the data signal applied to a pair of pixel rows closest to the boundary line BD12 or BD23 between a pair of adjacent divided regions is always opposite. In other words, it is possible to prevent the polarity of the data signal applied to a pair of pixel rows closest to the boundary line BD12 or BD23 between a pair of adjacent divided regions from becoming the same. This makes it possible to suppress deterioration in the display quality of moving images, such as a situation in which the continuity of polarity is broken near the boundary lines BD12 and BD23 and the boundary lines are visible.

[0104] In the display device 101, the host computer of the vehicle determines the contents and frame frequency of the first image, the second image, and the third image to be displayed in the first division region DR1, the second division region DR2, and the third division region DR3 of the display device 101, respectively, based on the state of the vehicle in which the display device 101 is mounted, information to be displayed in each region according to the state of the vehicle, and operations by the driver or passengers on the vehicle, AV equipment mounted on the vehicle, the car navigation system, etc., and sequentially generates the first image, the second image, and the third image with the determined contents and frame frequency, and inputs them to the control device 90. As described above, the control device 90 generates a start signal and an output polarity control signal based on the video synchronization signals of the first image, the second image, and the third image, respectively, and outputs these signals to the scanning line driving circuit 60 and the data line driving circuit 70 of the first division region DR1, the second division region DR2, and the third division region DR3 together with the image signals of the first image, the second image, and the third image. As described above, the timing controller 92 of the control device 90 and the scanning line driving circuit 60 of each divided region are connected by independent start signal wirings 21, 22, and 23 (FIG. 4A), so that the control device 90 can output start signals independently to the scanning line driving circuits 60 of each divided region. Therefore, as shown in FIG. 19, images can be displayed at different frame frequencies in the first divided region DR1, the second divided region DR2, and the third divided region DR3.

[0105] 19, when the frame frequency of an image is different in the same divided area or between different divided areas, the interval of the start signal applied to the scanning line driving circuit 60 is also different. However, as described above, by applying a scanning line clock signal in common to the scanning line driving circuits 60 of each divided area, it is possible to make the scanning periods equal in different divided areas even when images are displayed at different frame frequencies.

[0106] The difference in the frame frequency of the images is adjusted by the length of the pause period provided after the scanning period. Therefore, in one of a pair of adjacent divided regions, while the scanning line GL is being scanned, the scanning of the scanning line GL may be stopped in the other divided region. For example, as shown in FIG. 19, in the first divided region DR1, a first image is displayed at a frame frequency of 60 Hz, and in the second divided region DR2, a second image is displayed at a frame frequency of 10 Hz, during the scanning period of the first divided region DR1, there is a period during which the scanning of the second divided region DR2 is stopped.

[0107] As described in the first embodiment, in a pair of adjacent divided regions among the first divided region DR1, the second divided region DR2, and the third divided region DR3, the scanning directions of the scanning line driving circuit 60 are opposite to each other. In addition, in a pair of adjacent divided regions, the scanning directions of the multiple scanning line connection wirings BL are also opposite to each other. On the other hand, in the first divided region DR1, the second divided region DR2, and the third divided region DR3, the scanning directions of the multiple scanning lines GL are the same in the y-axis direction, and in this embodiment, the multiple scanning lines GL are scanned from top to bottom in each divided region.

[0108] Third embodiment A method for driving the display device of this embodiment will be described. In the driving method of the second embodiment, when the polarity of the data signal is inverted, the polarity is not adjusted between the divided regions. When the display device continues to display different images for each divided region, it is not necessary to adjust the polarity of the data signal between the divided regions as in the driving method of the second embodiment. However, when displaying a continuous image across a pair of adjacent divided regions or across all three or more divided regions, it is preferable to adjust the polarity inversion between the divided regions. This embodiment corresponds to such image display.

[0109] Fig. 21 shows the timing of scanning the scanning lines GL of each divided area in this embodiment. In Fig. 21, the video synchronization signal (Vsync), data signal (V Data), start signal (SP) and scanning timing chart (Panel Scan) are the same as those in the second embodiment. The timing controller 92 of the control device 90 generates the following signals to control the scanning line driving circuit 60 and the data line driving circuit 70.

[0110] As explained in the second embodiment, the master clock signal (M Sync) is a pulse signal that matches the frame frequency of the image that is displayed at the fastest period among all the images displayed in the divided areas. The write polarity flag signal (M Pol) sequentially inverts its output from 0 to 1 or from 1 to 0 every time it receives a master clock signal.

[0111] The timing controller 92 has a video memory that temporarily stores the image signals generated from the video data signal and output to each division region until the video data signal of the next frame is transferred, that is, during the period when the transmission of the video data signal is stopped. In Fig. 21, V Memory indicates the image signal stored in the video memory, and A, B, C, ... indicate the image signals of successive frames.

[0112] The start pulse enable flag signal (SP Env) becomes 1 in synchronization with the video synchronization signal (V Sync), and switches to 0 at the same time as the falling edge of the start signal. The panel polarity flag signal (P Pol) inverts its output from 0 to 1 or from 1 to 0 every time a start signal is received. The panel polarity comparison flag signal (Pol Comp) is synchronized with the master clock signal (M Sync) and compares the immediately previous write polarity flag signal (M Pol) with the panel polarity flag signal (P Pol), outputting 1 if the values ​​match and 0 if they do not match.

[0113] The start pulse signal (SP) is output in synchronization with the master clock signal (M Sync) if both the start pulse enable flag signal (SP Env) and the panel polarity comparison flag signal (Pol Comp) are 1. The scanning line driving circuit that receives the start pulse signal (SP) scans the scanning lines as shown in the scanning timing chart (Panel Scan). At this time, the scanning line driving circuit outputs a data signal according to the value of the immediately preceding panel polarity flag signal (P Pol), for example, with a positive polarity if the value is 1, and with a negative polarity if the value is 0.

[0114] By performing such control, a start pulse enable flag signal (SP Env) is output in each divided area, and scanning of the scanning line GL is started at a timing that matches the polarity of the data signal to be written in the write polarity flag signal (M Pol), whose value periodically inverts between 0 and 1.

[0115] 21, at the timing when the video synchronization signal (Vsync) of the image frame indicated by B is output, the write polarity flag signal (M Pol) is 0, and since writing a data signal with a negative polarity is not permitted at this timing, the panel polarity comparison flag signal (Pol Comp) is not output. After that, at the timing when the write polarity flag signal (M Pol) becomes 1, the panel polarity comparison flag signal (Pol Comp) is output, and at this time, scanning of the image frame indicated by B with a positive polarity is started.

[0116] In this way, the control device 90 sequentially generates a write polarity flag signal indicating the write polarity of the data signal to be output to the data line, and outputs a start signal to the start signal wiring connected to the scanning line driving circuit of each divided region based on the write polarity flag signal. Since the write polarity flag signal (M Pol) is commonly used to determine the timing of generating a start signal in each divided region, the timing at which scanning of the scanning line starts in each divided region and the polarity of the data signal follow the write polarity flag signal (M Pol).

[0117] Therefore, according to this embodiment, in each divided region, the frame frequency of the image to be displayed can be changed while correctly maintaining the polarity inversion drive of the data signal. In addition, when the number of data lines in each divided region is even, even if the frame frequency of the image to be displayed is changed at any timing in a pair of adjacent divided regions, the regularity of the polarity inversion of the data signal can be made continuous between the pair of divided regions. Therefore, for example, in a pair of pixel rows included in the first divided region DR1 and the second divided region DR2, respectively, sandwiching the boundary line BD12, and in a pair of pixel rows included in the second divided region DR2 and the third divided region DR3, respectively, sandwiching the boundary line BD23, the polarities are not aligned, and the inversion drive is performed correctly. Therefore, the voltage applied to the liquid crystal near the boundary line is biased, and the deterioration of the liquid crystal layer is suppressed. As a result, even when a continuous image is displayed across a pair of adjacent divided regions or across all of three or more divided regions, the occurrence of display unevenness along the column direction near the boundary line is suppressed, and a uniform display can be performed.

[0118] Fig. 22 shows the timing of scanning the scanning lines GL in three divided regions by the driving method of the display device of this embodiment. As in Fig. 19, Fig. 22 shows three signal groups for displaying images (first image, second image, third image) in the first divided region DR1, the second divided region DR2, and the third divided region DR3 at the top, center, and bottom. Also, the top shows a master clock signal (M Sync) and a write polarity flag signal (M Pol) that are commonly used for the first divided region DR1, the second divided region DR2, and the third divided region DR3.

[0119] In this embodiment, the highest frame frequency of the image to be displayed is 120 Hz, and the frequency of the master clock signal (M Sync) is also set to 120 Hz. The value of the write polarity flag signal (M Pol) is inverted every time the master clock signal (M Sync) is output, so the frequency of the write polarity flag signal (M Pol) is 60 Hz. That is, in the basic period of the write polarity flag signal (M Pol), the value is 1 in the first half period, and the value is 0 in the second half period. Therefore, for an image with a frame frequency of 60 Hz, when scanning lines at a frequency of 60 Hz while inverting the polarity of the data signal, the polarity of the data signal does not match the value of the master clock signal (M Sync) every two periods, so that scanning is delayed for a period equivalent to 120 Hz.

[0120] As a result, in any divided region, when an image is displayed at a frame frequency of 60 Hz, the scanning lines are scanned at least twice in succession in at least two consecutive frame periods, and scanning is paused in the period thereafter, that is, the remaining period excluding at least two scanning periods from the total of at least two frame periods, as shown in Fig. 22. Even when the scanning periods of the scanning lines GL are successive in this way, the polarity of the data signal is inverted, thereby suppressing the bias in polarity of the pixel application voltage, which is the voltage applied to the liquid crystal layer.

[0121] In addition, when the frame frequency of the displayed image is low, the pixel may not be sufficiently charged due to the short scanning period, and the subsequent pause period may be long, causing charge leakage and making the image appear to flicker. In this case, for example, as shown in Figure 23, the scanning lines may be scanned multiple times in succession.

[0122] For example, when an image is displayed at 10 Hz in any of the divided regions, the data line driving circuit 70 receives an image signal stored in the video memory, and outputs the same data signal multiple times in succession while inverting the polarity in synchronization with the master clock signal. The scanning line driving circuit 60 receives a start signal multiple times from the timing controller 92 in synchronization with the master clock signal, that is, in synchronization with the output of the data signal, and outputs a scanning signal each time the start signal is received to scan the scanning line GL. In this way, the scanning line is scanned multiple times in succession, and then the scanning is paused. The scanning line may be scanned an even number of times in succession, or an odd number of times in succession. If the number of scans is an odd number, the polarity of the pixel application voltage during the holding period is reversed for each pause period, so that the bias in the polarity of the pixel application voltage can be suppressed.

[0123] By performing this type of driving, it is possible to appropriately charge the pixel electrodes even if the time for one scan is short, and it is also possible to prevent deterioration in the reliability of switching elements such as TFTs, which is caused by the longer OFF periods of the switching elements.

[0124] The driving method described with reference to Fig. 23 may be realized by the control device 90, or a video signal suitable for such a driving method may be prepared in advance and displayed on the display device 101. Specifically, as shown in Fig. 24, a video signal with a frame frequency of 10 Hz includes a plurality of consecutive video data signals (VData) and a video synchronization signal (V Sync) synchronized with a master clock signal. As in the driving method shown in Fig. 23, the number of consecutive image signals and video synchronization signals (V Sync) is an odd number, and more specifically, a video data signal (VData) with a frame frequency of 10 Hz includes three consecutive identical video data signals (VData) and video synchronization signals (VSync).

[0125] The control device 90 receives the video data signal (VData) and the video synchronization signal (VSync), generates a start signal (SP) in synchronization with the video synchronization signal (VSync), and generates an image signal (not shown) based on the video data signal (VData). The control device 90 outputs the generated start signal and image signal to the scanning line driving circuit 60 and the data line driving circuit 70, respectively.

[0126] The data line driving circuit 70 receives an image signal and outputs a data signal to the data line SL. As shown in the lower part of Fig. 24, the data line driving circuit 70 outputs the same data signal A three times in succession while inverting the polarity, and then provides a pause period by not outputting any data signal. The data line driving circuit 70 then outputs the data signal B three times in succession while inverting the polarity, and then provides a pause period during which no data signal is output. In this way, the control device 90 receives the transmission of the video data signal, and then stops outputting the start signal during the period during which the transmission of the video data signal is stopped.

[0127] The video data transmission interval, which is the period from the timing of outputting the third data signal to the timing of outputting the data signal for the next frame, is the same as the start signal output interval, which is the period from the timing of outputting the third start signal to the timing of outputting the start signal for the next frame.

[0128] By preparing such a video signal, it is possible to simplify the configuration of the control device 90 and reduce the cost of the entire display device 101. Furthermore, when preparing a video signal, it is also possible to adjust the polarity inversion between the divided regions as shown in the third embodiment by appropriately adjusting the timing of the change in the frame frequency.

[0129] The display device and the driving method according to the second and third embodiments are merely examples, and various modifications may be made. For example, the frame frequency of the image displayed in each divided region is not limited to a combination of 10 Hz, 60 Hz, and 120 Hz, and may be other frequencies. Images may be displayed at four or more different frequencies. The control method for generating a start signal based on a write polarity flag signal is not limited to the above embodiment, and other control methods may be adopted. Furthermore, in the second and third embodiments, the polarity of the data signal output by the data line driving circuit is controlled by an output polarity control signal, but the polarity may be automatically reversed each time the data line driving circuit outputs.

[0130] The display device of the present disclosure can also be described as follows.

[0131] A display device or a method for driving a display device according to a first configuration of the present disclosure includes: A substrate having a main surface with a display area and a non-display area located around the display area, the display area including three or more divided areas adjacent to each other along a first direction; A plurality of scanning lines are arranged in each divided region, the plurality of scanning lines extending in the first direction and arranged in a second direction intersecting the first direction; a plurality of data lines arranged in each of the divided regions, the data lines extending in the second direction and arranged in the first direction; A plurality of pixels arranged in each of the divided regions, the plurality of pixels being arranged in a region surrounded by a pair of data lines among the plurality of data lines and a pair of scanning lines among the plurality of scanning lines; a plurality of scanning line connection wirings arranged in each of the divided regions, extending in the second direction, and arranged in the first direction; a plurality of data line driving circuits respectively connected to the plurality of data lines in each of the divided regions; A plurality of scanning line driving circuits corresponding to each of the divided regions; A control device; a plurality of start signal wirings for independently connecting the control device to a scanning line driving circuit corresponding to each divided region; Equipped with the plurality of scanning line driving circuits and the plurality of data line driving circuits are arranged in the first direction outside the display area, each of the scanning line connection wirings electrically connects the scanning line driving circuit to one of the plurality of scanning lines; The control device independently outputs a start signal to the start signal wiring connected to the scanning line driving circuit of each divided area, so that the scanning line driving circuit and the data line driving circuit display images at different frame frequencies in at least a pair of adjacent divided areas among the three or more divided areas.

[0132] According to the first configuration, a part of the display area can be driven at a different frame frequency, thereby reducing power consumption. By arranging the scanning line driving circuit opposite to the data line driving circuit, adjacent divided areas can be arranged adjacent to each other, and the gaps in the images displayed in the divided areas can be made inconspicuous. In addition, by independently connecting the start signal wiring to the scanning line driving circuit corresponding to each divided area, each divided area can be independently controlled.

[0133] A display device or a method for driving a display device according to a second configuration may further include at least one selected from the group consisting of a power supply wiring, a clock signal wiring, and a common wiring, which connects the scanning line driving circuits of the pair of adjacent divided regions in the first configuration. By disposing at least one of the power supply wiring, the clock signal wiring, and the common wiring between the driving circuits, the number of wirings from the control device can be reduced.

[0134] A display device or a method of driving a display device according to a third configuration may be such that, in the first configuration, the intervals between the start signals applied to the scanning line driving circuit are different from each other in the pair of adjacent divided regions.

[0135] A display device or a driving method of a display device according to a fourth configuration may be such that, in the pair of adjacent divided regions in the first configuration, the interval between the start signals applied to the scanning line driving circuit in one region is Tspa, the interval between the start signals in the other region is Tspb, and Na and Nb are any natural numbers, the relationship Nb×Tspa=Na×Tspb is satisfied. The clock frequency of the gates can be unified, the ON / OFF timing of the TFTs can be made common within the panel, and the entire driving system can be simplified.

[0136] A display device or a driving method of a display device according to a fifth configuration may be such that, in the pair of adjacent divided regions in the first configuration, the scanning periods for scanning the plurality of scanning lines arranged in the second direction once may be equal to each other. By making the scanning periods equal, that is, by sharing a clock signal, it is possible to share the ON / OFF timing of the TFTs within the panel while making the frame frequency different for each region, and thus simplify the entire driving system.

[0137] A display device or a method of driving a display device according to a sixth configuration may be configured to, in the first configuration, stop scanning of the plurality of scanning lines in one of the pair of adjacent divided regions during a period in which the plurality of scanning lines are scanned in the other of the pair of adjacent divided regions. By stopping scanning, it is possible to reduce power consumption.

[0138] A seventh configuration of the display device or the driving method of the display device according to the first configuration may be such that the number of the plurality of data lines in each of the three or more divided regions is an even number. By making the number of data lines in each divided region an even number, when consecutive images, videos, etc. are displayed in two or more adjacent regions, the regularity of polarity determination at the boundary can be maintained even if the polarity of the data signal is inverted by a method such as column inversion or dot inversion. Even when a plurality of divided regions are connected to display images or videos as a single display region, no seams are visible.

[0139] A display device or a method for driving a display device according to an eighth configuration may be such that, in the first configuration, a period in which the polarities of the data signals are the same and a period in which the polarities are different are repeated in a set of pixels belonging to each of a pair of adjacent divided regions.

[0140] A ninth aspect of the present invention relates to a display device or a driving method for a display device, and in the first aspect, the control device may control the plurality of data line driving circuits to invert the polarity of data signals of at least two consecutive frames in at least one of the three or more divided regions for each frame and output the data signals to the plurality of data lines, and may scan the plurality of scanning lines at least twice in succession during the at least two consecutive frame periods and pause scanning in the subsequent period. By inverting the polarity of data signals of two consecutive frames and writing them successively, it is possible to suppress bias in polarity of data signals without using a source driver that automatically inverts polarity or a signal that controls output polarity.

[0141] A tenth aspect of the display device or the driving method of the display device according to the first aspect of the present invention may be such that, in the three or more divided regions, the control device sequentially generates write polarity flag signals indicating write polarities of data signals output by the data line driving circuits to the data lines, and outputs a start signal to a start signal wiring connected to the scanning line driving circuits of each divided region based on the write polarity flag signal. By outputting a start signal to the scanning line driving circuits of each divided region in synchronization with the flag signal, polarity inversion of the data signal can be controlled across the divided regions.

[0142] A display device or a method for driving a display device according to an eleventh configuration may be such that, in the first configuration, the scanning directions of the scanning line driving circuit in the pair of adjacent divided regions are opposite to each other.

[0143] A display device or a method for driving a display device according to a twelfth configuration may be such that, in the first configuration, the scanning directions of the plurality of scanning line connecting wirings are opposite to each other in the pair of adjacent divided regions.

[0144] A display device or a method of driving a display device according to a thirteenth configuration is the twelfth configuration, wherein in the pair of adjacent divided regions, the plurality of scanning lines may be scanned in the same direction in the second direction.

[0145] A display device or a method for driving a display device in a fourteenth configuration may be such that, in the first configuration, the control device receives from the outside a video data signal corresponding to an image to be displayed in each of the three or more divided areas, and during a period in which the transmission of the video data signal is stopped in at least one of the three or more divided areas, the control device stops outputting the start signal.

[0146] A display device or a method for driving a display device according to a fifteenth configuration is such that, in the first configuration, the control device receives from the outside a video data signal corresponding to an image to be displayed in each of the three or more divided areas, and generates an image signal to be output to the plurality of data line driving circuits based on the video data signal, and the control device includes a video memory for temporarily storing the generated image signal, and during a period when transmission of a video data signal corresponding to a display image of at least one of the three or more divided areas is stopped, the image signal to be output to the data line driving circuit of the at least one area may be stored in the video memory.

[0147] A display device or a method for driving a display device in a 16th configuration may be such that, in the first configuration, the control device receives from the outside a video data signal corresponding to an image to be displayed in each of the three or more divided areas, and in at least one of the three or more divided areas, the interval between the start signals output to a scanning line driving circuit and the interval between the transmission of the video data signals are the same.

[0148] A seventeenth aspect of the present invention is a display device or a method of driving a display device, in which, in the first aspect, the data line driving circuit outputs the same data signal multiple times in succession in at least one of the three or more divided regions, and then stops outputting the data signal. This simplifies the circuitry of the display device, and reduces overall costs.

[0149] A display device or a method for driving a display device according to an eighteenth aspect is the seventeenth aspect, in which the multiple times may be an odd number.

[0150] A nineteenth aspect of the present invention is a display device or a driving method thereof, in the fifteenth aspect, in at least one of the three or more divided regions, wherein the data line driving circuit receives an image signal stored in the video memory, and outputs the same data signal multiple times in succession while inverting the polarity, and the scanning line driving circuit outputs a scanning signal multiple times in succession in synchronization with the output of the data signal to scan the multiple scanning lines, and then pauses scanning. This can increase the charging rate of the panel, suppress screen flickering, suppress bias in gate voltage, and improve reliability.

[0151] A display device or a method for driving a display device according to a twentieth aspect is the nineteenth aspect, wherein the number of the plurality of frames is an odd number. [Explanation of symbols]

[0152] 10...substrate, 10a...main surface, 11...first insulating layer, 12...second insulating layer, 13...interlayer insulating layer, 14...third insulating layer, 15...common electrode, 21...wiring, 30...counter substrate, 31...liquid crystal layer, 40, 40'...active matrix substrate, 50...liquid crystal panel, 51...flexible substrate, 60...scanning line driving circuit, 65...driving circuit, 70...data line driving circuit, 80...counter substrate, 81...liquid crystal layer, 82...seal, 83...color filter, 90...control device 91...substrate, 92...timing controller, 95...backlight, 96...polarizing plate, 101...display device, 200...dashboard, 201...driver's seat, 202...passenger seat, BD12, BD23...boundary line, BL...scanning line connection wiring, CL...common wiring, CP, CP1, CP2...connection point, Cb...parasitic capacitance, Cg...parasitic capacitance, DL...dummy scanning line connection wiring, DR...display area, DR1...first division area, DR2...second division area, DR3...third division area, DRe...top end, GL...scanning line, H1, H2, H3...maximum height, L1a, L1b, l2a, L2b...distance, NR...non-display area, PE...pixel electrode, PX...pixel, Rb...parasitic resistance Rg: parasitic resistance, SL, SLb, SLg, SLr: data lines, W1, W2, W3: maximum width p1, p2: arrangement pitch

Claims

1. A substrate having a main surface with a display area and a non-display area located around the display area, the display area including three or more divided areas adjacent to each other along a first direction; A plurality of scanning lines are arranged in each divided region, the plurality of scanning lines extending in the first direction and arranged in a second direction intersecting the first direction; a plurality of data lines disposed in each of the divided regions, the data lines extending in the second direction and arranged in the first direction; A plurality of pixels arranged in each of the divided regions, the plurality of pixels being arranged in a region surrounded by a pair of data lines among the plurality of data lines and a pair of scanning lines among the plurality of scanning lines; a plurality of scanning line connection wirings arranged in each of the divided regions, extending in the second direction, and arranged in the first direction; a plurality of data line driving circuits respectively connected to the plurality of data lines in each of the divided regions; A plurality of scanning line driving circuits corresponding to each of the divided regions; A control device; a plurality of start signal wirings for independently connecting the control device to a scanning line driving circuit corresponding to each divided region; Equipped with the plurality of scanning line driving circuits and the plurality of data line driving circuits are arranged in the first direction outside the display area, each of the scanning line connection wirings electrically connects the scanning line driving circuit to one of the plurality of scanning lines; A display device in which the control device independently outputs a start signal to the start signal wiring connected to the scanning line driving circuit of each divided area, so that the scanning line driving circuit and the data line driving circuit display images at different frame frequencies in at least a pair of adjacent divided areas among the three or more divided areas.

2. 2. The display device according to claim 1, further comprising at least one selected from the group consisting of a power supply line, a clock signal line, and a common line, which connects the scanning line driving circuits of the pair of adjacent divided regions.

3. The display device according to claim 1 , wherein the intervals between the start signals applied to the scanning line driving circuit are different in the pair of adjacent divided regions.

4. In the pair of adjacent divided regions, an interval between the start signals applied to the scanning line driving circuit in one region is designated as Tspa, and an interval between the start signals applied to the other region is designated as Tspb, 2. The display device according to claim 1, wherein, when Na and Nb are arbitrary natural numbers, a relationship of Nb x Tspa = Na x Tspb is satisfied.

5. The display device according to claim 1 , wherein the scanning periods for scanning the plurality of scanning lines arranged in the second direction once in the pair of adjacent divided regions are equal to each other.

6. The display device according to claim 1 , wherein while the plurality of scanning lines are being scanned in one of the pair of adjacent divided regions, scanning of the plurality of scanning lines is stopped in the other divided region.

7. The display device according to claim 1 , wherein the number of the plurality of data lines in each of the three or more divided regions is an even number.

8. 2. The display device according to claim 1, wherein the control device controls the plurality of data line driving circuits in at least one of the three or more divided regions to output data signals of at least two consecutive frames to the plurality of data lines by inverting the polarity for each frame, and scans the plurality of scanning lines at least twice consecutively during the at least two consecutive frame periods, and pauses scanning during the subsequent period.

9. The display device according to claim 1 , wherein the scanning directions of the scanning line driving circuit in the pair of adjacent divided regions are opposite to each other.

10. The display device according to claim 9 , wherein the scanning directions of the scanning line connecting wirings are opposite to each other in the pair of adjacent divided regions.

11. said control device receives from an external device a video data signal corresponding to an image to be displayed in each of said three or more divided areas; In at least one of the three or more divided regions, During a period in which the transmission of the video data signal is stopped, The display device according to claim 1 , wherein the control device stops outputting the start signal.

12. The display device according to claim 1 , wherein in at least one of the three or more divided regions, the data line driving circuit outputs the same data signal a plurality of times in succession, and then stops outputting the data signal.

13. The display device according to claim 12 , wherein the number of times is an odd number.

14. A method for controlling a display device including a display panel and a control device, comprising: The display panel includes: A substrate having a main surface with a display area and a non-display area located around the display area, the display area including three or more divided areas adjacent to each other along a first direction; A plurality of scanning lines are arranged in each divided region, the plurality of scanning lines extending in the first direction and arranged in a second direction intersecting the first direction; a plurality of data lines disposed in each of the divided regions, the data lines extending in the second direction and arranged in the first direction; A plurality of pixels arranged in each of the divided regions, the plurality of pixels being arranged in a region surrounded by a pair of data lines among the plurality of data lines and a pair of scanning lines among the plurality of scanning lines; a plurality of scanning line connection wirings arranged in each of the divided regions, extending in the second direction, and arranged in the first direction; a plurality of data line driving circuits respectively connected to the plurality of data lines in each of the divided regions; A plurality of scanning line driving circuits corresponding to each of the divided regions; a plurality of start signal wirings for independently connecting the control device to a scanning line driving circuit corresponding to each divided region; Equipped with the plurality of scanning line driving circuits and the plurality of data line driving circuits are arranged in the first direction outside the display area, each of the scanning line connection wirings electrically connects the scanning line driving circuit to one of the plurality of scanning lines; The control device outputs a start signal independently to the start signal wiring connected to the scanning line driving circuit of each divided area, thereby causing the scanning line driving circuit and the data line driving circuit to display images at different frame frequencies in at least a pair of adjacent divided areas among the three or more divided areas.

15. The method of controlling a display device according to claim 14 , wherein the control device outputs start signals at different intervals in the pair of adjacent divided regions.

16. In the pair of adjacent divided regions, the interval between the start signals applied to the scanning line driving circuit in one region is Tspa, and the interval between the start signals applied to the other region is Tspb; 16. The display device control method according to claim 15, wherein when Na and Nb are arbitrary natural numbers, a relationship of Nb x Tspa = Na x Tspb is satisfied.

17. 15. The display device control method according to claim 14, wherein the scanning periods during which the scanning line driving circuit scans the plurality of scanning lines arranged in the second direction once are equal to each other in the pair of adjacent divided regions.

18. 15. The display device control method according to claim 14, wherein during a period in which the scanning line driving circuit is scanning the plurality of scanning lines in one of the pair of adjacent divided regions, the scanning line driving circuit stops scanning the plurality of scanning lines in the other of the pair of adjacent divided regions.

19. 20. The display device control method according to claim 18, wherein the scanning line driving circuit of the pair of adjacent divided regions inverts the polarity of the data signal and outputs it so that a period in which the polarity of the data signal is the same and a period in which the polarity of the data signal is different are repeated in a set of pixels belonging to each of the pair of adjacent divided regions.

20. 15. The display device control method of claim 14, wherein the control device controls the plurality of data line drive circuits to output data signals of at least two consecutive frames to the plurality of data lines by inverting polarity for each frame in at least one of the three or more divided regions, and scans the plurality of scanning lines at least twice in succession during the at least two consecutive frame periods, and pauses scanning during a period thereafter.

Images