Semiconductor device

Abstract

To provide a semiconductor device capable of reducing the influence of heat on a layer that provides a wiring function.SOLUTION: A semiconductor substrate 20 includes an insulating layer 21, a semiconductor layer 22 disposed on the insulating layer 21, and an insulating isolation trench 24. The semiconductor layer 22 has a region 222 sandwiched between the insulating isolation trenches 24 arranged in a predetermined direction. A conductor layer 40 includes a polysilicon layer 411 and a fuse 41 disposed on the region 222. The conductor layer 40 is disposed in a layer above the fuse 41 and includes, as conductor layers connected to the fuse 41 via contacts 50, a wiring layer 42 which is a layer providing a wiring function, and a heat dissipation layer 431 which is a layer providing a heat dissipation function. The heat dissipation layer 431 dissipates heat generated by passing electricity through the fuse 41.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The disclosure herein relates to semiconductor devices. [Background technology]

[0002] Patent Document 1 discloses a semiconductor device in which multiple conductor layers are arranged on a semiconductor substrate. The conductor layers have fuses including polysilicon layers. The contents of the prior art documents are incorporated by reference as explanations of the technical elements in this specification. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2005-244101 A Summary of the Invention [Problem to be solved by the invention]

[0004] A possible configuration is to use an insulating layer, a semiconductor layer disposed on the insulating layer, and a semiconductor substrate having an insulating isolation trench formed in the semiconductor layer, and to provide a fuse in a region sandwiched between the insulating isolation trenches. In this configuration, heat generated by passing current through the fuse is trapped in the above-mentioned region, and the heat has a large effect on a conductor layer that provides a wiring function and is connected to the fuse via a contact. This may cause the fuse to fail to perform the desired function. In the above-mentioned respects and other respects not mentioned, further improvements are required for semiconductor devices.

[0005] One disclosed object is to provide a semiconductor device capable of reducing the influence of heat on a conductor layer that provides a wiring function. [Means for solving the problem]

[0006] The symbols in parentheses in the claims, this section, and the technical concept section are examples showing the correspondence with the specific means described in the embodiments below as one aspect. The symbols in parentheses do not limit the technical scope.

[0007] A semiconductor device according to one embodiment of the present disclosure includes: a semiconductor substrate (20) having an insulating layer (21), a semiconductor layer (22) disposed on the insulating layer, and an insulating isolation trench (24) penetrating the semiconductor layer and reaching the insulating layer; A conductor layer (40) arranged in multiple layers on the semiconductor layer; A contact (50) for connecting between layers; Equipped with The semiconductor layer has a region (222) sandwiched between insulating isolation trenches aligned in a predetermined direction; The conductor layer is a fuse (41) disposed over the region, the fuse (41) including a polysilicon layer (411); a layer (42) disposed above the fuses, connected to the fuses via contacts, and providing a wiring function for electrically connecting the fuses to other circuits; and a layer (43) that is disposed in a layer above the fuse, is connected to the fuse via a contact, and provides a heat dissipation function for heat generated by passing current through the fuse.

[0008] In a configuration in which a fuse is disposed on a region sandwiched between insulating isolation trenches in a semiconductor layer, heat generated by energizing the fuse is trapped in the region. Therefore, the heat is easily transferred to the conductor layer located above the fuse. In the semiconductor device disclosed, the conductor layer includes a layer that provides a heat dissipation function, so that the effect of heat on the conductor layer that provides a wiring function can be reduced.

[0009] The various aspects disclosed in this specification adopt different technical means to achieve their respective objectives. The claims and the parenthetical symbols described in this section are merely illustrative of the corresponding relationship with the embodiments described below, and are not intended to limit the technical scope. The objectives, features, and effects disclosed in this specification will become clearer with reference to the following detailed description and the accompanying drawings. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a plan view illustrating an example of a semiconductor device. [Diagram 2] FIG. 2 is a cross-sectional view taken along line II-II in FIG. [Diagram 3] FIG. 13 is a plan view showing a reference example. [Figure 4] FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. [Diagram 5] FIG. 13 is a diagram showing the effect of heat when there is a region sandwiched between insulating isolation trenches. [Figure 6] FIG. 13 illustrates the thermal effects without the region sandwiched between the isolation trenches. [Figure 7] FIG. 13 is a diagram showing a thermal simulation result of a reference example. [Figure 8] FIG. 3 is a diagram showing a result of a thermal simulation of the configuration shown in FIG. 2. [Figure 9] FIG. 11 is a cross-sectional view showing another example of a semiconductor device. [Figure 10] FIG. 11 is a plan view showing another example of a semiconductor device. [Figure 11] 11 is a cross-sectional view taken along line XI-XI in FIG. [Figure 12] FIG. 11 is a plan view showing another example of a semiconductor device. [Figure 13] 13 is a cross-sectional view taken along line XIII-XIII in FIG. 12. [Figure 14] FIG. 11 is a plan view showing another example of a semiconductor device. [Figure 15] FIG. 11 is a plan view showing another example of a semiconductor device. [Figure 16]16 is a cross-sectional view taken along line XVI-XVI in FIG. 15. [Figure 17] FIG. 11 is a plan view showing another example of a semiconductor device. [Figure 18] 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 17. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, a number of embodiments will be described based on the drawings. In each embodiment, the same reference numerals are used to designate corresponding components, and duplicated descriptions may be omitted. When only a part of the configuration is described in each embodiment, the configuration of the other embodiment described above can be applied to the other parts of the configuration. In addition to the combination of configurations explicitly stated in the description of each embodiment, configurations of multiple embodiments can be partially combined together even if not explicitly stated, as long as there is no particular problem with the combination. Note that the description of A and / or B means at least one of A and B. In other words, it may include only A, only B, or both A and B.

[0012] (First embodiment) First, a schematic configuration of the semiconductor device will be described.

[0013] <Semiconductor device> FIG. 1 is a plan view showing a semiconductor device. For convenience, an insulating film disposed on one surface of a semiconductor substrate is omitted in FIG. 1. For convenience, other circuits electrically connected to the fuse are only partially shown. For clarity, the heat dissipation layer is hatched. FIG. 2 is a cross-sectional view taken along line II-II in FIG. 1.

[0014] In the following, the thickness direction of the semiconductor substrate is referred to as the Z direction. The direction perpendicular to the Z direction is referred to as the X direction. The direction perpendicular to both the Z direction and the X direction is referred to as the Y direction. Unless otherwise specified, the shape viewed from the Z direction, in other words the shape along the XY plane defined by the X and Y directions, is referred to as the planar shape. The planar view from the Z direction is sometimes simply referred to as the planar view. Also, the area viewed from the Z direction is sometimes simply referred to as the area.

[0015] As shown in FIGS. 1 and 2, a semiconductor device 10 includes a semiconductor substrate 20, an insulating film 30, a conductor layer 40, and a contact 50.

[0016] The semiconductor substrate 20 has an insulating layer 21 and a semiconductor layer 22 disposed on the insulating layer 21. The semiconductor substrate 20 may have the insulating layer 21 including a silicon oxide film (SiO2) and the semiconductor layer 22 of single crystal silicon formed on the insulating layer 21. Such a semiconductor substrate 20 is called an SOI substrate. SOI is an abbreviation for Silicon on Insulator. The semiconductor layer 22 is sometimes called an SOI layer.

[0017] As shown in FIG. 2, the semiconductor substrate 20 may have a support substrate 23. The support substrate 23 supports an insulating layer 21 and a semiconductor layer 22. The insulating layer 21 is disposed on one surface of the support substrate 23, and the semiconductor layer 22 is disposed on the insulating layer 21. The support substrate 23 may be, for example, a silicon substrate. The semiconductor substrate 20 has one surface 20a and a back surface 20b that is the surface opposite to the one surface 20a in the Z direction. In the example shown in FIG. 2, the semiconductor layer 22 provides the one surface 20a, and the support substrate 23 provides the back surface 20b. The one surface 20a may be referred to as a main surface.

[0018] The semiconductor substrate 20 has an insulating isolation trench 24. The insulating isolation trench 24 is formed in the semiconductor layer 22. The insulating isolation trench 24 is formed by filling an insulating material such as SiO2 in a trench (groove) provided with a depth reaching the insulating layer 21 from the one surface 20a. The insulating isolation trench 24 electrically isolates a plurality of elements (circuit elements) formed in the semiconductor layer 22 from each other. The insulating isolation trench 24 may be called an element isolation trench or the like. The insulating isolation trench 24 is ring-shaped (annular) in a plan view in the Z direction. In the semiconductor layer 22, an element (not shown), such as a switching element or a diode, is formed in a region 221 partitioned by the insulating isolation trench 24. The switching element may include, for example, a MOSFET, an IGBT, or the like. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. IGBT is an abbreviation for Insulated Gate Bipolar Transistor. Only one element may be formed in the common (single) region 221, or a plurality of elements may be formed.

[0019] The semiconductor layer 22 includes a region 222 sandwiched between the insulation isolation trenches 24 aligned in a predetermined direction. The region 222 is surrounded by the insulation isolation trenches 24 aligned in the predetermined direction and the insulating layer 21. The region 222 is a region between the insulation isolation trenches 24 in the predetermined direction. The region 222 may be a region sandwiched between different insulation isolation trenches 24, as shown in FIG. 1, for example. In this case, the region 222 is a region between two insulation isolation trenches 24. The region 222 may be a region between portions of a common insulation isolation trench 24 that face each other in the predetermined direction. In other words, the region 222 may also serve as the region 221.

[0020] The insulating film 30 is disposed on one surface 20a of the semiconductor substrate 20. The insulating film 30 has a multi-layer structure. In FIG. 2, for convenience, the insulating film 30 is illustrated as a single unit in a simplified manner. The insulating film 30 includes an underlying insulating film interposed between the fuse 41 described below and the semiconductor substrate 20, and an interlayer insulating film disposed so as to cover the underlying insulating film. The interlayer insulating film is disposed so as to cover the fuse 41 and the underlying insulating film. The interlayer insulating film is disposed between conductor layers disposed in different layers. The insulating film 30 may include a protective film disposed on the interlayer insulating film.

[0021] The base insulating film may be, for example, a silicon oxide film or a silicon nitride film (SI3N4). It may also be a composite film of silicon oxide film and silicon nitride film. The interlayer insulating film may be, for example, a silicon oxide film or an insulating film such as a PSG film, a BSG film or a BPSG film. PSG is an abbreviation for Phosphorus Silicon Glass. BSG is an abbreviation for Boron Silicon Glass. BPSG is an abbreviation for Boron Phosphorus Silicon Glass. The interlayer insulating film may be a composite film of a silicon oxide film and an insulating film such as BPSG. The protective film may be, for example, a silicon nitride film or a polyimide film.

[0022] The conductor layers 40 are arranged in a multi-layer on the one surface 20a of the semiconductor substrate 20. The conductor layers 40 are arranged in a multi-layer on the insulating film 30. The conductor layers 40 include fuses 41.

[0023] The fuse 41 may melt when a current is passed through it. The fuse 41 may provide a function of cutting off an electrical path. The fuse 41 may have characteristics, such as a resistance value, that change when a current is passed through it. The fuse 41 may provide a memory function. The fuse 41 having a memory function becomes highly resistant when a current is passed through it. In other words, the fuse 41 becomes highly resistant after programming.

[0024] The fuse 41 that provides a memory function may be one in which a silicide layer undergoes SA due to Joule heat generated by current flow. SA is an abbreviation for Self-Agglomeration. SA (self-agglomeration) is a phenomenon in which metal elements aggregate at triple junctions at the boundaries of polysilicon crystals, for example. When SA occurs, a depleted area of ​​the silicide layer is formed on the polysilicon layer, and the fuse 41 becomes highly resistant.

[0025] The fuse 41 that provides the memory function may be one that generates EM by Joule heat generated by current flow. EM is an abbreviation for Electro Migration. Due to EM, the metal elements that make up the silicide layer are unevenly distributed on the anode side terminal. Also, impurities (dopants) in the polysilicon layer are unevenly distributed on the anode side. This creates an area of ​​polysilicon that is not doped with impurities, making the fuse 41 highly resistant.

[0026] The fuse 41 that provides the memory function may be one in which the polysilicon layer melts due to Joule heat generated by current flow. In the melted state, the metal elements in the silicide layer are ionized and unevenly distributed on the cathode side. By cooling faster than the metal begins to diffuse from near the cathode, a high-resistance region that does not contain metal is formed, and the fuse 41 becomes highly resistant. After rapid cooling, the area between the unevenly distributed metal and the anode is amorphous, and the area between the metal and the cathode is polycrystalline.

[0027] The fuse 41 includes a polysilicon layer 411. The polysilicon layer 411 may be a polysilicon film doped with impurities. The polysilicon layer 411 doped with impurities can be applied to fuses 41 that provide a cutoff function and various fuses 41 that provide a memory function. The polysilicon layer 411 may not be doped with n-type or p-type impurities. The non-doped polysilicon layer 411, together with a silicide layer 412 described below, can be applied to fuses 41 that provide a memory function, specifically, fuses 41 that have a configuration in which the polysilicon layer 411 melts.

[0028] 2, the fuse 41 may include a silicide layer 412 in addition to the polysilicon layer 411. The silicide layer 412 may be referred to as a salicide layer. The silicide layer 412 is disposed on the polysilicon layer 411. The silicide layer 412 is formed in a self-aligned manner on the polysilicon layer 411. The metal constituting the silicide layer 412 may be, for example, Co (cobalt). Instead of Co, Ti (titanium), Ni (nickel), W (tungsten), or the like may be used.

[0029] The fuse 41 has a main body 41a and terminals 41b and 41c. In the extension direction of the fuse 41, the fuse 41 has terminals 41b and 41c at both ends and has the main body 41a in the center. The terminal 41b is sometimes called a first terminal, and the terminal 41c is sometimes called a second terminal. In the example shown in FIG. 2, when electricity is applied to the fuse 41, a current flows in the direction shown by the dashed arrow in FIG. 2. The current flows from the terminal 41b to the terminal 41c. The terminal 41b is sometimes called an anode, and the terminal 41c is sometimes called a cathode.

[0030] The length of the fuse 41 in a direction perpendicular to the extending direction, i.e., the width, is narrower in the main body 41a than the terminals 41b and 41c. The main body 41a connects the terminals 41b and 41c. The main body 41a generates heat when electricity is applied. In a configuration in which the fuse 41 provides a cutoff function, the main body 41a melts when electricity is applied. For this reason, the main body 41a may be referred to as a melting portion, a cutting portion, or the like. In the example shown in FIG. 1 and FIG. 2, the fuse 41 extends in the X direction. The length of the fuse 41 in a direction perpendicular to the extending direction, i.e., the width, is narrower in the main body 41a than the terminals 41b and 41c.

[0031] The fuse 41 is disposed on the region 222 of the semiconductor layer 22 in a plan view in the Z direction. At least the main body 41a of the fuse 41 is disposed directly above the region 222. The fuse 41 is disposed on the region 222 via a base insulating film. The fuse 41 may be electrically connected to an element formed in the region 221. The fuse 41 may be provided in a path that electrically connects the elements to each other. The fuse 41 may be provided in a path that electrically connects the element and a circuit disposed on the semiconductor substrate 20.

[0032] The conductor layer 40 includes a conductor layer provided separately from the fuse 41. The conductor layer 40 includes a conductor layer arranged in a layer above the fuse 41. The conductor layer 40 includes a conductor layer connected to the fuse 41 via the contact 50. The conductor layer 40 includes a layer that provides a wiring function as a conductor layer arranged in a layer above the fuse 41 and connected to the fuse 41 via the contact 50. The layer that provides the wiring function electrically connects the fuse 41 to other circuits.

[0033] The conductor layer 40 is disposed above the fuse 41 and includes a layer that provides a heat dissipation function as a conductor layer connected to the fuse 41 via the contact 50. The layer that provides the heat dissipation function dissipates heat generated by passing a current through the fuse 41. The layer that provides the heat dissipation function reduces the effect of heat on the layer that provides the wiring function, for example, by functioning as a thermal mass. The area of ​​the layer that provides the heat dissipation function is set so that the fuse 41 changes in characteristics or melts when a current is passed through the fuse 41, and the layer that provides the wiring function does not melt. The area of ​​the layer that provides the heat dissipation function is larger than a predetermined area required for connection with the contact 50. The layer that provides the heat dissipation function may provide a wiring function. In other words, it may also serve as a layer that provides a wiring function. The layer that provides the heat dissipation function may provide only the heat dissipation function without providing a wiring function.

[0034] The other circuit, which is a circuit provided separately from the fuse 41, may include an element formed in the region 221. The other circuit may include a conductor layer provided separately from the layer providing the wiring function and the layer providing the heat dissipation function. The arrangement of the conductor layer 40, particularly the arrangement of the layer providing the wiring function and the layer providing the heat dissipation function, will be described later.

[0035] As described above, a portion of the conductor layer 40 including the fuse 41 is configured to include a polysilicon layer. Another portion of the conductor layer 40, for example, the conductor layer 40 above the fuse 41, is formed using a metal material having good conductivity, such as Al (aluminum) or Cu (copper). In this embodiment, the conductor layer 40 above the fuse 41 is formed using an Al-based material.

[0036] The contact 50 connects between layers. The contact 50 may connect between the conductor layers 40. The contact 50 may connect between an element formed in the semiconductor layer 22 and the conductor layer 40. The contact 50 may be referred to as a connection portion, an interlayer connection portion, a contact plug, or the like. The contact 50 is formed from a high melting point metal such as W. The contact 50 extends in the Z direction.

[0037] 2, the contact 50 includes at least a contact 51 that connects the first conductor layer 40 including the fuse 41 to the second conductor layer 40 above it. The contact 50 may include a contact 52 that connects the second conductor layer 40 to the third conductor layer 40. The contact 50 may include a contact 53 that connects the conductor layer 40 to an element.

[0038] <Thermal effects of fuses> FIG. 3 is a plan view showing a reference example of a semiconductor device. FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 3. In the reference example, the reference numerals of elements related to this embodiment are followed by the suffix "r". The semiconductor device 10r of the reference example is different from the semiconductor device 10 according to this embodiment in that the conductor layer 40r does not include a layer that provides a heat dissipation function. The other configurations are the same as those of the semiconductor device 10 shown in FIGS. 1 and 2.

[0039] The conductor layer 40r includes a fuse 41r and a wiring layer 42r. The fuse 41r is disposed on the region 222r of the semiconductor layer 22r. The wiring layer 42r includes a wiring layer 421r disposed in the second layer and a wiring layer 422r disposed in the third layer. The wiring layer 421r has a predetermined area required for connection with the contact 50r. The wiring layer 421r provides a connection function and does not provide a heat dissipation function. The wiring layer 421r is connected to the fuse 41r via the contact 51r. The wiring layer 422r is connected to the wiring layer 421r via the contact 52r. The wiring layer 422r on the terminal portion 41cr side is connected to an element, for example, an anode of a diode, via the contact 52r, the other circuit wiring layer 44r, and the contact 53r. In the reference example, a current flows from the terminal portion 41br to the terminal portion 41cr, similar to the configuration shown in FIG. 2.

[0040] 5 and 6 show the results of a thermal simulation. FIG. 5 and FIG. 6 show the effect of heat generated by energizing the fuse 41r on the semiconductor layer 22r. FIG. 5 shows the results of a configuration having the region 222r. FIG. 6 shows the results of a configuration having no region 222r. Comparing FIG. 5 and FIG. 6, it is clear that heat generated by energizing the fuse 41r is trapped in the region 222r. The insulating material, such as SiO2, that constitutes the insulating layer 21 and the insulating isolation trench 24r has low thermal conductivity. For this reason, heat is trapped in the region 222r as shown in FIG. 5.

[0041] 7 shows the results of a thermal simulation of the reference example shown in FIG. 4. When a current is applied to the fuse 41r, the fuse 41r generates heat. When a current is applied, the fuse 41r mainly generates heat in the main body 41ar. As described above, heat is trapped in the region 222r of the semiconductor layer 22r, so the heat of the fuse 41r is easily transferred to the conductor layer 40r located above the fuse 41r. The heat of the fuse 41r has a large effect on the conductor layer 40r located above the fuse 41r.

[0042] The heat of the fuse 41r is transferred to the wiring layer 42r through the contact 50r and the like. The heat is transferred more easily to the cathode side than to the anode side. The heat is transferred to the wiring layer 421r through the terminal portion 41cr on the cathode side, the contact 51r and the like. Furthermore, the heat is transferred to the wiring layer 422r through the contact 52r and the like. Therefore, there is a risk that the fuse 41r cannot perform the desired function. For example, there is a risk that the wiring layer 42r melts before the fuse 41r melts, which causes the fuse 41r not to melt or to melt later than the desired timing. For example, there is a risk that the characteristics of the fuse 41r do not change and the fuse 41r cannot be programmed, or the programmed state of the fuse 41r cannot be read.

[0043] <Arrangement of conductor layers and effect of heat dissipation layers> The conductor layer 40 may include a wiring layer 42 as a layer that provides a wiring function, as shown in, for example, FIGS. 1 and 2. The conductor layer 40 may include a heat dissipation layer 43 as a layer that provides a heat dissipation function. The heat dissipation layer 43 may include a heat dissipation layer 431 provided separately from the wiring layer 42. In this manner, a layer that provides a wiring function and a layer that provides a heat dissipation function may be provided separately. The heat dissipation layer 431 is provided in a layer separate from the wiring layer 42, and corresponds to a separate layer connected to the wiring layer 42 via a contact 50. The heat dissipation layer 431 corresponds to a common layer that provides a wiring function in addition to a heat dissipation function.

[0044] As shown in FIG. 2, a heat dissipation layer 431 may be disposed in the second layer, and a wiring layer 42 may be disposed in the third layer. One of the heat dissipation layers 431 is connected to the terminal portion 41b of the fuse 41 via a contact 51. The other of the heat dissipation layers 431 is connected to the terminal portion 41c of the fuse 41 via a contact 51. The wiring layer 42 on the terminal portion 41b side is connected to the heat dissipation layer 431 via a contact 52. The wiring layer 42 on the terminal portion 41c side is connected to the heat dissipation layer 431 via a contact 52. The heat dissipation layer 431 is disposed between the fuse 41 and the wiring layer 42 in the Z direction. The heat dissipation layer 431 mainly provides a heat dissipation function. The heat dissipation layer 431 also provides a function of electrically connecting the fuse 41 and the wiring layer 42, that is, a wiring function. The heat dissipation layer 431 has an area larger than a predetermined area required for connection with the contact 50.

[0045] A part of the heat dissipation layer 431 is arranged so as to overlap the corresponding terminal portion 41b, 41c of the fuse 41 in a plan view. As illustrated in FIG. 2, the heat dissipation layer 431 may be arranged so as not to overlap the main body portion 41a. The heat dissipation layer 431 extends in a direction away from the fuse 41. The heat dissipation layer 431 may be provided to extend in the X direction so as to cross one of the insulation isolation trenches 24. The wiring layer 42 may be provided to extend in the X direction so as to cross one of the insulation isolation trenches 24. In the X direction, the wiring layer 42 is longer than the heat dissipation layer 431.

[0046] The wiring layer 42 is connected to another circuit. The wiring layer 42 on the terminal portion 41c side may be electrically connected to another circuit wiring layer 44 constituting the other circuit. The wiring layer 42 is connected to the other circuit wiring layer 44 via a contact 52. The other circuit wiring layer 44 is connected to an element formed in the region 221, for example, an anode of a diode, via a contact 53. When a current is applied to the fuse 41, a current flows from the terminal portion 41b to the terminal portion 41c.

[0047] FIG. 8 shows a thermal simulation result of the semiconductor device 10 shown in FIG. 2. FIG. 8 corresponds to FIG. 7. When a current is applied to the fuse 41, the fuse 41 generates heat. When a current is applied, the fuse 41 generates heat mainly in the main body portion 41a. Since heat is trapped in the region 222 of the semiconductor layer 22, the heat of the fuse 41 is easily transferred to the conductor layer 40 located above the fuse 41. The heat is easily transferred to the terminal portion 41c side in the above-mentioned current flow. The heat is transferred to the heat dissipation layer 431 through the contact 51 or the like. The heat dissipation layer 431 functions as a thermal mass. The area of ​​the heat dissipation layer 431 is set so that the fuse 41 does not change in characteristics or melt when a current is applied to the fuse 41, and the layer providing the wiring function does not melt. This can reduce the effect of heat on the layer providing the wiring function. For example, the temperature of the wiring layer 42 can be lowered. In addition, the temperature of the heat dissipation layer 431 itself, which provides the wiring function, can be lowered.

[0048] FIG. 9 is a cross-sectional view showing another example of the semiconductor device 10. FIG. 9 corresponds to FIG. 2. The conductor layer 40 may have a heat dissipation layer 43 only on one of the terminals 41b and 41c. The conductor layer 40 may have a heat dissipation layer 43 only on the terminal side of the terminals 41b and 41c where the temperature becomes higher due to the current passing through the fuse 41. The conductor layer 40 may have a heat dissipation layer 43 only on the wiring layer 42 side where the influence of heat due to the current passing through the fuse 41 is large. In the example shown in FIG. 9, the heat dissipation layer 431 is provided only on the terminal 41c side of the cathode. The wiring layer 42 on the terminal 41b side includes a wiring layer 421 arranged in the second layer instead of the heat dissipation layer 43 and a wiring layer 422 arranged in the third layer. The area of ​​the heat dissipation layer 431 is larger than the area of ​​the wiring layer 421 on the anode side. By providing heat dissipation layer 431 on the side of cathode terminal portion 41c where the temperature becomes high, the influence of heat on the layer that provides the wiring function can be reduced.

[0049] FIG. 10 is a plan view showing another example of the semiconductor device 10. FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. 10. The heat dissipation layer 43 may extend toward the body portion 41a of the fuse 41 in a plan view. The heat dissipation layer 43 may be disposed so as to overlap a part of the body portion 41a in a plan view. As in the example shown in FIG. 9, the conductor layer 40 has a heat dissipation layer 431 on the terminal portion 41c side. The heat dissipation layer 431 extends in the X direction. The heat dissipation layer 431 extends in a direction away from the fuse 41. The heat dissipation layer 431 extends from the connection portion with the contact 50 toward the body portion 41a.

[0050] Heat dissipation layer 431 is arranged so as not to overlap the central portion of main body 41a in plan view, but to overlap end portions of main body 41a. The central portion is a portion of main body 41a within a predetermined range including the central position in the extension direction. The central portion includes the portion of fuse 41 where the temperature becomes highest when electricity is applied. The end portions are the portions of main body 41a between the central portion and terminal portions 41b, 41c. With the above configuration, the area of ​​heat dissipation layer 431 can be increased without preventing the central portion of fuse 41 from rising to a predetermined temperature when electricity is applied.

[0051] FIG. 12 is a plan view showing another example of the semiconductor device 10. FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. 12. The conductor layer 40 may include a heat dissipation layer 432 that does not provide a wiring function and provides only a heat dissipation function as a heat dissipation layer 43 provided separately from the wiring layer 42. In the example shown in FIG. 13, the heat dissipation layer 432 is provided in the third layer. The wiring layer 42 arranged in the second layer is connected to the terminal portion 41c of the fuse 41 via the contact 51. The heat dissipation layer 432 is connected to the wiring layer 42 via the contact 52. The heat dissipation layer 432 is arranged in a layer separate from the wiring layer 42 and corresponds to another layer connected to the wiring layer 42 via the contact 50.

[0052] The heat dissipation layer 432 extends in the X direction. Like the heat dissipation layer 431 illustrated in FIG. 11, the heat dissipation layer 432 extends in a direction away from the fuse 41. The heat dissipation layer 432 extends from the connection portion with the contact 50 toward the main body portion 41a. The heat dissipation layer 432 is disposed so as not to overlap with the center portion of the main body portion 41a in a plan view, but to overlap with an end portion of the main body portion 41a. The length of the heat dissipation layer 432 in the extension direction, i.e., the length in the X direction, is longer than the length of the wiring layer 42 in the X direction.

[0053] FIG. 14 is a plan view showing another example of the semiconductor device 10. The heat dissipation layer 431 may have a length in a direction perpendicular to the extending direction, that is, a width, longer than the wiring layer 42. In the example shown in FIG. 14, the heat dissipation layer 431 is provided on the terminal portion 41c side of the cathode. The conductor layer 40 has the heat dissipation layer 431 in the second layer and the wiring layer 42 in the third layer. The length in the Y direction of the heat dissipation layer 431 is longer than the length in the Y direction of the wiring layer 42 connected to the heat dissipation layer 431 via the contact 50. Although not shown, the length in the Y direction of the heat dissipation layer 432 arranged in the third layer may be longer than the length in the Y direction of the wiring layer 42 arranged in the second layer.

[0054] FIG. 15 is a plan view showing another example of the semiconductor device 10. FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. 15. The heat dissipation layer 43 may include a heat dissipation layer 433 that provides a wiring function in addition to the heat dissipation function. The heat dissipation layer 433 serves both as the heat dissipation layer 43 and the wiring layer 42. The heat dissipation layer 433 corresponds to a common layer that provides two functions, that is, the heat dissipation function and the wiring function. The heat dissipation layer 433 is disposed on the second layer of the conductor layer 40. The heat dissipation layer 433 is connected to the cathode terminal portion 41c via the contact 51. The heat dissipation layer 433 is connected to an element in the region 221, for example, an anode of a diode, via the contact 53. The heat dissipation layer 433 electrically connects the fuse 41 to another circuit. The wiring layer 42 is not connected to the heat dissipation layer 433.

[0055] The heat dissipation layer 433 extends in the X direction. The heat dissipation layer 433 extends in a direction away from the fuse 41. The heat dissipation layer 433 extends from a connection portion with the contact 50 toward the main body portion 41a. The heat dissipation layer 433 is disposed so as to not overlap a central portion of the main body portion 41a in a plan view, but to overlap an end portion of the main body portion 41a.

[0056] FIG. 17 is a plan view showing another example of the semiconductor device 10. FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. 17. The conductor layer 40 may include, as the heat dissipation layer 43, a heat dissipation layer 433 also serving as the wiring layer 42, and a heat dissipation layer 432 connected to the heat dissipation layer 433 via a contact 50. As in the example shown in FIG. 16, the heat dissipation layer 433 is connected to the cathode terminal portion 41c via a contact 51. The heat dissipation layer 433 is connected to an element in the region 221, for example, an anode of a diode, via a contact 53. The heat dissipation layer 432 is disposed on the upper layer of the heat dissipation layer 433. The heat dissipation layer 432 is connected to the heat dissipation layer 433 via a contact 52. The area of ​​the heat dissipation layer 432 is larger than the area of ​​the heat dissipation layer 433.

[0057] <Summary of the First Embodiment> According to this embodiment, the semiconductor device 10 includes a semiconductor substrate 20, a conductor layer 40, and a contact 50. The semiconductor substrate 20 includes an insulating layer 21, a semiconductor layer 22 disposed on the insulating layer 21, and an isolation trench 24. The conductor layer 40 is disposed in multiple layers on the semiconductor layer 22. The isolation trenches 24 are arranged side by side in a predetermined direction (X direction), and the semiconductor layer 22 has a region 222 sandwiched between the isolation trenches arranged in the predetermined direction. The conductor layer 40 includes a polysilicon layer 411, and includes a fuse 41 disposed on the region 222.

[0058] Conductor layer 40 is disposed in a layer above fuse 41 and includes a layer providing a wiring function and a layer providing a heat dissipation function as conductor layers connected to fuse 41 via contacts 50. The layer providing the wiring function electrically connects fuse 41 to other circuits. The layer providing the heat dissipation function dissipates heat generated by passing electricity through fuse 41. Conductor layer 40 includes, for example, wiring layer 42 as a layer providing a wiring function, and heat dissipation layer 43 as a layer providing a heat dissipation function.

[0059] In a configuration in which the fuse 41 is disposed on the region 222 sandwiched by the insulating isolation trenches 24, as shown in FIG. 8 and the like, heat generated by energizing the fuse 41 is trapped in the region 222. Therefore, the heat is easily transferred to the conductor layer 40 located above the fuse 41. Therefore, the layer providing the wiring function is easily affected by the heat generated by the fuse 41. According to this embodiment, the conductor layer 40 includes a layer providing a heat dissipation function. The layer providing the heat dissipation function functions as a thermal mass. Therefore, the effect of heat on the layer providing the wiring function (conductor layer) can be reduced. For example, it is possible to prevent the layer providing the wiring function from melting due to the heat generated by the fuse 41, which causes the fuse 41 to be unable to perform the desired function.

[0060] For example, a layer providing an interconnect function melts before fuse 41 melts, which prevents fuse 41 from melting or prevents fuse 41 from melting at a later time than desired. For example, it is possible to prevent a state in which the characteristics of fuse 41 do not change and programming is not possible or the programmed state of fuse 41 cannot be read out due to melting of a layer providing an interconnect function.

[0061] The area of ​​the layer providing the heat dissipation function is preferably set so that the fuse 41 does not change in characteristics or melt when a current is passed through the fuse 41, and the layer providing the wiring function does not melt. This prevents the layer providing the wiring function from melting, allowing the fuse 41 to perform the desired function, such as a memory function or a cutoff function. When the layer providing the heat dissipation function also provides a wiring function, having the above area reduces the effect of heat on itself, and can, for example, prevent itself from melting.

[0062] For example, when the fuse 41 provides a cutoff function, the area of ​​the layer providing the heat dissipation function should be set so that the polysilicon layer 411 and the silicide layer 412 melt and the layer providing the wiring function does not melt due to heat generated by the fuse 41. Polysilicon melts at approximately 1400°C or higher. When the temperature exceeds 1600°C, insulating films such as silicon oxide films and nitride films and high melting point metals constituting the contacts 50 melt. Al constituting the layer providing the wiring function melts at approximately 660°C or higher. The area of ​​the layer providing the heat dissipation function should be set so that the temperature of the heat generating portion (main body 41a) of the fuse 41 reaches 1400 to 1600°C, causing the fuse 41 to melt, and the temperature of the layer providing the wiring function is less than 660°C.

[0063] When providing a memory function using SA, the area of ​​the layer providing the heat dissipation function may be set so that the temperature of the fuse 41 is higher than the silicide formation temperature and the temperature of the layer providing the wiring function is less than 660° C. When providing a memory function using EM, the area of ​​the layer providing the heat dissipation function may be set so that the temperature of the fuse 41 is equal to or higher than the temperature at which EM is generated and the temperature of the layer providing the wiring function is less than 660° C. When providing a memory function using melting of the polysilicon layer 411, the area of ​​the layer providing the heat dissipation function may be set so that the temperature of the fuse 41 is equal to or higher than the melting temperature of the polysilicon layer 411 and the temperature of the layer providing the wiring function is less than 660° C.

[0064] The layer providing the heat dissipation function may be provided in a layer separate from the wiring layer 42, which is a layer providing the wiring function, and may include another layer (heat dissipation layers 431, 432) connected to the wiring layer 42 via a contact 50. By providing the heat dissipation layers 431, 432 separately from the wiring layer 42, the heat dissipation design becomes easier. In addition, the heat dissipation layers 431, 432 function as a thermal mass, thereby reducing the effect of heat on the wiring layer 42.

[0065] The heat dissipation layer 431 may be provided between the fuse 41 and the wiring layer 42. The heat dissipation layer 431 is closer to the fuse 41 than the wiring layer 42. The heat generated by the fuse 41 is transferred to the heat dissipation layer 431 via the contacts 50 or the like before being transferred to the wiring layer 42. Therefore, the influence of heat on the wiring layer 42 can be effectively reduced.

[0066] The heat dissipation layer 432 may be provided in an upper layer than the wiring layer 42. Heat generated by the fuse 41 is transferred to the heat dissipation layer 432 via the wiring layer 42. The upper heat dissipation layer 432 functions as a thermal mass, so that the effect of heat on the wiring layer 42 can be reduced. Furthermore, by providing the heat dissipation layer 432 in an upper layer, the degree of freedom in the layout of the wiring layer 42, that is, the degree of freedom in wiring, can be improved.

[0067] The separate layers (heat dissipation layers 431, 432) may be configured such that at least one of the length in the extension direction and the width in the direction perpendicular to the extension direction is longer than the wiring layer 42. This can improve heat dissipation.

[0068] The conductor layer 40 may include a common layer (heat dissipation layers 431, 433) that provides a wiring function in addition to a heat dissipation function. The heat dissipation layer 43 may include heat dissipation layers 431, 433 that also provide a wiring function. The common layer reduces the effect of heat on the common layer and maintains the wiring function. This makes it possible to prevent the fuse 41 from being unable to perform the desired function.

[0069] The layer providing the wiring function may include a wiring layer 42 connected to a common layer (heat dissipation layer 431) via a contact 50. The common layer can reduce the effect of heat on the wiring layer.

[0070] The layer providing the heat dissipation function may include another layer (heat dissipation layer 432) disposed on a layer separate from the common layer (heat dissipation layer 433) and connected to the common layer via contacts 50. The heat dissipation function of the common layer and the other layer can reduce the effect of heat on the common layer. Since the other layer assumes part of the heat dissipation function, the degree of freedom of wiring of the common layer can be improved.

[0071] The separate layer may be provided above the common layer. This allows for improved wiring flexibility. The area of ​​the separate layer may be larger than the area of ​​the common layer. By improving the heat dissipation function of the separate layer, the effect of heat on the common layer can be further reduced.

[0072] The fuse 41 may have an anode terminal 41b and a cathode terminal 41c as terminals to which the contacts 50 are connected, and a current may flow from the terminal 41b to the terminal 41c when energized. In this configuration, a layer providing a heat dissipation function may be provided at least on the cathode terminal 41c side. By providing a layer providing a heat dissipation function (heat dissipation layers 431, 432, 433) on the cathode terminal 41c side where the temperature becomes high, the effect of heat on the layer providing the wiring function can be reduced.

[0073] (Other embodiments) The disclosure in this specification and drawings, etc. is not limited to the exemplified embodiments. The disclosure includes the exemplified embodiments and modifications by those skilled in the art based thereon. For example, the disclosure is not limited to the combination of parts and / or elements shown in the embodiments. The disclosure can be implemented by various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure includes the omission of parts and / or elements of the embodiments. The disclosure includes the substitution or combination of parts and / or elements between one embodiment and another embodiment. The disclosed technical scope is not limited to the description of the embodiments. Some disclosed technical scopes are indicated by the description of the claims, and should be interpreted as including all modifications within the meaning and scope equivalent to the description of the claims.

[0074] The disclosure in the specification and drawings is not limited by the claims. The disclosure in the specification and drawings includes the technical ideas described in the claims, and extends to more diverse and broader technical ideas than the technical ideas described in the claims. Therefore, various technical ideas can be extracted from the disclosure in the specification and drawings without being bound by the claims.

[0075] When an element or layer is referred to as being "on," "coupled," "connected," or "bonded," it may be directly coupled, connected, or bonded to another element or layer, and intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly coupled," "directly connected," or "directly bonded" to another element or layer, there are no intervening elements or layers. Other words used to describe relationships between elements should be construed in a similar manner (e.g., "between" vs. "directly between," "adjacent" vs. "directly adjacent," etc.). As used in this specification, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0076] Spatially relative terms such as "inside," "outside," "back," "bottom," "low," "top," "top," and the like are utilized herein to facilitate the description of the relationship of one element or feature to another element or feature as depicted in the figures. Spatially relative terms may be intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "directly below" other elements or features would be oriented "above" the other elements or features. Thus, the term "bottom" can encompass both an orientation of top and bottom. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used in this specification would be interpreted accordingly.

[0077] (Disclosure of technical ideas) This specification discloses multiple technical ideas described in the following multiple dependent claims. Some of the claims may be described in a multiple dependent form, where the subsequent claim alternatively refers to the preceding claim. Furthermore, some of the claims may be described in a multiple dependent form, where the subsequent claim alternatively refers to the preceding claim. The claims described in these multiple dependent forms define multiple technical ideas.

[0078] <Technical philosophy 1> a semiconductor substrate (20) having an insulating layer (21), a semiconductor layer (22) disposed on the insulating layer, and an insulating isolation trench (24) penetrating the semiconductor layer and reaching the insulating layer; A conductor layer (40) arranged in multiple layers on the semiconductor layer; A contact (50) for connecting between layers; Equipped with The semiconductor layer has a region (222) sandwiched between the insulating isolation trenches aligned in a predetermined direction, The conductor layer is a fuse (41) including a polysilicon layer (411) and disposed on the region; a layer (42) disposed in a layer above the fuse, connected to the fuse via the contact, and providing a wiring function for electrically connecting the fuse and other circuits; a layer (43) disposed in a layer above the fuse, connected to the fuse via the contact, and providing a heat dissipation function for heat generated by passing current through the fuse.

[0079] <Technical philosophy 2> A semiconductor device according to Technical Idea 1, in which the area of ​​the layer providing the heat dissipation function is set so that the fuse changes in characteristics or melts when current is passed through the fuse, and the layer providing the wiring function does not melt.

[0080] <Technical philosophy 3> The semiconductor device according to Technical Idea 1 or Technical Idea 2, wherein the layer providing the heat dissipation function is provided in a layer separate from a wiring layer (42) that provides the wiring function, and includes another layer (431, 432) connected to the wiring layer via the contact.

[0081] <Technical philosophy 4> The semiconductor device according to Technical Concept 3, wherein the separate layer is provided between the fuse and the wiring layer.

[0082] <Technical philosophy 5> The semiconductor device according to Technical Concept 3, wherein the separate layer is provided above the wiring layer.

[0083] <Technical philosophy 6> The semiconductor device according to any one of Technical Concepts 3 to 5, wherein at least one of a length in an extension direction and a width in a direction perpendicular to the extension direction of the other layer is longer than that of the wiring layer.

[0084] <Technical philosophy 7> The semiconductor device according to Technical Idea 1 or 2, wherein the conductor layer includes a common layer (431, 433) that provides the wiring function in addition to the heat dissipation function.

[0085] <Technical philosophy 8> The semiconductor device according to Technical Concept 7, wherein the layer providing the wiring function includes a wiring layer connected to the common layer via the contact.

[0086] <Technical philosophy 9> The semiconductor device described in Technical Idea 7, wherein the layer providing the heat dissipation function includes a separate layer (432) arranged in a layer separate from the common layer and connected to the common layer via the contact.

[0087] <Technical Thought 10> The semiconductor device according to Technical Concept 9, wherein the separate layer is provided above the common layer.

[0088] <Technical Thought 11> The semiconductor device according to Technical Idea 9 or Technical Idea 10, wherein the area of ​​the separate layer is larger than the area of ​​the common layer.

[0089] <Technical Thought 12> The fuse has an anode terminal portion (41b) and a cathode terminal portion (41c) as terminal portions to which the contacts are connected, and when energized, a current flows from the anode terminal portion to the cathode terminal portion, 12. The semiconductor device according to any one of Technical Concepts 1 to 11, wherein the layer providing a heat dissipation function is provided at least on the terminal portion side of the cathode. [Explanation of symbols]

[0090] 10...semiconductor device, 20...semiconductor substrate, 20a...one side, 20b...rear side, 21...insulating layer, 22...semiconductor layer, 221, 222...region, 23...support substrate, 24...insulating isolation trench, 30...insulating film, 40...conductor layer, 41...fuse, 41a...main body, 41b, 41c...terminal, 411...polysilicon layer, 412...silicide layer, 42, 421, 422...wiring layer, 43, 431, 432, 433...heat dissipation layer, 44...other circuit wiring layer, 50, 51, 52, 53...contact

Claims

1. A semiconductor substrate (20) having an insulating layer (21), a semiconductor layer (22) disposed on the insulating layer, and an insulating isolation trench (24) penetrating the semiconductor layer and reaching the insulating layer; A conductor layer (40) arranged in multiple layers on the semiconductor layer; A contact (50) for connecting between layers; Equipped with The semiconductor layer has a region (222) sandwiched between the insulating isolation trenches aligned in a predetermined direction, The conductor layer is a fuse (41) including a polysilicon layer (411) and disposed on said region; a layer (42) disposed in a layer above the fuse, connected to the fuse via the contact, and providing a wiring function for electrically connecting the fuse and other circuits; a layer (43) disposed in a layer above the fuse, connected to the fuse via the contact, and providing a heat dissipation function for heat generated by passing current through the fuse.

2. 2. The semiconductor device according to claim 1, wherein an area of ​​said layer providing said heat dissipation function is set so that said fuse changes characteristics or melts when a current is passed through said fuse, and said layer providing said wiring function does not melt.

3. 3. The semiconductor device according to claim 1, wherein the layer providing the heat dissipation function is provided in a layer separate from a wiring layer (42) that provides the wiring function, and includes another layer (431, 432) connected to the wiring layer via the contact.

4. 4. The semiconductor device according to claim 3, wherein the separate layer is provided between the fuse and the wiring layer.

5. The semiconductor device according to claim 3 , wherein the separate layer is provided above the wiring layer.

6. 4. The semiconductor device according to claim 3, wherein said another layer is longer than said wiring layer in at least one of a length in an extension direction and a width in a direction perpendicular to said extension direction.

7. 3. The semiconductor device according to claim 1, wherein the conductor layers include a common layer (431, 433) that provides the wiring function in addition to the heat dissipation function.

8. 8. The semiconductor device according to claim 7, wherein said layer providing a wiring function includes a wiring layer connected to said common layer via said contact.

9. 8. The semiconductor device according to claim 7, wherein the layer providing the heat dissipation function includes a separate layer (432) disposed in a layer separate from the common layer and connected to the common layer via the contact.

10. The semiconductor device according to claim 9 , wherein the separate layer is provided above the common layer.

11. The semiconductor device according to claim 10 , wherein an area of ​​the separate layer is larger than an area of ​​the common layer.

12. The fuse has an anode terminal portion (41b) and a cathode terminal portion (41c) as terminal portions to which the contacts are connected, and when energized, a current flows from the anode terminal portion to the cathode terminal portion, 3. The semiconductor device according to claim 1, wherein the layer providing the heat dissipation function is provided at least on a terminal portion side of the cathode.

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