Driving device and semiconductor device

Abstract

To provide a method for controlling a driving device and a semiconductor device that can reduce switching loss of a low conduction loss semiconductor element.SOLUTION: A driving device comprises a control unit and a driving unit. The control unit controls the drive of a semiconductor element having a first gate electrode and a second gate electrode on the basis of a control signal. The driving unit outputs a first driving signal to the first gate electrode, and outputs a second driving signal to the second gate electrode. The first driving signal drives the first gate electrode at the on / off timing of the control signal. The second driving signal drives the second gate electrode at a timing earlier than the off timing of the control signal. The driving unit switches an output impedance according to the speed of the semiconductor element before outputting the first driving signal.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The embodiments relate to a drive device and a semiconductor device. [Background technology]

[0002] IGBTs (Insulated Gate Bipolar Transistors) are known as normally-off power control semiconductor elements capable of handling large power. Although such IGBTs can reduce losses during conduction, they have large losses during switching. There is a demand for a semiconductor element driver and a semiconductor device equipped with the driver that can reduce switching losses while maintaining low conduction losses. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2018-153007 A Summary of the Invention [Problem to be solved by the invention]

[0004] The embodiments provide a driving device and a semiconductor device that can reduce the switching loss of a semiconductor element with low conduction loss. [Means for solving the problem]

[0005] A driving device according to an embodiment includes a control unit that controls a semiconductor element having a first gate electrode and a second gate electrode based on a control signal having information regarding an on timing and an off timing of the semiconductor element, and a driving unit that generates a first driving signal that turns on the semiconductor element via the first gate electrode at the on timing and turns off the semiconductor element via the first gate electrode at the off timing, and a second driving signal that extracts minority carriers of the semiconductor element via the second gate electrode at a timing earlier than the off timing, to turn off the semiconductor element. The driving unit is capable of switching between a first output impedance when driving the first gate electrode and a second output impedance when driving the first gate electrode according to a switching speed of the semiconductor element, and switches to the first output impedance when the switching speed is faster than a predetermined value, and switches to the second output impedance lower than the first output impedance when the switching speed is slower than a predetermined value. [Brief description of the drawings]

[0006] [Figure 1] 1 is a schematic block diagram illustrating a power module according to a first embodiment. [Diagram 2] 4 is a schematic timing chart for explaining the operation of the drive device for the power module according to the first embodiment. [Diagram 3] 2 is a schematic cross-sectional view illustrating a switching element that is a part of the power module according to the first embodiment. FIG. [Figure 4] FIG. 2 is a schematic block diagram of a power conversion circuit. [Diagram 5] 5 is a schematic operational waveform diagram illustrating the operation of the power conversion circuit of FIG. 4; [Figure 6] FIG. 11 is a schematic block diagram illustrating a power module according to a second embodiment. [Figure 7] 10 is a schematic timing chart for explaining the operation of the drive device according to the second embodiment. [Figure 8] 11 is a schematic cross-sectional view illustrating a switching element that is a part of a power module according to a second embodiment. FIG. [Figure 9] 10 is a table for explaining a switching operation of a drive signal output by a drive device. FIG. [Figure 10] FIG. 11 is a schematic operational waveform diagram illustrating an example of an operation of the power module according to the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, the embodiments will be described with reference to the drawings. The same parts in the drawings are given the same numbers, and detailed descriptions thereof will be omitted as appropriate, and different parts will be described. Note that the drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as the actual ones. Even when the same parts are shown, the dimensions and ratios of each part may be different depending on the drawing.

[0008] (First embodiment) FIG. 1 is a schematic block diagram illustrating a power module according to the first embodiment. As shown in Fig. 1, a power module (semiconductor device) 10 according to this embodiment includes a switching element (semiconductor element) 20 and a driving device 30. The power module 10 has a plurality of terminals. The plurality of terminals includes a signal input terminal 11a, power supply terminals 11b and 11c, a ground terminal 11d, a collector output terminal 11e, an emitter output terminal 11f, a collector detection terminal 11g, an emitter detection terminal 11h, a current detection terminal 11k, and a voltage detection terminal 11m. The power module 10 has a case 12, and the switching element 20 and the driving device 30 are housed in the case 12. The plurality of terminals are arranged on the case 12, for example.

[0009] The power module 10 is connected to, for example, a control device via a signal input terminal 11a. For example, a control signal Dg generated by the control device is input to the signal input terminal 11a. The control signal Dg controls the drive device 30 to drive the switching element 20. The control signal Dg is, for example, a gate signal for switching the switching element 20.

[0010] The control signal Dg is, for example, a signal having a pulse waveform, as described later in relation to Fig. 2. The control signal Dg is not limited to a pulse signal, and may be a digital signal or an analog signal having on and off phase information, as long as it can set the on and off timings of the switching element 20.

[0011] The power supply terminals 11b and 11c are connected to a power supply for operating the drive device 30. In this example, the power supply terminal 11b is supplied with a low voltage power supply for the control unit 40 of the drive device 30, and the power supply terminal 11c is supplied with a high voltage power supply for the drive unit of the drive device 30. The ground terminal 11d is connected to, for example, the ground potential of the power supply.

[0012] The collector output terminal 11e and the emitter output terminal 11f are connected to the collector electrode C1 and the emitter electrode E1 of the switching element 20, respectively. The collector electrode C1 is connected to an external circuit via the collector output terminal 11e. The emitter electrode E1 is connected to an external circuit via the emitter output terminal 11f. The external circuit is, for example, a DC power line constituting a power conversion circuit or other switching elements. The collector detection terminal 11g and the emitter detection terminal 11h are connected to the collector electrode C1 and the emitter electrode E1, respectively. The collector detection terminal 11g detects and outputs the voltage of the collector electrode C1. The emitter detection terminal 11h detects and outputs the voltage of the emitter electrode E1.

[0013] In this example, the voltage of the collector electrode C1 and the voltage of the emitter electrode E1 detected at the collector detection terminal 11g and the emitter detection terminal 11h, respectively, are input to a voltage detector 2. The voltage detector 2 detects and outputs a voltage difference VCE between the voltage of the collector electrode C1 and the voltage of the emitter electrode E1, and outputs the voltage difference VCE to a voltage detection terminal 11m. In addition, the current detector 1 is connected to the emitter output terminal 11f and is provided to detect a current IE flowing between the main electrodes of the switching element 20. The current detector 1 outputs the detected current value to a current detection terminal 11k.

[0014] The driving device 30 sets conditions for driving the switching element 20 based on the current IE input to the current detection terminal 11k and the voltage difference VCE input to the voltage detection terminal 11m. The driving device 30 drives the switching element 20 in accordance with the set conditions.

[0015] The driving device 30 has output terminals O1 and O2. The switching element 20 has a first gate electrode G1 and a second gate electrode G2. In the power module 10, the output terminal O1 is connected to the first gate electrode G1, and the output terminal O2 is connected to the second gate electrode G2.

[0016] The output terminal O1 outputs the first drive signal D1 or the second drive signal D2 to the first gate electrode G1.

[0017] When the output terminal O1 outputs the first drive signal D1 to the first gate electrode G1, the output terminal O2 outputs the second drive signal D2 to the second gate electrode G2. When the output terminal O1 outputs the second drive signal D2 to the first gate electrode G1, the output terminal O2 outputs the first drive signal D1 to the second gate electrode G2.

[0018] The first drive signal D1 transitions to a voltage sufficiently higher than the threshold voltage of the switching element 20 in response to the ON timing of the control signal Dg. A voltage sufficiently higher than the threshold voltage of the switching element 20 is called an ON voltage VON. The ON voltage VON is, for example, about +15V.

[0019] The first drive signal D1 transitions to a voltage sufficiently lower than the threshold voltage of the switching element 20 in response to the timing at which the control signal Dg is turned off. A voltage sufficiently lower than the threshold voltage of the switching element 20 is called an off voltage VOFF. The off voltage VOFF is, for example, about −15 V.

[0020] The driving device 30 changes the output impedance during a period in which the switching element 20 is turned on, and outputs a first driving signal D1 to the switching element 20. For example, the driving device 30 changes the output impedance in accordance with at least one of the values ​​of the voltage and the current output by the switching element 20.

[0021] For example, if the switching speed of the switching element 20 is slower than a desired value during the turn-on period of the switching element 20, the driver 30 outputs the first drive signal D1 with a lower output impedance. If the switching speed of the switching element 20 is faster than a desired value, the driver 30 outputs the first drive signal D1 with an increased output impedance.

[0022] The driving device 30 changes the output impedance during a period in which the switching element 20 is turned off, and outputs a first driving signal D1 to the switching element 20. For example, the driving device 30 changes the output impedance in accordance with at least one of the values ​​of the voltage and the current output by the switching element 20.

[0023] For example, if the switching speed of the switching element 20 is slower than a desired value during the turn-off period of the switching element 20, the drive device 30 outputs the first drive signal D1 with a lower output impedance. If the switching speed of the switching element 20 is faster than a desired value, the drive device 30 outputs the first drive signal D1 with an increased output impedance.

[0024] In this way, the driving device 30 drives the switching element 20 by changing the output impedance according to the switching speed of the switching element 20. This reduces switching loss and prevents the switching element 20 from being made faster than necessary, thereby suppressing the occurrence of surge voltages, conduction noise, radiation noise, and the like. Hereinafter, driving the switching element 20 by changing the output impedance of the driving device 30 during the turn-on and turn-off periods of the switching element 20 may be referred to as "active driving."

[0025] The second drive signal D2 transitions to the on voltage VON in response to the timing when the control signal Dg turns on. The second drive signal D2 transitions to the off voltage VOFF earlier than the timing when the control signal Dg turns off. The transition of the second drive signal D2 to the on voltage VON can also be after a predetermined delay time from the timing when the control signal Dg turns on.

[0026] The driving device 30 outputs the first driving signal D1 to the first gate electrode G1 and the second driving signal D2 to the second gate electrode G2, thereby enabling the switching element 20 to be quickly turned off. The driving device 30 outputs the first driving signal D1 to the second gate electrode G2 and the second driving signal D2 to the first gate electrode G1, thereby enabling the switching element 20 to be quickly turned off. Driving the switching element 20 using the second driving signal D2 that transitions to the off voltage VOFF in this manner before the switching element 20 enters the turn-off period is sometimes referred to as "double gate driving."

[0027] The output terminals O1, O2 periodically switch between the first drive signal D1 and the second drive signal D2, for example. The period for switching the output of the first drive signal D1 and the second drive signal D2 is set in advance, for example, in the drive device 30. By switching between the outputs of the first drive signal D1 and the second drive signal D2, the stress caused by the voltage applied to the first gate electrode G1 and the second gate electrode G2 can be shared almost equally, and the switching element 20 can be operated while maintaining high reliability.

[0028] The output of the first drive signal D1 and the second drive signal D2 may be switched by a signal supplied from outside the drive device 30, regardless of the settings in the drive device 30. Furthermore, the output of the first drive signal D1 and the second drive signal D2 is not limited to being switched at a constant cycle, and may be switched at any timing. Furthermore, the output of the first drive signal D1 and the second drive signal D2 may be switched as described above, but does not necessarily have to be switched.

[0029] The configuration of the driving device 30 will be described. 1, the drive device 30 includes a control unit 40, a first drive unit 50, and a second drive unit 60. Preferably, the drive device 30 further includes a switching unit .

[0030] The control unit 40 is connected to the signal input terminal 11a and operates in accordance with a control signal Dg input to the signal input terminal 11a.

[0031] The control unit 40 has an active driving table 44. Data for active driving is set in the active driving table 44. For example, data on a target value of a time change in a collector-emitter voltage difference VCE and a target value of a time change in a current IE flowing through the switching element 20 is set in the active driving table 44. The data on the target values ​​of the voltage difference VCE and the current IE are set for each of the turn-on period and the turn-off period of the switching element 20.

[0032] The control unit 40 sequentially inputs data on the voltage difference VCE and data on the current IE. The control unit 40 compares the target values ​​of the voltage difference VCE and the current IE in the active drive table 44 with the actual measured values. If the actual measured values ​​are smaller than the target values, the control unit 40 commands the first drive unit 50 and the second drive unit 60 to lower the output impedance. If the actual measured values ​​are larger than the target values, the control unit 40 commands the first drive unit 50 and the second drive unit 60 to increase the output impedance.

[0033] More specifically, the control unit 40 determines whether the switching element 20 is in a turn-on period or a turn-off period based on the control signal Dg. When the control unit 40 determines that the switching element 20 is in a turn-on period, it compares a target value for turn-on from the active drive table 44 with an actual measurement value, and outputs a command for controlling the output impedance to the first drive unit 50. When the control unit 40 determines that the switching element 20 is in a turn-off period, it compares a target value for turn-off from the active drive table 44 with an actual measurement value, and outputs a command for controlling the output impedance to the second drive unit 60.

[0034] The first driving section 50 has a first active driving control section 52 and an on-time timing control section 54. The first active driving control section 52 and the on-time timing control section 54 are connected to the control section 40. The first active driving control section 52 receives setting data for the output impedance during the turn-on period from the control section 40 and sets the output impedance. The first active driving control section 52 outputs the driving signal D1 with the set output impedance, for example, to the output terminal O1.

[0035] The second drive section 60 has a second active drive control section 62 and an off-timing control section 64. The second active drive control section 62 and the off-timing control section 64 are connected to the control section 40. The active drive control section 62 receives setting data for the output impedance during the turn-off period of the switching element 20 and sets the output impedance. The second active drive control section 62 outputs the drive signal D1 with the set output impedance, for example, to the output terminal O1.

[0036] For example, the first active drive control unit 52 has a plurality of resistive elements 52a and 52b at the output end. For example, the resistive element 52b is connected in series with the switch element 53, and the series circuit of the resistive element 52b and the switch element 53 is connected in parallel with the resistive element 52a. In the first active drive control unit 52, the output impedance of the first active drive control unit 52 can be switched by opening and closing the switch element 53. For example, when the switch element 53 is open, the output impedance of the first active drive control unit 52 is determined by the resistance value of the resistive element 52a. For example, when the switch element 53 is closed, the output impedance of the first active drive control unit 52 is determined by the resistance value of the resistive elements 52a and 52b when connected in parallel.

[0037] The second active drive control section 62 has a plurality of resistive elements 62a, 62b at the output end. For example, the resistive element 62b is connected in series with the switch element 63, and the series circuit of the resistive element 62b and the switch element 63 is connected in parallel with the resistive element 62a. In the second active drive control section 62, the output impedance of the second active drive control section 62 can be switched by opening and closing the switch element 63. For example, when the switch element 63 is open, the output impedance of the second active drive control section 62 is determined by the resistance value of the resistive element 62a. For example, when the switch element 63 is closed, the output impedance of the second active drive control section 62 is determined by the resistance value of the resistive elements 62a, 62b when connected in parallel.

[0038] In the first active drive control section 52, a desired number of resistive elements are selected from the multiple resistive elements 52a, 52b based on the setting data of the output impedance, and are connected to obtain a desired combined resistance value. In the second active drive control section 62, a predetermined number of resistive elements are selected from the multiple resistive elements 62a, 62b based on the setting data of the output impedance, and are connected to obtain a predetermined combined resistance value. "Selecting" refers to closing or switching a circuit having the value or a predetermined circuit.

[0039] When the combined resistance value of the multiple resistance elements 52a, 52b connected together is large, the output impedance of the first active drive control unit 52 is large, and when the combined resistance value of the multiple resistance elements 52a, 52b is small, the output impedance of the first active drive control unit 52 is small. Similarly, when the combined resistance value of the multiple resistance elements 62a, 62b connected together is large, the output impedance of the second active drive control unit 62 is large, and when the combined resistance value of the multiple resistance elements 62a, 62b is small, the output impedance of the second active drive control unit 62 is small.

[0040] As long as the output impedance can be varied in each of the first active drive control section 52 and the second active drive control section 62, the configuration is not limited to the above. For example, a plurality of output buffer circuits that can be connected in parallel may be provided, and the output current capacity may be made variable by connecting in parallel the number of output buffer circuits according to the set value of the output impedance. Alternatively, the voltage of the power supply supplied to the output buffer circuit may be switched according to the set data of the output impedance.

[0041] The on-timing control section 54 and the off-timing control section 64 output the second drive signal D2. The timing at which the second drive signal D2 becomes the on voltage VON is set in advance, for example, in the on-timing control section 54. The timing at which the second drive signal D2 becomes the off voltage VOFF is set in advance, for example, in the off-timing control section 64.

[0042] The switching unit 70 inputs the first drive signal D1 output by the first active drive control unit 52 and the second active drive control unit 62. The switching unit 70 inputs the second drive signal D2 output by the off-time timing control unit 64. The switching unit 70 switches between the first drive signal D1 and the second drive signal D2 and outputs them from the output terminals O1, O2.

[0043] In this specific example, the timing of switching between the first drive signal D1 and the second drive signal D2 is set by a selection signal SG output from a gate selection section 42 provided in the control section 40. The switching section 70 switches between and outputs the first drive signal D1 and the second drive signal D2, for example, every time the selection signal SG, which is a binary signal, is inverted.

[0044] In this specific example, the switching unit 70 has two switching circuits 72 and 74. One switching circuit 72 has switches 72a and 72b. The switches 72a and 72b are configured such that when one closes a circuit, the other opens the circuit. The switches 74a and 74b are configured such that when one closes a circuit, the other opens the circuit.

[0045] When the selection signal SG is at H level, the switches 72a and 74a close the circuit, and the switches 72b and 74b open the circuit, causing the switching unit 70 to output the first drive signal D1 to the first gate electrode G1 through the output terminal O1 and output the second drive signal D2 to the second gate electrode G2 through the output terminal O2.

[0046] When the selection signal SG is at an L level, the switches 72a and 74a open the circuit, and the switches 72b and 74b close the circuit, causing the switching unit 70 to output the second drive signal D2 to the first gate electrode G1 through the output terminal O1, and output the first drive signal D1 to the second gate electrode G2 through the output terminal O2.

[0047] The operation of the drive device 30 of the power module 10 according to this embodiment will be described. FIG. 2 is a schematic timing chart for explaining the operation of the driving device for the power module according to the first embodiment. 2 shows the change over time of the control signal Dg input to the drive device 30. The period during which the voltage VDg of the control signal Dg is at H level is the period during which the switching element 20 is turned on. The period during which the voltage VDg of the control signal Dg is at L level is the period during which the switching element 20 is turned off. 2 shows the change over time of the voltage VD1 of the first drive signal D1. The voltage VD1 of the first drive signal D1 is applied between the first gate electrode G1 and the emitter electrode E1. 2 shows the change over time of the second drive signal D2. The voltage VD2 of the second drive signal D2 is applied between the second gate electrode G2 and the emitter electrode E1.

[0048] In the description of Fig. 2, it is assumed that the switches 72a and 74a close the circuit and the switches 72b and 74b open the circuit in Fig. 1. In other words, the description will be given assuming that the driving device 30 outputs a first driving signal D1 to the first gate electrode G1 via the output terminal O1 and outputs a second driving signal D2 to the second gate electrode G2 via the output terminal O2.

[0049] 2, in the period before time t1, the control signal Dg is at L level. During the period in which the control signal Dg is at L level, the second active drive control unit 62 outputs the first drive signal D1 of the off voltage VOFF, and the off-time timing control unit 64 outputs the second drive signal D2 of the off voltage VOFF.

[0050] At time t1, the control signal Dg transitions from level L to level H. In response to the transition of the control signal Dg, the first active drive control unit 52 starts active control of the first drive signal D1 for turn-on.

[0051] The control unit 40 generates a command to control the output impedance during the turn-on period from the active drive table 44 so that the actual measurement value follows the target values ​​of the time change of the voltage difference VCE and the time change of the current IE, and outputs the command to the first active drive control unit 52. The command to control the output impedance is to lower the output impedance when the actual measurement value is smaller than the target value, and to raise the output impedance when the actual measurement value is larger than the target value. The first active drive control unit 52 sets the output impedance according to the command and drives the first gate electrode G1 of the switching element 20 with the set output impedance. Note that the control unit 40 may output a command to maintain the output impedance at that time when the target value and the actual measurement value match, or the first active drive control unit 52 may maintain the output impedance at that time when no command is output. In the example of FIG. 2, the voltage VD1 of the first drive signal D1 at this time is the on-voltage VON.

[0052] At time t1, the on-timing control unit 54 raises the voltage VD2 of the second drive signal D2 to the on-voltage VON in response to the transition of the control signal Dg. In this example, the timing at which the voltage VD2 of the second drive signal D2 is raised to the on-voltage VON coincides with the rising timing of the control signal Dg and the first drive signal D1, and the delay time is zero.

[0053] At time t2, the off-timing control section 64 reduces the second drive signal D2 to the off-voltage VOFF. Time t2 is earlier than time t3 at which the control signal Dg transitions from H level to L level by the off-time delay time td_off. The off-time delay time td_off is set in advance in the off-time timing control section 64. The predetermined set value of the off-time delay time td_off is set to an appropriate value based on, for example, the turn-off speed to be achieved by the switching element 20.

[0054] At time t3, the control signal Dg transitions from H level to L level. The second active drive control unit 62 starts active control of the first drive signal D1 for turn-off. The control unit 40 generates a command to control the output impedance during the turn-off period so that the actual measured value follows the target value of the time change of the voltage difference VCE and the time change of the current IE acquired in the active drive table 44, and outputs the command to the second active drive control unit 62. The command to control the output impedance is to lower the output impedance when the actual measured value is smaller than the target value, as in the case of turn-on, and to raise the output impedance when the actual measured value is larger than the target value. The second active drive control unit 62 drives the second gate electrode G2 of the switching element 20 with the set output impedance. Note that, as in the case of turn-on, the control unit 40 may output a command to maintain the output impedance at that time when the target value and the actual measured value match, or the second active drive control unit 62 may maintain the output impedance at that time without outputting a command.

[0055] 2, in the period from time t3 to time t4, the time change of VCE and the time change of IE are slower than the target values, so the drive device 30 lowers the output impedance and outputs the first drive signal D1. The voltage value of the first drive signal D1 is transitioned to VON1, which is lower than the on-voltage VON.

[0056] During the period from time t4 to time t5, the switching speed of the switching element 20 is determined to be faster than the target value, so the drive device 30 increases the output impedance and outputs the first drive signal D2. The voltage value of the first drive signal D1 is raised to the on-voltage VON.

[0057] In this way, the waveforms of VCE and IE during switching of the switching element 20 are controlled to follow the target values ​​by the output impedance driving the first gate electrode G1, so that the driver 30 can operate the switching element 20 at an appropriate switching speed.

[0058] In the driving device 30 of this embodiment, by driving the switching element 20 through active driving as described above, it is possible to reduce switching losses while suppressing the generation of surge voltages and noise that accompany faster switching speeds.

[0059] In the above description, the output impedance of each of the first active drive control section 52 and the second active drive control section 62 is set for each pair of the voltage difference VCE and the current IE output by the switching element 20, but this is not limited to the above. The output impedance of each of the first active drive control section 52 and the second active drive control section 62 may be set based on either the value of the time change in the voltage difference VCE or the value of the time change in the current IE.

[0060] Furthermore, the output impedance of each of the first active drive control section 52 and the second active drive control section 62 may be set according to other parameters, not limited to the waveform of the output of the switching element 20. For example, the output impedance of each of the first active drive control section 52 and the second active drive control section 62 may be set according to the value of a DC voltage input to a power conversion circuit 100, which will be described later in relation to Fig. 4. For example, in the case of a load or input voltage with little fluctuation, the output impedance may be set so as to achieve a drive condition that is preset according to the characteristics of the switching element 20.

[0061] The configuration of the switching element 20 and double gate driving will be described. FIG. 3 is a schematic cross-sectional view illustrating a switching element that is a part of the power module according to the first embodiment. As shown in Fig. 3, the switching element 20 has two control electrodes. Specifically, the switching element 20 has a semiconductor portion 21, a first electrode 22, a second electrode 23, a first control electrode 24a, and a second control electrode 24b. The first electrode 22 is electrically connected to the emitter electrode E1. The second electrode 23 is electrically connected to the collector electrode C1. The first control electrode 24a and the second control electrode 24b are electrically connected to the first gate electrode G1 and the second gate electrode G2.

[0062] The semiconductor portion 21 is provided between a first electrode 22 and a second electrode 23. The semiconductor portion 21 is made of, for example, silicon. The first electrode 22 and the second electrode 23 are, for example, metal layers containing aluminum, titanium, or the like.

[0063] The first control electrode 24a and the second control electrode 24b are provided between the semiconductor portion 21 and the first electrode 22 and are electrically isolated from each other. The first control electrode 24a and the second control electrode 24b are each disposed inside a trench provided in the semiconductor portion 21 and each extend into the semiconductor portion 21.

[0064] The first control electrode 24a is electrically isolated from the semiconductor portion 21 by a first insulating film 25a. The second control electrode 24b is electrically isolated from the semiconductor portion 21 by a second insulating film 25b. The first control electrode 24a and the second control electrode 24b are electrically isolated from the first electrode 22 by interlayer insulating films 26a and 26b.

[0065] The semiconductor portion 21 includes a first layer 21a of a first conductivity type, a second layer 21b of a second conductivity type, a third layer 21c of the first conductivity type, and a fourth layer 21d of the second conductivity type. In the following description, the first conductivity type is defined as n-type and the second conductivity type is defined as p-type.

[0066] The first control electrode 24a and the second control electrode 24b extend into the first layer 21a from the front surface side of the semiconductor portion 21. The first layer 21a is, for example, an n-type base layer.

[0067] The second layer 21b is provided between the first layer 21b and the first electrode 22. The second layer 21b includes a portion facing the first control electrode 24a via the first insulating film 25a. The second layer 21b includes a portion facing the second control electrode 24b via the second insulating film 25b. The second layer 21b is, for example, a p-type base layer. The first insulating film 25a and the second insulating film 25b each function as a gate insulating film.

[0068] The third layer 21c is selectively provided between the second layer 21b and the first electrode 22 and is electrically connected to the first electrode 22. The third layer 21c is, for example, an n-type emitter layer. A plurality of the third layers 21c are provided and are arranged at positions in contact with the first insulating film 25a and the second insulating film 25b.

[0069] The fourth layer 21d is provided between the first layer 21a and the second electrode 23, and is electrically connected to the second electrode 23. The fourth layer 21d is, for example, a p-type collector layer.

[0070] The semiconductor portion 21 further includes a fifth layer 21e of the first conductivity type.

[0071] The fifth layer 21e is provided between the first layer 21a and the fourth layer 21d. The fifth layer 21e is, for example, an n-type buffer layer and contains a higher concentration of impurities of the first conductivity type than the concentration of impurities of the first conductivity type in the first layer 21a.

[0072] In addition, the fourth layer 21d may have p-type collector layers of the second conductivity type and n-type cathode layers of the first conductivity type alternately arranged between the fifth layer 21e and the second electrode 23. In the region of the fourth layer 21d where the p-type collector layers are arranged, the switching element functions as an IGBT. In the region of the fourth layer 21d where the n-type cathode layers are arranged, the switching element functions as a diode with the first electrode 22 as an anode electrode and the second electrode 23 as a cathode electrode. In this case, the switching element is a reverse conducting IGBT (RC-IGBT).

[0073] In the switching element 20, the first control electrode 24a and the second control electrode 24b operate in synchronization during the turn-on period. That is, during the turn-on period, a voltage sufficiently higher than the threshold voltage is simultaneously applied to the first control electrode 24a and the second control electrode 24b with respect to the first electrode 22. As a result, an inversion layer is formed in the portion of the second layer 21b facing the first insulating film 25a and the second insulating film 25b, respectively, and a channel of majority carriers is formed. In the example of FIG. 3, the majority carriers are electrons. The electrons flow through the first layer 21a and are injected into the fourth layer 21d. The fourth layer 21d injects holes into the first layer 21a. As a result, a conductivity modulation occurs, the voltage drop between the second layer 21b, the first layer 21a, and the fourth layer 21d decreases, and the switching element 20 is conductive in a low voltage state, thereby reducing the conduction loss.

[0074] During the turn-off period of the switching element 20, a voltage sufficiently lower than the threshold voltage is applied to the second control electrode 24b before the first control electrode 24a. As a result, an accumulation layer is formed in the portion of the second layer 21b facing the first insulating film 25b, and minority carriers remaining in the adjacent first layer 21a of the first conductivity type can be sucked out through the accumulation layer. The minority carriers are, for example, holes. As a result, the density of holes remaining in the first conductivity type layer is reduced, and the transistor formed by the fourth layer 21d, the first layer 21a, and the third layer 21c is quickly turned off. In this way, the switching element 20 is turned off at a high speed by double gate driving.

[0075] For example, the first control electrode 24a and the second control electrode 24b are arranged alternately and adjacently in the semiconductor portion 21. The part of the transistor controlled by the first control electrode 24a and the part of the transistor controlled by the second control electrode 24b are substantially equivalent. In other words, even if the first control electrode 24a and the second control electrode 24b are interchanged and the switching element 20 is operated as described above, the switching element 20 operates in the same way.

[0076] In this way, the switching element 20 operates in the same way even if the drive signals D1 and D2 are input by switching between the first gate electrode G1 corresponding to the first control electrode 24a and the second gate electrode G2 corresponding to the second control electrode 24b.

[0077] A specific example in which the driving device 30 periodically switches between the first driving signal D1 and the second driving signal D2 to drive the switching element 20 will be described. FIG. 4 is a schematic block diagram of a power conversion circuit. FIG. 5 is a schematic diagram of an example of an operation waveform illustrating the operation of the power conversion circuit of FIG. As shown in FIG. 4, the power conversion circuit 100 includes power modules 10a and 10b. The power modules 10a and 10b include switching elements 20a and 20b and driving devices 30a and 30b, respectively. The power modules 10a and 10b differ from the power module 10 shown in FIG. 1 in that they include diodes Dia and Dib, respectively, but otherwise have the same configuration as the power module 10. The diodes Dia and Dib function as freewheeling diodes in the power conversion circuit. The switching elements 20a and 20b and the driving devices 30a and 30b are denoted by different reference numerals in order to distinguish them from one another, but have the same configuration as the switching element 20 and the driving device 30 described above in FIGS. 1 to 3.

[0078] The switching elements 20a and 20b are connected in anti-parallel to the diodes Dia and Dib, respectively. The switching elements 20a and 20b are connected in series. The series circuit of the switching elements 20a and 20b is connected between the DC power supply lines 4a and 4b. The voltage value of the DC power supply line 4a is higher than that of the DC power supply line 4b.

[0079] The driving device 30a is connected to the switching element 20a so as to drive the switching element 20a, for example, according to the timing chart shown in Fig. 2. The driving device 30b is connected to the switching element 20b so as to drive the switching element 20b, for example, according to the timing chart shown in Fig. 2.

[0080] Complementary control signals are input to the drivers 30a and 30b. The drivers 30a and 30b drive the switching elements 20a and 20b in a complementary manner. That is, when the driver 30a turns on the switching element 20a, the driver 30b turns off the switching element 20b. When the driver 30a turns off the switching element 20a, the driver 30b turns on the switching element 20b. The drivers 30a and 30b drive the switching elements 20a and 20b, respectively, so that the switching elements 20a and 20b are not turned on at the same time.

[0081] In the power conversion circuit 100, three half-bridge circuits each consisting of driving devices 30a, 30b, switching elements 20a, 20b, and diodes Dia, Dib are provided. The three half-bridge circuits are connected between DC power supply lines 4a, 4b. A capacitor 3 is connected between the DC power supply lines 4a, 4b, and the three half-bridge circuits are connected in parallel with the capacitor 3.

[0082] In the half-bridge circuit, a connection node of the series circuit of the switching elements 20a, 20b is connected to a three-phase AC load 101. The power conversion circuit 100 outputs three-phase AC voltages Vu, Vv, and Vw to the three-phase AC load 101. The power conversion circuit 100 converts a DC voltage into an AC voltage. In addition, by using a three-phase AC power supply as the three-phase AC load, the power conversion circuit 100 can also convert an AC voltage into a DC voltage.

[0083] The upper diagram in FIG. 5 shows changes over time in the three-phase AC voltages Vu, Vv, and Vw output by the power conversion circuit 100. The lower diagram of Fig. 5 shows the time change of the selection signal SG of the driving devices 30a and 30b. Of the three-phase AC voltages Vu, Vv, and Vw, one three-phase AC voltage Vu is set as a reference voltage waveform. As shown in Fig. 5, the selection signal SG is generated in synchronization with the phase of the three-phase AC voltage Vu. For example, the selection signal SG transitions to an H level at a time ta when the three-phase AC voltage Vu becomes 0V. The selection signal SG transitions to an L level at a time tb, which is one period after the time ta, in the three-phase AC voltage Vu.

[0084] 1, the switching unit 70 switches between supplying the drive signals D1 and D2 to the first gate electrode G1 and the second gate electrode G2 in response to the selection signal SG. This makes it possible to make the periods during which the voltages of the drive signals D1 and D2 are applied to the first gate electrode G1 and the second gate electrode G2 approximately equal.

[0085] The effects of the drive device 30 and the power module 10 according to this embodiment will be described.

[0086] In the power module 10 according to this embodiment, the driving device 30 performs double gate driving on the switching element 20, thereby enabling the switching element 20 to be turned off at high speed. In the power module 10 according to this embodiment, the driving device 30 drives the switching element 20 by active driving in addition to double gate driving, so that it is possible to realize a faster switching operation than in the case of double gate driving alone.

[0087] In the active driving of the driving device 30, in addition to driving the switching element 20 at high speed, the switching speed of the switching element 20 can be adjusted, so that the switching element 20 can be driven under appropriate conditions according to the characteristics of the switching element 20. When the driving conditions by active driving are set optimally, it is possible to achieve both low switching loss and high-speed switching by suppressing dv / dt and di / dt of the switching element 20 while performing high-speed switching. In addition, depending on the driving conditions in active driving, it is also possible to suppress dv / dt and di / dt, and it is also possible to suppress the generation of noise while maintaining low switching loss.

[0088] The driving device 30 and the power module 10 can be used in the power conversion circuit 100 having a bridge configuration shown in FIG. 4. In the driving device 30 and the power module 10 according to the present embodiment, the turn-off time of the switching element 20 can be shortened by applying both active driving and double gate driving. Therefore, in the bridge configuration, the dead time provided to prevent the upper and lower switching elements from being turned on simultaneously can be shortened. In the power conversion circuit having a bridge configuration, shortening the dead time shortens the period during which current flows through the diode, suppressing the loss in the diode and contributing to improving the power conversion efficiency of the power conversion circuit. In addition, shortening the dead time makes it possible to widen the conduction angle of the switching element 20, and the control range of the power conversion circuit 100 can be wider.

[0089] In the power module 10 according to this embodiment, the drive device 30 includes a switching unit 70. The switching unit 70 can appropriately switch between a first drive signal D1 and a second drive signal D2 and output the signal to the switching element 20. As shown in FIG. 3, in the switching element 20, a part of the transistor controlled by the first control electrode 24a and a part of the transistor controlled by the second control electrode 24b are substantially equivalent. Therefore, even if the first drive signal D1 and the second drive signal D2 are switched and input to the first gate electrode G1 corresponding to the first control electrode 24a and the second gate electrode G2 corresponding to the second control electrode 24b, the switching element 20 operates in the same way.

[0090] 2, when double gate driving is performed in the driving device 30, the application period of a positive voltage by the first driving signal D1 is different from the application period of a positive voltage by the second driving signal D2. Also, the application period of a negative voltage by the first driving signal D1 is different from the application period of a negative voltage by the second driving signal D2.

[0091] When the first drive signal D1 and the second drive signal D2 are applied without switching between the first gate electrode G1 and the second gate electrode G2, asymmetry occurs between the first insulating film 25a and the second insulating film 25b during the stress period of positive voltage application. Also, asymmetry occurs between the first insulating film 25a and the second insulating film 25b during the stress period of negative voltage application. The longer the stress period of voltage application to the insulating film, the more likely it is that degradation will progress.

[0092] In this embodiment, the timing of switching the output of the switching unit 70 can be appropriately controlled so that the stress periods of voltage application are the same for the first insulating film 25a and the second insulating film 25b. Therefore, it is possible to maintain the long-term reliability of the switching element 20.

[0093] Second embodiment FIG. 6 is a schematic block diagram illustrating the power module according to the second embodiment. As shown in Fig. 6, the power module 210 according to this embodiment includes a switching element 220 and a driving device 230. The switching element 220 differs from the switching element 20 in the first embodiment in that it has a third gate electrode G3. The driving device 230 drives a switching element 220 different from that in the first embodiment, and therefore has a different configuration from the driving device 30 according to the first embodiment. The same components are denoted by the same reference numerals, and detailed description thereof will be omitted as appropriate.

[0094] In the power module 210 according to this embodiment, the driving device 230 has output terminals O1, O2, and O3. The output terminals O1, O2, and O3 are connected to the first gate electrode G1, the second gate electrode G2, and the third gate electrode G3 of the switching element 220, respectively.

[0095] The driving device 230 includes a control unit 240, a first driving unit 250, a second driving unit 260, and a switching unit 270.

[0096] The control unit 240 is connected to the signal input terminal 11a. The control unit 240 operates according to a control signal Dg input from the signal input terminal 11a. The control unit 240 has an active driving table 244. In this embodiment, the active driving table 244 sets the output impedance at turn-on and the output impedance at turn-off according to the amplitude of the control signal Dg. The amplitude of the control signal Dg is set, for example, according to the DC voltage input to the power conversion circuit 100 shown in FIG. 4.

[0097] For example, when the amplitude of the control signal Dg is equal to or greater than a certain value, the first output impedance is set, and when the amplitude of the control signal Dg is narrower than the certain value, the second output impedance is set. The control unit 240 judges the amplitude of the control signal Dg, determines the output impedance, and outputs it to the first driving unit 250 and the second driving unit 260.

[0098] The first driving section 250 has a first active driving control section 252, a first on-timing control section 254, and a second on-timing control section 256. The second driving section 260 has a second active driving control section 262, a first off-timing control section 264, and a second off-timing control section 266.

[0099] The first active drive control section 252 has a plurality of output buffer circuits 252a, 252b. An input of the output buffer circuit 252b is connected to an input of the output buffer circuit 252a via a switch element 253. An output of the output buffer circuit 252b is connected to an output of the output buffer circuit 252a. The number of parallel connections of the output buffer circuits 252a, 252b is determined by opening and closing the switch element 253.

[0100] The greater the number of parallel connections of the output buffer circuits 252a, 252b, the lower the output impedance of the first active drive control section 252. The smaller the number of parallel connections of the output buffer circuits 252a, 252b, the higher the output impedance of the first active drive control section 252.

[0101] The second active drive control section 262 has a plurality of output buffer circuits 262a, 262b. The input of the output buffer circuit 262b is connected to the input of the output buffer circuit 262a via a switch element 263. The output of the output buffer circuit 262b is connected to the output of the output buffer circuit 262a. The number of parallel connections of the output buffer circuits 262a, 262b is determined by opening and closing the switch element 263.

[0102] The greater the number of parallel connections of the output buffer circuits 262a, 262b, the lower the output impedance of the second active drive control section 262. The smaller the number of parallel connections of the output buffer circuits 262a, 262b, the higher the output impedance of the second active drive control section 262.

[0103] The first on-timing control section 254 and the first off-timing control section 264 output the second drive signal D2 for driving the second gate electrode G2. The first on-timing control section 254 sets a delay time from the rising edge of the control signal Dg to the rising edge of the second drive signal D2, and outputs the second drive signal D2. The second on-timing control section 256 sets a delay time from the falling edge of the second drive signal D2 to the falling edge of the control signal Dg. These delay times are set in advance, for example.

[0104] The second on-timing control section 256 and the second off-timing control section 266 output the third drive signal D3 for driving the third gate electrode G3. The second on-timing control section 256 sets a delay time from the rising edge of the control signal Dg to the rising edge of the third drive signal D3. The second off-timing control section 266 sets a pulse width that is a time for which the on-voltage VON is maintained after the third drive signal D3 rises. This delay time and pulse width are set in advance, for example. The second on-timing control section 256 and the second off-timing control section 266 drive the third gate electrode G3 of the switching element 220 in a pulsed manner with the third drive signal D3, thereby making it possible to speed up the turn-on time of the switching element 220.

[0105] The switching section 270 has a switching table 272. The switching section 270 receives the output of the first active drive control section 252, the output of the second active drive control section 262, the output of the on-time timing control section 54, and the output of the off-time timing control section 64. The switching table 272 is applied in accordance with a selection signal SG, and the drive signals D1, D2, and D3 output from these are sequentially switched and output from the output terminals O1, O2, and O3. The control section 240 has a gate selection section 242. The gate selection section 242 outputs the selection signal SG at a preset timing.

[0106] The operation of the driving device 230 of the power module 210 according to this embodiment will be described. FIG. 7 is a schematic timing chart for explaining the operation of the drive device according to the second embodiment. The top, second and third diagrams in FIG. 7 are the same as those in the first embodiment shown in FIG. The diagram at the bottom of Fig. 7 is a timing chart of the third drive signal D3 output by the drive device 230. The diagram of the third drive signal D3 is synchronized with the diagrams of the first drive signal D1 and the second drive signal D2 on the time axis. The voltage VD3 of the third drive signal D3 is applied between the third gate electrode G3 and the emitter electrode E1.

[0107] 7, at time t1 during the turn-on period of the switching element 220, the control signal Dg transitions from L level to H level. The control unit 240 detects the amplitude of the control signal Dg, and outputs to the first active drive control unit 252 the output impedance during the turn-on period according to the amplitude.

[0108] The first active drive control unit 252 drives the first gate electrode G1 of the switching element 220 with the first drive signal D1 while performing active control in response to the control signal Dg, similar to the first embodiment shown in FIG.

[0109] The first on-time timing control unit 254 and the first off-time timing control unit 264 raise the second drive signal D2 at time t1, which is in phase with the control signal Dg and the first drive signal D1, and lower the second drive signal D2 at time t2, which is td_off earlier than time t3, which is the timing at which the control signal Dg transitions from H level to L level.

[0110] The second on-timing control section 256 and the second off-timing control section 266 output the third drive signal to the third gate electrode G3 at a timing different from that of the control signal Dg, the first drive signal D1, and the second drive signal D2.

[0111] Before time t6, the voltage VD3 of the third drive signal D3 is 0V. At time t6, the voltage VD3 of the third drive signal D3 transitions from 0V to the on-voltage VON. The period between time t1 and time t6 is set in advance in the second on-timing control unit 256 as the on-time delay time td_on. The predetermined value of the on-time delay time td_on is set to an appropriate value based on, for example, the turn-on speed to be achieved by the switching element 220.

[0112] At time t7, the voltage VD3 of the third drive signal D3 transitions from the on voltage VON to 0 V. The period during which the voltage VD3 of the third drive signal D3 becomes the on voltage VON between time t6 and time t7 is set in advance in the second off-timing control unit 266.

[0113] In this way, by driving the third gate electrode G3 with a phase delay relative to the first gate electrode G1, it is possible to shorten the turn-on time of the switching element 220. Therefore, it is possible to reduce switching loss during the turn-on period of the switching element 220.

[0114] After time t7, the voltage VD3 of the third drive signal D3 is maintained at 0V.

[0115] The configuration of the switching element 220 will be described. FIG. 8 is a schematic cross-sectional view illustrating a switching element that is a part of the power module according to the second embodiment. 8, the switching element 220 differs from the switching element 20 described above with reference to Fig. 3 in that it has a third control electrode 24c.

[0116] The third control electrode 24c is provided between the semiconductor portion 21 and the first electrode 22, similar to the first control electrode 24a and the second control electrode 24b. The third control electrode 24c is electrically isolated from the first control electrode 24a and the second control electrode 24b. The first control electrode 24a, the second control electrode 24b, and the third control electrode 24c are each disposed inside a trench provided in the semiconductor portion 21, and each extend into the semiconductor portion 21. The third control electrode 24c is electrically isolated from the semiconductor portion 21 by a third insulating film 25c.

[0117] During the turn-on period, a voltage sufficiently higher than the threshold voltage is applied to the first control electrode 24a and the second control electrode 24b of the switching element 220. As a result, an inversion layer is formed in the portion of the second layer 21b facing the first insulating film 25a and the second insulating film 25b, and electrons are injected from the third layer 21c into the fourth layer 21d through the inversion layer of the second layer 21b and the first layer 21a. Holes are injected from the fourth layer 21d into the first layer 21a. This causes conductivity modulation, and a low voltage drop is achieved between the first electrode 22 and the second electrode 23.

[0118] In the switching element 220, an on-voltage VON sufficiently higher than the threshold is applied to the third control electrode 24c after the first control electrode 24a and the second control electrode 24b. An inversion layer is formed in the portion of the second layer 21b facing the third control electrode 24c, which promotes the injection of electrons into the first layer 21a and enables the switching element 220 to be turned on more quickly.

[0119] The first control electrode 24a, the second control electrode 24b, and the third control electrode 24c are arranged, for example, adjacent to each other in the semiconductor portion 21. For example, the transistor controlled by the first control electrode 24a, the transistor controlled by the second control electrode 24b, and the transistor controlled by the third control electrode 24c are equivalent to each other. In other words, even if the first control electrode 24a, the second control electrode 24b, and the third control electrode 24c are sequentially replaced and operated as described above, the same operation can be performed.

[0120] FIG. 9 is a table for explaining the switching operation of the drive signal output by the drive device. FIG. 10 is an example of a schematic operational waveform diagram for explaining the operation of the power module according to the second embodiment. Fig. 9 shows output terminals O1 to O3 to which a first drive signal D1, a second drive signal D2 and a third drive signal D3 are output in response to a selection signal SG output by the gate selection section 242. Fig. 9 shows that the connections between the drive signals D1 to D3 and the output terminals O1 to O3 are switched as the periods progress from T1 to T2 to T3. FIG. 10 shows voltage waveforms of three-phase AC voltages Vu, Vv, and Vw output by a power conversion circuit in which the power module 10 in the power conversion circuit 100 shown in FIG. 4 is replaced with a power module 210, and the three-phase AC voltage Vu is used as the reference waveform.

[0121] As shown in FIGS. 9 and 10, for example, the selection signal SG is inverted every ½ period of the three-phase AC voltage Vu, and the drive signals D1 to D3 output by the switching unit 270 are switched in response to the selection signal SG.

[0122] Specifically, in a period T1 from time tc to time td, the output terminal O1 outputs the drive signal D1, the output terminal O2 outputs the drive signal D2, and the output terminal O3 outputs the drive signal D3. In a period T2 from time td to time te, the output terminal O1 outputs the drive signal D2, the output terminal O2 outputs the drive signal D3, and the output terminal O3 outputs the drive signal. In a period T3 from time te to time tf, the output terminal O1 outputs the drive signal D3, the output terminal O2 outputs the drive signal D1, and the output terminal O3 outputs the drive signal D2. In other words, the selection signal SG is inverted between H level and L level every 1 / 2 period of the three-phase AC voltage Vu.

[0123] In the switching element 220, the part of the transistor controlled by the first control electrode 24a, the part of the transistor controlled by the second control electrode 24b, and the part of the transistor controlled by the third control electrode 24c are equivalent to each other. Therefore, even if the drive signals D1 to D3 that drive the first gate electrode G1 corresponding to the first control electrode 24a, the second gate electrode G2 corresponding to the second control electrode 24b, and the third gate electrode G3 corresponding to the third control electrode 24c are interchanged, the switching element 220 operates in the same way.

[0124] The effects of the power module 210 according to this embodiment will be described. The power module 210 according to this embodiment has the same effects as the power module 10 according to the first embodiment. In addition, it has the following effects. That is, the switching element 220 has three gate electrodes, and the driving device 230 can drive each of the gate electrodes. During the turn-on period of the switching element 220, the driving device 230 can output the third driving signal D3 to the switching element 220 with a delay of the on-time delay time td_on from the rising edge of the first driving signal D1. This shortens the turn-on time of the switching element 220, and can further reduce switching loss.

[0125] The driving device 230 has a switching section 270. The switching section 270 can switch and output the driving signals D1 to D3 having different ON periods and OFF periods to the three gate electrodes G1 to G3 of the switching element 220. Therefore, the stress period of voltage application can be made substantially uniform for the three gate electrodes of the switching element 220, and deterioration of the insulating films 25a to 25c of the switching element 220 can be suppressed uniformly, so that the switching element 220 can be driven with high reliability.

[0126] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims.

[0127] The embodiments include the following aspects.

[0128] (Appendix 1) a control unit that controls a semiconductor element having a first gate electrode and a second gate electrode based on a control signal having information regarding an on-timing and an off-timing of the semiconductor element; a first drive signal that turns on the semiconductor element via the first gate electrode at the on timing and turns off the semiconductor element via the first gate electrode at the off timing; a drive unit that generates a second drive signal that pulls out minority carriers in the semiconductor element via the second gate electrode to turn it off at a timing earlier than the off timing; Equipped with The driving unit is capable of switching between a first output impedance when driving the first gate electrode and a second output impedance when driving the first gate electrode in accordance with a switching speed of the semiconductor element, and switches to the first output impedance when the switching speed is faster than a predetermined value, and switches to the second output impedance lower than the first output impedance when the switching speed is slower than a predetermined value.

[0129] (Appendix 2) 2. The driving device according to claim 1, wherein the driving section switches either the first output impedance or the second output impedance by switching a resistance value of a resistive element connected between the driving section and the first gate electrode.

[0130] (Appendix 3) the drive unit is capable of switching between a first drive circuit having a first output current capacity and a second drive circuit having a second output current capacity larger than the first output current capacity; When switching to the first output impedance, the second drive circuit is switched to; 2. The driving device according to claim 1, wherein when switching to the second output impedance, the driving device switches to the first driving circuit.

[0131] (Appendix 4) During the first pre-defined period, outputting the first drive signal to the first gate electrode; outputting the second drive signal to the second gate electrode; During the second pre-defined period, outputting the first drive signal to the second gate electrode; 4. The driving device according to claim 1, further comprising a switching section that outputs the second driving signal to the first gate electrode.

[0132] (Appendix 5) The control unit measures the switching speed by detecting at least one of a voltage value between main electrodes of the semiconductor element and a current value flowing between the main electrodes, and switches either the first output impedance or the second output impedance based on the measured switching speed.

[0133] (Appendix 6) the semiconductor element further comprises a third gate electrode; The driving device according to any one of appendices 1 to 3, wherein the driving unit generates a third driving signal that turns on the semiconductor element at a timing that is later than the on timing and earlier than the off timing, and outputs the third driving signal to the third gate electrode.

[0134] (Appendix 7) A drive device according to any one of appendices 1 to 5; The semiconductor element; a case for housing the semiconductor element and the driving device; Equipped with The semiconductor device is A first electrode; A second electrode; A semiconductor portion provided between the first electrode and the second electrode; a first control electrode provided on the semiconductor portion via a first insulating film and electrically connected to the first gate electrode; a second control electrode provided on the semiconductor portion via a second insulating film, electrically isolated from the first control electrode, and electrically connected to the second gate electrode; Including, The semiconductor portion is A first semiconductor portion of a first conductivity type; a second semiconductor portion of a second conductivity type connected to the first electrode; a third semiconductor portion of the first conductivity type connected to the first electrode and provided between the first semiconductor portion and the second semiconductor portion; a fourth semiconductor portion of the second conductivity type connected to the second electrode and provided between the first semiconductor portion and the second electrode; Including, the first control electrode faces the second semiconductor portion via the first insulating film, The second control electrode faces the second semiconductor portion via the second insulating film.

[0135] (Appendix 8) A drive unit as described in Appendix 6; The semiconductor element; a case for housing the semiconductor element and the driving device; Equipped with The semiconductor device is A first electrode; A second electrode; A semiconductor portion provided between the first electrode and the second electrode; a first control electrode provided on the semiconductor portion via a first insulating film and electrically connected to the first gate electrode; a second control electrode provided on the semiconductor portion via a second insulating film, electrically isolated from the first control electrode, and electrically connected to the second gate electrode; a third control electrode provided on the semiconductor portion via a third insulating film, electrically isolated from the first control electrode and the second control electrode, and electrically connected to the third gate electrode; Including, The semiconductor portion is A first semiconductor portion of a first conductivity type; a second semiconductor portion of a second conductivity type connected to the first electrode; a third semiconductor portion of the first conductivity type connected to the first electrode and provided between the first semiconductor portion and the second semiconductor portion; a fourth semiconductor portion of the second conductivity type connected to the second electrode and provided between the first semiconductor portion and the second electrode; Including, the first control electrode faces the second semiconductor portion via the first insulating film, the second control electrode faces the second semiconductor portion via the second insulating film, The third control electrode faces the second semiconductor portion via the third insulating film.

[0136] (Appendix 9) a control unit that controls a semiconductor element having a first gate electrode and a second gate electrode based on a control signal having information regarding an on-timing and an off-timing of the semiconductor element; a first drive signal that turns on the semiconductor element via the first gate electrode at the on timing and turns off the semiconductor element via the first gate electrode at the off timing; a drive unit that generates a second drive signal that pulls out minority carriers in the semiconductor element via the second gate electrode to turn it off at a timing earlier than the off timing; Equipped with The driving unit switches to the first output impedance when the switching speed of the semiconductor element is faster than a predetermined value, and switches to the second output impedance which is lower than the first output impedance when the switching speed is slower than a predetermined value. [Explanation of symbols]

[0137] 1...Current detector, 2...Voltage detector, 10, 10a, 10b, 210...power module, 12…Case, 20, 20a, 20b, 220...switching elements, 21...Semiconductor section, 21a...first semiconductor portion, 21b...second semiconductor portion, 21c…Third semiconductor part, 21d...fourth semiconductor part, 21e…5th semiconductor part, 22...first electrode, 23...Second electrode, 24a...first control electrode, 24b...second control electrode, 24c...third control electrode, 25a to 25c...insulating film, 30, 30a, 30b, 230...drive device, 40, 240...control unit, 50, 250...First drive unit, 52, 252...first active drive control unit, 54...ON timing control section, 60, 260...second drive unit, 62, 262...Second active drive control unit, 64...Off-time timing control section, 70, 270…switching section, 100...power conversion circuit, 101...3-phase AC load, 254...first on-time timing control unit, 256...second on-time timing control section, 264...first off-time timing control unit, 266...Second off timing control section

Claims

1. a control unit that controls a semiconductor element having a first gate electrode and a second gate electrode based on a control signal having information regarding an on-timing and an off-timing of the semiconductor element; a first drive signal that turns on the semiconductor element via the first gate electrode at the on timing and turns off the semiconductor element via the first gate electrode at the off timing; a drive unit that generates a second drive signal that pulls out minority carriers in the semiconductor element via the second gate electrode to turn it off at a timing earlier than the off timing; Equipped with The driving unit is capable of switching between a first output impedance when driving the first gate electrode and a second output impedance when driving the first gate electrode in accordance with a switching speed of the semiconductor element, and switches to the first output impedance when the switching speed is faster than a predetermined value, and switches to the second output impedance lower than the first output impedance when the switching speed is slower than a predetermined value.

2. 2. The driving device according to claim 1, wherein the driving section switches either the first output impedance or the second output impedance by switching a resistance value of a resistive element connected between the driving section and the first gate electrode.

3. the drive unit is capable of switching between a first drive circuit having a first output current capacity and a second drive circuit having a second output current capacity larger than the first output current capacity; When switching to the first output impedance, the second drive circuit is switched to; 2. The driving device according to claim 1, wherein when switching to the second output impedance, switching to the first driving circuit is performed.

4. During the first preset period, outputting the first drive signal to the first gate electrode; outputting the second drive signal to the second gate electrode; During the second preset period, outputting the first drive signal to the second gate electrode; The drive device according to claim 1 , further comprising a switching section that outputs the second drive signal to the first gate electrode.

5. 2. The driving device according to claim 1, wherein the control unit measures the switching speed by detecting at least one of a voltage value between main electrodes of the semiconductor element and a current value flowing between the main electrodes, and switches either the first output impedance or the second output impedance based on the measured switching speed.

6. The semiconductor element further includes a third gate electrode, 2. The driving device according to claim 1, wherein the driving section generates a third driving signal that injects majority carriers into the semiconductor element to turn it on at a timing that is later than the on timing and earlier than the off timing, and outputs the third driving signal to the third gate electrode.

7. A drive device according to claim 1 ; The semiconductor element; a case for housing the semiconductor element and the driving device; Equipped with The semiconductor device is A first electrode; A second electrode; A semiconductor portion provided between the first electrode and the second electrode; a first control electrode provided on the semiconductor portion via a first insulating film and electrically connected to the first gate electrode; a second control electrode provided on the semiconductor portion via a second insulating film, electrically isolated from the first control electrode, and electrically connected to the second gate electrode; Including, The semiconductor portion is A first semiconductor portion of a first conductivity type; a second semiconductor portion of a second conductivity type connected to the first electrode; a third semiconductor portion of the first conductivity type connected to the first electrode and provided between the first semiconductor portion and the second semiconductor portion; a fourth semiconductor portion of the second conductivity type connected to the second electrode and provided between the first semiconductor portion and the second electrode; Including, the first control electrode faces the second semiconductor portion via the first insulating film, The second control electrode faces the second semiconductor portion via the second insulating film.

8. A drive device according to claim 6 , The semiconductor element; a case for housing the semiconductor element and the driving device; Equipped with The semiconductor device is A first electrode; A second electrode; A semiconductor portion provided between the first electrode and the second electrode; a first control electrode provided on the semiconductor portion via a first insulating film and electrically connected to the first gate electrode; a second control electrode provided on the semiconductor portion via a second insulating film, electrically isolated from the first control electrode, and electrically connected to the second gate electrode; a third control electrode provided on the semiconductor portion via a third insulating film, electrically isolated from the first control electrode and the second control electrode, and electrically connected to the third gate electrode; Including, The semiconductor portion is A first semiconductor portion of a first conductivity type; a second semiconductor portion of a second conductivity type connected to the first electrode; a third semiconductor portion of the first conductivity type connected to the first electrode and provided between the first semiconductor portion and the second semiconductor portion; a fourth semiconductor portion of the second conductivity type connected to the second electrode and provided between the first semiconductor portion and the second electrode; Including, the first control electrode faces the second semiconductor portion via the first insulating film, the second control electrode faces the second semiconductor portion via the second insulating film, The third control electrode faces the second semiconductor portion via the third insulating film.

9. a control unit that controls a semiconductor element having a first gate electrode and a second gate electrode based on a control signal having information regarding an on-timing and an off-timing of the semiconductor element; a first drive signal that turns on the semiconductor element via the first gate electrode at the on timing and turns off the semiconductor element via the first gate electrode at the off timing; a drive unit that generates a second drive signal that pulls out minority carriers in the semiconductor element via the second gate electrode to turn it off at a timing earlier than the off timing; Equipped with The driving unit switches to the first output impedance when the switching speed of the semiconductor element is faster than a predetermined value, and switches to the second output impedance which is lower than the first output impedance when the switching speed is slower than a predetermined value.

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