Semiconductor light receiving element and method for manufacturing the same

Abstract

To provide a semiconductor light receiving element and a method for manufacturing the same that has a large breakdown voltage while achieving both high capacitance and dark current values.SOLUTION: A semiconductor photodetector includes an n-type InP substrate, a buffer layer on the n-type InP substrate, an n-type InGaAs light absorption layer on the buffer layer, and an InP window layer on the n-type InGaAs light absorption layer, and a p-type impurity diffusion region reaching an upper portion of the n-type InGaAs light absorption layer is formed in the InP window layer, and in the n-type InGaAs light absorption layer, an average n-type impurity concentration is 2.5×1014 / cm3 or more and 1.0×1015 / cm3 or less.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor light receiving element and a method of manufacturing the same, and more particularly to a semiconductor light receiving element that receives light in the infrared region and a method of manufacturing the same. [Background technology]

[0002] Semiconductor light receiving elements are widely used, and photodiodes for optical fibers and infrared sensors are typical examples of semiconductor light receiving elements that detect light wavelengths in the infrared region.

[0003] For example, Patent Document 1 discloses a semiconductor photodetector having an n-type InP substrate, an n-type InP buffer layer laminated on the n-type InP substrate, an n-type InGaAs light absorption layer laminated on the n-type InP buffer layer, an n-type InP window layer laminated on the n-type InGaAs light absorption layer, and a p-type impurity region formed by ion-implanting p-type impurities through the n-type InP window layer and forming a p-n junction with the n-type InGaAs light absorption layer. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 5-206497 Summary of the Invention [Problem to be solved by the invention]

[0005] In recent years, there has been a demand for smaller chip sizes in semiconductor photodetectors. As chip sizes become smaller, it becomes more difficult to reduce the dark current while also reducing the capacitance, so there has been a demand for semiconductor photodetectors that are smaller while still achieving both high capacitance and low dark current values. Furthermore, in order to improve the characteristics of photodetectors, there is a strong demand for a larger reverse voltage (breakdown voltage) at the inflection point in the Vr-Ir curve.

[0006] SUMMARY OF THE PRESENT EMBODIMENTS An object of the present invention is to provide a semiconductor light receiving element that has a large breakdown voltage while achieving both low capacitance and low dark current, and a method for manufacturing the semiconductor light receiving element. [Means for solving the problem]

[0007] In order to achieve the above object, the present inventors have focused on the impurity concentration of the light absorption layer in the semiconductor light receiving element, and have completed the present invention. 15 / cm 3 On the n-InP buffer layer, the carrier density is 1 to 5 × 10 15 / cm 3 It is described that an n-InGaAs light absorption layer having an n-type impurity concentration of at least 1×10 is formed. Since the activation rate of the impurity is not 100%, and is at most about 90 to 95%, the n-type impurity concentration contained in the light absorption layer described in Patent Document 1 is at least 1×10 15 / cm 3 The present inventors have found that by doping the InGaAs light absorption layer with Si as an n-type impurity to a lower impurity concentration than before, a semiconductor light receiving element with a large breakdown voltage can be fabricated while simultaneously achieving both a high capacitance and low dark current value. They have also found that the same is true for n-type impurities other than Si, such as Ge. That is, the gist of the present invention is as follows.

[0008] (1) A semiconductor light receiving element having an n-type InP substrate, a buffer layer on the n-type InP substrate, an n-type InGaAs light absorption layer on the buffer layer, and an InP window layer on the n-type InGaAs light absorption layer, wherein a p-type impurity diffusion region is formed in the InP window layer and reaches an upper portion of the n-type InGaAs light absorption layer, the n-type InGaAs light absorption layer has an average n-type impurity concentration of 2.5×10 14 / cm 3 Above 1.0×10 15 / cm 3 A semiconductor light receiving element, characterized in that:

[0009] (2) The average n-type impurity concentration is 3.0×10 14 / cm 3 More than 9.5×10 14 / cm 3 The semiconductor light receiving element according to (1) above,

[0010] (3) The semiconductor light receiving element according to (1) or (2) above, wherein the p-type impurity contained in the p-type impurity diffusion region is Zn.

[0011] (4) The semiconductor light-receiving element according to any one of (1) to (3) above, wherein the n-type InGaAs light-absorbing layer is a laminate of layers having different n-type impurity concentrations.

[0012] (5) The semiconductor light-receiving element according to any one of (1) to (4) above, wherein the n-type InGaAs light-absorbing layer has a thickness of 2.2 μm or more and 3.5 μm or less.

[0013] (6) The semiconductor light-receiving element according to any one of (1) to (5) above, wherein the n-type impurity is Si or Ge.

[0014] (7) A method for manufacturing a semiconductor light-receiving element, comprising: a buffer layer forming step of forming a buffer layer on an n-type InP substrate; a light absorption layer forming step of forming an n-type InGaAs light absorption layer on the buffer layer; a window layer forming step of forming an n-type InP window layer on the n-type InGaAs light absorption layer; and a diffusion region forming step of forming a p-type impurity diffusion region in the InP window layer, the p-type impurity diffusion region reaching an upper portion of the n-type InGaAs light absorption layer, 14 / cm 3 Above 1.0×10 15 / cm 3 A method for manufacturing a semiconductor light-receiving element, comprising the steps of:

[0015] (8) The method for manufacturing a semiconductor photodetector according to (6) above, wherein the diffusion region forming step comprises forming the InP window layer in the window layer forming step, and diffusing a p-type impurity from a surface side of the InP window layer in an MOCVD furnace.

[0016] (9) The method for manufacturing a semiconductor light-receiving element according to (6) or (7) above, wherein the light-absorbing layer forming step includes a step of forming a first doped layer having an n-type impurity concentration higher than the average n-type impurity concentration, and a step of forming a second doped layer having an n-type impurity concentration lower than the average n-type impurity concentration.

[0017] (10) The method for producing a semiconductor light-receiving element according to any one of (7) to (9) above, wherein the n-type impurity is Si or Ge. Effect of the Invention

[0018] According to the present invention, there are provided a semiconductor light receiving element having a large breakdown voltage while achieving both low capacitance and low dark current, and a method for manufacturing the semiconductor light receiving element. [Brief description of the drawings]

[0019] [Figure 1] 1 is a schematic cross-sectional view of a semiconductor light-receiving element according to a first embodiment of the present invention. [Diagram 2] 1 is a schematic cross-sectional view of a semiconductor light-receiving element according to a specific embodiment of the present invention. [Diagram 3] 1A to 1C are schematic cross-sectional views of a semiconductor light-receiving element for explaining a first embodiment of a manufacturing method according to the present invention. [Figure 4] FIG. 4 is a schematic cross-sectional view of a semiconductor light-receiving element according to a second embodiment of the present invention. [Diagram 5] 1 is a graph showing the results of measuring the Si concentration profile of the InGaAs light absorption layer by SIMS (secondary ion mass spectrometry) in Examples 1 and 2. FIG. [Figure 6] 1 is a graph showing the results of measuring the Ge concentration profiles of the InGaAs light absorption layers in Examples 5 to 7 by secondary ion mass spectrometry (SIMS). DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] Prior to the description of the embodiments according to the present invention, the following points will be explained in advance.

[0021] <Semiconductor composition> First, when simply denoted as "InGaAs" without specifying the elemental composition ratio in this specification, the composition ratio of the total of group III elements In (indium) and Ga (gallium) to the group V element As (arsenic) is 1:1, and the ratio of In and Ga, which are group III elements, means an arbitrary compound. When expressed as In x Ga (1-x) GaAs, it is preferably 0 < x < 1. However, "InGaAs" may contain Al within 5% (molar concentration, the same hereinafter) with respect to the total of In and Ga, or may contain P (phosphorus) and Sb (antimony) within 5% with respect to As. Also, even when simply denoted as "InP", group III and group V elements other than In and P can be contained at 5% or less. The values of the composition ratios of the group III and group V elements can be measured by photoluminescence measurement, X-ray diffraction measurement, etc.

[0022] <Conduction type> In this specification, a layer that functions electrically as a p-type is called a p-type semiconductor layer (sometimes abbreviated as a "p-type layer"), and a layer that functions electrically as an n-type is called an n-type semiconductor layer (sometimes abbreviated as an "n-type layer"). An n-type impurity is an impurity that functions electrically as an n-type in InGaAs by being intentionally added. The n-type impurity is at least one selected from Si, Ge, Sn, Pb, S, Se, and Te, and among them, Si or Ge is preferable. An element selected as an n-type impurity is usually one, but may be multiple. On the other hand, when a specific impurity such as Si, Ge, Zn, S, Sn, or Mg is not intentionally added, it is called "i-type" or "undoped". An undoped III-V group compound semiconductor layer may contain unavoidable impurities during the manufacturing process. Specifically, in this specification, a material is considered to be "undoped" when the dopant concentrations of both p-type and n-type impurities are low and are close to the lower limit of detection by SIMS. In the case of Si concentration, the lower limit of detection by SIMS analysis, which will be described later, is 2×10 14 / cm 3 Therefore, the average Si concentration in the layer is 2.5×10 14 / cm 3 When the concentration is less than 1×10, it is considered to be "undoped." In the case of Ge concentration, the detection limit of SIMS analysis described later is 1×10 14 / cm 3 Therefore, the average Ge concentration in the layer is 1.5×10 14 / cm 3 If the impurity concentration is less than 100%, it is considered to be "undoped." The impurity concentration values ​​of Si, Ge, Sn, S, Te, Mg, Zn, etc. are determined by SIMS analysis.

[0023] <Thickness of semiconductor layer> The thickness of each semiconductor layer provided in the semiconductor light receiving element can be calculated from cross-sectional observation of the grown layer using a scanning electron microscope and a transmission electron microscope.

[0024] <Carrier density> To determine the carrier density, the carrier density of each layer is measured using an etching CV (ECV) measurement device. For example, an ECV-Pro manufactured by Nanometrics can be used as the ECV measurement device. The contact layer and window layer were successively removed by wet etching to expose the surfaces of each layer, and a voltage was applied using an electrolyte specified by the ECV measurement device manufacturer to perform CV measurements. The carrier density was calculated from the CV measurement results.

[0025] In addition, the light absorbing layer of the present invention before Zn diffusion has low Si and Ge concentrations, and the carrier density is below the lower limit of measurement (1×10 15 / cm 3 Since the carrier density of the light absorption layer was less than 100 nm, it was not possible to obtain the carrier density of the light absorption layer.

[0026] <Impurity concentration> The impurity concentration is determined by SIMS analysis in the depth direction. In the present invention, in order to accurately measure the concentration of a small amount of impurities, the background (components other than the sample) of the SIMS measurement data was excluded as much as possible. Specifically, measurement was performed after excluding as much as possible the n-type impurities such as residual Si and Ge in the SIMS measurement chamber. Further, in order to perform SIMS measurement in the depth direction, it is desirable to previously remove the n-InP window layer and the InGaAs contact layer, which are upper layers than the InGaAs light absorption layer, by etching. Here, the average Si concentration refers to the average value of the Si concentration in the range excluding irregular values near the outermost surface where SIMS analysis starts or near the interface with other layers. For example, from the outermost surface to 0.1 μm and from the interface with other layers to 0.1 μm are excluded from the calculation of the average Si concentration. The average Ge concentration refers to the average value of the Ge concentration in the range excluding irregular values near the outermost surface where SIMS analysis starts or near the interface with other layers. For example, from the outermost surface to 0.1 μm and from the interface with other layers to 0.1 μm are excluded from the calculation of the average Ge concentration. The average n-type impurity concentration is the average concentration in the range excluding irregular values near the interface with other layers as described above for the element when the selected n-type impurity is one. When there are multiple intentionally added n-type impurities, the average n-type impurity concentration may be calculated as the average concentration with respect to the total value of the concentrations of those elements at each position.

[0027] In the diffusion of p-type impurities, since it becomes a codoped state of p-type impurities and n-type impurities, the SIMS measurement may be performed on either the inside or the outside of the p-type impurity diffusion region. In the present invention, the entire InGaAs light absorption layer in which n-type impurities are intentionally added, including the diffused portion of the p-type impurities, is expressed as an n-type InGaAs light absorption layer.

[0028] <The p-type impurity concentration in the p-type impurity diffusion region> Regarding the p-type impurity concentration in the p-type impurity diffusion region, the case where the p-type impurity is Zn will be described below as an example. The Zn concentration in the Zn diffusion region is determined by SIMS in the depth direction with respect to the center of the Zn diffusion region, and the average Zn concentration in each layer is obtained based on the depth-direction Zn concentration profile in each layer. When Zn is used as the p-type impurity, in SIMS analysis, there is a difference in the detection rate (ionization rate) of Zn between the cases where the base material is InP and InGaAs. Therefore, for Zn, in order to correct the absolute value of the elemental concentration, the Zn concentration in the InP layer is determined using the analysis results for InP with a known Zn concentration, and the Zn concentration in the InGaAs layer is corrected using the analysis results for InGaAs with a known Zn concentration, respectively.

[0029] (First Embodiment) Referring to FIG. 1, a semiconductor light receiving element according to the first embodiment of the present invention will be described. The semiconductor light receiving element 100 according to the first embodiment of the present invention includes at least an n-type InP substrate 110, a buffer layer 120 on the n-type InP substrate 110, an n-type InGaAs light absorption layer 130 on the buffer layer 120, and an InP window layer 140 on the n-type InGaAs light absorption layer 130. And a p-type impurity diffusion region 150 reaching above the n-type InGaAs light absorption layer 130 is formed in the InP window layer 140. Here, the n-type InGaAs light absorption layer 130 in the semiconductor light receiving element 100 has an average Si concentration of 2.5×10 14 / cm 3 or more and 1.0×10 15 / cm 3 or less. Hereinafter, the details of each component will be described sequentially.

[0030] <n-type InP substrate> A generally available n-type InP substrate 110 can be used. Representative examples of the n-type impurity in the n-type InP substrate 110 are S (sulfur) and Sn (tin). The carrier density of the n-type InP substrate 110 is not particularly limited. For example, 1.0×10 18 / cm 3 or more and 9.0×10 18 / cm 3What needs to be adopted is just this. The thickness, diameter, and surface orientation of the substrate are not particularly limited.

[0031] <Buffer layer> A buffer layer 120 is provided on the n-type InP substrate 110. The buffer layer 120 may be a layer that reduces the diffusion of n-type impurities in the n-type InP substrate 110 and is lattice-matched between the n-type InP substrate 110 and the n-type InGaAs optical absorption layer 130. For example, the buffer layer 120 may be an InP layer, an InGaAs layer, or an InGaAsP layer, or may also be a laminate having a superlattice structure combining them or a compositionally graded layer. The Si concentration in the buffer layer 120 is preferably the same as or lower than that of the n-type InGaAs optical absorption layer 130 described later. For example, in order to effectively reduce the diffusion of n-type impurities from the n-type InP substrate 110 to the n-type InGaAs optical absorption layer 130, the average Si concentration by SIMS analysis is 5×10 14 / cm 3 or less, and it is more preferable to be undoped. The thickness of the buffer layer 120 is preferably 0.3 μm or more and 1.0 μm or less.

[0032] <n-type InGaAs optical absorption layer> An n-type InGaAs optical absorption layer 130 is provided on the buffer layer 120. The n-type InGaAs optical absorption layer 130 has an average Si concentration of 2.5×10 14 / cm 3 or more and 1.0×10 15 / cm 3 or less.

[0033] - Si concentration - The average Si concentration of the n-type InGaAs optical absorption layer 130 is, as described above, 2.5×10 14 / cm 3 or more and 1.0×10 15 / cm 3 or less, and 3.0×10 14 / cm 3 or more and 9.5×10 14 / cm 3By setting the average Si concentration higher than that of the undoped case and lower than that of the conventional case, it is possible to realize a semiconductor light receiving element with a large breakdown voltage while achieving both a high capacitance and a high dark current. 14 / cm 3 If it is lower, the dark current value will be 0.05 nA or more, and the value will be 1.0 × 10 15 / cm 3 If it is higher, the capacitance value will be 4 pF or more, and the breakdown voltage will be 10 V or less, which is not preferable.

[0034] The inclusion of Si in the InGaAs light absorbing layer 130 can compensate for defects contained in the InGaAs light absorbing layer 130, and has the effect of preventing Zn diffusion (substitutional diffusion) into unexpected defects from progressing deeper than the pn junction interface during Zn diffusion. Therefore, it is considered that minority carriers present near the junction diffuse in the opposite direction to the bias, reducing the diffusion current passing through the pn junction. By setting the Si amount at the pn junction interface and the Si amount at a position deeper than the interface within the above range, the Si amount in the InGaAs light absorbing layer 130 becomes appropriate, and it is considered that the relationship between the capacitance, dark current, and breakdown voltage values ​​can be set within a preferable range.

[0035] -Composition ratio- Here, the composition ratio of the n-type InGaAs light absorbing layer 130 is In x1 Ga (1-x1)In this case, the In composition ratio x1 is not particularly limited as long as epitaxial growth can be performed on the n-type InP substrate 110, but it is preferable to set it to 0.5218≦x1≦0.5447, and more preferably 0.5275≦x1≦0.5389. This is because the lattice constant of the InP substrate and the lattice constant of the InGaAs layer can be approximately matched, the stress near the film interface is reduced, and defects such as slip or crosshatch are unlikely to occur in the InGaAs layer. The n-type impurity of the n-type InGaAs light absorption layer 130 may be, for example, Si. Instead of the composition ratio of the n-type InGaAs light absorption layer 130, the lattice mismatch degree of the InGaAs layer with respect to the InP substrate may be adopted. The degree of lattice mismatch can be obtained from a graph of 2θ-ω scan (diffractometer curve) using X-rays on the (400) plane of the InP substrate 110 and the InGaAs light absorbing layer 130 thereon, with the horizontal axis being 2θ and the vertical axis being diffracted X-ray intensity. InP and the diffraction peak position 2θ of the InGaAs layer InGaAs Using the Bragg diffraction equation, the lattice constants a InP , a InGaAs Calculate the lattice constant difference, Δa = a InP -a InGaAs Then, Δa / a InP The degree of lattice mismatch can be evaluated by the following equation. More simply, the diffraction angle difference Δ2θ=2θ between the diffraction peak position of the InP substrate and the diffraction peak position of the InGaAs in the 2θ-ω scan measurement results can be calculated as InP -2θ InGaAs The lattice mismatch can be evaluated using the above method. Δ2θ is preferably ±200 arcsec or less, and more preferably ±100 arcsec or less. The smaller the lattice mismatch, the less likely defects such as slip or crosshatch will occur in the InGaAs layer on the InP substrate. In addition, the warping of the epitaxial substrate is reduced, making it easier to handle during subsequent processing, and suppressing cracks in the epitaxial substrate after deposition of a film such as a SiN film.

[0036] -Thickness- The thickness of the n-type InGaAs light absorption layer 130 refers to the thickness without considering the diffusion of p-type impurities, and is the thickness of the n-type InGaAs light absorption layer 130 before p-type impurity diffusion. The thickness of the n-type InGaAs light absorption layer 130 is preferably 2.2 μm or more, and more preferably 2.7 μm or more. On the other hand, in order to ensure the ESD breakdown voltage of the semiconductor light receiving element 100, it is preferable to make the thickness of the n-type InGaAs light absorption layer 130 3.5 μm or less, and more preferably 3.45 μm or less. If the thickness of the n-type InGaAs light absorption layer 130 is too thin, the light reception sensitivity may decrease. Also, if the thickness is too thick, slips or cross-hatching may easily occur in the n-type InGaAs light absorption layer 130 and the InP window layer 140 thereon.

[0037] <InP window layer> An InP window layer 140 is provided on the n-type InGaAs light absorption layer 130. The InP window layer 140 may be undoped, but it is preferably doped with an n-type impurity such as Si, and the average Si concentration by SIMS analysis is 6.0×10 15 / cm 3 or more and 1.2×10 16 / cm 3 or less. Also, it is preferable to make the carrier density due to the n-type impurity 5.0×10 15 / cm 3 or more and 1.1×10 16 / cm 3 or less. Note that the carrier density due to the n-type impurity of the InP window layer 140 here refers to the carrier density before the Zn diffusion process. The thickness of the InP window layer 140 is not particularly limited, but can be, for example, 0.5 μm to 2 μm. Note that the InP window layer 140 is preferably InP, but other group III or V elements of InP may be mixed in several percentages as long as it has a sufficient bandgap to transmit light of the wavelength absorbed by the n-type InGaAs light absorption layer 130.

[0038] <p-type impurity diffusion region> A p-type impurity diffusion region 150 is provided in an InP window layer 140 of the semiconductor light receiving element 100. The p-type impurity diffusion region 150 reaches an upper portion of the n-type InGaAs light absorption layer 130. More specifically, the p-type impurity diffusion region 150 is provided in a part of the in-plane direction of the InP window layer 140 from the outermost surface of the InP window layer 140 to a surface portion of the n-type InGaAs light absorption layer 130 as shown in Fig. 1. For convenience, the part of the p-type impurity diffusion region 150 formed in the InP window layer 140 will be referred to as an intra-window layer diffusion region 152, and the part formed in the n-type InGaAs light absorption layer 130 will be referred to as an intra-light absorption layer diffusion region 151.

[0039] Here, the p-type impurity diffusion region 150 "reaches" the upper portion of the n-type InGaAs light absorption layer 130 means that the p-type impurity of the p-type impurity diffusion region 150 has diffused at least from the interface between the InP window layer 140 and the n-type InGaAs light absorption layer 130 toward the n-type InP substrate 110 to a position deeper than 0.30 μm in the n-type InGaAs light absorption layer 130. In addition, the concentration of the p-type impurity is 1.0×10 18 / cm 3 If the above is true, it is assumed that the p-type impurity has been diffused. The n-type InGaAs light absorption layer 130 is doped with the n-type impurity, and the InP window layer 140 is also doped with the n-type impurity. Therefore, the diffusion region 151 in the light absorption layer and the diffusion region 152 in the window layer of the p-type impurity diffusion region 150 are in a co-doped state with the p-type impurity and the n-type impurity. The p-type impurity in the p-type impurity diffusion region 150 is preferably Zn.

[0040] There is no particular limit to the size of the in-plane direction in which the p-type impurity diffusion region 150 is formed, but when the region is formed to have a circular shape when viewed from above, the size can be, for example, 10 μmφ or more and 450 μmφ or less. The shape of the p-type impurity diffusion region 150 is not limited to a circle, and may be a polygonal shape such as a triangle, a rectangle, or a pentagon. The smaller the area of ​​the p-type impurity diffusion region 150, the easier it is to obtain the effects of the present invention. For this reason, the area of ​​the p-type impurity diffusion region 150 is set to 159050 μm 2 Less than 129600μm is preferable. 2 Less than 62500μm is more preferable.2 The lower limit of the area is 100 μm for practical use and mass production. 2 The above is preferred.

[0041] The semiconductor photodetector 100 described above has an optimized thickness of the n-type InGaAs light absorption layer 130 and an optimized carrier density due to n-type impurities in the n-type InGaAs light absorption layer 130, and therefore can achieve both excellent photosensitivity and ESD resistance.

[0042] Next, a specific embodiment applicable to the semiconductor light receiving element according to the present invention will be described with reference to Fig. 2. In the following, configurations with the same last two digits of the reference code are the same as those described in the above-mentioned embodiment, so duplicated explanations will be omitted. Similarly, when referring to Fig. 3 and Fig. 4, duplicated explanations of common configurations will be omitted.

[0043] <Cap layer> It is preferable to provide a cap layer 260, which also serves as a contact layer, on a portion of the upper surface of the p-type impurity diffusion region 250, for example, on the edge. The cap layer 260 has a carrier density of 5.0×10 15 / cm 3 It is preferable that the carrier density is less than 2.5×10 15 / cm 3 It is more preferable to use undoped InGaAs having a composition ratio of less than 1000 nm. x2 Ga (1-x2)When expressed as As, the In composition ratio x2 of the cap layer is not particularly limited, but is preferably 0.5218≦x2≦0.5447, and more preferably 0.5275≦x2≦0.5389. This is because the lattice constant of the InP substrate and the lattice constant of the InGaAs layer can be approximately matched, the stress near the film interface is reduced, and defects such as slip or cross hatch are less likely to occur in the InGaAs layer. In addition, in the diffusion region formation process described later, p-type impurities are diffused into the cap layer 260 to make it p-type, and the cap layer 260 is used as a p-type contact layer, thereby reducing the contact resistance with the p-type electrode 280.

[0044] An anti-reflection coating layer 270 may be provided on the InP window layer 240 except for the cap layer 260. The AR coating layer 270 is preferably made of SiN and may have a thickness of 0.1 μm or more and 0.5 μm or less.

[0045] A p-type electrode 280 may be provided in the portion in contact with the cap layer 260, and an n-type electrode 290 may be provided on the back surface of the n-type InP substrate 210. The thickness of each may be 0.5 μm or more and 4.0 μm or less. The p-type electrode 280 may be made of Ti (titanium), Pt (platinum), and Au (gold) in that order from the cap layer side, and the n-type electrode may be made of an AuGe alloy or the like. The shape of the electrode may be appropriately designed depending on the application, and may be, for example, a polygonal shape such as a circle, a triangle, a square, or a pentagon, and the illustrated example in FIG. 2 is merely an example. The p-type electrode 280 may be provided with a bonding pad for wire connection to pass a current.

[0046] Considering that the semiconductor light receiving element 200 is used for a sensor, the overall thickness of the semiconductor light receiving element 200 is preferably 100 μm or more and 300 μm or less, the width and depth are preferably about 500 μm, and when the light receiving portion is formed into a circular shape when viewed from above, the diameter of the light receiving portion can be, for example, 10 μmφ or more and 450 μmφ or less. In addition, since the light receiving portion is provided inside the p-type impurity diffusion region 150, the shape of the light receiving portion may be similar to the shape of the p-type impurity diffusion region 150, and is not limited to a circle, but may be a polygonal shape such as a triangle, a rectangle, or a pentagon.

[0047] Refer to steps A to D shown in Fig. 3. The method for manufacturing the semiconductor light receiving element 300 according to the first embodiment of the present invention includes a buffer layer forming step of forming a buffer layer 320 on an n-type InP substrate 310, a light absorption layer forming step of forming an n-type InGaAs light absorption layer 330 on the buffer layer 320, a window layer forming step of forming an InP window layer 340 on the n-type InGaAs light absorption layer 330, and a diffusion forming step of forming a p-type impurity diffusion region 350 in the InP window layer 340, the p-type impurity diffusion region 350 reaching the upper part of the n-type InGaAs light absorption layer 330. The n-type InGaAs light absorption layer 330 formed in the light absorption layer forming step has an average Si concentration of 2.5 x 10 14 / cm 3 Above 1.0×10 15 / cm 3 The following applies.

[0048] Each layer of the semiconductor layer is preferably formed by MOCVD. The diffusion region forming step (Step D) is preferably performed by forming an InP window layer 340 in the window layer forming step, and then diffusing p-type impurities from the surface side of the InP window layer 340 using an MOCVD furnace. The diffusion region forming step (Step D) may include a step of forming a cap layer 360 and a step of partially removing the cap layer to expose a part of the InP window layer 340, and the diffusion region forming step (Step D) may also diffuse p-type impurities into the cap layer 360.

[0049] A preferred embodiment of the diffusion region forming step will be described in detail below, taking an example in which Zn is used as a p-type impurity. After all of the semiconductor layers are epitaxially grown, Zn is diffused from the top surface of the epitaxial layer only into a desired region by MOCVD. That is, when the InP window layer 340 is the top layer of the semiconductor layer, Zn is diffused from the surface of the InP window layer 340, and when the cap layer (not shown) is the top layer of the semiconductor layer, Zn is diffused from the surface of the cap layer. In order to diffuse Zn only into a desired region, a dielectric thin film (SiO2, SiON, SiN film, etc.) is first formed by CVD, and the dielectric thin film is patterned in a predetermined shape by photolithography using a resist, and the patterned dielectric thin film can be used as a mask 370 for Zn diffusion. Then, Zn can be diffused from the top surface of the epitaxial layer through the cap layer, if one is provided, into the InP window layer 340 and the n-type InGaAs light absorbing layer 330. Moreover, the cap layer 360 can be made p-type by diffusing Zn, and can be suitably used as a p-type contact layer.

[0050] In this case, the Zn concentration in the n-type InGaAs light absorption layer 330 has a Zn concentration peak near the interface between the InP window layer 340 and the n-type InGaAs light absorption layer 330, and the Zn concentration gradually decreases from the interface toward the n-type InP substrate 310. The Zn peak concentration in the InGaAs light absorption layer 330 is 1.0×10 19 / cm 3 Above 5.0×10 19 / cm 3 The average Zn concentration in the diffusion region 351 in the n-type InGaAs light absorption layer 330 can be set to 8.0×10 18 / cm 3 Above 4.0×10 19 / cm 3 and preferably 9.0×10 18 / cm 3 Above 3.0×10 19 / cm 3The average Zn concentration in the diffusion region 351 in the light absorption layer is 1.0×10 Zn concentration from the interface between the InP window layer 340 and the n-type InGaAs light absorption layer 330 in the n-type InGaAs light absorption layer 330. 18 / cm 3 As described above, since Zn is diffused into a part of the region in each semiconductor layer doped with an n-type impurity such as Si, diffusion region 352 in the window layer where Zn is diffused into InP window layer 340 and diffusion region 351 in the light absorption layer where Zn is diffused into n-type InGaAs light absorption layer 330 are in a co-doped state of Zn and the n-type impurity (for example, Si).

[0051] In the diffusion region forming step, the p-type impurity diffusion region 350 may be formed by using a quartz tube sealing method instead of the MOCVD method, or the p-type impurity diffusion region 350 may be formed by an ion implantation method.

[0052] The electrodes not shown in Fig. 3 can be formed by a sputtering method, an electron beam deposition method, a resistance heating method, etc. The AR coating layer not shown in Fig. 3 can be formed by a CVD method, a coating method, etc.

[0053] Second Embodiment A semiconductor light receiving element according to a second embodiment of the present invention will be described below with reference to Fig. 4. The difference from the first embodiment is that the n-type InGaAs light absorbing layer is a stack of layers with different Si concentrations. That is, the n-type InGaAs light absorbing layer according to the second embodiment includes a first doped layer 431 having a Si concentration higher than the average Si concentration and a second doped layer 432 having a Si concentration lower than the average Si concentration. The second doped layer 432 may be an undoped layer, and it is sufficient that the stack as a whole functions as an n-type light absorbing layer.

[0054] Even in the case of forming such a laminate, the average Si concentration of the entire n-type InGaAs light absorbing layer 430 is 2.5×10 14 / cm 3 Above 1.0×10 15 / cm 3 It is preferable to set the value to 3.0×10 or less.14 / cm 3 More than 9.5×10 14 / cm 3 It is more preferable that the second doped layer 432 is undoped and has a lower limit of SIMS detection, the average Si concentration is calculated as zero for the undoped layer. Even in such a stack, the n-type InGaAs light absorbing layer 430 has an average of 2.5×10 14 / cm 3 By incorporating silicon to satisfy the above requirement and setting the average silicon concentration to be lower than that of conventional semiconductor devices, it is possible to realize a semiconductor light-receiving element with a large breakdown voltage while simultaneously achieving both high capacitance and low dark current values. 14 / cm 3 If it is lower, the dark current value will be 0.05 nA or more, and the average Si concentration will be 1.0 × 10 15 / cm 3 If the average Si concentration of the first doped layer 431 exceeds 1.0×10, the capacitance value will be 4 pF or more, and the breakdown voltage will be 10 V or less, which is not preferable. 15 / cm 3 It is more preferable to do the following, and it is more preferable to select the first embodiment.

[0055] The first doped layer 431 is preferably located on the InP window layer 440 side (including the Zn-diffused range) of the n-type InGaAs light absorbing layer 430, and the second doped layer 432 is preferably located on the buffer layer 420 side of the n-type InGaAs light absorbing layer 430. The thickness of the first doped layer 431 is set so that the Zn concentration in the Zn-diffused diffusion region 351 in the light absorbing layer is 1.0×10 18 / cm 3It is preferable that the total thickness of the first doped layer 431 and the second doped layer 432 is 2.2 μm or more and 3.5 μm or less, and more preferably 2.7 μm or more and 3.45 μm or less. It is preferable that the first doped layer 431 is thicker than the second doped layer 432. There may be a plurality of first doped layers 431 and second doped layers 432. In addition, the first doped layer 431 or the second doped layer 432 may further have a third doped layer or a fourth doped layer having a different Si concentration.

[0056] Third embodiment A semiconductor light receiving element according to a third embodiment of the present invention will be described. The semiconductor light receiving element 100 according to the third embodiment of the present invention is similar to the first or second embodiment, except that the n-type impurity added to the n-type InGaAs light absorbing layer 130 is changed from Si to Ge. That is, the semiconductor light receiving element according to the third embodiment of the present invention has at least an n-type InP substrate, a buffer layer on the n-type InP substrate, an n-type InGaAs light absorbing layer on the buffer layer, and an InP window layer on the n-type InGaAs light absorbing layer. A p-type impurity diffusion region is formed in the InP window layer, reaching the top of the n-type InGaAs light absorbing layer, and the n-type InGaAs light absorbing layer has an average Ge concentration of 2.5×10 14 / cm 3 Above 1.0×10 15 / cm 3 The n-type InGaAs light absorption layer in the third embodiment will be described below.

[0057] As in the first embodiment, an n-type InGaAs light absorbing layer 130 is provided on the buffer layer 120. The n-type InGaAs light absorbing layer 130 has an average Ge concentration of 2.5×10 14 / cm 3 Above 1.0×10 15 / cm 3 It is less than 3.0×10 14 / cm 3 More than 9.5×10 14 / cm 3 It is preferable that the value is less than 3.0×1014 / cm 3 Above 8.0×10 14 / cm 3 It is more preferable that the n-type InGaAs light absorbing layer is equal to or less than the average Ge concentration. In this embodiment, as in the second embodiment, the n-type InGaAs light absorbing layer may include a first doped layer having a Ge concentration higher than the average Ge concentration and a second doped layer having a Ge concentration lower than the average Ge concentration. In this case, the second doped layer may be an undoped layer, and the stack as a whole may function as an n-type light absorbing layer. In the third embodiment, too, by setting the average Ge concentration to be higher than that of the undoped case and lower than that of the conventional case, a semiconductor light receiving element having a large breakdown voltage can be realized while achieving both the capacitance and the dark current values.

[0058] (Fourth embodiment) A semiconductor light receiving element according to a fourth embodiment of the present invention will be described. In the semiconductor light receiving element according to the fourth embodiment of the present invention, the n-type impurity added to the n-type InGaAs light absorbing layer 130 is not limited to Si or Ge, unlike the above-mentioned embodiments. That is, the semiconductor light receiving element according to the fourth embodiment of the present invention has at least an n-type InP substrate, a buffer layer on the n-type InP substrate, an n-type InGaAs light absorbing layer on the buffer layer, and an InP window layer on the n-type InGaAs light absorbing layer. A p-type impurity diffusion region is formed in the InP window layer, reaching the top of the n-type InGaAs light absorbing layer, and the n-type InGaAs light absorbing layer has an average n-type impurity concentration of 2.5×10 14 / cm 3 Above 1.0×10 15 / cm 3 The rest of the above is the same as in the first, second and third embodiments. In this embodiment, when two or more types of n-type impurities are used, the average n-type impurity concentration is calculated based on the sum of the concentrations of the n-type impurities at each position. The average n-type impurity concentration is 2.5×10 14 / cm 3 Above 1.0×10 15 / cm 3 is less than or equal to 3.0 x 10 14 / cm 3More than 9.5×10 14 / cm 3 In the fourth embodiment, too, by setting the average n-type impurity concentration to be higher than that in the undoped case and lower than that in the conventional case, it is possible to realize a semiconductor light receiving element having a large breakdown voltage while achieving both a large capacitance and a large dark current value.

[0059] The present invention will be described in more detail below using examples, but the present invention is not limited to the following examples in any way. EXAMPLES

[0060] <Example 1> n-type InP substrate (thickness: 625 μm, sulfur doped, carrier density: 3.0 × 10 18 / cm 3 ) by MOCVD, an undoped InP buffer layer, n-type In 0.53 Ga 0.47 As optical absorption layer (thickness: 3 μm, Si concentration: 1 × 10 15 / cm 3 ), n-type InP window layer (thickness: 1 μm), undoped In 0.53 Ga 0.47 An As cap layer (thickness: 0.1 μm) was then formed. Table 1 shows the composition of each layer, the dopant, the carrier density before Zn diffusion, the average Si concentration by SIMS analysis, and the thickness conditions.

[0061] [Table 1]

[0062] Next, a mask was formed on the cap layer by photolithography, and the cap layer other than the donut-shaped contact region was etched away, after which a SiN film (thickness: 0.1 μm) was formed by CVD, and a pattern was formed by photolithography using a resist, forming an opening not covered by the SiN film in the donut-shaped contact region and the hole of the donut. Zn was diffused in the depth direction of the opening not covered by the SiN film by supplying Zn source gas while heating using MOCVD, and Zn was diffused from the cap layer to the n-type InP window layer and the n-type InGaAs light absorption layer. DEZn (diethyl zinc) was used as the Zn source. A SiN film was formed in the portion other than the donut-shaped contact region to form an AR coating film, and then a p-type electrode was formed to connect with the contact region that had been converted to p-type by Zn diffusion. After adjusting the thickness of the substrate by grinding the back surface of the substrate, an n-type electrode was formed on the back surface of the n-type InP substrate, and contact annealing was performed. Thereafter, dicing was performed to obtain a chip size of 320 μm square, and the semiconductor light receiving element according to Example 1 was fabricated.

[0063] The average Zn concentration in the thickness direction of the InGaAs cap layer, which was converted to a p-type by Zn diffusion, was 5.0×10 19 / cm 3 The average Zn concentration in the thickness direction at the center of the Zn diffusion region in the n-type InP window layer was 5.0 × 10 18 / cm 3 In addition, the Zn concentration in the depth direction at the center of the Zn diffusion region was 1.0×10 18 / cm 3 The depth position below was 0.33 μm from the interface between the n-type InP window layer and the InGaAs optical absorption layer toward the InGaAs optical absorption layer. Figure 5 shows the Si concentration profile in the depth direction based on the SIMS analysis results of the InGaAs optical absorption layer after the cap layer and window layer were removed by etching.

[0064] <Example 2> n-type In 0.53 Ga 0.47 The Si concentration in the As light absorption layer (thickness: 3 μm) is set to 1×1015 / cm 3 From 9×10 14 / cm 3 Except for changing the above, a semiconductor light receiving element according to Example 2 was fabricated in the same manner as in Example 1. The results of SIMS analysis of the InGaAs light absorption layer measured in the same manner as in Example 1 are shown in FIG.

[0065] <Comparative Example 1> n-type In 0.53 Ga 0.47 A semiconductor light receiving element according to Comparative Example 1 was fabricated in the same manner as in Example 1, except that the As light absorbing layer (thickness: 3 μm) was undoped. In the SIMS analysis of Comparative Example 1, the Si detection limit of 2×10 14 / cm 3 It showed a value of about.

[0066] <Comparative Example 2> n-type In 0.53 Ga 0.47 The Si concentration in the As light absorption layer (thickness: 3 μm) is 3×10 15 / cm 3 A semiconductor light receiving element according to Comparative Example 2 was fabricated in the same manner as in Example 1, except for changing the above.

[0067] <Comparative Example 3> n-type In 0.53 Ga 0.47 The Si concentration in the As light absorption layer (thickness: 3 μm) is set to 1×10 16 / cm 3 A semiconductor light receiving element according to Comparative Example 3 was fabricated in the same manner as in Example 1, except for changing the above.

[0068] For each of Examples 1 and 2 and Comparative Examples 1 to 3, the capacitance, dark current, and breakdown voltage were measured as follows.

[0069] (Rating 1: Capacitance) The fabricated semiconductor photodetector was mounted on a metal stem (T0-18 type) using Ag paste. The Ag paste was made using Kyoto Elex model DD1760, and was bonded by baking at 180°C for 30 minutes. After that, the pad electrode on the top surface of the chip and one side of the metal stem were fixed with Au wire (wire bonding) to prepare a sample for measurement. The measurement equipment used was a Keysight model E4980A semiconductor parameter measurement equipment. A bias voltage of Vr = 5V was applied, and measurements were made using the two-terminal method at a measurement frequency of 1MHz.

[0070] (Evaluation 2: dark current, breakdown voltage) Measurement samples were prepared in the same way as in Evaluation 1, and were measured using a Keithley model 2635B source measure unit. Dark current was measured by applying a bias voltage of Vr=5V. Breakdown voltage was measured by applying a bias voltage in 1V steps from Vr=1V to 40V. Both dark current and breakdown voltage were measured using the two-terminal method.

[0071] The preparation conditions and measurement results for the above-mentioned Examples 1 and 2 and Comparative Examples 1 to 3 are shown in Table 2.

[0072] [Table 2]

[0073] From Table 2, it was confirmed that by forming a light absorption layer satisfying the conditions of the present invention, it is possible to fabricate a semiconductor light receiving element having a dark current value of less than 0.05 nA, a capacitance value of less than 4 pF, and a breakdown voltage value of more than 10 V.

[0074] <Example 3> n-type In 0.53 Ga 0.47When forming the As light absorption layer (thickness: 3 μm), the 2 μm-thick region on the undoped buffer layer side was left as an undoped second doped layer without flowing Si impurity gas, and the 1 μm-thick region above it was left as an undoped second doped layer with Si concentration of 1×10 15 / cm 3 The first doped layer is defined as having a Si concentration of 0, and the second doped layer is defined as having an average Si concentration of 3.3×10 14 / cm 3 A semiconductor light receiving element according to Example 3 was fabricated in the same manner as in Example 1, except that:

[0075] <Example 4> n-type In 0.53 Ga 0.47 When forming the As light absorption layer (thickness: 3 μm), the 2 μm-thick region on the undoped buffer layer side was left as an undoped second doped layer without flowing Si impurity gas, and the 1 μm-thick region above it was left as an undoped second doped layer with Si concentration of 3×10 15 / cm 3 The first doped layer is defined as having a Si concentration of 0, and the second doped layer is defined as having an average Si concentration of 1.0×10 15 / cm 3 A semiconductor light receiving element according to Example 4 was fabricated in the same manner as in Example 3, except that:

[0076] <Comparative Example 4> The thickness of the first doped layer was changed from 1.0 μm to 0.5 μm, the thickness of the second doped layer was changed from 2.0 μm to 2.5 μm, and the Si concentration in the second doped layer was considered to be zero. 0.53 Ga 0.47 The average Si concentration in the As optical absorption layer is 2×10, which is the lower limit of normal SIMS analysis. 14 / cm 3 Less than 1.7 × 10 14 / cm 3 A semiconductor light receiving element according to Comparative Example 4 was fabricated in the same manner as in Example 3, except that:

[0077] <Comparative Example 5> n-type In0.53 Ga 0.47 When forming the As light absorption layer (thickness: 3 μm), the 2 μm-thick region on the undoped buffer layer side was left as an undoped second doped layer without flowing Si impurity gas, and the 1 μm-thick region above it was left as an undoped second doped layer with Si concentration of 1×10 16 / cm 3 The first doped layer is defined as having a Si concentration of 0, and the second doped layer is defined as having an average Si concentration of 3.3×10 15 / cm 3 A semiconductor light receiving element according to Comparative Example 5 was fabricated in the same manner as in Example 3, except that:

[0078] The preparation conditions and measurement results for the above-mentioned Examples 3 and 4 and Comparative Examples 4 and 5 are shown in Table 3.

[0079] [Table 3]

[0080] From Table 3, it was confirmed that even when a light absorbing layer satisfying the conditions of the present invention is formed as a laminate, a semiconductor light receiving element having a dark current value of less than 0.05 nA, a capacitance value of less than 4 pF, and a breakdown voltage value of more than 10 V can be fabricated.

[0081] Below, we will describe a test in which the n-type impurity in the n-type InGaAs light absorption layer was changed from Si to Ge.

[0082] <Example 5> In Example 1, n-type In 0.53 Ga 0.47 The As light absorption layer (thickness: 3 μm) was doped with Si, but instead, Ge was doped to increase the average Ge concentration to 3.2 × 10 14 / cm 3 Except for the above, a semiconductor light receiving element according to Example 5 was fabricated in the same manner as in Example 1. The results of SIMS analysis of the InGaAs light absorption layer measured in the same manner as in Example 1 are shown in FIG.

[0083] <Example 6> n-type In 0.53 Ga 0.47 The average Ge concentration in the As light absorption layer (thickness: 3 μm) was set to 5.1 × 10 14 / cm 3 Except for the above, a semiconductor light receiving element according to Example 6 was fabricated in the same manner as in Example 5. The results of SIMS analysis of the InGaAs light absorption layer measured in the same manner as in Example 1 are shown in FIG.

[0084] <Example 7> n-type In 0.53 Ga 0.47 The average Ge concentration in the As light absorption layer (thickness: 3 μm) was set to 7.2 × 10 14 / cm 3 Except for the above, a semiconductor light receiving element according to Example 7 was fabricated in the same manner as in Example 5. The results of SIMS analysis of the InGaAs light absorption layer measured in the same manner as in Example 1 are shown in FIG.

[0085] <Comparative Example 6> n-type In 0.53 Ga 0.47 The average Ge concentration in the As light absorption layer (thickness: 3 μm) was set to 3.3 × 10 14 / cm 3 A semiconductor light receiving element according to Comparative Example 6 was fabricated in the same manner as in Example 5, except for the above.

[0086] The preparation conditions and measurement results for the above-mentioned Examples 5, 6, and 7 and Comparative Examples 1 and 6 are shown in Table 4.

[0087] [Table 4]

[0088] From Table 4, it was confirmed that even when Si was changed to Ge and a light absorbing layer satisfying the conditions of the present invention was formed as a laminate, it was possible to fabricate a semiconductor light receiving element having a dark current Ir value of less than 0.05 nA, a capacitance Cp value of less than 4 pF, and a breakdown voltage value of more than 10 V. Furthermore, from Examples 1 to 7, it was confirmed that when the concentration of the n-type impurity in the light absorbing layer satisfies the conditions of the present invention, a semiconductor light receiving element having a large breakdown voltage while achieving both a high capacitance and a high dark current value can be obtained. [Industrial Applicability]

[0089] INDUSTRIAL APPLICABILITY The semiconductor light receiving element according to the present invention is useful in that it can provide a semiconductor light receiving element having a large breakdown voltage while achieving both low capacitance and low dark current values, and a method for manufacturing the semiconductor light receiving element. [Explanation of symbols]

[0090] 100, 200, 300, 400 Semiconductor photodetector 110, 210, 310, 410 n-type InP substrate 120, 220, 320, 420 Buffer layer 130, 230, 330, 430 n-type InGaAs light absorption layer 431 First doped layer 432 Second doped layer 140, 240, 340, 440 InP window layer 150, 250, 350 p-type impurity diffusion region 151, 251, 351 Diffusion region in light absorbing layer 152, 252, 352 Diffusion area in window layer 260, 360 cap layer 270 AR coating layers 280 p type electrode 290 n-type electrode 370 Mask

Claims

1. an n-type InP substrate; a buffer layer on the n-type InP substrate; an n-type InGaAs light absorption layer on the buffer layer; an InP window layer on the n-type InGaAs light absorption layer; a p-type impurity diffusion region is formed in the InP window layer, the p-type impurity diffusion region reaching an upper portion of the n-type InGaAs light absorption layer, The n-type InGaAs light absorbing layer has an average n-type impurity concentration of 2.5×10 １４ / cm ３ Above 1.0 x 10 １５ / cm ３ Characterized in that Semiconductor photodetector.

2. The average n-type impurity concentration is 3.0×10 １４ / cm ３ Above 9.5 x 10 １４ / cm ３ Below is the 2. The semiconductor light-receiving element according to claim 1.

3. The p-type impurity contained in the p-type impurity diffusion region is Zn.

2. The semiconductor light-receiving element according to claim 1.

4. The n-type InGaAs light absorption layer is a stack of layers having different n-type impurity concentrations.

2. The semiconductor light-receiving element according to claim 1.

5. The n-type InGaAs light absorption layer has a thickness of 2.2 μm or more and 3.5 μm or less.

2. The semiconductor light-receiving element according to claim 1.

6. 6. The semiconductor light-receiving element according to claim 1, wherein the n-type impurity is Si or Ge.

7. a buffer layer forming step of forming a buffer layer on the n-type InP substrate; a light absorption layer forming step of forming an n-type InGaAs light absorption layer on the buffer layer; a window layer forming step of forming an n-type InP window layer on the n-type InGaAs light absorption layer; a diffusion region forming step of forming a p-type impurity diffusion region in the InP window layer, the p-type impurity diffusion region reaching an upper portion of the n-type InGaAs light absorption layer; A method for manufacturing a semiconductor light receiving element, comprising: The n-type InGaAs light absorbing layer formed in the light absorbing layer forming step has an average n-type impurity concentration of 2.5×10 １４ / cm ３ Above 1.0 x 10 １５ / cm ３ Characterized in that: A method for manufacturing a semiconductor light receiving element.

8. the diffusion region forming step includes forming the InP window layer in the window layer forming step, and then diffusing a p-type impurity from a surface side of the InP window layer in an MOCVD furnace; The method for manufacturing a semiconductor light-receiving element according to claim 7 .

9. The light absorbing layer forming step includes a step of forming a first doped layer having an n-type impurity concentration higher than the average n-type impurity concentration. forming a second doped layer having an n-type impurity concentration lower than the average n-type impurity concentration; The method for manufacturing a semiconductor light-receiving element according to claim 7 .

10. 10. The method for manufacturing a semiconductor light-receiving element according to claim 7, wherein the n-type impurity is Si or Ge.

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