Imaging device

The image pickup device with a flexible substrate and integrated light receiving and emitting elements addresses the challenges of convenience, reliability, and miniaturization, enabling effective biometric authentication and enhanced imaging performance.

JP2025037996APending Publication Date: 2025-03-18SEMICON ENERGY LAB CO LTD
View PDF 11 Cites 0 Cited by

Patent Information

Application Number
JP2024211644
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2018-10-11
Filing Date
2024-12-04
Publication Date
2025-03-18

AI Technical Summary

Technical Problem

Existing image pickup devices face challenges in achieving high convenience, reliability, and miniaturization while also serving as effective authentication devices, particularly in biometric applications.

Method used

The development of an image pickup device with a flexible substrate, a pixel array that includes both light receiving and light emitting elements, and an adhesive layer for secure mounting, utilizing organic compounds and metal oxide transistors for enhanced performance.

Benefits of technology

This solution provides a highly convenient and reliable image pickup device that can be easily integrated into various applications, including biometric authentication, while offering improved imaging capabilities and reduced power consumption.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025037996000001_ABST
    Figure 2025037996000001_ABST
Patent Text Reader

Abstract

To provide an imaging device with high convenience, an imaging device with high reliability, an authentication device with high convenience, or an authentication device with high reliability.SOLUTION: An imaging device includes a substrate, a pixel array, and an adhesive layer. The substrate has flexibility. The pixel array exists on a first surface of the substrate. The adhesive layer exists on a second surface facing the first surface of the substrate. The pixel array includes a light-receiving element and a light-emitting element. The light-receiving element has a function of detecting infrared light and includes a first pixel electrode, an active layer, and a common electrode. The light-emitting element has a function of emitting infrared light and includes a second pixel electrode, a light-emitting layer, and the common electrode. The active layer exists on the first pixel electrode and contains a first organic compound. The light-emitting layer exists on the second pixel electrode and contains a second organic compound that is different from the first organic compound. The common electrode includes a part overlapping with the first pixel electrode through the active layer and a part overlapping with the second pixel electrode through the light-emitting layer.SELECTED DRAWING: Figure 15
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] One aspect of the present invention relates to an imaging device and an authentication device.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. Examples of the technical field of one embodiment of the present invention disclosed in this specification and the like include a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, an electronic device, a lighting device, an input device, an input / output device, a driving method thereof, or a manufacturing method thereof. A semiconductor device refers to any device that can function by utilizing semiconductor characteristics. [Background technology]

[0003] Conventionally, imaging devices have been installed in devices such as digital cameras, but with the spread of mobile information terminals such as smartphones and tablet terminals, there is a demand for improved performance, smaller size, and lower cost. In addition, imaging devices are being used for a wide variety of purposes, including not only taking photos and videos, but also biometric authentication such as face recognition, fingerprint recognition, and vein recognition, and input devices such as touch sensors and motion sensors.

[0004] Imaging devices are also becoming more and more functional and functionally advanced. For example, Patent Document 1 discloses an imaging device that uses a transistor having an oxide semiconductor and an extremely low off-state current in a part of a pixel circuit, and uses a transistor having silicon that can be used to fabricate a complementary metal oxide semiconductor (CMOS) circuit in a peripheral circuit.

[0005] Patent Document 2 discloses an imaging device in which a transistor including silicon, a transistor including an oxide semiconductor, and a photodiode including a crystalline silicon layer are stacked. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2011-119711 A [Patent Document 2] JP 2013-243355 A Summary of the Invention [Problem to be solved by the invention]

[0007] An object of one embodiment of the present invention is to provide a highly convenient imaging device.An object of one embodiment of the present invention is to provide a highly reliable imaging device.An object of one embodiment of the present invention is to provide a novel imaging device.An object of one embodiment of the present invention is to provide a highly convenient authentication device.An object of one embodiment of the present invention is to provide a highly reliable authentication device.An object of one embodiment of the present invention is to provide a novel authentication device.

[0008] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these can be extracted from the description of the specification, drawings, claims, etc. [Means for solving the problem]

[0009] One embodiment of the present invention is an imaging device having a substrate, a pixel array, and an adhesive layer. The substrate is flexible, the pixel array is located on a first surface of the substrate, and the adhesive layer is located on a second surface opposite to the first surface of the substrate. The pixel array has a light receiving element and a light emitting element. The light receiving element has a function of detecting infrared light and has a first pixel electrode, an active layer, and a common electrode. The light emitting element has a function of emitting infrared light and has a second pixel electrode, a light emitting layer, and a common electrode. The active layer is located on the first pixel electrode, the active layer has a first organic compound, the light emitting layer is located on the second pixel electrode, and the light emitting layer has a second organic compound different from the first organic compound. The common electrode has a portion overlapping with the first pixel electrode via the active layer and a portion overlapping with the second pixel electrode via the light emitting layer.

[0010] One embodiment of the present invention is an imaging device having a substrate, a pixel array, and an adhesive layer. The substrate is flexible, the pixel array is located on a first surface of the substrate, and the adhesive layer is located on a second surface opposite to the first surface of the substrate. The pixel array has a light receiving element and a light emitting element. The light receiving element has a function of detecting infrared light, and has a first pixel electrode, a common layer, an active layer, and a common electrode. The light emitting element has a function of emitting infrared light, and has a second pixel electrode, a common layer, a light emitting layer, and a common electrode. The active layer is located on the first pixel electrode, and the active layer has a first organic compound. The light emitting layer is located on the second pixel electrode, and the light emitting layer has a second organic compound different from the first organic compound. The common layer is located on the first pixel electrode and the second pixel electrode, and has a portion overlapping with the active layer and a portion overlapping with the light emitting layer. The common electrode has a portion overlapping with the first pixel electrode via the common layer and the active layer, and a portion overlapping with the second pixel electrode via the common layer and the light-emitting layer.

[0011] In the imaging device described above, the pixel array preferably includes at least one of a transistor having a metal oxide in a channel formation region and a transistor having silicon in a channel formation region.

[0012] One aspect of the present invention is an authentication device having the aforementioned imaging device, a control unit, a memory unit, and an input / output unit, where the control unit, memory unit, and input / output unit are located on a first surface of a substrate, the imaging device has a function of capturing an image, the memory unit has a function of storing a registered image, the control unit has a function of matching the image with the registered image, the input / output unit has an antenna, the input / output unit has a function of outputting a result of the matching to the outside, and the input / output unit has a function of being supplied with power wirelessly.

[0013] It is preferable that the authentication device further comprises an external drive circuit, the external drive circuit being not in contact with the substrate, and the input / output unit has a function of outputting the result of the matching to the external drive circuit. Effect of the Invention

[0014] According to one aspect of the present invention, it is possible to provide a highly convenient imaging device. Or, it is possible to provide a highly reliable imaging device. Or, it is possible to provide a novel imaging device. Or, it is possible to provide a highly convenient authentication device. Or, it is possible to provide a highly reliable authentication device. Or, it is possible to provide a novel authentication device.

[0015] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. Note that effects other than these can be extracted from the description in the specification, drawings, claims, etc. [Brief description of the drawings]

[0016] [Figure 1] Fig. 1A is a block diagram illustrating an imaging device, and Fig. 1B and Fig. 1C are perspective views illustrating the imaging device. [Diagram 2] 2A and 2B are diagrams for explaining an imaging device, and Fig. 2C is an example of a vein image. [Diagram 3] 3A, 3B, and 3C are diagrams illustrating a pixel array. [Figure 4] 4A, 4B, and 4C are diagrams illustrating pixel circuits. [Diagram 5] 5A, 5B, and 5C are diagrams illustrating pixel circuits. [Figure 6] 6A, 6B, and 6C are diagrams illustrating pixel circuits. [Figure 7] 7A, 7B, and 7C are diagrams illustrating pixel circuits. [Figure 8] Fig. 8A is a diagram for explaining the rolling shutter method, and Fig. 8B is a diagram for explaining the global shutter method. [Figure 9] 9A and 9B are timing charts illustrating the operation of the pixel circuit. [Figure 10] 10A and 10B are diagrams illustrating a pixel circuit. [Figure 11]Fig. 11A is a block diagram illustrating an authentication device, and Fig. 11B is a perspective view illustrating the authentication device. [Figure 12] FIG. 12 is a flowchart illustrating the operation of the authentication device. [Figure 13] Figures 13A and 13B are diagrams showing an example of a door, and Figures 13C, 13D, and 13E are perspective views showing an example of an authentication device. [Figure 14] Figures 14A1 and 14B1 are diagrams showing an example of a doorknob, Figures 14A2, 14B2, and 14C are perspective views showing an example of an authentication device. [Figure 15] 15A, 15B, and 15C are cross-sectional views showing an example of an authentication device. [Figure 16] 16A, 16B, and 16C are cross-sectional views showing an example of an authentication device. [Figure 17] FIG. 17 is a cross-sectional view showing an example of an authentication device. [Figure 18] FIG. 18 is a cross-sectional view showing an example of an authentication device. [Figure 19] 19A and 19B are cross-sectional views showing an example of an authentication device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] Hereinafter, the embodiments will be described with reference to the drawings. However, it will be easily understood by those skilled in the art that the embodiments can be implemented in many different ways, and that the modes and details can be changed in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the following embodiments.

[0018] In the configuration of the invention described below, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings, and the repeated explanations are omitted. In addition, when referring to similar functions, the same hatch pattern may be used and no particular reference numeral may be used.

[0019] Even if a circuit diagram shows a single element, the element may be composed of multiple elements as long as there is no functional problem. For example, a transistor that operates as a switch may be connected in series or parallel in multiple units. Also, a capacitor (also called a capacitive element) may be divided and placed in multiple positions.

[0020] In addition, one conductor may have multiple functions such as wiring, electrode, and terminal, and in this specification, multiple names may be used for the same element. Even if elements are shown as being directly connected to each other on a circuit diagram, the elements may actually be connected to each other via multiple conductors, and in this specification, such a configuration is also included in the category of direct connection.

[0021] In addition, in each figure described in this specification, the size of each component, the thickness of a layer, or an area may be exaggerated for clarity, and therefore, the drawings are not necessarily limited to the scale.

[0022] In addition, ordinal numbers such as "first" and "second" in this specification are used to avoid confusion of components and do not limit the numbers.

[0023] (Embodiment 1) In this embodiment, an imaging device which is one embodiment of the present invention will be described with reference to FIGS.

[0024] One embodiment of the present invention is an imaging device having a light-emitting element, which emits light, and a light-receiving element included in a pixel circuit receives the light reflected from a subject.

[0025] By using elements that emit light with wavelengths in the infrared region (hereinafter referred to as infrared light) as light-emitting elements, it can be used for applications such as biometric authentication and defect analysis of industrial products. In addition, by using a pixel circuit that can capture images using the global shutter method, it is possible to obtain images without distortion even when the subject is moving.

[0026] In this specification, infrared light refers to light having a wavelength of, for example, 0.7 μm or more and 1000 μm or less. Furthermore, near-infrared light having a wavelength of 0.7 μm or more and 2.5 μm or less may be simply called infrared light.

[0027] 1A shows a block diagram illustrating an imaging device 20 of one embodiment of the present invention. The imaging device 20 includes a pixel array 21 having pixel circuits 10 arranged in a matrix, a circuit 22 (row driver) having a function of selecting a row of the pixel array 21, a circuit 23 having a function of reading data from the pixel circuits 10, and a circuit 28 that supplies a power supply potential. The pixel circuit 10 includes a light-emitting element 11.

[0028] The circuit 23 may include a circuit 24 (column driver) having a function of selecting a column of the pixel array 21, a circuit 25 (CDS circuit) for performing correlated double sampling processing on the output data of the pixel circuit 10, and a circuit 26 (A / D conversion circuit, etc.) having a function of converting the analog data output from the circuit 25 into digital data.

[0029] 1A shows an example of an external view of the imaging device 20. FIG. 1B is a perspective view of the imaging device 20. As shown in FIG. 1B, the imaging device 20 has a sheet-like shape and is flexible. The imaging device 20 has flexibility, so that the imaging device 20 can be installed on an object having a curved surface, such as a doorknob or a steering wheel of a car. In one embodiment of the present invention, the imaging device has flexibility, so that it can be used for a wider variety of applications and is highly convenient.

[0030] The imaging device 20 has an adhesive layer (not shown) on its surface, and the adhesive layer allows the imaging device 20 to be fixed to an object. Fig. 1C shows an example in which the imaging device 20 is installed on the curved surface of a cylindrical object 65. In one embodiment of the present invention, the imaging device has an adhesive layer, allowing it to be fixed to an existing object, making it a highly convenient imaging device.

[0031] An imaging device according to one embodiment of the present invention has a function of capturing an image of an object to be imaged by emitting infrared light to the object to be imaged that is close to or in contact with the imaging device and detecting the infrared light incident on the imaging device. Fig. 2A is an external view of imaging using an imaging device 20. For example, as shown in Fig. 2A, infrared light 12 is irradiated onto a hand 52 that is close to the imaging device 20, and infrared light 14 incident from the hand 52 on the imaging device 20 is detected and imaged. The imaging device 20 can also be said to be a reflection type imaging device.

[0032] An enlarged view of an area P surrounded by a dashed line in Fig. 2A is shown in Fig. 2B. Fig. 2B shows a schematic cross-sectional view of a pixel array 21 included in the imaging device 20. The pixel array 21 has a pixel circuit 10 between a substrate 51 and a substrate 59. The pixel circuit 10 has a layer 55 having a light receiving element 13, a light emitting element 11, and a transistor, and infrared light 12 is emitted from the light emitting element 11, and the light receiving element 13 detects infrared light 14 that is incident on the pixel array 21.

[0033] It is preferable that the substrate 51 and the substrate 59 each have flexibility. This can increase the flexibility of the imaging device 20. It is also preferable that an adhesive layer 57 is provided on the surface of the substrate 51 on which the layer 55 having a transistor is not provided. For example, the adhesive layer 57 can be provided on the surface of the substrate 51 opposite to the surface on which the layer 55 is provided. The adhesive layer 57 can fix the imaging device 20 to an object, making it a highly convenient imaging device.

[0034] The layer 55 having transistors preferably has a first transistor and a second transistor. The first transistor is electrically connected to the light receiving element 13. The second transistor is electrically connected to the light emitting element 11.

[0035] The layer 55 having transistors includes transistors, wirings electrically connected to the transistors, and the like. In the imaging device of one embodiment of the present invention, the light-receiving element 13 and the light-emitting element 11 are provided over the layer 55 having transistors, so that infrared light 12 emitted from the light-emitting element 11 and infrared light 14 incident on the light-receiving element 13 can be prevented from being blocked by the wirings and the like, and imaging can be performed efficiently. As a result, the imaging device has low power consumption.

[0036] The imaging device according to one embodiment of the present invention can be suitably used for imaging the veins of a hand, for example. As shown in FIG. 2B, the infrared light 12 emitted from the light-emitting element 11 is scattered by the surface and internal biological tissues of the hand 52, and some of the scattered light travels from inside the body toward the light-receiving element 13. This backscattered light 63 passes through the vein 61 and enters the light-receiving element 13. The vein 61 contains a large amount of hemoglobin that does not contain oxygen (also called reduced hemoglobin) and hemoglobin that contains oxygen (also called oxygenated hemoglobin). In particular, reduced hemoglobin absorbs light with a wavelength of about 760 nm in the infrared light region, so that the amount of infrared light that passes through the vein 61 is reduced, and a vein image D0 can be captured. An example of the vein image D0 is shown in FIG. 2C.

[0037] 2A and 2B show an example in which the hand 52, which is the object to be imaged, is not in contact with the imaging device 20, but the hand 52 may be in contact with the imaging device 20. For example, a spacer may be provided on the upper surface of the imaging device 20 so that the object to be imaged and the imaging device 20 do not come into contact. By configuring the object to be imaged and the imaging device 20 not to come into contact, it is possible to prevent the surface of the imaging device 20 from becoming dirty and to prevent the dirt from appearing during imaging. Furthermore, by configuring the object to be imaged and the imaging device 20 to come into contact, it is possible to prevent stray light from entering the imaging device 20 during imaging and to prevent the stray light from appearing in the captured image.

[0038] In addition, when resolution is not important, a configuration may be used that has pixel circuits 10 that do not include light-emitting elements 11. For example, as shown in FIG. 3A, the light-emitting elements 11 may be arranged in every other column of the pixel circuits 10. Alternatively, the light-emitting elements 11 may be arranged in every several columns of the pixel circuits 10. For example, as shown in FIG. 3B, the light-emitting elements 11 may be arranged in every other row of the pixel circuits 10. Alternatively, the light-emitting elements 11 may be arranged in every several rows of the pixel circuits 10. For example, as shown in FIG. 3C, the light-emitting elements 11 may be arranged in a staggered pattern.

[0039] The circuit configuration of a pixel circuit that can be used in an imaging device of one embodiment of the present invention will be described.

[0040] 4A is a circuit diagram illustrating a pixel circuit 10 and a light-emitting element 11. The pixel circuit 10 can include a light-receiving element 101, a transistor 103, a transistor 104, a transistor 105, a transistor 106, and a capacitor 108. Note that a configuration in which the capacitor 108 is not provided is also possible.

[0041] One electrode (cathode) of the light receiving element 101 is electrically connected to one of the source or drain of the transistor 103. The other of the source or drain of the transistor 103 is electrically connected to one of the source or drain of the transistor 104. The one of the source or drain of the transistor 104 is electrically connected to one electrode of the capacitor 108. One electrode of the capacitor 108 is electrically connected to the gate of the transistor 105. The one of the source or drain of the transistor 105 is electrically connected to one of the source or drain of the transistor 106.

[0042] Here, a wiring that connects the other of the source and the drain of the transistor 103, one electrode of the capacitor 108, and the gate of the transistor 105 is a node FD. The node FD can function as a charge storage portion.

[0043] The other electrode (anode) of the light receiving element 101 is electrically connected to a wiring 121. The gate of the transistor 103 is electrically connected to a wiring 127. The other of the source or drain of the transistor 104 and the other of the source or drain of the transistor 105 are electrically connected to a wiring 122. The gate of the transistor 104 is electrically connected to a wiring 126. The gate of the transistor 106 is electrically connected to a wiring 128. The other electrode of the capacitor 108 is electrically connected to a reference potential line such as a GND wiring. The other of the source or drain of the transistor 106 is electrically connected to a wiring 129.

[0044] 4A, one electrode of the light-emitting element 11 is electrically connected to the wiring 130. The other electrode of the light-emitting element 11 is electrically connected to a reference potential line such as a GND wiring. In this configuration, since there is no electrical connection between the pixel circuit 10 and the light-emitting element 11, the input potential to the light-emitting element 11 and the timing of light emission can be controlled independently.

[0045] The wirings 127 and 128 can function as signal lines for controlling the conduction of each transistor, and the wiring 129 can function as an output line.

[0046] The wirings 121, 122, and 130 can function as power supply lines. In the configuration shown in Fig. 4A, the cathode side of the light-receiving element 101 is electrically connected to the transistor 103, and the node FD is reset to a high potential for operation, so the wiring 122 has a high potential (a higher potential than the wiring 121). The wiring 130 has a function of supplying a forward bias to the light-emitting element 11 to supply a potential for causing the light-emitting element 11 to emit light.

[0047] 4B shows a configuration in which one electrode of the light-emitting element 11 is electrically connected to the wiring 122. This configuration can be used when the reset potential of the node FD, the power supply potential supplied to the transistor 105, and the input potential of the light-emitting element 11 can be made common.

[0048] As shown in FIG. 4C, a transistor 107 may be added to the configuration in FIG. 4B. One of the source and the drain of the transistor 107 is electrically connected to one electrode of the light-emitting element 11. The other of the source and the drain of the transistor 107 is electrically connected to a wiring 122. The gate of the transistor 107 is electrically connected to a wiring 127. With this configuration, the light-emitting period can be limited to only the period during which the transistor 103 is conductive, thereby reducing power consumption. The periods during which the transistor 103 needs to be conductive are only the reset operation period and the accumulation operation period for the node FD, and unnecessary light emission during a read operation period, etc. can be suppressed.

[0049] 5A, a resistive element 109 may be electrically connected between one electrode of the light-emitting element 11 and the wiring 122. The resistive element 109 acts as a current limiting resistor and can limit the current flowing through the light-emitting element 11, thereby improving the reliability of the light-emitting element 11. The resistance value of the resistive element 109 may be selected appropriately in accordance with the electrical characteristics of the light-emitting element 11.

[0050] 5B, the transistor 107 shown in FIG. 4C may be used instead of the resistor 109. In this configuration, the gate of the transistor 107 is electrically connected to a wiring 131. Therefore, by varying the potential of the wiring 131, the illuminance and light emission timing of the light-emitting element 11 can be arbitrarily controlled, and power consumption can be reduced.

[0051] 5C , a structure may be used in which a transistor 107 is provided, the other of the source and the drain of the transistor 107 is electrically connected to a wiring 130, and the gate of the transistor 107 is electrically connected to a wiring 127. In this structure, an input potential to the light-emitting element 11 is controlled by the wiring 130, and the timing of light emission is controlled by the wiring 127.

[0052] In addition, although Figures 4A to 4C and Figures 5A to 5C show a configuration in which the cathode of the light receiving element 101 is electrically connected to node FD, a configuration in which the anode of the light receiving element 101 is electrically connected to node FD may also be used as shown in Figures 6A to 6C and Figures 7A to 7C.

[0053] 6A to 6C and 7A to 7C, one electrode of the light-receiving element 101 is electrically connected to the wiring 122, and the other electrode of the light-receiving element 101 is electrically connected to one of the source and drain of the transistor 103. In addition, the other of the source and drain of the transistor 104 is electrically connected to the wiring 132.

[0054] 6A to 6C and 7A to 7C, the anode side of the light-receiving element 101 is electrically connected to the transistor 103 and the node FD is reset to a low potential for operation;

[0055] For an explanation of the connection forms between the light emitting element 11 and its peripheral elements shown in FIGS. 6A to 6C and FIGS. 7A to 7C, the explanations for FIGS. 4A to 4C and FIGS. 5A to 5C can be referred to.

[0056] A photodiode can be used as the light receiving element 101. In one embodiment of the present invention, imaging is performed using infrared light. Therefore, a photodiode capable of photoelectric conversion of infrared light is used as the light receiving element 101. For example, a pn junction photodiode using single crystal silicon for a photoelectric conversion portion, a pin type photodiode using polycrystalline silicon or microcrystalline silicon for a photoelectric conversion layer, or the like can be used. Alternatively, a material capable of photoelectric conversion of infrared light, such as a compound semiconductor, may be used.

[0057] In one embodiment of the present invention, an organic photodiode having a layer containing an organic compound can be suitably used as the light-receiving element 101. An organic photodiode can be easily made thin, lightweight, and large in area, and has a high degree of freedom in shape and design, and therefore can be applied to various imaging devices.

[0058] The transistor 103 has a function of controlling the potential of the node FD. The transistor 104 has a function of resetting the potential of the node FD. The transistor 105 functions as a source follower circuit and can output the potential of the node FD as image data to the wiring 129. The transistor 106 has a function of selecting a pixel to which image data is output.

[0059] It is preferable to use, as the transistors 103 and 104, transistors whose channel formation regions include metal oxide (hereinafter, referred to as OS transistors). OS transistors have characteristics of extremely low off-state current. By using OS transistors as the transistors 103 and 104, the period during which charge can be held at the node FD can be extremely long. Therefore, a global shutter system in which charge is accumulated simultaneously in all pixels can be applied without complicating the circuit configuration or operation method. In addition, a highly reliable imaging device can be provided.

[0060] Fig. 8A is a schematic diagram of the operation method of the rolling shutter method, and Fig. 8B is a schematic diagram of the operation method of the global shutter method. En represents the exposure (accumulation operation) of the nth column (n is a natural number), and Rn represents the readout operation of the nth column. Figs. 8A and 8B show the operations from the 1st row to the Mth row (M is a natural number).

[0061] The rolling shutter method is an operation method in which exposure and data readout are performed sequentially, overlapping the readout period of one row with the exposure period of another row. Since the readout operation is performed immediately after exposure, imaging can be performed even with a circuit configuration in which the data retention period is relatively short. However, since one frame of image is composed of data that is not captured simultaneously, distortion occurs in the image when capturing a moving object.

[0062] On the other hand, the global shutter method is a method of operation in which all pixels are exposed simultaneously, data is stored in each pixel, and the data is read out row by row, making it possible to obtain images without distortion even when capturing a moving object.

[0063] When a pixel circuit uses a transistor with a relatively high off-state current, such as a transistor that uses Si in the channel formation region (hereinafter referred to as Si transistor), the rolling shutter method is used because the data potential tends to leak out from the charge storage section. To achieve the global shutter method using Si transistors, a separate memory circuit must be installed, and more complex operations must be performed at high speed. On the other hand, when an OS transistor is used in the pixel circuit, the data potential hardly leaks out from the charge storage section, so the global shutter method can be easily achieved.

[0064] Note that OS transistors may also be used for the transistors 105 and 106. All of the transistors included in the imaging device of one embodiment of the present invention may be OS transistors or Si transistors. By using one type of transistor such as OS transistors for all of the transistors included in the imaging device, a manufacturing process of the imaging device can be simplified. Thus, the manufacturing cost of the imaging device can be reduced. Any combination of OS transistors and Si transistors may also be used. Examples of Si transistors include transistors having amorphous silicon and transistors having crystalline silicon (typically, low-temperature polysilicon, single crystal silicon, or the like).

[0065] It is preferable to use an EL element such as an OLED (Organic Light Emitting Diode) or a QLED (Quantum-dot Light Emitting Diode) as the light-emitting element 11. Examples of light-emitting materials that the EL element has include a material that emits fluorescence (fluorescent material), a material that emits phosphorescence (phosphorescent material), an inorganic compound (such as a quantum dot material), and a material that exhibits thermally activated delayed fluorescence (thermally activated delayed fluorescence: TADF material). Also, an LED such as a micro LED (Light Emitting Diode) can be used as the light-emitting element.

[0066] In one embodiment of the present invention, an EL element can be suitably used as the light-emitting element 11. An element that emits infrared light can be used as the EL element. In particular, an EL element that emits near-infrared light having a peak wavelength of 700 nm or more and 2500 nm or less is preferable. For example, light with a wavelength of 760 nm or thereabouts is easily absorbed by reduced hemoglobin in veins, so that the position of the vein can be detected by receiving reflected light from the palm or fingers and imaging it. This action can be used for biometric authentication. In addition, near-infrared light of an appropriate wavelength can be used for non-destructive testing such as foreign object inspection in food and defect analysis of industrial products. In addition, by combining with a global shutter method, highly accurate sensing is possible even if the subject moves.

[0067] By using an EL element as the light emitting element 11, a thin light source-equipped imaging device can be realized, which can be easily mounted on various devices and can improve portability.

[0068] In one embodiment of the present invention, an organic EL element is used as a light-emitting element, and an organic photodiode is used as a light-receiving element. Many layers of an organic photodiode can be configured in common with an organic EL element. Therefore, a light-receiving element can be built into an imaging device without significantly increasing the number of manufacturing steps. For example, an active layer of the light-receiving element and a light-emitting layer of the light-emitting element can be separately manufactured, and the other layers can be configured in the same manner for the light-emitting element and the light-receiving element.

[0069] Next, an example of the operation of the pixel circuit 10 shown in Figures 4A to 4C and Figures 5A to 5C will be described with reference to the timing chart in Figure 9A. In the description of the timing chart in this specification, a high potential is represented by "H" and a low potential is represented by "L." It is assumed that "L" is constantly supplied to the wiring 121 and "H" is constantly supplied to the wiring 122.

[0070] In addition, the light emitting element 11 is in a state where a power supply potential for appropriately emitting light is supplied to the light emitting element 11 at least during the storage operation period.

[0071] In a period T1, when the potential of the wiring 126 is set to "H", the potential of the wiring 127 is set to "H", and the potential of the wiring 128 is set to "L", the transistors 103 and 104 are turned on, and the potential of the wiring 122 is supplied to the node FD at "H" (reset operation).

[0072] In a period T2, when the potential of the wiring 126 is set to "L", the potential of the wiring 127 is set to "H", and the potential of the wiring 128 is set to "L", the transistor 104 is turned off and the supply of the reset potential is cut off. Also, the potential of the node FD decreases in response to the operation of the light receiving element 101 (accumulation operation).

[0073] In the period T3, when the potential of the wiring 126 is set to "L", the potential of the wiring 127 is set to "L", and the potential of the wiring 128 is set to "L", the transistor 103 is turned off, and the potential of the node FD is determined and held (holding operation). At this time, by using OS transistors with low off-state current as the transistors 103 and 104 connected to the node FD, unnecessary outflow of charge from the node FD can be suppressed, and the data retention time can be extended.

[0074] In a period T4, when the potential of the wiring 126 is set to "L", the potential of the wiring 127 is set to "L", and the potential of the wiring 128 is set to "H", the transistor 106 is turned on, and the potential of the node FD is read to the wiring 129 by the source follower operation of the transistor 105 (read operation).

[0075] The above is an example of the operation of the pixel circuit 10 shown in FIGS. 4A to 4C and 5A to 5C.

[0076] The pixel circuit 10 shown in Figures 6A to 6C and 7A to 7C can be operated according to the timing chart of Figure 9B. Note that it is assumed that "H" is constantly supplied to the wiring 122 and "L" is constantly supplied to the wiring 132. The basic operation is the same as that described above with reference to the timing chart of Figure 9A.

[0077] In one embodiment of the present invention, a transistor may have a back gate as illustrated in Fig. 10A and Fig. 10B. Fig. 10A shows a structure in which the back gate is electrically connected to the front gate, which has the effect of increasing the on-state current. Fig. 10B shows a structure in which the back gate is electrically connected to a wiring that can supply a constant potential, which allows the threshold voltage of the transistor to be controlled.

[0078] A configuration in which each transistor can operate appropriately, such as a combination of Figures 10A and 10B, may be used. Also, the pixel circuit may have a transistor that does not have a back gate. Note that the configuration in which a transistor has a back gate can be applied to all of the configurations shown in Figures 4A to 4C, Figures 5A to 5C, Figures 6A to 6C, and Figures 7A to 7C.

[0079] At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be implemented in appropriate combination with other configuration examples or drawings.

[0080] This embodiment mode can be implemented by appropriately combining at least a part of it with other embodiment modes described in this specification.

[0081] (Embodiment 2) In this embodiment, an authentication device of one embodiment of the present invention will be described with reference to FIGS.

[0082] 11A shows a block diagram of authentication device 80. Authentication device 80 has at least an imaging unit 81, a control unit 82, a storage unit 83, and an input / output unit 85 in an authentication unit 86. A program 84 is stored in storage unit 83. Authentication device 80 may further have an external drive circuit 87.

[0083] An example of an external view of the authentication device 80 is shown. FIG. 11B is a perspective view of the authentication device 80. As shown in FIG. 11B, the authentication unit 86 has a sheet-like shape and is flexible. Since the authentication unit 86 has flexibility, it can be installed on an object having a curved surface, such as a doorknob or a steering wheel of a car. In addition, the authentication unit 86 has an adhesive layer (not shown) on the surface. Since the authentication unit 86 has an adhesive layer, it can be fixed to an object, and the authentication device 80 can be made highly convenient. For example, an adhesive layer can be provided on the surface of the authentication unit 86 opposite to the surface on which the imaging unit 81 is provided.

[0084] The imaging unit 81 has a function of capturing an image. The imaging unit 81 can be a semiconductor device in which light-emitting elements and light-receiving elements are arranged in a matrix. It is preferable that the imaging unit 81 uses a light-emitting element that emits infrared light and a light-receiving element that detects infrared light. For example, the imaging unit 81 can be suitably used as the imaging device 20 described above.

[0085] The storage unit 83 has a function of storing at least a program 84. The storage unit 83 can output stored data to the control unit 82 or store data in response to a request from the control unit 82. The program 84 stored in the storage unit 83 is read out and executed by the control unit 82.

[0086] The storage unit 83 may be, for example, a storage device using a nonvolatile storage element such as a flash memory, MRAM (Magnetoresistive Random Access Memory), PRAM (Phase change RAM), ReRAM (Resistive RAM), or FeRAM (Ferroelectric RAM), or a storage device using a volatile storage element such as DRAM (Dynamic RAM) or SRAM (Static RAM). Also, a recording media drive such as a hard disk drive (HDD) or a solid state drive (SSD) may be used.

[0087] The memory unit 83 is preferably configured using an OS transistor. Since an OS transistor has an extremely low off-state current, the OS transistor can be used as a switch for retaining charge (data) flowing into a capacitive element functioning as a memory element, thereby ensuring a long data retention period. This allows the authentication device to have high reliability.

[0088] A storage device such as an HDD or SSD that is detachable by a connector via an external interface, or a media drive for a recording medium such as a flash memory, Blu-ray (registered trademark) Disk, or DVD can also be used as the storage unit 83. Note that the storage unit 83 does not need to be built into the authentication device 80, and an external storage device may be used as the storage unit 83. In that case, the storage unit 83 may be connected via an external interface, or may exchange data wirelessly via a communication module.

[0089] The program 84 may be stored in an external server. In this case, when the user accesses the server, a part or all of the program 84 may be temporarily, permanently, or semi-permanently stored in the storage unit 83 (for example, when a period or number of times the program can be used is set), and the control unit 82 may execute the program.

[0090] The control unit 82 has a function of comprehensively controlling each component such as the imaging unit 81, the storage unit 83, and the input / output unit 85.

[0091] The control unit 82 performs various data processing and program control by interpreting and executing commands from various programs by the processor. Programs that can be executed by the processor are read from the storage unit 83, temporarily stored in a memory area of ​​the processor, and executed.

[0092] It is preferable to use transistors using metal oxide in their channel formation regions (hereinafter, referred to as OS transistors) for the control unit 82. By using OS transistors in the registers and cache memories of the control unit 82, the control unit 82 operates only when necessary, and at other times, information from the immediately previous process is saved in a memory element, thereby enabling the authentication device 80 to consume less power.

[0093] As the control unit 82, in addition to a central processing unit (CPU), other microprocessors such as a digital signal processor (DSP) and a graphics processing unit (GPU) can be used alone or in combination. Furthermore, these microprocessors may be realized by a programmable logic device (PLD) such as a field programmable gate array (FPGA) or a field programmable analog array (FPAA).

[0094] The input / output unit 85 has a function of inputting and outputting data to the outside. The input / output unit 85 has an antenna 88, and receives a wireless signal from the external drive circuit 87 through the antenna 88, and transmits a wireless signal to the external drive circuit 87. For example, the input / output unit 85 can connect the authentication device 80 to an external device via a cable. Alternatively, the input / output unit 85 may have a terminal for connecting to a LAN (Local Area Network), a terminal for connecting an AC adapter, or the like. Furthermore, the input / output unit 85 may be configured to have a transceiver for optical communication using infrared light, visible light, ultraviolet light, or the like, in addition to a wired communication.

[0095] The input / output unit 85 may be configured to receive power wirelessly from an antenna 88. Note that the shape and number of turns of the antenna 88 shown in Fig. 11B are merely examples, and one embodiment of the present invention is not limited thereto. For example, the antenna 88 may be in a wire or plate shape in addition to the coil shape shown in Fig. 11B.

[0096] The external drive circuit 87 can send a signal to the managed object to be operated only when the user has been authenticated by the authentication device 80, and can operate the managed object. For example, if the managed object is a door with an electronic lock, the external drive circuit 87 can send an unlocking signal to the door and open the door. For example, if the managed object is an automobile, the external drive circuit 87 can send an unlocking signal to the automobile and open the door. For example, if the managed object is an automobile or a moped, the external drive circuit 87 can send an engine start signal to the automobile or the moped and start the engine of the automobile or the moped.

[0097] In addition to a CPU, other microprocessors such as a DSP or GPU can be used alone or in combination as the external driver circuit 87. These microprocessors may also be realized by PLDs such as FPGAs and FPGAs.

[0098] All the transistors in the authentication device according to one embodiment of the present invention may be OS transistors or Si transistors. By using one type of transistor, such as OS transistors, for all the transistors in the authentication device, the manufacturing process of the authentication device can be simplified. Therefore, the manufacturing cost of the authentication device can be reduced. In addition, any combination of OS transistors and Si transistors may be used.

[0099] Next, an example of the operation of the authentication device 80 will be described with reference to the flowchart of Fig. 12. Fig. 12 shows an example of capturing an image of veins and performing authentication using the captured vein image. Fig. 12 also shows an example of pattern matching in which the patterns of the vein images are compared for determination, but one aspect of the present invention is not limited to this. A minutia method that utilizes feature points (Minutia), such as end points and branch points of the vein image pattern, may also be used.

[0100] First, in step S61, the control unit 82 requests the imaging unit 81 to perform an imaging operation, and in response to this, the imaging unit 81 captures an image and outputs the obtained vein image D0 to the control unit 82 (it can also be said that the control unit 82 reads out the vein image D0 from the imaging unit 81). The control unit 82 may store the vein image D0 in the storage unit 83, or may hold it within the control unit 82.

[0101] Next, in step S62, the control unit 82 reads out the program 84 from the storage unit 83 and executes it to correct the vein image D0 and generate a new vein image D1. The correction includes correcting the position of the subject in the image, correcting image unevenness caused by noise and stray light during imaging, etc. When the minutia method is used, feature points of the vein image D1 are extracted.

[0102] Next, in step S63, a mode is selected from a registration mode or a verification mode. The registration mode is selected when the user's vein image is to be registered in the authentication device 80. The verification mode is selected when the user's vein image is already registered in the authentication device 80 and is to be verified against the vein image.

[0103] In the case of the registration mode, in step S64, the control unit 82 stores the vein image D1 in the storage unit 83. Thereafter, the vein image D1 stored in the storage unit 83 is referred to as a registration image D T Alternatively, the control unit 82 may output the vein image D1 to the input / output unit 85. When the minutia method is used, the feature points are stored in the storage unit 83. Alternatively, the feature points may be output to the input / output unit 85.

[0104] In the case of the verification mode, in step S65, the control unit 82 T The control unit 82 reads out from the storage unit 83 and compares it with the vein image D1 generated in step S62. T If exists, all registered images D T may be compared with the vein image D1. When the minutia method is used, the control unit 82 compares feature points.

[0105] Next, in step S66, a determination is made. T If the registered image D1 matches the vein image D2, the authentication is determined. T If the registered image D1 does not match the vein image D2, it is determined that the user is not authenticated. If the user is determined to be not authenticated, the process may be terminated. T If it is not possible to clearly determine whether or not the vein image D1 matches the vein image D1, it is determined that a re-determination is required. If it is determined that a re-determination is required, the process returns to step S61, and the vein image may be captured again.

[0106] If it is determined that authentication has been performed, then in step S67, the control unit 82 outputs an authentication signal to the input / output unit 85, and the input / output unit 85 sends an authentication signal to the external drive circuit 87 in response.

[0107] The program 84 includes a program for causing the control unit 82 to execute the image processing and matching described above.

[0108] Next, a method for unlocking a door using the authentication device 80 will be described.

[0109] An example of a door used in a building is shown in Figure 13A, and an enlarged view of the area surrounded by a dashed line in Figure 13A is shown in Figure 13B. Door 91 shown in Figures 13A and 13B has a doorknob 93 and an electronic lock 95. Electronic lock 95 has the function of electrically activating a latch (deadbolt) 96 to unlock and lock the door.

[0110] 13C shows an example in which authentication unit 86 of an authentication device according to an embodiment of the present invention is installed on a doorknob 93. Authentication unit 86 is flexible and has adhesive layer 57 on its surface, so it can be easily installed on doorknob 93. It is preferable that authentication unit 86 is installed over a wide area of ​​doorknob 93. By installing authentication unit 86 over a wide area of ​​doorknob 93, the contact area between the user's hand and authentication unit 86 becomes larger, and the accuracy of authentication can be improved.

[0111] The external drive circuit 87 is connected to the electronic lock 95 by a signal cable (not shown), and a signal is sent from the external drive circuit 87 to the electronic lock 95 .

[0112] Fig. 13D shows a state in which a user is gripping doorknob 93 and authentication unit 86 is in contact with hand 52. As described above, authentication unit 86 takes an image of the veins of user's hand 52 and compares it. If the comparison results in authentication, authentication unit 86 sends an authentication signal to external drive circuit 87, and external drive circuit 87 sends an unlocking signal to electronic lock 95. Electronic lock 95 can open door 91 by operating latch 96 to unlock it (Fig. 13E). Since authentication device 80 can be easily installed, it can also be easily installed on an existing door, for example, which can enhance security.

[0113] 13A to 13E show a doorknob 93 that is held vertically, but the doorknob 93 on which the authentication device according to one aspect of the present invention can be installed is not limited to this. For example, the authentication device can also be suitably used on a doorknob 93 that is held horizontally as shown in Figs. 14A1 and 14A2. For example, the authentication device can also be suitably used on a cylindrical doorknob 93 as shown in Figs. 14B1 and 14B2.

[0114] The authentication device according to one aspect of the present invention can also be installed in an automobile. FIG. 14C shows an example in which the authentication unit 86 is installed in the door 97 of the automobile 5700. The external drive circuit 87 is installed in a control unit (not shown) of the automobile 5700. The door 97 of the automobile 5700 may have a curved surface. The authentication unit 86 is flexible and has an adhesive layer 57 on its surface, so that it can be easily installed in the door 97 having a curved surface. A user places his / her hand 52 in contact with the authentication unit 86, and the authentication unit 86 captures and collates a vein image of the user's hand 52. If authentication is confirmed as a result of the collation, the authentication unit 86 sends an authentication signal to the external drive circuit 87, and the external drive circuit 87 sends an authentication signal to the control unit of the automobile 5700. The control unit of the automobile 5700 can open the door 97 by operating and unlocking the lock on the door knob 98. The control unit of the automobile 5700 may also be in a state in which the engine can be operated by receiving the authentication signal.

[0115] The location of the authentication unit 86 is not limited to the door of the vehicle. It may be installed on the dashboard or steering wheel, and the engine may be allowed to operate only when authentication is completed.

[0116] At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be implemented in appropriate combination with other configuration examples or drawings.

[0117] This embodiment mode can be implemented by appropriately combining at least a part of it with other embodiment modes described in this specification.

[0118] (Embodiment 3) In this embodiment, an authentication device of one embodiment of the present invention will be described with reference to FIGS.

[0119] A detailed configuration of an authentication device according to one aspect of the present invention will be described below with reference to FIGS.

[0120] [Authentication device 80A] FIG. 15A shows a cross-sectional view of authentication device 80A.

[0121] The authentication device 80 A includes a light receiving element 110 and a light emitting element 190 .

[0122] The light receiving element 110 includes a pixel electrode 111 , a common layer 112 , an active layer 113 , a common layer 114 , and a common electrode 115 .

[0123] The light emitting element 190 includes a pixel electrode 191 , a common layer 112 , a light emitting layer 193 , a common layer 114 , and a common electrode 115 .

[0124] The pixel electrode 111, the pixel electrode 191, the common layer 112, the active layer 113, the light-emitting layer 193, the common layer 114, and the common electrode 115 may each have a single-layer structure or a multilayer structure.

[0125] The pixel electrode 111 and the pixel electrode 191 are located on an insulating layer 214. The pixel electrode 111 and the pixel electrode 191 can be formed of the same material and in the same process.

[0126] The common layer 112 is located on the pixel electrodes 111 and 191. The common layer 112 is a layer shared by the light receiving element 110 and the light emitting element 190.

[0127] The active layer 113 overlaps with the pixel electrode 111 through the common layer 112. The light-emitting layer 193 overlaps with the pixel electrode 191 through the common layer 112. The active layer 113 has a first organic compound, and the light-emitting layer 193 has a second organic compound different from the first organic compound.

[0128] The common layer 114 is located on the common layer 112, on the active layer 113, and on the light-emitting layer 193. The common layer 114 is a layer that is used in common by the light-receiving element 110 and the light-emitting element 190.

[0129] The common electrode 115 has a portion overlapping with the pixel electrode 111 via the common layer 112, the active layer 113, and the common layer 114. The common electrode 115 also has a portion overlapping with the pixel electrode 191 via the common layer 112, the light-emitting layer 193, and the common layer 114. The common electrode 115 is a layer shared by the light-receiving element 110 and the light-emitting element 190.

[0130] In the authentication device of this embodiment, an organic compound is used for the active layer 113 of the light receiving element 110. The layers of the light receiving element 110 other than the active layer 113 can have a common configuration with the light emitting element 190 (EL element). Therefore, the light receiving element 110 can be formed in parallel with the formation of the light emitting element 190 by simply adding a process of forming the active layer 113 to the manufacturing process of the light emitting element 190. In addition, the light emitting element 190 and the light receiving element 110 can be formed on the same substrate. Therefore, the light receiving element 110 can be built into the authentication device without significantly increasing the number of manufacturing processes.

[0131] In the authentication device 80A, the light receiving element 110 and the light emitting element 190 have a common configuration, except that the active layer 113 of the light receiving element 110 and the light emitting layer 193 of the light emitting element 190 are separately manufactured. However, the configuration of the light receiving element 110 and the light emitting element 190 is not limited to this. The light receiving element 110 and the light emitting element 190 may have layers that are separately manufactured in addition to the active layer 113 and the light emitting layer 193 (see authentication devices 80D, 80E, and 80F described later). It is preferable that the light receiving element 110 and the light emitting element 190 have one or more layers that are used in common (common layers). This allows the light receiving element 110 to be built into the authentication device without significantly increasing the number of manufacturing steps.

[0132] The authentication device 80A has a light receiving element 110, a light emitting element 190, a transistor 41, a transistor 42, and the like between a pair of substrates (substrate 151 and substrate 152).

[0133] An adhesive layer 150 is provided on the outside of the substrate 151. The authentication device 80A can be fixed to an object by the adhesive layer 150. A peelable adhesive may be used as the adhesive layer 150. Furthermore, an adhesive that can be reattached after peeling may be used. The adhesive layer 150 may be made of epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, EVA (ethylene vinyl acetate) resin, or the like. In particular, a material with low moisture permeability such as epoxy resin is preferable. A two-part mixed resin may also be used. An adhesive sheet or the like may also be used.

[0134] In the light receiving element 110, the common layer 112, the active layer 113, and the common layer 114, which are located between the pixel electrode 111 and the common electrode 115, can also be called organic layers (layers containing an organic compound). The pixel electrode 111 preferably has a function of reflecting infrared light. The end of the pixel electrode 111 is covered with a partition wall 216. The common electrode 115 has a function of transmitting infrared light.

[0135] The light receiving element 110 has a function of detecting light. Specifically, the light receiving element 110 is a light receiving element that receives infrared light 14 incident from the outside of the authentication device 80A and converts it into an electric signal. It can also be said that the infrared light 14 is light emitted by the light emitting element 190 and reflected by an object. The infrared light 14 may also be incident on the light receiving element 110 via a lens (not shown).

[0136] A light-shielding layer BM is provided on the surface of the substrate 152 facing the substrate 151. The light-shielding layer BM has openings at positions overlapping the light receiving element 110 and the light emitting element 190. By providing the light-shielding layer BM, the range in which the light receiving element 110 detects light can be controlled.

[0137] The light-shielding layer BM can be made of a material that blocks light emitted from the light-emitting element. The light-shielding layer BM preferably absorbs infrared light. For example, the light-shielding layer BM can be made of a black matrix using a metal material or a resin material containing a pigment (such as carbon black) or a dye.

[0138] Here, light emitted from the light-emitting element 190 is reflected by the object, and the light-receiving element 110 detects the reflected light. However, there are cases where the light emitted from the light-emitting element 190 is reflected inside the authentication device 80A and enters the light-receiving element 110 without passing through the object. The light-shielding layer BM can suppress the influence of such stray light. For example, if the light-shielding layer BM is not provided, the light 123a emitted by the light-emitting element 190 may be reflected by the substrate 152, and the reflected light 123b may enter the light-receiving element 110. By providing the light-shielding layer BM, it is possible to suppress the reflected light 123b from entering the light-receiving element 110. This can reduce noise and increase the sensitivity of the sensor using the light-receiving element 110.

[0139] In the light-emitting element 190, the common layer 112, the light-emitting layer 193, and the common layer 114, which are located between the pixel electrode 191 and the common electrode 115, can also be called EL layers. The pixel electrode 191 preferably has a function of reflecting infrared light. An end of the pixel electrode 191 is covered with a partition wall 216. The pixel electrode 111 and the pixel electrode 191 are electrically insulated from each other by the partition wall 216. The common electrode 115 has a function of transmitting infrared light.

[0140] The light emitting element 190 has a function of emitting infrared light. Specifically, the light emitting element 190 is an electroluminescent element that emits light toward the substrate 152 side by applying a voltage between the pixel electrode 191 and the common electrode 115 (see infrared light 12).

[0141] The light emitting layer 193 is preferably formed so as not to overlap the light receiving region of the light receiving element 110. This can suppress the light emitting layer 193 from absorbing the infrared light 14, and can increase the amount of light irradiated to the light receiving element 110.

[0142] The pixel electrode 111 is electrically connected to the source or drain of the transistor 41 through an opening provided in the insulating layer 214. An end of the pixel electrode 111 is covered with a partition wall 216.

[0143] The pixel electrode 191 is electrically connected to a source or a drain of the transistor 42 through an opening provided in the insulating layer 214. An end of the pixel electrode 191 is covered with a partition wall 216. The transistor 42 has a function of controlling driving of the light-emitting element 190.

[0144] The transistor 41 and the transistor 42 are in contact with each other on the same layer (substrate 151 in FIG. 15A).

[0145] At least a part of the circuit electrically connected to the light receiving element 110 is preferably formed of the same material and in the same process as the circuit electrically connected to the light emitting element 190. This allows the authentication device to be thinner and the manufacturing process to be simplified compared to when the two circuits are formed separately.

[0146] The light receiving element 110 and the light emitting element 190 are preferably covered with a protective layer 195. In Fig. 15A, the protective layer 195 is provided on and in contact with the common electrode 115. By providing the protective layer 195, it is possible to prevent impurities such as water from entering the light receiving element 110 and the light emitting element 190, and to improve the reliability of the light receiving element 110 and the light emitting element 190. In addition, the protective layer 195 and the substrate 152 are bonded together by the adhesive layer 142.

[0147] [Authentication Device 80B] 15B shows a cross-sectional view of authentication device 80B. In the following description of the authentication device, description of the same configuration as the authentication device previously described may be omitted.

[0148] 15B differs from authentication device 80A in that authentication device 80B does not have substrate 151, substrate 152, and partition wall 216, but has substrate 153, substrate 154, adhesive layer 155, insulating layer 212, and partition wall 217.

[0149] An adhesive layer 150 is provided on the outer side of the substrate 153. The adhesive layer 150 allows the authentication device 80B to be fixed to an object.

[0150] The substrate 153 and the insulating layer 212 are bonded together by an adhesive layer 155. The substrate 154 and the protective layer 195 are bonded together by an adhesive layer 142.

[0151] The authentication device 80B is fabricated by transposing the insulating layer 212, the transistor 41, the transistor 42, the light receiving element 110, the light emitting element 190, and the like, which are formed on a fabrication substrate, onto the substrate 153. The substrates 153 and 154 are preferably flexible, which can increase the flexibility of the authentication device 80B. For example, the substrates 153 and 154 are preferably made of resin.

[0152] The substrates 153 and 154 may each be made of polyester resin such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resin, acrylic resin, polyimide resin, polymethyl methacrylate resin, polycarbonate (PC) resin, polyethersulfone (PES) resin, polyamide resin (nylon, aramid, etc.), polysiloxane resin, cycloolefin resin, polystyrene resin, polyamideimide resin, polyurethane resin, polyvinyl chloride resin, polyvinylidene chloride resin, polypropylene resin, polytetrafluoroethylene (PTFE) resin, ABS resin, cellulose nanofiber, etc. One or both of the substrates 153 and 154 may be made of glass having a thickness sufficient to provide flexibility.

[0153] The substrate of the authentication device of this embodiment may be a film having high optical isotropy, such as a triacetyl cellulose (TAC, also called cellulose triacetate) film, a cycloolefin polymer (COP) film, a cycloolefin copolymer (COC) film, and an acrylic film.

[0154] It is preferable that the partition 217 absorbs light emitted by the light emitting element. For example, a black matrix can be formed by using a resin material containing a pigment or a dye as the partition 217. In addition, by using a brown resist material, the partition 217 can be formed of a colored insulating layer.

[0155] Light 123c emitted by the light emitting element 190 may be reflected by the substrate 152 and the partition 217, and reflected light 123d may enter the light receiving element 110. Furthermore, when the light 123c passes through the partition 217 and is reflected by a transistor, wiring, or the like, the reflected light may enter the light receiving element 110. The light 123c is absorbed by the partition 217, so that the reflected light 123d can be prevented from entering the light receiving element 110. This can reduce noise and increase the sensitivity of the sensor using the light receiving element 110.

[0156] It is preferable that the partition 217 absorbs at least the wavelength of light detected by the light receiving element 110. For example, when the light receiving element 110 detects green light emitted by the light emitting element 190, it is preferable that the partition 217 absorbs at least the green light. For example, when the partition 217 has a red color filter, it is possible to absorb the green light 123c and prevent the reflected light 123d from entering the light receiving element 110.

[0157] [Authentication Device 80C] FIG. 15C shows a cross-sectional view of authentication device 80C.

[0158] The authentication device 80C differs from the authentication device 80B in that it does not have a protective layer 195 on the light receiving element 110 and the light emitting element 190. In the authentication device 80C, the common electrode 115 and the substrate 152 are bonded together by an adhesive layer 142.

[0159] [Authentication device 80D, authentication device 80E, authentication device 80F] FIG. 16A shows a cross-sectional view of authentication device 80D, FIG. 16B shows a cross-sectional view of authentication device 80E, and FIG. 16C shows a cross-sectional view of authentication device 80F.

[0160] The authentication device 80D differs from the authentication device 80B in that it does not have the common layer 114, but has a buffer layer 184 and a buffer layer 194. The buffer layer 184 and the buffer layer 194 may each have a single-layer structure or a laminated structure.

[0161] In the authentication device 80D, the light receiving element 110 has a pixel electrode 111, a common layer 112, an active layer 113, a buffer layer 184, and a common electrode 115. In the authentication device 80D, the light emitting element 190 has a pixel electrode 191, a common layer 112, a light emitting layer 193, a buffer layer 194, and a common electrode 115.

[0162] The authentication device 80E differs from the authentication device 80B in that it does not have the common layer 112, but has a buffer layer 182 and a buffer layer 192. The buffer layer 182 and the buffer layer 192 may each have a single-layer structure or a laminated structure.

[0163] In the authentication device 80E, the light receiving element 110 has a pixel electrode 111, a buffer layer 182, an active layer 113, a common layer 114, and a common electrode 115. In the authentication device 80E, the light emitting element 190 has a pixel electrode 191, a buffer layer 192, a light emitting layer 193, a common layer 114, and a common electrode 115.

[0164] Authentication device 80F differs from authentication device 80B in that it does not have common layer 112 and common layer 114, but has buffer layer 182, buffer layer 184, buffer layer 192, and buffer layer 194.

[0165] In the authentication device 80F, the light receiving element 110 has a pixel electrode 111, a buffer layer 182, an active layer 113, a buffer layer 184, and a common electrode 115. In the authentication device 80F, the light emitting element 190 has a pixel electrode 191, a buffer layer 192, a light emitting layer 193, a buffer layer 194, and a common electrode 115.

[0166] In the manufacture of the light receiving element 110 and the light emitting element 190, not only the active layer 113 and the light emitting layer 193 can be separately manufactured, but also other layers can be separately manufactured.

[0167] In the authentication device 80D, an example is shown in which a buffer layer 184 between the common electrode 115 and the active layer 113 and a buffer layer 194 between the common electrode 115 and the light-emitting layer 193 are separately formed. As the buffer layer 194, for example, one or both of an electron injection layer and an electron transport layer can be formed.

[0168] In the authentication device 80E, an example is shown in which a buffer layer 182 between the pixel electrode 111 and the active layer 113 and a buffer layer 192 between the pixel electrode 191 and the light-emitting layer 193 are separately formed. As the buffer layer 192, for example, one or both of a hole injection layer and a hole transport layer can be formed.

[0169] The authentication device 80F shows an example in which the light receiving element 110 and the light emitting element 190 do not have a common layer between a pair of electrodes (the pixel electrode 111 or the pixel electrode 191 and the common electrode 115). The light receiving element 110 and the light emitting element 190 of the authentication device 80F can be manufactured by forming the pixel electrode 111 and the pixel electrode 191 on the insulating layer 214 using the same material and in the same process, forming the buffer layer 182, the active layer 113, and the buffer layer 184 on the pixel electrode 111, forming the buffer layer 192, the light emitting layer 193, and the buffer layer 194 on the pixel electrode 191, and then forming the common electrode 115 to cover the pixel electrode 111, the buffer layer 182, the active layer 113, the buffer layer 184, the pixel electrode 191, the buffer layer 192, the light emitting layer 193, and the buffer layer 194. The order of forming the stacked structure of the buffer layer 182, the active layer 113, and the buffer layer 184 and the stacked structure of the buffer layer 192, the light-emitting layer 193, and the buffer layer 194 is not particularly limited. For example, the buffer layer 192, the light-emitting layer 193, and the buffer layer 194 may be formed after the buffer layer 182, the active layer 113, and the buffer layer 184 are formed. Conversely, the buffer layer 192, the light-emitting layer 193, and the buffer layer 194 may be formed before the buffer layer 182, the active layer 113, and the buffer layer 184 are formed. Also, the buffer layer 182, the buffer layer 192, the active layer 113, the light-emitting layer 193, and the like may be formed alternately in this order.

[0170] A more detailed configuration of an authentication device according to one embodiment of the present invention will be described below with reference to FIGS.

[0171] [Authentication device 100A] FIG. 17 shows a cross-sectional view of the authentication device 100A.

[0172] The authentication device 100A has a configuration in which a substrate 152 and a substrate 151 are bonded together.

[0173] The authentication device 100A has a pixel array 162, a circuit 164, etc. Fig. 17 shows an example of a cross section of the authentication device 100A when a part of a region including the circuit 164, a part of a region including the pixel array 162, and a part of a region including an end portion are cut away.

[0174] As the circuit 164, for example, the circuit 22, the circuit 23, and the circuit 28 shown in the embodiment 1 can be used. Also, as the circuit 164, for example, the control unit 82, the input / output unit 85, and the storage unit 83 shown in the embodiment 2 can be used. By forming the pixel array 162 and the circuit 164 on the same substrate, it is not necessary to use a semiconductor device formed of a silicon wafer or the like as a separate circuit, and therefore the number of parts in the authentication device can be reduced.

[0175] The authentication device 100A shown in FIG. 17 has a transistor 201, a transistor 205, a transistor 206, a light emitting element 190, a light receiving element 110, and the like between a substrate 151 and a substrate 152.

[0176] The substrate 152 and the insulating layer 214 are bonded via an adhesive layer 142. A solid sealing structure, a hollow sealing structure, or the like can be applied to seal the light emitting element 190 and the light receiving element 110. In FIG. 17, a space 143 surrounded by the substrate 152, the adhesive layer 142, and the insulating layer 214 is filled with an inert gas (nitrogen, argon, or the like), and a hollow sealing structure is applied. The adhesive layer 142 may be provided overlapping the light emitting element 190. In addition, the space 143 surrounded by the substrate 152, the adhesive layer 142, and the insulating layer 214 may be filled with a resin different from the adhesive layer 142.

[0177] The light-emitting element 190 has a layered structure in which a pixel electrode 191, a common layer 112, a light-emitting layer 193, a common layer 114, and a common electrode 115 are layered in this order from the insulating layer 214 side. The pixel electrode 191 is connected to a conductive layer 222b of the transistor 206 through an opening provided in the insulating layer 214. The transistor 206 has a function of controlling driving of the light-emitting element 190. An end of the pixel electrode 191 is covered with a partition wall 216. The pixel electrode 191 contains a material that reflects infrared light, and the common electrode 115 contains a material that transmits infrared light.

[0178] The light receiving element 110 has a layered structure in which a pixel electrode 111, a common layer 112, an active layer 113, a common layer 114, and a common electrode 115 are layered in this order from the insulating layer 214 side. The pixel electrode 111 is electrically connected to a conductive layer 222b of the transistor 205 through an opening provided in the insulating layer 214. An end of the pixel electrode 111 is covered with a partition wall 216. The pixel electrode 111 contains a material that reflects infrared light, and the common electrode 115 contains a material that transmits infrared light.

[0179] Light emitted by the light emitting element 190 is emitted towards the substrate 152. Furthermore, light is incident on the light receiving element 110 via the substrate 152 and the space 143. The substrate 152 is preferably made of a material that is highly transparent to infrared light.

[0180] The pixel electrodes 111 and 191 can be manufactured using the same material and in the same process. The common layer 112, the common layer 114, and the common electrode 115 are used for both the light receiving element 110 and the light emitting element 190. The light receiving element 110 and the light emitting element 190 can have the same configuration except for the configurations of the active layer 113 and the light emitting layer 193. This allows the light receiving element 110 to be built into the authentication device 100A without significantly increasing the number of manufacturing steps.

[0181] A light-shielding layer BM is provided on the surface of the substrate 152 facing the substrate 151. The light-shielding layer BM has openings at positions overlapping the light receiving element 110 and the light emitting element 190. By providing the light-shielding layer BM, the range in which the light receiving element 110 detects light can be controlled. Furthermore, by having the light-shielding layer BM, it is possible to prevent light from being directly incident on the light receiving element 110 from the light emitting element 190 without passing through an object. Therefore, a sensor with low noise and high sensitivity can be realized.

[0182] A transistor 201, a transistor 205, and a transistor 206 are all formed over a substrate 151. These transistors can be manufactured using the same material and through the same process.

[0183] An insulating layer 211, an insulating layer 213, an insulating layer 215, and an insulating layer 214 are provided over the substrate 151 in this order. A part of the insulating layer 211 functions as a gate insulating layer for each transistor. A part of the insulating layer 213 functions as a gate insulating layer for each transistor. The insulating layer 215 is provided to cover the transistors. The insulating layer 214 is provided to cover the transistors and functions as a planarizing layer. Note that the number of gate insulating layers and the number of insulating layers covering the transistors are not limited, and each may be a single layer or two or more layers.

[0184] It is preferable to use a material that is difficult for impurities such as water and hydrogen to diffuse into at least one of the insulating layers that covers the transistors. This allows the insulating layer to function as a barrier layer. With this configuration, it is possible to effectively prevent impurities from diffusing into the transistors from the outside, thereby improving the reliability of the authentication device.

[0185] The insulating layer 211, the insulating layer 213, and the insulating layer 215 are each preferably made of an inorganic insulating film. As the inorganic insulating film, for example, an inorganic insulating film such as a silicon nitride film, a silicon oxynitride film, a silicon oxide film, a silicon nitride oxide film, an aluminum oxide film, or an aluminum nitride film can be used. A hafnium oxide film, an yttrium oxide film, a zirconium oxide film, a gallium oxide film, a tantalum oxide film, a magnesium oxide film, a lanthanum oxide film, a cerium oxide film, or a neodymium oxide film may also be used. Two or more of the above insulating films may also be stacked.

[0186] Here, organic insulating films often have a lower barrier property than inorganic insulating films. Therefore, it is preferable that the organic insulating film has an opening near the end of the authentication device 100A. This makes it possible to prevent impurities from entering through the organic insulating film from the end of the authentication device 100A. Alternatively, the organic insulating film may be formed so that the end of the organic insulating film is located inside the end of the authentication device 100A, so that the organic insulating film is not exposed at the end of the authentication device 100A.

[0187] An organic insulating film is suitable for the insulating layer 214 that functions as a planarizing layer. Materials that can be used for the organic insulating film include acrylic resin, polyimide resin, epoxy resin, polyamide resin, polyimideamide resin, siloxane resin, benzocyclobutene resin, phenol resin, and precursors of these resins.

[0188] 17, an opening is formed in the insulating layer 214. This makes it possible to prevent impurities from entering the pixel array 162 from the outside through the insulating layer 214, even when an organic insulating film is used for the insulating layer 214. This makes it possible to improve the reliability of the authentication device 100A.

[0189] The transistor 201, the transistor 205, and the transistor 206 each have a conductive layer 221 functioning as a gate, an insulating layer 211 functioning as a gate insulating layer, a conductive layer 222a and a conductive layer 222b functioning as a source and a drain, a semiconductor layer 231, an insulating layer 213 functioning as a gate insulating layer, and a conductive layer 223 functioning as a gate. Here, the same hatched pattern is applied to a plurality of layers obtained by processing the same conductive film. The insulating layer 211 is located between the conductive layer 221 and the semiconductor layer 231. The insulating layer 213 is located between the conductive layer 223 and the semiconductor layer 231.

[0190] The structure of the transistor included in the authentication device of this embodiment is not particularly limited. For example, a planar transistor, a staggered transistor, an inverted staggered transistor, or the like can be used. In addition, either a top-gate type or a bottom-gate type transistor structure may be used. Alternatively, gates may be provided above and below a semiconductor layer in which a channel is formed.

[0191] The transistor 201, the transistor 205, and the transistor 206 have a structure in which a semiconductor layer in which a channel is formed is sandwiched between two gates. The two gates may be connected and the same signal may be supplied to the gates to drive the transistors. Alternatively, the threshold voltage of the transistors may be controlled by supplying a potential for controlling the threshold voltage to one of the two gates and a potential for driving to the other gate.

[0192] The crystallinity of a semiconductor material used in a transistor is not particularly limited, and any of an amorphous semiconductor and a crystalline semiconductor (a microcrystalline semiconductor, a polycrystalline semiconductor, a single crystal semiconductor, or a semiconductor partially having a crystalline region) may be used. The use of a crystalline semiconductor is preferable because it can suppress deterioration of transistor characteristics.

[0193] The semiconductor layer of the transistor preferably contains a metal oxide (also referred to as an oxide semiconductor). Alternatively, the semiconductor layer of the transistor may contain silicon. Examples of silicon include amorphous silicon and crystalline silicon (such as low-temperature polysilicon and single crystal silicon).

[0194] The semiconductor layer preferably contains, for example, indium, M (M is one or more selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium), and zinc. In particular, M is preferably one or more selected from aluminum, gallium, yttrium, and tin.

[0195] In particular, it is preferable to use an oxide containing indium (In), gallium (Ga), and zinc (Zn) (also referred to as IGZO) as the semiconductor layer.

[0196] When the semiconductor layer is an In-M-Zn oxide, the sputtering target used to deposit the In-M-Zn oxide preferably has an atomic ratio of In equal to or greater than the atomic ratio of M. Examples of atomic ratios of metal elements in such sputtering targets include In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, In:M:Zn=6:1:6, In:M:Zn=5:2:5, and the like.

[0197] It is preferable to use a target containing a polycrystalline oxide as the sputtering target, since it is easy to form a semiconductor layer having crystallinity. The atomic ratio of the semiconductor layer to be formed includes a variation of ±40% of the atomic ratio of the metal elements contained in the sputtering target. For example, when the composition of the sputtering target used for the semiconductor layer is In:Ga:Zn=4:2:4.1 [atomic ratio], the composition of the semiconductor layer to be formed may be close to In:Ga:Zn=4:2:3 [atomic ratio].

[0198] When the atomic ratio is described as In:Ga:Zn=4:2:3 or thereabout, this includes the case where, when the atomic ratio of In is 4, the atomic ratio of Ga is 1 or more and 3 or less, and the atomic ratio of Zn is 2 or more and 4 or less. When the atomic ratio of In is described as In:Ga:Zn=5:1:6 or thereabout, this includes the case where, when the atomic ratio of In is 5, the atomic ratio of Ga is more than 0.1 and 2 or less, and the atomic ratio of Zn is 5 or more and 7 or less. When the atomic ratio of In is described as In:Ga:Zn=1:1:1 or thereabout, this includes the case where, when the atomic ratio of In is 1, the atomic ratio of Ga is more than 0.1 and 2 or less, and the atomic ratio of Zn is more than 0.1 and 2 or less.

[0199] The transistors in the circuit 164 and the transistors in the pixel array 162 may have the same structure or different structures. The transistors in the circuit 164 may all have the same structure or may have two or more types. Similarly, the transistors in the pixel array 162 may all have the same structure or may have two or more types.

[0200] An adhesive layer 150 is provided on the outer side of the substrate 151. The adhesive layer 150 allows the authentication device 100A to be fixed to an object.

[0201] Various optical members can be disposed on the outside of the substrate 152. Examples of optical members include a polarizing plate, a retardation plate, a light diffusion layer (such as a diffusion film), an anti-reflection layer, and a light collecting film. In addition, an antistatic film that suppresses adhesion of dust, a water-repellent film that makes it difficult for dirt to adhere, a hard coat film that suppresses the occurrence of scratches due to use, an impact absorbing layer, and the like may be disposed on the outside of the substrate 152.

[0202] The substrate 151 and the substrate 152 may each be made of glass, quartz, ceramic, sapphire, resin, etc. If the substrate 151 and the substrate 152 are made of a flexible material, the flexibility of the authentication device can be increased.

[0203] For the adhesive layer 142 and the adhesive layer 150, various curing adhesives such as a photo-curing adhesive such as an ultraviolet curing adhesive, a reaction curing adhesive, a heat curing adhesive, and an anaerobic adhesive can be used. Examples of such adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC resin, PVB resin, and EVA resin. In particular, a material with low moisture permeability such as epoxy resin is preferable. A two-liquid mixed resin may also be used. An adhesive sheet or the like may also be used.

[0204] The light emitting element 190 may be a top emission type, a bottom emission type, a dual emission type, or the like. A conductive film that transmits infrared light is used for the electrode on the side from which light is extracted. In addition, it is preferable to use a conductive film that reflects infrared light for the electrode on the side from which light is not extracted.

[0205] The light-emitting element 190 has at least a light-emitting layer 193. The light-emitting element 190 may further have a layer containing a substance with high hole injection properties, a substance with high hole transport properties, a hole blocking material, a substance with high electron transport properties, a substance with high electron injection properties, a bipolar substance (a substance with high electron transport properties and hole transport properties), or the like, as a layer other than the light-emitting layer 193. For example, the common layer 112 preferably has one or both of a hole injection layer and a hole transport layer. For example, the common layer 114 preferably has one or both of an electron transport layer and an electron injection layer.

[0206] Either a low molecular weight compound or a high molecular weight compound may be used for the common layer 112, the light emitting layer 193, and the common layer 114, and may contain an inorganic compound. The layers constituting the common layer 112, the light emitting layer 193, and the common layer 114 can be formed by a deposition method (including a vacuum deposition method), a transfer method, a printing method, an inkjet method, a coating method, or the like.

[0207] The light-emitting layer 193 may contain an inorganic compound such as quantum dots as a light-emitting material.

[0208] The active layer 113 of the light receiving element 110 includes a semiconductor. Examples of the semiconductor include inorganic semiconductors such as silicon, and organic semiconductors including organic compounds. In this embodiment, an example in which an organic semiconductor is used as the semiconductor of the active layer is shown. By using an organic semiconductor, the light emitting layer 193 of the light emitting element 190 and the active layer 113 of the light receiving element 110 can be formed by the same method (for example, vacuum deposition method), which is preferable because the manufacturing equipment can be shared.

[0209] The active layer 113 is made of an n-type semiconductor material such as fullerene (e.g., C 60 , C 70 Examples of the p-type semiconductor material of the active layer 113 include an electron-accepting organic semiconductor material such as copper(II) phthalocyanine (CuPc) or a derivative thereof. Examples of the p-type semiconductor material of the active layer 113 include an electron-donating organic semiconductor material such as copper(II) phthalocyanine (CuPc) or tetraphenyldibenzoperiflanthene (DBP).

[0210] For example, the active layer 113 is preferably formed by co-evaporation of an n-type semiconductor and a p-type semiconductor.

[0211] Materials that can be used for the gate, source, and drain of a transistor as well as conductive layers such as various wirings and electrodes that constitute an authentication device include metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, and tungsten, or alloys containing these as main components, etc. Films containing these materials can be used as a single layer or a laminated structure.

[0212] As the conductive material having light transmitting properties, conductive oxides such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, zinc oxide containing gallium, or graphene can be used. Alternatively, metal materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, or alloy materials containing the metal materials can be used. Alternatively, nitrides of the metal materials (for example, titanium nitride) or the like may be used. Note that when using metal materials or alloy materials (or their nitrides), it is preferable to make them thin enough to have light transmitting properties. Also, a laminated film of the above materials can be used as the conductive layer. For example, it is preferable to use a laminated film of an alloy of silver and magnesium and indium tin oxide, because it can increase the conductivity. These can also be used for conductive layers such as various wirings and electrodes constituting an authentication device, and conductive layers (conductive layers functioning as pixel electrodes or common electrodes) of display elements.

[0213] Examples of insulating materials that can be used for each insulating layer include resins such as acrylic resin and epoxy resin, and inorganic insulating materials such as silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, and aluminum oxide.

[0214] [Authentication device 100B] FIG. 18 shows a cross-sectional view of the authentication device 100B.

[0215] Authentication device 100B differs from authentication device 100A mainly in that authentication device 100B does not have substrate 151 and substrate 152, but has substrate 153, substrate 154, adhesive layer 155, and insulating layer 212, and in that authentication device 100B has protective layer 195.

[0216] The substrate 153 and the insulating layer 212 are bonded together by an adhesive layer 155. The substrate 154 and the protective layer 195 are bonded together by an adhesive layer 142. The adhesive layer 142 is provided so as to overlap the light receiving element 110 and the light emitting element 190, respectively, and a solid sealing structure is applied to the authentication device 100B.

[0217] The authentication device 100B is fabricated by transferring the insulating layer 212, the transistor 208, the transistor 209, the light receiving element 110, the light emitting element 190, and the like, which are formed on a fabrication substrate, onto the substrate 153. It is preferable that the substrate 153 and the substrate 154 each have flexibility. This can increase the flexibility of the authentication device 100B.

[0218] An adhesive layer 150 is provided on the outer side of the substrate 153. The adhesive layer 150 allows the authentication device 100B to be fixed to an object.

[0219] The insulating layer 212 can be formed using the inorganic insulating film that can be used for the insulating layers 211, 213, and 215.

[0220] By providing a protective layer 195 covering the light receiving element 110 and the light emitting element 190, impurities such as water can be prevented from entering the light receiving element 110 and the light emitting element 190, thereby improving the reliability of the light receiving element 110 and the light emitting element 190.

[0221] In a region 228 near the end of authentication device 100B, insulating layer 215 and protective layer 195 preferably contact each other through the opening in insulating layer 214. In particular, it is preferable that the inorganic insulating film of insulating layer 215 and the inorganic insulating film of protective layer 195 contact each other. This makes it possible to prevent impurities from entering authentication device 100B from the outside through the organic insulating film. Therefore, it is possible to improve the reliability of authentication device 100B.

[0222] The protective layer 195 may have a laminated structure of an organic insulating film and an inorganic insulating film. In this case, it is preferable that the end of the inorganic insulating film extends further outward than the end of the organic insulating film.

[0223] [Authentication device 100C] FIG. 19A shows a cross-sectional view of authentication device 100C.

[0224] The authentication device 100C differs from the authentication device 100B in the structure of the transistors.

[0225] The authentication device 100C has a transistor 208, a transistor 209, and a transistor 210 on a substrate 151.

[0226] The transistor 208, the transistor 209, and the transistor 210 each include a conductive layer 221 functioning as a gate, an insulating layer 211 functioning as a gate insulating layer, a semiconductor layer having a channel formation region 231i and a pair of low-resistance regions 231n, a conductive layer 222a connected to one of the pair of low-resistance regions 231n, a conductive layer 222b connected to the other of the pair of low-resistance regions 231n, an insulating layer 225 functioning as a gate insulating layer, a conductive layer 223 functioning as a gate, and an insulating layer 215 covering the conductive layer 223. The insulating layer 211 is located between the conductive layer 221 and the channel formation region 231i. The insulating layer 225 is located between the conductive layer 223 and the channel formation region 231i.

[0227] The conductive layer 222a and the conductive layer 222b are connected to the low-resistance region 231n through openings provided in the insulating layer 225 and the insulating layer 215, respectively. One of the conductive layer 222a and the conductive layer 222b functions as a source, and the other functions as a drain.

[0228] The pixel electrode 191 of the light emitting element 190 is electrically connected to one of a pair of low resistance regions 231n of the transistor 208 via the conductive layer 222b.

[0229] The pixel electrode 111 of the light receiving element 110 is electrically connected to the other of the pair of low resistance regions 231n of the transistor 209 via the conductive layer 222b.

[0230] The transistor 208, the transistor 209, and the transistor 210 shown in FIG. 19A show an example in which the insulating layer 225 covers the upper surface and the side surface of the semiconductor layer. On the other hand, in the transistor 202 shown in FIG. 19B, the insulating layer 225 overlaps with the channel formation region 231i of the semiconductor layer 231, but does not overlap with the low-resistance region 231n. For example, the structure shown in FIG. 19B can be manufactured by forming the insulating layer 225 using the conductive layer 223 as a mask. In FIG. 19B, the insulating layer 215 is provided to cover the insulating layer 225 and the conductive layer 223, and the conductive layer 222a and the conductive layer 222b are connected to the low-resistance region 231n through the openings in the insulating layer 215. Furthermore, an insulating layer 218 covering the transistor 202 may be provided.

[0231] [Metal oxides] Metal oxides that can be used for the semiconductor layer will be described below.

[0232] In this specification and the like, metal oxides containing nitrogen may also be collectively referred to as metal oxides. Metal oxides containing nitrogen may also be referred to as metal oxynitrides. For example, metal oxides containing nitrogen, such as zinc oxynitride (ZnON), may be used for the semiconductor layer.

[0233] It is preferable to use a metal oxide having a low carrier concentration for the semiconductor layer. In the case of lowering the carrier concentration of the metal oxide, the impurity concentration in the metal oxide is lowered to lower the defect level density. In this specification and the like, a low impurity concentration and a low defect level density are referred to as high purity intrinsic or substantially high purity intrinsic. Note that examples of impurities in the metal oxide include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

[0234] In particular, hydrogen contained in metal oxide reacts with oxygen that bonds to metal atoms to form water, which may cause oxygen vacancies in the metal oxide. If oxygen vacancies are present in the channel formation region in the metal oxide, the transistor may have normally-on characteristics. Furthermore, defects in which hydrogen has entered the oxygen vacancies may function as donors and generate electrons that serve as carriers. In addition, some of the hydrogen may bond with oxygen that bonds to metal atoms to generate electrons that serve as carriers. Therefore, transistors using metal oxides that contain a large amount of hydrogen tend to have normally-on characteristics.

[0235] A defect in which hydrogen has entered an oxygen vacancy can function as a donor for a metal oxide. However, it is difficult to quantitatively evaluate the defect. Therefore, in a metal oxide, the carrier concentration may be used instead of the donor concentration. Therefore, in this specification, the carrier concentration assuming a state in which no electric field is applied may be used as a parameter of the metal oxide, instead of the donor concentration. In other words, the "carrier concentration" described in this specification may be rephrased as the "donor concentration".

[0236] Therefore, it is preferable that hydrogen in the metal oxide is reduced as much as possible. Specifically, the hydrogen concentration in the metal oxide obtained by secondary ion mass spectrometry (SIMS) is 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3less than 5×10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 By using a metal oxide in which impurities such as hydrogen are sufficiently reduced for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0237] The carrier concentration of the metal oxide in the channel formation region is 1×10 18 cm -3 It is preferable that the value is less than 1×10 17 cm -3 More preferably, it is less than 1×10 16 cm -3 More preferably, it is less than 1×10 13 cm -3 More preferably, it is less than 1×10 12 cm -3 The lower limit of the carrier concentration of the metal oxide in the channel formation region is not particularly limited, but is preferably, for example, 1×10 -9 cm -3 It can be said that:

[0238] In this specification, etc., they may be referred to as CAAC (c-axis aligned crystal) and CAC (Cloud-Aligned Composite). CAAC represents an example of a crystal structure, and CAC represents an example of a function or material configuration.

[0239] For example, a cloud-aligned composite (CAC)-OS can be used for the semiconductor layer.

[0240] CAC-OS or CAC-metal oxide has a conductive function in a part of the material and an insulating function in a part of the material, and has a function as a semiconductor as a whole. When CAC-OS or CAC-metal oxide is used in a channel formation region of a transistor, the conductive function is a function of flowing electrons (or holes) that become carriers, and the insulating function is a function of not flowing electrons that become carriers. By making the conductive function and the insulating function act complementarily, a switching function (on / off function) can be imparted to CAC-OS or CAC-metal oxide. By separating the respective functions in CAC-OS or CAC-metal oxide, both functions can be maximized.

[0241] CAC-OS or CAC-metal oxide has a conductive region and an insulating region. The conductive region has the above-mentioned conductive function, and the insulating region has the above-mentioned insulating function. In addition, in the material, the conductive region and the insulating region may be separated at the nanoparticle level. In addition, the conductive region and the insulating region may be unevenly distributed in the material. In addition, the conductive region may be observed to be connected in a cloud shape with a blurred periphery.

[0242] In the CAC-OS or CAC-metal oxide, the conductive regions and the insulating regions may each be dispersed in the material with a size of 0.5 nm or more and 10 nm or less, preferably 0.5 nm or more and 3 nm or less.

[0243] CAC-OS or CAC-metal oxide is composed of components having different band gaps. For example, CAC-OS or CAC-metal oxide is composed of a component having a wide gap due to an insulating region and a component having a narrow gap due to a conductive region. In this configuration, when carriers are made to flow, the carriers mainly flow in the component having the narrow gap. In addition, the component having the narrow gap acts complementarily on the component having the wide gap, and carriers also flow in the component having the wide gap in conjunction with the component having the narrow gap. Therefore, when the above CAC-OS or CAC-metal oxide is used in the channel formation region of a transistor, a high current driving force in the on state of the transistor, that is, a large on-current and a high field effect mobility can be obtained.

[0244] That is, CAC-OS or CAC-metal oxide can also be called a matrix composite or a metal matrix composite.

[0245] Oxide semiconductors (metal oxides) are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors, such as c-axis aligned crystalline oxide semiconductors (CAAC-OS), polycrystalline oxide semiconductors, nanocrystalline oxide semiconductors (nc-OS), amorphous-like oxide semiconductors (a-like OS), and amorphous oxide semiconductors.

[0246] CAAC-OS has a c-axis orientation and a distorted crystal structure in which multiple nanocrystals are connected in the ab-plane direction. The distortion refers to a portion where the lattice orientation changes between a region with a uniform lattice arrangement and a region with a different uniform lattice arrangement in the region where multiple nanocrystals are connected.

[0247] Nanocrystals are basically hexagonal, but may be non-regular hexagonal. In addition, the lattice arrangement may be pentagonal or heptagonal due to the distortion. In CAAC-OS, it is difficult to confirm clear grain boundaries even in the vicinity of the distortion. In other words, it is found that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because CAAC-OS can tolerate distortion due to the fact that the arrangement of oxygen atoms in the ab-plane direction is not dense and the bond distance between atoms changes due to the substitution of metal elements.

[0248] CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium and oxygen (hereinafter, In layer) and a layer containing element M, zinc, and oxygen (hereinafter, (M, Zn) layer) are stacked. Note that indium and element M can be substituted for each other, and when element M in an (M, Zn) layer is substituted for indium, it can also be represented as an (In, M, Zn) layer. When indium in an In layer is substituted for element M, it can also be represented as an (In, M) layer.

[0249] CAAC-OS is a metal oxide with high crystallinity. On the other hand, it is difficult to confirm clear crystal boundaries in CAAC-OS, so it is said that the decrease in electron mobility caused by crystal boundaries is unlikely to occur. In addition, since the crystallinity of metal oxides can be decreased by the inclusion of impurities or the generation of defects, CAAC-OS is unlikely to have impurities or defects (oxygen vacancies (V O : It is also called oxygen vacancy. ) Therefore, metal oxides with CAAC-OS have stable physical properties. Therefore, metal oxides with CAAC-OS are resistant to heat and highly reliable.

[0250] The nc-OS has periodic atomic arrangement in a microscopic region (for example, a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). In addition, the nc-OS does not show regularity in the crystal orientation between different nanocrystals. Therefore, no orientation is seen throughout the film. Therefore, depending on the analysis method, the nc-OS may be indistinguishable from an a-like OS or an amorphous oxide semiconductor.

[0251] Indium-gallium-zinc oxide (hereinafter referred to as IGZO), a type of metal oxide containing indium, gallium, and zinc, may have a stable structure when made into the above-mentioned nanocrystals. In particular, since IGZO tends to have difficulty in crystal growth in the atmosphere, it may be structurally more stable when made into small crystals (for example, the above-mentioned nanocrystals) rather than large crystals (here, crystals of several mm or several cm).

[0252] The a-like OS is a metal oxide having a structure between the nc-OS and an amorphous oxide semiconductor. The a-like OS has a pore or low-density region. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS.

[0253] Oxide semiconductors (metal oxides) have a variety of structures and each structure has different characteristics. The oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, an nc-OS, and a CAAC-OS.

[0254] The metal oxide film functioning as the semiconductor layer can be formed using either one or both of an inert gas and an oxygen gas. The flow rate ratio of oxygen (oxygen partial pressure) during the formation of the metal oxide film is not particularly limited. However, in order to obtain a transistor with high field effect mobility, the flow rate ratio of oxygen (oxygen partial pressure) during the formation of the metal oxide film is preferably 0% or more and 30% or less, more preferably 5% or more and 30% or less, and even more preferably 7% or more and 15% or less.

[0255] The energy gap of the metal oxide is preferably 2 eV or more, more preferably 2.5 eV or more, and further preferably 3 eV or more. By using a metal oxide having such a wide energy gap, the off-state current of the transistor can be reduced.

[0256] The substrate temperature during deposition of the metal oxide film is preferably 350° C. or lower, more preferably room temperature or higher and 200° C. or lower, and further preferably room temperature or higher and 130° C. or lower. When the substrate temperature during deposition of the metal oxide film is room temperature, productivity can be increased, which is preferable.

[0257] The metal oxide film can be formed by a sputtering method, or by other methods such as PLD, PECVD, thermal CVD, ALD, and vacuum deposition.

[0258] As described above, the authentication device of the present embodiment has a light receiving element and a light emitting element in the imaging section, and the imaging section has both a function of emitting light and a function of detecting light. This allows the electronic device to be made smaller and lighter than when a sensor is provided outside the imaging section or the authentication device. In addition, by combining with a sensor provided outside the imaging section or the authentication device, a more multi-functional electronic device can be realized.

[0259] At least one layer of the light receiving element other than the active layer can be configured in common with the light emitting element (EL element). Furthermore, all layers of the light receiving element other than the active layer can be configured in common with the light emitting element (EL element). For example, the light emitting element and the light receiving element can be formed on the same substrate by simply adding a process of forming an active layer to the manufacturing process of the light emitting element. Furthermore, the pixel electrode and the common electrode of the light receiving element and the light emitting element can be formed from the same material and in the same process. Furthermore, the manufacturing process of the authentication device can be simplified by manufacturing the circuit electrically connected to the light receiving element and the circuit electrically connected to the light emitting element from the same material and in the same process. In this way, a highly convenient authentication device having a built-in light receiving element can be manufactured without a complicated process.

[0260] The authentication device of the present embodiment has a colored layer between the light receiving element and the light emitting element. The colored layer may also serve as a partition wall that electrically insulates the light receiving element and the light emitting element. The colored layer can absorb stray light in the authentication device, thereby increasing the sensitivity of the sensor using the light receiving element.

[0261] At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be implemented in appropriate combination with other configuration examples or drawings.

[0262] This embodiment mode can be implemented by appropriately combining at least a part of it with other embodiment modes described in this specification. [Explanation of symbols]

[0263] BM: light-shielding layer, T1: period, T2: period, T3: period, T4: period, 10: pixel circuit, 11: light-emitting element, 12: infrared light, 13: light-receiving element, 14: infrared light, 20: imaging device, 21: pixel array, 22: circuit, 23: circuit, 24: circuit, 25: circuit, 26: circuit, 28: circuit, 41: transistor, 42: transistor, 51: substrate, 52: hand, 55: layer, 57: adhesive layer, 59: substrate, 61: vein, 63: backscattered light, 65: object, 80: authentication device, 80A: authentication device, 80B: authentication device, 80C: authentication device, 80D: authentication device, 80E: authentication device, 80F: Authentication device, 81: imaging unit, 82: control unit, 83: memory unit, 84: program, 85: input / output unit, 86: authentication unit, 87: external drive circuit, 88: antenna, 91: door, 93: door knob, 95: electronic lock, 96: latch, 97: door, 98: door knob, 100A: authentication device, 100B: authentication device, 100C: authentication device, 101: light receiving element, 103: transistor, 104: transistor, 105: transistor, 106: transistor, 107: transistor, 108: capacitance element, 109: resistance element, 110: light receiving element, 111: pixel electrode, 112: common layer, 1 13: active layer, 114: common layer, 115: common electrode, 121: wiring, 122: wiring, 123a: light, 123b: reflected light, 123c: light, 123d: reflected light, 126: wiring, 127: wiring, 128: wiring, 129: wiring, 130: wiring, 131: wiring, 132: wiring, 142: adhesive layer, 143: space, 150: adhesive layer, 151: substrate, 152: substrate, 153: substrate, 154: substrate, 155: adhesive layer, 162: pixel array, 164: circuit, 182: buffer layer, 184: buffer layer, 190: light emitting element, 191: pixel electrode, 192: buffer layer, 193: light emission layer, 194: buffer layer, 195: protective layer, 201: transistor, 202: transistor, 205: transistor, 206: transistor, 208: transistor, 209: transistor, 210: transistor, 211: insulating layer, 212: insulating layer, 213: insulating layer, 214: insulating layer, 215: insulating layer, 216: partition, 217: partition, 218: insulating layer, 221: conductive layer, 222a: conductive layer, 222b: conductive layer, 223: conductive layer, 225: insulating layer, 228: region, 231: semiconductor layer, 231i: channel formation region, 231n: low resistance region, 5700: automobile

Claims

1. a substrate; and a pixel array disposed on the substrate; The pixel array includes a pixel circuit and a light emitting element. the pixel circuit includes a light receiving element, first to fifth transistors, a capacitance element, and first to sixth wirings; one electrode of the light receiving element is electrically connected to one of the source and drain of the first transistor; the other of the source and the drain of the first transistor is electrically connected to one of the source and the drain of the second transistor; one of a source and a drain of the second transistor is electrically connected to one electrode of the capacitance element; one electrode of the capacitance element is electrically connected to a gate of the third transistor; one of a source and a drain of the third transistor is electrically connected to one of a source and a drain of the fourth transistor; the other electrode of the light receiving element is electrically connected to the first wiring, a gate of the first transistor is electrically connected to the second wiring; the other of the source and the drain of the second transistor and the other of the source and the drain of the third transistor are electrically connected to the third wiring; a gate of the second transistor is electrically connected to the fourth wiring; a gate of the fourth transistor is electrically connected to the fifth wiring; the other of the source and the drain of the fourth transistor is electrically connected to the sixth wiring; one of a source and a drain of the fifth transistor is electrically connected to one electrode of the light-emitting element; the other of the source and the drain of the fifth transistor is electrically connected to the third wiring; a gate of the fifth transistor is electrically connected to the second wiring; The light receiving element includes a common layer and an active layer having a region located on the common layer, The light-emitting element includes the common layer and a light-emitting layer having a region located on the common layer, the common layer has a function of transporting holes, the active layer comprises a first organic compound; The light-emitting layer comprises a second organic compound different from the first organic compound.

2. In claim 1, The light emitting element has a function of emitting infrared light.

3. In claim 1 or 2, The imaging device further comprises a first transistor and a second transistor, the first transistor and the second transistor each having a metal oxide in a channel formation region.

Citation Information

Patent Citations

  • Display device mounted with read function and electronic equipment using the same

    JP2006065305A

  • Organic el display device with touch panel function

    JP2009288956A

  • Light source integrated photoelectric conversion apparatus

    JP2010153449A

  • Semiconductor device and driving method for the same

    JP2012256020A

  • Photoelectric conversion device and method for manufacturing the same

    JP2013073965A