Semiconductor device

Abstract

To provide a semiconductor device using an oxide semiconductor, capable of reducing a content of an oxide deficiency, and improving an electric characteristic.SOLUTION: In a semiconductor device containing a transistor having an oxide semiconductor film, and a protection film formed on the transistor, a substrate mounted in a processing chamber to be exhausted in a vacuum is held to 180°C or higher and 260°C or lower, a pressure in the processing chamber is set to 100 Pa or more and 250 Pa or less by introducing a material gas into the processing chamber, and as the protection film, an oxide insulation film containing larger oxygen than that satisfying a stoichiometry composition is formed to an electrode provided into the processing chamber under a condition that a high frequency power of 0.17 W / cm2 or more and 0.5 W / cm2 or less is supplied.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing a semiconductor device having an insulating film and a field effect transistor. [Background technology]

[0002] It is used in many flat panel displays, such as liquid crystal displays and light-emitting displays. The transistors used are made of amorphous silicon and single crystal silicon formed on a glass substrate. The silicon semiconductor is made of silicon semiconductor such as polycrystalline silicon or polysilicon. Transistors using silicon semiconductors are also used in integrated circuits (ICs).

[0003] In recent years, metal oxides that exhibit semiconducting properties have been used in transistors instead of silicon semiconductors. In this specification, metal oxides that exhibit semiconducting properties are referred to as oxide semiconductors. Let us call it a conductor.

[0004] For example, a transistor using zinc oxide or an In-Ga-Zn oxide as an oxide semiconductor is used. A technique for manufacturing a transistor and using the transistor as a switching element for pixels of a display device. Techniques for this have been disclosed (see Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0006] In a transistor including an oxide semiconductor, oxygen vacancies in an oxide semiconductor film This leads to poor electrical characteristics of the transistor. For example, the oxide semiconductor film contains oxygen vacancies. The threshold voltage of a transistor using a conductor is easily shifted in the negative direction. This is because charges are generated due to oxygen vacancies in the oxide semiconductor. This is because the resistance becomes low.

[0007] In addition, if the oxide semiconductor film contains oxygen defects, the film may deteriorate over time or the optical gate BT (Bias-T The electrical characteristics of the transistor, typically at the threshold, are measured by a stress test. However, there is a problem in that the voltage fluctuates.

[0008] In view of this, one embodiment of the present invention is to provide a semiconductor device including an oxide semiconductor, which is characterized in that oxygen vacancies are present. Another object of one embodiment of the present invention is to reduce the amount of a semiconductor using an oxide semiconductor. An object of the present invention is to improve the electrical characteristics of a semiconductor device. [Means for solving the problem]

[0009] One embodiment of the present invention is to produce a gas containing more oxygen than satisfies the stoichiometric composition by using a plasma CVD method. The method is characterized by forming an oxide insulating film containing oxygen.

[0010] Another embodiment of the present invention is a transistor including an oxide semiconductor film and a and a protective film formed on the semiconductor device, By using a method, an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition is formed. It is characterized by:

[0011] Another embodiment of the present invention is a transistor including an oxide semiconductor film and a In a semiconductor device having a protective film formed on the substrate, the semiconductor device is placed in a processing chamber that is evacuated to a vacuum. The substrate is maintained at a temperature of 180° C. or higher and 260° C. or lower, and a source gas is introduced into the processing chamber. The pressure in the treatment chamber is set to 100 Pa or more and 250 Pa or less, and the electrode installed in the treatment chamber is set to 0.17 W. / cm 2 More than 0.5W / cm 2 The above protective film was prepared by supplying high-frequency power under the following conditions: The present invention is characterized in that an oxide insulating film containing more oxygen than the oxygen satisfying the stoichiometric composition is formed. Let us assume that.

[0012] Another embodiment of the present invention is a transistor including an oxide semiconductor film and a In a semiconductor device having a protective film formed on the substrate, the semiconductor device is placed in a processing chamber that is evacuated to a vacuum. The substrate is maintained at a temperature of 180° C. or higher and 260° C. or lower, and a source gas is introduced into the processing chamber. The pressure in the treatment chamber is set to 100 Pa or more and 250 Pa or less, and the electrode installed in the treatment chamber is set to 0.17 W. / cm 2 More than 0.5W / cm 2 The above protective film was prepared by supplying high-frequency power under the following conditions: After forming an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition, a heat treatment is performed. The present invention is characterized in that oxygen contained in the protective film is diffused into the oxide semiconductor film by a process.

[0013] In addition, one embodiment of the present invention is a gate electrode and a gate insulating film overlapping with a part of the gate electrode. a transistor including an oxide semiconductor film and a pair of electrodes in contact with the oxide semiconductor film; and a protective film provided on the nitride semiconductor film, the protective film being capable of detecting a g = 2.001, the spin density of the signal is 1.5 × 10 18spins / cm 3 Less than It is an oxide insulating film.

[0014] Note that the pair of electrodes is provided between the gate insulating film and the oxide semiconductor film. The electrode is provided between the oxide semiconductor film and the protective film.

[0015] Another embodiment of the present invention is a semiconductor device including an oxide semiconductor film, a pair of electrodes in contact with the oxide semiconductor film, and an oxide semiconductor film. a gate insulating film provided on the oxide semiconductor film; A transistor having a gate electrode overlapping the gate insulating film and a protection film covering the gate electrode. The protective film is a filter that detects the signal appearing at g=2.001 in electron spin resonance measurement. Pin density is 1.5 x 10 18 spins / cm 3 The oxide insulating film is characterized in that the thickness is less than The semiconductor device is as follows. Effect of the Invention

[0016] In a transistor including an oxide semiconductor, a protective film formed over the transistor By forming an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition, The oxide semiconductor film is formed by diffusing oxygen from the protective film to the oxide semiconductor film. The amount of oxygen vacancies can be reduced. Therefore, according to one embodiment of the present invention, excellent electrical characteristics can be obtained. It is possible to manufacture a semiconductor device having the above structure. [Brief description of the drawings]

[0017] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Diagram 2] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Diagram 3] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 4] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Diagram 5] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 6] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Figure 7] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 8] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a transistor. [Figure 9] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 10] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 11] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 12] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 13] 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 14] FIG. 1 is a circuit diagram illustrating one embodiment of a semiconductor device. [Figure 15] FIG. 1 is a block diagram showing one embodiment of a semiconductor device. [Figure 16] FIG. 1 is a block diagram showing one embodiment of a semiconductor device. [Figure 17] FIG. 1 is a block diagram showing one embodiment of a semiconductor device. [Figure 18] FIG. 1 shows the results of TDS analysis of the prepared samples. [Figure 19] FIG. 13 is a diagram showing the amount of oxygen molecules desorbed from the prepared samples. [Figure 20] FIG. 1 shows the results of TDS analysis of the prepared samples. [Figure 21] FIG. 13 is a graph showing the relationship between power and the number of spins per unit area in the prepared sample. [Figure 22] FIG. 13 is a graph showing the relationship between the silane flow rate and the number of spins per unit area in the prepared sample. [Diagram 23] FIG. 13 is a diagram showing the results of CPM measurement of the prepared sample. [Figure 24] FIG. 13 is a diagram showing initial current-voltage characteristics of the prepared sample. [Diagram 25] FIG. 13 is a diagram showing initial current-voltage characteristics of the prepared sample. [Figure 26] FIG. 1 shows a MOS structure element for CV measurement. [Figure 27] FIG. 13 is a diagram showing the results of CV measurement of the prepared samples. [Figure 28] FIG. 13 shows the results of ESR measurement of the prepared sample. [Figure 29] FIG. 13 is a diagram showing the relationship between defect density and hysteresis amount of the prepared samples. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and the embodiments and aspects of the present invention may be modified without departing from the spirit and scope of the present invention. Various modifications of the details will be readily apparent to those skilled in the art. The present invention should not be construed as being limited to the description of the following embodiment. In the embodiments and examples described below, the same parts or parts having similar functions are denoted by the same reference numerals. The same symbol or hatch pattern is used in common among different drawings, and the repeated explanation is is omitted.

[0019] In each figure described in this specification, the size, thickness, or area of ​​each component is not clearly indicated. may be exaggerated for clarity and are not necessarily limited to scale .

[0020] In addition, the terms "first," "second," "third," etc., used in this specification are used interchangeably to avoid confusion of components. The number is not limited to the number of the first one. For example, "first one" can be changed to " The terms "second" or "third" can be used interchangeably to explain the present invention.

[0021] The function of the "source" and "drain" is to change the direction of current flow during circuit operation. Therefore, in this specification, the terms "source" and "drain" are used interchangeably. The terms may be used interchangeably.

[0022] In this specification, when an etching step is performed after a photolithography step, The mask formed in the photolithography process is removed after the etching process.

[0023] (Embodiment 1) In this embodiment, a semiconductor device according to one embodiment of the present invention and a manufacturing method of the semiconductor device will be described. This will be described with reference to the drawings.

[0024] 1A to 1C are a top view and a cross-sectional view of a transistor 10 included in a semiconductor device. FIG. 1A is a top view of a transistor 10, and FIG. 1B is a side view of the transistor 10 shown in FIG. FIG. 1(C) is a cross-sectional view taken along dashed line CD in FIG. 1(A). In FIG. 1A, for clarity, some of the components of the transistor 10 (e.g. For example, the substrate 11, the undercoat insulating film 13, the gate insulating film 17, the protective film 23, etc. are omitted. .

[0025] The transistor 10 shown in FIG. 1B and FIG. 1C is a gate insulating film formed on a base insulating film 13. a gate electrode 15, and a gate insulating film 17 formed on the base insulating film 13 and the gate electrode 15; The oxide semiconductor film 19 overlaps the gate electrode 15 via the gate insulating film 17. A pair of electrodes 21 are in contact with the conductive film 19. The gate insulating film 17 and the oxide semiconductor The device has a protective film 23 that covers the body film 19 and the pair of electrodes 21.

[0026] In the transistor 10 described in this embodiment, the protective film 23 is made of oxygen having a stoichiometric composition. More preferably, the protective film 23 is an oxide insulating film containing more oxygen than an oxide semiconductor. The amount of oxygen contained in the membrane 19 is greater than the amount of oxygen that is lacking. The oxide insulating film containing a large amount of oxygen is an oxide insulating film from which part of the oxygen is released by heating. Therefore, by providing an oxide insulating film as the protective film 23, from which part of the oxygen is released by heating, Oxygen is diffused into the oxide semiconductor film 19 by the heat treatment, and the oxygen contained in the oxide semiconductor film 19 is As a result, the amount of oxygen vacancies in the oxide semiconductor film 19 can be reduced. This reduces the negative shift of the threshold voltage, resulting in a transistor. The threshold voltage does not vary much due to changes in the gate resistance or optical gate BT stress, providing excellent electrical characteristics. The transistor has a

[0027] In the transistor 10, the oxygen contained in the protective film 23 is directly transferred to the oxide semiconductor. The gate insulating film 17 and the protective film 23 are in contact with each other. The oxygen ions migrate to the oxide semiconductor film 19 through the film 17 .

[0028] In addition, in the protective film 23, the signal appearing at g=2.001 in the electron spin resonance measurement Pin density is 1.5 x 10 18 spins / cm 3 Less than or even 1.0×10 18 spi ns / cm 3 It is preferable that the spin density of the protective film 23 is within the above range. As a result, defects in the interface between the oxide semiconductor film 19 and the protective film 23 and in the protective film 23 are reduced. This makes it possible to reduce the trapping of electrons in the region. As a result, the electrical characteristics of the transistor are as follows: the rise of the on-current at different drain voltages In other words, it is possible to fabricate a transistor having excellent electrical characteristics. The above spin density of the protective film 23 is the value after heat treatment.

[0029] The protective film 23 has a thickness of 30 nm to 500 nm, preferably 100 nm to 400 nm. A silicon oxide film, a silicon oxynitride film, or the like having a thickness of 00 nm or less can be used.

[0030] Other configuration details of the transistor 10 will be described below.

[0031] There is no particular restriction on the material of the substrate 11, but it should be at least durable enough to withstand the subsequent heat treatment. For example, glass substrate, ceramic substrate, quartz substrate, safa substrate, etc. A metal substrate or the like may be used as the substrate 11. Also, a single crystal substrate such as silicon or silicon carbide may be used. Crystalline semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SOI It is also possible to apply a substrate or the like, and a semiconductor element is provided on the substrate. It may be used as the substrate 11 .

[0032] In addition, a flexible substrate is used as the substrate 11, and the base insulating film 13 and the thixotropic film 14 are directly formed on the flexible substrate. Alternatively, a release layer may be provided between the substrate 11 and the base insulating film 13. The release layer may be removed from the substrate 11 after a semiconductor device is partially or entirely completed thereon. The transistor 10 can then be separated and transferred to another substrate. It can also be transferred onto substrates with poor heat resistance or flexible substrates.

[0033] The base insulating film 13 may be made of silicon oxide, silicon oxynitride, silicon nitride, silicon nitride oxide, or silicon oxynitride. Silicon, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, nitric oxide The base insulating film 13 may be made of silicon nitride, gallium oxide, By using hafnium oxide, yttrium oxide, aluminum oxide, etc., the substrate 11 can be Impurities such as alkali metals, water, and hydrogen can be prevented from diffusing into the oxide semiconductor film 19. .

[0034] The gate electrode 15 may be made of aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, or the like. A metal element selected from stainless steel, or an alloy containing the above-mentioned metal elements, or the above-mentioned alloys The alloy may be made of a combination of manganese, zirconium, or other elements. The gate electrode may be formed of one or more metal elements selected from the group consisting of arsenic, tin, and zinc. 15 may be a single-layer structure or a laminated structure of two or more layers. For example, Single-layer structure of aluminum film, double-layer structure of titanium film laminated on aluminum film, titanium nitride film Two-layer structure with a titanium film laminated on top, and two-layer structure with a tungsten film laminated on a titanium nitride film , a two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film, A titanium film is laminated on the titanium film, an aluminum film is laminated on the aluminum film, and a titanium film is formed on the aluminum film. There are also three-layer structures, such as aluminum, titanium, tantalum, tungsten, and molybdenum. A film of elements selected from the group consisting of arsenic, chromium, neodymium, and scandium, or a combination of multiple elements. An alloy film or a nitride film may also be used.

[0035] The gate electrode 15 is made of indium tin oxide or indium oxide containing tungsten oxide. Indium zinc oxide containing tungsten oxide, Indium oxide containing titanium oxide Add indium tin oxide, indium zinc oxide, and silicon oxide containing titanium oxide. A light-transmitting conductive material such as indium tin oxide can also be used. A laminated structure of the light-transmitting conductive material and the metal element may also be used.

[0036] In addition, an In-Ga-Zn-based oxynitride semiconductor is provided between the gate electrode 15 and the gate insulating film 17. film, In-Sn-based oxynitride semiconductor film, In-Ga-based oxynitride semiconductor film, In-Zn-based oxynitride semiconductor film Semiconductor film, Sn-based oxynitride semiconductor film, In-based oxynitride semiconductor film, metal nitride film (InN It is preferable to provide a film having a thickness of 5 eV or more, preferably 5.5 eV or more. V or more, which is greater than the electron affinity of oxide semiconductors. The threshold voltage of a transistor using a semiconductor can be made positive, and so-called normally It is possible to realize a switching element with off characteristics. For example, In-Ga-Zn-based oxynitride semiconductor In the case of using a film, the nitrogen concentration is at least higher than that of the oxide semiconductor film 19, specifically, 7 atomic %. The above-mentioned In-Ga-Zn-based oxynitride semiconductor film is used.

[0037] The gate insulating film 17 may be, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. , silicon nitride, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn system A metal oxide or the like may be used, and the gate insulating film 17 may be formed as a laminated layer or a single layer. In the above, an oxide insulating film from which oxygen is released by heating is used on the side in contact with the oxide semiconductor film 19. By using a film from which oxygen is released by heating as the gate insulating film 17, It is possible to reduce the interface state at the interface between the film 19 and the gate insulating film 17, and thus the electrical A transistor with little deterioration in characteristics can be obtained. By providing an insulating film on the electrode side that has a blocking effect against oxygen, hydrogen, water, etc., The diffusion of oxygen from the semiconductor film 19 to the outside and the diffusion of hydrogen and water from the outside to the oxide semiconductor film 19 The insulating film that has a blocking effect on oxygen, hydrogen, water, etc. is , aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, iridium oxide Examples of such oxides include yttrium, yttrium oxynitride, hafnium oxide, and hafnium oxynitride.

[0038] The gate insulating film 17 is made of hafnium silicate (HfSiO x ), nitrogen is added Hafnium Silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminum Neate (HfAl x O y N z ), hafnium oxide, yttrium oxide and other high-k The use of this material can reduce gate leakage in transistors.

[0039] The thickness of the gate insulating film 17 is preferably 5 nm to 400 nm, more preferably 10 nm to 300 nm. 00 nm or less, and more preferably 50 nm or more and 250 nm or less.

[0040] The oxide semiconductor film 19 contains at least indium (In) or zinc (Zn). It is preferable that the oxide semiconductor contains both In and Zn. In order to reduce the variation in the electrical characteristics of the transistors used, stabilizers are also used. It is preferred to have one or more of the following:

[0041] The stabilizers are gallium (Ga), tin (Sn), hafnium (Hf), and aluminum. Aluminum (Al) or zirconium (Zr). Also, with other stabilizers The lanthanides lanthanum (La), cerium (Ce), and praseodymium (P r), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium ( Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium Er, Thulium, Ytterbium, Lutetium, etc. .

[0042] For example, oxide semiconductors include indium oxide, tin oxide, zinc oxide, and binary metal oxides. In-Zn metal oxides, Sn-Zn metal oxides, Al-Zn metal oxides, and Z n-Mg metal oxides, Sn-Mg metal oxides, In-Mg metal oxides, In-Ga In-Ga-Zn-based metal oxide (also called IGZO), which is a ternary metal oxide (See below), In-Al-Zn metal oxide, In-Sn-Zn metal oxide, Sn-Ga -Zn-based metal oxides, Al-Ga-Zn-based metal oxides, Sn-Al-Zn-based metal oxides, In-Hf-Zn metal oxide, In-La-Zn metal oxide, In-Ce-Zn metal oxide Metal oxides, In-Pr-Zn metal oxides, In-Nd-Zn metal oxides, In-Sm -Zn-based metal oxides, In-Eu-Zn-based metal oxides, In-Gd-Zn-based metal oxides, In-Tb-Zn metal oxide, In-Dy-Zn metal oxide, In-Ho-Zn gold Metal oxides, In-Er-Zn metal oxides, In-Tm-Zn metal oxides, In-Yb -Zn-based metal oxides, In-Lu-Zn-based metal oxides, and quaternary metal oxides such as In-S n-Ga-Zn metal oxides, In-Hf-Ga-Zn metal oxides, In-Al-Ga -Zn-based metal oxides, In-Sn-Al-Zn-based metal oxides, In-Sn-Hf-Zn-based Metal oxides and In-Hf-Al-Zn based metal oxides can be used.

[0043] In addition, for example, In-Ga-Zn-based metal oxide is a metal oxide having In, Ga, and Zn as main components. The ratio of In, Ga, and Zn does not matter. Metal elements other than Ga and Zn may be included.

[0044] In addition, as an oxide semiconductor, InMO3(ZnO) m (m>0 and m is not an integer) In addition, M may be selected from Ga, Fe, Mn, and Co. It indicates one or more metal elements. In2SnO5 (ZnO) n A material expressed as (n>0, and n is an integer) may be used.

[0045] For example, In:Ga:Zn=1:1:1(=1 / 3:1 / 3:1 / 3), In:Ga:Z n=2:2:1 (=2 / 5:2 / 5:1 / 5), or In:Ga:Zn=3:1:2 In-Ga-Zn metal oxide with an atomic ratio of (=1 / 2:1 / 6:1 / 3) and its composition Alternatively, In:Sn:Zn=1:1:1 (=1 / 3:1 / 3:1 / 3), In:Sn:Zn=2:1:3(=1 / 3:1 / 6:1 / 2)A In- with an atomic ratio of In:Sn:Zn=2:1:5 (=1 / 4:1 / 8:5 / 8) It is recommended to use Sn-Zn based metal oxides or oxides with similar compositions. The atomic ratio includes a variation of ±20% of the above atomic ratio as an error.

[0046] However, the present invention is not limited to these, and the semiconductor properties and electrical properties required (field effect mobility, threshold In addition, the semiconductor characteristics and In order to obtain the electrical properties, the carrier density, impurity concentration, defect density, and atomic ratios of metal elements and oxygen are calculated. It is preferable to make the numerical ratio, interatomic distance, density, etc. appropriate.

[0047] For example, high mobility can be obtained relatively easily with In-Sn-Zn metal oxides. However, in the case of In-Ga-Zn metal oxides, the migration is improved by reducing the defect density in the bulk. It can increase mobility.

[0048] In addition, a metal oxide that can be formed in the oxide semiconductor film 19 has an energy gap of It is 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By using an oxide semiconductor with a wide energy gap, the off-state current of a transistor can be reduced. It can be reduced.

[0049] The oxide semiconductor film 19 may have an amorphous structure, a single crystal structure, or a polycrystalline structure. stomach.

[0050] The oxide semiconductor film 19 may have, for example, a non-single crystal structure. AAC (C Axis Aligned Crystal), polycrystalline, microcrystalline, amorphous part The amorphous part has a higher defect level density than the microcrystal and CAAC. The crystal has a higher density of defect states than the CAAC. CAAC-OS(C Axis Aligned Crystal Oxide Sem For example, the CAAC-OS has a c-axis orientation and an a-axis or / and the b axis is not macro-aligned.

[0051] The oxide semiconductor film 19 may have, for example, microcrystals. The microcrystalline oxide semiconductor film has a thickness of, for example, 1 nm to 10 nm. The film contains microcrystals (also called nanocrystals) with a size of less than one millimeter.

[0052] The oxide semiconductor film 19 may have, for example, an amorphous portion. The semiconductor is called an amorphous oxide semiconductor. An amorphous oxide semiconductor film has, for example, an atomic arrangement The amorphous oxide semiconductor film is, for example, completely non-crystalline. It is crystalline and does not have any crystalline parts.

[0053] Note that the oxide semiconductor film 19 may be a CAAC-OS, a microcrystalline oxide semiconductor, or an amorphous oxide semiconductor. The mixed film may be, for example, a region of an amorphous oxide semiconductor and a region of a microcrystalline oxide semiconductor. The mixed film has a region of a compound semiconductor and a region of a CAAC-OS. A region of a crystalline oxide semiconductor, a region of a microcrystalline oxide semiconductor, and a region of a CAAC-OS. It may have a laminated structure.

[0054] Note that the oxide semiconductor film 19 may have, for example, a single crystal. The c-axis of the crystal part is a normal vector of the surface on which the crystal part is formed or a normal vector of the surface. It is preferable that the a-axis and the a-axis are aligned parallel to each other between different crystal parts. The directions of the a-axis and b-axis may be different from each other. There is a C-OS film.

[0055] The CAAC-OS film is described in detail below. They are often smaller than 100 nm and fit into a cube. TEM (Transmission Electron Microscope) In the observed image, the boundaries between the crystalline parts in the CAAC-OS film are not clear. TEM revealed clear grain boundaries in the CAAC-OS film. Therefore, the decrease in electron mobility due to grain boundaries is suppressed in the CAAC-OS film. To be controlled.

[0056] The crystal parts included in the CAAC-OS film have c-axes normal to the surface on which the CAAC-OS film is formed. The vectors are aligned parallel to the surface normal vector and perpendicular to the ab plane. When viewed from the direction, the metal atoms are arranged in a triangular or hexagonal shape, and when viewed from the direction perpendicular to the c-axis, In the crystal structure, metal atoms are arranged in layers, or metal atoms and oxygen atoms are arranged in layers. The directions of the a-axis and the b-axis may be different between the portions. When describing it as straight, it is also in the range of 80° to 100°, preferably 85° to 95°. In addition, when simply describing it as parallel, it is -10° or more and 10° or less, and preferably This also includes the range of -5° to 5°.

[0057] In the CAAC-OS film, the distribution of the crystal parts may not be uniform. In the process of forming the C-OS film, when crystal growth is performed from the surface side of the oxide semiconductor film, The proportion of crystalline parts may be higher near the surface than near the growth surface. By adding impurities to the AC-OS film, the crystals of the crystal parts in the impurity-added region are Sexuality may also decrease.

[0058] The c-axis of the crystal part in the CAAC-OS film is the normal vector of the surface on which the CAAC-OS film is formed. The shape of the CAAC-OS film is Depending on the shape (cross-sectional shape of the surface to be formed or cross-sectional shape of the surface), In addition, the crystallization process such as heat treatment is performed when or after the film is formed. Therefore, the c-axis of the crystal part is The direction is aligned so as to be parallel to the normal vector of the surface on which the light is formed or the normal vector of the surface.

[0059] The electrical characteristics of transistors using CAAC-OS films change when exposed to visible or ultraviolet light. Therefore, the transistor has high reliability.

[0060] The oxide semiconductor film 19 may have a structure in which a plurality of oxide semiconductor films are stacked. For example, The oxide semiconductor film 19 is a stack of a first oxide semiconductor film and a second oxide semiconductor film. The first oxide semiconductor film and the second oxide semiconductor film may be formed using metal oxides having different compositions. For example, one of a binary metal oxide, a quaternary metal oxide, and a quaternary metal oxide may be used for the first oxide semiconductor film. The second oxide semiconductor film is made of a binary metal oxide or a quaternary metal oxide different from that of the first oxide semiconductor film. Metal oxides may also be used.

[0061] In addition, the first oxide semiconductor film and the second oxide semiconductor film are made to contain the same elements, and the composition of both films is For example, the atomic ratio of the first oxide semiconductor film may be set to In:Ga:Zn=1. and the atomic ratio of the second oxide semiconductor film is In:Ga:Zn=3:1:2. The atomic ratio of the first oxide semiconductor film may be In:Ga:Zn=1:3:2, The atomic ratio of the second oxide semiconductor film may be In:Ga:Zn=2:1:3. The atomic ratio of each oxide semiconductor film is subject to a margin of error of ±20%. Includes movement.

[0062] At this time, the side of the first oxide semiconductor film and the second oxide semiconductor film closer to the gate electrode (the The In and Ga contents of the oxide semiconductor film on the channel side are preferably In>Ga. The In and Ga contents of the oxide semiconductor film on the side farther from the back electrode (the back channel side) are set to In≦ It is better to call it Ga.

[0063] In oxide semiconductors, the s orbitals of heavy metals mainly contribute to carrier conduction, and the In content By increasing the amount of Ga, more s orbitals overlap, resulting in an oxide with a composition of In>Ga. In oxides with a composition of In≦Ga have higher mobility. The formation energy of oxygen vacancies is larger than that of Ga, so oxygen vacancies are less likely to occur. The oxide having the composition In>Ga has stable characteristics as compared with the oxide having the composition In>Ga.

[0064] An oxide semiconductor with a composition of In>Ga is applied to the channel side, and In≦ By using an oxide semiconductor containing Ga, the field-effect mobility and This makes it possible to further improve reliability.

[0065] In addition, the first oxide semiconductor film and the second oxide semiconductor film may be formed using oxide semiconductors having different crystallinity. That is, a single crystal oxide semiconductor, a polycrystalline oxide semiconductor, a microcrystalline oxide semiconductor, A conductor, an amorphous oxide semiconductor, or a CAAC-OS may be appropriately combined. In addition, at least one of the first oxide semiconductor film and the second oxide semiconductor film is amorphous. By applying a high-quality oxide semiconductor, the internal stress of the oxide semiconductor film 19 and the external stress are alleviated. This reduces the variation in transistor characteristics and further improves the reliability of the transistor. It becomes possible.

[0066] The thickness of the oxide semiconductor film 19 is preferably 1 nm to 100 nm, more preferably 1 nm to 50 nm. 0 nm or less, more preferably 1 nm to 30 nm, and even more preferably 3 nm to 20 nm It is preferable to set it to m or less.

[0067] In the oxide semiconductor film 19, the concentration of the alkali metal or alkaline earth metal is 1×10 18 atoms / cm 3 Less than 2×10, more preferably 16 atoms / cm 3 Below It is desirable that the alkali metal and the alkaline earth metal have a property of bonding with the oxide semiconductor. This is because carriers may be generated, which may cause an increase in the off-state current of the transistor. .

[0068] The oxide semiconductor film 19 has a thickness of 5×10 18 atoms / cm 3 The following nitrogen may be included: .

[0069] The pair of electrodes 21 is made of a conductive material such as aluminum, titanium, chromium, nickel, copper, or indium. A metal consisting of tritium, zirconium, molybdenum, silver, tantalum, or tungsten. A single-layer or multi-layer structure is used, for example, of a solid metal or an alloy containing this metal as the main component. A single-layer structure of an aluminum film containing silicon, and a titanium film laminated on an aluminum film. Layer structure, two-layer structure with titanium film laminated on tungsten film, copper-magnesium-aluminum A two-layer structure in which a copper film is laminated on an aluminum alloy film, a titanium film or titanium nitride film, and the titanium film Alternatively, an aluminum film or a copper film is laminated on the titanium nitride film, and then a titanium film is laminated on the aluminum film or a copper film. a three-layer structure in which a titanium nitride film or a molybdenum film is formed; An aluminum film or a copper film is laminated on the molybdenum film or the molybdenum nitride film. There are three-layer structures in which a molybdenum film or a molybdenum nitride film is further formed on top of the above. A transparent conductive material containing indium oxide, tin oxide, or zinc oxide may also be used.

[0070] In this embodiment, the pair of electrodes 21 is provided between the oxide semiconductor film 19 and the protective film 23. However, a pair of electrodes 21 may be provided between the gate insulating film 17 and the oxide semiconductor film 19. stomach.

[0071] Next, a manufacturing method of the transistor shown in FIGS.

[0072] As shown in FIG. 2A, a base insulating film 13 and a gate electrode 15 are formed on a substrate 11. A gate insulating film 17 is formed on the gate electrode 15. Next, an oxide semiconductor is formed on the gate insulating film 17. It forms the body membrane 18.

[0073] The base insulating film 13 is formed by a sputtering method, a CVD method, or the like. A 0 nm silicon oxynitride film is formed by CVD.

[0074] The gate electrode 15 is formed by the following methods. First, a sputtering method, a CVD method, and a deposition method are used. A conductive film is formed by a photolithography process or the like, and a mask is formed on the conductive film by a photolithography process. Next, the conductive film is partially etched using the mask to form the gate electrode 15. After this, the mask is removed.

[0075] The gate electrode 15 may be formed by electrolytic plating, printing, ink jet printing, or the like instead of the above-mentioned method. It may be formed by a dipping method or the like.

[0076] Here, a tungsten film having a thickness of 100 nm is formed by sputtering. A mask is formed by a photolithography process, and the tungsten film is doped using the mask. A gate electrode 15 is formed by dry etching.

[0077] The gate insulating film 17 is formed by a sputtering method, a CVD method, a vapor deposition method or the like.

[0078] Here, a silicon nitride film having a thickness of 50 nm is formed by CVD, and then a silicon nitride film having a thickness of 200 nm is formed by CVD. The silicon oxynitride film is formed by the CVD method to form the gate insulating film 17 .

[0079] The oxide semiconductor film 18 can be formed by sputtering, coating, pulsed laser deposition, laser aligning, or the like. The film is formed by abrasion or the like.

[0080] When the oxide semiconductor film 18 is formed by a sputtering method, an electric field for generating plasma is applied. The power source may be an RF power source, an AC power source, a DC power source, or the like.

[0081] The sputtering gas may be a rare gas (typically argon) atmosphere, an oxygen atmosphere, a rare gas and In the case of a mixed gas of rare gas and oxygen, the rare gas should be It is preferable to increase the gas ratio of oxygen.

[0082] The target may be appropriately selected according to the composition of the oxide semiconductor film 18 to be formed. stomach.

[0083] Note that when the oxide semiconductor film 18 is formed by, for example, a sputtering method, The plate temperature is 150° C. or more and 750° C. or less, preferably 150° C. or more and 450° C. or less, and more preferably Alternatively, the oxide semiconductor film 18 is formed at a temperature of 200° C. or higher and 350° C. or lower. A C-OS film can be formed.

[0084] Note that the CAAC-OS film is formed on a polycrystalline oxide semiconductor sputtering target. The sputtering method is carried out using a sputtering target. When the ions collide, the crystalline regions in the sputtering target cleave from the ab plane. The particles are then peeled off as flat or pellet-shaped sputtered particles with surfaces parallel to the ab plane. In this case, the plate-like sputtered particles may be separated from the crystal. By allowing the catalyst to reach the substrate as it is, a CAAC-OS film can be formed.

[0085] In addition, the following conditions are preferably applied to form the CAAC-OS film.

[0086] By suppressing the inclusion of impurities during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the film formation chamber is In addition, the impurity concentration in the deposition gas may be reduced. A deposition gas having a temperature of -80°C or lower, preferably -100°C or lower, is used.

[0087] In addition, by increasing the substrate heating temperature during film formation, the migration of sputtered particles after they reach the substrate is reduced. Specifically, the substrate heating temperature is set to 100° C. or higher and lower than the substrate distortion point, preferably The film is formed at a temperature between 200 and 500°C. By increasing the substrate heating temperature during film formation, When a flat sputtered particle reaches a substrate, migration occurs on the substrate. , the flat surface of the sputtered particle adheres to the substrate.

[0088] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition is reduced. The oxygen ratio in the deposition gas is preferably 30% by volume or more, and more preferably 100% by volume or more. The product is %.

[0089] As an example of a sputtering target, an In-Ga-Zn metal oxide target is The details are shown below.

[0090] InO X powder, GaO Y Powder and ZnO Z The powders are mixed in a specified number of moles and then pressurized. By heat treatment at a temperature between 1000 and 1500℃, polycrystalline In-Ga -Zn-based metal oxide target. Note that X, Y, and Z are any positive numbers. The specified mole ratio is, for example, InO X powder, GaO Y Powder and ZnO Z The powder, 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3 or 3:1:2 The type of powder and the molar ratio of the powder to be mixed depend on the sputtering turbine to be prepared. The setting can be changed as appropriate depending on the get.

[0091] Next, as shown in FIG. 2B, the oxide semiconductor film 19 that is isolated from the gate insulating film 17 is The oxide semiconductor film 18 is formed on the gate electrode 15 so as to overlap with a part of the gate electrode 15. After forming a mask by a photolithography process, the oxide semiconductor film 18 is By etching a part of the oxide semiconductor film 19, an element-isolated oxide semiconductor film 19 can be formed. Cut.

[0092] In addition, by using a printing method for the oxide semiconductor film 19, the oxide semiconductor film 19 can be formed directly.

[0093] Here, the oxide semiconductor film 18 is formed to a thickness of 35 nm by a sputtering method, and then A mask is formed on the oxide semiconductor film 18, and a part of the oxide semiconductor film 18 is selectively etched. By this etching, the oxide semiconductor film 19 is formed. After that, the mask is removed.

[0094] Next, as shown in FIG. 2(C), a pair of electrodes 21 is formed.

[0095] The method for forming the pair of electrodes 21 will be described below. First, the pair of electrodes 21 is formed by sputtering, CVD, or vapor deposition. Next, a mask is formed on the conductive film by a photolithography process. Next, the conductive film is etched using the mask to form a pair of electrodes 21. After this, the mask is removed.

[0096] Here, a tungsten film with a thickness of 50 nm and an alumina film with a thickness of 400 nm are deposited by sputtering. An aluminum film and a titanium film having a thickness of 100 nm are laminated in this order by sputtering. Next, a mask is formed on the titanium film by a photolithography process. The tungsten film, the aluminum film, and the titanium film are dry etched to form a pair of electrodes 2. Form 1.

[0097] After the pair of electrodes 21 is formed, a cleaning process is performed to remove etching residues. By carrying out this cleaning process, it is possible to prevent a short circuit between the pair of electrodes 21. The cleaning process is carried out using TMAH (Tetramethylammonium Hydrochloride). xide) solution, and acidic solutions such as dilute hydrofluoric acid, oxalic acid, and phosphoric acid. , or water.

[0098] Next, as shown in FIG. 2(D), a protective film 23 is formed.

[0099] After forming the pair of electrodes 21, the protective film 23 is The substrate 11 placed in the oven is heated to 180° C. or higher and 260° C. or lower, preferably 180° C. or higher and 250° C. or lower. The temperature is preferably kept at 180° C. or higher and 230° C. or lower, and the raw material gas is introduced into the processing chamber. The pressure in the processing chamber is set to 100 Pa or more and 250 Pa or less, and more preferably 100 Pa or less. and 0.17 W / cm2 on the electrodes installed in the treatment chamber.2 More than 0.5W / cm 2 Less than or equal to 0.25 W / cm 2 More than 0.40W / cm 2 The following are more preferred Or 0.26W / cm 2 More than 0.35W / cm 2 The following high frequency power supply conditions are used: A silicon oxide film or a silicon oxynitride film is formed on the substrate 11 .

[0100] As the source gas for the protective film 23, a deposition gas containing silicon and an oxidizing gas are used. Representative examples of deposition gases containing silicon include silane, disilane, trisilane, and Examples of oxidizing gases include oxygen, ozone, nitrous oxide, and fluorinated silane. Nitrogen, etc.

[0101] The deposition conditions for the protective film 23 are as follows: high frequency power with the above power density in a processing chamber at the above pressure. By supplying the gas, the decomposition efficiency of the source gas in the plasma increases, the oxygen radicals increase, and the As the deposition gas containing silicon is oxidized, the oxygen content in the protective film 23 becomes stoichiometric. On the other hand, in the film formed at the substrate temperature, the composition of silicon and oxide is higher than the target composition. Because the bonding strength of the atoms is weak, some of the oxygen in the film is released during the heat treatment in the subsequent process. As a result, an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition can be formed. That is, an oxide insulating film from which part of oxygen is released by heating can be formed.

[0102] As the source gas for the protective film 23, the ratio of a deposition gas containing silicon to an oxidizing gas is By increasing the number of electrodes and setting the high frequency power to the above power density, the deposition rate can be increased. In addition, the oxygen content in the protective film can be increased.

[0103] Here, the protective film 23 is made of silane at a flow rate of 160 sccm and silane at a flow rate of 4000 sccm. Nitrous oxide was used as the source gas, the pressure in the processing chamber was 200 Pa, and the substrate temperature was 220°C. A 7.12MHz high-frequency power source was used to supply 1500W of high-frequency power to the parallel plate electrodes. A silicon oxynitride film with a thickness of 400 nm is formed by the plasma CVD method. The Zuma CVD device has an electrode area of ​​6000 cm 2 This is a parallel plate type plasma CVD device. The power supplied was converted to power per unit area (power density) of 0.25 W / cm 2 It is.

[0104] Next, heat treatment is performed to diffuse oxygen contained in the protective film 23 into the oxide semiconductor film 19. By filling the oxygen vacancies in the oxide semiconductor film 19, In addition, the amount of oxygen vacancies in the protective film 23 can be reduced by the heat treatment after the formation of the protective film 23. The spin density of the signal appearing at g=2.001 in the electron spin resonance measurement of the protective film 23 is 1. 5×10 18 spins / cm 3 Less than 1.0 x 10 18 spins / cm 3 The temperature of the heat treatment is typically 150° C. or higher and lower than the substrate distortion point, preferably The heating temperature is preferably 250°C or higher and 450°C or lower, and more preferably 300°C or higher and 450°C or lower.

[0105] In addition, by setting the temperature of the heat treatment to be higher than the film formation temperature of the protective film 23, The oxygen contained in the oxide semiconductor film 19 is diffused into the oxide semiconductor film 19. The temperature of the heat treatment is 250℃ or higher, and the temperature is below the substrate distortion point. , preferably 250°C or higher and 450°C or lower, and more preferably 300°C or higher and 450°C or lower. It is possible.

[0106] The heat treatment is carried out using an electric furnace, an RTA (Rapid Thermal Anneal) device, etc. By using an RTA device, the temperature of the substrate can be raised above the distortion point for a short period of time. Therefore, the oxygen from the protective film 23 to the oxide semiconductor film 19 can be prevented from being transferred to the oxide semiconductor film 19. The diffusion time can be shortened.

[0107] Heat treatment is carried out in a vacuum of nitrogen, oxygen, or ultra-dry air (water content of 20 ppm or less, preferably 1 ppm). m or less, preferably 10 ppb or less of air), or rare gases (argon, helium, etc.) The reaction may be carried out under atmospheric conditions.

[0108] Here, the heat treatment is performed in a nitrogen and oxygen atmosphere at 350° C. for 1 hour to remove the oxide contained in the protective film 23. In this embodiment, the oxygen contained in the protective film 23 is diffused into the oxide semiconductor film 19. Since oxygen can be diffused into the oxide semiconductor film 19 by solid-phase diffusion of Therefore, oxygen can be added to the oxide semiconductor film 19.

[0109] The above process suppresses the negative shift of the threshold voltage and provides excellent electrical characteristics. It is possible to fabricate transistors. In addition, the change over time and the optical gate BT stress test It is possible to manufacture a highly reliable transistor with little fluctuation in electrical characteristics.

[0110] Next, a transistor having a structure different from that shown in FIG. 1 will be described with reference to FIGS. 3 and 4. In the transistor 10, the oxide semiconductor film is in contact with the oxide semiconductor film and has a dense film with a high film density. The structure in which the film is provided will be described with reference to FIG.

[0111] The transistor 30 shown in FIG. 3 includes a base insulating film 13 provided on a substrate 11 and a base insulating film The gate electrode 15 is formed on the insulating film 13. A gate insulating film 33 composed of an insulating film 31 and an insulating film 32 is formed on the gate insulating film 5. The oxide semiconductor film 20 overlaps with the gate electrode 15 via the insulating film 33. The gate insulating film 33, the oxide semiconductor film 20, and the pair of electrodes 21 are in contact with each other. A protective film 37 composed of an insulating film 34 and an insulating film 36 is formed on the pair of electrodes 21. do.

[0112] In the transistor 30 described in this embodiment, the oxide semiconductor film 20 is oxidized in an oxidizing atmosphere. The plasma generated by the oxidizing atmosphere is oxygen, ozone, nitrous oxide, etc. Furthermore, in plasma processing, a parallel plate type plasma CVD device is used. A bias is applied to the upper electrode, and no bias is applied to the lower electrode on which the substrate 11 is mounted. It is preferable to expose the oxide semiconductor film to plasma generated in a cold state. Since the oxide semiconductor film 20 is supplied with oxygen, the oxide semiconductor film 20 is The amount of oxygen vacancies can be reduced.

[0113] The transistor 30 includes an insulating film 32 and an insulating film 33 in contact with the oxide semiconductor film 20. The insulating film 32 and the insulating film 34 are dense films with high film density. Therefore, in the process of forming the insulating film 36 to be formed later, damage to the oxide semiconductor film 20 is prevented. It is possible to reduce the noise.

[0114] The insulating film 32 and the insulating film 34 have a thickness of 5 nm to 400 nm, preferably 5 nm to 500 nm. A silicon oxide film having a thickness of 10 nm to 30 nm, preferably 50 nm to 50 nm. A silicon nitride film or the like can be used.

[0115] In addition, the insulating film 36, which is a part of the protective film 37 provided on the transistor 30, is stoichiometric. The oxide insulating film contains more oxygen than the oxygen that satisfies the insulating composition. The film 36 contains oxygen in an amount equal to or greater than the amount of oxygen vacancies contained in the oxide semiconductor film 20. The oxide insulating film containing more oxygen than the oxygen that satisfies the condition is an oxide insulating film in which some of the oxygen is released by heating. Therefore, the oxide insulating film from which part of the oxygen is released by heating is used as the protective film 37. By providing the oxide semiconductor film 20 in the above-mentioned manner, oxygen can be diffused into the oxide semiconductor film 20 by heat treatment. By the heat treatment, oxygen contained in the insulating film 36 diffuses into the oxide semiconductor film 20, It is possible to compensate for the oxygen vacancies contained in the conductive film 20. As a result, the oxide semiconductor film The amount of oxygen vacancies in 20 is reduced, and the negative shift in threshold voltage is suppressed. In addition, the threshold voltage is also changed by aging and optical gate BT stress testing. This results in a transistor with less fluctuation and excellent electrical characteristics.

[0116] In the transistor 30, oxygen contained in the insulating film 36 is The oxide semiconductor film 20 is then transferred via one or more of the insulating films 32 and 34.

[0117] Next, a manufacturing method of the transistor shown in FIGS. 3A to 3C will be described with reference to FIGS.

[0118] As shown in FIG. 4A, an insulating base film 13 and a gate electrode 14 are formed on a substrate 11 in the same manner as in the first embodiment. Next, the insulating film 31 and the insulating film 32 which function as the gate insulating film 33 are formed. Form 2.

[0119] The insulating film 31 is a silicon nitride film having a thickness of 5 nm to 400 nm formed by a CVD method. Next, a silicon oxynitride film or a silicon nitride film is formed as the insulating film 32 by a CVD method. A silicon oxide film or silicon oxynitride film having an insulating layer of 100 nm or more and 400 nm or less is formed. The thickness of the insulating film 31 and the insulating film 32 is such that the total thickness of the two insulating films is equal to that of the transistor shown in FIG. It is only necessary to appropriately select the thickness so as to be within the range of the gate insulating film 17 of 10.

[0120] Here, the insulating film 31 is made of silane at a flow rate of 50 sccm and one Nitrous oxide was used as the source gas, the pressure in the processing chamber was 60 Pa, and the substrate temperature was 350°C. A 12MHz high-frequency power source was used to supply 1500W of high-frequency power to parallel plate electrodes. A silicon nitride film with a thickness of 50 nm is formed by the Zuma CVD method.

[0121] The insulating film 32 is made of silane at a flow rate of 20 sccm and nitrous oxide at a flow rate of 3000 sccm. The source gas was used, the pressure in the processing chamber was 40 Pa, the substrate temperature was 350°C, and A plasma CVD method was used in which 100W of radio frequency power was supplied to parallel plate electrodes using a radio frequency power source of A silicon oxynitride film with a thickness of 200 nm is formed under these conditions. Therefore, a silicon oxynitride film having a higher film density than the insulating film 31 can be formed.

[0122] Here, by increasing the thickness of the gate insulating film 33, it is more preferable to increase the resistivity to 5×1 0 13 Ω cm or more 1×10 15 Silicon nitride film and silicon oxynitride film with a resistance of less than Ω·cm By laminating these layers, a gate electrode 15 of a transistor to be formed later and an oxide semiconductor film 20 or the pair of electrodes 21, electrostatic breakdown occurring between the pair of electrodes 20 can be suppressed.

[0123] Next, as shown in FIG. 4B, an oxide semiconductor is formed on the gate insulating film 33 in the same manner as in the first embodiment. A conductive film 19 is formed.

[0124] Next, as shown in FIG. 4C, a pair of electrodes 21 is formed. Next, the oxide semiconductor film 19 The oxide semiconductor film 19 is exposed to plasma generated in an oxidizing atmosphere to supply oxygen 22 to the oxide semiconductor film 19. The oxide semiconductor film 20 shown in FIG. 4(D) is formed. The oxidizing atmosphere may be oxygen, ozone, or ammonia. In addition, in the plasma processing, the substrate 11 is placed in an atmosphere of nitrous oxide or the like. The oxide semiconductor film 19 is exposed to plasma generated without applying a bias to the external electrode. As a result, the oxide semiconductor film 19 is not damaged and oxygen is supplied. It is possible.

[0125] In this embodiment, dinitrogen monoxide is introduced into the processing chamber of the plasma CVD apparatus, and the upper The generated radiation was generated by supplying 150 W of high-frequency power to the electrode using a 27.12 MHz high-frequency power source. The oxide semiconductor film 19 is exposed to the oxygen plasma.

[0126] Next, an insulating film 34 is formed on the oxide semiconductor film 20 and the pair of electrodes 21. The raw gases used were silane at a flow rate of 20 sccm and dinitrogen monoxide at a flow rate of 3000 sccm. The chamber pressure was set to 200 Pa, the substrate temperature to 350°C, and a 27.12 MHz high-frequency power source was used. A 100W high-frequency power was supplied to parallel plate electrodes by the plasma CVD method, and a 10nm thick film was formed. Under these conditions, a dense silicon oxynitride film is formed, and the film density is sufficient for the subsequent process. It is possible to form a silicon oxynitride film having a thickness higher than that of the insulating film 36 formed in the above step.

[0127] Next, oxygen 35 may be added to the insulating film 34. The methods include ion implantation, ion doping, plasma treatment, etc. The insulating film 34 may be an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. Cut.

[0128] Next, as shown in FIG. 4E, an insulating film 36 is formed on the insulating film 34. In the same manner as the protective film 23 formed on the substrate 10, the protective film 23 is placed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate 11 is heated to a temperature of 180° C. or higher and 260° C. or lower, preferably 180° C. or higher and 250° C. or lower. More preferably, the temperature is kept at 180° C. or higher and 230° C. or lower, and the raw material gas is introduced into the treatment chamber. The pressure in the treatment chamber is set to 100 Pa or more and 250 Pa or less, and more preferably 100 Pa or more. 200 Pa or less, and 0.17 W / cm to the electrode installed in the treatment chamber 2 More than 0.5W / c m 2 Less than or equal to 0.25 W / cm 2 More than 0.40W / cm 2 The following is more preferable: is 0.26W / cm 2 More than 0.35W / cm 2 Under the following conditions for supplying high frequency power, As the insulating film 34, a silicon oxide film or a silicon oxynitride film is formed.

[0129] Next, similarly to the transistor 10, heat treatment is performed to remove oxygen from the insulating film 36. The oxygen vacancies in the oxide semiconductor film 20 are filled by diffusing the oxygen into the oxide semiconductor film 20. As a result, the amount of oxygen vacancies in the oxide semiconductor film 20 can be reduced.

[0130] The above process suppresses the negative shift of the threshold voltage and provides excellent electrical characteristics. It is possible to fabricate transistors. In addition, the change over time and the optical gate BT stress test It is possible to manufacture a highly reliable transistor with little fluctuation in electrical characteristics.

[0131] Note that the configurations and methods described in this embodiment may be the same as those described in other embodiments and examples. and the like.

[0132] (Embodiment 2) In this embodiment, a transistor having a structure different from that in Embodiment 1 will be described with reference to FIG. The transistor 100 described in this embodiment is the same as the transistor described in Embodiment 1. Compared to the above, it differs in that it is a top-gate transistor.

[0133] 5A to 5C are top views and cross-sectional views of the transistor 100. 5B is a top view of the transistor 100, and FIG. 5B is a diagram showing the structure between the dashed line AB in FIG. 5(C) is a cross-sectional view taken along dashed line CD in FIG. In FIG. 5A, for clarity, only some of the components of the transistor 100 (e.g., the substrate 1 01, the base insulating film 103, the gate insulating film 109, the protective film 113, etc. are omitted.

[0134] The transistor 100 shown in FIGS. 5B and 5C is formed over a base insulating film 103. The oxide semiconductor film 105 is connected to a pair of electrodes 107 in contact with the oxide semiconductor film 105, and a base insulating film 106 is formed on the oxide semiconductor film 105. The insulating film 103, the oxide semiconductor film 105, and the gate insulating film 109 in contact with the pair of electrodes 107 and a gate electrode 111 overlapping with the oxide semiconductor film 105 via a gate insulating film 109. In addition, a protective film 113 that covers the gate insulating film 109 and the gate electrode 111 and a gate insulating film 113 that covers the gate insulating film 109 and the gate electrode 111 are formed. A pair of electrodes are formed in the insulating film 109 and the opening 110 of the protective film 113 (see FIG. 5(A)). 107 and a wiring 115 in contact therewith.

[0135] The protective film 113 provided over the transistor 100 in this embodiment has a stoichiometric composition. More preferably, the protective film 11 is an oxide insulating film containing more oxygen than the oxygen that satisfies the above condition. The amount of oxygen contained in the oxide semiconductor film 3 is equal to or greater than the amount of oxygen vacancies contained in the oxide semiconductor film 105. When an oxide insulating film contains more oxygen than the amount of oxygen that fills the insulating film, some of the oxygen is released by heating. Therefore, the oxide insulating film from which part of the oxygen is released by heating is used as the protective film 113. By providing the oxide semiconductor film 105, oxygen is diffused into the oxide semiconductor film 105 by heat treatment, and the oxide semiconductor film As a result, the oxygen vacancies in the oxide semiconductor film 105 can be compensated for. The amount of oxygen vacancies in 105 was reduced, suppressing the negative shift in threshold voltage. In addition, the threshold voltage is also changed by aging and optical gate BT stress testing. This results in a transistor with less fluctuation and excellent electrical characteristics.

[0136] In the transistor 100, oxygen contained in the protective film 113 is The impurity ions move to the oxide semiconductor film 105 through one or more of the gate insulating film 109 and the oxide semiconductor film 105 .

[0137] In addition, in the protective film 113, the signal appearing at g=2.001 in the electron spin resonance measurement The spin density is 1.5×10 18 spins / cm 3 Less than 1.0 x 10 18 s pins / cm 3 It is preferable that the molecular weight is not more than 1000, because the transistor has excellent electrical characteristics. stomach.

[0138] The protective film 113 has a thickness of 30 nm to 500 nm, preferably 100 nm or more. A silicon oxide film, a silicon oxynitride film, or the like having a thickness of 400 nm or less can be used.

[0139] Other configuration details of the transistor 100 are described below.

[0140] As the substrate 101, any of the substrates listed as the substrate 11 in Embodiment 1 can be used as appropriate.

[0141] The base insulating film 103 is formed using an oxide insulating film from which part of oxygen is released by heating. As the oxide insulating film from which part of oxygen is released by heating, it is preferable that the oxide insulating film has a stoichiometric composition. It is preferable to use an oxide insulating film containing more oxygen than oxygen added by heating. The oxide insulating film from which part is detached can diffuse oxygen into the oxide semiconductor film by heat treatment. Representative examples of the base insulating film 103 include silicon oxide, silicon oxynitride, and silicon nitride. Silicon oxide, gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, Examples include aluminum nitride.

[0142] The base insulating film 103 has a thickness of 50 nm or more, preferably 200 nm or more and 3000 nm or less. The thickness of the base insulating film 103 is preferably 300 nm or more and 1000 nm or less. The amount of oxygen released from the base insulating film 103 can be increased. By using this method, it is possible to reduce the interface state at the interface with the oxide semiconductor film formed in the above-mentioned manner.

[0143] Here, "a part of the oxygen is released by heating" means that the TDS (Thermal Desorption Thermal desorption spectroscopy (TDA) analysis revealed that oxygen atoms The converted amount of oxygen released is 1.0 x 10 18 atoms / cm 3 Above 3.0, preferably 3.0 ×10 20 atoms / cm 3 This means that the above is the case.

[0144] In the above structure, the insulating film from which part of the oxygen is released by heating is a silicon oxide film having an excess of oxygen. SiO X (X>2)) or silicon oxide (SiO X (X> 2)) refers to a material that contains more than twice as many oxygen atoms per unit volume as silicon atoms. The number of silicon atoms and oxygen atoms per unit volume was measured by the Rutherford backscattering method. This is the determined value.

[0145] Here, the method for measuring the amount of desorbed oxygen converted into oxygen atoms in TDS analysis is as follows: will be explained.

[0146] The amount of gas desorbed during TDS analysis is proportional to the integral value of the spectrum. The amount of gas desorbed is calculated based on the ratio of the integral value of the film spectrum to the reference value of the standard sample. The reference value of the standard sample is the integral of the spectrum of the sample containing a specific atom. is the ratio of the atomic density to the value.

[0147] For example, the results of a TDS analysis of a silicon wafer containing a specific density of hydrogen as a standard sample, From the results of TDS analysis of the insulating film, the amount of desorbed oxygen molecules (N O2 ) is calculated using formula 1. Here, all of the spectra detected at mass number 32 obtained by TDS analysis are It is assumed that the mass number of the molecule is 32. There is CH3OH, but there is no known The oxygen atom isotope with mass number 17, which is not considered here. The abundance ratio of oxygen molecules, including the atomic and mass number 18 oxygen atoms, in nature is Not taken into consideration as it is a very small amount.

[0148] N O2 =N H2 / S H2 ×S O2 ×α (Formula 1)

[0149] N H2 is the density of hydrogen molecules desorbed from the standard sample. H2 is a standard test The integral value of the spectrum obtained when the sample was subjected to TDS analysis. H2 / S H2 Let us assume that S O2 is the integral value of the spectrum obtained by TDS analysis of the insulating film. α is a coefficient that affects the spectral intensity in the TDS analysis. For details of Equation 1, For details, see Japanese Patent Application Laid-Open No. 6-275697. The amount of oxygen released from the insulating film is A thermal desorption analyzer EMD-WA1000S / W manufactured by Electron Science Corporation was used to measure the standard sample and 1×10 16 atoms / cm2 The measurement is performed using a silicon wafer containing hydrogen atoms. .

[0150] In addition, some of the oxygen is detected as oxygen atoms in the TDS analysis. The ratio of the oxygen molecules can be calculated from the ionization rate of the oxygen molecules. Since the ionization rate of oxygen molecules is included in the calculation, the amount of oxygen atoms released can be obtained by evaluating the amount of oxygen molecules released. It is possible to estimate even if

[0151] In addition, N O2 is the amount of oxygen molecules released. In the case of an insulating film, when converted to oxygen atoms, The amount of oxygen released is twice the amount of oxygen molecules released.

[0152] Oxygen is supplied from the base insulating film 103 to the oxide semiconductor film 105, The interface state between the oxide semiconductor film 3 and the oxide semiconductor film 105 can be reduced. Charges that may be generated due to the above-described problems may be generated between the base insulating film 103 and the oxide semiconductor film 105. This makes it possible to suppress capture at the interface, resulting in a transistor with minimal fluctuation in electrical characteristics. It is possible.

[0153] That is, when oxygen vacancies occur in the oxide semiconductor film 105, the base insulating film 103 and the oxide semiconductor film Charges are trapped at the interface with 105, and these charges affect the electrical characteristics of the transistor. In addition, an insulating film from which oxygen is released by heating is provided as the base insulating film 103. The interface state between the oxide semiconductor film 105 and the base insulating film 103 is reduced, and the oxide semiconductor film 1 The influence of charge trapping at the interface between the insulating film 05 and the base insulating film 103 can be reduced.

[0154] The oxide semiconductor film 105 is formed in a manner similar to that of the oxide semiconductor film 19 described in Embodiment 1. can be done.

[0155] The pair of electrodes 107 can be formed in a manner similar to that of the pair of electrodes 21 shown in the first embodiment. Note that the length of the pair of electrodes 107 in the channel width direction is longer than that of the oxide semiconductor film 10 5 and covers the end portion intersecting with the channel length direction. By increasing the contact area between the oxide semiconductor film 105 and the oxide semiconductor film 105, It is possible to reduce the contact resistance with the electrode 107 and increase the on-current of the transistor. It is possible.

[0156] Note that the pair of electrodes 107 is formed between the oxide semiconductor film 105 and the gate insulating film 109. The pair of electrodes 102 is provided between the base insulating film 103 and the oxide semiconductor film 105. 07 may also be set.

[0157] The gate insulating film 109 can be formed in a manner similar to that of the gate insulating film 17 shown in the first embodiment. Cut.

[0158] The gate electrode 111 can be formed in a manner similar to that of the gate electrode 15 shown in the first embodiment. .

[0159] The wirings 115 can be formed using any of the materials listed for the pair of electrodes 107 as appropriate.

[0160] Next, a manufacturing method of the transistor shown in FIGS. 5A to 5C will be described with reference to FIGS.

[0161] As shown in FIG. 6A, a base insulating film 103 is formed on a substrate 101. Next, An oxide semiconductor film 105 is formed over the film 103 .

[0162] The base insulating film 103 is formed by a sputtering method, a CVD method, or the like.

[0163] As the base insulating film 103, an oxide insulating film from which part of oxygen is released by heating is formed by sputtering. In the case of forming the film by the method, it is preferable that the amount of oxygen in the film forming gas is high. A mixture of rare gases and rare gases can be used. Typically, the oxygen concentration in the deposition gas is 6 It is preferable that the ratio is between 0.1% and 100%.

[0164] In addition, when the oxide insulating film is formed as the base insulating film 103 by the CVD method, water derived from the source gas For this reason, it is recommended to use the CVD method to form an oxide insulating film. After the formation, it is preferable to perform a heat treatment for dehydrogenation or dehydration.

[0165] Furthermore, by introducing oxygen into the oxide insulating film formed by the CVD method, the oxygen is released by heating. The amount of oxygen can be increased. As a method for introducing oxygen into the oxide insulating film, ion implantation is used. Ion doping method, plasma immersion ion implantation method, plasma There are Zuma processing, etc.

[0166] Here, the oxide semiconductor film 105 is formed in a manner similar to that of the oxide semiconductor film 19 described in Embodiment 1. Any suitable method can be used.

[0167] In order to improve the orientation of the crystal parts in the CAAC-OS film, It is preferable to improve the flatness of the surface of the base insulating film 103, which is a base insulating film. , the average surface roughness (Ra) of the base insulating film 103 is set to 1 nm or less, 0.3 nm or less, or 0. It is preferable that the average surface roughness (Ra) is 1 nm or less. , the arithmetic mean defined in JIS B0601:2001 (ISO 4287:1997) This is a three-dimensional extension of roughness so that it can be applied to curved surfaces, and is the distance from the reference surface to the specified surface. The surface roughness is expressed as the average of the absolute deviations in the surface roughness. Chemical Mechanical Polishing (CMP) processing, Dry etching process: Inert gas, such as argon gas, is introduced into a vacuum chamber. Plasma treatment (also known as plasma treatment) is a process in which an electric field is applied to the surface to be treated, with the surface being the cathode, to flatten out minute irregularities on the surface. One or more of the above techniques, such as reverse sputtering, can be applied.

[0168] Next, heat treatment is preferably performed. By diffusing part of the oxygen to the vicinity of the interface between the base insulating film 103 and the oxide semiconductor film 105, As a result, the vicinity of the interface between the base insulating film 103 and the oxide semiconductor film 105 can be The interface state can be reduced.

[0169] The temperature of the heat treatment is typically 150° C. or higher and lower than the substrate distortion point, preferably 250° C. or higher. The temperature is set to 450°C or lower, and more preferably 300°C or higher and 450°C or lower.

[0170] Heat treatment is carried out using rare gases such as helium, neon, argon, xenon, krypton, or nitrogen. The heating is performed in an inert gas atmosphere containing oxygen. Alternatively, the heating is performed in an inert gas atmosphere, followed by heating in an oxygen atmosphere. The inert atmosphere and oxygen atmosphere may be free of hydrogen, water, etc. The treatment time is preferably 3 minutes to 24 hours.

[0171] Note that an oxide semiconductor film which is to become the oxide semiconductor film 105 later is formed over the base insulating film 103. After the heat treatment, a part of the oxide semiconductor film is etched to obtain an oxide semiconductor film 1. By this step, oxygen contained in the base insulating film 103 can be reduced. In order to diffuse more oxygen into the vicinity of the interface between the base insulating film 103 and the oxide semiconductor film 105, can be done.

[0172] Next, as shown in FIG. 6B, a pair of electrodes 107 is formed. The same method for forming the pair of electrodes 21 as in the first embodiment can be used appropriately. The pair of electrodes 107 can be formed by a printing method or an ink-jet method.

[0173] Next, as shown in FIG. 6(C), after forming the gate insulating film 109, A gate electrode 111 is formed thereon.

[0174] The gate insulating film 109 is formed by appropriately using the same method as that for forming the gate insulating film 17 shown in the first embodiment. There can be.

[0175] In addition, oxygen easily moves along the surface on which the CAAC-OS film is formed. In this case, oxygen is easily released from the side surface of the oxide semiconductor film 105 that is isolated from other elements, and oxygen vacancies are formed. However, part of oxygen is released from the oxide semiconductor film 105 by heating. A metal oxide film is provided on the oxide insulating film as a gate insulating film 109. This makes it possible to suppress oxygen desorption from the side surfaces of the oxide semiconductor film 105. As a result, an increase in the electrical conductivity of the side surface of the oxide semiconductor film 105 can be suppressed. Cut.

[0176] The gate electrode 111 can be formed by appropriately using the method for forming the gate electrode 15 shown in the first embodiment. can.

[0177] Here, as an example of a method for forming a gate electrode miniaturized to a width below the resolution limit of an exposure device, A mask used for forming the gate electrode 111 is subjected to slimming processing. It is preferable to obtain a mask having a finer structure. However, ashing using atomic radicals or the like can be applied. The technology allows masks formed by photolithography to be processed into finer structures. As long as the treatment is a process, a method other than the ashing process may be used. The channel length of the transistor is determined by the mask formed by the It is preferable to apply a process with good controllability. A mask formed by a lithography method or the like is placed at a resolution below the resolution limit of the exposure device, preferably 1 / 2 It is possible to reduce the width to 1 / 3 or less, more preferably to 1 / 3 or less. The width of the mask is 20 nm to 2000 nm, preferably 50 nm to 350 nm. It is possible to achieve a thickness of less than m. In addition, the conductive film By etching the gate electrode 1, the width of the gate electrode is miniaturized to a width below the resolution limit of the exposure device. 11 can be formed.

[0178] Next, as shown in FIG. 6(D), a protective film 1 is formed on the gate insulating film 109 and the gate electrode 111. After forming 13, wiring 115 connected to the pair of electrodes 107 is formed.

[0179] The protective film 113 is formed by evacuating the vacuum of the plasma CVD apparatus in the same manner as the protective film 23 shown in the first embodiment. The substrate 101 placed in the evaporative processing chamber is heated to 180° C. or higher and 260° C. or lower, preferably 18 The temperature is kept at 0°C or higher and 250°C or lower, and more preferably at 180°C or higher and 230°C or lower. The pressure in the processing chamber is adjusted to 100 Pa or more and 250 Pa or less by introducing the raw material gas. or 100 Pa to 200 Pa, and 0.17 W / c to the electrode installed in the treatment chamber. m 2 More than 0.5W / cm 2 Less than or equal to 0.25 W / cm 2 More than 0.40W / cm 2 Less than or equal to 0.26 W / cm 2 More than 0.35W / cm 2 The following high frequency power Depending on the supply conditions, a silicon oxide film or a silicon oxynitride film is formed.

[0180] The deposition conditions for the protective film 113 are as follows: high frequency power is supplied at the above pressure and the above power density. By this, it is possible to form an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. This can be done.

[0181] Next, in the same manner as in the first embodiment, a heat treatment is performed to convert the oxygen contained in the protective film 113 into oxygen. The oxygen vacancies in the oxide semiconductor film 105 are filled by diffusing the oxygen into the oxide semiconductor film 105. As a result, the amount of oxygen vacancies in the oxide semiconductor film 105 can be reduced. The heat treatment after the formation of the protective film 113 resulted in a g value of 2.0, as measured by electron spin resonance. The spin density of the signal appearing in 01 is 1.5×10 18 spins / cm 3 Less than, preferably 1.0×10 18 spins / cm 3The temperature of the heat treatment is typically 1 50° C. or higher and lower than the substrate distortion point, preferably 250° C. or higher and 450° C. or lower, more preferably 30 The temperature must be between 0℃ and 450℃.

[0182] The wiring 115 is formed by forming a conductive film by a sputtering method, a CVD method, a vapor deposition method, or the like, and then attaching the conductive film The conductive film is etched by forming a mask on the conductive film. A printing method, an inkjet method, or a photolithography method can be appropriately used. The wiring 115 may be formed by a dual damascene method.

[0183] The above process suppresses the negative shift of the threshold voltage and provides excellent electrical characteristics. It is possible to fabricate transistors. In addition, the change over time and the optical gate BT stress test It is possible to manufacture a highly reliable transistor with little fluctuation in electrical characteristics.

[0184] Note that the configurations and methods described in this embodiment may be the same as those described in other embodiments and examples. and the like.

[0185] (Embodiment 3) In this embodiment, a transistor having a structure different from those in Embodiments 1 and 2 will be described. 7. The transistor 120 described in this embodiment has the same structure as that described in Embodiment 2. The transistor 100 is different from the transistor 100 in that a dopant is added to the oxide semiconductor film. become.

[0186] 7A and 7B are a top view and a cross-sectional view of the transistor 120. 7B is a top view of the transistor 120, and FIG. 7B is a top view of the transistor 120 between the dashed line AB in FIG. 7A is a cross-sectional view of the transistor 120. Note that, for clarity, components of the transistor 120 are shown in FIG. (for example, the substrate 101, the base insulating film 103, and the gate insulating film 109), the protective film 113 etc. are omitted.

[0187] The transistor 120 illustrated in FIG. 7B includes an oxide semiconductor layer formed over the base insulating film 103. The oxide semiconductor film 121, the pair of electrodes 107 in contact with the oxide semiconductor film 121, the base insulating film 103, and the oxide semiconductor film 121 are The gate insulating film 109 is in contact with the compound semiconductor film 121 and the pair of electrodes 107, and the gate insulating film The gate electrode 111 overlaps with the oxide semiconductor film 121 with the film 109 interposed therebetween. The gate insulating film 109 and the gate electrode 111 are covered with a protective film 113. In the opening 110 of the film 109 and the protective film 113 (see FIG. 7(A)), a pair of electrodes 1 07 and wiring 115 in contact with it.

[0188] In the transistor 120 described in this embodiment, a gate electrode A first region 123 overlapping with the gate insulating film 109 and the first region 124 is doped with a dopant. The second region 125 is in contact with the pair of electrodes 107, and the third region 127 is in contact with the pair of electrodes 107. The first region 123 and the third region 127 are not doped with a dopant. A pair of second regions 125 are provided on either side of the first region 123. A third region 127 is provided to sandwich the second region 125 therebetween.

[0189] The first region 123 functions as a channel region in the transistor 120. The area 127 in contact with the pair of electrodes 107 is oxygen-absorbed by the pair of electrodes 107. A part of the oxide diffuses into the pair of electrodes 107, causing oxygen deficiency and converting the oxide into an n-type oxide. A part of 127 functions as a source region and a drain region. The second region is doped with dopant. is added, which has high conductivity and acts as a low resistance region, and the channel region and source region Therefore, the resistance between the drain region and the gate electrode can be reduced. Compared to the transistor 100, the on-state current and the field effect mobility of the transistor 120 are increased. It can be done.

[0190] The dopants added to the second region 125 include boron, nitrogen, phosphorus, and a small amount of arsenic. At least one of the following elements may be present: helium, neon, argon, krypton, and xenon. The dopants include at least one of boron, nitrogen, phosphorus, and arsenic. and one or more of helium, neon, argon, krypton, and xenon, as appropriate. They may also be included in combination.

[0191] The concentration of the dopant in the second region 125 is 5×10 18 atoms / cm 3 More than 1×10 22 atoms / cm 3 Less than or equal to 5×10 18 atoms / cm 3 5×10 or more 19 atoms / cm 3 Less than.

[0192] The second region 125 contains a dopant, which can increase the carrier density or defects. Therefore, compared to the first region 123 and the third region 127 that do not contain dopants, However, if the dopant concentration is increased too much, the dopant The ions impede the movement of carriers, decreasing the conductivity of the second region 125. become.

[0193] The second region 125 has a conductivity of 0.1 S / cm or more and 1000 S / cm or less, preferably 1 It is preferable to set the resistivity to 0 S / cm or more and 1000 S / cm or less.

[0194] Next, a manufacturing method of the transistor 120 in this embodiment will be described with reference to FIGS. He explains.

[0195] As in the first embodiment, a base insulating film is formed on a substrate 101 through the steps shown in FIG. 6(A) to FIG. 6(C). An insulating film 103 is formed, an oxide semiconductor film 121 is formed on the insulating base film 103, and an oxide semiconductor A pair of electrodes 107 is formed on the oxide semiconductor film 121. Next, A gate insulating film 109 is formed on the electrode 107, and an oxide semiconductor The gate electrode 111 is formed so as to overlap a portion of the film 121 .

[0196] Next, the oxide semiconductor film 121 was A dopant is added to the oxide semiconductor film 121. The doping method or the ion implantation method can be used.

[0197] In addition, the dopant is added to the oxide semiconductor film 121. 1 shows a state where the gate insulating film 109 is formed, but the oxide semiconductor film 121 is exposed. Dopants may be added in this state.

[0198] Furthermore, the dopant is added by ion doping or ion implantation. For example, the element to be added may be added in a gas atmosphere containing the element to be added. Plasma is generated in the atmosphere, and the oxide semiconductor film 121 is subjected to a plasma treatment. The dopant can be added by the above-mentioned plasma generating device. A dry etching apparatus, a plasma CVD apparatus, or the like can be used.

[0199] The dopant addition process may be performed while the substrate 101 is heated.

[0200] Here, phosphorus is added to the oxide semiconductor film 121 by an ion implantation method. do.

[0201] After this, a heat treatment is performed. The temperature of the heat treatment is typically 150° C. or higher and 450° C. or higher. The temperature is preferably 250°C or higher and 325°C or lower. Alternatively, the temperature is gradually increased from 250°C to 325°C. Heating may be performed while gradually increasing the temperature.

[0202] The heat treatment can increase the electrical conductivity of the second region 125. In the process, the first region 123, the second region 125, and the third region 127 are polycrystalline. structure, amorphous structure, or CAAC-OS.

[0203] Thereafter, in the same manner as in the first embodiment, a protective film 113 is formed and then heat-treated to form the protective film 113. The oxygen contained in the oxide semiconductor film 121 is diffused into the oxide semiconductor film 121, and oxygen vacancies in the oxide semiconductor film 121 are reduced. After the reduction, wiring 115 is formed, and the transistor 120 shown in FIG. do.

[0204] In the transistor 120 described in this embodiment, the oxide semiconductor film 121 has a channel region A first region 123 serving as a source region and a drain region, and a third region 124 serving as a source region and a drain region. 27, the second region 125, which is a low resistance region, is provided between the first region 125 and the second region 126. In comparison with the transistor 100, the channel region and the source and drain regions are It is possible to reduce the resistance of the semiconductor device and fabricate a transistor with high on-state current. In addition, by providing the protective film 113 over the transistor 120, the threshold voltage can be reduced. It is possible to manufacture a transistor in which the negative shift is suppressed and which has excellent electrical characteristics. In addition, the electrical characteristics are less susceptible to changes over time or optical gate BT stress testing, resulting in high reliability. It is possible to fabricate a transistor with low resistance.

[0205] In the transistor 120, oxygen contained in the protective film 113 is absorbed by the base insulating film 10. The oxide semiconductor film 121 is then transferred through one or more of the gate insulating film 109 and the oxide semiconductor film 121 .

[0206] Note that the configurations and methods described in this embodiment may be the same as those described in other embodiments and examples. and the like.

[0207] (Embodiment 4) In this embodiment, a transistor having a structure different from those in Embodiments 1 to 3 will be described. The transistor 130 described in this embodiment will be described with reference to FIG. The structure of the oxide semiconductor film is different from that of the transistor shown in FIG. An electric field relaxation region is provided between the source region and the drain region.

[0208] 8A and 8B are a top view and a cross-sectional view of the transistor 130. 8(B) is a top view of the transistor 130, and FIG. 8(A) is a top view of the transistor 130 between the dashed line AB in FIG. 8A is a cross-sectional view of the transistor 130. Note that, for clarity, components of the transistor 130 are shown in FIG. (for example, the substrate 101, the base insulating film 103, and the gate insulating film 109), the protective film 113 etc. are omitted.

[0209] The transistor 130 shown in FIG. 8B includes a base insulating film 103 provided over a substrate 101 and The oxide semiconductor film 131 formed over the base insulating film 103 and the oxide semiconductor film 131 The pair of electrodes 139, the base insulating film 103, the oxide semiconductor film 131, and the pair of electrodes 1 39 and the oxide semiconductor film 131 through the gate insulating film 109. The gate insulating film 109 and the gate electrode 111 overlap each other. The gate insulating film 109 and the protective film 113 are provided with an opening 11. 0, a pair of electrodes 139 and wiring 115 in contact therewith may be provided.

[0210] In the transistor 130 described in this embodiment, a gate electrode A first region 133 overlapping with the gate insulating film 109 and the first region 111 is doped with a dopant. A second region 135 is connected to the pair of electrodes 139 and a third region to which a dopant is added. The first region 133 is not doped with a dopant. A pair of second regions 135 are provided to sandwich the first region 133. A third region 137 is provided to sandwich the second region 135 and the first region 133 therebetween.

[0211] The dopants added to the second region 135 and the third region 137 are the same as those in the third embodiment. The same dopant as that for the second region 125 shown in FIG.

[0212] The concentration and conductivity of the dopants contained in the second region 135 and the third region 137 are The dopant concentration in the second region 125 may be the same as that in the second region 125 shown in the third embodiment. In this embodiment, the third region 137 has a higher dopant concentration than the second region 135. The concentration and conductivity of phosphate is high.

[0213] The first region 133 functions as a channel region in the transistor 130. The region 135 functions as an electric field relaxation region. In the region in contact with the pair of electrodes 139, a part of the oxygen may be transferred to the pair of electrodes 139 depending on the material of the pair of electrodes 139. The third region 137 is doped with a dopant, and the third region 137 is doped with an oxygen vacancy. Since the conductivity is high, the third region is The contact resistance between the pair of electrodes 137 and 139 can be further reduced. In comparison with the transistor described in Embodiment 2, the transistor 130 has a lower on-state current and a lower current The field effect can increase the mobility.

[0214] In order to add a dopant to the third region 137, the pair of electrodes 139 are formed to have a thickness of 100 nm. It is preferable to make it thin, typically 10 nm to 100 nm, preferably 20 nm. The length should be between m and 50 nm.

[0215] Next, a manufacturing method of the transistor 130 in this embodiment will be described with reference to FIGS. He explains.

[0216] As in the second embodiment, a base insulating film is formed on the substrate 101 through the steps shown in FIG. 6(A) to FIG. 6(C). An insulating film 103 is formed, an oxide semiconductor film 131 is formed on the insulating base film 103, and an oxide semiconductor A pair of electrodes 139 (see FIG. 8B) is formed on the body film 131. Next, an oxide semiconductor A gate insulating film 109 is formed on the film 131 and the pair of electrodes 139. The gate electrode 111 is formed so as to overlap with part of the oxide semiconductor film 131 through the gate electrode 111 .

[0217] Next, a dopant is added to the oxide semiconductor film 131 by using the gate electrode 111 as a mask. The dopant can be added by the method shown in the second embodiment. In this embodiment, a dopant is added to the third region 137 as well as the second region 135. Furthermore, the third region 137 has a higher dopant concentration than the second region 135. Therefore, the dopant concentration profile is peaked in the third region 137. The conditions of the method are appropriately used. At this time, the third region 137 overlaps with the pair of electrodes 139, The second region 135 does not overlap with the pair of electrodes 139. Since the peak of the dopant concentration profile is the underlying insulating film 103, the second region 1 The concentration of dopant in 35 is less than that in the third region 137 .

[0218] After this, a heat treatment is performed. The temperature of the heat treatment is typically 150° C. or higher and 450° C. or higher. The temperature is preferably 250°C or higher and 325°C or lower. Alternatively, the temperature is gradually increased from 250°C to 325°C. Heating may be performed while gradually increasing the temperature.

[0219] The heat treatment can increase the electrical conductivity of the second region 135 and the third region 137. In the heat treatment, the first region 133, the second region 135, and the third region Region 137 may be a polycrystalline structure, an amorphous structure, or a CAAC-OS.

[0220] Thereafter, in the same manner as in the second embodiment, a protective film 113 is formed and then heat-treated to form the protective film 113. The oxygen contained in the oxide semiconductor film 131 is diffused into the oxide semiconductor film 131 to reduce the amount of oxygen vacancies. 5 to form the transistor 130 shown in FIG.

[0221] In the transistor 130 described in this embodiment, the oxide semiconductor film 131 has a channel region A first region 133 serving as a source region and a drain region, and a third region 134 serving as a drain region. 37, a second region 135 that functions as an electric field relaxation region is provided. As compared with the transistor 100 of the second embodiment, deterioration of the transistor can be suppressed. In addition, since the third region 137 in contact with the pair of electrodes 139 contains a dopant, It is possible to further reduce the contact resistance between the pair of electrodes 139 and the third region 137. In addition, a transistor having a high on-state current can be manufactured. By providing the protective film 113, the negative shift of the threshold voltage is suppressed, resulting in excellent electrical characteristics. It is also possible to fabricate a transistor having such a characteristic. It is possible to manufacture highly reliable transistors with minimal fluctuation in electrical characteristics during testing. .

[0222] In the transistor 130, oxygen contained in the protective film 113 is absorbed by the base insulating film 10. The oxide semiconductor film 131 is then transferred through one or more of the gate insulating film 109 and the oxide semiconductor film 131 .

[0223] Note that the configurations and methods described in this embodiment may be the same as those described in other embodiments and examples. and the like.

[0224] (Embodiment 5) In this embodiment, a structure of a transistor applicable to any of Embodiments 2 to 4 will be described. This will be explained with reference to FIG.

[0225] In the transistor described in this embodiment, a sidewall insulating film is provided in contact with a side surface of a gate electrode 111. Here, the transistor described in Embodiment 2 is used for explanation. Reveal.

[0226] The transistor 140 illustrated in FIG. 9A includes an oxide semiconductor layer formed over the base insulating film 103. The oxide semiconductor film 105, a pair of electrodes 107 in contact with the oxide semiconductor film 105, a base insulating film 103, and an oxide The gate insulating film 109 is in contact with the compound semiconductor film 105 and the pair of electrodes 107, and the gate insulating film The gate electrode 111 overlaps with the oxide semiconductor film 105 with the oxide semiconductor film 109 interposed therebetween. The gate insulating film 10 has a sidewall insulating film 141 in contact with the side surface of the gate electrode 111. 9, a gate electrode 111, and a protective film 113 that covers the sidewall insulating film 141. In addition, the pair of electrodes 107 are in contact with the openings of the gate insulating film 109 and the protective film 113. The wiring 115 may also be provided.

[0227] The ends of the sidewall insulating film 141 overlap the pair of electrodes 107. The gate electrode 111 is disposed so as to fill the space between the pair of electrodes 107 and the gate electrode 111. This can reduce the unevenness between the electrodes 111. This increases the coverage of the protective film 113. It is possible.

[0228] The transistor 150 shown in FIG. 9B has a gate electrode 1 The shape of the sidewall insulating film 151 in contact with the side surface of the semiconductor substrate 11 is different. The end of the wall insulating film 151 does not overlap the pair of electrodes 107, and is in contact with the gate electrode 111 and the pair of electrodes 107. The electrode 107 is located between the electrodes 107.

[0229] The transistor 160 shown in FIG. 9C has a different structure from the transistor 150 shown in FIG. 10. The difference is that a dopant is added to the oxide semiconductor film 161.

[0230] The oxide semiconductor film 161 overlaps with the gate electrode 111 via the gate insulating film 109. The first region 163 is doped with a dopant and overlaps the sidewall insulating film 151. A second region 165, a third region 167 to which a dopant is added, and a pair of electrodes 107 The first region 163 and the fourth region 169 are in contact with each other. The first region 163 is sandwiched between the second regions 162 and 163 . 65 is provided. Also, a pair of first and second regions 163 and 165 are provided between the first and second regions 163 and 165. A third region 167 is provided. A fourth region 169 is provided to sandwich the first region 162 .

[0231] The first region 163 functions as a channel region in the transistor 160 .

[0232] The second region 165 and the third region 167 are doped with a dopant and have high electrical conductivity. It functions as a low resistance region, reducing the resistance between the channel region and the source and drain regions. Also, the second region 165 has a lower dopant concentration than the third region 167. Since the thickness and conductivity of the thin film transistor 160 are low, the thin film transistor 160 functions as a field relaxation region. The deterioration of the material can be reduced.

[0233] The dopants added to the second region 165 and the third region 167 are the same as those in the third embodiment. The same dopants as those in the second region 125 shown in FIG.

[0234] The concentration of the dopants contained in the second region 165 and the third region 167 and the electrical conductivity can have the same dopant concentration as that of the second region 125 shown in the third embodiment. In this embodiment, the third region 167 has a higher dopant concentration than the second region 165. The concentration of cations and conductivity are high.

[0235] The fourth region 169 is in contact with the pair of electrodes 107. In this case, a part of the oxygen diffuses into the pair of electrodes 107, causing oxygen vacancies and converting the semiconductor into an n-type semiconductor. A part of the region 169 of No. 4 functions as a source region and a drain region.

[0236] In the transistor 160 described in this embodiment, a first region in an oxide semiconductor film 161 The second region 165 and the third region 167 are low resistance regions, and the second region 165 and the third region 167 are disposed on either side of the first region 163. This reduces the resistance between the channel region and the source and drain regions. Therefore, a transistor with increased on-state current can be manufactured.

[0237] In addition, by providing a protective film 113 on the transistors 140, 150, and 160, the threshold To fabricate a transistor having excellent electrical characteristics by suppressing negative voltage shift In addition, the electrical characteristics are less susceptible to changes over time and to optical gate BT stress testing. A highly reliable transistor can be manufactured.

[0238] In the transistors 140, 150, and 160, the oxygen contained in the protective film 113 is , and moves to the oxide semiconductor film via one or more of the base insulating film 103 and the gate insulating film 109. .

[0239] Note that the configurations and methods described in this embodiment may be the same as those described in other embodiments and examples. and the like.

[0240] (Embodiment 6) In this embodiment, a transistor having a structure different from those in Embodiments 2 to 5 will be described. The transistor described in this embodiment is the same as that described in Embodiments 2 to 10. In comparison with form 5, a pair of electrodes and a gate electrode are overlapped with a gate insulating film interposed therebetween. is different.

[0241] The transistor 170 illustrated in FIG. 10 includes an oxide semiconductor film 1 formed over a base insulating film 103. 05, a pair of electrodes 107 in contact with the oxide semiconductor film 105, a base insulating film 103, an oxide The semiconductor film 105 and the gate insulating film 109 in contact with the pair of electrodes 107, and the gate insulating film 1 The gate electrode 171 overlaps with the oxide semiconductor film 105 with the gate electrode 172 interposed therebetween. The insulating film 109 and the gate electrode 171 are covered with a protective film 113. 09 and a wiring 115 that contacts the pair of electrodes 107 at the opening of the protective film 113. This is also fine.

[0242] In the transistor 170 described in this embodiment, a pair of electrodes 107 and a gate electrode 171 are The gate insulating film 109 is interposed between the oxide semiconductor film 105 and the gate insulating film 109. The region facing the gate electrode 171 via the gate insulating film 109 functions as a channel region. The regions in contact with the pair of electrodes 107 function as a source region and a drain region. The channel region is in contact with the source region and the drain region. Since there is no resistive region between the drain region and the drain region, In comparison with the transistor shown in FIG. 5, the on-state current and the field-effect mobility are high.

[0243] In addition, by providing the protective film 113 on the transistor 170, the threshold voltage can be reduced. It is possible to manufacture a transistor having excellent electrical characteristics in which the fluctuation in the capacitance is suppressed. Highly reliable transistor with little change in electrical characteristics due to aging or optical gate BT stress testing. It is possible to fabricate a transistor.

[0244] In the transistor 170, oxygen contained in the protective film 113 is 3. The electrons move to the oxide semiconductor film 105 via one or more of the gate insulating films 109.

[0245] Note that the configurations and methods described in this embodiment may be the same as those described in other embodiments and examples. and the like.

[0246] (Embodiment 7) In this embodiment, a transistor having a structure different from those in Embodiments 1 to 6 will be described. This will be explained using FIG.

[0247] The transistor 210 shown in FIG. 11A is an oxide semiconductor formed over the base insulating film 103. The oxide semiconductor film 211 and the gate insulating film 109 in contact with the base insulating film 103 and the oxide semiconductor film 211 and a gate electrode 111 overlapping with the oxide semiconductor film 211 via a gate insulating film 109. In addition, a protective film 217 that covers the gate insulating film 109 and the gate electrode 111 and a gate insulating film 214 that covers the gate insulating film 109 and the gate electrode 111 are formed. The wiring 21 in contact with the oxide semiconductor film 211 in the opening of the insulating film 109 and the protective film 217 Has 9.

[0248] In the transistor 210 described in this embodiment, the oxide semiconductor film 211 is A first region 213 overlapping the gate insulating film 109 and a second region 214 to which a dopant is added. The first region 213 has a first region 215. Note that no dopant is added to the first region 213. In addition, a pair of second regions 215 are provided to sandwich the first region 213.

[0249] The first region 213 functions as a channel region in the transistor 210. Regions 215 function as source and drain regions.

[0250] The dopant added to the second region 215 is the same as that of the second region 12 shown in the third embodiment. The same dopants as in 5 can be used appropriately.

[0251] The concentration and conductivity of the dopant contained in the second region 215 are the same as those in the third embodiment. It may have a similar concentration of dopants as the second region 125 .

[0252] The transistor 220 shown in FIG. 11B is an oxide semiconductor provided over the base insulating film 103. The oxide semiconductor film 211 and the oxide semiconductor film 212 function as a source electrode and a drain electrode. a pair of electrodes 225 in contact with the oxide semiconductor film 211 and a gate insulating film in contact with at least a part of the oxide semiconductor film 211; 223, a gate insulating film 223 that is over the gate insulating film 223 and overlaps with the oxide semiconductor film 211, and an electrode 111.

[0253] Also, a sidewall insulating film 221 is provided in contact with the side surface of the gate electrode 111. A ground insulating film 103, a gate electrode 111, a sidewall insulating film 221, and a pair of electrodes 22 5. In addition, the oxide semiconductor film 2 is provided on the insulating film 217 through an opening in the insulating film 217. 11. It has wiring 219 that contacts with the substrate 11.

[0254] In the transistor illustrated in FIG. 11B, the oxide semiconductor film 211 is A first region 213 overlapping the gate insulating film 223 and a second region 214 to which a dopant is added. The first region 213 has a first region 215. Note that no dopant is added to the first region 213. A pair of second regions 215 are provided to sandwich the first region 213.

[0255] The ends of a pair of electrodes 225 of the transistor are located on the sidewall insulating film 221. In the oxide semiconductor film 211, the pair of electrodes 225 is a pair of second The exposed portion of the region 215 is entirely covered. The distance between the electrodes 225 and the oxide semiconductor film 211 (more precisely, the distance between the electrodes 225 and the oxide semiconductor film 211) The distance between the sidewall insulating film 221 and the insulating layer 222 can be controlled by adjusting the width of the sidewall insulating film 221. In a fine device in which it is difficult to form a pattern by using a metal oxide film, The channel side ends of the pair of electrodes 225 can be formed without using a mask. In addition, since no mask is used, processing variations among multiple transistors can be reduced. This can be done.

[0256] The protective film 217 provided over the transistors 210 and 220 in this embodiment is Similar to the protective film 23 shown in the first embodiment, the protective film 23 contains more oxygen than the oxygen required for the stoichiometric composition. More preferably, the protective film 217 is a film formed of a material selected from the group consisting of an oxide insulating film and a metal oxide semiconductor film. The oxygen content is more than the amount of oxygen that satisfies the stoichiometric composition. The oxide insulating film is an oxide insulating film in which part of the oxygen is released by heating. By providing an oxide insulating film from which part of the oxygen is released as a protective film, Oxygen can be diffused into the conductive film to compensate for oxygen vacancies in the oxide semiconductor film 211. As a result, the amount of oxygen vacancies in the oxide semiconductor film 211 is reduced, and the threshold This transistor suppresses the negative voltage shift. Through stress testing, we have produced transistors with minimal threshold voltage fluctuation and excellent electrical characteristics. It becomes ta.

[0257] In addition, in the protective film 217, the signal appearing at g=2.001 by electron spin resonance measurement The spin density is 1.5×10 18 spins / cm 3 Less than 1.0 x 10 18 s pins / cm 3 It is preferable that the molecular weight is not more than 1000, because the transistor has excellent electrical characteristics. stomach.

[0258] In the transistor 220, oxygen contained in the protective film 217 is absorbed by the base insulating film 10. 3. An oxide semiconductor is formed through one or more of a gate insulating film 223 and a sidewall insulating film 221. Move to the conductive film 211.

[0259] Note that the configurations and methods described in this embodiment may be the same as those described in other embodiments and examples. and the like.

[0260] (Embodiment 8) In this embodiment, a transistor having a structure different from those in Embodiments 1 to 7 will be described. The transistor described in this embodiment has a structure in which a The present embodiment is characterized in that it has a plurality of gate electrodes facing each other. Although the transistor shown in the sixth embodiment will be described, it may be combined with other embodiments as appropriate. This can be done.

[0261] The transistor 230 shown in FIG. 12 includes a gate electrode 231 provided on a substrate 101 and a gate The gate electrode 231 is covered with an insulating film 233. a semiconductor film 105, a pair of electrodes 107 in contact with the oxide semiconductor film 105, an insulating film 233, The oxide semiconductor film 105 and the gate insulating film 109 in contact with the pair of electrodes 107 are The gate electrode 171 overlaps with the oxide semiconductor film 105 with the insulating film 109 interposed therebetween. The gate insulating film 109 and the gate electrode 171 are covered with a protective film 113. In the openings of the insulating film 109 and the protective film 113, wiring 115 contacting the pair of electrodes 107 and may have the following structure:

[0262] The gate electrode 231 can be formed in the same manner as the gate electrode 15 shown in the first embodiment. The gate electrode 231 is formed on the side in order to improve the coverage of the insulating film 233 to be formed later. It is preferable that the surface is tapered, and the angle between the substrate 101 and the side surface of the gate electrode 231 is is 20 degrees or more and 70 degrees or less, preferably 30 degrees or more and 60 degrees or less.

[0263] The insulating film 233 can be formed in a manner similar to that of the base insulating film 103 described in Embodiment 2. Note that the surface of the insulating film 233 is covered with the insulating film 233 in order to form the oxide semiconductor film 105 over the insulating film 233 later. For this reason, the insulating film that will later become the insulating film 233 is formed on the substrate 101. After being formed on the gate electrode 231, the insulating film is planarized to reduce surface irregularities. A thin insulating film 233 is formed.

[0264] The transistor 230 described in this embodiment has a gate electrode facing the gate insulating film 105 therebetween. The gate electrode 231 and the gate electrode 171 have different The threshold voltage of the transistor 230 is controlled by applying a potential of The threshold voltage can be shifted in the positive direction.

[0265] A protective film 113 is provided over the transistor 230 described in this embodiment. As in the protective film 23 shown in the first embodiment, the oxygen content is more than the oxygen content that satisfies the stoichiometric composition. More preferably, the protective film 113 is an oxide insulating film containing an oxide semiconductor film 105. As a result, the amount of oxygen contained in the oxide semiconductor film 105 is greater than or equal to the amount of oxygen vacancies contained in the oxide semiconductor film 105. The amount of elemental defects is reduced, resulting in a transistor in which the negative shift of the threshold voltage is suppressed. In addition, the threshold voltage has little variation due to aging and optical gate BT stress testing, resulting in excellent The resulting transistor has the same electrical characteristics.

[0266] (Embodiment 9) In this embodiment, in the transistors described in Embodiments 1 to 8, A method for manufacturing a transistor in which the hydrogen concentration in a semiconductor film is reduced will be described. Here, the first and second embodiments will be described as representative examples, but other embodiments may be used as appropriate. It should be noted that one or more of the steps shown in this embodiment can be combined with the steps shown in the embodiment. The steps for manufacturing a transistor shown in any one of the embodiments 1 and 2 may be combined. There is no need to mix them.

[0267] The oxide semiconductor film 19 described in Embodiment 1 and the oxide semiconductor film 105 described in Embodiment 2 In this case, the hydrogen concentration is 5×10 19 atoms / cm 3 Less than 5 x 10 18 at oms / cm 3 less than 1×10 18 atoms / cm 3 The following is more preferred: 5×10 17 atoms / cm 3 Less than 1×10, more preferably 16 atoms / cm 3 It is preferable that:

[0268] Hydrogen contained in the oxide semiconductor films 19 and 105 reacts with oxygen that is bonded to metal atoms to form water. At the same time, defects are formed in the lattice from which oxygen has been removed (or in the part from which oxygen has been removed). In addition, when hydrogen combines with oxygen, electrons that act as carriers are generated. Therefore, it is necessary to reduce impurities including hydrogen in the process of forming the oxide semiconductor film. Therefore, the hydrogen concentration in the oxide semiconductor film can be reduced. By removing only the oxide semiconductor film and using the purified oxide semiconductor film as a channel region, It is possible to reduce the negative shift of the voltage and to apply a The leakage current in the MOSFET is typically set to a value of several yA / μm to several zA per channel width. / μm, which improves the electrical characteristics of the transistor. Cut.

[0269] As a first method for reducing the hydrogen concentration in the oxide semiconductor film 19, Before the formation of the gate electrodes, the substrate 11, the insulating film 13, and the gate electrodes are heated or plasma-treated. There is a method for removing hydrogen or water contained in the electrode 15 and the gate insulating film 17. As a result, in the subsequent heat treatment, water attached to or contained in the substrate 11 and the gate insulating film 17 is This can prevent oxygen or water from diffusing into the oxide semiconductor film 19. The treatment is carried out in an inert atmosphere, reduced pressure atmosphere, or dry air atmosphere at 100°C or higher. The plasma treatment is carried out at a temperature below the 1000 nm point. Nitrogen oxide, nitrous oxide, nitrogen dioxide, etc.) are used. In the above, before the oxide semiconductor film 105 is formed, heat treatment or plasma treatment is performed. Hydrogen or water contained in the substrate 101 and the base insulating film 103 are released.

[0270] As a second method for reducing the hydrogen concentration in the oxide semiconductor films 19 and 105, Before forming a film using a sputtering device, a dummy substrate is carried into the sputtering device. - An oxide semiconductor film is formed on a substrate, and hydrogen attached to the target surface or the adhesion prevention plate, As a result, the intrusion of hydrogen, water, or the like into the oxide semiconductor film is reduced. It is possible to reduce

[0271] As a third method for reducing the hydrogen concentration in the oxide semiconductor films 19 and 105, When forming the insulating film, for example, by using a sputtering method, the substrate temperature is set to 150° C. or higher and 75° C. or lower. 0°C or less, preferably 150°C to 450°C, more preferably 200°C to 350°C There is a method for forming an oxide semiconductor film by setting the temperature at or below 50° C. It is possible to reduce the intrusion of hydrogen, water, etc. into the fuel cell.

[0272] Here, the hydrogen concentration in the oxide semiconductor films 19 and 105 can be reduced by using a spa The tering device will be described in detail below.

[0273] The leakage rate of the treatment chamber for forming the oxide semiconductor film is set to 1×10 -10 Pa·m 3 / second or less It is preferable to set the above-mentioned condition so that when the film is formed by the sputtering method, hydrogen or the like is not included in the film. It is also possible to reduce the inclusion of water, etc.

[0274] In addition, a roughing pump such as a dry pump is used to exhaust the processing chamber of the sputtering device, and It is combined with high vacuum pumps such as sputter ion pumps, turbo molecular pumps, and cryopumps. Turbo molecular pumps are excellent at pumping large molecules, but they are not good at pumping water. The pumping capacity of hydrogen and water is low. Furthermore, the sputter ion pump or Combining it with a cryopump with high water pumping capacity is effective.

[0275] Adsorbates present inside the treatment chamber are adsorbed to the inner wall and do not affect the pressure in the treatment chamber. However, this causes gas emission when the processing chamber is evacuated. Therefore, the leak rate and the exhaust speed are Although there is no correlation, a pump with high exhaust capacity is used to remove as much of the adsorbed matter as possible from the treatment chamber. It is important to evacuate the treatment chamber beforehand. Baking is also possible. Baking increases the desorption rate of adsorbed substances by about 10 times. Baking can be performed at temperatures between 100°C and 450°C. By removing adsorbed substances while introducing gas, water and other substances that are difficult to remove by exhausting alone can be removed. The speed can be further increased.

[0276] In this manner, in the process of forming the oxide semiconductor film, the pressure in the process chamber and the leak rate in the process chamber are In the above, by suppressing the inclusion of impurities as much as possible, hydrogen contained in the oxide semiconductor film can be prevented. Alternatively, contamination by water or the like can be reduced.

[0277] As a fourth method for reducing the hydrogen concentration in the oxide semiconductor films 19 and 105, A method of using a high-purity gas from which impurities including fluorine have been removed is known. It is possible to reduce the inclusion of hydrogen, water, etc. in the fuel cell.

[0278] As a fifth method for reducing the hydrogen concentration in the oxide semiconductor films 19 and 105, After the oxide semiconductor film is formed, heat treatment is performed. The hydrated or dehydrated form can be used.

[0279] The temperature of the heat treatment is typically 150° C. or higher and lower than the substrate distortion point, preferably 250° C. or higher. The temperature is set to 450°C or lower, and more preferably 300°C or higher and 450°C or lower.

[0280] Heat treatment is carried out using rare gases such as helium, neon, argon, xenon, krypton, or nitrogen. The heating is performed in an inert gas atmosphere containing oxygen. Alternatively, the heating is performed in an inert gas atmosphere, followed by heating in an oxygen atmosphere. The inert atmosphere and oxygen atmosphere may be free of hydrogen, water, etc. The treatment time is preferably 3 minutes to 24 hours.

[0281] As shown in FIG. 2B and FIG. 6A, the oxide semiconductor films 19 and 10 After the formation of 5, the above-mentioned heat treatment for dehydrogenation or dehydration may be carried out. By undergoing such a process, the gate insulating film 1 7 or the base insulating film 103 can efficiently release hydrogen, water, etc. .

[0282] The heat treatment for dehydration or dehydrogenation may be carried out multiple times, and may be carried out in combination with other heat treatments. It is also possible to combine these two roles.

[0283] One or more of the first to fifth methods for reducing the hydrogen concentration in the oxide semiconductor film are carried out. By combining the above with any of the methods for manufacturing a transistor described in any of Embodiments 1 to 8, The transistor has a channel region made of a highly purified oxide semiconductor film from which water or other impurities have been removed as much as possible. As a result, the negative shift of the threshold voltage can be reduced. The leakage current at the source and drain of the transistor can be typically It is possible to reduce the off-current per channel width to several yA / μm to several zA / μm. Therefore, the electrical characteristics of the transistor can be improved. This morphology reduces the negative shift of the threshold voltage, reduces leakage current, and improves electrical characteristics. It is possible to fabricate a transistor that

[0284] (Embodiment 10) In this embodiment, a transistor using a first semiconductor material is provided in the lower portion, and a transistor using a second semiconductor material is provided in the upper portion. A semiconductor device having a transistor using a first semiconductor material. A structure in which a semiconductor substrate is used for a transistor will be described with reference to FIG.

[0285] FIG. 13 shows a transistor having a first semiconductor material in the lower part and a transistor having a second semiconductor material in the upper part. 1 is a cross-sectional view of an example of a semiconductor device having a transistor using a first material. The first semiconductor material and the second semiconductor material are different materials. For example, The second semiconductor material may be an oxide semiconductor, and the third semiconductor material may be an oxide semiconductor. Examples of materials other than oxide semiconductors include silicon, germanium, and silicon gel. The material may be a single crystal semiconductor or a semiconductor material such as gallium arsenide, silicon carbide, or gallium arsenide. It is preferable that a polycrystalline semiconductor be used for the transistor. On the other hand, a transistor using an oxide semiconductor has a low on-resistance per channel width. It can be used in circuits that utilize the characteristics of the device, where the current is sufficiently low, at around several yA / μm to several zA / μm. For these reasons, the semiconductor device shown in FIG. 13 can be used to realize, for example, a low power consumption logic It is also possible to configure a circuit. Note that an organic semiconductor material is used as the first semiconductor material. It's fine.

[0286] The transistor 704a, the transistor 704b, and the transistor 704c each have a N-channel transistor (NMOSFET) or p-channel transistor (PMOS In this embodiment, the transistor 704a and the transistor 70 A p-channel transistor is shown as 4b, and an n-channel transistor is shown as 704c. In the example shown in FIG. 13, transistor 704a and transistor The Zister 704b is a STI (Shallow Trench Isolation) 70 On the other hand, the transistor 704c is insulated from the other elements by the STI 70 2, which insulates the transistors 704a and 704b. This suppresses bird's beaks in the element isolation area that occur with the LOCOS element isolation method. This allows the size of the element isolation region to be reduced, and the transistor structure can be finely divided. In a semiconductor device that does not require thinning, the formation of STI 702 is not necessarily required. It is also possible to use an element isolation means such as LOCOS.

[0287] Transistor 704a, transistor 704b, and transistor 704c in FIG. are provided on both sides of a channel region provided in the substrate 701. An impurity region 705 (also called a source region and a drain region) is formed on the channel region. A gate insulating film 706 is provided, and a gate insulating film 707 is formed on the gate insulating film 706 so as to overlap with the channel region. The gate electrodes 707 and 708 are provided on the substrate 701. The gate electrode 707 is made of the first material and the second material is used as a wiring for the purpose of reducing resistance. However, the present invention is not limited to this structure and may be appropriately applied. The material, number of layers, shape, etc. can be adjusted according to the required specifications. In some cases, the source electrode and the drain electrode are not explicitly shown, but for convenience, such a The term transistor may refer to both states.

[0288] A contact plug 714a is connected to the impurity region 705 provided in the substrate 701. Here, the contact plug 714a is connected to the source potential of the transistor 704a, etc. The impurity region 705 also functions as a gate electrode and a drain electrode. An impurity region different from the impurity region 705 is provided. Depending on the concentration of impurities, the electric field near the channel region is generated as an LDD region or an extension region. The gate electrodes 707 and 708 have side walls provided with an insulating film 709. The insulating film 709 and the sidewall insulating film 710 are By using this, it is possible to form an LDD region or an extension region.

[0289] In addition, the transistors 704a, 704b, and 704c are insulating The insulating film 711 can function as a protective film. This can prevent impurities from entering the channel region from the outside. By using a material such as silicon nitride by CVD for 11, single crystal silicon is formed in the channel region. When using hydrogen, the single crystal silicon can be hydrogenated by heat treatment. In addition, by using an insulating film having a tensile stress or a compressive stress for the insulating film 711, In the case of an n-channel transistor, the semiconductor material that constitutes the region can be strained. In the case of a p-channel transistor, tensile stress is applied to the silicon material that will be the channel region. In this case, compressive stress is applied to the silicon material that will be the channel region, The mobility can be improved.

[0290] Here, the transistor 750 in FIG. 13 is the transistor 17 shown in Embodiment 6. 0. Furthermore, the base insulating film of the transistor 750 is an insulating film 725a , an insulating film 725b, and an oxide film of the transistor 750 The insulating film 725a has a gate electrode 751 facing the semiconductor film. It is preferable that the insulating film is formed of an insulating film having a blocking effect against the acid from the oxide semiconductor film. This can prevent elements from diffusing to the outside and prevent hydrogen and water from entering the oxide semiconductor film from the outside. A representative insulating film having a blocking effect against oxygen, hydrogen, water, etc. is aluminum oxide. The insulating film 725b is formed using the base insulating film 103 described in Embodiment 2 as appropriate. It is possible.

[0291] Note that the transistor 170 described in Embodiment 6 is used as the transistor 750. However, the transistors described in any of Embodiments 1 to 9 can be used as appropriate. can.

[0292] The transistor 750 using the second semiconductor material may be formed by a lower layer transistor depending on the required circuit configuration. The first semiconductor material is electrically connected to a transistor such as transistor 704a. In the example shown in FIG. 1, the source or drain of transistor 750 is connected to transistor 70 4a and the source or drain of the transistor 4b.

[0293] One of the source and drain of the transistor 750 using the second semiconductor material is a transistor. The insulating film 726, the insulating film 727, the insulating film 728, and the insulating film 729 of the transistor 750 are A wiring formed above the transistor 750 is connected to the contact plug 730b. The gate insulating film 726 and the insulating film 727 are connected to the line 734a. The structure and materials shown in the embodiment 9 can be used as appropriate.

[0294] The wiring 734a is buried in the insulating film 731. The wiring 734a is made of, for example, copper or aluminum. It is preferable to use a low resistance conductive material such as aluminum. This makes it possible to reduce the RC delay of a signal propagating through the wiring 734a. When copper is used for the semiconductor, a barrier film 733 is formed to prevent the copper from diffusing into the channel region. As the barrier film, for example, tantalum nitride, a laminate of tantalum nitride and tantalum, nitride Although a film made of titanium or a laminate of titanium nitride and titanium can be used, the expansion of the wiring material These materials are used to the extent that their anti-scattering function and adhesion to wiring materials and undercoating films are ensured. The barrier film 733 may be formed as a layer separate from the wiring 734a. A material that will become a barrier film is often included in the wiring material and set in the insulating film 731 by heat treatment. It may be formed by deposition on the inner wall of the opening.

[0295] The insulating film 731 may be made of silicon oxide, silicon oxynitride, silicon nitride oxide, or BPSG (B orophosphosilicate glass), PSG (Phosphorus Silicate Glass), silicon oxide with added carbon (SiOC), fluorine Silicon oxide with added silicon (SiOF), silicon oxide made from Si(OC2H5)4 TEOS (Tetraethyl orthosilicate), HSQ (Hy drogen Silsesquioxane), MSQ(Methyl Silses) quioxane), OSG (Organo Silicate Glass), Organic Poly Insulators such as polymer-based materials can be used, especially when miniaturizing semiconductor devices. In order to prevent the parasitic capacitance between wiring from increasing and signal delays from increasing, the dielectric constant of silicon oxide ( It is preferable to use a material with a high k of 3.0 or less when k is 4.0 to 4.5. Since CMP processing is performed after the wiring is embedded in the insulating film, the insulating film must have sufficient mechanical strength. As long as this mechanical strength can be secured, these can be made porous to reduce The insulating film 731 can be formed by sputtering, CVD, spin coating, or the like. The insulating film is formed by a coating method including a spin on glass (also called SOG) method.

[0296] An insulating film 732 may be provided over the insulating film 731. The insulating film 732 is a After embedding it in 731, it is used as an etching stopper when performing planarization processing by CMP, etc. It works like this.

[0297] A barrier film 735 is provided on the wiring 734a, and a protective film 74 is provided on the barrier film 735. The barrier film 735 is intended to prevent the diffusion of wiring materials such as copper. The barrier film 735 is not limited to the upper surface of the wiring 734a, but also covers the insulating films 731 and 73 2. The barrier film 735 may be formed on an insulating film such as silicon nitride, SiC, or SiBON. The material may be made of a material having excellent mechanical properties.

[0298] The wiring 734a is provided below the barrier film 724 via a contact plug 730a. The contact plug 730a is connected to the wiring 723. Different from the above, the barrier film 724, the insulating film 725a, the insulating film 725b, the gate insulating film 726, and the insulating It is electrically connected to the wiring 723 by penetrating the film 727 , the insulating film 728 , and the insulating film 729 . Therefore, the contact plug 730a is taller than the contact plug 730b. When the contact plug 730a and the contact plug 730b have the same diameter, The aspect ratio of the tact plug 730a is larger than that of the contact plug 730a. The contact plug 730b may have a different diameter. Although 730a is depicted as being a continuous film made of one material, for example, the barrier film 724 A contact plug penetrating the insulating film 725a and the insulating film 725b and a gate insulating film 7 26, an insulating film 727, an insulating film 728, and a contact plug penetrating 729. Alternatively, the first and second electrodes may be formed separately.

[0299] The wiring 723 is formed by the barrier films 722 and 724 in the same manner as the wirings 734a and 734b described above. The wiring 7 is covered with the insulating film 720 and embedded in the insulating film 720. 23 is composed of an upper wiring part and a lower via hole part. Lower via hole part The wiring 723 of this structure is connected to the wiring 718 in the lower layer by the so-called dual damascene method or the like. In addition, the connection between the upper and lower wiring layers can be formed without using the dual damascene method. The insulating film 720 may be planarized by CMP or the like. An insulating film 721 that functions as an etching stopper in chemical treatment may be provided.

[0300] The wiring 718 to which the wiring 723 is electrically connected is also The first semiconductor material, such as silicon, can be formed in the same structure as the wiring layer of the first layer. The transistor 704a used in the channel region has an insulating film 711, an insulating film 712, and an insulating film 7 13. The contact plug 714a penetrates the semiconductor device 13 and is connected to the wiring 718. The gate electrode of the transistor 704c having the channel region made of the first semiconductor material is made of an insulating film. A wiring is formed via a contact plug 714b penetrating the insulating film 711, the insulating film 712, and the insulating film 713. The wiring 718 is connected to the barrier film 7 The insulating film 715 is embedded in the insulating film 717. On the top of 15, there is provided an insulating layer which functions as an etching stopper when performing planarization processing by CMP or the like. A border membrane 716 may be provided.

[0301] As described above, the transistor 7 using the first semiconductor material provided in the lower part of the semiconductor device 04a is a second semiconductor device provided on the upper side through a plurality of contact plugs and a plurality of wirings. The semiconductor device is electrically connected to a transistor 750 using a conductive material. By forming the transistor using the first semiconductor material having high speed operation performance, By combining this with a transistor made of a second semiconductor material with an extremely low current, low power consumption is achieved. It is possible to manufacture a semiconductor device having a logic circuit which can be easily implemented and operates at high speed.

[0302] Such a semiconductor device is not limited to the above-mentioned configuration, and may be any of the following configurations without departing from the spirit of the invention: Any modification is possible. For example, in the description, a transistor using a first semiconductor material is used. The wiring layer between the first and second semiconductor transistors was described as having two layers. It can be one layer or three or more layers, and can be made without wiring, contact plate. It is also possible to connect both transistors directly using only a lug. In this case, for example, Through Silicon Via (TSV) technology can also be used. Also, the case where wiring is formed by embedding a material such as copper in an insulating film will be explained. However, for example, a three-layer structure of a barrier film, a wiring material layer, and a barrier film is formed by photolithography. It is also possible to use a material that has been processed into a wiring pattern by a process.

[0303] In particular, the copper wiring is connected to the transistors 704a and 704b using a first semiconductor material and the transistors 704a and 704b using a second semiconductor material. When the second semiconductor material is used to form a layer between the transistor 750 and the second semiconductor material, In the manufacturing process of the transistor 750 using the above-mentioned method, the influence of the heat treatment added must be taken into consideration. In other words, in the manufacturing process of the transistor 750 using the second semiconductor material, It is necessary to take care that the temperature of the heat treatment applied is suitable for the properties of the wiring material. For example, When the components of the transistor 750 are subjected to a heat treatment at high temperatures, thermal stress occurs in the copper wiring. This is because problems such as stress migration occur due to the generation of such problems.

[0304] (Embodiment 11) As an example of the semiconductor device described in the above embodiment, sensors, microcomputers, storage devices, image sensors, electro-optical devices, light-emitting display devices The semiconductor device can be applied to various electronic devices. Examples of such devices include display devices, lighting devices, personal computers, word processors, Image playback devices, portable CD players, radios, tape recorders, headphone stereos , stereos, clocks, cordless telephone handsets, transceivers, portable radios, mobile phones, smart phones smartphones, e-books, car phones, portable game consoles, calculators, personal digital assistants, electronic organizers, Translators, voice input devices, video cameras, digital still cameras, electric shavers, high-frequency Heating devices, electric rice cookers, electric washing machines, vacuum cleaners, water heaters, electric fans, hair dryers, air conditioners conditioners, humidifiers, dehumidifiers, air conditioning equipment, dishwashers, dish dryers, clothes dryers, cloth Dryers, electric refrigerators, electric freezers, electric refrigerator-freezers, freezers for DNA storage, flashlights, Tools, smoke detectors, medical equipment, emergency lights, traffic lights, conveyor belts, elevators, escalators , industrial robots, power storage systems, electric vehicles, hybrid vehicles, plug-in hybrids Hybrid vehicles, tracked vehicles, motorized bicycles, motorcycles, electric wheelchairs, golf carts, boats Ships, submarines, helicopters, aircraft, rockets, satellites, space probes and planetary probes, In this embodiment mode, the semiconductor device described in the above embodiment mode is applied to a mobile phone, a smartphone, etc. Examples of applications to mobile devices such as smartphones and electronic books are shown in Figs. 14 to 17. explain.

[0305] In mobile devices such as mobile phones, smartphones, and e-books, image data is temporarily stored. SRAM or DRAM is used in the following. SRAM or DRAM is used The reason is that flash memory has a slow response time and is not suitable for image processing. On the other hand, when SRAM or DRAM is used for temporary storage of image data, the following characteristics are observed: do.

[0306] In a normal SRAM, as shown in FIG. 14(A), one memory cell is made up of transistors 801 to It is composed of six transistors, 806, which are connected to the X decoder 807 and the Y decoder 808. The transistor 803 and the transistor 805 are driven by the transistor 808. 04 and transistor 806 form an inverter, enabling high-speed operation. Since each memory cell is composed of six transistors, the cell area is large. When the minimum dimension of the design rule is F, the area of ​​the SRAM memory cell is usually 10 0~150F 2 For this reason, SRAM has the lowest cost per bit among all types of memory. expensive.

[0307] On the other hand, in a DRAM, the memory cell is made up of a transistor 811, as shown in FIG. The storage capacitor 812 is connected to the X decoder 813 and the Y decoder 814. Each cell is composed of one transistor and one capacitor, and the area is small. The memory cell area of ​​a DRAM is usually 10F 2 However, DRAM is always refreshed. It requires a reset and consumes power even if no rewriting is performed.

[0308] However, if the transistor 811 is a transistor having a low off-state current described in the above embodiment, By using a resistor, it is possible to hold the charge in the storage capacitor 812 for a long period of time, and frequent No refresh is required. This reduces the memory cell area and reduces power consumption. It can be reduced.

[0309] A block diagram of the portable device is shown in FIG. 15. The portable device shown in FIG. 15 includes an RF circuit 901, an analog A digital baseband circuit 902, a digital baseband circuit 903, a battery 904, and a power supply Circuit 905, application processor 906, flash memory 910, display A controller 911, a memory circuit 912, a display 913, a touch sensor 919, The display 913 is a display. The image display device is configured with an application section 914, a source driver 915, and a gate driver 916. The application processor 906 includes a central processing unit (CPU 907), a DSP 908, The memory circuit 912 generally includes an SRAM or The semiconductor device described in the previous embodiment is used for this part. This allows information to be written and read at high speed, and to be stored for a long period of time. In addition, the power consumption can be reduced sufficiently. A main memory for storing instructions and a register for reading and writing data at high speed. The semiconductor device described in the above embodiment is used for buffer storage devices such as a buffer memory, a cache, etc. This makes it possible to sufficiently reduce the power consumption of the CPU.

[0310] FIG. 16 shows a display memory circuit 950 using the semiconductor device described in the previous embodiment. The memory circuit 950 shown in FIG. The memory controller 951 is also configured with a switch 954, a switch 955, and a memory controller 951. The memory circuit receives image data (input image data) input from a signal line, a memory 952, The data stored in the memory 953 (stored image data) is read and controlled by the data read / write unit 955. A display controller 956 and a display unit 957 are connected to the display unit 956. A display 957 is connected to show the

[0311] First, certain image data is generated by an application processor (not shown). The input image data A is input to the memory 952 via the switch 954. The image data stored in the memory 952 (stored image data A) is then The image is sent to a display 957 via a switch 955 and a display controller 956. , will be displayed.

[0312] When there is no change in the input image data A, the stored image data A usually has a frequency of about 30 to 60 Hz. The display controller 956 reads the data from the memory 952 via the switch 955. It is revealed.

[0313] Next, for example, when the user rewrites the screen (i.e., input image data A If there is a change in the input image data, the application processor The input image data B is stored in the memory 953 via the switch 954. During this time, the stored image data A is periodically read out from the memory 952 via the switch 955. When the new image data (stored image data B) has been stored in the memory 953, From the next frame of the display 957, the stored image data B is read out, and the switch 95 5, and the stored image data is displayed on the display 957 via the display controller 956. Data B is sent and displayed. This readout is followed by the next new image data being stored in the memory. This continues until the data is stored in the memory 952.

[0314] In this way, the memory 952 and the memory 953 alternately write image data and receive image data. The display 957 is displayed by reading out the data from the memory 9 The memory 52 and the memory 953 are not limited to being separate memories, but may be one memory divided and used. The semiconductor device described in the above embodiment may be used as the memory 952 and the memory 953. By adopting this technology, information can be written and read at high speeds and memory can be retained for long periods of time. Moreover, power consumption can be sufficiently reduced.

[0315] FIG. 17 shows a block diagram of an electronic book. FIG. 17 shows a battery 1001, a power supply circuit 1002, , microprocessor 1003, flash memory 1004, audio circuit 1005, keyboard A code 1006, a memory circuit 1007, a touch panel 1008, a display 1009, The display controller 1010 is configured as a display controller.

[0316] Here, the semiconductor device described in the previous embodiment is used for the memory circuit 1007 in FIG. The role of the memory circuit 1007 is to temporarily store the contents of the book. An example of a feature is when a user uses the highlight feature. When reading an e-book, you may want to mark a specific part. The highlighting function is called the highlight function, and it can be used to change the display color, underline, make text bold, etc. The aim is to differentiate the device from its surroundings by making it brighter or changing the font of the text. This is a function that memorizes and retains information at specified locations. If you want to store this information for a long period of time, It may be copied to the flash memory 1004. In this case, the same as in the previous embodiment is also possible. By adopting the semiconductor device described above, writing and reading of information can be performed at high speed. This allows long-term storage and reduces power consumption.

[0317] As described above, the portable device shown in this embodiment mode is equipped with the semiconductor device according to the above embodiment. This allows for high-speed readout, long-term memory retention, and low power consumption. Thus, a portable device with reduced noise is realized.

[0318] The structures, methods, and the like described in this embodiment may be combined as appropriate with the structures, methods, and the like described in other embodiments. They can be used in combination. EXAMPLES

[0319] In this embodiment, a silicon oxynitride film is formed by the method for forming the protective film 23 shown in the embodiment mode 1. The characteristics of the silicon oxynitride film will be described. Specifically, the silicon oxynitride film formed by this method will be described. This will be explained using the results of a TDS (thermal desorption spectrometry) analysis of the amount of oxygen contained in the product.

[0320] First, the prepared sample will be described. The prepared sample has the protective film 23 shown in the first embodiment. A structure in which a 400 nm thick silicon oxynitride film was formed on a silicon wafer under the above conditions. This is a sample.

[0321] A silicon wafer is placed in the processing chamber of a plasma CVD device, and the raw material gas, silicon The run was supplied at 160sccm and the source gas dinitrogen monoxide was supplied at 4000sccm. The pressure inside the tube was controlled at 200 Pa, and a 27.12 MHz high-frequency power source was used to generate a 1500 W power supply. The silicon oxynitride film was formed by applying a force to the silicon oxynitride film. The substrate temperature was set to 220° C. The plasma CVD apparatus used in this embodiment had an electrode area of ​​6 000cm 2 This is a parallel plate type plasma CVD device, and the power supplied is This is converted to 0.25W / cm 2 It is.

[0322] The sample prepared by the above method is designated as sample A1.

[0323] As a comparative example, a silicon wafer was fabricated using the plasma CVD apparatus used to fabricate sample A1. A silicon oxynitride film was formed on a wafer to prepare sample A2. The silicon film was processed by supplying silane at 30 sccm and dinitrogen monoxide at 4,000 sccm into the processing chamber. The pressure in the treatment chamber was controlled at 200 Pa, and a 27.12 MHz high-frequency power source was used to generate a 150 W output. The silicon oxynitride film of sample A2 was formed by supplying electric power. The supplied power was converted to power per unit area (power density) of 0.025 W / cm 2 in be.

[0324] Next, the TDS analysis was performed on Sample A1 and Sample A2. The results of the TDS analysis are shown in Figure 18. The horizontal axis of FIG. 18 represents the substrate temperatures of samples A1 and A2, and the vertical axis represents the TDS spectra. The peak intensity is shown.

[0325] In the TDS analysis, the peaks observed in the substrate temperature range of 300°C to 400°C were The oxygen (specifically, oxygen atoms) contained in the analyzed sample (sample A1 or sample A2 in this embodiment) This peak appears when oxygen molecules (or oxygen molecules) are released to the outside. The total amount of the element corresponds to the integral value of the peak. When the oxygen content is greater than the target composition, the excess oxygen is easily released and easily desorbed to the outside. Therefore, the intensity of the peaks determines the amount of oxygen contained in the silicon oxynitride film. You can evaluate your ability.

[0326] As shown in FIG. 18, the peak that appears due to oxygen desorption to the outside is stronger in sample A1 than in sample A2. Therefore, the amount of oxygen contained in the silicon oxynitride film of sample A1 was confirmed to be large. It was confirmed that the amount of oxygen contained in the silicon oxynitride film was greater than that of the silicon oxynitride film of sample A2.

[0327] Next, in the method for forming the protective film 23 shown in the first embodiment, This section explains the effect of power on the

[0328] First, the prepared sample will be described. The prepared sample has the same structure as sample A1, and the insulating The power supplied when forming the silicon oxynitride film as the insulating film was 1000 W (0.17 W / cm 2 ), or 2000W (0.33W / cm 2 ) sample. Other conditions for forming the silicon film were the same as those for sample A1.

[0329] Here, the power supplied is 1000 W (0.17 W / cm 2 The sample obtained by the above procedure was designated as sample A3. , the power supply is 2000W (0.33W / cm 2 ) was designated as sample A4.

[0330] The TDS analysis was carried out on samples A3 and A4. The explanation is as above. Samples A1, A3, A4, and A6 obtained from TDS analysis The amount of oxygen contained in each sample of sample A1 and sample A2 is shown in FIG.

[0331] As shown in FIG. 19A, as the power supplied when forming the silicon oxynitride film is increased, It was confirmed that the amount of oxygen contained in the prepared samples increased.

[0332] Next, in the method for producing the protective film 23 shown in the first embodiment, the insulating film is formed by controlling This section explains the effects of pressure on the

[0333] First, the prepared sample will be described. The prepared sample has the same structure as sample A1, and The pressure controlled during the formation of the silicon nitride film was 120 Pa or 250 Pa. Other conditions for forming the silicon oxynitride film were the same as those for Sample A1.

[0334] Here, the sample with the controlled pressure of 120 Pa is designated as sample A5, and the sample with the controlled pressure of 250 The sample with 0.2 Pa was designated as sample A6.

[0335] The TDS analysis was carried out on samples A5 and A6. The explanation for the above is as above. Samples A1, A5 and A6 obtained by TDS analysis The amount of oxygen contained in each sample is shown in FIG.

[0336] As shown in FIG. 19B, by increasing the pressure controlled when forming the silicon oxynitride film, It was confirmed that the amount of oxygen contained in the prepared samples increased.

[0337] As described above, a silicon oxynitride film is formed by the method for forming the protective film 23 shown in the first embodiment. By this, a silicon oxynitride film having more oxygen than the stoichiometric composition can be formed. It was confirmed that the silicon oxynitride film loses some of its oxygen when heated. By using the silicon oxynitride film as a protective film for a transistor, the oxygen can be prevented from As a result, the transistor having excellent electrical properties can be obtained. It is possible to fabricate a transistor. EXAMPLES

[0338] In this embodiment, a silicon oxynitride film is formed by the method for forming the protective film 23 shown in the embodiment mode 1. The characteristics of the membrane are explained using the results of TDS analysis of a sample with a structure different from that of Example 1. Reveal.

[0339] The sample prepared in this example was a silicon wafer with a 50 nm thick silicon nitride film formed on it. A sample having a laminated structure in which a silicon oxynitride film having a thickness of 200 nm is formed on the silicon nitride film. It is.

[0340] The silicon wafer was placed in the processing chamber of the plasma CVD device, and a 50 sccm si Run, supply 5000sccm of nitrogen, control the pressure in the processing chamber to 60Pa, and set the temperature at 27.1 A silicon nitride film was formed by supplying 150 W of power using a 2 MHz high frequency power source. The substrate temperature during the formation of the silicon nitride film was 350° C. The plasma CVD apparatus was the same as that in Example 1, and the power density was 0.25 W / cm 2 It is.

[0341] Next, 160sccm of silane and 4000sccm of nitrous oxide were supplied into the processing chamber. The pressure in the processing chamber was controlled to 200 Pa, and a high frequency power source of 27.12 MHz was used to generate 150 0W (0.25W / cm 2 ) to form a silicon oxynitride film on the silicon nitride film. The substrate temperature was set to 220° C. when the silicon oxynitride film was formed. The sample thus prepared is designated as sample B1.

[0342] In addition, 100 sccm of silane and 3000 sccm of dinitrogen monoxide were applied to the silicon nitride film. The pressure in the processing chamber is controlled to 40 Pa, and a high frequency of 27.12 MHz is applied. Using a power supply of 1500W (0.25W / cm 2 ) was supplied to the silicon nitride film. The sample with the silicon oxynitride film formed is referred to as sample B2. The substrate temperature during formation was 350°C.

[0343] Samples B1 and B2 were subjected to TDS analysis, and the results are shown in FIG. The TDS analysis in this example was carried out in the same manner as in Example 1. Figures 20(A) and 20(B) In the figure, the horizontal axis represents the substrate temperature of samples B1 and B2, and the vertical axis represents the peak of the TDS spectrum. Represents the peak strength.

[0344] FIG. 20(A) shows the results corresponding to the amount of oxygen desorbed to the outside in samples B1 and B2. FIG. 20(B) shows the amount of water desorbed to the outside in sample B1 and sample B2. The results are shown in Fig. 20. As in Example 1, the peak intensities in Fig. 20(A) and Fig. 20(B) are The amount of oxygen and water contained in the silicon oxynitride film of sample B1 or sample B2 varies depending on the strength of the The amount of can be evaluated.

[0345] As shown in FIG. 20(A), the peak that appears due to oxygen desorption to the outside is greater in sample B1 than in sample B2. Therefore, the amount of oxygen contained in the silicon oxynitride film of sample B1 was larger. It was confirmed that the amount of oxygen contained in the silicon oxynitride film of sample B2 was larger than that contained in the silicon oxynitride film of sample B2.

[0346] For this reason, the protective film 2 shown in the first embodiment, in which the substrate temperature is set to 180° C. or more and 250° C. or less, is used. By forming a silicon oxynitride film using the method of 3, it is possible to obtain a film with a composition that is more than stoichiometric. It was confirmed that a silicon oxynitride film containing oxygen could be formed.

[0347] In addition, as shown in FIG. 20(B), the peak that appears due to the desorption of water to the outside is smaller in sample B than in sample B2. It was confirmed that B1 is larger. The peak that appears near the substrate temperature of 100°C is the absorption peak. This peak indicates the desorption of water. Therefore, sample B1 has a coarser structure than sample B2. From the above, it can be seen that the silicon oxynitride film of sample B1 easily adsorbs water. The amount of water contained in the silicon oxynitride film of sample B2 is larger than that contained in the silicon oxynitride film of sample B1. This is because the flow rate of silane when forming the silicon oxynitride film of sample B1 is higher than that of the oxynitride film of sample B2. The flow rate of silane was higher than that of the silicon nitride film formed, and the substrate temperature was the same as that of sample B1. It is presumed that this is because the EXAMPLES

[0348] In this embodiment, when a silicon oxynitride film is formed on an oxide semiconductor film, Specifically, the amount of defects occurring in a silicon oxynitride film over an oxide semiconductor film will be described. The ESR measurement results and CPM (Constant Photocurrent) The following explanation will be given using the measurement results of the ent method.

[0349] First, the results of the ESR measurements are explained. The prepared sample was a quartz substrate on which an oxide semiconductor film with a thickness of 100 nm was formed. The sample has a layered structure in which a silicon oxynitride film with a thickness of 400 nm is formed on the film.

[0350] An IGZO film, which is a CAAC-OS film, was formed on a quartz substrate by sputtering. The IGZO film was prepared by sputtering a target of In:Ga:Zn=1:1:1 (atomic ratio). ) target and 50sccm Ar and 50sccm H O were used as sputtering gas. The source material was supplied into the processing chamber of the sputtering device, and the pressure in the processing chamber was controlled to 0.6 Pa. The IGZO film was formed by supplying a DC power of 170 kW. After the IGZO film was formed, a first heat treatment was performed in a nitrogen atmosphere, and then The second heat treatment was performed in an atmosphere containing nitrogen and oxygen. The heat treatment temperature was 350°C. The heat treatment time was 1 hour for both the first heat treatment and the second heat treatment.

[0351] Next, the quartz substrate on which the IGZO film was formed was placed in the processing chamber of the plasma CVD equipment. The raw material gas, silane, was fed at 160sccm, and the raw material gas, dinitrogen monoxide, was fed at 4000s. The pressure in the processing chamber was controlled to 120 Pa, and a high frequency power source of 27.12 MHz was used. Electric power was supplied to form a silicon oxynitride film. cm 2 The power density is 10 00W(0.17W / cm2 ), 1500W (0.25W / cm 2 ), 2000W(0. 33W / cm 2 ) are set as three conditions, and samples C1, C2, and C3 are used respectively.

[0352] Then, ESR measurements were performed on samples C1 to C3 under the following conditions: The measurement temperature was room temperature (25°C), and the high-frequency power (microwave power) of 9.2 GHz was used. ) was set to 20 mW, and the magnetic field direction was set parallel to the surface of the silicon oxynitride film of the sample. Spin per unit area of ​​the signal at g=1.93 due to oxygen vacancies in the IGZO film The detection limit for the number of 12 spins / cm 2 It was decided.

[0353] The results of the ESR measurement are shown in FIG. 21. FIG. 21 shows the ESR measurement results. The relationship between power and the number of spins per unit area of ​​the signal appearing at g=1.93 in the oxide semiconductor film. The smaller the number of spins per unit area, the more the number of spins contained in the oxide semiconductor film. It can be said that there is little oxygen deficiency.

[0354] As shown in Figure 21, the number of spins per unit area of ​​samples C2 and C3 is higher than that of sample C1. It was confirmed that the amount of the oxide semiconductor film was reduced. At this time, a silicon oxynitride film is formed by using the method for forming the protective film 23 shown in the first embodiment. As a result, oxygen vacancies in the oxide semiconductor film that are generated when the silicon oxynitride film is formed can be further reduced. can be reduced to

[0355] The power for forming the silicon oxynitride film was 1500 W (0.25 W / cm 2 ) and The flow rate of silane was set at 120sccm or 200sccm to form a silicon oxynitride film. The sample with the silane flow rate of 120 sccm was designated as sample C4. The sample with a silane flow rate of 200 sccm is designated as sample C5.

[0356] The ESR measurements were also carried out on samples C2, C4 and C5 under the same conditions as above. FIG. 22 shows the flow rate of silane supplied when forming a silicon oxynitride film. The relationship between the signal appearing at g=1.93 in the oxide semiconductor film and the number of spins per unit area is shown. This is a diagram.

[0357] As shown in FIG. 22, when the flow rate of silane is increased in forming a silicon oxynitride film, It was confirmed that the number of spins per unit area tends to decrease. When forming the silicon oxynitride film, the flow rate of silane is increased to form the film. It is possible to further reduce oxygen vacancies in the oxide semiconductor film that occur when a silicon film is formed. can.

[0358] Next, samples C2, C4, and C5 were heat-treated at 300°C, and then ESR measurements were performed. As a result, oxygen vacancies in the IGZO films of samples C2, C4, and C5 were The number of spins per unit area of ​​the signal appearing at g = 1.93 derived from ×10 12 spins / cm 2 ) or less.

[0359] For the above reasons, the protective film 23 can be formed over the oxide semiconductor film by the method described in Embodiment 1. After the silicon oxynitride film is formed, heat treatment is performed to remove oxygen contained in the oxide semiconductor film. It was found that the defects could be reduced.

[0360] Next, the measurement results of CPM will be explained. First, the fabricated sample will be explained.

[0361] First, a glass substrate was used as a substrate, and an oxide semiconductor film was formed over the substrate.

[0362] The oxide semiconductor film is a CAAC-OS film, an IGZO film, formed by sputtering. A mask is formed on the IGZO film by a photolithography process, and the mask is used to A part of the IGZO film was etched. Then, the etched IGZO film was heat-treated. In this embodiment, an IGZO film having a thickness of 100 nm was formed. Formed.

[0363] The IGZO film is made by sputtering a target of In:Ga:Zn=1:1:1 (atomic ratio). The sputtering gas was 50sccm Ar and 50sccm oxygen. was supplied into the processing chamber of the sputtering device, the pressure in the processing chamber was controlled to 0.7 Pa, and the The IGZO film was formed by supplying a DC power of 1.5 W. The substrate temperature during the formation of the IGZO film was 170°C. It was decided.

[0364] The heat treatments performed on the etched IGZO film were a first heat treatment performed in a nitrogen atmosphere, and The first heat treatment was followed by a second heat treatment in a nitrogen and oxygen atmosphere. The temperature of the heat treatment and the second heat treatment were both 450° C., and the treatment time was the same as that of the first heat treatment and the second heat treatment. Both heat treatments were performed for 1 hour.

[0365] Next, a pair of electrodes in contact with the oxide semiconductor film were formed.

[0366] A conductive film is formed over the oxide semiconductor film, and a mask is formed over the conductive film by a photolithography process. A mask was formed on the conductive film, and the conductive film was partially etched using the mask to form a pair of electrodes. The conductive film is a 400 nm thick aluminum film formed on a 100 nm thick titanium film. A titanium film having a thickness of 100 nm was then formed on the aluminum film.

[0367] Next, a heat treatment was performed at a temperature of 300° C. in an atmosphere containing oxygen and nitrogen. I went there for an hour in an atmospheric environment.

[0368] Next, an insulating film was formed over the oxide semiconductor film and the pair of electrodes.

[0369] The insulating film is a silicon oxynitride film formed by the method for forming the protective film 23 shown in Embodiment 1. Specifically, 160sccm of silane and 4000sccm of dinitrogen monoxide were injected into the plasma. The pressure in the processing chamber was controlled at 200 Pa, and the frequency was 27.12 MHz. A high-frequency power source of 1500 W (0.25 W / cm 2 ) power supply, thickness 400 The substrate temperature during the formation of the insulating film was 220°C. It was decided.

[0370] After forming the insulating film, a heat treatment was performed on the structure obtained by the steps up to this point. The heating was performed at 300° C. for 1 hour in an atmosphere containing oxygen and nitrogen.

[0371] The sample obtained by the above steps is designated as sample C6.

[0372] Here, a process for preparing a sample for comparison will be described. Sample C7 is a transistor in which the insulating film of sample C6 is formed as follows. The insulating film of sample C7 was prepared by silane deposition at 30 sccm and 4000 Nitrous oxide was supplied to the processing chamber of the plasma CVD apparatus at a pressure of 200 The power was controlled to 150 W (0.025 W / cm) using a 27.12 MHz high-frequency power source. 2 ) was supplied to form a silicon oxynitride film with a thickness of 400 nm. The substrate temperature during formation was 220°C.

[0373] Next, the CPM measurement was performed on the samples C6 and C7. The amount of light irradiated onto the sample surface so that the photocurrent value remains constant when a voltage is applied between the pair of electrodes. In CPM measurement, the absorption coefficient is measured based on the amount of irradiated light. When there is a defect, the absorption at the energy (converted from wavelength) corresponding to the level where the defect exists The defect density of the sample can be evaluated by multiplying this increase in the absorption coefficient by a constant. It can be valued.

[0374] The absorption coefficients obtained by CPM measurement of samples C6 and C7 were analyzed to determine the band tail-related The absorption coefficients excluding the absorption coefficients due to defects, i.e., the absorption coefficients due to defects, are shown in FIG. In the graph, the horizontal axis represents the absorption coefficient and the vertical axis represents the light energy. The bottom of the conduction band of the oxide semiconductor film is set to 0 eV, and the top of the valence band is set to 3.15 eV. In FIG. 23, each curve indicates the relationship between the absorption coefficient and the light energy. The solid curve corresponds to the defect level of sample C6, and the dashed curve corresponds to the defect level of sample C7. The absorption coefficient due to the defect level in sample C6 is 1.00×10 -2 / cm, and the absorption coefficient due to the defect level in sample C7 is 6.52 × 10 -2 / c It was m.

[0375] It can be seen from FIG. 23 that the number of defect levels in sample C6 is smaller than that in sample C7.

[0376] From the above, when a silicon oxynitride film is formed on an oxide semiconductor film, the flow rate of silane is increased. The silicon oxynitride film was formed by increasing the supply power and increasing the temperature. Oxygen vacancies that may occur in the oxide semiconductor film can be further reduced.

[0377] As described above, a silicon oxynitride film is formed as a protective film over a transistor having an oxide semiconductor film. In forming the protective film 23, a silicon oxynitride film is formed by using the method for forming the protective film 23 shown in the embodiment mode 1. By forming the semiconductor layer, a transistor with excellent electrical characteristics can be manufactured. EXAMPLES

[0378] In this example, electrical characteristics of a semiconductor device according to one embodiment of the present invention will be described. The current-voltage characteristics of a transistor according to one embodiment of the present invention will be used for description.

[0379] First, a manufacturing process of a transistor will be described. In this embodiment, the process will be described with reference to FIG. do.

[0380] First, a glass substrate was used as the substrate 11, and a gate electrode 15 was formed on the substrate 11.

[0381] A tungsten film with a thickness of 100 nm is formed by sputtering, and then photolithography is performed. A mask is formed on the tungsten film by Then, the gate electrode 15 was formed by etching.

[0382] Next, a gate insulating film 33 composed of an insulating film 31 and an insulating film 32 is formed on the gate electrode 15. Successful.

[0383] A silicon nitride film having a thickness of 50 nm is formed as the insulating film 31, and a silicon nitride film having a thickness of 200 nm is formed as the insulating film 32. A silicon oxynitride film with a thickness of nm was formed. The silicon nitride film was formed by evaporating 50 sccm of silane and 50 sccm of nitrogen. 5000sccm was supplied to the processing chamber of the plasma CVD equipment, and the pressure in the processing chamber was set to 60Pa. The formation was performed by controlling the power supply and supplying 150 W of power using a 27.12 MHz high frequency power supply. The silicon oxynitride film was formed by plasma deposition of 20 sccm silane and 3000 sccm dinitrogen monoxide. The pressure in the processing chamber was controlled to 40 Pa, and a 27.12 MHz The silicon nitride film and the silicon nitride film were formed by supplying 100 W of power using a high frequency power source. The silicon oxynitride film was formed at a substrate temperature of 350°C.

[0384] The structure obtained by the above steps can be seen in FIG. 4(A). Although an insulating film 13 is shown, the underlying insulating film 13 is not formed in this embodiment.

[0385] Next, an oxide semiconductor film 19 was formed so as to overlap the gate electrode 15 via the gate insulating film 33. .

[0386] Here, the oxide semiconductor film 19 is an IGZO film, which is a CAAC-OS film, formed by sputtering. It was formed by the coating method.

[0387] The IGZO film is made by sputtering a target of In:Ga:Zn=1:1:1 (atomic ratio). The sputtering gas was 50sccm argon and 50sccm Oxygen is supplied into the processing chamber of the sputtering device, and the pressure in the processing chamber is controlled to 0.6 Pa. The IGZO film was formed by supplying 5 kW of DC power. The substrate temperature during the formation of the IGZO film was 17 The temperature was set to 0°C.

[0388] Next, a mask is formed on the IGZO film by a photolithography process, and the mask is used to The IGZO film was then partially etched. In this embodiment, an oxide semiconductor film 19 having a thickness of 35 nm was formed. A film was formed.

[0389] The heat treatments performed on the etched IGZO film were a first heat treatment performed in a nitrogen atmosphere, and After the first heat treatment, a second heat treatment was performed in a nitrogen and oxygen atmosphere. The temperatures of the first and second heat treatments were both set at 350° C., and the treatment times were set at 100° C. for the first and second heat treatments. Both heat treatments were performed for 1 hour.

[0390] The structure obtained through the steps up to this point can be seen in FIG.

[0391] Next, a pair of electrodes 21 in contact with the oxide semiconductor film 19 were formed.

[0392] A conductive film is formed over the gate insulating film 17 and the oxide semiconductor film 19, and a photolithography process is performed. forming a mask on the conductive film by etching a part of the conductive film using the mask; A pair of electrodes 21 was formed. The conductive film was formed by depositing a thickness of 100 nm on a tungsten film having a thickness of 50 nm. A 400 nm thick aluminum film is formed, and a 100 nm thick titanium film is formed on the aluminum film. After that, the mask was removed.

[0393] The structure obtained by the steps up to this point can be seen in FIG. 4(C). C) was not subjected to the treatment of exposure to plasma generated in an oxygen atmosphere.

[0394] Next, the structure obtained by the above steps was subjected to a heat treatment. The temperature was set to 0° C. and the reaction was carried out in an atmosphere containing oxygen and nitrogen for 1 hour.

[0395] Next, an insulating film 34 is formed on the gate insulating film 17, the oxide semiconductor film 19, and the pair of electrodes 21. After the formation, the insulating film 34 was subjected to an oxygen plasma treatment to add oxygen 35 to the insulating film 34 .

[0396] In this embodiment, the insulating film 34 is made of 20 sccm of silane and 3000 sccm of dioxide. Nitrogen was supplied to the processing chamber of the plasma CVD apparatus, and the pressure in the processing chamber was controlled to 200 Pa. A 100W power supply was used to produce a 30nm thick oxynitride film. The silicon film was formed. The substrate temperature was set to 350° C. when the insulating film 34 was formed.

[0397] In addition, 250 sccm of oxygen was supplied to the processing chamber of the plasma processing apparatus, and the pressure in the processing chamber was kept at 1 The pressure was controlled at 5 Pa, the bias electrode was set at 0 W, and 4500 W of power was supplied to the source electrode. An oxygen plasma was generated, and the insulating film 34 was exposed to the oxygen plasma for 600 seconds.

[0398] The structure obtained through the steps up to this point can be seen in FIG.

[0399] Next, an insulating film 36 was formed on the insulating film 34 to which oxygen 35 had been added.

[0400] The insulating film 36 is a silicon oxynitride film formed by the method for forming the protective film 23 shown in the first embodiment. Specifically, 160 sccm of silane and 4000 sccm of dinitrogen monoxide were pumped. The pressure in the processing chamber of the plasma CVD equipment was controlled at 200 Pa, and the A high-frequency power source of 1500 W (0.25 W / cm 2 ) power supply, thickness 3 A silicon oxynitride film of 70 nm was formed. The substrate temperature during the formation of the insulating film 36 was The temperature was set to 220°C.

[0401] After forming the insulating film 36, a heat treatment was performed on the structure obtained by the steps up to this point. The treatment was carried out at a temperature of 350° C. in an atmosphere containing oxygen and nitrogen for 1 hour.

[0402] Through the above steps, a transistor according to one embodiment of the present invention was manufactured. The transistor thus fabricated is designated as Sample D1.

[0403] Here, a manufacturing process of a transistor as a comparative example will be described. The insulating film 36 of the sample D1 is formed as follows. The insulating film 36 of sample D2 was formed by annealing the insulating film 36 for 30 s. Supply ccm of silane and 4000sccm of nitrous oxide to the processing chamber of the plasma CVD equipment. The pressure in the treatment chamber was controlled at 200 Pa, and the temperature was increased to 150 W(0.025W / cm 2 ) was supplied to the silicon oxynitride film with a thickness of 370 nm. The substrate temperature when the insulating film 36 was formed was set to 350° C.

[0404] Then, the initial current-voltage characteristics of Samples D1 and D2 were measured. FIG. 24(A) shows the initial current-voltage characteristics of sample D1, and FIG. B) shows the initial current-voltage characteristics of sample D2. The horizontal axis represents the gate voltage (Vg), and the left vertical axis represents the drain current (I d), the right vertical axis represents the field effect mobility (μFE). The thick solid line represents the drain voltage The thick dashed line shows the initial current-voltage characteristics when Vd is set to 10 V. The thin solid line represents the initial current-voltage characteristic when Vd is set to 10 V. The field effect mobility is shown as a function of the applied pressure. Note that the field effect mobility is the result in the saturation region of each sample. The result is.

[0405] As shown in FIG. 24(B), the threshold voltage of sample D2 is largely shifted in the negative direction. On the other hand, as shown in FIG. 24(A), the threshold voltage of sample D1 was The voltage is close to 0V, and it has been confirmed that the normally-on characteristics observed in sample D2 have been eliminated. Done.

[0406] In addition, in sample D2, when the drain voltage was 1 V and 10 V, the rise time of the on-current was The drain voltages are different, but in sample D1, the on-state currents are different when the drain voltage is 1 V and 10 V. It was confirmed that the on-state current rise voltages were almost the same.

[0407] From the above, the sample D1 using the method for forming the protective film 23 shown in the first embodiment has excellent electrical characteristics. Therefore, according to one embodiment of the present invention, it was confirmed that the conductor has excellent electrical properties. It is possible to create a transistor. EXAMPLES

[0408] Example 1 This example describes the electrical characteristics of a semiconductor device according to one embodiment of the present invention and the insulating film according to one embodiment of the present invention. The relationship between the defect density and the current of a transistor according to one embodiment of the present invention will be described. The results of the initial characteristics of the -voltage characteristics and the C- The amount of hysteresis by V measurement and the defect of the silicon oxynitride film which is an insulating film of one embodiment of the present invention The following explains the depression density.

[0409] First, a manufacturing process of a transistor will be described. In this embodiment, the process will be described with reference to FIG. do.

[0410] First, a glass substrate was used as the substrate 11, and a gate electrode 15 was formed on the substrate 11.

[0411] A tungsten film with a thickness of 100 nm is formed by sputtering, and then photolithography is performed. A mask is formed on the tungsten film by Then, the gate electrode 15 was formed by etching.

[0412] Next, the gate insulating film 17 was formed on the gate electrode 15 .

[0413] The gate insulating film 17 is a silicon nitride film having a thickness of 50 nm and a silicon oxynitride film having a thickness of 200 nm. The silicon nitride film was formed by laminating a silicon nitride film. The silicon nitride film was formed by laminating a silicon nitride film with 50 sccm of silane and 5000 sccm of nitrogen. The pressure in the processing chamber of the plasma CVD apparatus is controlled to 60 Pa. The formation was performed by supplying 150 W of power using a 27.12 MHz high frequency power source.

[0414] The silicon oxynitride film is formed by plasma CVD using microwaves. The conditions for the plasma CVD method using microwaves are as follows: In order to stabilize the plasma generated in the processing chamber of the microwave plasma CVD device, To achieve this, silane was introduced into the treatment chamber at 10 sccm, nitrous oxide at 300 sccm, and argon at 100 sccm. The pressure in the processing chamber was adjusted to 20 Pa, and the substrate was maintained at 325°C. Then, 5 kW of power was applied using a 2.45 GHz microwave power source. The generated plasma was stable. After that, the silane and dinitrogen monoxide were introduced into the treatment chamber at 30 sccm and 1500 sccm, respectively. The flow rate of the nitrogen gas was increased to 2500 sccm and the flow rate of argon to 2500 sccm to form a silicon oxynitride film.

[0415] Next, an oxide semiconductor film 19 was formed so as to overlap the gate electrode 15 via the gate insulating film 17. .

[0416] An IGZO film, which is a CAAC-OS film, was formed on the gate insulating film 17 by sputtering. .

[0417] The IGZO film is made by sputtering a target of In:Ga:Zn=1:1:1 (atomic ratio). The sputtering gas was 50sccm Ar and 50sccm oxygen. is supplied into the processing chamber of the sputtering device, the pressure in the processing chamber is controlled to 0.6 Pa, and the pressure is 5k The IGZO film was formed by supplying a DC power of 1000 W. The substrate temperature during the formation of the IGZO film was 170°C. It was decided.

[0418] The structure obtained by the process up to this point can be seen in FIG. 2(A). Although an insulating film 13 is shown, the base insulating film 13 is not formed in this step.

[0419] Next, a mask is formed on the IGZO film by a photolithography process, and the mask is used to The IGZO film was then partially etched. In this embodiment, an oxide semiconductor film 19 having a thickness of 35 nm was formed. A film was formed.

[0420] The heat treatments performed on the etched IGZO film were a first heat treatment performed in a nitrogen atmosphere, and After the first heat treatment, a second heat treatment was performed in a nitrogen and oxygen atmosphere. The temperatures of the first and second heat treatments were both set at 450° C., and the treatment times were set at 100° C. for the first and second heat treatments. Both heat treatments were performed for 1 hour.

[0421] The structure obtained through the steps up to this point can be seen in FIG.

[0422] Next, a pair of electrodes 21 in contact with the oxide semiconductor film 19 were formed.

[0423] A conductive film is formed over the gate insulating film 17 and the oxide semiconductor film 19, and a photolithography process is performed. forming a mask on the conductive film by etching a part of the conductive film using the mask; A pair of electrodes 21 was formed. The conductive film was a 40 mm thick film on a 100 nm thick titanium film. A 100 nm thick aluminum film was formed, and a 100 nm thick titanium film was formed on the aluminum film. Successful.

[0424] The structure obtained through the steps up to this point can be seen in FIG. 2(C).

[0425] Next, the structure obtained by the above steps was subjected to a heat treatment. The temperature was set to 0° C. and the reaction was carried out in an atmosphere containing oxygen and nitrogen for 1 hour.

[0426] Next, a protective film 23 is formed on the gate insulating film 17, the oxide semiconductor film 19, and the pair of electrodes 21. Successful.

[0427] In this embodiment, the protective film 23 is made of 200 sccm of silane, 3000 sccm of monoxide. Nitrogen was supplied to the processing chamber of the plasma CVD apparatus, and the pressure in the processing chamber was controlled to 200 Pa. A 7.12MHz high-frequency power supply was used to supply 1500W of power to the film, and an oxide film with a thickness of 370nm was formed. The substrate temperature during the formation of the protective film 23 was set to 220° C. Ta.

[0428] The structure obtained through the steps up to this point can be seen in FIG.

[0429] After forming the protective film 23, the structure obtained by the steps up to this point was subjected to a heat treatment. The treatment was carried out at a temperature of 300° C. in an atmosphere containing oxygen and nitrogen for one hour.

[0430] Next, a planarizing film was formed on the protective film 23 (not shown). After being coated on the substrate 3, the substrate is exposed to light and developed to form a film having openings that expose a portion of the pair of electrodes. A planarizing film was formed. Note that the planarizing film was an acrylic resin film having a thickness of 1.5 μm. After that, a heat treatment was performed. The heat treatment was performed at a temperature of 250° C. in a nitrogen-containing atmosphere. So I went there for an hour.

[0431] Next, a conductive film was formed (not shown) to connect to a part of the pair of electrodes. A 100 nm thick ITO film containing silicon oxide was formed by the deposition method. The heat treatment was carried out at a temperature of 250°C in a nitrogen-containing atmosphere for 1 hour. Ta.

[0432] The transistor was fabricated by the above steps. The sample is designated as sample E1.

[0433] In addition, in the formation conditions of the protective film 23, a condition with a different flow rate of silane than that of the sample E1 was used. A protective film 23 was formed, and a transistor was fabricated.

[0434] As a forming condition of the protective film 23, the flow rate of silane is set to 160 sccm to form a transistor. The resulting sample is designated as sample E2.

[0435] As a condition for forming the protective film 23, the flow rate of silane is set to 120 sccm to form a transistor. The resulting sample was designated as sample E3.

[0436] In addition, the protective film 23 was formed under different conditions from those of the sample E1, such as a flow rate of silane and a supply power. A protective film 23 was formed under the above conditions, and a transistor was fabricated.

[0437] The conditions for forming the protective film 23 were a silane flow rate of 30 sccm and a power supply of 150 W. The sample on which the transistor was formed was designated as sample E4.

[0438] In the samples E2 to E4, the base insulating film 13 shown in FIG. In the gate insulating film 17, a silicon nitride film is not formed, and a single layer of a silicon oxynitride film is formed. .

[0439] Next, the initial current-voltage characteristics of samples E1 to E4 were measured. The results are shown in FIG. 25. FIG. 25(A) shows the initial current-voltage characteristics of sample E1, and FIG. ) is the initial current-voltage characteristic of sample E2, and FIG. 25(C) is the current-voltage characteristic of sample E3. FIG. 25(D) shows the initial current-voltage characteristics of sample E4. In FIG. 25, the horizontal axis represents the gate voltage (Vg), and the left vertical axis represents the drain current flowing between a pair of electrodes 21. The right vertical axis represents the drain current (Id), and the right vertical axis represents the field effect mobility (μFE). This shows the initial current-voltage characteristics when the drain voltage (Vd) is set to 1V or 10V. The line represents the field effect mobility versus gate voltage when Vd is set to 10 V. The effective mobility is the result in the saturation region for each sample.

[0440] The initial current-voltage characteristics shown in FIG. 25(B) and FIG. 25(C) are At 10V and 20V, the on-state current rise voltage is different. The initial characteristics of the current-voltage characteristic are that the threshold voltage shifts in the negative direction and the threshold On the other hand, the initial current-voltage characteristic shown in FIG. When the on-state voltage is 1V and 10V, the on-state current rise voltage is almost the same for each. The threshold voltage is near the gate voltage of 0 V, and there is no variation in the threshold voltage.

[0441] Next, the film characteristics of the protective film 23 formed under the conditions of each of the samples E1 to E4 will be described. First, let us consider MOS (Metal Oxide Semiconductor) ) structural element was fabricated and CV (Capacitance-Voltage) measurements were performed. The results are shown in Figure 27.

[0442] First, the process of fabricating a MOS structure element for CV measurement will be described. Please refer to 26 for further explanation.

[0443] As shown in FIG. 26, a first electrode 963 was formed on a substrate 961. The first electrode 963 was a gate electrode formed in any one of Samples E1 to E4. It was formed using similar conditions as pole 15.

[0444] An insulating film 965 was formed on the substrate 961 and the first electrode 963. The gate insulating film 17 was formed under the same conditions as those for the samples E1 to E4.

[0445] An oxide semiconductor film 967 was formed over the insulating film 965. The oxide semiconductor films 19 were formed under the same conditions as those of the oxide semiconductor films 19 formed in any of Samples E1 to E4.

[0446] A second electrode 969 was formed over the oxide semiconductor film 967. The pair of electrodes 21 were formed under the same conditions as those for the pairs of electrodes 21 formed in the samples E1 to E4.

[0447] An insulating film 971 is formed over the insulating film 965, the oxide semiconductor film 967, and the second electrode 969. The insulating film 971 was formed under the same conditions as the protective film 23 formed in the samples E1 to E4. It was formed by

[0448] By the above steps, a MOS structure element for CV measurement was formed. The MOS structure element formed under the same conditions as sample E2 was designated sample E5. The MOS structure element thus fabricated is designated as sample E6, and a MOS structure formed under the same conditions as sample E3 is designated as sample E5. The MOS structure element formed under the same conditions as sample E4 is designated as sample E7. The number is 8.

[0449] The CV measurement results of samples E5 to E8 are shown in FIG. 27(A) to FIG. 27(D), respectively. In addition, the voltage V of the first electrode 963 was swept from -10 V to 10 V in each sample. The flat band voltage Vfb1 when the voltage V of the first electrode 963 is changed from 10 V to −10 V The hysteresis amount (Δ Vfb) are shown in Table 1.

[0450] [Table 1]

[0451] 27(A) to 27(C) and Table 1 show that as the hysteresis amount (ΔVfb) increases, As shown in FIG. 25(A) to FIG. 25(C), when the drain voltage is 1 V and 10 V, The difference in the on-state current rise voltage between the two transistors becomes large. In the initial current-voltage characteristic, the on-state current rises due to the hysteresis (Δ Vfb).

[0452] Next, the defect density of the protective film 23 formed in each of the samples E1 to E4 was measured by ESR. The following explains the results.

[0453] First, the prepared samples are described. The prepared samples are samples E1 to E4 on a quartz substrate. A silicon oxynitride film having a thickness of 400 nm was formed using the same conditions as those for the protective film 23 of the material E4. Next, a heat treatment was performed at 300° C. for 1 hour in an atmosphere containing nitrogen and oxygen.

[0454] As the silicon oxynitride film, a sample formed under the same conditions as the protective film 23 of the sample E1 was used. The sample was designated as E9, and the sample formed under the same conditions as the protective film 23 of the sample E2 was designated as E10. A sample formed under the same conditions as the protective film 23 of sample E3 was designated as sample E11, and A sample formed under the same conditions as the protective film 23 of No. 4 was taken as sample E12.

[0455] Next, the ESR measurements were performed on the samples E9 to E12 under the following conditions. The constant temperature was room temperature (25°C), and the 9.2GHz high-frequency power (microwave power) was 20m The magnetic field was set to W, and the direction of the magnetic field was parallel to the surface of the silicon oxynitride film of the samples E9 to E12. The g= The detection limit for the spin density of the signal appearing at 2.001 is 1.0×10 15 spins / cm 2 It is.

[0456] The results of the ESR measurements are shown in FIG. 28. (A) to (D) show the results of the ESR measurements for sample E9. 27 and 28 show the first differential curves of the silicon oxynitride film in sample E12. Therefore, as ΔVfb becomes smaller, the signal intensity at g value of 2.001 becomes smaller. Therefore, by making the insulating film 971 a film with few defects, the hysteresis loop in the CV measurement can be reduced. The amount of teresis can be reduced, and the electrical characteristics of the transistor are such that the drain voltage is 1V The on-state current rise voltages of the two are approximately the same, giving the device excellent electrical characteristics. This can be done.

[0457] Next, a structure similar to that of the samples E5 to E8 and different from the samples E5 to E8 will be described. A MOS structure element having an insulating film 971 formed under the film forming conditions was fabricated. The structure is the same as that of samples E9 to E12, but the deposition conditions are different from those of samples E9 to E12. A sample for ESR measurement was prepared having a silicon oxynitride film formed under the above conditions.

[0458] Next, CV measurements were performed on each MOS structure element. Also, ESR measurements were performed on each ESR measurement sample. Ta.

[0459] Samples E5 to E8 and insulating films formed under different film formation conditions from Samples E5 to E8 The spin density of the signal appearing at g=2.001 in the MOS structure element having the insulating film 971 and the test Samples E9 to E12, and samples E9 to E12 were formed under different film formation conditions. The relationship between the hysteresis of the ESR measurement sample having a silicon oxynitride film is shown in FIG. vinegar.

[0460] From FIG. 25 and FIG. 27, when the drain voltage of the transistor is 1V and 10V, The desired hysteresis amount (Δ Vfb) is 2.0 V or less. In addition, the signal appearing at g = 2.001 of the sample that satisfies this condition is The spin density of the number is 1.5×10 18 spins / cm 3 Less than, preferably 1.0×10 18 spins / cm 3 The following is the result.

[0461] From the above, it was found that the protective film formed on the transistor was The spin density of the signal appearing at g=2.001 is 1.5×10 18 spins / cm 3 less than, Furthermore, 1.0×10 18 spins / cm 3 By providing an oxide insulating film having a thickness of 0.01 to 0.1 mm, It is possible to fabricate a transistor having good electrical characteristics.

Claims

[Claim 1] The substrate placed in the evacuated processing chamber is maintained at 180° C. or higher and 260° C. or lower; A source gas is introduced into the processing chamber to set the pressure in the processing chamber to 100 Pa or more and 250 Pa or less; 0.17 W / cm to the electrode provided in the processing chamber ２ 0.5W / cm or more ２ A method for forming an insulating film, comprising the steps of: forming an insulating film by supplying high frequency power as follows:

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