Nitride semiconductor device and method of manufacturing nitride semiconductor device

Abstract

To reduce the sheet resistance of a nonactive region of a nitride semiconductor device.SOLUTION: There is provided a vertical nitride semiconductor device 100 that comprises an active region 110 and a nonactive region 120, and the nonactive region 120 has an N type region which includes a semiconductor substrate 10 and an epitaxial region 20, a P type first ion implantation region 31 which is provided above the N type region, a P type second ion implantation region 32 which is provided selectively above the first ion implantation region 31, and has higher doping density than the first ion implantation region 31, and a passage region 33 which is not provided with the second ion implantation region 32 above the first ion implantation region 31.SELECTED DRAWING: Figure 2C

Description

[Technical field]

[0001] The present invention relates to a nitride semiconductor device and a method for manufacturing a nitride semiconductor device. [Background technology]

[0002] Patent Document 1 describes a silicon carbide semiconductor device having a first region in which a P-type region is not provided. Patent Documents 2 and 3 describe nitride semiconductor devices having a path for out-diffusing hydrogen from the P-type region. [Prior art document] [Patent documents] [Patent Document 1] JP 2022-180233 A [Patent Document 2] JP 2003-68745 A [Patent Document 3] Japanese Patent Publication No. 2022-533187 [Non-patent Document 1] Narita Tetuso, Tomita Kazuyoshi, Yamada Shinji, Kachi Tetsu, "Quantitative investigation of the lateral diffusion of hydrogen in p-type GaN layers having NPN structures," Applied Physics Express, 20 December 2018, Volume 12, Page 011006. Summary of the Invention [Problem to be solved by the invention]

[0003] It is desirable to reduce the sheet resistance of non-active regions in nitride semiconductor devices. [Means for solving the problem]

[0004] A first aspect of the present invention provides a vertical nitride semiconductor device having an active region and a non-active region, the non-active region having an N-type region, a first P-type ion implantation region provided above the N-type region, a second P-type ion implantation region selectively provided above the first ion implantation region and having a doping concentration higher than that of the first ion implantation region, and a passing region above the first ion implantation region in which the second ion implantation region is not provided.

[0005] The nitride semiconductor device may further include a PN junction region where the N-type region and the first ion implantation region are in contact with each other, and the inactive region may be provided inside the PN junction region in a top view.

[0006] In any of the nitride semiconductor devices described above, the passing region may be a P-type region having a doping concentration lower than that of the second ion implantation region.

[0007] In any of the nitride semiconductor devices described above, the passing region may be the first ion implantation region.

[0008] In any of the nitride semiconductor devices described above, the passing region may be an insulating layer provided on an upper surface of the first ion implantation region.

[0009] In any of the nitride semiconductor devices described above, an area of ​​the second ion implantation region may be equal to or greater than an area of ​​the passing region when viewed from above.

[0010] In any of the nitride semiconductor devices described above, the closest distance to the passage region measured from any point in the second ion implantation region may be 500 μm or less in top view.

[0011] In any of the nitride semiconductor devices described above, the closest distance to the passage region measured from any point in the second ion implantation region may be 200 μm or less in top view.

[0012] In any of the nitride semiconductor devices described above, the second ion implantation region may have a plurality of second ion implantation regions extending in a predetermined extension direction in a top view. The passing region may have a plurality of passing regions extending in the extension direction in a top view. The plurality of second ion implantation regions and the plurality of passing regions may be alternately arranged in an arrangement direction different from the extension direction in a top view.

[0013] In any of the nitride semiconductor devices described above, a width of the passing region in the arrangement direction may be not less than 50 μm and not more than 1000 μm.

[0014] In any of the nitride semiconductor devices described above, the second ion implantation regions may be provided in a lattice pattern when viewed from above.

[0015] In any one of the above nitride semiconductor devices, the Mg concentration in the second ion implantation region is 1E18 cm -3 It may be more than 1E21cm -3 It may be the following:

[0016] Any of the nitride semiconductor devices described above may further include a front surface electrode provided above the N-type region, and a P-type contact region in the active region in contact with the front surface electrode. The Mg concentration in the second ion implantation region may be lower than the Mg concentration in the contact region.

[0017] Any of the nitride semiconductor devices described above may further include a front surface electrode provided above the N-type region, and a P-type contact region in the active region in contact with the front surface electrode. In a depth direction of the nitride semiconductor device, a thickness of the second ion implantation region may be greater than a thickness of the contact region.

[0018] In any of the nitride semiconductor devices described above, the N-type region may include an N-type semiconductor substrate, and an N-type epitaxial region provided above the semiconductor substrate and having a doping concentration lower than that of the semiconductor substrate.

[0019] Any of the nitride semiconductor devices described above may further comprise a termination region that covers the periphery of the active region and the non-active region when viewed from above.

[0020] In a second aspect of the present invention, there is provided a method for manufacturing a vertical nitride semiconductor device having an active region and a non-active region, the method comprising the steps of forming an N-type region in the non-active region, forming a P-type first ion implantation region above the N-type region, selectively forming a P-type second ion implantation region having a doping concentration higher than that of the first ion implantation region at least above the first ion implantation region, and forming a passing region above the first ion implantation region in which the second ion implantation region is not provided.

[0021] In the above method for manufacturing a nitride semiconductor device, selectively forming the second ion implantation region may include selectively ion-implanting a dopant into the first ion implantation region.

[0022] In any of the nitride semiconductor devices described above, the step of selectively forming the second ion implantation region may include the steps of ion-implanting a dopant into the first ion implantation region, and selectively etching the second ion implantation region after the ion implantation step.

[0023] Any of the nitride semiconductor devices described above may include a step of forming a P-type body region in the active region, and a step of forming a P-type contact region above the body region, the P-type contact region having a doping concentration higher than that of the body region.

[0024] In any of the nitride semiconductor devices described above, the step of forming the body region and the step of forming the first ion implantation region may be a same ion implantation process, and the step of forming the contact region and the step of forming the second ion implantation region may be a same ion implantation process.

[0025] In any of the nitride semiconductor devices described above, the step of forming the body region and the step of forming the first ion implantation region may be different ion implantation processes, and the step of forming the contact region and the step of forming the second ion implantation region may be different ion implantation processes.

[0026] The above summary of the invention does not list all of the features of the present invention. Also, subcombinations of these features may also be inventions. [Brief description of the drawings]

[0027] [Figure 1] 1 shows an example of the top surface of the nitride semiconductor device 100 of this embodiment. [Figure 2A] 1 shows an example of a cross section of an active region 110 in the nitride semiconductor device 100 of this example. [Figure 2B] 1 shows an example of a cross section of a non-active region 120 in the nitride semiconductor device 100 of this example. [Figure 2C] 1 shows an example of a cross section of an active region 110 and a non-active region 120 in a nitride semiconductor device 100 of this example. [Figure 2D] 1 shows an example of a cross section of a termination region 130 in the nitride semiconductor device 100 of this example. [Diagram 3] 1 shows a modified cross section of the non-active region 120 in the nitride semiconductor device 100 of this embodiment. [Figure 4A] 1 shows an example of the top surface of the non-active region 120 of the nitride semiconductor device 100 of this example. [Figure 4B] 1 shows a modified example of the top surface of the non-active region 120 of the nitride semiconductor device 100 of this embodiment. [Diagram 5]4 shows the distribution of Mg concentration and hydrogen concentration in the nitride semiconductor device 100 of this example. [Figure 6A] An example of a method for manufacturing a vertical nitride semiconductor device 100 having an active region and a non-active region will be described. [Figure 6B] A modified method for manufacturing a vertical nitride semiconductor device 100 having an active region and a non-active region will be described. [Figure 7A] An example of a method for manufacturing the nitride semiconductor device 100 of this embodiment will be described. [Figure 7B] A modified method of manufacturing the nitride semiconductor device 100 of this embodiment will be described. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0029] In this specification, one side in a direction parallel to the depth direction of a semiconductor substrate is referred to as "upper" and the other side as "lower." Of the two main surfaces of a substrate, layer, or other member, one surface is referred to as the upper surface and the other surface is referred to as the lower surface. The directions of "upper," "lower," "front," and "back" are not limited to the direction of gravity or the direction of attachment to a substrate or the like when mounting a semiconductor device.

[0030] In this specification, layers or regions marked with N or P have majority carriers of electrons or holes, respectively, and + and - following N or P respectively indicate higher and lower doping concentrations than layers or regions not marked with that symbol.

[0031] 1 shows an example of the top surface of a nitride semiconductor device 100 of this example. The nitride semiconductor device 100 of this example is a vertical nitride semiconductor device including an active region 110, a non-active region 120, and a termination region .

[0032] The active region 110 is a region where a field insulating film 38, which will be described later, is not provided. The active region 110 may be a region through which a main current flows when the nitride semiconductor device 100 is in operation. The active region 110 may have a metal-oxide-semiconductor field-effect transistor (MOSFET) structure. The active region 110 may have a planar-gate type MOSFET structure or a trench-gate type MOSFET structure. The active region 110 may have a diode structure.

[0033] The inactive region 120 is provided to cover the periphery of the active region 110. The inactive region 120 is a region in which a field insulating film 38, which will be described later, is provided. The field insulating film 38 may be provided below a gate pad (not shown) or the like. Carriers accumulated in a PN junction of the nitride semiconductor device 100 are extracted through the inactive region 120, thereby improving the reliability of the nitride semiconductor device 100 during switching.

[0034] Termination region 130 is provided to cover the periphery of active region 110 and non-active region 120 in a top view. Termination region 130 may have a guard ring 28 made of a plurality of P-type regions. Guard ring 28 will be described later. Termination region 130 reduces the electric field generated at the end of active region 110, and has a higher breakdown voltage than active region 110 and non-active region 120.

[0035] 2A shows an example of a cross section of an active region 110 in the nitride semiconductor device 100 of this example. The nitride semiconductor device 100 includes an N-type region 25, a source region 12, a body region 14, a contact region 15, a gate insulating film 42, a back surface side electrode 50, and a front surface side electrode 52. The N-type region 25 includes a semiconductor substrate 10 and an epitaxial region 20.

[0036] The semiconductor substrate 10 is an N+ type semiconductor substrate. The semiconductor substrate 10 may be a GaN substrate or a Si substrate. The semiconductor substrate 10 may be prepared by any method such as a vapor phase growth method such as hydride vapor phase epitaxy (HVPE) or a liquid phase growth method. The semiconductor substrate 10 may be cut out from an epitaxially grown GaN layer.

[0037] The epitaxial region 20 is provided above the semiconductor substrate 10. The epitaxial region 20 is provided by epitaxial growth on the semiconductor substrate 10. For example, the epitaxial region 20 is a material that can be epitaxially grown on the semiconductor substrate 10, such as GaN. The epitaxial region 20 may be either N-type or I-type. I-type refers to an intrinsic semiconductor into which no dopant is implanted. The epitaxial region 20 in this example is an N-type with a lower doping concentration than the semiconductor substrate 10. For example, the doping concentration of the epitaxial region 20 is 1.0×10 16 cm -3 The thickness of the epitaxial region 20 is not particularly limited, but is, for example, 10 μm.

[0038] The body region 14 is provided on the epitaxial region 20. The body region 14 is provided by ion implanting a dopant into the epitaxial region 20. The conductivity type of the body region 14 in this example is P-type. For example, the P-type dopant is at least one of Mg, Ca, Zn, and Be.

[0039] The body region 14 in this example is selectively provided in the epitaxial region 20. Selectively provided means that the body region 14 is provided on a part of the upper surface of the epitaxial region 20, not on the entire upper surface of the epitaxial region 20. For example, a P-type dopant is ion-implanted onto the epitaxial region 20 using a mask with a predetermined pattern.

[0040] The doping concentration of the P-type dopant in the body region 14 is 1×10 19 cm -3The doping concentration of the P-type dopant in the body region 14 may be 1×10 16 cm -3 It may be greater than or equal to 1 x 10 17 cm -3 It may be greater than or equal to 1 x 10 18 cm -3 It may be more than that.

[0041] The source region 12 is an N+ type region provided on the front surface 21 side of the epitaxial region 20. The source region 12 in this example is provided between the gate electrode G and the source electrode S of the front surface side electrode 52.

[0042] The doping concentration of the source region 12 is higher than the doping concentration of the epitaxial region 20. The doping concentration of the source region 12 may be higher than the doping concentration of the semiconductor substrate 10. In one example, the doping concentration of the source region 12 is 1E18 cm -3 More than 1E21cm -3 The following is the result.

[0043] The source region 12 may be provided by ion implanting an N-type dopant into the epitaxial region 20. For example, the N-type dopant is at least one of silicon and germanium.

[0044] The body region 14 is provided on the epitaxial region 20. The body region 14 is provided by ion implanting a dopant into the epitaxial region 20. The conductivity type of the body region 14 in this example is P-type. For example, the P-type dopant is at least one of Mg, Ca, Zn, and Be.

[0045] The body region 14 in this example is selectively provided in the epitaxial region 20. Selectively provided means that the body region 14 is provided on a part of the upper surface of the epitaxial region 20, not on the entire upper surface of the epitaxial region 20. For example, a P-type dopant is ion-implanted onto the epitaxial region 20 using a mask with a predetermined pattern.

[0046] The doping concentration of the P-type dopant in the body region 14 is 1×10 19 cm -3 The doping concentration of the P-type dopant in the body region 14 may be 1×10 16 cm -3 It may be greater than or equal to 1 x 10 17 cm -3 It may be greater than or equal to 1 x 10 18 cm -3 It may be more than that.

[0047] The contact region 15 is provided above the epitaxial region 20 in contact with the front surface electrode 52. The contact region 15 is provided by ion implanting a dopant into the epitaxial region 20. The conductivity type of the contact region 15 in this example is P+ type.

[0048] The doping concentration of the contact region 15 is greater than the doping concentration of the body region 14. In one example, the doping concentration of the contact region 15 is greater than 1E18 cm -3 More than 1E21cm -3 The following is the result.

[0049] The front surface electrode 52 is provided above the N-type region 25. The front surface electrode 52 includes a gate electrode G and a source electrode S. The front surface electrode 52 is formed of a material containing a metal. At least a portion of the front surface electrode 52 may be formed of a metal such as aluminum (Al) or an alloy containing aluminum, for example, a metal alloy such as an aluminum-silicon alloy (AlSi) or an aluminum-silicon-copper alloy (AlSiCu).

[0050] The rear surface side electrode 50 is provided in contact with the rear surface 23. The rear surface side electrode 50 includes a drain electrode D. The rear surface side electrode 50 is formed of a material including a metal. The rear surface side electrode 50 may be formed of the same material as the front surface side electrode 52, or may be formed of a different material.

[0051] The gate insulating film 42 is provided between a channel region above the epitaxial region 20 and the gate electrode G. When a voltage is applied from the gate electrode G through the gate insulating film 42, a main current flows between the source electrode S and the drain electrode D.

[0052] 2B shows an example of a cross section of the inactive region 120 in the nitride semiconductor device 100 of this example. The nitride semiconductor device 100 includes an N-type region 25 including a semiconductor substrate 10 and an epitaxial region 20, a first ion implantation region 31, a second ion implantation region 32, a passing region 33, a field insulating film 38, and a back surface electrode 50.

[0053] The first ion implantation region 31 is a P-type region provided above the N-type region 25. The first ion implantation region 31 is formed by ion implanting a P-type dopant into the epitaxial region 20. The P-type dopant in this example is Mg.

[0054] The doping concentration of the first ion implantation region 31 may be the same as or different from the doping concentration of the body region 14. The doping concentration of the first ion implantation region 31 is 1E16 cm -3 It may be 1E19cm or more. -3 It may be the following:

[0055] The second ion implantation region 32 is selectively provided above the first ion implantation region 31 and is a P+ type region having a higher doping concentration than the first ion implantation region 31. The doping concentration of the second ion implantation region 32 may be the same as or different from the doping concentration of the contact region 15. The Mg concentration of the second ion implantation region 32 may be lower than the Mg concentration of the contact region 15.

[0056] Selectively provided means that the second ion implantation region 32 is provided on a part of the upper surface, not on the entire upper surface of the epitaxial region 20. For example, the second ion implantation region 32 is formed by ion implanting a P-type dopant onto the epitaxial region 20 using a mask of a predetermined pattern. The P-type dopant used to form the second ion implantation region 32 may be the same as or different from the P-type dopant used to form the first ion implantation region 31. In this example, Mg is commonly used.

[0057] The Mg concentration in the second ion implantation region 32 is 1E18 cm -3 More than 1E21cm -3 By providing the second ion implantation region 32 on the front surface 21 side of the epitaxial region 20, the sheet resistance of the inactive region 120 can be reduced and breakdown of the field insulating film 38 during switching of the nitride semiconductor device 100 can be suppressed, thereby improving reliability during switching.

[0058] The passage region 33 is a region above the first ion implantation region 31 where the second ion implantation region 32 is not provided. The passage region 33 may be a P-type region, an N-type region, or a region other than a semiconductor such as an insulating film. The passage region 33 is a region through which hydrogen generated inside the epitaxial region 20 passes in the annealing step during the manufacture of the nitride semiconductor device 100.

[0059] The passing region 33 may be a P-type region having a lower doping concentration than the second ion implantation region 32. In this example, the passing region 33 is the first ion implantation region 31. By using the first ion implantation region 31 as the passing region 33, a separate step of forming the passing region 33 is not required.

[0060] In the nitride semiconductor device 100, when the second ion implantation region 32 is formed above the epitaxial region 20, crystal defects aggregate at the boundary between the first ion implantation region 31 and the second ion implantation region 32, forming an I-type layer. Since this I-type layer does not have carriers, it does not function as a semiconductor and inhibits hydrogen migration during annealing.

[0061] When the second ion implantation region 32 is formed over the entire surface above the epitaxial region 20, an I-type layer is formed over the entire surface of the inactive region 120. As a result, hydrogen is prevented from escaping during annealing and remains, and the Mg implanted in the nitride semiconductor device 100 is inactivated by the remaining hydrogen, thereby reducing the breakdown voltage of the nitride semiconductor device 100. In addition, since the I-type layer does not function as a semiconductor, the effect of reducing the sheet resistance achieved by providing the second ion implantation region 32 is reduced.

[0062] In this example, the second ion implantation region 32 is selectively provided above the epitaxial region 20, and there is a passing region 33 where the second ion implantation region 32 is not provided. This reduces the range in which an I-type layer is formed and ensures a path for hydrogen migration during annealing, thereby improving the breakdown voltage of the nitride semiconductor device 100 and achieving a low sheet resistance.

[0063] The field insulating film 38 is formed over the entire surface of the non-active region 120, above the front surface 21 of the epitaxial region 20. The field insulating film 38 may be an insulating film having a different composition from the gate insulating film 42. The material of the field insulating film 38 may be SiO2, SiN, or alumina (Al2O3).

[0064] 2C shows an example of a cross section of the active region 110 and the non-active region 120 in the nitride semiconductor device 100 of this example.

[0065] 2C, the boundary between the active region 110 and the inactive region 120 may be the boundary between a region where the field insulating film 38 is provided and a region where the field insulating film 38 is not provided. A front surface electrode 52 may be provided in a part above the field insulating film 38. In this example, the inactive region 120 is provided inside a PN junction region 140 where a P-type region including the body region 14 or the first ion implantation region 31 and an N-type region including the epitaxial region 20 or the semiconductor substrate 10 are in contact with each other when viewed from above.

[0066] The film thickness of the field insulating film 38 may be thicker than the film thickness of the gate insulating film 42. This makes it possible to suppress breakdown of the field insulating film 38 during switching.

[0067] In the depth direction of the nitride semiconductor device 100, a thickness d14 of the body region 14 in the active region 110 and a thickness d31 of the first ion implantation region 31 in the non-active region 120 may be the same or different. In this example, the thickness of the body region 14 in the active region 110 and the thickness of the first ion implantation region 31 in the non-active region 120 are the same. The thickness d31 of the first ion implantation region 31 may be 0.1 μm or more and 1 μm or less.

[0068] In the depth direction of the nitride semiconductor device 100, the thickness of the contact region 15 in the active region 110 and the thickness of the second ion implantation region 32 in the non-active region 120 may be the same or different. In this example, in the depth direction of the nitride semiconductor device 100, the thickness d32 of the second ion implantation region 32 is thicker than the thickness d15 of the contact region 15. This reduces the Mg concentration in the second ion implantation region 32, and reduces the sheet resistance of the non-active region 120 while suppressing the formation of the above-mentioned I-type layer.

[0069] The thickness d32 of the second ion implantation region 32 is smaller than the thickness d31 of the first ion implantation region 31. The thickness d32 of the second ion implantation region 32 may be 0.01 μm or more and may be 0.2 μm or less.

[0070] 2D shows an example of a cross section of termination region 130 in nitride semiconductor device 100 of this example. Nitride semiconductor device 100 includes N-type region 25 including semiconductor substrate 10 and epitaxial region 20, guard ring 28, field insulating film 38, and back surface electrode 50.

[0071] The guard ring 28 is a P+ type region provided above the epitaxial region 20. The guard ring 28 may be formed using the same dopant as the second ion implantation region 32, or a different dopant. The doping concentration of the guard ring 28 may be the same as or different from the doping concentration of the second ion implantation region 32. In this example, the guard ring 28 is formed by ion implanting Mg in the same manner as the second ion implantation region 32, and has the same doping concentration. By providing the guard ring 28, electric field concentration in the peripheral region of the nitride semiconductor device 100 can be alleviated.

[0072] Fig. 3 shows a modified cross section of the non-active region 120 in the nitride semiconductor device 100 of this embodiment. Differences from Fig. 2B will be described with reference to Fig. 3.

[0073] In the example of FIG. 3, no P-type region is provided in the passing region 33. In this example, the passing region 33 is an insulating layer provided on the upper surface of the first ion implantation region 31. In the example of FIG. 3 as well, hydrogen in the epitaxial region 20 can escape through the region where the second ion implantation region 32 is not formed during annealing. In the example of FIG. 3, a field insulating film 38 is formed as the passing region 33 in the region where the second ion implantation region 32 is not formed after annealing.

[0074] 4A shows an example of the upper surface of the non-active region 120 of the nitride semiconductor device 100 of this example. In the non-active region 120, a field insulating film 38 is provided over the entire front surface 21 of the epitaxial region 20, but is omitted in FIG. 4A.

[0075] In a top view, the area of ​​the second ion implantation region 32 is equal to or larger than the area of ​​the passing region 33. This reduces the sheet resistance of the inactive region 120, and improves the reliability of the nitride semiconductor device 100 during switching.

[0076] The second ion implantation region 32 has a plurality of second ion implantation regions 32 extending in a predetermined extension direction in top view. In this example, the predetermined extension direction is the Y-axis direction. In the range shown in FIG. 4A, the second ion implantation region 32 has three second ion implantation regions 32a, 32b, and 32c.

[0077] In top view, the passing region 33 has a plurality of passing regions 33 extending in the same extension direction as the extension direction of the second ion implantation region 32. In the range shown in Fig. 4A, the passing region 33 has four passing regions 33a, 33b, 33c, and 33d.

[0078] The second ion implantation regions 32 and the passing regions 33 are alternately arranged in an arrangement direction different from the extension direction in a top view. That is, the second ion implantation regions 32 and the passing regions 33 may be arranged in a stripe shape. In this example, the arrangement direction is the X-axis direction. In the range shown in FIG. 4A, three second ion implantation regions 32a, 32b, and 32c and four passing regions 33a, 33b, 33c, and 33d are alternately arranged, but the number and arrangement direction of the second ion implantation regions 32 and the passing regions 33 are not limited to this.

[0079] The second ion implantation regions 32 each have a predetermined width W32 in the arrangement direction. The predetermined width W32 may be the same for each second ion implantation region 32 or may be different for each second ion implantation region 32.

[0080] The width W32 in the arrangement direction of the multiple second ion implantation regions 32 is set to a value within the range in which hydrogen present below the second ion implantation regions 32 can move by thermal diffusion to the passage region 33 during thermal annealing. By setting W32 in this manner, hydrogen can be removed from the P-type region during thermal annealing, and the breakdown voltage of the nitride semiconductor device 100 can be improved.

[0081] In one example, the width W32 in the arrangement direction of the multiple second ion implantation regions 32 is set so that the closest distance measured from any point of the second ion implantation region 32 to the passing region 33 is 500 μm or less. The width W32 may be set so that the closest distance measured from any point of the second ion implantation region 32 to the passing region 33 is 200 μm or less. In one example, W32 is 1000 μm or less, and in a modified example, it is 400 μm or less.

[0082] Each of the passage areas 33 has a predetermined width W33 in the arrangement direction. The predetermined width W33 may be the same for each of the passage areas 33 or may be different for each of the passage areas 33.

[0083] A width W33 of the passing region 33 is equal to or smaller than the width W32 of the second ion implantation region 32. This allows the area of ​​the second ion implantation region 32 in a top view to be equal to or larger than the area of ​​the passing region 33. In one example, the width W33 of the passing region in the arrangement direction is equal to or larger than 50 μm and equal to or smaller than 1000 μm.

[0084] Fig. 4B shows a modified example of the top surface of the non-active region 120 of the nitride semiconductor device 100 of this embodiment. Differences from Fig. 4A will be described with reference to Fig. 4B.

[0085] The second ion implantation regions 32 are provided in a lattice pattern in top view. The second ion implantation regions 32 may be provided extending in both the X-axis direction and the Y-axis direction. Even when the second ion implantation regions 32 are provided in a lattice pattern, as long as the area of ​​the second ion implantation regions 32 in top view is equal to or larger than the area of ​​the passing region 33, the sheet resistance of the inactive region 120 can be reduced.

[0086] Even when the second ion implantation regions 32 are provided in a lattice pattern, the breakdown voltage of the nitride semiconductor device 100 can be improved if the second ion implantation regions 32 are provided within a range where hydrogen present below the second ion implantation regions 32 can move by thermal diffusion to the passage regions 33 during annealing. In one example, in FIG. 4B, by setting the distance D32 from the four adjacent passage regions 33 to the farthest point to 500 μm or less, hydrogen present below the second ion implantation regions 32 can be thermally diffused to the passage regions 33 during annealing. The distance D32 may be 200 μm or less.

[0087] 5 shows the distribution of Mg concentration and hydrogen concentration in the nitride semiconductor device 100 of this example. In the figure, the solid line A represents the Mg concentration, the dashed line B represents the hydrogen concentration after performing dehydrogenation annealing, and the dashed-dotted line C represents the hydrogen concentration before performing dehydrogenation annealing.

[0088] The Mg concentration indicated by the solid line A is constant in the range from the front surface 21 of the epitaxial region 20 to about 0.3 μm in the depth direction of the nitride semiconductor device 100. This indicates that the second ion implantation region 32 is formed in this region.

[0089] The Mg concentration indicated by solid line A is constant in the range from 0.3 μm to 0.6 μm in the depth direction of the nitride semiconductor device 100, and gradually decreases in the range down to 1.0 μm. This indicates that the first ion implantation region 31 is formed in this region. In the nitride semiconductor device 100 of this example, the range from the front surface 21 of the epitaxial region 20 to approximately 1.0 μm in the depth direction of the nitride semiconductor device 100 is a P-type region.

[0090] Comparing the hydrogen concentration before hydrogen depletion annealing shown by dashed line B with the hydrogen concentration after hydrogen depletion annealing shown by broken line C, it can be seen that the hydrogen concentration is significantly reduced by hydrogen depletion annealing in the range from the front surface 21 of the epitaxial region 20 to 0.3 μm in the depth direction of the nitride semiconductor device 100. On the other hand, there is almost no difference in the range from 0.3 μm to 1.0 μm. In this example, hydrogen can be removed from the second ion implantation region 32 by providing the passage region 33 and performing hydrogen depletion annealing.

[0091] FIG. 6A shows an example of a method for manufacturing a vertical nitride semiconductor device 100 having an active region and a non-active region. The method for manufacturing the nitride semiconductor device 100 of this example includes a step S100 of forming an N-type region 25. The method for manufacturing the nitride semiconductor device 100 of this example includes a step S102 of forming a P-type first ion implantation region 31 above the N-type region 25. The method for manufacturing the nitride semiconductor device 100 of this example includes a step S104 of selectively forming a P-type second ion implantation region 32 having a doping concentration higher than that of the first ion implantation region 31 at least above the first ion implantation region 31. The method for manufacturing the nitride semiconductor device 100 may include a step S106 of thermal annealing. The method for manufacturing the nitride semiconductor device 100 of this example may include a step S108 of forming a field insulating film 38 above the epitaxial region 20.

[0092] In step S100, an epitaxial region 20 is formed above a semiconductor substrate 10. In this example, the epitaxial region 20 is epitaxially grown above the semiconductor substrate 10 using any method, such as MOCVD.

[0093] In step S102, a P-type dopant is ion-implanted into the front surface 21 of the epitaxial region 20 to form a first ion-implanted region 31. The P-type dopant may be Mg. In step S102, a Mg concentration of 1E17 cm -3 The ion implantation may be performed to an implantation depth of 1.0 μm.

[0094] In step S104, a mask 60 is formed on the front surface 21 of the epitaxial region 20, and a P-type dopant is ion-implanted using the mask 60 into a region in which the second ion implantation region 32 is to be formed. The P-type dopant may be the same as or different from the dopant used in forming the first ion implantation region 31. In this example, the second ion implantation region 32 is formed by implanting Mg, like the first ion implantation region 31.

[0095] The second ion implantation region 32 can be selectively formed by forming the mask 60 in a pattern corresponding to the region where the second ion implantation region 32 is to be formed. The step S104 of selectively forming the second ion implantation region 32 may include a step of selectively ion-implanting a dopant into the first ion implantation region 31.

[0096] 6A , in step S104, a passing region 33 in which the second ion implantation region 32 is not provided may be formed above the first ion implantation region 31. That is, the manufacturing method for the nitride semiconductor device 100 of this example may include a step of forming, above the first ion implantation region 31, the passing region 33 in which the second ion implantation region 32 is not provided.

[0097] The mask 60 is formed to have a width of 100 μm, for example. This allows the second ion implantation region 32 and the passing region 33 to be arranged in a stripe shape when viewed from above. The ion implantation of the dopant for forming the second ion implantation region 32 is performed with a Mg concentration of 1E19 cm -3 The ions may be implanted to an implantation depth of 0.2 μm.

[0098] In step S106, a thermal annealing process is performed. In one example, annealing is performed at a temperature of 1300° C. for 10 minutes. The thermal annealing process activates the first ion implantation region 31 and the second ion implantation region 32. Removal of the mask 60 from the front surface 21 of the epitaxial region 20 may be performed before or after step S106. In step S106, a hydrogen removal heat treatment may be performed separately from the activation heat treatment.

[0099] In step S108, a field dielectric 38 is formed over the epitaxial region 20. The field dielectric 38 may be an insulating film such as SiO2.

[0100] Fig. 6B shows a modified example of the method for manufacturing the nitride semiconductor device 100. In the modified example of Fig. 6B, the step of selectively forming the second ion implantation region includes a step S202 of ion-implanting a dopant into the first ion implantation region 31, and a step S204 of selectively etching the second ion implantation region 32 after the step S202 of ion-implanting the dopant into the first ion implantation region 31.

[0101] 6B, after step S102 of forming a P-type first ion implantation region 31, step S202 of ion-implanting a dopant into the first ion implantation region 31 is included. In step S202, a second ion implantation region 32 is formed on the entire surface above the first ion implantation region 31.

[0102] 6B, after step S202 of ion-implanting a dopant into the first ion-implanted region 31, step S204 of selectively etching the second ion-implanted region 32 is included. In step S204, a mask 60 is formed on the front surface 21 of the epitaxial region 20, and the second ion-implanted region 32 is selectively formed by selectively etching a region where the mask 60 is not formed.

[0103] Fig. 7A shows an example of a manufacturing method for the nitride semiconductor device 100 of this example. Figures 6A and 6B show an example of a manufacturing method for the non-active region 120, whereas Fig. 7A shows an example of a manufacturing method for both the active region 110 and the non-active region 120, which is different. The manufacturing method for the nitride semiconductor device 100 of this example includes a step of forming a P-type body region 14 in the active region 110, and a step of forming a P-type contact region 15 having a doping concentration higher than that of the body region 14 above the body region 14.

[0104] The manufacturing method of the nitride semiconductor device 100 of this example may include step S302 of forming the body region 14 and the first ion implantation region 31. The step of forming the body region 14 and the step of forming the first ion implantation region 31 may be the same ion implantation process. That is, the body region 14 and the first ion implantation region 31 may be formed simultaneously. This allows the body region 14 and the first ion implantation region 31 to be formed by a single dopant implantation, thereby reducing costs.

[0105] The manufacturing method of the nitride semiconductor device 100 of this example may include step S304 of forming the contact region 15 and the second ion implantation region 32. Step S304 of forming the contact region 15 and step S104 of forming the second ion implantation region 32 may be the same ion implantation process. That is, the contact region 15 and the second ion implantation region 32 may be formed simultaneously. This allows the contact region 15 and the second ion implantation region 32 to be formed by a single dopant implantation, thereby reducing costs.

[0106] Fig. 7B shows a modified example of the method for manufacturing the nitride semiconductor device 100. Fig. 7B differs from the example shown in Fig. 7A in that it does not include step S302 of forming the body region 14 and the first ion implantation region 31, and step S304 of forming the contact region 15 and the second ion implantation region 32.

[0107] In the modification shown in FIG. 7B, step S402 of forming the body region 14 and step S102 of forming the first ion implantation region 31 are different ion implantation steps. That is, S402 and S102 are performed at different timings. The ion implantation conditions of the P-type dopant in S402 and S102 may be the same or different. By forming the body region 14 and the first ion implantation region 31 in different ion implantation steps, the characteristics of the nitride semiconductor device 100 can be finely adjusted.

[0108] In the modification shown in FIG. 7B, step S404 of forming the contact region 15 and step S104 of forming the second ion implantation region 32 are different ion implantation steps. That is, S404 and S104 are performed at different timings. The ion implantation conditions of the P-type dopant in S404 and S104 may be the same or different. By forming the contact region 15 and the second ion implantation region 32 in different ion implantation steps, the characteristics of the nitride semiconductor device 100 can be finely adjusted.

[0109] 7B shows an example in which the body region 14, the first ion implantation region 31, the contact region 15, and the second ion implantation region 32 are formed in this order, but the order in which each region is formed is not limited to this. That is, the body region 14 and the contact region 15 may be formed first, and then the first ion implantation region 31 and the second ion implantation region 32, or the first ion implantation region 31 and the second ion implantation region 32 may be formed first, and then the body region 14 and the contact region 15.

[0110] Although the present invention has been described above using the embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It is clear to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the description of the claims that such modifications and improvements can also be included in the technical scope of the present invention.

[0111] It should be noted that the order of execution of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and may be realized in any order unless the output of a previous process is used in a later process. Even if the operational flow in the claims, specifications, and drawings is explained using "first," "next," etc. for convenience, it does not mean that it is essential to perform the process in this order. [Explanation of symbols]

[0112] REFERENCE SIGNS LIST 10 semiconductor substrate, 12 source region, 14 body region, 15 contact region, 20 epitaxial region, 21 front surface, 23 back surface, 25 N-type region, 28 guard ring, 31 first ion implantation region, 32 second ion implantation region, 33 passing region, 38 field insulating film, 42 gate insulating film, 50 back electrode, 52 front electrode, 60 mask, 100 nitride semiconductor device, 110 active region, 120 inactive region, 130 termination region, 140 PN junction region

Claims

1. A vertical nitride semiconductor device having an active region and a non-active region, the non-active region comprising: An N-type region; a P-type first ion implantation region provided above the N-type region; a P-type second ion implantation region selectively provided above the first ion implantation region and having a doping concentration higher than that of the first ion implantation region; a passage region above the first ion implantation region, the passage region being free of the second ion implantation region; have Nitride semiconductor devices.

2. a PN junction region in contact with the N-type region and the first ion implantation region; The inactive region is provided inside the PN junction region when viewed from above. The nitride semiconductor device according to claim 1 .

3. The passing region is a P-type region having a lower doping concentration than the second ion implantation region. The nitride semiconductor device according to claim 1 .

4. The passing region is the first ion implantation region. The nitride semiconductor device according to claim 3 .

5. The passing region is an insulating layer provided on an upper surface of the first ion implantation region. The nitride semiconductor device according to claim 1 .

6. When viewed from above, the area of ​​the second ion implantation region is equal to or larger than the area of ​​the passing region. The nitride semiconductor device according to claim 1 .

7. When viewed from above, the closest distance measured from any point in the second ion implantation region to the passing region is 500 μm or less. The nitride semiconductor device according to claim 1 .

8. When viewed from above, the closest distance measured from any point in the second ion implantation region to the passing region is 200 μm or less. The nitride semiconductor device according to claim 1 .

9. the second ion implantation region has a plurality of second ion implantation regions extending in a predetermined extension direction in a top view; The passing area has a plurality of passing areas extending in the extension direction when viewed from above, The second ion implantation regions and the passing regions are alternately arranged in an arrangement direction different from the extension direction when viewed from above. The nitride semiconductor device according to claim 1 .

10. The width of the passage area in the arrangement direction is 50 μm or more and 1000 μm or less. The nitride semiconductor device according to claim 9 .

11. The second ion implantation region is provided in a lattice shape when viewed from above. The nitride semiconductor device according to claim 1 .

12. The Mg concentration in the second ion implantation region is 1E18 cm －３ Above, 1E21cm －３ is less than or equal to The nitride semiconductor device according to claim 1 .

13. a front electrode provided above the N-type region; a P-type contact region in the active region, the P-type contact region being in contact with the front surface electrode; The Mg concentration in the second ion implantation region is lower than the Mg concentration in the contact region. The nitride semiconductor device according to claim 1 .

14. a front electrode provided above the N-type region; a P-type contact region in the active region, the P-type contact region being in contact with the front surface electrode; In a depth direction of the nitride semiconductor device, a thickness of the second ion implantation region is greater than a thickness of the contact region. The nitride semiconductor device according to claim 1 .

15. The N-type region is An N-type semiconductor substrate; an N-type epitaxial region provided above the semiconductor substrate and having a doping concentration lower than that of the semiconductor substrate; The nitride semiconductor device according to claim 1 .

16. a termination region that covers the periphery of the active region and the non-active region when viewed from above; The nitride semiconductor device according to claim 1 .

17. 1. A method for manufacturing a vertical nitride semiconductor device having an active region and a non-active region, comprising: forming an N-type region; forming a first ion implantation region of P type above the N type region; selectively forming a second ion implantation region of P type having a doping concentration higher than that of the first ion implantation region at least above the first ion implantation region; forming a passing region above the first ion implantation region, the passing region being free of the second ion implantation region; have A method for manufacturing a nitride semiconductor device.

18. The step of selectively forming the second ion implantation region includes selectively ion implanting a dopant into the first ion implantation region. The method for manufacturing a nitride semiconductor device according to claim 17.

19. The step of selectively forming the second ion implantation region comprises: implanting a dopant into the first ion implantation region; selectively etching the second ion implantation region after the ion implantation step; Includes The method for manufacturing a nitride semiconductor device according to claim 17.

20. In the active region, forming a P-type body region; forming a P-type contact region above the body region, the contact region having a higher doping concentration than the body region; Equipped The method for manufacturing a nitride semiconductor device according to any one of claims 17 to 19.

21. forming the body region and forming the first ion implantation region are the same ion implantation process; The steps of forming the contact region and forming the second ion implantation region are the same ion implantation process. The method for manufacturing a nitride semiconductor device according to claim 20.

22. forming the body region and forming the first ion implantation region are different ion implantation processes; The steps of forming the contact region and forming the second ion implantation region are different ion implantation processes. The method for manufacturing a nitride semiconductor device according to claim 20.

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