Power conversion circuit

JP2025042458APending Publication Date: 2025-03-27ROHM CO LTD
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Patent Information

Application Number
JP2023149487
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-09-14
Publication Date
2025-03-27

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Abstract

To accelerate switching operation without additionally providing a component.SOLUTION: In a power conversion circuit 1 in which one end of an inductor L1 is connected to a connection point of switching elements D1 and SW1 that are complementarily operated, the one switching element SW1 is ON / OFF driven by a gate driver G1. When it is turned ON, conductive current IL1 flows in the inductor L1 and energy is accumulated therein, when it is turned OFF, rectification current IL2 is generated through the other switching element D1 by energy discharge, and thereby power conversion is performed. In the inside of a loop of the rectification current IL2, a loop of the gate current Ig1 in which an insulation gate SW11 of the one switching element SW1 is driven by the gate driver G1 is formed. A magnetic flux B2 generated in the loop of the gate current Ig1 generates an induction current Ig2 in a direction inverse to the gate current Ig1 with respect to a magnetic flux B1 generated by the rectification current IL2, and a gate accumulated charge is pulled out.SELECTED DRAWING: Figure 4
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Description

[Technical field]

[0001] The present disclosure relates to power conversion circuits. [Background technology]

[0002] Power conversion circuits in which an inductor is connected to the junction of high-side and low-side switching elements connected in series with each other, and both switching elements switch complementarily, are used in various applications. For example, they are power supply circuits that convert DC power into desired power, and drive circuits that drive loads as inverters. In order to make power conversion smaller and more efficient in these various applications, it is necessary to increase the switching speed. For these switching elements, MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors), IGBTs (Insulated Gate Bipolar Transistors), etc. are often used. The insulated gates of these switching elements are voltage-driven by a gate driver.

[0003] Therefore, in order to increase the switching speed of these switching elements, Patent Document 1 has been proposed. In Patent Document 1, a MOSFET for extracting base charge is provided in a bipolar transistor that is actually connected between both terminals of a DC power supply and switches complementarily. The MOSFET quickly extracts the accumulated charge in the base, thereby speeding up the turn-off operation. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 5-235741

[0005] [overview] Although the technique disclosed in Patent Document 1 can achieve a faster turn-off operation, it requires additional components.

[0006] An object of the present disclosure is to provide a power conversion circuit that can increase the speed of switching operations without providing additional components.

[0007] In order to solve the above-mentioned problems, the power conversion circuit disclosed herein comprises high-side and low-side switching elements connected in series with each other and performing complementary switching operations, an inductor having one end connected to the connection point of the high-side and low-side switching elements, and a gate driver that voltage-drives the insulated gate of one of the high-side and low-side switching elements, and when one of the switching elements is turned ON by the gate driver, a conduction current flows through the inductor and energy is stored in the inductor, and when the switching element is turned OFF, the energy of the inductor is released to generate a rectified current via the other switching element, thereby performing power conversion. Inside the rectified current loop, a gate current loop is formed in which the gate driver drives the insulated gate of one of the switching elements, and a magnetic flux in the opposite direction generated in the gate current loop generates an induced current in the opposite direction to the gate current with respect to the magnetic flux generated by the rectified current. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is an electric circuit diagram of a power conversion circuit according to a first embodiment. [Diagram 2] FIG. 2 is a schematic waveform diagram showing a change in current flowing through an inductor due to switching in the power conversion circuit of FIG. [Diagram 3] FIG. 3 is a schematic waveform diagram showing the switching portion in the waveform diagram of FIG. 2 with the time axis enlarged. [Figure 4] FIG. 4 is a circuit diagram showing a part of the power conversion circuit of FIG. 1 in a form closer to the state in which it is mounted on a board. [Diagram 5] FIG. 5 is a waveform diagram showing the results of an experiment conducted by the inventors of the present application. [Figure 6] FIG. 6 is an electric circuit diagram of a power conversion circuit according to the second embodiment. [Figure 7] FIG. 7 is a circuit diagram showing a part of the power conversion circuit of FIG. 6 in a form closer to the state in which it is mounted on a board. [Figure 8] FIG. 8 is an electric circuit diagram of a power conversion circuit according to the third embodiment. [Figure 9] FIG. 9 is a circuit diagram showing a part of the power conversion circuit of FIG. 8 in a form closer to the state in which it is mounted on a board. [Figure 10] FIG. 10 is a circuit diagram showing a part of a power conversion circuit according to a fourth embodiment in a form close to a state in which the circuit is mounted on a board.

[0009] [Detailed Description] Next, the present embodiment will be described with reference to the drawings. In the description of the drawings described below, the same or similar parts are given the same or similar reference numerals. However, it should be noted that the drawings are schematic, such as electric circuit diagrams, and may differ from the actual ones. In addition, the embodiments shown below are examples of devices and methods for embodying technical ideas, and do not specify the materials, shapes, structures, arrangements, etc. of each component part. Various modifications can be made to the present embodiment within the scope of the claims.

[0010] (Embodiment 1) FIG. 1 is an electrical circuit diagram of a power conversion circuit 1 according to the first embodiment. The power conversion circuit 1 is a non-isolated boost converter of a half-bridge. The power conversion circuit 1 includes smoothing capacitors C1, C2, switching elements D1, SW1, an inductor L1, a gate driver G1, and a gate resistor Rg. Since it is a boost converter, the high-side and low-side switching elements D1, SW1 that are connected in series with each other and perform complementary switching operations are connected between output terminals T3 and T4. One end of the inductor L1 is connected to the connection point of the switching elements D1, SW1. The input voltage Vin from the DC power supply 2 is input to the smoothing capacitor C1 from the power input terminals T1 and T2 and smoothed. The high-side terminal of the smoothing capacitor C1 is connected to the other end of the inductor L1. A smoothing capacitor C2 is interposed between the output terminals T3 and T4, and the output voltage Vout is applied to the load 3. The power input terminal T2 on the GND side is connected to the output terminal T4.

[0011] In the example of FIG. 1, the high-side switching element D1 is a diode, and the low-side switching element SW1 is a MOSFET. The insulated gate SW11 of the switching element SW1 is voltage-driven by the gate driver G1. The gate driver G1 supplies a gate current Ig1 through the gate resistor Rg to accumulate charge in the insulated gate SW11. When the gate voltage becomes equal to or higher than a predetermined threshold due to the accumulation of this charge, the switching element SW1 turns ON. When the gate driver G1 stops supplying the gate current Ig1, the stored charge in the gate SW11 disappears, and when the gate voltage becomes lower than the predetermined threshold voltage, the switching element SW1 turns OFF. In the case of synchronous rectification, a MOSFET may be used for the switching element D1. The switching elements SW1, D1 may be IGBTs having a reverse conducting diode. Since it is a boost converter, Vin < Vout, and the diode which is the switching element D1 has its anode on the connection point side and its cathode on the output terminal T3 side, and discharges the rectified current IL2 from the inductor L1 described later.

[0012] In the power conversion circuit 1 as described above, when the switching element SW1 is turned ON, a conduction current IL1 indicated by a solid line flows in the path (loop) of the positive electrode of the DC power supply 2 - inductor L1 - the switching element SW1 on the low side - the negative electrode of the DC power supply 2, and energy is stored in the inductor L1. At this time, when Vin < Vout, the high-side switching element D1 is OFF. On the other hand, when the switching element SW1 is turned OFF, the inductor L1 switches from energy storage to release, and accordingly, the high-side switching element D1 is turned ON. As a result, a rectified current IL2 indicated by a broken line flows in the path (loop) of the inductor L1 - the high-side switching element D1 - the smoothing capacitor C2 and the load 3 - the negative electrode of the DC power supply 2 - the positive electrode of the DC power supply 2 - the inductor L1. A schematic diagram showing the switching states of those conduction current IL1 and rectified current IL2 is as shown in Fig. 2, corresponding to the above-mentioned solid line and broken line respectively. Also, in Fig. 2, when the time axis of the switching portion from the conduction current IL1 to the rectified current IL2 indicated by the reference numeral III is enlarged, it becomes as shown in Fig. 3.

[0013] In the power conversion circuit 1 configured as described above, in the present embodiment, when the switching element SW1 is turned OFF, a special current loop is formed to extract the stored charge of the insulated gate SW11. Fig. 4 is a circuit diagram showing a part of the power conversion circuit 1 schematically shown in Fig. 1 in a form closer to the substrate mounting state. The corresponding parts to Fig. 1 are denoted by the same reference numerals. Here, since the present embodiment is the power conversion circuit 1, a current of a predetermined level (such as when a certain load is driven) flows in the above-mentioned path (loop) of the conduction current IL1 and the path (loop) of the rectified current IL2. For example, it is several tens to several hundreds of A (amperes). Then, magnetic flux is generated around the wiring of those paths (loops) according to Fleming's right-hand rule. The present embodiment utilizes the magnetic flux of the rectified current IL2.

[0014] Specifically, as shown by the dashed line, the rectified current IL2 flows through a path (loop) of inductor L1-high side switching element D1-smoothing capacitor C2 and load 3-negative pole of DC power supply 2-positive pole of DC power supply 2-inductor L1. However, in Fig. 4, the part of input terminal T1-inductor L1-high side switching element D1-output terminal T3 is extracted to show a path (loop) in which the current flows approximately clockwise. Then, according to Fleming's right-hand rule, a magnetic flux B1 is generated inside the path (loop) shown by the shaded area in Fig. 4, which is perpendicular to the paper surface and runs from the front (nearby) side to the back (depth) side of the paper surface.

[0015] Therefore, in this embodiment, a path (loop) of induced current Ig2 that flows in the opposite direction to the gate current Ig1 is formed inside the path (loop) of rectified current IL2. Specifically, induced current Ig2 flows through a path (loop) of return line G11 of gate driver G1-source SW12 of switching element SW1-insulating gate SW11-gate resistor Rg-gate driver G1. Then, a current in the opposite direction to the gate current Ig1 is generated in the loop of induced current Ig2 to generate magnetic flux B2 in the opposite direction to cancel out magnetic flux B1 generated by the loop of rectified current IL2, that is, magnetic flux B2 that flows from the back (depth) side to the front (near) side of the paper.

[0016] As a result, the charge stored in the insulated gate SW11 by the gate current Ig1 flowing through the insulated gate SW11 to turn the switching element SW1 ON is drawn out by the induced current Ig2 flowing from the source SW12 to the insulated gate SW11 when the switching element SW1 is OFF. Therefore, the power conversion circuit 1 of this embodiment can realize a power conversion circuit that can speed up the turn-OFF operation and reduce switching loss by devising a circuit layout without providing a separate configuration.

[0017] However, although a path (loop) for the induced current Ig2 described above is formed, the induced current Ig2 does not easily flow in the path opposite to that of the gate current Ig1. Therefore, a capacitor Cgs is provided to connect the source SW12 of the switching element SW1 and the output terminal of the gate driver G1 at high frequency. This capacitor Cgs is short-circuited instantaneously when the switching element SW1 is turned OFF, and the induced current Ig2 can be increased. This allows the charge stored in the insulating gate SW11 to be quickly extracted, and the turn-OFF operation can be accelerated.

[0018] In this embodiment, a SiC (silicon carbide) MOSFET having a driver source (Kelvin source) terminal SW14 is used for the switching element SW1. Then, the gate coupling capacitance between the driver source terminal SW14 and the insulating gate SW11 functions as the above-mentioned capacitor Cgs, and short-circuits these terminals (SW14, SW11) at high frequency when the induced current Ig2 rises, forming a path (loop) for the induced current Ig2.

[0019] In this way, by using an element with a driver source terminal SW14 as the switching element SW1, the path (loop) of the induced current Ig2 caused by the short circuit in the capacitor Cgs is already formed. Therefore, without providing any special components, the charge stored in the gate SW11 can be quickly extracted and the turn-OFF operation can be speeded up simply by forming a path (loop) of the rectified current IL2 so as to surround the switching element SW1.

[0020] Here, in a switching element such as a MOSFET or an IGBT, it is possible to reduce the resistance value of the gate resistor Rg that controls the gate current Ig from the gate driver G1, so that charge can be accumulated quickly and the switching speed can be increased. In this case, the switching speed is improved by accelerating the turn-on operation. However, if the gate resistor Rg is reduced, the gate-source voltage Vgs does not decrease during the turn-off operation, and there is a risk of false ignition, and the voltage surge of the drain-source voltage Vds increases, resulting in a risk of element destruction. False ignition can be prevented by providing an active Miller clamp circuit, but this still requires the provision of new components, which leads to increased costs and complicated circuits.

[0021] FIG. 5 is a waveform diagram showing the experimental results of the present inventor. In this experiment, a SiCMOSFET having the driver source terminal SW14 is used as the switching element SW1. In FIG. 5, reference characters α1 and α2 indicate the conduction current IL1. Reference character α1 indicates the experimental results of this embodiment in which a path (loop) of the rectified current IL2 is formed so as to surround the switching element SW1, and reference character α2 indicates a reference example in which no special measures are taken for the path of the rectified current IL2. Similarly, reference characters β1 and β2 indicate the voltage Vgs between the insulating gate SW11 and the source SW12, reference character β1 indicates this embodiment, and reference character β2 indicates the reference example. Similarly, reference characters γ1 and γ2 indicate the voltage Vds between the drain SW13 and the source SW12, reference character γ1 indicates this embodiment, and reference character γ2 indicates the reference example.

[0022] In Fig. 5, the horizontal axis indicates time, with one division being 64 ns. The vertical axis indicates current or voltage, with one division indicating 25 A for the conduction current IL1 of reference symbols α1 and α2, 5 V for the gate-source voltage Vgs of reference symbols β1 and β2, and 200 V for the drain-source voltage Vds of reference symbols γ1 and γ2. Thus, in Fig. 5, at the upper limit of the vertical axis, the drain-source voltage Vds is 1200 V, the gate-source voltage Vgs is 30 V, and the conduction current IL1 is 100 A. At the lower limit of the vertical axis, the drain-source voltage Vds is -400 V, the gate-source voltage Vgs is -10 V, and the conduction current IL1 is -100 A.

[0023] The switching frequency in Fig. 5 is practically 0 Hz since it is an experiment. At time t1, the gate driver G1 stops (OFF) injection of the gate current Ig1, and the gate-source voltage Vgs indicated by reference characters β1 and β2 starts to gradually decrease from the previous voltage of about 18 V. Then, the drain-source voltage Vds indicated by reference characters γ1 and γ2, which was 0 V because the switching element SW1 was ON, starts to increase from about time t2. From about time t3, the conduction current IL1 indicated by reference characters α1 and α2 starts to decrease from a state of about 60 A, and the switching element D1 is turned ON and the rectified current IL2 starts to flow.

[0024] Then, at time t4, when the gate-source voltage Vgs indicated by reference characters β1 and β2 becomes less than the ON threshold of the switching element SW1, 7 V, the switching element SW1 turns OFF. Around this time t4, as indicated by reference character (c), the drain-source voltage Vds indicated by reference characters γ1 and γ2 reaches the surge peak.

[0025] However, when the rectified current IL2 starts to flow around time t3, in this embodiment, the induced current Ig2 flows, and the gate-source voltage Vgs indicated by reference symbol β1 quickly drops as indicated by reference symbol (a) due to the discharge of the gate-stored charge. Therefore, the conduction current IL1 indicated by reference symbol α1 also quickly drops. In contrast, in the reference example, the drop in the conduction current IL1 indicated by reference symbol α2, that is, the turn-off of the switching element SW1, is delayed, and an additional conduction current IL1 flows by the amount indicated by reference symbol (b) compared to this embodiment indicated by reference symbol α1. Therefore, it can be understood that in this embodiment, the switching loss can be reduced by the amount indicated by reference symbol (b).

[0026] Also, the gate-source voltage Vgs of the comparative example, indicated by reference character β2, has little ringing caused by the parasitic L and C components, but is slow to fall to 0V, and at the first ringing indicated by reference character (d), it exceeds the threshold voltage and causes false ignition. Therefore, the conduction current IL1 indicated by reference character α2 rises again as indicated by reference character (e), and switching loss worsens further. Therefore, in the comparative example, the above-mentioned Miller clamp circuit is required to suppress power loss due to false ignition. In contrast, the gate-source voltage Vgs of the present embodiment, indicated by reference character β1, has some ringing, but approaches 0V, so no false ignition occurs, and therefore a Miller clamp circuit is not required, and there is no power loss due to false ignition.

[0027] As described above, the power conversion circuit 1 of this embodiment forms a path (loop) of the induced current Ig2 in the path (loop) of the rectified current IL2 that flows when switching is OFF, and the induced current Ig2 generated by coupling between them with magnetic fluxes B1 and B2 draws out the gate-stored charge. Therefore, the power conversion circuit 1 of this embodiment can speed up the turn-OFF operation and reduce switching loss by ingenious circuit layout without providing a separate configuration such as a Miller clamp circuit. In addition, since it is not necessary to reduce the gate resistance Rg, the drain-source voltage Vds remains almost unchanged, as shown by reference characters γ1 and γ2 in FIG. 5, and does not cause undesired element destruction.

[0028] (Embodiment 2) FIG. 6 is an electric circuit diagram of a power conversion circuit 11 according to a second embodiment. This power conversion circuit 11 is a half-bridge non-isolated step-down (BUCK) converter. This power conversion circuit 11 is similar to the above-mentioned power conversion circuit 1, and the same reference numerals are used to indicate corresponding parts. The power conversion circuit 11 includes smoothing capacitors C1 and C2, switching elements D1 and SW1, an inductor L1, a gate driver G1, and a gate resistor Rg. As the power conversion circuit 11 is a step-down (BUCK) converter, an input voltage Vin from a DC power source 2 is input from power supply input terminals T1 and T2 via a smoothing capacitor C1 to high-side and low-side switching elements SW1 and D1 that are connected in series to each other and perform complementary switching operations. One end of an inductor L1 is connected to a connection point of the switching elements SW1 and D1, and the other end of the inductor L1 is connected to a high-side output terminal T3. A smoothing capacitor C2 is interposed between the high-side output terminal T3 and the low-side output terminal T4, and the output voltage Vout is applied to a load 3.

[0029] In the example of Figure 6, the high-side switching element SW1 is a MOSFET, and the low-side switching element D1 is a diode. In the case of a synchronous rectification type, a MOSFET may be used for the switching element D1. The switching elements SW1 and D1 may be IGBTs having reverse conducting diodes. Since this is a step-down (BUCK) converter, Vin>Vout, and the diode that is the switching element D1 has its cathode on the connection point side and its anode on the output terminal T4 (GND) side, passing the rectified current IL2 that returns to the inductor L1 described later.

[0030] When the switching element SW1 is turned on, a conductive current IL1 shown by a solid line flows through a path (loop) of the positive pole of the DC power supply 2-the high-side switching element SW1-inductor L1-smoothing capacitor C2 and the load 3-the negative pole of the DC power supply 2, and energy is stored in the inductor L1. At this time, the low-side switching element D1 is turned off if the cathode potential is greater than the anode potential. In contrast, when the switching element SW1 is turned off, the inductor L1 switches from storing energy to discharging it, and the low-side switching element D1 is turned on accordingly. As a result, a rectified current IL2 shown by a dashed line flows through the path (loop) of the inductor L1-smoothing capacitor C2 and the load 3-the low-side switching element D1-inductor L1. The switching of the conductive current IL1 and the rectified current IL2 is schematic similar to that shown in FIG. 2 described above.

[0031] Fig. 7 is a circuit diagram showing a part of the power conversion circuit 11 shown in Fig. 6 in a form closer to a board mounting state, similar to Fig. 4. Parts corresponding to those in Fig. 6 are given the same reference numerals. In the power conversion circuit 11 configured as described above, in this embodiment, a special current loop is formed to extract the accumulated charge in the insulating gate SW11 when the switching element SW1 is turned OFF.

[0032] Specifically, the rectified current IL2 flows through a path (loop) of inductor L1-smoothing capacitor C2 and load 3-low-side switching element D1-inductor L1, as shown by the dashed line. However, in Fig. 6, the portion of output (GND) terminal T4-low-side switching element D1-inductor L1-high-side output terminal T3 is extracted to show a path (loop) in which the current flows approximately clockwise. Then, according to Fleming's right-hand rule, a magnetic flux B1 is generated inside the path (loop) shown by the shaded area in Fig. 7, which is perpendicular to the paper and runs from the front (nearby) side to the back (depth) side of the paper.

[0033] Therefore, in this embodiment, a path (loop) of the induced current Ig2 that flows in the opposite direction to the gate current Ig1 is formed inside the path (loop) of the rectified current IL2. Specifically, as described above, a MOSFET having a driver source terminal SW14 is used for the switching element SW1, and the gate coupling capacitance between the switching element SW1 and the insulated gate SW11 is made to function as a capacitor Cgs to form a path (loop) of the induced current Ig2. Then, a current in the opposite direction to the gate current Ig1 is generated in the loop of the induced current Ig2 to generate a magnetic flux B2 in the opposite direction, that is, from the back (depth) side to the front (front) side of the paper, relative to the magnetic flux B1 generated by the loop of the rectified current IL2.

[0034] As a result, the charge stored in the insulated gate SW11 by the gate current Ig1 flowing through the insulated gate SW11 to turn the switching element SW1 ON is drawn out by the induced current Ig2 flowing from the driver source terminal SW14 to the gate SW11 when the switching element SW1 is OFF. In this way, even in a non-isolated buck (BUCK) converter, it is possible to realize a power conversion circuit that can speed up the turn-OFF operation and reduce switching losses by ingenious circuit layout without providing a separate configuration such as a Miller clamp circuit.

[0035] (Embodiment 3) 8 is an electric circuit diagram of a power conversion circuit 21 according to a third embodiment. This power conversion circuit 21 is a full-bridge inverter. Therefore, the inductor La is realized by a coil of an external motor that also corresponds to the load 3 described above, and each terminal of the inductor La is connected to output terminals T3 and T4. Output voltages Vout1 and Vout2 that are periodically switched are output to the output terminals T3 and T4.

[0036] Since this power conversion circuit 21 is a full-bridge inverter, high-side and low-side switching elements SWL1, SWL2 and SWR1, SWR2 connected in series with each other are provided in each of the left and right legs between the power supply input terminals T1, T2. The high-side switching elements SWL1, SWR1 and the low-side switching element SWL2 of the left and right legs perform switching operations in a complementary manner, and the left and right legs perform switching operations in a complementary manner.

[0037] Fig. 8 shows both a state in which switching elements SWL1 and SWR2 are ON and a conduction current IL11 flows, and a state in which switching elements SWL1 and SWR2 are OFF and a rectified current IL21 flows, similar to Fig. 1 and Fig. 6. Fig. 9 is a circuit diagram showing a part of the power conversion circuit 21 shown in Fig. 8 in a form closer to a board mounted state, similar to Fig. 4 and Fig. 6.

[0038] When the gate drivers GL1 and GR2 turn on the switching elements SWL1 and SWR2, a conduction current IL11 flows as shown in Fig. 8. When the gate drivers GL1 and GR2 try to turn off the switching elements SWL1 and SWR2, a rectified current IL21 flows as shown in Fig. 8. When the rectified current IL21 flows, magnetic fluxes BL11 and BR12 are generated as shown in Fig. 9, and induced currents IgL21 and IgR22 flow in an attempt to generate countervailing magnetic fluxes BL21 and BR22. These induced currents IgL21 and IgR22 draw out the charges accumulated in the insulating gates SWL11 and SWR21 of the switching elements SWL1 and SWR2 that were turned on, and the switching elements SWL1 and SWR2 are quickly turned off.

[0039] Thereafter, when the switching elements SWL2 and SWR1 are turned ON by the gate drivers GL2 and GR1, a conduction current flows in a path opposite to the rectification current IL21 in Fig. 8. When the gate drivers GL2 and GR1 attempt to turn OFF the switching elements SWL2 and SWR1, a rectification current flows in a path opposite to the conduction current IL11 in Fig. 8.

[0040] In this way, the power conversion circuit 21 of the present embodiment, even though it is a full-bridge inverter, can speed up the turn-OFF operation without providing any additional configuration, similar to the power conversion circuits 1 and 11, which are half-bridge converters described above.

[0041] (Embodiment 4) FIG. 10 is a circuit diagram showing a part of a power conversion circuit 31 according to a fourth embodiment in a state close to a board mounting state. This power conversion circuit 31 is a half-bridge non-isolated boost converter similar to the power conversion circuit 1 shown in FIG. 1 and FIG. 4, and the same reference numerals are used to indicate corresponding parts. In this power conversion circuit 31, the wiring 33 of at least a part of the path from the gate driver G1 to the insulated gate SW11 of one switching element SW1 is arranged along the wiring 32 to the high-side switching element D1, that is, the wiring through which the rectified current IL2 flows. Specifically, in FIG. 10, the wiring 33 does not connect the gate resistor Rg to the insulated gate SW11 by the shortest path, but is made to detour so as to be close to the wiring 32. This makes it possible to obtain an induced current Ig2 without using a capacitor Cgs or the like, and to quickly extract the gate accumulated charge of the insulated gate SW11.

[0042] In the power conversion circuit 31 of the present embodiment, the wirings 32 and 33 are wound multiple times in a multi-level crossing on the substrate. Therefore, the magnetic flux B1 generated by the rectified current IL2 is increased, and the magnetic flux B22 generated by the wiring 33 is also increased, so that the induced current Ig2 can be increased.

[0043] The power conversion circuit according to the present disclosure can be implemented regardless of whether it is insulated, non-insulated, boosted, stepped-down, DC-DC, DC-AC, or AC-DC. In detail, the above-mentioned power conversion circuits 1 and 31 are non-insulated DC-DC BOOST converters, the power conversion circuit 11 is a non-insulated DC-DC BUCK converter, and the power conversion circuit 21 is an inverter (motor driver). In addition to these, the power conversion circuit according to the present disclosure can also be implemented in an LLC converter, a phase shift full bridge converter, a PFC (power factor correction controller), a Totem-Pole Bridgeless PFC, and the like. The substrate of the gate-driven switching element is not limited to the above-mentioned SiC, and may be Si.

[0044] The technical ideas that can be understood from this disclosure are described below. Note that, for the purpose of aiding understanding, and not for the purpose of limiting the scope of the invention, the components described in the appendices are given the reference symbols of the corresponding components in the embodiments. The reference symbols are shown as examples for the purpose of aiding understanding, and the components described in each appendix should not be limited to the components indicated by the reference symbols.

[0045] <Appendix 1> The power conversion circuit (1, 11, 31) described in Appendix 1 includes high-side and low-side switching elements (SW1, D1) connected in series to each other and performing complementary switching operations; An inductor (L1) whose one end is connected to the connection point of the high-side and low-side switching elements (SW1, D1); a gate driver (G1) that voltage-drives an insulating gate (SW11) of one of the high-side and low-side switching elements (SW1, D1); A power conversion circuit (1, 11, 31) performs power conversion by turning on one switching element (SW1) by a gate driver (G1), causing a conduction current (IL1) to flow through an inductor (L1), and storing energy in the inductor (L1), and by turning off the switching element (SW1), discharging the energy of the inductor (L1), thereby generating a rectified current (IL2) through the other switching element (D1), Inside the loop of the rectified current (IL2), a loop of the gate current (Ig1) is formed by the gate driver (G1) driving the insulated gate (SW11) of one of the switching elements (SW1), and in response to the magnetic flux (B1) generated by the rectified current (IL2), a magnetic flux (B2) in the opposite direction generated in the loop of the gate current (Ig1) generates an induced current (Ig2) in the opposite direction to the gate current (Ig1).

[0046] According to the above configuration, one end of the inductor (L1) is connected to the connection point of the high-side and low-side switching elements (SW1, D1) connected in series with each other, and the power conversion circuit in which the two switching elements (SW1, D1) are switched complementarily has the following features. That is, by storing and releasing energy in the inductor (L1) due to switching of the two switching elements (SW1, D1), it is possible to convert the DC power source (2) into a desired power and extract it, or to drive a load (3). Then, when one switching element (SW1) is ON, a conduction current (IL1) flows from the DC power source (2) to the one switching element (SW1) and the inductor (L1), and when it is OFF, a rectified current (IL2) flows from the inductor (L1) via the other switching element (D1).

[0047] If at least one of the switching elements (SW1) is a voltage-driven element with an insulated gate (SW11) such as a MOSFET or IGBT, the switching element (SW1) is turned ON or OFF by the charge stored in the insulated gate (SW11). Since this is a power conversion circuit (1, 11, 31), a predetermined level of current flows through the path (loop) of the conduction current (IL1) and the path (loop) of the rectified current (IL2), and a magnetic flux (B1) is generated around the wiring of these paths (loops).

[0048] Therefore, in the present disclosure, the magnetic flux (B1) due to the rectified current (IL2) is utilized, and a loop of the gate current (Ig1) is formed inside the loop of the rectified current (IL2). Then, for the magnetic flux (B1) generated by the rectified current (IL2), an induced current (Ig2) in the opposite direction to the gate current (Ig1) is generated in the loop of the gate current (Ig1) to generate a magnetic flux (B2) in the opposite direction to cancel the magnetic flux (B1).

[0049] As a result, the charge stored in the insulated gate (SW11) when the switching element (SW1) is ON is drawn off by the induced current (Ig2) that flows from the source (SW12) to the insulated gate (SW11) when the switching element (SW1) is OFF. In this way, a power conversion circuit that can speed up the turn-OFF operation and reduce switching losses can be realized by ingenious circuit layout, without providing a separate configuration such as a Miller clamp circuit.

[0050] <Appendix 2> The power conversion circuit (1, 11, 31) described in Appendix 2 is the power conversion circuit described in Appendix 1, in which a loop of induced current (Ig2) is formed by a capacitor (Cgs) that connects at high frequency the source (SW12) of one switching element (SW1) and the output terminal of the gate driver (G1).

[0051] According to the above configuration, the capacitor (Cgs) is instantaneously short-circuited when one of the switching elements (SW1) is turned OFF, and the induced current (Ig2) can be increased, so that the charge stored in the gate can be quickly extracted and the turn-OFF operation can be accelerated.

[0052] <Appendix 3> The power conversion circuit (1, 11, 31) described in Appendix 3 uses, as the capacitor (Cgs) in the power conversion circuit described in Appendix 2, a gate coupling capacitance formed between the gate terminal (SW11) and the driver source (SW14) terminal of one of the switching elements (SW1).

[0053] According to the above configuration, by using an element with a driver source (SW14) terminal as one of the switching elements (SW1), a loop of the induced current (Ig2) due to a short circuit in the capacitor (Cgs) is already formed. Therefore, without providing any special components, it is possible to easily realize a power conversion circuit that can quickly extract the gate stored charge and speed up the turn-off operation by simply forming a loop of the rectified current (IL2) so as to surround one of the switching elements (SW1).

[0054] <Appendix 4> The power conversion circuit (31) described in Appendix 4 is the power conversion circuit described in Appendix 1, in which at least a portion of a path (33) from the gate driver (G1) to the insulated gate (SW11) of one of the switching elements (SW1) is aligned along a loop (32) of a rectified current (IL2).

[0055] According to the above configuration, even without using a capacitor (Cgs) or the like, an induced current (Ig2) can be obtained and the gate charge stored in the insulated gate (SW11) can be quickly extracted.

[0056] <Appendix 5> The power conversion circuit (31) described in Appendix 5 is the power conversion circuit described in Appendix 4, in which at least a portion of a path (33) from the gate driver (G1) to the insulated gate (SW11) of one of the switching elements (SW1) is wound multiple times within a loop (32) of a rectified current (IL2).

[0057] According to the above configuration, by winding some of the paths (33) multiple times, for example by crossing over the substrate, the induced current (Ig2) can be made larger.

[0058] <Appendix 6> A power conversion circuit (31) according to Supplementary Note 6 is the power conversion circuit according to Supplementary Note 4 or 5, wherein the loop (32) of the rectified current (IL2) is wound a plurality of times.

[0059] According to the above configuration, by winding the loop (32) of the rectified current (IL2) multiple times, for example by crossing it over the substrate, the magnetic flux B1 generated by the rectified current (IL2) becomes larger, and the induced current (Ig2) can be made larger.

[0060] <Appendix 7> A power conversion circuit (1, 11, 31) according to Supplementary Note 7 is the power conversion circuit according to any one of Supplementary Notes 1 to 6, in which one of the switching elements (SW1) is a SiC MOSFET.

[0061] According to the above configuration, SiCMOSFETs are used for high voltage and large current applications, and there is a high risk of destruction due to overshoot of the drain-source voltage Vds, and the switching loss is also large. In order to suppress the overshoot of the drain-source voltage Vds, it is necessary to increase the gate resistance (Rg), but this slows down the turn-off operation.

[0062] Therefore, by applying the present disclosure to such a SiCMOSFET, the charge stored in the gate can be quickly extracted without changing the gate resistance (Rg), i.e., the drain-source voltage Vds, and the turn-OFF operation can be made faster.

[0063] <Appendix 8> The power conversion circuit (1, 31) described in Supplementary Note 8 is a half-bridge non-isolated boost (BOOST) converter in which the other end of the inductor (L1) in the power conversion circuit described in any one of Supplementary Notes 1 to 6 serves as a power supply input terminal (T1) and a desired power is extracted from a smoothing capacitor (C2) connected in parallel to high-side and low-side switching elements (D1, SW1) connected in series with each other.

[0064] According to the above configuration, the half-bridge non-isolated boost converter has a simple current path (loop). Therefore, it is easy and preferable to form the wiring of the path (loop) of the induced current (Ig2) inside the wiring of the path (loop) of the rectified current (IL2) and to form the wiring of these paths (loops) so that the currents flow in the opposite directions.

[0065] <Appendix 9> The power conversion circuit (11) described in Appendix 9 is the power conversion circuit described in any one of Appendixes 1 to 6, in which high-side and low-side switching elements (SW1, D1) are connected to a power source (2), and the power conversion circuit (11) is a half-bridge non-isolated step-down (BUCK) converter that extracts desired power from a smoothing capacitor (C2) connected to the other end of the inductor (L1).

[0066] According to the above configuration, the half-bridge non-isolated buck converter has a simple current path (loop). Therefore, it is easy and preferable to form the wiring of the path (loop) of the induced current (Ig2) inside the wiring of the path (loop) of the rectified current (IL2) and to form the wiring of these paths (loops) so that the currents flow in the opposite directions. [Explanation of symbols]

[0067] 1, 11, 21, 31 Power conversion circuit 2 DC power supply 3. Load 32, 33 Wiring C1, C2 smoothing capacitor D1 Switching element G1, GL1, GL2, GR1, GR2 Gate drivers G11 Return line L1, La inductor Rg Gate resistance SW1, SWL1, SWL2, SWR1, SWR2 switching elements SW11 Insulation gate SW12 Source SW13 Drain SW14 Driver source terminal T1, T2 power input terminals T3, T4 output terminals

Claims

1. high-side and low-side switching elements connected in series to each other and performing complementary switching operations; an inductor having one end connected to a connection point of the high-side and low-side switching elements; a gate driver that voltage-drives an insulating gate of one of the high-side and low-side switching elements; a power conversion circuit that performs power conversion by turning on one of the switching elements by the gate driver, causing a conduction current to flow through the inductor and storing energy in the inductor, and by turning off the one of the switching elements, causing the inductor to release energy and generate a rectified current via the other switching element, a gate current loop in which the gate driver drives the insulated gate of the one of the switching elements is formed inside the rectified current loop, and a magnetic flux in a reverse direction generated in the gate current loop with respect to a magnetic flux generated by the rectified current generates an induced current in a reverse direction to the gate current; Power conversion circuits.

2. 2. The power conversion circuit according to claim 1, wherein a loop of the induced current is formed by a capacitor that connects the source of the one switching element and the output end of the gate driver at high frequency.

3. 3. The power conversion circuit according to claim 2, wherein the capacitor is a gate coupling capacitance formed between a gate terminal and a driver source terminal of the one of the switching elements.

4. The power conversion circuit according to claim 1 , wherein at least a portion of a path from the gate driver to the insulated gate of the one switching element is arranged along a loop of the rectified current.

5. The power conversion circuit according to claim 4 , wherein at least a portion of a path from the gate driver to the insulated gate of the one switching element is wound multiple times within the loop of the rectified current.

6. The power conversion circuit of claim 5 , wherein the rectified current loop has multiple turns.

7. The power conversion circuit according to any one of claims 1 to 6, wherein the one switching element is a SiC MOSFET.

8. The power conversion circuit according to any one of claims 1 to 6, wherein the other end of the inductor serves as a power supply input end, and the power conversion circuit is a half-bridge non-isolated boost converter that extracts desired power from a smoothing capacitor connected in parallel to the high-side and low-side switching elements that are connected in series with each other.

9. The power conversion circuit according to any one of claims 1 to 6, wherein the high-side and low-side switching elements are connected to a power supply, and the high-side and low-side switching elements are a half-bridge non-isolated step-down converter that extracts desired power from a smoothing capacitor connected to the other end of the inductor.

Citation Information

Patent Citations

  • Gate circuit and semiconductor unit including the circuit

    JP1993235741A