Manufacturing method, crystal, laminate structure, semiconductor device, electronic apparatus, and system
Patent Information
- Application Number
- JP2023149504
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-09-14
- Publication Date
- 2025-03-27
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Figure 2025042467000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a crystal and a layered structure useful for a semiconductor device. [Background technology]
[0002] Ga2O3 has been attracting attention as a promising ultra-wide bandgap (UWBG) semiconductor for future power electronics devices.
[0003] However, Ga2O3 has the problem that it is difficult to fabricate a P-type semiconductor, and it is not easy to make it inexpensive, so there are still many challenges to overcome before it can be widely used. In recent years, rutile germanium dioxide (r-GeO2) has been studied as a new UWBG semiconductor (band gap 4.44-4.68 eV). Rutile germanium dioxide can be made into n-type and p-type semiconductors and can be produced inexpensively, so it is expected to be a UWBG semiconductor to replace Ga2O3. For example, a laminated structure in which an r-GeO2 crystal film is laminated on an r-TiO2 (001) substrate is being studied (Non-Patent Document 1, Patent Document 1). However, Non-Patent Document 2 was submitted as an Erratum after the peer review of Non-Patent Document 1 (Non-Patent Document 2), and it was found that the crystal grains (abnormal grains) described in Non-Patent Document 1 and Patent Document 1 were rutile germanium dioxide crystals, and the other parts were amorphous phases. That is, the amorphous phase was formed in most parts, and even if a crystal phase was formed, the crystal grains were only formed in a part. Therefore, a method for producing a large-area crystal on a substrate surface has been eagerly awaited. [Prior art documents] [Non-patent literature]
[0004] [Non-Patent Document 1] Takane, K. Kaneko, “Establishment of a growth route of crystallized rutile GeO2 thin film (≧ 1 mm / h) and its structural properties” Applied Physics Letters Vol.119, pp.062104(1-6) (2021). [Non-Patent Document 2] Takane, K. Kaneko, Erratum: “Establishment of a growth route of crystallized rutile GeO2 thin film (≧1 μm / h) and its structural properties” Applied Physics Letters Vol.120, 099903(1-3) (2022). [Patent documents]
[0005] [Patent Document 1] International Publication No. 2023 / 008454 Summary of the Invention [Problem to be solved by the invention]
[0006] An object of the present invention is to provide a crystal having excellent crystallinity that is useful for semiconductor devices and the like. [Means for solving the problem]
[0007] As a result of intensive research into achieving the above-mentioned object, the inventors have found that a crystal obtained by a manufacturing method for a crystal, which includes a film formation step of supplying a raw material onto a crystal substrate and forming a film containing a crystal mainly composed of GeO2 and an amorphous phase on the crystal substrate directly or via another layer, and which includes a regrowth step of removing the amorphous phase in the film and then supplying the raw material again to the crystal to regrow the crystal, has excellent crystallinity, etc., and is useful for semiconductor devices, etc., and have found that such a crystal can solve the above-mentioned conventional problems in one fell swoop. After obtaining the above findings, the present inventors conducted further studies and completed the present invention.
[0008] That is, the present invention relates to the following inventions. [1] A method for producing a crystal, comprising a film-forming step of supplying a raw material onto a crystal substrate and forming a film containing a crystal mainly composed of GeO2 and an amorphous phase on the crystal substrate directly or via another layer, the method comprising a regrowth step of removing the amorphous phase in the film, and then re-supplying the raw material to the crystal and re-growing the crystal. [2] The method according to [1] above, wherein the crystals have a tetragonal crystal structure. [3] The regrowth step grows the crystal to a size of 100 μm. 2 The manufacturing method according to [1] above, wherein the surface area is regrowth to an area equal to or larger than this. [4] The manufacturing method according to [1] above, wherein the raw material is in a mist or gaseous state. [5] The method according to [1] above, wherein the raw material is a mist or gas containing Ge. [6] The method according to [1] above, wherein the removal of the amorphous phase is carried out using a liquid containing water. [7] The method according to [1] above, wherein the removal of the amorphous phase is carried out using a solution having a pH of 8 or less. [8] The method according to [1] above, wherein the removal of the amorphous phase is carried out under ultrasonic irradiation. [9] The method according to [1], wherein the regrowth is carried out at a temperature of 500°C to 900°C.
[10] A crystal obtained by the production method described in any one of [1] to
[10] above.
[11] A laminated structure in which a crystal is laminated on a crystal substrate directly or via another layer, the crystal being the crystal described in
[10] above.
[12] A semiconductor device including a crystal or a laminated structure, wherein the crystal is the crystal described in
[10] above, and the laminated structure is the laminated structure described in
[11] above.
[13] The semiconductor device according to
[12] above, which is a power device.
[14] The semiconductor device according to
[12] , which is a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT) or a light emitting diode (LED).
[15] An electronic device including a semiconductor device, characterized in that the semiconductor device is the semiconductor device described in
[12] above.
[16] A system including an electronic device, characterized in that the electronic device is the electronic device described in
[15] above. Effect of the Invention
[0009] The manufacturing method of the present invention is useful for semiconductor devices and the like, and produces crystals with excellent crystallinity. [Brief description of the drawings]
[0010] [Figure 1] FIG. 1 is a schematic diagram showing an example of a film-forming apparatus that can be suitably used in the present invention. [Diagram 2] FIG. 2 is a diagram showing the results of XRD analysis in Example 1. [Diagram 3] FIG. 2 is a diagram showing an SEM image in Example 1. [Figure 4] FIG. 2 is a diagram showing an EDS image in Example 1. [Diagram 5]FIG. 2 is a diagram showing the results of XRD analysis in Reference Example 1. [Figure 6] FIG. 2 is a diagram showing an SEM image in Reference Example 1. [Figure 7] FIG. 1 is a diagram showing an EDS image in Reference Example 1. [Figure 8] FIG. 1 is a diagram illustrating a preferred example of a Schottky barrier diode (SBD) according to the present invention. [Figure 9] 1 is a diagram illustrating a preferred example of a high electron mobility transistor (HEMT) of the present invention. [Figure 10] FIG. 1 is a diagram showing a schematic diagram of a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) of the present invention. [Figure 11] FIG. 1 is a diagram illustrating a preferred example of a junction field effect transistor (JFET) of the present invention. [Figure 12] 1 is a diagram illustrating a preferred example of an insulated gate bipolar transistor (IGBT) according to the present invention; [Figure 13] FIG. 1 is a diagram showing a schematic diagram of a preferred example of a light-emitting element (LED) of the present invention. [Figure 14] FIG. 1 is a diagram illustrating a preferred example of a junction barrier Schottky diode (JBS) of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] The manufacturing method of the present invention is a method of manufacturing a crystal, which includes a film-forming step of supplying a raw material onto a crystal substrate and forming a film containing a crystal mainly composed of GeO2 and an amorphous phase on the crystal substrate directly or via another layer, and is characterized by including a regrowth step of re-supplying the raw material to the crystal after removing the amorphous phase in the film and re-growing the crystal. In the present invention, the means used in each step are not particularly limited as long as they do not impede the object of the present invention, and may be known means. In the present invention, the crystal preferably has one or more crystal structures selected from orthorhombic, tetragonal, and trigonal, and more preferably has a tetragonal crystal structure. Such a preferable crystal can be obtained by appropriately adjusting the crystal structure of the crystal substrate, and according to such a preferable range, the semiconductor characteristics can be made more excellent. In addition, the regrowth step is performed by growing the crystal to a size of 100 μm. 2 It is preferable to grow the amorphous phase again to an area of 100 kHz or more. According to such a preferred range, the semiconductor device can be manufactured more industrially advantageously. The raw material is preferably in the form of mist or gas, and more preferably the raw material is mist or gas containing Ge. The amorphous phase is preferably removed using a liquid containing water, and it is also preferable to remove the amorphous phase using a solution having a pH of 8 or less. According to such a preferred range, the amorphous phase can be removed more efficiently and uniformly. The amorphous phase is preferably removed under ultrasonic irradiation, and preferably under ultrasonic irradiation of 100 kHz or more. According to such a preferred range, the amorphous phase can be removed more efficiently. The regrowth is preferably performed at 500°C to 900°C. According to such a preferred range, the regrowth can be performed more efficiently, and the crystallinity of the regrown crystal can be improved.
[0012] The laminated structure of the present invention is characterized in that the crystal is laminated on a crystal substrate via another layer. A "laminated structure" is a structure including one or more crystal layers, and may include layers other than the crystal layer (e.g., an amorphous layer). The crystal layer is preferably a single crystal layer, but may be a polycrystalline layer.
[0013] The crystal substrate is not particularly limited as long as it does not impede the object of the present invention, and may be a known substrate. It may be an insulating substrate, a conductive substrate, a semiconductor substrate, a single crystal substrate, or a polycrystalline substrate. The crystal substrate may be a substrate having a metal film on its surface. In addition, when the crystal substrate is a conductive substrate, a vertical device can be fabricated without removing the substrate. The crystal structure of the crystal substrate is also not particularly limited as long as it does not impede the object of the present invention. Examples of the crystal structure of the crystal substrate include a hexagonal crystal structure, a cubic crystal structure, and a tetragonal crystal structure. Examples of the crystal substrate having a hexagonal crystal structure include a GaN substrate, a SiC substrate, or a sapphire substrate (such as an A-plane sapphire, a c-plane sapphire, an M-plane sapphire, and an R-plane sapphire substrate). Examples of the crystal substrate having a tetragonal crystal structure include a GeO2 substrate, a SrTiO3 substrate, a TiO2 substrate, or an MgF2 substrate. Examples of the crystal substrate having a cubic crystal structure include a Si substrate or a SiC substrate. The crystal substrate may have an off-angle, specifically, for example, from 0.1° to 10°, etc. The laminated structure thus obtained is also included in the present invention.
[0014] In the present invention, the film may be formed directly on the substrate, or other layers such as a layer different from the oxide semiconductor (e.g., an n-type semiconductor layer, an n+ type semiconductor layer, an n- type semiconductor layer, etc.), an insulator layer (including a semi-insulator layer), a buffer layer, etc. may be laminated on the substrate, and then the film may be formed on the substrate via the other layers. In particular, a buffer layer can be suitably used to reduce the lattice constant difference between the crystal substrate and the oxide crystal. Examples of materials constituting the buffer layer include SnO2, TiO2, VO2, MnO2, RuO2, CsO2, IrO2, GeO2, CuO2, PbO2, AgO2, CrO2, SiO2, SiC, GaN, and mixed crystals thereof.
[0015] The crystal may be formed using a known film forming apparatus such as a mist CVD film forming apparatus. The film forming apparatus may also be used to perform doping as appropriate. The doped crystal can be suitably used as a semiconductor film or semiconductor layer, and an n-type dopant or a p-type dopant can be applied to conventional doping means in oxide semiconductors. Examples of the n-type dopant include antimony (Sb), arsenic (As), bismuth (Bi), phosphorus (P), fluorine (F), niobium (Nb), vanadium (V), tantalum (Ta), or tungsten (W). Examples of the p-type dopant include aluminum (Al), gallium (Ga), or indium (In). The laminated structure thus obtained is also included in the present invention.
[0016] The crystals are used as they are or after being subjected to known processing means such as substrate peeling, for example, by known means, for semiconductor devices. Examples of the semiconductor devices include Schottky barrier diodes (SBDs), junction barrier Schottky diodes (JBSs), high electron mobility transistors (HEMTs), metal oxide semiconductor field effect transistors (MOSFETs), junction field effect transistors (JFETs), insulated gate bipolar transistors (IGBTs), and light emitting diodes (LEDs). The semiconductor devices may be modules equipped with these semiconductor devices, and electronic devices and parts thereof equipped with these semiconductor devices, and are useful for various applications, and are particularly preferably applied to power devices. The semiconductor devices can be classified into horizontal elements (horizontal devices) in which an electrode is formed on one side of a semiconductor layer, and vertical elements (vertical devices) in which electrodes are formed on both the front and back sides of a semiconductor layer, and in the present invention, the semiconductor devices can be suitably used for both horizontal and vertical devices.
[0017] Examples of semiconductor devices suitable for use in the present invention will be described in more detail below with reference to the drawings, but the present invention is not limited to these examples. Note that the following are suitable examples in which the crystal layer containing GeO2 as a main component in the crystal or the laminated structure is used as a semiconductor layer.
[0018] 8 shows a preferred example of a Schottky barrier diode (SBD) including an n-type semiconductor layer 101a, an n+ type semiconductor layer 101b, a p-type semiconductor layer 102, a metal layer 103, an insulator layer 104, a Schottky electrode 105a, and an ohmic electrode 105b. The metal layer 103 is made of a metal such as Al, and covers the Schottky electrode 105a.
[0019] FIG. 9 shows a preferred example of a high electron mobility transistor (HEMT) including an n-type semiconductor layer 121a having a wide bandgap, an n-type semiconductor layer 121b having a narrow bandgap, an n+-type semiconductor layer 121c, a p-type semiconductor layer 123, a gate electrode 125a, a source electrode 125b, a drain electrode 125c, and a substrate 129.
[0020] 10 shows a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) including an n-type semiconductor layer 131a, a first n+ type semiconductor layer 131b, a second n+ type semiconductor layer 131c, a p-type semiconductor layer 132, a p+ type semiconductor layer 132a, a gate insulating film 134, a gate electrode 135a, a source electrode 135b, and a drain electrode 135c. The p+ type semiconductor layer 132a may be a p-type semiconductor layer or may be the same as the p-type semiconductor layer 132.
[0021] FIG. 11 shows a preferred example of a junction field effect transistor (JFET) including an n-type semiconductor layer 141a, a first n+ type semiconductor layer 141b, a second n+ type semiconductor layer 141c, a p-type semiconductor layer 142, a gate electrode 145a, a source electrode 145b and a drain electrode 145c.
[0022] FIG. 12 shows a preferred example of an insulated gate bipolar transistor (IGBT) including an n-type semiconductor layer 151, an n-type semiconductor layer 151a, an n+ type semiconductor layer 151b, a p-type semiconductor layer 152, a gate insulating film 154, a gate electrode 155a, an emitter electrode 155b, and a collector electrode 155c.
[0023] (LED) An example of the semiconductor device of the present invention being a light emitting diode (LED) is shown in Fig. 13. The semiconductor light emitting device of Fig. 13 includes an n-type semiconductor layer 161 on a second electrode 165b, and a light emitting layer 163 is laminated on the n-type semiconductor layer 161. A p-type semiconductor layer 162 is laminated on the light emitting layer 163. A light-transmitting electrode 167 that transmits light generated by the light emitting layer 163 is provided on the p-type semiconductor layer 162, and a first electrode 165a is laminated on the light-transmitting electrode 167. The semiconductor light emitting device of Fig. 13 may be covered with a protective layer except for the electrode portion.
[0024] Examples of materials for the translucent electrode include conductive oxide materials containing indium (In) or titanium (Ti). More specifically, examples include In2O3, ZnO, SnO2, Ga2O3, TiO2, CeO2, or mixed crystals of two or more of these, or doped materials thereof. The translucent electrode can be formed by providing these materials by a known means such as sputtering. After the translucent electrode is formed, thermal annealing may be performed to make the translucent electrode transparent.
[0025] In the semiconductor light-emitting element of FIG. 13, the first electrode 165a is a positive electrode and the second electrode 165b is a negative electrode, and by passing a current through both of them to the p-type semiconductor layer 162, the light-emitting layer 163, and the n-type semiconductor layer 161, the light-emitting layer 163 emits light.
[0026] Examples of materials for the first electrode 165a and the second electrode 165b include metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, Ag, or the like, or alloys thereof, metal oxide conductive films such as tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), indium zinc oxide (IZO), or the like, organic conductive compounds such as polyaniline, polythiophene, or polypyrrole, or mixtures thereof, etc. The method for forming the electrode film is not particularly limited, and the electrode can be formed on the substrate according to a method appropriately selected from wet methods such as printing, spraying, and coating, physical methods such as vacuum deposition, sputtering, and ion plating, and chemical methods such as CVD and plasma CVD, etc., taking into consideration the suitability of the material.
[0027] FIG. 14 shows a main part of a junction barrier Schottky diode (JBS) which is one of the preferred embodiments of the present invention. The JBS in FIG. 14 includes an ohmic electrode 1020, an n-type semiconductor layer 1010a, an n+ type semiconductor layer 1010b, a Schottky electrode 1030, and an electric field relaxation region 1060. The Schottky electrode 1030 includes a metal layer 1030a, a metal layer 1030b, and a metal layer 1030c. In the semiconductor device in FIG. 14, the outer end of the metal layer 1030a and / or the metal layer 1030b as the second electrode layer is located outside the outer end of the metal layer 1030c as the first electrode layer. In the semiconductor device in FIG. 14, the region of the electric field relaxation region 1060 includes at least two electric field relaxation regions 1060 in a plane including at least a part of the portion of the second electrode layer located outside the outer end of the first electrode layer, and the outer end of the second electrode. In the semiconductor device of FIG. 14, the electric field relaxation region 1060 is made of a p-type semiconductor, and forms a PN junction with the n-type semiconductor layer 1010a.
[0028] 14 may be formed by any known means without any particular limitation as long as it does not impede the object of the present invention, for example, by forming a film by vacuum deposition, CVD, sputtering, or various coating techniques, followed by patterning by photolithography, or by directly patterning using a printing technique. EXAMPLES
[0029] Example 1 1 is a diagram showing an example of a preferred embodiment of a film forming apparatus when the atomizing device of the present invention is used as a film forming atomizing stage. The film forming apparatus 19 is composed of a film forming sample 20, a sample stage 21, a carrier gas source 22a, a carrier gas source 22b, a flow rate control valve 23a, a flow rate control valve 23b, a film forming chamber 27, a heater 28, and an atomizing device 30. The atomizing device 30 is composed of a raw material partition wall 24, a raw material liquid to be atomized 24a, an ultrasonic transmission base material 24b, a stage 24c, an ultrasonic transducer 26, an ultrasonic transmission liquid tank 35, and an ultrasonic transmission liquid 36.
[0030] Next, a TiO2 (001) substrate having a tetragonal rutile structure, a square shape with sides of 10 mm and an average thickness of 500 nm, was placed on the sample stage 21 as the film-forming sample 20, and the heater 28 was operated to raise the temperature in the film-forming chamber 27 to 750°C. Next, the flow rate control valve 23 was opened to supply carrier gas from the carrier gas source 22 into the film-forming chamber 27, and after the atmosphere in the film-forming chamber 27 was sufficiently replaced with the carrier gas, the flow rate of the carrier gas was adjusted to 3 L / min. Oxygen gas was used as the carrier gas.
[0031] Next, the ultrasonic vibrator 26 was vibrated at 2.4 MHz, and the vibration was propagated to the raw material solution 24a through the ultrasonic transmitter 25a, thereby atomizing the raw material solution 24a to generate raw material fine particles. The raw material fine particles were introduced into the film formation chamber 27 by the carrier gas, reacted in the film formation chamber 27, and a film containing a crystal phase and an amorphous phase of GeO2 having a tetragonal rutile structure was formed on the film formation sample 20 by a CVD reaction on the film formation surface of the film formation sample 20.
[0032] Next, the amorphous phase was removed by immersing the substrate in ultrapure water for 3 minutes and applying ultrasonic vibration (100 kHz). After removing the amorphous phase, the substrate with the film containing GeO2 crystals was placed on the sample stage 21 again, the heater 28 was operated to raise the temperature in the film formation chamber 27 to 750°C, the raw material 24a was supplied to the substrate with the film containing GeO2 crystals, and a tetragonal rutile structure GeO2 crystal film was grown again. The film thickness after the regrowth was 1.7 μm.
[0033] The obtained crystalline film was measured using an X-ray diffraction apparatus. The XRD analysis results are shown in Figure 2. As is clear from Figure 2, the obtained crystalline film was a GeO2 crystalline film with a (002) oriented tetragonal rutile structure and good crystallinity.
[0034] The surface of the obtained crystal film was observed using SEM. Figure 3 shows an SEM image. As is clear from Figure 3, GeO2 crystals were formed with excellent surface smoothness and good crystallinity over a large area. The surface of the obtained crystal film was also evaluated using EDS, and as shown in Figure 4, the crystal film was found to be 100 μm thick over the entire surface. 2 It was found that the above-mentioned formation area was formed.
[0035] (Reference example 1) In Example 1, the film surface before the amorphous phase was removed was evaluated. The film before the amorphous phase was removed was measured using an XRD diffractometer. The results are shown in Figure 5. Figure 5 shows that the crystallinity is poor. In addition, the film surface after the amorphous phase was removed was observed using SEM. The SEM image is shown in Figure 6. As is clear from Figure 6, crystal grains were only partially formed. In addition, when the film surface after the amorphous phase was removed was evaluated using EDS, it was found that GeO2 crystals were partially formed on the surface, as shown in Figure 7. [Industrial Applicability]
[0036] The manufacturing method of the present invention is used, for example, in manufacturing crystals suitable for use in semiconductor devices. [Explanation of symbols]
[0037] 19 Film forming equipment 20 Film sample 21 Sample stage 22a Carrier gas source 22b Dilution gas source 23a Flow control valve 23b Flow control valve 24 Raw material bulkhead 24a Raw material liquid for atomization 24b Ultrasonic transparent base material 24c units 26 Ultrasonic transducer 27 Film forming room 28 Heater 30 Atomization device 35 Ultrasonic transmission fluid tank 36 Ultrasonic transmission fluid 37 Film forming room 101a n-type semiconductor layer 101b n+ type semiconductor layer 102 p-type semiconductor layer 103 Metal layer 104 Insulator Layer 105a Schottky electrode 105b Ohmic electrode 111a n-type semiconductor layer 111b n+ type semiconductor layer 114 Semi-insulating layer 115a Gate electrode 115b Source electrode 115c Drain electrode 118 Buffer layer 121a Wide band gap n-type semiconductor layer 121b Narrow band gap n-type semiconductor layer 121c n+ type semiconductor layer 123 p-type semiconductor layer 124 Semi-insulating layer 125a Gate electrode 125b Source electrode 125c Drain electrode 128 Buffer layer 129 Board 131a n-type semiconductor layer 131b First n+ type semiconductor layer 131c second n+ type semiconductor layer 132 p-type semiconductor layer 134 Gate insulating film 135a Gate electrode 135b Source electrode 135c Drain electrode 138 Buffer layer 139 Semi-insulating layer 141a n-type semiconductor layer 141b First n+ type semiconductor layer 141c second n+ type semiconductor layer 142 p-type semiconductor layer 145a Gate electrode 145b Source electrode 145c Drain electrode 151 n-type semiconductor layer 151a n-type semiconductor layer 151b n+ type semiconductor layer 152 p-type semiconductor layer 154 Gate insulating film 155a Gate electrode 155b Emitter electrode 155c Collector electrode 161 n-type semiconductor layer 162 p-type semiconductor layer 163 Light-emitting layer 165a First electrode 165b Second electrode 167 Translucent electrode 169 Substrate 1010a n-type semiconductor 1010b n+ type semiconductor 1020 Ohmic electrode 1030 Schottky electrode 1030a metal layer 1030b metal layer 1030c metal layer 1060 Electrolytic relaxation region
Claims
1. A raw material is supplied onto a crystal substrate, and GeO is deposited on the crystal substrate directly or through another layer. 2 A method for producing a crystal, comprising a film-forming step of forming a film containing a crystal containing as a main component thereof and an amorphous phase, the method comprising a regrowth step of re-supplying the raw material to the crystal after removing the amorphous phase in the film, and re-growing the crystal.
2. The method according to claim 1, wherein the crystal has a tetragonal crystal structure.
3. The regrowth step grows the crystal to a thickness of 100 μm. 2 2. The method according to claim 1, wherein the silicon substrate is regrowthed to an area of at least 100 nm.
4. The method according to claim 1, wherein the raw material is in the form of a mist or gas.
5. 2. The method according to claim 1, wherein the raw material is a mist or gas containing Ge.
6. The method according to claim 1 , wherein the amorphous phase is removed using a liquid containing water.
7. 2. The method according to claim 1, wherein the amorphous phase is removed using a solution having a pH of 8 or less.
8. 2. The method according to claim 1, wherein the removal of the amorphous phase is carried out under ultrasonic irradiation.
9. 2. The method of claim 1, wherein the regrowth is performed at a temperature of 500 to 900.degree.
10. A crystal obtained by the method according to any one of claims 1 to 9.
11. A laminated structure in which a crystal is laminated directly or via another layer on a crystal substrate, the crystal being the crystal according to claim 10.
12. 12. A semiconductor device including a crystal or a laminated structure, wherein the crystal is the crystal according to claim 10, and the laminated structure is the laminated structure according to claim 11.
13. 13. The semiconductor device according to claim 12, which is a power device.
14. 13. The semiconductor device according to claim 12, which is a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT), or a light emitting diode (LED).
15. 13. An electronic device including a semiconductor device, the semiconductor device being the semiconductor device according to claim 12.
16. A system including an electronic device, the electronic device being the electronic device according to claim 15.
Citation Information
Patent Citations
Crystalline oxide film and semiconductor device
WO2023008454A1