Semiconductor device and system
Patent Information
- Application Number
- JP2023149519
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-09-14
- Publication Date
- 2025-03-27
AI Technical Summary
【0009】 本発明の半導体装置は、GeO2系半導体装置であり、電気的特性に優れている。
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Figure 2025042474000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a semiconductor device useful as a power device or the like, and a system thereof. [Background technology]
[0002] Ga2O3 has been attracting attention as a promising ultra-wide bandgap (UWBG) semiconductor for future power electronics devices.
[0003] However, Ga2O3 has the problem that it is difficult to fabricate a P-type semiconductor, and it is not easy to make it inexpensive, so there are still many challenges to overcome before it can be widely used. In recent years, rutile germanium dioxide (r-GeO2) has been studied as a new UWBG semiconductor (band gap 4.44-4.68 eV). Rutile germanium dioxide can be made into n-type and p-type semiconductors and can be produced inexpensively, so it is expected to be a UWBG semiconductor to replace Ga2O3. For example, a laminated structure in which an r-GeO2 crystal film is laminated on an r-TiO2 (001) substrate is being studied (Non-Patent Document 1, Patent Document 1). However, Non-Patent Document 2 was submitted as an Erratum after the peer review of Non-Patent Document 1 (Non-Patent Document 2), and it was found that the crystal grains (abnormal grains) described in Non-Patent Document 1 and Patent Document 1 were rutile germanium dioxide crystals, and the other parts were amorphous phases. That is, the amorphous phase was formed in most parts, and even if a crystal phase was formed, the crystal grains were only formed in a part. For example, even if a prototype SBD was fabricated, this could result in problems such as poor electrical properties such as mobility, and there was a strong desire for a method to manufacture crystals suitable for semiconductor use. [Prior art documents] [Non-patent literature]
[0004] [Non-Patent Document 1] Takane, K. Kaneko, “Establishment of a growth route of crystallized rutile GeO2 thin film (≧ 1 mm / h) and its structural properties” Applied Physics Letters Vol.119, pp.062104(1-6) (2021). [Non-Patent Document 2] Takane, K. Kaneko, Erratum: “Establishment of a growth route of crystallized rutile GeO2 thin film (≧1 μm / h) and its structural properties” Applied Physics Letters Vol.120, 099903(1-3) (2022). [Patent documents]
[0005] [Patent Document 1] International Publication No. 2023 / 008454 Summary of the Invention [Problem to be solved by the invention]
[0006] An object of the present invention is to provide a GeO2-based semiconductor device having excellent electrical characteristics. [Means for solving the problem]
[0007] As a result of intensive research into achieving the above-mentioned object, the inventors newly developed a mist CVD apparatus using a guide partition, and discovered that when a crystalline film containing GeO2 as a main component is deposited using the mist CVD apparatus using the guide partition, a high-quality crystalline film can be formed over the entire surface of a 10 mm square substrate, and that a semiconductor device using the obtained crystalline film has excellent electrical properties, and found that such a semiconductor device can solve the above-mentioned conventional problems in one fell swoop. After obtaining the above findings, the present inventors conducted further studies and completed the present invention.
[0008] That is, the present invention relates to the following inventions. [1] A semiconductor device including at least a semiconductor layer and a Schottky electrode that is in Schottky junction with the semiconductor layer, the semiconductor layer being made of crystals mainly composed of an oxide semiconductor having a rutile structure, the oxide semiconductor containing germanium, and a mobility of 10 cm 2 / Vs or more. [2] The carrier density of the oxide semiconductor is 1×10 18 / cm 3 The semiconductor device according to [1] above. [3] The semiconductor device according to [1], wherein the oxide semiconductor further contains tin and / or silicon. [4] The semiconductor device according to [3], wherein the oxide semiconductor contains the germanium with respect to the tin and / or silicon in an atomic ratio of 1 or more. [5] The mobility is 20 cm 2 / Vs or more. [6] The semiconductor device according to [1], wherein the semiconductor layer is in the form of a film or a plate. [7] The semiconductor layer is 100 μm 2 The semiconductor device according to [6] above, having an area of at least 100%. [8] The semiconductor device according to [1], wherein the Schottky electrode contains a metal of Group 10 and / or Group 11 of the periodic table. [9] The semiconductor device according to [1], further comprising an ohmic electrode, the ohmic electrode containing a metal of Group 4 and / or Group 11 of the periodic table.
[10] The semiconductor device according to [1], which is a power device.
[11] A semiconductor system including the semiconductor device according to [1]. Effect of the Invention
[0009] The semiconductor device of the present invention is a GeO2-based semiconductor device and has excellent electrical characteristics. [Brief description of the drawings]
[0010] [Figure 1] FIG. 1 is a schematic diagram showing an example of a film-forming apparatus that can be suitably used in the present invention. [Diagram 2] FIG. 1 is a schematic diagram showing an atomizing device preferably used in the present invention. [Diagram 3] FIG. 2 is a diagram showing the results of XRD diffraction in Example 1. [Figure 4] FIG. 2 is a diagram showing an EDS image in Example 1. [Diagram 5] FIG. 2 is a diagram showing an SEM image in Example 1. [Figure 6] FIG. 1 shows the results of IV measurement in Example 1. [Figure 7] FIG. 13 is a diagram showing the results of IV measurement in Example 2. [Figure 8] FIG. 1 is a diagram illustrating a preferred example of a Schottky barrier diode (SBD) according to the present invention. [Figure 9] 1 is a diagram illustrating a preferred example of a high electron mobility transistor (HEMT) of the present invention. [Figure 10] FIG. 1 is a diagram showing a schematic diagram of a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) of the present invention. [Figure 11] FIG. 1 is a diagram illustrating a preferred example of a junction field effect transistor (JFET) of the present invention. [Figure 12] 1 is a diagram illustrating a preferred example of an insulated gate bipolar transistor (IGBT) according to the present invention; [Figure 13] FIG. 1 is a diagram showing a schematic diagram of a preferred example of a light-emitting element (LED) of the present invention. [Figure 14] FIG. 1 is a diagram illustrating a preferred example of a junction barrier Schottky diode (JBS) of the present invention. [Figure 15] FIG. 2 is a diagram illustrating a schematic diagram of another preferred example of a Schottky barrier diode (SBD) according to the present invention. [Figure 16] FIG. 2 is a diagram showing a preferred example of an enlarged cross-sectional view of the atomization device in the first embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] The present invention relates to a semiconductor device including at least a semiconductor layer and a Schottky electrode that is in Schottky junction with the semiconductor layer, the semiconductor layer being made of crystals mainly composed of an oxide semiconductor having a rutile structure, the oxide semiconductor containing germanium, and a mobility of 10 cm 2 In the present invention, the mobility of the oxide semiconductor is 20 cm 2 / Vs or more, and the carrier density is preferably 1×10 18 / cm 3 or more. According to such a preferred range, the semiconductor properties can be improved more easily. According to the present invention, it is preferable that the oxide semiconductor further contains tin and / or silicon, and it is more preferable that the oxide semiconductor contains the germanium at an atomic ratio of 1 or more to the tin and / or silicon. According to such a preferred range, the interface with the electrode can be more easily and more favorably formed, and for example, a Schottky junction can be more easily formed. According to the present invention, it is preferable that the crystal is in the form of a film or a plate, and the crystal size is 100 μm or more. 2 It is more preferable that the area is equal to or more than 100 nm. According to such a preferable range, the semiconductor device can be manufactured more industrially advantageously. In addition, in the present invention, it is preferable that the Schottky electrode contains a metal of Group 10 and / or Group 11 of the periodic table, since the electrical characteristics can be further improved. Furthermore, in the present invention, an ohmic electrode is further provided, and it is preferable that the ohmic electrode contains a metal of Group 4 and / or Group 11 of the periodic table. According to such a preferable range, the electrical characteristics can be further improved.
[0012] The above-mentioned preferable semiconductor device can be more easily manufactured by forming the semiconductor layer using the film forming apparatus shown in FIG.
[0013] In this specification, the term "film" can be read as "layer". The term "laminated structure" refers to a structure including one or more crystal layers, and may include layers other than the crystal layer (e.g., an amorphous layer). The crystal layer is preferably a single crystal layer, but may be a polycrystalline layer. In this specification, for convenience, the orientation state can be confirmed by X-ray diffraction. More specifically, for example, when the crystal is oriented in the (001) plane, it can be determined that the crystal is oriented in the (001) plane when the integrated intensity ratio of the peak derived from the (001) plane to the peak derived from the other crystal planes is larger than the integrated intensity ratio of the peak derived from the (001) plane to the peak derived from the other crystal planes of the same randomly oriented crystal.
[0014] In the present invention, the term "main component" refers to a content of the oxide semiconductor having a rutile structure in the crystal being 50% or more in terms of composition ratio in the crystal. In an embodiment of the present invention, the content of the oxide semiconductor having a rutile structure in the crystal is preferably 70% or more, more preferably 90% or more in terms of composition ratio in the crystal. In addition, the oxide semiconductor is not particularly limited as long as it has a rutile structure and further contains germanium. In the present invention, the oxide semiconductor preferably contains germanium dioxide crystals having a rutile structure. The oxide semiconductor may also contain other metals than germanium. Examples of the other metals include metals of Group 14 of the periodic table other than germanium (such as tin or silicon), and among these, tin and / or silicon are preferred. The atomic ratio of germanium in the metal elements in the crystal is preferably 0.5 or more. By setting the atomic ratio of germanium in such a preferred range, a crystal having better electrical properties can be realized.
[0015] In the present invention, the area of the crystal is 100 μm 2 It is preferable that the area is 100 mm or more. 2 It is more preferable that the crystal has an area of 0.5 μm or more. In the present invention, the crystal is preferably a single crystal, is preferably in the form of a film or a plate, and is more preferably in the form of a film (hereinafter also referred to as a "crystalline film"). The film thickness of the crystalline film is not particularly limited as long as it does not impede the object of the present invention, but in the present invention, it is preferably 0.5 μm or more, and more preferably 1 μm or more. Within these preferable ranges, the withstand voltage of the semiconductor film can be improved.
[0016] The crystal film can be obtained more easily by forming a GeO2 crystal film and its mixed crystal film using, for example, the film forming apparatus shown in FIG. 1. In addition, it is also possible to appropriately perform doping using the film forming apparatus. The doped crystal can be suitably used as a semiconductor film or semiconductor layer, and an n-type dopant or a p-type dopant can be applied to conventional doping means in oxide semiconductors. Examples of the n-type dopant include antimony (Sb), arsenic (As), bismuth (Bi), or fluorine (F). Examples of the P-type dopant include aluminum (Al), gallium (Ga), or indium (In).
[0017] In addition, when the crystal is formed on a crystal substrate using the film forming apparatus, the crystal substrate is not particularly limited as long as it does not impede the object of the present invention, and may be a known substrate. The crystal substrate may be an insulating substrate, a conductive substrate, or a semiconductor substrate, but in the present invention, it is preferably a semiconductor substrate. The crystal substrate may be a single crystal substrate or a polycrystalline substrate. The crystal substrate may be a substrate having a metal film on its surface. In addition, when the crystal substrate is a conductive substrate, a vertical device can be produced without removing the substrate. The crystal structure of the crystal substrate is also not particularly limited as long as it does not impede the object of the present invention, but it is preferable that the crystal substrate has a rutile structure. Examples of the substrate having the rutile structure include a GeO2 substrate, a SrTiO3 substrate, a TiO2 substrate, and a MgF2 substrate. In addition, the crystal substrate may have an off-angle.
[0018] In the present invention, a film may be formed directly on the substrate. Alternatively, other layers such as a layer different from the oxide semiconductor (e.g., an n-type semiconductor layer, an n+ type semiconductor layer, an n-type semiconductor layer, etc.), an insulator layer (including a semi-insulator layer), or a buffer layer may be laminated on the substrate, and then a film may be formed on the substrate via the other layers.
[0019] The crystal is used as it is or after a known processing means such as peeling off of the substrate is applied, for example, in a semiconductor device using a known means. Examples of the semiconductor device include a Schottky barrier diode (SBD), a junction barrier Schottky diode (JBS), a high electron mobility transistor (HEMT), a metal oxide semiconductor field effect transistor (MOSFET), a junction field effect transistor (JFET), an insulated gate bipolar transistor (IGBT), or a light emitting diode (LED). The semiconductor device may be a module equipped with the semiconductor device, or an electronic device and its parts equipped with the semiconductor device, and is useful for various products. In the present invention, the semiconductor device is preferably a power device. The semiconductor device can be classified into a horizontal element (horizontal device) in which an electrode is formed on one side of the semiconductor layer, and a vertical element (vertical device) in which an electrode is formed on both the front and back sides of the semiconductor layer, and in the present invention, the semiconductor device can be suitably used for both a horizontal device and a vertical device.
[0020] Examples of semiconductor devices suitable for use in the present invention will be described in more detail below with reference to the drawings, but the present invention is not limited to these examples. Note that the following are suitable examples in which the crystal layer in the crystal film or the laminated structure containing GeO2 as a main component is used as a semiconductor layer.
[0021] 8 shows a preferred example of a Schottky barrier diode (SBD) including an n-type semiconductor layer 101a, an n+ type semiconductor layer 101b, a p-type semiconductor layer 102, a metal layer 103, an insulator layer 104, a Schottky electrode 105a, and an ohmic electrode 105b. The metal layer 103 is made of a metal such as Al, and covers the Schottky electrode 105a.
[0022] FIG. 9 shows a preferred example of a high electron mobility transistor (HEMT) including an n-type semiconductor layer 121a having a wide bandgap, an n-type semiconductor layer 121b having a narrow bandgap, an n+-type semiconductor layer 121c, a p-type semiconductor layer 123, a gate electrode 125a, a source electrode 125b, a drain electrode 125c, and a substrate 129.
[0023] 10 shows a preferred example of a metal oxide semiconductor field effect transistor (MOSFET) including an n-type semiconductor layer 131a, a first n+ type semiconductor layer 131b, a second n+ type semiconductor layer 131c, a p-type semiconductor layer 132, a p+ type semiconductor layer 132a, a gate insulating film 134, a gate electrode 135a, a source electrode 135b, and a drain electrode 135c. The p+ type semiconductor layer 132a may be a p-type semiconductor layer or may be the same as the p-type semiconductor layer 132.
[0024] FIG. 11 shows a preferred example of a junction field effect transistor (JFET) including an n-type semiconductor layer 141a, a first n+ type semiconductor layer 141b, a second n+ type semiconductor layer 141c, a p-type semiconductor layer 142, a gate electrode 145a, a source electrode 145b and a drain electrode 145c.
[0025] FIG. 12 shows a preferred example of an insulated gate bipolar transistor (IGBT) including an n-type semiconductor layer 151, an n-type semiconductor layer 151a, an n+ type semiconductor layer 151b, a p-type semiconductor layer 152, a gate insulating film 154, a gate electrode 155a, an emitter electrode 155b, and a collector electrode 155c.
[0026] (LED) An example of the semiconductor device of the present invention being a light emitting diode (LED) is shown in Fig. 12. The semiconductor light emitting device of Fig. 12 includes an n-type semiconductor layer 161 on a second electrode 165b, and a light emitting layer 163 is laminated on the n-type semiconductor layer 161. A p-type semiconductor layer 162 is laminated on the light emitting layer 163. A light-transmitting electrode 167 that transmits light generated by the light emitting layer 163 is provided on the p-type semiconductor layer 162, and a first electrode 165a is laminated on the light-transmitting electrode 167. The semiconductor light emitting device of Fig. 12 may be covered with a protective layer except for the electrode portion.
[0027] Examples of materials for the translucent electrode include conductive oxide materials containing indium (In) or titanium (Ti). More specifically, examples include In2O3, ZnO, SnO2, Ga2O3, TiO2, CeO2, or mixed crystals of two or more of these, or doped materials thereof. The translucent electrode can be formed by providing these materials by a known means such as sputtering. After the translucent electrode is formed, thermal annealing may be performed to make the translucent electrode transparent.
[0028] In the semiconductor light-emitting element of FIG. 13, the first electrode 165a is a positive electrode and the second electrode 165b is a negative electrode, and by passing a current through both of them to the p-type semiconductor layer 162, the light-emitting layer 163, and the n-type semiconductor layer 161, the light-emitting layer 163 emits light.
[0029] Examples of materials for the first electrode 165a and the second electrode 165b include metals such as Al, Mo, Co, Zr, Sn, Nb, Fe, Cr, Ta, Ti, Au, Pt, V, Mn, Ni, Cu, Hf, W, Ir, Zn, In, Pd, Nd, Ag, or the like, or alloys thereof, metal oxide conductive films such as tin oxide, zinc oxide, indium oxide, indium tin oxide (ITO), indium zinc oxide (IZO), or the like, organic conductive compounds such as polyaniline, polythiophene, or polypyrrole, or mixtures thereof, etc. The method for forming the electrode film is not particularly limited, and the electrode can be formed on the substrate according to a method appropriately selected from wet methods such as printing, spraying, and coating, physical methods such as vacuum deposition, sputtering, and ion plating, and chemical methods such as CVD and plasma CVD, etc., taking into consideration the suitability of the material.
[0030] FIG. 14 shows a main part of a junction barrier Schottky diode (JBS) which is one of the preferred embodiments of the present invention. The JBS in FIG. 14 includes an ohmic electrode 1020, an n-type semiconductor layer 1010a, an n+ type semiconductor layer 1010b, a Schottky electrode 1030, and an electric field relaxation region 1060. The Schottky electrode 1030 includes a metal layer 1030a, a metal layer 1030b, and a metal layer 1030c. In the semiconductor device in FIG. 14, the outer end of the metal layer 1030a and / or the metal layer 1030b as the second electrode layer is located outside the outer end of the metal layer 1030c as the first electrode layer. In the semiconductor device in FIG. 14, the region of the electric field relaxation region 1060 includes at least two electric field relaxation regions 1060 in a plane including at least a part of the portion of the second electrode layer located outside the outer end of the first electrode layer, and the outer end of the second electrode. In the semiconductor device of FIG. 14, the electric field relaxation region 1060 is made of a p-type semiconductor, and forms a PN junction with the n-type semiconductor layer 1010a.
[0031] The means for forming each layer in Fig. 15 is not particularly limited as long as it does not impede the object of the present invention, and may be any known means. For example, a means for forming a film by a vacuum deposition method, a CVD method, a sputtering method, or various coating techniques, followed by patterning by a photolithography method, or a means for directly patterning by a printing technique, etc., may be mentioned.
[0032] FIG. 15 shows a preferred example of a Schottky barrier diode (SBD) including an ohmic electrode 1110 a , an ohmic electrode 1110 b , a Schottky electrode 1120 , an n-type semiconductor layer 1130 , and a substrate 1140 . EXAMPLES
[0033] Example 1 1. Formation of n-type semiconductor layer 1-1. Film forming equipment An example of a film forming apparatus suitable for use in this embodiment will be described with reference to Fig. 1. The film forming apparatus 19 in Fig. 1 includes a sample stage 21 on which a film forming sample 20 is placed, a carrier gas source 22a for supplying a carrier gas, a carrier gas source 22b for supplying a carrier gas (dilution), a flow rate control valve 23a for adjusting the flow rate of the carrier gas sent from the carrier gas source 22a, a flow rate control valve 23b for adjusting the flow rate of the carrier gas (dilution) sent from the carrier gas source 22b, a heater 28 provided in a film forming chamber 27, and an atomizing device 30. The atomization device 30 is composed of a raw material partition 24 in which the raw material liquid for atomization 24a is stored, an ultrasonically transparent substrate 24b provided at the bottom of the raw material partition 24, a stand 24c, an ultrasonic vibrator 26 provided on the bottom surface of the raw material partition 24, a guide partition 31 in contact with the ultrasonically transparent substrate 24b, an ultrasonic transmission liquid tank 35 that stores an ultrasonic transmission liquid 36, and an ultrasonic transmission liquid 36 that transmits ultrasonic waves emitted from the ultrasonic vibrator 26 to the ultrasonically transparent substrate 24b. The guide partition 31 can locally transmit ultrasonic waves emitted by the ultrasonic vibrator to the ultrasonically transparent substrate 24b via the ultrasonic transmission liquid 36, thereby further improving the atomization efficiency and increasing the amount of atomization. FIG. 2 shows an example of a mist forming device suitable for use in this embodiment. The mist forming device 30 in FIG. 2 is composed of a flow rate control valve 23a, a flow rate control valve 23b, a raw material liquid for mist forming 24a, an ultrasonic transmission substrate 24b, a stand 24c, a guide partition 31, a diluent gas supply pipe 33, a carrier gas supply pipe 34, an ultrasonic transmission liquid tank 35, an ultrasonic transmission liquid 36, and a jig 40. By using the guide partition 31, ultrasonic waves generated by an ultrasonic vibrator can be passed through the ultrasonic transmission substrate 24b to mist the raw material liquid for mist forming 24a. This improves the mist forming efficiency and increases the amount of mist formed. In addition, by using the diluent gas supply pipe 33 and the carrier gas supply pipe 34, the mist generated by ultrasonic waves can be sent to the film forming chamber. 16 is a schematic cross-sectional view of the atomization device 30. The atomization device 30 is composed of the raw material partition wall 24, the ultrasonically transparent substrate 24b, the stand 24c, the ultrasonic transducer 26, the guide partition wall 31, and the ultrasonic transmission liquid tank 35. The guide partition wall 31 is provided on the ultrasonic transducer 26 and is in contact with the ultrasonically transparent substrate 24b. This configuration can further improve the transmission efficiency of ultrasonic waves.
[0034] 1-2. Preparation of raw solution for atomization When adjusting the raw solution for atomization, the concentration in the raw solution for atomization was adjusted to 0.05 M biscarboxygermanium sesquioxide and 0.025 M tin chloride dihydrate. When adjusting, hydrochloric acid was added at 10% by volume, and this was used as the raw solution for atomization.
[0035] 1-3. Film preparation preparation The atomization raw material solution 24a obtained in 1-2 above was accommodated in the raw material partition 24. Next, r-TiO2 (001) was placed on the sample stage 21 as the film-forming sample 20, and the heater 28 was operated to raise the temperature in the film-forming chamber 27 to 725°C. Next, the flow rate control valves 23a and 23b were opened to supply carrier gas from the carrier gas sources 22a and 22b, which are carrier gas sources, into the film-forming chamber 27, and the atmosphere in the film-forming chamber 27 was sufficiently replaced with the carrier gas, and the flow rate of the carrier gas was adjusted to 3.0 L / min and the flow rate of the carrier gas (dilution) was adjusted to 0.5 L / min, respectively. Nitrogen was used as the carrier gas.
[0036] 1-4. Formation of oxide semiconductor crystal film Next, the ultrasonic vibrator 26 was vibrated, and the vibration was propagated to the raw solution for atomization 24a through the ultrasonic transmission liquid, thereby atomizing the raw solution for atomization 24a to generate mist. This mist was introduced into the film formation chamber 27 through a supply pipe (not shown) by the carrier gas, and the mist was thermally reacted in the film formation chamber 27 at atmospheric pressure and 725°C to form a thin film on the film formation sample 20.
[0037] The thin film obtained in 1-4 was measured using an X-ray diffraction device. The XRD diffraction results are shown in Figure 3. The obtained thin film has a rutile structure and is oriented in the (001) plane. 52 ,Sn 48 The film was a crystalline film of 02. The film thickness was 73 nm. When the thin film was evaluated using an energy dispersive X-ray analyzer (EDS), it was found that a thin film was formed over the entire surface, as shown in Figure 4.
[0038] In addition, when the film surface was observed with a scanning electron microscope (SEM), it was found that a crystalline film with excellent surface smoothness and good crystallinity had been formed, as shown in FIG. Evaluating the membrane surface
[0039] 2. Formation of Electrodes Under the following conditions, r-(Ge 52 ,Sn 48 ) Electrodes were formed on the O2 crystal film. (Conditions for forming ohmic electrodes) Cleaning: O3 5min Photoresist coating: HMDS 3000rpm 20s nonbake, LOR5A 3000rpm 60s 180oC5min, AZ-MiR703 3000rpm 60s 110oC1min Laser lithography: dwl66+ 10mmHead, power 70mW, filter 100%, intensity 70% Bake: 60s 110°C1min Development: TMAH 2.3wt% 90s, Water 30s Descum: O3 1min EB deposition: Ti 75 nm 0.2nm / s, Au 75 nm 0.2nm / s Liftoff: NMP 80ºC 30 min, IPA×2, Water RTA: N2 0.2ccm, 500oC, 30s Bake: 60s 110°C1min Development: TMAH 2.3wt% 90s, Water 30s Etching: BHF 1:10 30s Cleaning: Acetone, IPA, Water (Architectural Requirements of the Catholic Church) Cleaning: O3 1min Photoresist coating: HMDS 3000rpm 20s nonbake, LOR5A 3000rpm 60s 180oC5min, AZ-MiR703 3000rpm 60s 110oC1min Laser lithography: dwl66+ 10mmHead, power 70mW, filter 100%, intensity 70% Bake: 60s 110°C1min Development: TMAH 2.3wt% 90s, Water 30s Descum: O3 1min EB deposition: Ni 75 nm 0.15nm / s, Au 75 nm 0.2nm / s Liftoff: NMP 80oC 30 min, IPA×2, Water
[0040] 4. Hall effect measurement The Hall effect of the semiconductor device obtained above was measured by the van der Pauw method, and the mobility was found to be 29 cm 2 / Vs. The carrier density was 9.7×10 18 / cm 3 It was.
[0041] 5.IV measurement The semiconductor device obtained as described above was subjected to IV measurement. The results are shown in Figure 6. These results show that the semiconductor device of Example 1 is excellent in semiconductor characteristics and Schottky characteristics.
[0042] Example 2 The oxide semiconductor crystal film was grown to a thickness of 110 nm under the following conditions: 52 ,Sn 48 The experiment was carried out under the same conditions as in Example 1, except that an electrode was formed on the O2 crystal film. 2-1. Formation of electrodes (Conditions for forming ohmic electrodes) Cleaning: O3 15min Photoresist coating: HMDS 3000rpm 20s nonbake, LOR5A 3000rpm 60s 180oC5min, AZ-MiR703 3000rpm 60s 110oC1min Laser lithography: dwl66+ 10mmHead, power 70mW, filter 100%, intensity 70% Bake: 60s 110oC1min Development: TMAH 2.3wt% 90s, Water 30s Descum: O3 1min EB deposition: Ti 75 nm 0.2nm / s, Au 75 nm 0.2nm / s Liftoff: NMP 80oC 30 min, IPA×2, Water RTA: N2 0.2ccm, 450oC, 30s (Conditions for forming Schottky electrodes) Cleaning: O3 1min Photoresist coating: HMDS 3000rpm 20s nonbake, LOR5A 3000rpm 60s 180oC5min, AZ-MiR703 3000rpm 60s 110oC1min Laser lithography: dwl66+ 10mmHead, power 70mW, filter 100%, intensity 70% Bake: 60s 110oC1min Development: TMAH 2.3wt% 90s, Water 30s Descum: O3 1min EB deposition: Pt 100 nm 0.05 nm / s Liftoff: NMP 80oC 10 min, IPA×2, Water
[0043] 4. Hall effect measurement The Hall effect of the semiconductor device obtained above was measured by the van der Pauw method, and the mobility was found to be 24 cm 2 / Vs. The carrier density was 7.8×10 18 / cm 3 It was.
[0044] 5.IV measurement The semiconductor device obtained as described above was subjected to IV measurement. The results are shown in Fig. 7. These results show that the semiconductor device of Example 1 is excellent in semiconductor characteristics and Schottky characteristics.
[0045] (Test Example 1) When deposition was performed under the same conditions as in Example 1 using a conventional mist CVD apparatus, a crystalline film could not be formed, and only some crystal grains were formed on the substrate. Therefore, the electrical properties could not be measured. [Industrial Applicability]
[0046] The semiconductor of the present invention is suitably used in semiconductor devices such as power devices. [Explanation of symbols]
[0047] 19 Film forming equipment 20 Film sample 21 Sample stage 22a Carrier gas source 22b Dilution gas source 23a Flow control valve 23b Flow control valve 24 Raw material bulkhead 24a Raw material liquid for atomization 24b Ultrasonic transparent base material 24c units 26 Ultrasonic transducer 27 Film forming room 28 Heater 30 Atomization device 31 Guide bulkhead 33 Dilution gas supply pipe 34 Carrier gas supply pipe 35 Ultrasonic transmission fluid tank 36 Ultrasonic transmission fluid 37 Film forming room 101a n-type semiconductor layer 101b n+ type semiconductor layer 102 p-type semiconductor layer 103 Metal layer 104 Insulator Layer 105a Schottky electrode 105b Ohmic electrode 111a n-type semiconductor layer 111b n+ type semiconductor layer 114 Semi-insulating layer 115a Gate electrode 115b Source electrode 115c Drain electrode 118 Buffer layer 121a Wide band gap n-type semiconductor layer 121b Narrow band gap n-type semiconductor layer 121c n+ type semiconductor layer 123 p-type semiconductor layer 124 Semi-insulating layer 125a Gate electrode 125b Source electrode 125c Drain electrode 128 Buffer layer 129 Board 131a n-type semiconductor layer 131b First n+ type semiconductor layer 131c second n+ type semiconductor layer 132 p-type semiconductor layer 134 Gate insulating film 135a Gate electrode 135b Source electrode 135c Drain electrode 138 Buffer layer 139 Semi-insulating layer 141a n-type semiconductor layer 141b First n+ type semiconductor layer 141c second n+ type semiconductor layer 142 p-type semiconductor layer 145a Gate electrode 145b Source electrode 145c Drain electrode 151 n-type semiconductor layer 151a n-type semiconductor layer 151b n+ type semiconductor layer 152 p-type semiconductor layer 154 Gate insulating film 155a Gate electrode 155b Emitter electrode 155c Collector electrode 161 n-type semiconductor layer 162 p-type semiconductor layer 163 Light-emitting layer 165a First electrode 165b Second electrode 167 Translucent electrode 169 Substrate 1010a n-type semiconductor 1010b n+ type semiconductor 1020 Ohmic electrode 1030 Schottky electrode 1030a metal layer 1030b metal layer 1030c metal layer 1060 Electrolytic relaxation region 1110a Ohmic electrode 1110b Ohmic electrode 1120 Schottky electrode 1130 n-type semiconductor layer 1140 PCB
Claims
1. A semiconductor device including at least a semiconductor layer and a Schottky electrode that is in Schottky junction with the semiconductor layer, the semiconductor layer being made of crystals mainly composed of an oxide semiconductor having a rutile structure, the oxide semiconductor containing germanium, and a mobility of 10 cm 2 / Vs or more.
2. The carrier density of the oxide semiconductor is 1×10 18 / cm 3 2. The semiconductor device according to claim 1.
3. 2. The semiconductor device according to claim 1, wherein the oxide semiconductor further contains tin and / or silicon.
4. 4. The semiconductor device according to claim 3, wherein the oxide semiconductor contains the germanium with respect to the tin and / or silicon in an atomic ratio of 1 or more.
5. The mobility is 20 cm 2 2. The semiconductor device according to claim 1, wherein the Vs is greater than or equal to 1.
6. 2. The semiconductor device according to claim 1, wherein the semiconductor layer is in the form of a film or a plate.
7. The semiconductor layer is 100 μm 2 7. The semiconductor device according to claim 6, having an area of at least 100 mm.
8. 2. The semiconductor device according to claim 1, wherein the Schottky electrode contains a metal of Group 10 and / or Group 11 of the periodic table.
9. 2. The semiconductor device according to claim 1, further comprising an ohmic electrode, the ohmic electrode containing a metal of Group 4 and / or Group 11 of the periodic table.
10. 2. The semiconductor device according to claim 1, which is a power device.
11. A semiconductor system comprising the semiconductor device according to claim 1.
Citation Information
Patent Citations
Crystalline oxide film and semiconductor device
WO2023008454A1
Cited By
Semiconductor memory device
CN122779114A