Power amplifier

Abstract

To provide a power amplifier capable of restraining breakdown of a transistor even when the amplitude of a high-frequency signal is large.SOLUTION: A power amplifier having a plurality of stages of amplifier sections using emitter-grounded transistors includes a first amplifier section having a first transistor for amplifying an input high-frequency signal, a second amplifier section having a second transistor for amplifying the output of the first amplifier section, and at least an impedance element, and includes a voltage detection circuit provided between the first transistor and the second transistor, and a protection circuit for reducing a base bias current to be provided to at least one of the first transistor and the second transistor based on the output of the voltage detection circuit using the impedance element.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present invention relates to a power amplifier. [Background technology]

[0002] There is known a radio frequency power amplifier that amplifies radio frequency signals by connecting multiple amplifier stages using transistors. The power amplifier disclosed in Patent Document 1 includes a protection circuit connected to the output of an amplifier stage. This protection circuit turns on when the voltage amplitude exceeds a certain level, and draws out the base current of the transistor that constitutes the previous amplifier stage. In this way, the protection circuit protects the transistor from being destroyed. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 4685836 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the above-mentioned power amplifier, when the amplitude of the high-frequency signal is large and the protection circuit repeatedly switches between the on and off states, it may not be possible to prevent breakdown of the transistor.

[0005] The present invention has been made in view of the above, and an object of the present invention is to provide a power amplifier that can suppress breakdown of transistors even when the amplitude of a high-frequency signal is large. [Means for solving the problem]

[0006] In order to solve the above-mentioned problems and achieve the object, a power amplifier according to one embodiment of the present disclosure is a power amplifier having multiple stages of amplification sections using emitter-grounded transistors, comprising: a first amplification section having a first transistor that amplifies an input high-frequency signal; a second amplification section having a second transistor that amplifies the output of the first amplification section; a voltage detection circuit having at least an impedance element and disposed between the first transistor and the second transistor; and a protection circuit that reduces the base bias current applied to at least one of the first transistor and the second transistor based on the output of the voltage detection circuit using the impedance element. Effect of the Invention

[0007] According to the present invention, even when the amplitude of a high frequency signal is large, breakdown of a transistor can be suppressed. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram illustrating a power amplifier of a comparative example. [Diagram 2] FIG. 2 is a diagram illustrating a power amplifier according to a first embodiment of the present disclosure. [Diagram 3] FIG. 3 is a diagram illustrating an example of the operation of the voltage detection circuit. [Figure 4] FIG. 4 is a diagram showing an example of a distorted waveform. [Diagram 5] FIG. 5 is a diagram showing the relationship between the detected voltage output from the voltage detection circuit, the current drawn by the protection circuit, and the collector current of each transistor. [Figure 6] FIG. 6 is a diagram showing the relationship between the voltage level of the input high-frequency signal and the collector current. [Figure 7] FIG. 7 is a diagram illustrating a voltage detection circuit used in the power amplifier shown in FIG. [Figure 8] FIG. 8 is a diagram showing a modified example of the voltage detection circuit. [Figure 9] FIG. 9 is a diagram showing a modified example of the voltage detection circuit. [Figure 10] FIG. 10 is a diagram showing a modified example of the voltage detection circuit. [Figure 11] FIG. 11 is a diagram illustrating a first example of a level shift circuit and a protection circuit. [Figure 12] FIG. 12 is a waveform diagram showing the operation of the level shift circuit and the protection circuit shown in FIG. [Figure 13] FIG. 13 is a diagram illustrating a second example of the level shift circuit and the protection circuit. [Figure 14] FIG. 14 is a waveform diagram showing the operation of the level shift circuit and the protection circuit shown in FIG. [Figure 15] FIG. 15 is a diagram illustrating a third example of the level shift circuit and the protection circuit. [Figure 16] FIG. 16 is a waveform diagram showing the operation of the level shift circuit and the protection circuit shown in FIG. [Figure 17] FIG. 17 is a diagram illustrating a fourth example of the level shift circuit and the protection circuit. [Figure 18] FIG. 18 is a waveform diagram showing the operation of the level shift circuit and the protection circuit shown in FIG. [Figure 19] FIG. 19 is a diagram illustrating a fifth example of the level shift circuit and the protection circuit. [Figure 20] FIG. 20 is a waveform diagram showing the operation of the level shift circuit and the protection circuit shown in FIG. [Figure 21] FIG. 21 is a diagram illustrating a sixth example of the level shift circuit and the protection circuit. [Figure 22] FIG. 22 is a waveform diagram showing the operation of the level shift circuit and the protection circuit shown in FIG. [Figure 23] FIG. 23 is a diagram showing a first example of a combination of a level shift circuit and a protection circuit. [Figure 24] FIG. 24 is a diagram showing a second example of a combination of a level shift circuit and a protection circuit. [Diagram 25] FIG. 25 is a diagram illustrating a power amplifier according to a second embodiment of the present disclosure. [Figure 26]FIG. 26 is a diagram illustrating a power amplifier according to a third embodiment of the present disclosure. [Figure 27] FIG. 27 is a diagram showing an example of a layout when the power amplifier of the present disclosure is realized on a substrate. [Figure 28] FIG. 28 is a diagram showing an example of a layout when the power amplifier of the present disclosure is realized on a substrate. [Figure 29] FIG. 29 is a diagram showing an example of a layout when the power amplifier of the present disclosure is realized on a substrate. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, the embodiments of the present invention will be described in detail with reference to the drawings. In the following description of each embodiment, the same or equivalent components as those in other embodiments are given the same reference numerals, and their description will be simplified or omitted. The present invention is not limited to each embodiment. In addition, the components of each embodiment include those that are replaceable and easy for a person skilled in the art, or those that are substantially the same. The configurations described below can be appropriately combined. In addition, the configurations can be omitted, replaced, or modified within the scope of the gist of the invention.

[0010] First Embodiment The first embodiment will be described below, but in order to facilitate understanding of the first embodiment, a comparative example will be described first.

[0011] (Configuration of Comparative Example) FIG. 1 is a diagram showing a power amplifier 100 of a comparative example. In FIG. 1, the power amplifier 100 is a three-stage amplifier and has amplification units PA1, PA2, and PA3. That is, the power amplifier 100 has a first-stage amplification unit PA1, a second-stage amplification unit PA2, and a third-stage amplification unit PA3. The amplification units PA1, PA2, and PA3 amplify the input high-frequency signal and sequentially output it to the subsequent stage. The amplification unit PA1 corresponds to the first amplification unit of the present disclosure. The amplification unit PA2 corresponds to the second amplification unit of the present disclosure. The amplification unit PA3 corresponds to the third amplification unit of the present disclosure.

[0012] The amplifier units PA1, PA2, and PA3 each include a transistor with a common emitter. The amplifier unit PA1 includes a common emitter transistor Tr1, a capacitor C11 connected to the base of the transistor Tr1, and resistors R11, R12, and R13. A bias current, which will be described later, is applied to the base of the transistor Tr1 via the resistor R11. The emitter of the transistor Tr1 is connected to a reference potential via the resistor R13. The reference potential is exemplified by a ground potential, but the present disclosure is not limited to this. The same applies to the following description. The signal amplified by the amplifier unit PA1 is output from the collector of the transistor Tr1. A capacitor C10 and a resistor R10 are connected in series between the input and output of the amplifier unit PA1. The transistor Tr1 corresponds to the first transistor of the present disclosure.

[0013] The amplifier PA2 includes a transistor Tr2 whose emitter is grounded, a capacitor C21 connected to the base of the transistor Tr2, and a resistor R21. A bias current, which will be described later, is applied to the base of the transistor Tr2 via the resistor R21. The emitter of the transistor Tr2 is connected to a reference potential. A signal amplified by the amplifier PA2 is output from the collector of the transistor Tr2. The transistor Tr2 corresponds to the second transistor of the present disclosure.

[0014] The amplifier PA3 includes a transistor Tr3 whose emitter is grounded, a capacitor C31 connected to the base of the transistor Tr3, a capacitor C32 connected between the collector and emitter of the transistor Tr3, and a resistor R31. A bias current (to be described later) is applied to the base of the transistor Tr3 via the resistor R31. The emitter of the transistor Tr3 is connected to a reference potential. The signal amplified by the amplifier PA3 is output from the collector of the transistor Tr3.

[0015] In the present disclosure, the transistor is a bipolar transistor, but the present disclosure is not limited thereto. An example of a bipolar transistor is a heterojunction bipolar transistor (HBT), but the present disclosure is not limited thereto. The transistor may be, for example, a field effect transistor (FET). In this case, the collector, base, and emitter may be read as the drain, gate, and source, respectively. The transistor may be a multi-finger transistor in which a plurality of unit transistors (also called fingers) are electrically connected in parallel. A unit transistor refers to the minimum configuration that constitutes a transistor.

[0016] The power amplifier 100 includes an input terminal Pin, an output terminal Pout, power supply terminals VC1, VC2, and Vbat, and bias input terminals IB1 and IB2. A radio frequency signal RFin is input to the input terminal Pin. The output terminal Pout outputs a radio frequency signal RFout.

[0017] The power amplifier 100 includes choke coils L1, L2, and L3. One end of each of the choke coils L1, L2, and L3 is connected to a power supply VCC. The other end of the choke coil L1 is connected to a power supply terminal VC1. The other end of the choke coil L2 is connected to a power supply terminal VC2. The other end of the choke coil L3 is connected to an output terminal Pout.

[0018] The power supply terminal VC1 is connected to the power supply VCC via a choke coil L1. The current flowing from the power supply VCC to the collector of the transistor Tr1 in the amplifier unit PA1 is defined as current Icc1. The power supply terminal VC2 is connected to the power supply VCC via a choke coil L2. The current flowing from the power supply VCC to the collector of the transistor Tr2 in the amplifier unit PA2 is defined as current Icc2. The output terminal Pout is connected to the power supply VCC via a choke coil L3.

[0019] The power amplifier 100 also includes a bias circuit B11 provided for the amplifier PA1, a bias circuit B12 provided for the amplifier PA2, and a bias circuit B13 provided for the amplifier PA3. The bias circuit B11 corresponds to the first bias circuit of the present disclosure. The bias circuit B12 corresponds to the second bias circuit of the present disclosure.

[0020] The bias circuit B11 includes a transistor TrB1, a resistor RB1, transistors TrD11 and TrD12, and a capacitor CB1. One end of the resistor RB1 is connected to the base of the transistor TrB1, and the other end is connected to the bias input terminal IB1. The base and collector of each of the transistors TrD11 and TrD12 are connected to each other, and each operates as a diode. One end of the capacitor CB1 is connected to the base of the transistor TrB1, and the other end is connected to a reference potential.

[0021] The bias circuit B12 includes a transistor TrB2, a resistor RB2, transistors TrD21 and TrD22, and a capacitor CB2. One end of the resistor RB2 is connected to the base of the transistor TrB2, and the other end is connected to the bias input terminal IB1. The base and collector of each of the transistors TrD21 and TrD22 are connected to each other, and each operates as a diode. One end of the capacitor CB2 is connected to the base of the transistor TrB2, and the other end is connected to a reference potential.

[0022] The bias circuit B13 includes a transistor TrB3, a resistor RB3, transistors TrD31 and TrD32, and a capacitor CB3. One end of the resistor RB3 is connected to the base of the transistor TrB3, and the other end is connected to the bias input terminal IB2. The base and collector of each of the transistors TrD31 and TrD32 are connected to each other, and each operates as a diode. One end of the capacitor CB3 is connected to the base of the transistor TrB3, and the other end is connected to a reference potential.

[0023] Incidentally, a capacitor Cb is connected between the power supply terminal Vbat and the reference potential of each of the bias circuits B11, B12, and B13.

[0024] Here, the power amplifier 100 has a feedback circuit FB for adjusting the gain. The feedback circuit FB is connected between the amplifier unit PA1 and the amplifier unit PA2. One end of the feedback circuit FB is connected to the collector of the transistor Tr1 of the amplifier unit PA1. The other end of the feedback circuit FB is connected to the collector of the transistor Tr2 of the amplifier unit PA2. In this example, the feedback circuit FB is a resistor Rfb that connects the collector of the transistor Tr1 and the collector of the transistor Tr2. The feedback circuit FB can adjust the gain of the amplifier unit PA2.

[0025] (Operation of Comparative Example) The amplifier unit PA1 amplifies a radio frequency signal RFin, which is an input signal to the input terminal Pin of the power amplifier 100. The output signal of the amplifier unit PA1 is input to the amplifier unit PA2. The amplifier unit PA2 amplifies the output signal of the amplifier unit PA1. The output signal of the amplifier unit PA2 is input to the amplifier unit PA3. The amplifier unit PA3 amplifies the output signal of the amplifier unit PA2 and outputs it from the output terminal Pout as a radio frequency signal RFout.

[0026] (Power amplifier according to the first embodiment) (composition) Fig. 2 is a diagram showing a power amplifier 100a according to a first embodiment of the present disclosure. In Fig. 2, the power amplifier 100a according to the first embodiment has a configuration in which a voltage detection circuit 10 is provided instead of the feedback circuit FB in the power amplifier 100 of the comparative example described with reference to Fig. 1, and a level shift circuit 20 and a protection circuit 30 are added.

[0027] The voltage detection circuit 10 is provided in place of the feedback circuit FB in FIG. 1. It is connected between the amplifier PA1 and the amplifier PA2. One end of the voltage detection circuit 10 is connected to the collector of the transistor Tr1 of the amplifier PA1. The other end of the voltage detection circuit 10 is connected to the collector of the transistor Tr2 of the amplifier PA2. The voltage detection circuit 10 in FIG. 2 is configured by connecting a resistor R1, which is a first resistor, and a resistor R2, which is a second resistor, in series. A detection voltage Vdet, which is a DC voltage, is obtained from the connection point between the resistors R1 and R2. The resistors R1 and R2 connected in series correspond to the impedance elements of the present disclosure. A DC voltage is output by using the resistors R1 and R2, which are impedance elements. The configuration and modifications of the voltage detection circuit 10 will be described further below.

[0028] The level shift circuit 20 includes n transistors (n is a natural number, the same applies below) Tr11, Tr12, ..., and Tr1n. The base and collector of each of these n transistors are connected, and each operates as a diode. Therefore, the voltage drop due to the pn junction is n times larger, and the voltage level decreases according to the number of connected transistors. In other words, the level shift circuit 20 can convert the level of the DC voltage output from the voltage detection circuit 10. The configuration and modifications of the level shift circuit 20 will be described further below. Hereinafter, a circuit including one or more diodes, such as a transistor operating as a diode, will be called a diode circuit.

[0029] The protection circuit 30 includes a transistor Tr21. The transistor Tr21 corresponds to a third transistor in the present disclosure. When the transistor Tr21 is turned on, a current Idet flows. The current Idet flows, and the current is drawn from the bias circuits B11 and B12, thereby reducing the bias current. The configuration and modifications of the protection circuit 30 will be described further below.

[0030] (operation) The transistor Tr2 of the amplifier PA2 has a grounded emitter. Therefore, the phase difference between the collector signal of the transistor Tr1 and the collector signal of the transistor Tr2 is about 180°. The two signals with a phase difference of about 180° are combined in the voltage detection circuit 10 to obtain the detection voltage Vdet, which is a DC voltage.

[0031] FIG. 3 is a diagram showing an example of the operation of the voltage detection circuit 10. In FIG. 3, the horizontal axis indicates the passage of time, and the vertical axis indicates the voltage value. In FIG. 3, the phases of the voltage V1 appearing at the collector of the transistor Tr1 of the amplifier PA1 and the voltage V2 appearing at the collector of the transistor Tr2 of the amplifier PA2 differ by about 180°. Therefore, the voltage detection circuit 10 outputs the detection voltage Vdet by combining the voltages V1 and V2. By operating the transistor Tr21 of the protection circuit 30 with this detection voltage Vdet, the current Idet flows, and current is drawn from the bias circuits B11 and B12, so that the bias current can be reduced. In other words, when the transistor Tr21, which is the third transistor, is turned on, the bias current provided from the bias circuit B11 to the transistor Tr1 and the bias current provided from the bias circuit B12 to the transistor Tr2 are reduced.

[0032] In the power amplifier 100a, choke coils L1 and L2 are connected between the power supply VCC line and the collectors of the transistors Tr1 and Tr2 of the amplifier units PA1 and PA2. The signal on the power supply VCC line is DC, but the amplitude of a high-frequency signal appears on the collectors of the transistors Tr1 and Tr2. If a DC voltage is to be obtained from the power supply VCC line in order to extract the DC voltage, it is not preferable because it is necessary to add wiring for that purpose and electrode pads for feeding power to the transistors. Therefore, as described above, the values ​​of the resistors R1 and R2 connected between the two voltages V1 and V2 are set so that the high-frequency amplitude that appears at these connection points is canceled. In this way, the two voltages V1 and V2, whose amplitudes are out of phase with each other by about 180°, are combined, and as shown in FIG. 3, a detection voltage Vdet that is almost DC can be extracted.

[0033] Incidentally, the operation shown in Fig. 3 is valid until the voltage level of the input radio frequency signal RFin falls below a certain value. When the voltage level of the radio frequency signal RFin exceeds a certain value, the waveforms of voltages V1 and V2 become distorted. Fig. 4 is a diagram showing an example of a state in which the waveforms are distorted. As shown in Fig. 4, when the amplitudes of voltages V1 and V2 become large, the waveforms become distorted. At this time, a high frequency amplitude appears in the detection voltage Vdet at the connection point between resistors R1 and R2.

[0034] That is, when the amplitude of the high frequency exceeds a certain width, the amplitude of the high frequency that cannot be completely canceled appears, and the detection voltage Vdet rises according to the amplitude. As a result, when the base voltage of the transistor Tr21 exceeds the threshold, the transistor Tr21 turns on, and when the base voltage of the transistor Tr21 further rises, a part of the bias current is continuously drawn from the bias circuits B11 and B12 more strongly than when the detection voltage Vdet is only a DC voltage. As a result, even if the detection voltage Vdet itself is within the voltage range for normal use, it is possible to reliably and strongly prevent the destruction of the transistor caused by the amplitude of the high frequency becoming excessive.

[0035] 5 is a diagram showing the relationship between the detection voltage Vdet output from the voltage detection circuit 10, the current Idet which is the current drawn by the protection circuit 30, and the collector current of each transistor. In FIG. 5, the horizontal axis represents the voltage value of the power supply VCC, and the vertical axis represents the voltage value or current value.

[0036] As shown in Fig. 5, when the detection voltage Vdet at the connection point between resistors R1 and R2 rises, the base voltage of transistor Tr21 in protection circuit 30 rises. When the base voltage of transistor Tr21 rises and exceeds a certain value, transistor Tr21 turns on. This causes current Idet, which is the extraction current, to rise. As current Idet, which is the extraction current, rises, part of the current in bias circuits B11 and B12 is extracted, and the bias current can be reduced. As a result, collector current Icc1 of transistor Tr1 in amplifier PA1 and collector current Icc2 of transistor Tr2 in amplifier PA2 decrease.

[0037] Fig. 6 is a diagram showing the relationship between the voltage level of the input radio frequency signal RFin and the collector currents Icc1, Icc2. In Fig. 6, the horizontal axis represents the voltage value of the power supply VCC, and the vertical axis represents the current value. The curve PH in Fig. 6 represents the case where the voltage level of the radio frequency signal RFin is high, and the curve PL represents the case where the voltage level of the radio frequency signal RFin is low. As shown in Fig. 6, it can be seen that the collector currents Icc1, Icc2 are lower when the voltage level of the radio frequency signal RFin is high compared to when the voltage level of the radio frequency signal RFin is low.

[0038] (Example of a voltage detection circuit) FIG. 7 is a diagram showing a voltage detection circuit 10 used in the power amplifier 100a shown in FIG. 2. The voltage detection circuit 10 shown in FIG. 7 includes resistors R1 and R2 connected in series. The resistor R1 corresponds to the first resistor of the present disclosure. The resistor R2 corresponds to the second resistor of the present disclosure. One end of the resistor R1 is connected to the collector of the transistor Tr1 of the amplifier PA1. A voltage V1 of the power supply terminal VC1 is applied to one end of the resistor R1. One end of the resistor R2 is connected to the collector of the transistor Tr2 of the amplifier PA2. A voltage V2 of the power supply terminal VC2 is applied to one end of the resistor R2. A detection voltage Vdet is obtained from the connection point between the other end of the resistor R1 and the other end of the resistor R2. The signal output from the collector of the amplifier PA1 and the signal output from the collector of the amplifier PA2 are out of phase with each other by about 180°. Therefore, by combining these two signals in the voltage detection circuit 10, the amplitudes of the two signals are cancelled, and the detection voltage Vdet, which is a DC voltage, is obtained. The resistance values ​​of the resistors R1 and R2 are selected so that no high-frequency amplitude appears in the detection voltage Vdet at the connection point between the resistors R1 and R2.

[0039] 8 to 10 are diagrams showing modified examples of the voltage detection circuit 10. The voltage detection circuit 10a shown in FIG. 8 is configured by connecting a capacitor C1 to one end of the resistor R2 of the voltage detection circuit 10 shown in FIG. 7. Therefore, the resistors R1, R2, and the capacitor C1 are connected in series. The capacitor C1 is provided to cut DC. The capacitor C1 corresponds to the first capacitor of the present disclosure. In the voltage detection circuit 10a shown in FIG. 8, the resistance values ​​of the resistor R1 and the resistor R2 and the capacitance value of the capacitor C1 are selected so that high-frequency amplitude does not appear in the detection voltage Vdet.

[0040] The voltage detection circuit 10b shown in FIG. 9 is configured by connecting a capacitor C2 to one end of the resistor R1 of the voltage detection circuit 10 shown in FIG. 7. Therefore, the capacitor C2, the resistor R1, and the resistor R2 are connected in series. The capacitor C2 is provided to cut DC. The capacitor C2 corresponds to the first capacitor of the present disclosure. In the voltage detection circuit 10b shown in FIG. 9, the resistance values ​​of the resistor R1 and the resistor R2 and the capacitance value of the capacitor C2 are selected so that high-frequency amplitude does not appear in the detection voltage Vdet.

[0041] The voltage detection circuit 10c shown in FIG. 10 is configured by adding a resistor R3 and a capacitor C3 to the voltage detection circuit 10 shown in FIG. 7. The resistor R3 corresponds to the third resistor of the present disclosure. The capacitor C3 is connected in series with the resistor R3. The capacitor C3 corresponds to the second capacitor of the present disclosure. The capacitor C3 is provided for cutting DC. The resistor R3 and the capacitor C3 are connected in parallel with the resistors R1 and R2. In the voltage detection circuit 10c shown in FIG. 9, the resistance values ​​of the resistors R1, R2, and R3 and the capacitance value of the capacitor C3 are selected so that high-frequency amplitude does not appear in the detection voltage Vdet.

[0042] (Example of a level shift circuit and protection circuit) Fig. 11 is a diagram showing a first example of the level shift circuit 20 and the protection circuit 30 used in the power amplifier 100a shown in Fig. 2. Fig. 12 is a waveform diagram showing the operation of the level shift circuit 20 and the protection circuit 30 shown in Fig. 11.

[0043] As described above, the level shift circuit 20 includes n transistors Tr11, Tr12, ..., and Tr1n. The detection voltage Vdet output from the voltage detection circuit 10 is applied to the collector and base of the transistor Tr11. The detection voltage Vdet is applied to the base of the transistor Tr21 of the protection circuit 30 after the voltage level is converted by the level shift circuit 20. When the transistor Tr21 is turned on, a current Idet flows as shown by the curve S1 in FIG. 12. The current Idet flows, and the power supply voltage VB for the bias circuits B11 and B12 decreases. That is, the current Idet is a current drawn from the power supply voltage VB. The protection circuit 30 reduces the base bias current provided to the transistors Tr1 and Tr2 based on the voltage whose level is converted by the level shift circuit 20. That is, when the transistor Tr21, which is the third transistor, is turned on, the bias current provided from the bias circuit B11 to the transistor Tr1 and the bias current provided from the bias circuit B12 to the transistor Tr2 are reduced.

[0044] 12, the horizontal axis represents the detection voltage Vdet, and the vertical axis represents the current Idet. When the voltage applied to the base of the transistor Tr21 of the protection circuit 30 exceeds a predetermined threshold, the transistor Tr21 turns on. When the transistor Tr21 turns on, the current Idet flows, and when the detection voltage Vdet rises, the current Idet, which is a draw current, rises.

[0045] FIG. 13 is a diagram showing a second example of the level shift circuit and the protection circuit. The level shift circuit 20a shown in FIG. 13 is configured by adding a resistor R4 to the level shift circuit 20 shown in FIG. 11. One end of the resistor R4 is connected to the emitter of the transistor Tr1n. The other end of the resistor R4 is connected to a reference voltage. Therefore, the detection voltage Vdet is resistively divided by the level shift circuit made up of n transistors Tr11, Tr12, ..., and Tr1n and the resistor R4. This resistively divided voltage is applied to the base of the transistor Tr21 of the protection circuit 30. The resistor R4 corresponds to the fourth resistor of the present disclosure.

[0046] Fig. 14 is a waveform diagram showing the operation of the level shift circuit 20a and the protection circuit 30 shown in Fig. 13. As described above, a resistor-divided voltage is applied to the base of the transistor Tr21 of the protection circuit 30. Therefore, compared with the current Idet shown in Fig. 12 by the dashed curve S1 in Fig. 14, the current Idet rises more gently as shown by the curve S2 in this example. Therefore, according to the level shift circuit 20a and the protection circuit 30 shown in Fig. 13, the addition of the resistor R4 can suppress a sudden rise in the current Idet, which is a drawn current.

[0047] Fig. 15 is a diagram showing a third example of a level shift circuit and a protection circuit. In the protection circuit 30 of Fig. 11, when the power supply voltage VB drops to, for example, 0V, it is assumed that the transistor Tr21 turns on in the reverse direction and a current flows from the base to the collector of the transistor Tr21. That is, it is assumed that the current Idet flows in the reverse direction.

[0048] In order to prevent the current Idet from flowing in the reverse direction, that is, to prevent a backflow of current, a transistor Tr22 is added to the protection circuit 30a in FIG. 15. The transistor Tr22 operates as a diode because its base and collector are connected. Therefore, it is possible to prevent the current Idet from flowing in the reverse direction. The transistor Tr22 corresponds to the backflow prevention element of the present disclosure.

[0049] Fig. 16 is a waveform diagram showing the operation of the level shift circuit 20 and the protection circuit 30a shown in Fig. 15. When the transistor Tr21 is turned on in the reverse direction, the current Idet flows in the reverse direction as shown by the dashed curve S3 in Fig. 16. By adding the transistor Tr22 that operates as a diode as shown in Fig. 15, no current flows in the reverse direction even if the detection voltage Vdet rises, as shown by the solid line S4 in Fig. 16.

[0050] Fig. 17 is a diagram showing a fourth example of the level shift circuit and the protection circuit. In Fig. 17, a level shift circuit 20b is adopted in which a transistor Tr24 is added to the level shift circuit 20 of Fig. 11. The transistor Tr24 is provided between the transistor Tr1n and the transistor Tr21. The transistor Tr24 is turned on by a voltage whose level is converted by the level shift circuit. The transistor Tr24 corresponds to the fourth transistor of the present disclosure.

[0051] The detection voltage Vdet may be determined by inserting a resistor between the connection point of resistors R1 and R2 (see FIG. 2) and the level shift circuit 20. In that case, it is possible that the base voltage for turning on transistor Tr21 of the protection circuit 30 is insufficient. To address this, a Darlington-connected transistor Tr24 is added to transistor Tr21. The collector of transistor Tr24 is connected to power supply terminal VC1 or VC2, and power supply VCC is applied to it.

[0052] Fig. 18 is a waveform diagram showing the operation of the level shift circuit 20b and the protection circuit 30 shown in Fig. 17. The dashed curve S1 in Fig. 18 corresponds to the current Idet in Fig. 12. By adding the transistor Tr24, the current Idet can be rapidly increased as shown by the solid curve S5 in Fig. 18. Therefore, the addition of the transistor Tr24 can increase the speed at which the current is extracted.

[0053] Fig. 19 is a diagram showing a fifth example of the level shift circuit and the protection circuit. In Fig. 19, a resistor R5 is inserted between the connection point of the resistors R1 and R2 (see Fig. 2) and the diode circuit. The operating point of the transistor Tr21 of the protection circuit 30 can be adjusted by the product of the resistance value of the resistor R5 and the current Iref flowing through the resistor R5, and the entire curve of the current Idet can be shifted.

[0054] Fig. 20 is a waveform diagram showing the operation of the level shift circuit 20c and the protection circuit 30 shown in Fig. 19. The dashed curve S1 in Fig. 20 corresponds to the current Idet in Fig. 12. By adding a resistor R4, the entire current Idet can be shifted as shown by the solid curve S6 in Fig. 20.

[0055] Fig. 21 is a diagram showing a sixth example of a level shift circuit and a protection circuit. In Fig. 21, a protection circuit 30b is adopted, which is obtained by adding a transistor Tr23 to the protection circuit 30a in Fig. 15. The transistor Tr23 is provided on the reference potential side of the transistor Tr21. The transistor Tr23 corresponds to the fifth transistor in the present disclosure.

[0056] A control current Icont is applied to the base of the transistor Tr23. The control current Icont corresponds to a predetermined control signal in the present disclosure. As described later, the operation of extracting the current Idet can be turned on or off by applying the control current Icont according to the operation mode of the power amplifier.

[0057] FIG. 22 is a waveform diagram showing the operation of the level shift circuit 20c and the protection circuit 30 shown in FIG. 21. The dashed curve S1 in FIG. 22 corresponds to the current Idet in FIG. 12. By turning on the transistor Tr23 and turning on the operation of extracting the current Idet, the current Idet increases in response to an increase in the detection voltage Vdet, as shown by the dashed line in FIG. 22. On the other hand, by turning off the transistor Tr23 and turning off the operation of extracting the current Idet, the current Idet does not increase even if the detection voltage Vdet increases, as shown by the solid line S7 in FIG. In this way, the operation of extracting the current Idet can be turned on or off by the control current Icont applied according to the operation mode of the power amplifier.

[0058] Incidentally, the configurations of the level shift circuit and the protection circuit described with reference to Fig. 11 to Fig. 22 can be combined. Fig. 23 is a diagram showing a first example of a combination of a level shift circuit and a protection circuit. The first example shown in Fig. 23 is an example of a combination of the level shift circuit 20a described with reference to Fig. 13 and the protection circuit 30b described with reference to Fig. 21. The configuration of the first example shown in Fig. 23 can prevent the current Idet from flowing in the reverse direction, and can turn on or off the operation of extracting the current Idet.

[0059] Fig. 24 is a diagram showing a second example of a combination of a level shift circuit and a protection circuit. The second example shown in Fig. 24 is an example in which the transistor Tr24 described with reference to Fig. 17 is added to the level shift circuit 20a described with reference to Fig. 13, and further combined with the protection circuit 30b described with reference to Fig. 21. The configuration of the second example shown in Fig. 24 can prevent the current Idet from flowing in the reverse direction, can turn on or off the operation of drawing out the current Idet, and can increase the speed at which the current is drawn out.

[0060] (effect) According to the power amplifier 100a of the first embodiment, it is possible to prevent the breakdown of the transistors included in the amplifying section. Moreover, when the detection voltage Vdet exceeds a predetermined voltage, the current is continuously drawn, so that the protection state continues and the breakdown protection can be performed more reliably.

[0061] <Second embodiment> (composition) Fig. 25 is a diagram showing a power amplifier 100b according to a second embodiment of the present disclosure. In Fig. 25, the power amplifier 100b according to the second embodiment has a configuration in which the level shift circuit 20a described with reference to Fig. 13 and the protection circuit 30b described with reference to Fig. 21 are employed in the power amplifier 100a according to the second embodiment.

[0062] 25, the power amplifier 100b according to the second embodiment includes amplifying units PA1, PA2, and PA3, and bias circuits B11, B12, and B13 corresponding thereto, similarly to the power amplifier 100a according to the first embodiment. The bias circuits B11, B12, and B13 have the same configuration as the bias circuits B11 and B12 of the power amplifier 100a. However, the base of the transistor TrD32 of the bias circuit B13 is connected to the base of the transistor Tr23 of the protection circuit 30b. As a result, the transistor TrD32 and the transistor Tr23 form a current mirror circuit.

[0063] (operation) When the control voltage applied to the bias input terminal IB2 exceeds a predetermined value, the transistor Tr23 is turned on and the protection circuit 30b operates. As a result, similar to the power amplifier 100a according to the first embodiment, a current is drawn according to the detection voltage Vdet, and the transistors Tr1 and Tr2 are protected. When the voltage applied to the bias input terminal IB2 is less than a predetermined value, the transistor Tr23 is turned off and the protection circuit 30b does not operate.

[0064] (effect) The protection state of each of the transistors Tr1 and Tr2 can be set to on or off according to a control voltage applied to the bias input terminal IB2.

[0065] <Third embodiment> (composition) 26 is a diagram illustrating a power amplifier 100c according to a third embodiment of the present disclosure. The power amplifier 100c according to the third embodiment is capable of supporting amplification operations for two different wireless communication methods. The power amplifier 100c realizes, for example, an amplification operation corresponding to a 2G (2nd Generation) wireless communication method (hereinafter referred to as a 2G mode) and an amplification operation corresponding to a 5G (5th Generation) wireless communication method (hereinafter referred to as a 5G mode).

[0066] 26, a power amplifier 100c according to the third embodiment includes a first-stage amplifier unit PA1 and second-stage amplifier units PA21 and PA22. The output of the amplifier unit PA1 is input to the amplifier units PA21 and PA22. The amplifier units PA21 and PA22 are a pair of differential amplifier units.

[0067] Between the input terminal Pin and the amplifier section PA1, a capacitor Cin, inductors L12 and L13 connected in series, and a diode section D11 are provided.

[0068] The amplifier unit PA1 includes a multi-finger transistor Tr1a, a capacitor C11a connected to the collector of the transistor Tr1a, and a resistor R11a. The transistor Tr1a has a grounded emitter and forms an amplifier circuit.

[0069] Between the amplifier PA1 and the amplifiers PA21 and PA22, a diode section D12, a capacitor C12, and a balun T are provided. The balun T is realized by a transformer consisting of a primary winding L11 and a secondary winding L21. The primary winding L11 and the secondary winding L21 are electromagnetically coupled to each other. One end of the primary winding L11 of the balun T is connected to the collector of the amplifier PA1. The other end of the primary winding L11 is connected to the terminal T3. The primary winding L11 corresponds to the impedance element of the voltage detection circuit of the present disclosure. By using the primary winding L11, which is an impedance element, a DC voltage is output.

[0070] An amplified output of an amplifier PA21 is applied to one end of a secondary winding L21 of the balun T. An amplifier PA22 is connected to the other end of the secondary winding L21. A capacitor C210 is provided between both ends of the secondary winding L21.

[0071] The other end of the primary winding L11 of the balun T is connected to a level shift circuit 20. The level shift circuit 20 has transistors Tr11, Tr12, and Tr13 that operate as diodes. The level shift circuit 20 is connected to a protection circuit 30b. The configuration of the protection circuit 30b is as described with reference to FIG.

[0072] The amplifier PA21 includes a multi-finger transistor Tr211, a capacitor C211 connected to the collector of the transistor Tr211, and a resistor R212. The transistor Tr211 has a common emitter and forms an amplifier circuit. The capacitor C212 is connected between one end of the capacitor C211 and one end of the resistor R212.

[0073] The amplifier PA22 includes a multi-finger transistor Tr221, a capacitor C221 connected to the collector of the transistor Tr221, and a resistor R222. The transistor Tr221 has a common emitter and forms an amplifier circuit. The capacitor C222 is connected between one end of the capacitor C221 and one end of the resistor R222.

[0074] A diode section D21 is provided between the amplifier section PA21 and the output terminal Pout1. A diode section D22 is provided between the amplifier section PA22 and the output terminal Pout2. Capacitors C31 and C32 connected in series and an inductor L22 are provided between the amplifier sections PA21, PA22 and the output terminals Pout1, Pout2. One end of the inductor L22 is connected to the connection point between the capacitors C31 and C32. The other end of the inductor L22 is connected to the emitter of the transistor Tr211.

[0075] A bias circuit B21 is provided corresponding to the amplifier PA1. The bias circuit B21 has a multi-finger transistor TrB1a, a transistor TrB1b, a capacitor CB11 connected between the base of the transistor TrB1a and a reference potential, a capacitor CB12 connected between the collector and base of the transistor TrB1b, a resistor RB11, and a resistor RB12. When the transistor TrB1a is turned on, a bias current is supplied to the amplifier PA1. In addition, a capacitor Cb and a diode Db are connected between the power supply terminal Vbat and the reference potential of each of the bias circuits B21 and B22.

[0076] A bias circuit B22 is provided corresponding to the amplifiers PA21 and PA22. The bias circuit B22 has multi-finger transistors TrB21 and TrB22, a capacitor CB21 connected between the bases of the transistors TrB21 and TrB22 and a reference potential, transistors TrD21 and TrD22 operating as diodes, and a resistor RB22. When the transistor TrB21 is turned on, a bias current is supplied to the amplifier PA21. When the transistor TrB22 is turned on, a bias current is supplied to the amplifier PA22.

[0077] Terminals T1, T2, T5, T21, and T22 are connected to a reference potential. A power supply voltage is applied to terminal T3. When the power supply voltage is applied to terminal T3, a DC voltage appearing in primary winding L11 is input to level shift circuit 20 as detection voltage Vdet. A control current Icont is applied to terminal T4. By turning transistor Tr23 of protection circuit 30 to an on or off state by control current Icont, the operation of drawing current of protection circuit 30 (hereinafter referred to as current drawing operation) can be set to an on or off state.

[0078] (operation) In the power amplifier 100c, the wireless communication in the 2G mode and the wireless communication in the 5G mode have different output powers. Specifically, the amplitude of the radio frequency signal RFout1 output from the collector of the transistor Tr211 of the amplifier PA21 and the amplitude of the radio frequency signal RFout2 output from the collector of the transistor Tr221 of the amplifier PA22 are different between the 2G mode and the 5G mode.

[0079] Also, the power supply voltage applied to terminal T3 differs between 2G mode and 5G mode. In 2G mode, the current extraction operation is turned on by applying a control current Icont. On the other hand, if the power supply voltage applied to terminal T3 is high in 5G mode, the detection voltage Vdet becomes large and the current extraction operation is turned on. Therefore, in 5G mode, the control current Icont is set to, for example, 0 amperes. This turns transistor Tr23 off, so the current extraction operation is set to the off state and the current extraction operation can be prevented from being turned on.

[0080] (effect) In the case of 2G mode, which has strict destructive test conditions, a predetermined control current Icont other than 0 amperes is applied to activate the protection circuit 30. This allows the current Idet to flow, and the current is drawn out to lower the output power level of the amplifier PA1, thereby reducing the power transmitted from the primary winding L11 side of the balun T to the secondary winding L21 side. This makes it possible to prevent the destruction of the transistor Tr211 of the amplifier PA21 and the transistor Tr221 of the amplifier PA22. On the other hand, in the case of 5G mode, the control current Icont is set to 0 amperes to prevent the current drawing operation from being turned on.

[0081] <Example of power amplifier layout> 27 to 29 are diagrams showing examples of layouts when the power amplifier of the present disclosure is realized on a substrate. Fig. 27 to Fig. 29 are diagrams showing schematic layouts when the power amplifier is realized on a substrate.

[0082] 27, a power amplifier 100d includes an amplifier unit PA1, an amplifier unit PA2, an amplifier unit PA3, a voltage detection circuit 10, a level shift circuit 20, a protection circuit 30, and power supply wiring VC1 and VC2 for supplying a power supply voltage applied to a power supply terminal. Note that the power supply wirings for supplying the power supply voltage applied to the power supply terminals VC1 and VC2 are denoted by the same reference symbols "VC1" and "VC2", respectively.

[0083] The amplifier unit PA1 is a first stage, i.e., an initial stage amplifier unit. The amplifier unit PA2 is a second stage, i.e., an intermediate stage amplifier unit. The amplifier unit PA3 is a third stage, i.e., a final stage amplifier unit. The final stage amplifier unit PA3 generates more heat than the amplifier units PA1 and PA2. Therefore, in the power amplifier 100d, as shown in FIG. 27, the level shift circuit 20 is provided near the third amplifier unit PA3. By laying out each unit in this way, it is expected that the level shift circuit 20 will be thermally coupled to the third amplifier unit PA3. By thermally coupling the level shift circuit 20 to the third amplifier unit PA3, the threshold value of the transistor in the level shift circuit 20 can be lowered when the input power level becomes high.

[0084] 28, in the power amplifier 100e, unlike the power amplifier 100d described with reference to FIG. 27, the protection circuit 30 is provided near the third amplification unit PA3. By laying out each unit in this manner, it is expected that the protection circuit 30 will be thermally coupled to the third amplification unit PA3. By thermally coupling the protection circuit 30 to the third amplification unit PA3, the protection circuit 30 can start operating at a low power supply voltage compared to when the output power of the power amplifier 100e is low.

[0085] 29, in the power amplifier 100f, the level shift circuit 20 and the protection circuit 30 are provided near the third amplification unit PA3. By laying out each unit in this way, it is expected that the level shift circuit 20 and the protection circuit 30 will be thermally coupled to the third amplification unit PA3. By thermally coupling the level shift circuit 20 and the protection circuit 30 to the third amplification unit PA3, the threshold value of the transistor in the level shift circuit 20 can be lowered, and the protection circuit 30 can start operating at a lower power supply voltage than when the output power of the power amplifier 100e is low. [Explanation of symbols]

[0086] 10, 10a, 10b, 10c Voltage detection circuit 20, 20a, 20b, 20c Level shift circuit 30, 30a, 30b protection circuit 100, 100a-100f Power amplifier B11, B12, B13, B21, B22 bias circuits IB1, IB2 Bias input terminals L1, L2, L3 choke coils PA1, PA2, PA3, PA21, PA22 Amplification section Pin Input terminal Pout, Pout1, Pout2 output terminals T-Balun

Claims

1. A power amplifier having a plurality of amplifier stages using common-emitter transistors, a first amplifier unit having a first transistor for amplifying an input high frequency signal; a second amplifier having a second transistor for amplifying an output of the first amplifier; a voltage detection circuit including at least an impedance element and disposed between the first transistor and the second transistor; a protection circuit that reduces a base bias current applied to at least one of the first transistor and the second transistor based on an output of the voltage detection circuit; A power amplifier comprising:

2. The voltage detection circuit includes: A first resistor; a second resistor connected to the first resistor; as the impedance element, The output is obtained from a connection point between the first resistor and the second resistor.

2. The power amplifier of claim 1.

3. the first resistor is electrically connected to a collector of the first transistor; the second resistor is electrically connected to a collector of the second transistor; The output is obtained from a connection point between the first resistor and the second resistor.

3. The power amplifier of claim 2.

4. The impedance element further includes a first capacitor connected in series to either the first resistor or the second resistor.

4. The power amplifier of claim 3.

5. the first resistor is electrically connected to a collector of the first transistor; the second resistor is electrically connected to a collector of the second transistor; a third resistor electrically connected to the collector of the first transistor; a second capacitor connected in series with the third resistor; as the impedance element, The third resistor and the second capacitor are connected in parallel to the first resistor and the second resistor.

3. The power amplifier of claim 2.

6. a first bias circuit that provides a bias current to the first transistor; and a second bias circuit that provides a bias current to the second transistor. Further comprising: The protection circuit includes: a third transistor that is turned on based on an output of the voltage detection circuit, and when the third transistor is turned on, a bias current provided from the first bias circuit to the first transistor and a bias current provided from the second bias circuit to the second transistor are reduced.

3. The power amplifier according to claim 1 or 2.

7. a level shift circuit for converting a level of a voltage output from the voltage detection circuit; the level shift circuit includes a diode circuit including one or more diodes; The protection circuit includes:

7. The power amplifier according to claim 6, wherein a bias current applied to the first transistor and the second transistor is reduced based on a voltage whose level has been converted by the level shift circuit.

8. the level shift circuit further includes a fourth resistor connected in series with the diode circuit; 8. The power amplifier according to claim 7, wherein a third transistor is turned on by a voltage divided by said diode circuit and said fourth resistor.

9. the level shift circuit further includes a fourth transistor that is turned on by the voltage whose level is converted by the diode circuit; 9. The power amplifier according to claim 8, wherein a predetermined power supply voltage is input to the base of said third transistor when said fourth transistor is in an on state.

10. 8. The power amplifier according to claim 7, further comprising a backflow prevention element for preventing a backflow of current from said third transistor to said first bias circuit and said second bias circuit.

11. a fifth transistor that is turned on or off in response to a predetermined control signal; 8. The power amplifier according to claim 7, wherein when said fifth transistor is in an on state, said third transistor is in an on state, thereby reducing bias current applied to said first transistor and said second transistor.

12. 8. The power amplifier according to claim 7, wherein the level shift circuit further includes a fifth resistor connected in series between the voltage detection circuit and the diode circuit of the level shift circuit.

13. a balun having a primary winding and a secondary winding; the primary winding is electrically connected to the first amplifier section; the secondary winding is electrically connected to the second amplifier section; The voltage detection circuit uses the primary winding as the impedance element, and obtains the output using the primary winding.

2. The power amplifier of claim 1.

14. The second amplifier unit is a pair of differential amplifiers electrically connected to the secondary winding; 14. The power amplifier of claim 13.

15. a third amplifier section that operates as a power stage for amplifying an output of the second amplifier section; The first amplifier unit; The second amplifier unit; The third amplifier unit; The voltage detection circuit; The protection circuit; The level shift circuit; are formed on one substrate, 8. The power amplifier according to claim 7, wherein at least one of the protection circuit and the level shift circuit is provided in the vicinity of the third amplifying section on the substrate.

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