Semiconductor device

Abstract

To provide a semiconductor device in which switching loss can be reduced by fast switching.SOLUTION: A semiconductor device includes a transistor part including a drain electrode, a source electrode, and a gate electrode and provided on a semiconductor substrate, a gate electrode pad provided on the semiconductor substrate, a gate connection member electrically connecting between a gate terminal and the gate electrode pad, a gate circuit part electrically connecting between the gate electrode pad and the gate electrode, and a case that accommodates the transistor part, the gate electrode pad, and the gate circuit part. The gate circuit part includes a parallel circuit of a capacitor and a resistor element, a first connection member electrically connecting the capacitor to the gate electrode pad, and a second connection member electrically connecting the capacitor to the gate electrode.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] FIELD An embodiment of the present invention relates to a semiconductor device. [Background technology]

[0002] Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) are power semiconductor devices capable of high-speed switching. MOSFETs can switch at higher speeds by lowering the output impedance of the circuit that drives the gate.

[0003] On the other hand, the wiring connected to each electrode of a MOSFET has a finite inductance, and this inductance can cause ringing or element destruction due to a surge voltage when high-speed switching is performed.

[0004] There is a strong demand to reduce switching losses by switching MOSFETs at high speed. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent No. 6729693 Summary of the Invention [Problem to be solved by the invention]

[0006] The embodiments provide a semiconductor device capable of performing high-speed switching and reducing switching loss. [Means for solving the problem]

[0007] The semiconductor device according to the embodiment includes a transistor section including a source electrode provided on a first surface of a semiconductor substrate and electrically connected to a source terminal, a drain electrode provided on a second surface of the semiconductor substrate opposite to the first surface and electrically connected to a drain terminal, and a gate electrode provided between the source electrode and the drain electrode, a gate electrode pad provided on the first surface, a gate connection member electrically connecting the gate electrode pad and a gate terminal, a gate circuit section provided on the first surface and electrically connected between the gate electrode pad and the gate electrode, and a case that houses the transistor section, the gate electrode pad, and the gate circuit section. The gate circuit section includes a capacitor, a resistive element connected in parallel to the capacitor, a first connection member electrically connecting one electrode of the capacitor to the gate electrode pad, and a second connection member electrically connecting the other electrode of the capacitor to the gate electrode. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a schematic plan view illustrating a semiconductor device according to a first embodiment. [Diagram 2] 2 is a schematic circuit diagram illustrating an equivalent circuit of the semiconductor device according to the first embodiment. [Diagram 3] FIG. 2 is a schematic cross-sectional view taken along line AA in FIG. [Figure 4] FIG. 2 is a schematic cross-sectional view taken along line BB in FIG. [Diagram 5] 5(a) to 5(c) are schematic cross-sectional views illustrating a capacitor that is a part of a semiconductor device according to a modification of the first embodiment. [Figure 6] FIG. 2 is a circuit diagram for simulating the switching characteristics of the semiconductor device according to the first embodiment. [Figure 7] 7 is a graph showing an example of characteristics during switching in the circuit of FIG. 6 when the inductance value of a gate circuit section is used as a parameter. [Figure 8]8(a) to 8(c) are schematic plan views illustrating semiconductor devices according to modifications of the first embodiment. [Figure 9] 9(a) to 9(c) are schematic plan views illustrating semiconductor devices according to modifications of the first embodiment. [Figure 10] 11 is a schematic perspective view illustrating a semiconductor device according to a second embodiment. FIG. [Figure 11] 11 is a schematic cross-sectional view of a capacitor that is a part of the semiconductor device of FIG. 10. [Figure 12] 12A and 12B are schematic perspective views illustrating a semiconductor device according to a modification of the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios of each part may be different depending on the drawing. In this specification and each drawing, elements similar to those already explained are given the same reference numerals and detailed explanations are omitted as appropriate.

[0010] (First embodiment) FIG. 1 is a schematic plan view illustrating the semiconductor device according to the first embodiment. 1, a semiconductor device 100 according to this embodiment includes a transistor section 10, a gate electrode pad 20, and a gate circuit section 30. In this embodiment, the transistor section 10, the gate electrode pad 20, and the gate circuit section 30 are provided on a semiconductor substrate 1. The semiconductor substrate 1 includes, for example, Si.

[0011] 3, a source electrode 112 of the transistor section 10 is provided on the front surface side of the semiconductor substrate 1. A drain electrode 111 of the transistor section 10 is provided on the back surface of the semiconductor substrate 1. The transistor section 10 is, for example, a MOSFET.

[0012] In the following, the XYZ coordinate system may be used for explanation. The front surface of the semiconductor substrate 1 shown in Fig. 3 is the first surface 1a, and the back surface is the second surface 1b. The XY plane is parallel to the first surface 1a. The positive direction of the Z axis is the direction from the second surface 1b to the first surface 1a.

[0013] 1, the semiconductor device 100 includes a mount bed 101a, a source terminal 101b, and a gate terminal 101c. The semiconductor substrate 1 is provided on the conductive mount bed 101a. A drain electrode 111 provided on a second surface 1b of the semiconductor substrate 1 is electrically connected to the mount bed 101a via a bonding member such as solder. The mount bed 101a functions as the drain terminal of the transistor section 10.

[0014] A source terminal 101b is provided adjacent to the mount bed 101a in the Y-axis direction with a gap therebetween. A source connection wire 102b is provided between the source terminal 101b and the source electrode 112. The source connection wire 102b electrically connects the source terminal 101b and the source electrode 112.

[0015] The length of the source connecting wire 102b is sufficiently short. Preferably, a plurality of source connecting wires 102b are provided. By providing a plurality of short source connecting wires 102b, the inductance value from the source electrode 112 to the source terminal 101b can be reduced. A wide ribbon-shaped connecting member may be used instead of the source connecting wire 102b. The inductance value of the connecting member decreases as the width of the connecting member increases, so that the inductance value of the connecting member can be further reduced by forming the connecting member in a wide ribbon shape.

[0016] A gate terminal 101c is provided adjacent to the mount bed 101a in the X-axis direction with a gap therebetween. A gate connection wire (gate connection member) 102c is provided between the gate terminal 101c and the gate electrode pad 20, and the gate connection wire 102c electrically connects the gate terminal 101c and the gate electrode pad 20.

[0017] The length of the gate connection wire 102c is sufficiently short. Preferably, a plurality of gate connection wires 102c are provided. By providing a plurality of short gate connection wires 102c, the inductance value from the gate electrode pad 20 to the gate terminal 101c can be reduced. A ribbon-shaped wide connection member may be used instead of the gate connection wire 102c. Since the gate connection wire 102c is connected in series to the gate wiring 60, the inductance value of the series circuit of the gate connection wire 102c and the gate wiring 60 can be reduced by reducing the inductance value of the gate connection wire 102c.

[0018] The mount bed 101a on which the semiconductor substrate 1 is mounted, the source terminal 101b, the source connecting wire 102b, the gate terminal 101c, and the gate connecting wire 102c are housed in a case 101. The case 101 contains, for example, epoxy resin. In Fig. 1, the case 101 is represented by a two-dot chain line in order to clearly illustrate the semiconductor substrate 1, the mount bed 101a, the source terminal 101b, the source connecting wire 102b, the gate terminal 101c, and the gate connecting wire 102c.

[0019] The gate circuit section 30 includes a capacitor 40, a resistive element 50, and a gate wiring 60. The gate wiring 60 includes wirings 61, 62, and 63.

[0020] In a plan view, the transistor portion 10, the gate electrode pad 20, the capacitor 40, and the resistive element 50 are arranged so as not to overlap one another on the semiconductor substrate 1. An arrangement in which these circuit components do not overlap means that the circuit components are arranged apart in the surface direction of the semiconductor substrate 1 (in a plan view).

[0021] The capacitor 40 is disposed adjacent to the gate electrode pad 20. The resistive element 50 is disposed adjacent to the gate electrode pad 20. The resistive element 50 is also disposed adjacent to the transistor section 10. In the specific example of FIG. 1, the gate electrode pad 20 and the resistive element 50 are disposed on the positive side of the capacitor 40 in the Y-axis direction. The gate electrode pad 20 and the resistive element 50 are disposed side by side in the X-direction. The transistor section 10 is disposed on the positive side of the gate electrode pad 20 and the resistive element 50 in the Y-axis direction.

[0022] The wiring 63 surrounds the outer periphery of the transistor portion 10. As described later with reference to Figures 3 and 4, the wiring 63 is electrically connected to the gate electrode 5 of the transistor portion 10, and leads the gate electrode 5 out from the transistor portion 10.

[0023] The wiring (first wiring member) 61 is provided between the gate electrode pad 20 and the capacitor 40, and electrically connects the gate electrode pad 20 and the capacitor 40.

[0024] The wiring (second wiring member) 62 is provided between the transistor section 10 and the capacitor 40, and electrically connects the capacitor 40 to a wiring 63 connected to the gate electrode of the transistor section 10.

[0025] The wirings 61, 62, and 63 have sufficiently small inductance values, so that the inductance value of the gate wiring 60 is sufficiently small.

[0026] The resistive element 50 is provided between the wirings 61 and 62, electrically connected to the wirings 61 and 62 at both ends of the resistive element 50, and connected in parallel to the capacitor 40.

[0027] The circuit configuration of the semiconductor device 100 will be described. FIG. 2 is a schematic circuit diagram illustrating an equivalent circuit of the semiconductor device according to the first embodiment. As shown in FIG. 2, an equivalent circuit EC corresponding to the semiconductor device 100 in FIG. 1 has a transistor portion 10a, a gate electrode pad G1, and a gate circuit portion 30a.

[0028] The gate circuit section 30a is connected between the gate electrode G0 of the transistor section 10a and the gate electrode pad G1. The gate circuit section 30a includes a capacitor 40a, a resistive element 50a, and a gate wiring 60a. The capacitor 40a and the resistive element 50a are connected in parallel. The parallel circuit of the capacitor 40a and the resistive element 50a is connected in series to the gate wiring 60a.

[0029] The correspondence between the components of the semiconductor device 100 in Fig. 1 and the equivalent circuit EC is as follows: the transistor section 10a corresponds to the transistor section 10 in Fig. 1, the gate electrode pad G1 corresponds to the gate electrode pad 20 in Fig. 1, and the gate circuit section 30a corresponds to the gate circuit section 30 in Fig. 1. In the gate circuit sections 30 and 30a, the resistive element 50a corresponds to the resistive element 50 in Fig. 1, the capacitor 40a corresponds to the capacitor 40 in Fig. 1, and the gate wiring 60a corresponds to the gate wiring 60 in Fig. 1.

[0030] The gate wiring 60a includes impedance elements 61a, 62a, and 63a. The impedance elements 61a, 62a, and 63a are connected in series. The impedance elements 61a, 62a, and 63a have inductance values ​​according to the impedance elements 61a, 62a, and 63a, respectively.

[0031] The impedance elements 61a, 62a, and 63a correspond to the wirings 61, 62, and 63, respectively, in Fig. 1. The inductance values ​​of the impedance elements 61a, 62a, and 63a correspond to the inductance values ​​of the wirings 61, 62, and 63, respectively.

[0032] The inductance value of a wiring is based on the length, width, and thickness of the wiring. Specifically, the shorter the length of the wiring, the smaller the inductance value of the wiring. The wider the width of the wiring, the smaller the inductance value of the wiring. The thicker the wiring, the smaller the inductance value of the wiring. In other words, the inductance values ​​of the wirings 61, 62, and 63 can be reduced by shortening the length, widening the width, and increasing the thickness of the wirings 61, 62, and 63.

[0033] In the semiconductor device 100 according to this embodiment, a capacitor 40 is connected between the gate electrode pad 20 and the gate electrode of the transistor section 10. Since the capacitor 40 is connected in series to the gate electrode of the transistor section 10, the capacitance value seen from the gate electrode pad 20 is approximately the combined capacitance value of the capacitance value of the capacitor 40 and the input capacitance value of the transistor section 10.

[0034] For example, if the capacitance value of capacitor 40 is set to be approximately the same as the input capacitance value of transistor section 10, the combined capacitance value will be approximately half the input capacitance value. If transistor section 10 is driven with the same impedance as when capacitor 40 is not connected, it will be possible to increase the voltage of the gate electrode to the gate threshold value and decrease it from the gate threshold value in approximately half the time it takes when capacitor 40 is not connected.

[0035] The switching speed of the transistor section 10 can be increased by connecting the capacitor 40 having a sufficient capacitance value in series to the gate electrode of the transistor section 10. The resistive element 50 connected in parallel to the capacitor 40 has a function of suppressing a surge voltage by adjusting the switching speed after the capacitance of the capacitor 40 is charged and discharged. The resistive element 50 has a resistance value of, for example, about several Ω to about 100 Ω.

[0036] In this way, when the capacitor 40 is connected in series to the gate electrode of the transistor section 10 to increase the switching speed of the transistor section 10, in the operation of the semiconductor device 100 according to this embodiment in which the charging and discharging of the capacitor 40 is completed during gate driving, a sudden change in the charging and discharging current and the parasitic inductance of the gate current path cause a false off or false on when the gate voltage passes through the threshold value, resulting in increased switching loss.

[0037] Such false-off and false-on operations can cause ringing in the gate current or main circuit, raising concerns about increased noise and element destruction.

[0038] In the semiconductor device 100 according to this embodiment, the capacitor 40 and the resistive element 50 are provided on the same semiconductor substrate 1 as the transistor section 10 and the gate electrode pad 20. The capacitor 40 and the gate electrode pad 20 are then arranged adjacent to each other, and the capacitor 40 and the transistor section 10 are arranged as close as possible to each other, thereby reducing the inductance value of the gate wiring 60. Furthermore, by keeping the inductance value of the gate connection wire 102c that electrically connects between the gate electrode pad 20 and the gate terminal 101c in the case 101 small, the resonance frequency on the gate side of the transistor section 10 is made sufficiently high, thereby suppressing vibration on the gate side due to resonance.

[0039] In this way, in the semiconductor device 100, even if the capacitor 40 is connected in series to the gate electrode, it is possible to suppress the oscillation on the gate side and prevent an increase in surge voltage due to the occurrence of ringing on the drain side, thereby making it possible to increase the switching speed of the transistor section 10 while reducing switching loss.

[0040] FIG. 3 is a schematic cross-sectional view taken along line AA in FIG. FIG. 3 shows the configuration of the capacitor 40. In the following description, the transistor section 10 will be described as an n-channel MOSFET. By interchanging the n-type impurities with the p-type impurities, the transistor section 10 can be made into a p-channel MOSFET.

[0041] As shown in FIG. 3, the capacitor 40 includes a first capacitor electrode 42, a dielectric film 43, and a second capacitor electrode 44. The capacitor 40 is provided on the n-type drift layer 2 via an insulating layer 41. The insulating layer 41 includes, for example, a Si oxide or a Si nitride. The n-type drift layer 2 is provided on a semiconductor substrate 1. The semiconductor substrate 1 includes an n-type impurity. The impurity concentration of the n-type drift layer 2 is lower than the impurity concentration of the semiconductor substrate 1. The semiconductor substrate 1 is provided on a drain electrode 111.

[0042] The first capacitor electrode 42 is provided on the insulating layer 41. The first capacitor electrode 42 includes, for example, polycrystalline Si. The first capacitor electrode 42 may include a metal material such as Al, Cu, or Ti.

[0043] A dielectric film 43 is provided on the first capacitor electrode 42. The dielectric film 43 is also provided on the insulating layer 41. The dielectric film 43 includes, for example, a Si oxide or a Si nitride. The dielectric film 43 may be an insulating material having a high dielectric constant, such as a Hf oxide. The materials forming the insulating layer 41 and the dielectric film 43 may be the same or different.

[0044] The second capacitor electrode 44 is provided on the dielectric film 43. The second capacitor electrode 44 is provided on the first capacitor electrode 42 via the dielectric film 43. The second capacitor electrode 44 includes, for example, polycrystalline Si. The second capacitor electrode 44 may include a metal material such as Al, Cu, Ti, etc. The materials forming the first capacitor electrode 42 and the second capacitor electrode 44 may be the same or different.

[0045] The first capacitor electrode 42 is connected to, for example, the wiring 61 shown in FIG. 1. The second capacitor electrode 44 is connected to, for example, the wiring 62 shown in FIG. 1. The first capacitor electrode 42 and the wiring 61 may be formed of the same material. The second capacitor electrode 44 and the wiring 62 may be formed of the same material. By forming the capacitor electrode and the wiring from the same material, the process of forming these components can be simplified.

[0046] The capacitance value of the capacitor 40 can be increased by reducing the thickness of the dielectric film 43 between the first capacitor electrode 42 and the second capacitor electrode 44. The capacitance value of the capacitor 40 can be increased by using a material with a high dielectric constant for the dielectric film 43.

[0047] FIG. 4 is a schematic cross-sectional view taken along line BB in FIG. FIG. 4 shows the configuration of the transistor section 10. As shown in FIG. 4, the transistor portion 10 includes an n-type drift layer 2, a p-type base layer 3, an n-type source layer 4, a gate electrode 5, and a gate insulating film 6.

[0048] The n-type drift layer 2 is provided on the drain electrode 111. The p-type base layer 3 is provided on the n-type drift layer 2. The n-type source layer 4 is selectively provided on the p-type base layer 3.

[0049] The gate electrode 5 faces the p-type base layer 3 via the gate insulating film 6. The gate electrode 5 faces the n-type source layer 4 via the gate insulating film 6. The gate electrode 5 faces a part of the n-type drift layer 2 via the gate insulating film 6. A plurality of gate electrodes 5 are provided and aligned, for example, in the X direction. Although not shown, a plurality of gate electrodes 5 are also aligned, for example, in the Y direction. The gate electrodes 5 are aligned, for example, in a matrix shape in a plan view.

[0050] The gate electrode 5 includes, for example, polycrystalline Si, and the gate insulating film 6 includes, for example, Si oxide.

[0051] 4, the gate electrode 5 has, for example, a cylindrical shape extending in the Z direction, and the shape of this cylinder in a plan view is, for example, a circle, an ellipse, a rectangle, or a hexagon. A field plate structure 7 is provided inside the cylindrical shape formed by the gate electrode 5. The field plate structure 7 includes a field plate electrode (conductor) 7a and an insulating film 7b1.

[0052] In the field plate structure 7, the field plate electrode 7a faces the gate electrode 5 via an insulating film (second insulating film) 7b2. The field plate electrode 7a extends further downward from the gate electrode 5, and an insulating film (first insulating film) 7b1 surrounds the field plate electrode 7a. Below the gate electrode 5, the field plate electrode 7a faces the n-type drift layer 2 via the insulating film 7b1.

[0053] The field plate electrode 7a includes, for example, polycrystalline Si. The field plate electrode 7a can be formed of the same material as the gate electrode 5. The insulating films 7b1 and 7b2 include, for example, Si oxide.

[0054] The interlayer insulating film 8 is provided on the gate electrode 5 and the field plate electrode 7a. The interlayer insulating film 8 covers a part of the n-type source layer 4.

[0055] The source electrode 112 is provided on the interlayer insulating film 8. The source electrode 112 is provided on the n-type source layer 4 and the p-type base layer 3 that are not covered with the interlayer insulating film 8, and is electrically connected to the n-type source layer 4 and the p-type base layer 3.

[0056] Although not shown, the resistive element 50 is provided, for example, on the n-type drift layer 2 via an insulating layer, and includes, for example, polycrystalline Si including n-type or p-type impurities. The resistive element 50 may be, for example, a p-type semiconductor layer provided on the n-type drift layer 2. The resistive element 50 is provided, for example, on the n-type drift layer 2 via an insulating layer, and may be, for example, a film including tungsten, aluminum, nickel, titanium, or the like. The resistive element 50 is provided, for example, on the n-type drift layer 2 via an insulating layer, and may be, for example, a high resistance film using SiN, semi-insulating polycrystalline silicon (SIPOS), or the like.

[0057] In addition to the above, the following modifications can be applied to the capacitor. 5(a) to 5(c) are schematic cross-sectional views illustrating a capacitor that is a part of a semiconductor device according to a modification of the first embodiment. As shown in FIG. 5( a ), a capacitor 140 of the modified example includes a first capacitor electrode 142 , a dielectric film 143 , and a second capacitor electrode 144 .

[0058] The first capacitor electrode 142 is provided on the n-type drift layer 2. The first capacitor electrode 142 is a semiconductor layer containing p-type impurities. The impurity concentration of the first capacitor electrode 142 is, for example, approximately equal to the impurity concentration of the p-type base layer 3 of the transistor portion 10 shown in FIG.

[0059] 5(a), the first capacitor electrode 142 is selectively provided on the n-type drift layer 2, and the dielectric film 143 is also provided on the n-type drift layer 2. The dielectric film 143 includes, for example, a Si oxide or a Si nitride. The dielectric film 143 may be an insulating material having a high dielectric constant, such as a Hf oxide.

[0060] The second capacitor electrode 144 is provided on the dielectric film 143. The second capacitor electrode 144 is provided on the first capacitor electrode 142 via the dielectric film 143. The second capacitor electrode 144 includes, for example, polycrystalline Si. The first capacitor electrode 142 may be made of a metal material such as Al, Cu, or Ti.

[0061] In the embodiment of FIG. 5( a ), an insulating layer 145 is provided on the second capacitor electrode 144 .

[0062] In the modified capacitor 140 shown in FIG. 5(a), the first capacitor electrode 142 is a semiconductor layer containing p-type impurities, so that it can be formed simultaneously with the p-type base layer 3 of the transistor section 10 shown in FIG. 4.

[0063] 5(b), a capacitor 140a according to another modified example includes a first capacitor electrode 145a, a dielectric film 147b2, and a second capacitor electrode 147a1. The first capacitor electrode 145a faces the n-type drift layer 2 via an insulating film (third insulating film) 146a. The first capacitor electrode 145a has a cylindrical shape extending in the Z direction, for example. The cylindrical shape is, for example, circular, elliptical, rectangular, or hexagonal in plan view.

[0064] A plurality of first capacitor electrodes 145a are provided and are aligned, for example, in the X direction. Although not shown, a plurality of first capacitor electrodes 145a are also aligned in the Y direction. The first capacitor electrodes 145a are aligned, for example, in a matrix in plan view.

[0065] The second capacitor electrode 147a1 is provided inside the cylindrical first capacitor electrode 145a and extends in the Z direction from the front surface side of the n-type drift layer 2. The second capacitor electrode 147a1 faces the first capacitor electrode 145a with a dielectric film 147b2 interposed therebetween.

[0066] 5(b), the second capacitor electrode 147a1 is provided extending downward further than the first capacitor electrode 145a. An insulating film (fourth insulating film) 147b1 surrounds the second capacitor electrode 147a1 below the first capacitor electrode 145a. The second capacitor electrode 147a1 faces the n-type drift layer 2 below the first capacitor electrode 145a via the dielectric film 147b2.

[0067] An interlayer insulating film 148a is provided on the first capacitor electrode 145a, the dielectric film 147b2, and the second capacitor electrode 147a1. The interlayer insulating film 148a is also provided on the n-type drift layer 2. The interlayer insulating film 148a includes, for example, a Si oxide or a Si nitride.

[0068] The first capacitor electrode 145a includes, for example, polycrystalline Si. The first capacitor electrode 145a can be formed of the same material as the gate electrode 5. The second capacitor electrode 147a1 includes, for example, polycrystalline Si. The second capacitor electrode 147a1 can be formed of the same material as the field plate electrode 7a.

[0069] In this modification, the first capacitor electrode 145a can be formed in the same process as the gate electrode 5 by being made of the same material as the gate electrode 5. Moreover, the second capacitor electrode 147a1 can be formed in the same process as the field plate electrode 7a by being made of the same material as the field plate electrode 7a.

[0070] The second capacitor electrode 147a1 and the insulating film 147b1 constitute the structure 147a, and the process for forming the structure 147a can be shared with the process for forming the field plate structure .

[0071] 5(c), the capacitor 140b of this modification includes a first capacitor electrode 145a, a dielectric film 147b2, and a second capacitor electrode 147a1. In this modification, the capacitor 140b differs from the capacitor 140a shown in FIG. 5(b) in that the capacitor 140b further includes a p-type base layer 143b, an interlayer insulating film 148b, and a source electrode 112.

[0072] The p-type base layer 143b is provided on the n-type drift layer 2. The first capacitor electrode 145a faces the p-type base layer 143b via the insulating film 146a. The first capacitor electrode 145a faces a part of the n-type drift layer 2 via the insulating film 146a.

[0073] The p-type base layer 143b is a semiconductor layer containing p-type impurities. The impurity concentration of the p-type base layer 143b is substantially equal to the impurity concentration of the p-type base layer 3 of the transistor portion 10 shown in FIG.

[0074] The interlayer insulating film 148b is provided on the first capacitor electrode 145a, the dielectric film 147b2, and the second capacitor electrode 147a1. The interlayer insulating film 148b is provided on a portion of the p-type base layer 143b.

[0075] The interlayer insulating film 148b includes, for example, a Si oxide or a Si nitride, and can be made of the same material as the interlayer insulating film 8 of the transistor section 10 shown in FIG.

[0076] The source electrode 112 is provided on the interlayer insulating film 148b. The source electrode 112 is provided on the p-type base layer 143b through an opening provided in the interlayer insulating film 148b and is electrically connected to the p-type base layer 143b.

[0077] In this modification, by connecting the p-type base layer 143b and the second capacitor electrode 147a1 to the source electrode 112, the first capacitor electrode 145a faces the p-type base layer 143b on one side of the first capacitor electrode 145a and faces the second capacitor electrode 147a1 on the other side. Therefore, the capacitance value of the capacitor 140b can be made larger than that of the capacitor 140a shown in FIG. 5(b).

[0078] In this modification, the impurity concentration of the p-type base layer 143b is made equal to that of the p-type base layer 3, so that the p-type base layers 143b and 3 can be formed in the same process. By forming the interlayer insulating film 148b from the same material as the interlayer insulating film 8, the interlayer insulating films 148b and 8 can be formed in the same process.

[0079] As shown in the specific example, the transistor section 10, the capacitor 40, and the resistor element 50 are provided on an n-type drift layer 2 provided on a semiconductor substrate 1. The gate electrode 5 of the transistor section 10 can be electrically connected to a gate electrode pad 20, the capacitor 40, the resistor element 50, and a gate wiring 60 on the semiconductor device 100.

[0080] By appropriately arranging the transistor section 10, the gate electrode pad 20, the capacitor 40, and the resistive element 50 in a plan view, the length of the gate wiring 60 can be sufficiently shortened. Therefore, the inductance value of the gate wiring 60 can be kept small, vibration in the gate circuit of the transistor section 10 can be suppressed, and ringing on the drain side can be prevented.

[0081] The operation and effects of the semiconductor device 100 according to this embodiment will be described. FIG. 6 is a circuit diagram for simulating the switching characteristics of the semiconductor device according to the first embodiment. FIG. 7 is a graph showing an example of characteristics during switching in the circuit of FIG. 6 when the inductance value of the gate circuit section is used as a parameter. The area enclosed by the dashed line in Fig. 6 is the equivalent circuit EC shown in Fig. 2. In Fig. 6, transistor Q1 corresponds to transistor section 10 in Fig. 1, capacitor C1 corresponds to capacitor 40 in Fig. 1, and resistive element R1 corresponds to resistive element 50 in Fig. 1. Also, in Fig. 6, the inductance value of inductance L2 corresponds to the inductance value of a series circuit of gate wiring 60 and gate connecting wire 102c in Fig. 1. Inductance L1 represents the inductance value of the wiring between gate terminal 101c of semiconductor device 100 and signal generator SG.

[0082] The simulation circuit in Figure 6 shows a drive circuit that drives an inductive load L4. The transistor Q2 connected to both ends of the inductive load L4 shorts the gate and source and functions as a flywheel diode that clamps the voltage caused by the back electromotive force generated when the transistor Q1 is off.

[0083] Inductance L3 represents the inductance of the wiring between the source terminal of transistor Q1 and inductive load L4. When transistor Q1 is off, a voltage obtained by multiplying the time change in the current flowing through inductance L3 by the inductance value of inductance L3 is superimposed on the power supply voltage Vdd in a surge-like manner and applied between the drain and source of transistor Q1.

[0084] Resistor R0 represents the output resistance of the signal generator SG. The smaller the resistance value of resistor R0, the larger the current that can flow between the signal generator SG and the equivalent circuit EC. By adjusting the resistance value of resistor R0, the switching speed of transistor Q1 can be adjusted.

[0085] When an inductive load is driven by the transistor Q1, as described above, a surge-like voltage is superimposed on the power supply voltage when the transistor Q1 is turned off. Hereinafter, the maximum peak voltage applied between the drain and source of the transistor Q1 when the transistor Q1 is turned off is defined as the surge voltage Vsurge.

[0086] The vertical axis of Fig. 7 represents the switching loss Eoff when the transistor Q1 in Fig. 6 is turned off, expressed as energy. The horizontal axis of Fig. 7 represents the surge voltage Vsurge applied between the drain and source of the transistor Q1. In the plot of the graph in Fig. 7, the off time of the transistor Q1 is changed by varying the output resistance R0 of the signal generator SG.

[0087] In Figure 7, Vsurge and Eoff are plotted when the capacitance value of capacitor C1 is changed, with the inductance value L of the series circuit of inductances L1 and L2 as a parameter. In each plot, "◆" represents the simulation result when L = 15nH, "×" represents the case when L = 8nH, and "△" represents the case when L = 6nH. "●" represents the plot when both ends of capacitor C1 are shorted as in the conventional product, and R0 is changed.

[0088] As shown by the plot of "●" in Figure 7, the smaller the resistance value on the signal generator SG side, the faster the switching speed when turned off and the lower the switching loss Eoff. On the other hand, as the time rate of change of the current flowing through the inductance L3 on the load side of the transistor Q1 increases, the surge voltage Vsurge increases.

[0089] By enabling the capacitor C1, the transistor Q1 is made to switch faster than the plot indicated by the "●" and the switching loss Eoff is measured.

[0090] In each of the plots marked with "◆", "×", and "△", a resonant circuit is formed on the gate side of transistor Q1 by the inductance values ​​of the wiring inductances L1 and L2 and the capacitance value on the gate side of transistor Q1. This resonant circuit causes the gate side of transistor Q1 to oscillate, and this oscillation also causes the drain side of transistor Q1 to oscillate, resulting in ringing. The ringing on the drain side of transistor Q1 causes the drain current and drain-source voltage to cross multiple times, increasing the switching loss Eoff.

[0091] In the plot of "◆" in Figure 7 where the inductance value is 15nH, when the resistance value on the output side of the signal generator SG is made sufficiently small, the surge voltage Vsurge is generated mainly by the inductance L3 on the drain side of the transistor Q1. In this simulation result, the maximum surge voltage Vsurge is about 110V.

[0092] In the "◆" plot, as the resistance value R0 on the signal generator SG side is gradually increased, the surge voltage Vsurge does not decrease much, and the switching loss Eoff is also larger than in the "●" plot. This is because ringing occurs on the drain side of transistor Q1 in a resonant circuit formed by the inductance value on the gate side of transistor Q1, the capacitance value of capacitor C1, and the parasitic capacitance on the gate side of transistor Q1.

[0093] In the "x" plot for an inductance value of 8 nH, the surge voltage Vsurge decreases as the resistance value of resistor R0 on the signal generator SG side is reduced. For the same surge voltage Vsurge, the "x" plot has a lower switching loss Eoff when turned off than the "●" plot.

[0094] In this way, by making the inductance value on the gate side of transistor Q1 sufficiently small, it is possible to suppress the oscillation on the gate side and prevent the occurrence of ringing on the drain side. Preventing ringing on the drain side enables high-speed switching of transistor Q1, and the switching loss Eoff due to high-speed switching can be reduced.

[0095] In the "△" plot for an inductance value of 6 nH, the oscillation on the gate side of transistor Q1 is further suppressed, which further suppresses the ringing on the drain side of transistor Q1 and reduces the switching loss Eoff.

[0096] In this way, by inserting capacitor C1 as the gate circuit and keeping the inductance value of the wiring on the gate side small, ringing on the drain side can be prevented, enabling high-speed switching operation of the transistor and reducing switching losses.

[0097] The semiconductor device 100 according to this embodiment is configured based on the results of the above-mentioned simulation. That is, in the semiconductor device 100, the capacitor 40 and the resistive element 50 configure a parallel circuit, and are electrically connected between the gate electrode 5 of the transistor section 10 and the gate electrode pad 20 via the gate wiring 60.

[0098] Since the capacitor 40 is connected in series to the gate input capacitance of the transistor section 10, the capacitance value seen from the gate terminal 101c side is reduced, and therefore the substantial driving capability of the driving circuit is improved, enabling the switching speed of the transistor section 10 to be increased.

[0099] The transistor section 10, the gate electrode pad 20, the capacitor 40, and the resistive element 50 are appropriately arranged on the same semiconductor substrate 1. Therefore, the parallel circuit of the capacitor 40 and the resistive element 50 electrically connects the gate electrode 5 of the transistor section 10 and the gate electrode pad 20 at a sufficiently short distance. Therefore, the inductance value of the gate wiring 60 is suppressed to be sufficiently small. Moreover, by making the gate connection wire 102c sufficiently short and providing multiple thick wires, the inductance value of the gate connection wire 102c can also be made sufficiently small.

[0100] As a result, even when the capacitor 40 is connected between the gate electrode pad 20 and the gate electrode 5 of the transistor section 10 to perform high-speed switching of the transistor section 10, vibration on the gate side is suppressed and ringing on the drain side is prevented. By preventing ringing from occurring on the drain side of the transistor section 10, switching loss can be reduced.

[0101] For example, by making the wiring between a driving circuit for the semiconductor device 100, such as a signal generator, and the gate terminal 101c of the semiconductor device 100 sufficiently short and thick, it is possible to sufficiently reduce the inductance value of this wiring to approach 0. When the sum of the inductance value of this wiring and the inductance value of the series circuit of the gate connection wire 102c of the semiconductor device 100 and the gate wiring 60 is set to 8 nH or less, it becomes possible to reduce switching loss by increasing the switching speed.

[0102] (Modification) From the viewpoint of shortening the length of the gate wiring and reducing the inductance value of the wiring, the transistor portion, the gate electrode pad, the capacitor, and the resistive element can be appropriately arranged in a plan view. 8(a) to 9(c) are schematic plan views illustrating semiconductor devices according to modifications of the first embodiment. 8(a), in the semiconductor device 100a of the modified example, the capacitor 40 is arranged adjacent to the gate electrode pad 20. The capacitor 40 is also arranged adjacent to the transistor portion 10. The resistive element 50 is arranged between the transistor portion 10 and the gate electrode pad 20, and is arranged adjacent to the transistor portion 10 and the gate electrode pad 20. The gate wiring 60a includes wirings 61a1, 61a2, 62a1, and 62a2.

[0103] The wiring 63a is provided so as to surround the outer periphery of the transistor portion 10.

[0104] The wiring 61a1 is provided between the gate electrode pad 20 and the capacitor 40, and electrically connects the gate electrode pad 20 and the capacitor 40. The wiring 62a1 is provided between the transistor portion 10 and the capacitor 40, and electrically connects the wiring 63a and the capacitor 40.

[0105] The wiring 61a2 is provided between the gate electrode pad 20 and one end of the resistance element 50, and electrically connects the gate electrode pad 20 and one end of the resistance element 50. The wiring 62a2 is provided between the transistor portion 10 and the other end of the resistance element 50, and electrically connects the wiring 63a and the other end of the resistance element 50.

[0106] By arranging the gate electrode pad 20 and the capacitor 40 adjacent to each other, the wiring 61a1 can electrically connect the gate electrode pad 20 and the capacitor 40 with a sufficiently short length. By arranging the transistor portion 10 and the capacitor 40 adjacent to each other, the wiring 62a1 can electrically connect the wiring 63a and the capacitor 40 with a sufficiently short length. By making the lengths of the wirings 61a1 and 62a1 sufficiently short, the inductance values ​​of the wirings 61a1 and 62a1 can be reduced.

[0107] By arranging the gate electrode pad 20 and the resistive element 50 adjacent to each other, the wiring 61a2 can electrically connect the gate electrode pad 20 and one end of the resistive element 50 with a sufficiently short length. By arranging the transistor portion 10 and the resistive element 50 adjacent to each other, the wiring 62a2 can electrically connect the wiring 63a and the other end of the resistive element 50 with a sufficiently short length. By making the lengths of the wirings 61a2 and 62a2 sufficiently short, the inductance values ​​of the wirings 61a2 and 62a2 can be reduced.

[0108] The inductance value of the wiring can be reduced by shortening the length of the wiring, and can also be reduced by widening the width of the wiring. For example, in the semiconductor device 100a, the parasitic inductance of the wirings 61a1 and 62a2 can be reduced by making the widths of the wirings 61a1 and 62a2 sufficiently wide in accordance with the shape of the gate electrode pad 20. In addition, the inductance values ​​of the wirings 62a1 and 62a2 can be reduced by making the widths of the wirings 62a1 and 62a2 sufficiently wide in accordance with the shape of the transistor section 10.

[0109] 8(b), in the semiconductor device 100b of this modification, the gate electrode pad 20 is disposed between the transistor portion 10 and the capacitor 40, and is disposed adjacent to each of the transistor portion 10 and the capacitor 40. The resistive element 50 is disposed between the gate electrode pad 20, the transistor portion 10 and the capacitor 40, and is disposed adjacent to each of the transistor portion 10 and the capacitor 40. In addition, the gate electrode pad 20 and the resistive element 50 are disposed adjacent to each other. The gate wiring 60b includes wirings 61b1, 61b2, 62b1, 62b2, and 63b.

[0110] The wiring 63b is provided so as to surround the outer periphery of the transistor portion 10.

[0111] The wiring 61b1 is provided between the gate electrode pad 20 and the capacitor 40, and electrically connects the gate electrode pad 20 and the capacitor 40. The wiring 62b1 is provided between the capacitor 40 and the resistive element 50, and electrically connects the capacitor 40 and one end of the resistive element 50.

[0112] The wiring 61b2 is provided between the gate electrode pad 20 and the resistive element 50, and electrically connects the gate electrode pad 20 to the other end of the resistive element 50. The wiring 62b2 is provided between the transistor portion 10 and the resistive element 50, and electrically connects the wiring 63b to one end of the resistive element 50.

[0113] The wiring 61b1 can connect the gate electrode pad 20 and the capacitor 40 with a sufficiently short length by arranging the gate electrode pad 20 and the capacitor 40 adjacent to each other. The wiring 62b1 can connect the capacitor 40 and the resistive element 50 with a sufficiently short length by arranging the capacitor 40 and the resistive element 50 adjacent to each other. By making the lengths of the wirings 61b1 and 62b1 sufficiently short, the inductance values ​​of the wirings 61b1 and 62b1 can be reduced.

[0114] The wiring 61b2 can connect the gate electrode pad 20 and the resistive element 50 with a sufficiently short length by arranging the gate electrode pad 20 and the resistive element 50 adjacent to each other. The wiring 62b2 can connect the wiring 63b and the resistive element 50 with a sufficiently short length by arranging the transistor portion 10 and the resistive element 50 adjacent to each other. By making the lengths of the wirings 61b2 and 62b2 sufficiently short, the inductance values ​​of the wirings 61b2 and 62b2 can be reduced.

[0115] For example, by making the width of each of the wirings 61b1 and 61b2 sufficiently wide in accordance with the shape of the gate electrode pad 20, the inductance value of the wirings 61b1 and 61b2 can be reduced.

[0116] 8(c), in a semiconductor device 100c of the modified example, the gate electrode pad 20 is disposed between the transistor portion 10 and the capacitor 40, and is disposed adjacent to each of the transistor portion 10 and the capacitor 40. The resistive element 50 is disposed between the transistor portion 10 and the capacitor 40, and is disposed adjacent to each of the transistor portion 10 and the capacitor 40. The resistive element 50 is not disposed adjacent to the gate electrode pad 20. The gate wiring 60c includes wirings 61c1, 61c2, 62c1, 62c2, and 63c.

[0117] The wiring 63c is provided so as to surround the outer periphery of the transistor portion .

[0118] The wiring 61c1 is provided between the gate electrode pad 20 and the capacitor 40, and electrically connects the gate electrode pad 20 and the capacitor 40. The wiring 62c1 is provided between the capacitor 40 and the resistive element 50, and electrically connects the capacitor 40 and one end of the resistive element 50.

[0119] The wiring 61c2 is provided between the capacitor 40 and the resistive element 50, and electrically connects the capacitor 40 to the other end of the resistive element 50. The wiring 62c2 is provided between the transistor section 10 and the resistive element 50, and electrically connects the wiring 63c to one end of the resistive element 50. In this modification, since the resistive element 50 is not adjacent to the gate electrode pad 20, the resistive element 50 is electrically connected to the gate electrode pad 20 via the wiring 61c2, the capacitor 40, and the wiring 61c1. Also, since the capacitor 40 is not adjacent to the transistor section 10, the capacitor 40 is electrically connected to the wiring 63c via the wiring 62c1, the resistive element 50, and the wiring 62c2.

[0120] The wiring 61c1 can connect the gate electrode pad 20 and the capacitor 40 with a sufficiently short length by arranging the gate electrode pad 20 and the capacitor 40 adjacent to each other. The wiring 62c1 can connect the capacitor 40 and the resistive element 50 with a sufficiently short length by arranging the capacitor 40 and the resistive element 50 adjacent to each other. By making the lengths of the wirings 61c1 and 62c1 sufficiently short, the inductance values ​​of the wirings 61c1 and 62c2 can be reduced.

[0121] The wiring 61c2 can connect the capacitor 40 and the resistive element 50 with a sufficiently short length by arranging the capacitor 40 and the resistive element 50 adjacent to each other. The wiring 62c2 can connect the wiring 63c and the resistive element 50 with a sufficiently short length by arranging the transistor portion 10 and the resistive element 50 adjacent to each other. By making the lengths of the wirings 61c2 and 62c2 sufficiently short, the inductance values ​​of the wirings 61c2 and 62c2 can be reduced.

[0122] For example, by making the width of the wirings 61c1 and 61c2 sufficiently wide in accordance with the shape of the gate electrode pad 20, the inductance values ​​of the wirings 61c1 and 61c2 can be reduced.

[0123] In this modified example, since the capacitor 40 is connected to the wiring 63c via the wiring 62c1, the resistive element 50 and the wiring 62c2, it is preferable to set the length between the transistor section 10 and the capacitor 40 to be short so as to reduce the inductance value provided by the resistive element 50.

[0124] 9(a), in a semiconductor device 100d of the modified example, the gate electrode pad 20 is disposed between the transistor portion 10 and the capacitor 40, and is disposed adjacent to each of the transistor portion 10 and the capacitor 40. A part of the capacitor 40 is disposed between the transistor portion 10 and the resistive element 50, and is disposed adjacent to each of the transistor portion 10 and the resistive element 50. The remaining part of the capacitor 40 is disposed between the gate electrode pad 20 and the resistive element 50, and is disposed adjacent to each of the gate electrode pad 20 and the resistive element 50. The gate wiring 60d includes wirings 61d1, 61d2, 62d1, 62d2, and 63d.

[0125] The wiring 63d is provided so as to surround the outer periphery of the transistor portion 10.

[0126] The wiring 61d1 is provided between the gate electrode pad 20 and the capacitor 40, and electrically connects the gate electrode pad 20 and the capacitor 40. The wiring 62d1 is provided between the transistor portion 10 and the capacitor 40, and electrically connects the wiring 63d and the capacitor 40.

[0127] The wiring 61d2 is provided between the capacitor 40 and the resistive element 50, and electrically connects the capacitor 40 to one end of the resistive element 50. The wiring 62d2 is provided between the capacitor 40 and the resistive element 50, and electrically connects the capacitor 40 to the other end of the resistive element 50. In this modification, since the resistive element 50 is not adjacent to the gate electrode pad 20, one end of the resistive element 50 is electrically connected to the gate electrode pad 20 via the wiring 61d2, the capacitor 40, and the wiring 61d1. Moreover, since the resistive element 50 is not adjacent to the transistor section 10, the other end of the resistive element 50 is electrically connected to the wiring 63d via the wiring 62d2, the capacitor 40, and the wiring 62d1.

[0128] The wiring 61d1 can electrically connect the gate electrode pad 20 and the capacitor 40 with a sufficiently short length by arranging the gate electrode pad 20 and the capacitor 40 adjacent to each other. The wiring 62d1 can electrically connect the wiring 63d and the capacitor 40 with a sufficiently short length by arranging the transistor portion 10 and the capacitor 40 adjacent to each other. By making the lengths of the wirings 61d1 and 62d1 sufficiently short, the inductance values ​​of the wirings 61d1 and 62d1 can be reduced.

[0129] By arranging the capacitor 40 and the resistive element 50 adjacent to each other, the wirings 61d2 and 62d2 can connect the capacitor 40 and the resistive element 50 with a sufficiently short length. By making the length of the wirings 61d2 and 62d2 sufficiently short, the inductance value of the wirings 61d2 and 62d2 can be reduced.

[0130] For example, the inductance value of the wiring can be reduced by making the width of the wiring 61d1 sufficiently wide in accordance with the shape of the gate electrode pad 20. Also, the inductance value can be reduced by making the width of the wiring 62d2 sufficiently wide in accordance with the shapes of the transistor portion 10 and the capacitor 40.

[0131] In this modification, one end of the resistive element 50 is electrically connected to the gate electrode pad 20 via one of the capacitor electrodes of the capacitor 40. The other end of the resistive element 50 is electrically connected to the wiring 63d via the other electrode of the capacitor 40. As described above in FIG. 3 and FIG. 5(a) to FIG. 5(c), the width of the two capacitor electrodes is sufficiently wide, and the inductance value of the capacitor electrodes is sufficiently small. This allows the inductance value between the resistive element 50 and the gate electrode pad 20 to be sufficiently small, and also allows the inductance value between the resistive element 50 and the wiring 63d to be sufficiently small.

[0132] 9(b), in a semiconductor device 100e of the modified example, the transistor portion 10 and the capacitor 40 are disposed adjacent to each other. The gate electrode pad 20 and the resistive element 50 are provided on the capacitor 40. The gate wiring 60e includes wirings 62e and 63e.

[0133] The wiring 62e is provided between the transistor section 10 and the capacitor 40, and electrically connects the wiring 63e and the capacitor 40. By arranging the transistor section 10 and the capacitor 40 adjacent to each other, the wiring 62e can electrically connect the wiring 63e and the capacitor 40 with a sufficiently short length. By making the length of the wiring 62e sufficiently short, the inductance value of the wiring 62e can be sufficiently reduced. By making the width of the wiring 62e sufficiently wide in accordance with the shape of the transistor section 10, the inductance value of the wiring 62e can be sufficiently reduced.

[0134] The electrical connection between the gate electrode pad 20 and the capacitor 40 is established by connecting the gate electrode pad to one of the capacitor electrodes of the capacitor 40 below the gate electrode pad 20. The electrical connection between the capacitor 40 and the resistive element 50 is established by connecting one end of the resistive element 50 to one of the capacitor electrodes of the capacitor 40 and connecting the other end of the resistive element 50 to the other capacitor electrode of the capacitor 40 below the resistive element 50. As a result, the inductance value of the connection between the gate electrode pad 20 and the capacitor 40 can be made sufficiently small, and the inductance value of the connection between the capacitor 40 and the resistive element 50 can be made sufficiently small.

[0135] 9(c), in a semiconductor device 100f of the modified example, the transistor portion 10 and the gate electrode pad 20 are arranged adjacent to each other. The capacitor 40 and the resistive element 50 are arranged side by side. The gate electrode pad 20 surrounds the parallel arrangement of the capacitor 40 and the resistive element 50. The gate wiring 60f includes wirings 62f and 63f.

[0136] The wiring 63f is provided so as to surround the outer periphery of the transistor portion.

[0137] The wiring 62f is provided between the transistor section 10 and the capacitor 40, and electrically connects the wiring 63f to one of the capacitor electrodes of the capacitor 40. Note that the gate electrode pad 20 is provided on the wiring 62f via an insulating layer, and the wiring 62f and the gate electrode pad 20 are electrically separated from each other.

[0138] One end of the resistive element 50 is electrically connected to one capacitor electrode of the capacitor 40, and the other end of the resistive element 50 is electrically connected to the other capacitor electrode of the capacitor 40. The other capacitor electrode of the capacitor 40 is connected to the gate electrode pad 20 below the gate electrode pad 20.

[0139] In this modification, the other capacitor electrode of the capacitor 40 is made sufficiently wide, and the gate electrode pad 20 is provided on the sufficiently wide capacitor electrode to electrically connect the capacitor electrode and the gate electrode pad 20. This makes it possible to sufficiently reduce the inductance value of the connection between the gate electrode pad 20 and the capacitor 40.

[0140] In this way, even if the capacitor 40 is provided to increase the switching speed of the transistor section 10, the inductance value due to the mutual connection can be made sufficiently small. Therefore, gate vibration due to the capacitance of the capacitor 40, the parasitic capacitance of the transistor section 10, and the inductance value on the gate side of the transistor section 10 can be suppressed, and ringing on the drain side can be prevented. By preventing ringing on the drain side, switching loss can be reduced.

[0141] Second Embodiment In this embodiment, instead of a capacitor and a resistor element formed in the same semiconductor manufacturing process as the transistor section, a capacitor and a resistor element formed in a manufacturing process different from that of the transistor section are used. FIG. 10 is a schematic perspective view illustrating the semiconductor device according to the second embodiment. As shown in FIG. 10, the semiconductor device 200 according to this embodiment includes a transistor section 210 and a gate circuit section 230. The transistor section 210 includes a drain electrode 211, a source electrode 212, and a gate electrode pad 220. The gate circuit section 230 includes a capacitor 240 and a resistive element 250.

[0142] In the specific example of FIG. 10, the transistor section 210 is provided on a conductive mount bed 201a. The back surface of the transistor section 210 is electrically connected to the mount bed 201a via a bonding member such as solder. The mount bed 201a functions as a drain terminal of the semiconductor device 200. A conductive source terminal 201b and a gate terminal 201c are disposed next to the mount bed 201a. A source connection wire 202b is provided between the source terminal 201b and the source electrode 212 of the transistor section 210, electrically connecting the source terminal 201b and the source electrode 212. A gate connection wire 202c is provided between the gate terminal 201c and the gate circuit section 230, electrically connecting the gate terminal 201c and the gate circuit section 230.

[0143] The mount bed 201a on which the transistor section 210 is mounted together with the gate circuit section 230, the source terminal 201b, the source connecting wire 202b, the gate terminal 201c, and the gate connecting wire 202c are housed in a case 201. The case 201 is formed of, for example, epoxy resin. In Fig. 10, the case 201 is represented by a two-dot chain line in order to clearly illustrate the gate circuit section 230, the transistor section 210, the mount bed 201a, the source terminal 201b, the source connecting wire 202b, the gate terminal 201c, and the gate connecting wire 202c.

[0144] In the transistor section 210, a source electrode 212 and a gate electrode pad 220 are provided on the surface opposite to the surface connected to the mount bed 201a. The source electrode 212 and the gate electrode pad 220 are electrically isolated. The configuration of the transistor section 210 can be similar to the specific example described in relation to FIG.

[0145] FIG. 11 is a schematic cross-sectional view of a capacitor which is a part of the semiconductor device of FIG. 11, the capacitor 240 includes a first capacitor electrode 240a, a dielectric film 243, and a second capacitor electrode 244. The capacitor 240 is disposed on the gate electrode pad 220 via a bonding member 261 such as solder. The first capacitor electrode 240a is provided on a conductive layer 242. A plurality of trenches are formed in the first capacitor electrode 240a, and a dielectric film 243 is provided on each wall surface of the plurality of trenches. The second capacitor electrode 244 is provided on the first capacitor electrode 240a via the dielectric film 243.

[0146] The capacitor 240 is formed by a manufacturing process different from that of the transistor section 210, and can have a sufficiently large capacitance value per unit area. The capacitor 240 is, for example, a silicon capacitor. The silicon capacitor can have fine trenches and the like formed by a manufacturing process different from that of the transistor section 210, and can have a sufficiently large capacitance.

[0147] In the silicon capacitor, the first capacitor electrode 240a includes, for example, Si including n-type impurities. The dielectric film 243 includes, for example, Si oxide. The second capacitor electrode 244 includes, for example, polycrystalline Si including p-type impurities. The conductive layer 242 includes, for example, a metal that is ohmic-connected to the first capacitor electrode 240a.

[0148] In the capacitor 240, the thicknesses of the first capacitor electrode 240a and the conductive layer 242 are sufficiently thin, and the inductance values ​​thereof can be made nearly zero. Also, the thickness of the bonding member 261 between the first capacitor electrode 240a and the gate electrode pad 220 can be made sufficiently thin to make the inductance value approach zero. Therefore, in the semiconductor device 200 according to this embodiment, the inductance value of the wiring between the gate electrode pad 220 and the gate circuit section 230 among the gate wirings can be made nearly zero.

[0149] The resistive element 250 is formed in a manufacturing process separate from that of the transistor portion 210. The resistive element 250 is realized, for example, by introducing a low concentration of n-type impurities into a Si substrate to give it a desired sheet resistance and processing it to a thickness that gives the desired resistance value.

[0150] In the resistive element 250, one electrode is formed on one surface, and the other electrode is formed on the other surface. Therefore, by arranging one electrode opposite to the surface of the gate electrode pad 220 and connecting it, it is possible to electrically connect one electrode to the gate electrode pad 220. Since the electrode of the resistive element 250 and the gate electrode pad 220 are connected surface to surface, it is possible to make the inductance value sufficiently small.

[0151] The capacitor 240 and the resistive element 250 are interconnected by an interconnect wire 202a. The interconnect wire 202a electrically connects the other capacitor electrode of the capacitor 240 and the other electrode of the resistive element 250.

[0152] In this manner, the capacitor 240 and the resistive element 250 are connected in parallel, and one end of the parallel circuit of the capacitor 240 and the resistive element 250 is electrically connected to the gate electrode pad 220 .

[0153] The effects of the semiconductor device 200 according to this embodiment will be described. The semiconductor device 200 according to this embodiment and the modification has the same effects as the semiconductor device 100 shown in FIG. 1, and also has the following effects. That is, in the semiconductor device 200, the gate circuit section 230 is manufactured using a manufacturing process different from that of the transistor section 210, and is laminated and arranged on the gate electrode pad 220 of the transistor section 210 and electrically connected. By making the size of the gate circuit section 230 in a planar view equal to or smaller than the size of the gate electrode pad 220 in a planar view, the size of the semiconductor device 200 in a planar view does not exceed the size of the transistor section 210. Therefore, a small-sized and low-cost semiconductor device 200 can be realized.

[0154] (Modification) 12A and 12B are schematic perspective views illustrating a semiconductor device according to a modification of the second embodiment. 12(a) and 12(b), in order to avoid complication of the illustration, the mount bed 201a, the source terminal 201b, the gate terminal 201c, and the case 201 in Fig. 10 are omitted. In addition, since the source terminal 201b and the gate terminal 201c are not illustrated, the source connecting wire 202b and the gate connecting wire 202c are indicated by two-dot chain lines.

[0155] As shown in Fig. 12(a), in the semiconductor device 200a of this modification, the configurations of the capacitor 240a and the resistive element 250a are different from those in Fig. 10. The other configurations are the same as those in Fig. 10, and the same components are denoted by the same reference numerals and detailed descriptions thereof will be omitted as appropriate.

[0156] In order to obtain a sufficiently large capacitance value, the capacitor 240a has a larger size in a plan view than the example in Fig. 10. In addition, in order to obtain a sufficiently low DC resistance value, the resistor element 250a has a larger size in a plan view than the example in Fig. 10.

[0157] The capacitor 240a and the resistor 250a cover the gate electrode pad 220 in a plan view, and cover a part of the source electrode 212 adjacent to the gate electrode pad 220. Although not shown, an insulating layer is provided between the capacitor 240a and the source electrode 212 overlapping with the capacitor 240a, and one of the capacitor electrodes of the capacitor 240a and the source electrode 212 are electrically isolated from each other. Also, an insulating layer is provided between the resistor 250a and the source electrode 212 overlapping with the resistor 250a, and one of the electrodes of the resistor 250a and the source electrode 212 are electrically isolated from each other.

[0158] As shown in Fig. 12(b), in the semiconductor device 200b of this modification, the configurations of the capacitor 240b and the resistive element 250b are different from those in Fig. 10. The other configurations are the same as those in Fig. 10, and the same components are denoted by the same reference numerals and detailed descriptions thereof will be omitted as appropriate.

[0159] In order to obtain a larger capacitance value, the size of the capacitor 240b in a plan view is larger than that of the example shown in Fig. 12(a), whereas the size of the resistor element 250b in a plan view is smaller than that of the example shown in Fig. 12(a).

[0160] The capacitor 240b and the resistor element 250b cover the gate electrode pad 220 in a plan view. Of these, the capacitor 240b overlaps an outer edge region including three sides of the outer periphery of the transistor section 210 in a plan view. The outer edge including three sides of the outer periphery of the transistor section 210 in a plan view is an outer edge other than one outer edge to which the source connection wire 202b is connected. The capacitor 240b may overlap the outer edge of the source electrode 212. Although not shown, an insulating layer is provided between the capacitor 240b and the transistor section 210 overlapping the capacitor 240b, and one capacitor electrode of the capacitor 240b and the outer edge of the transistor section 210 are electrically isolated from each other.

[0161] In this way, the capacitors 240a, 240b can have any shape in a plan view, and therefore a sufficiently large area can be secured. Therefore, the semiconductor devices 200a, 200b of these modified examples can be equipped with the capacitors 240a, 240b having a large capacitance value without increasing the size of the semiconductor devices 200a, 200b in a plan view.

[0162] Although the embodiments of the present invention have been described, the embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims.

[0163] The embodiments include the following aspects.

[0164] (Appendix 1) a transistor portion including a source electrode provided on a first surface of a semiconductor substrate and electrically connected to a source terminal, a drain electrode provided on a second surface of the semiconductor substrate opposite to the first surface and electrically connected to a drain terminal, and a gate electrode provided between the source electrode and the drain electrode; a gate electrode pad provided on the first surface; a gate connection member electrically connecting the gate electrode pad and a gate terminal; a gate circuit section provided on the first surface and electrically connected between the gate electrode pad and the gate electrode; a case that houses the transistor section, the gate electrode pad, and the gate circuit section; Equipped with The gate circuit unit includes: A capacitor; A resistive element connected in parallel to the capacitor; a first connection member electrically connecting one electrode of the capacitor to the gate electrode pad; a second connection member that electrically connects the other electrode of the capacitor to the gate electrode; A semiconductor device comprising:

[0165] (Appendix 2) In plan view, the transistor portion, the gate electrode pad, the capacitor, and the resistive element are arranged so as not to overlap one another; the capacitor is disposed adjacent to the gate electrode pad; 2. The semiconductor device according to claim 1, wherein the first connection member is provided between the gate electrode pad and the capacitor.

[0166] (Appendix 3) the capacitor is disposed adjacent to the transistor portion, 3. The semiconductor device according to claim 2, wherein the second connection member is provided between the capacitor and the transistor portion.

[0167] (Appendix 4) 4. The semiconductor device according to claim 1, wherein an inductance value of a series circuit of the gate connection member, the first wiring, and the second wiring is smaller than 8 nH.

[0168] (Appendix 5) The transistor portion is a drift layer of a first conductivity type provided on the first surface; a base layer of a second conductivity type provided on the drift layer; a source layer of the first conductivity type selectively provided on the base layer; a gate electrode facing a part of the drift layer and the base layer via a gate insulating film; Including, the semiconductor substrate contains impurities of the first conductivity type; the source electrode is on the base layer and on the source layer and electrically connected to the base layer and the source layer; The capacitor is a first capacitor electrode electrically connected to the gate electrode pad via the first wiring; a second capacitor electrode electrically connected to the gate electrode via the second wiring; a dielectric film provided between the first capacitor electrode and the second capacitor electrode; 5. The semiconductor device according to claim 1, further comprising:

[0169] (Appendix 6) the first capacitor electrode is provided on the drift layer via a first insulating layer; the dielectric layer is disposed on the first capacitor electrode; 6. The semiconductor device according to claim 5, wherein the second capacitor electrode is provided on the dielectric layer.

[0170] (Appendix 7) the transistor portion includes a conductor extending into the drift layer, the conductor includes a conductor facing the drift layer via a first insulating film and facing the gate electrode via a second insulating film; the first capacitor electrode faces a part of the drift layer via a third insulating film; 6. The semiconductor device according to claim 5, wherein the second capacitor electrode extends into the drift layer, faces the drift layer via a fourth insulating film, and faces the first capacitor electrode via the dielectric layer.

[0171] (Appendix 8) the capacitor includes the base layer on the drift layer; 8. The semiconductor device according to claim 7, wherein the first capacitor electrode faces a part of the drift layer and the base layer.

[0172] (Appendix 9) 2. The semiconductor device according to claim 1, wherein the capacitor and the resistive element are disposed on the gate electrode pad and electrically connected to the gate electrode pad via the first connection member.

[0173] (Appendix 10) 10. The semiconductor device according to claim 9, wherein the first connection member is provided between the capacitor and the gate electrode pad. [Explanation of symbols]

[0174] 1...semiconductor substrate, 1a...first surface, 1b...second surface, 2...n-type drift layer, 3...p-type base layer, 4...n-type source layer, 5...gate electrode, 6...gate insulating film, 7...field plate structure, 7a...field plate conductor, 7b, 146a, 147b1...insulating film, 8, 148a, 148b...interlayer insulating film, 10, 210...transistor section, 20, 220...gate electrode pad, 30, 230...gate circuit section, 40, 140, 140a, 140b, 240, 240a, 240b...capacitor Bottom, 41, 45...insulating layer, 42, 142, 145a...first capacitor electrode, 43...dielectric film, 44, 144, 147a1...second capacitor electrode, 50, 250, 250a, 250b...resistance element, 60-60f...gate wiring, 61-61e, 62-62f, 63-63f...wiring, 100, 100a-100f, 200, 200a, 200b...semiconductor device, 101, 201...case, 111, 211...drain electrode, 112, 212...source electrode, 202a...interconnecting wire

Claims

1. a transistor portion including a source electrode provided on a first surface of a semiconductor substrate and electrically connected to a source terminal, a drain electrode provided on a second surface of the semiconductor substrate opposite to the first surface and electrically connected to a drain terminal, and a gate electrode provided between the source electrode and the drain electrode; a gate electrode pad provided on the first surface; a gate connection member electrically connecting the gate electrode pad and a gate terminal; a gate circuit section provided on the first surface and electrically connected between the gate electrode pad and the gate electrode; a case that houses the transistor section, the gate electrode pad, and the gate circuit section; Equipped with The gate circuit unit includes: A capacitor; A resistive element connected in parallel to the capacitor; a first connection member electrically connecting one electrode of the capacitor to the gate electrode pad; a second connection member electrically connecting the other electrode of the capacitor to the gate electrode; A semiconductor device comprising:

2. In plan view, the transistor portion, the gate electrode pad, the capacitor, and the resistive element are arranged so as not to overlap one another; the capacitor is disposed adjacent to the gate electrode pad; 2. The semiconductor device according to claim 1, wherein the first connection member is provided between the gate electrode pad and the capacitor.

3. the capacitor is disposed adjacent to the transistor portion, 3. The semiconductor device according to claim 2, wherein the second connection member is provided between the capacitor and the transistor portion.

4. 2. The semiconductor device according to claim 1, wherein an inductance value of a series circuit of said gate connection member, said first wiring and said second wiring is smaller than 8 nH.

5. The transistor portion is a drift layer of a first conductivity type provided on the first surface; a base layer of a second conductivity type provided on the drift layer; a source layer of the first conductivity type selectively provided on the base layer; a gate electrode facing a part of the drift layer and the base layer via a gate insulating film; Including, the semiconductor substrate contains impurities of the first conductivity type; the source electrode is on the base layer and on the source layer and electrically connected to the base layer and the source layer; The capacitor is a first capacitor electrode electrically connected to the gate electrode pad via the first wiring; a second capacitor electrode electrically connected to the gate electrode via the second wiring; a dielectric film provided between the first capacitor electrode and the second capacitor electrode; The semiconductor device according to any one of claims 1 to 4, comprising:

6. the first capacitor electrode is provided on the drift layer via a first insulating layer; the dielectric layer is provided on the first capacitor electrode; 6. The semiconductor device according to claim 5, wherein the second capacitor electrode is provided on the dielectric layer.

7. the transistor portion includes a conductor extending into the drift layer, the conductor includes a conductor facing the drift layer via a first insulating film and facing the gate electrode via a second insulating film; the first capacitor electrode faces a part of the drift layer via a third insulating film; The semiconductor device according to claim 5 , wherein the second capacitor electrode extends into the drift layer, faces the drift layer via a fourth insulating film, and faces the first capacitor electrode via the dielectric layer.

8. the capacitor includes the base layer on the drift layer; The semiconductor device according to claim 7 , wherein the first capacitor electrode faces a part of the drift layer and the base layer.

9. 2. The semiconductor device according to claim 1, wherein the capacitor and the resistor element are disposed on the gate electrode pad and electrically connected to the gate electrode pad via the first connection member.

10. 10. The semiconductor device according to claim 9, wherein the first connection member is provided between the capacitor and the gate electrode pad.

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