Control device, controller and electronic control device

Abstract

To make it possible to provide more information by a status signal.SOLUTION: In an electronic control device 1, where a fault signal, which is an example of a status signal, is sent from control devices U1, U2, and U3 to a controller U0, the control device U1 monitors a plurality of monitoring factors for a controlled object (D1) using sensors S11, S12, and S13. A monitoring result is used for control in a first control circuit 11, and is subjected to a binary value determination by detection circuits C11, C12, and C13. The determination results thereof are integrated in a type determination circuit 12 and output from a fault terminal F1. At this time, when the type determination circuit 12 is in a fault status, according to the factor, a level of an active side of the fault signal is shifted by very small levels Δ1, Δ2, and Δ3, and the shifted level is output from the fault terminal F1. The controller U0 recognizes the fault factor by decrypting the fault signal received at a fault terminal F01 using a type decryption unit (55).SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a control device, a controller, and an electronic control device. [Background technology]

[0002] Conventionally, various signals are exchanged between control devices to perform, for example, cooperative, individual, or master-slave control. Master-slave control is realized, for example, by a configuration of one or more control devices and a higher-level (master) controller. In such a configuration, by providing communication circuits and communication terminals to exchange the various signals, it is possible to exchange information according to the capabilities of those communication circuits and communication terminals.

[0003] On the other hand, as the various signals mentioned above, a simple signal expressed by two values, high level (e.g. VDD) and low level (GND), has been used conventionally. This signal indicates, for example, the status (condition, situation) of the sending side, and since it is a binary signal, it is on the inactive side in a healthy state, and switches to the active side when an error, failure, abnormality, etc. (hereinafter, represented by abnormality) occurs, or there are also cases where it is in the opposite state. A typical example of such a status signal is a fault signal.

[0004] When the fault signal becomes active, the control device, for example, stops control. The fault signal is output, for example, by a specified detection circuit that determines whether a monitoring factor (parameter) has reached a specified threshold value, so it can be generated by a simple comparator or the like, and does not require a special communication circuit or the like.

[0005] Patent Document 1 shows a configuration in which a fault signal is output from a control device to a controller. Patent Document 1 shows an electronic control unit (ECU) including a control device and a controller, and is realized as a load driving device that drives a load of an in-vehicle device. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2011-55333 A

[0007] [overview] In a configuration such as that of Patent Document 1, when there are multiple monitoring factors, the monitoring methods (for example, temperature, current) are different and multiple detection circuits are provided. However, since the output of each detection circuit is a binary signal, a logical sum can be obtained using a diode OR circuit or the like and output from a single fault terminal. In this case, although a controller receiving a fault signal requires only one fault terminal, it can only determine whether the integrated (logically ORed) fault signal is active or not, and there is a limit to the control that can be performed according to the determination result. As such, a binary status signal such as a fault signal can only indicate two states, so there is a limit to the information that can be reported to the outside.

[0008] An object of the present disclosure is to provide a control device, a controller, and an electronic control device that can provide more information by a status signal without providing a new special communication terminal, communication circuit, or the like.

[0009] In order to solve the above-mentioned problems, one embodiment of the present disclosure includes a control device that controls one or more control objects, and includes a plurality of detection circuits that monitor the control objects with a plurality of mutually different monitoring factors, and when a predetermined mode is detected, set a status signal output as a binary signal of high level or low level to one level representing the predetermined mode; a first control circuit that controls the control object, and when the predetermined mode is detected by at least one of the plurality of detection circuits from the status signal, also performs control according to the mode; and a type determination circuit that integrates the status signals of the plurality of detection circuits and performs a type determination as to which of the status signals of the plurality of detection circuits detected the monitoring factor of the predetermined mode, and depending on the determination result, shifts the status signal by one or more predetermined small levels to one level representing the monitoring factor of the predetermined mode, and outputs the status signal.

[0010] According to one aspect of the present disclosure, a control device, controller, and electronic control device can be provided that can provide more information in a status signal. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is a block diagram showing the electrical configuration of an electronic control device according to an embodiment. [Diagram 2] FIG. 2 is a waveform diagram of a fault signal in the electronic control device of FIG. [Diagram 3] FIG. 3 is a block diagram showing the electrical configuration of a power supply circuit of a specific example using the electronic control device shown in FIG.

[0012] [Detailed Description] Next, the present embodiment will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and planar dimensions of each component is different from the actual relationship. Therefore, the specific thickness and dimensions should be determined with reference to the following description. In addition, it goes without saying that the drawings include parts with different dimensional relationships and ratios.

[0013] The following embodiments are merely examples of devices and methods for embodying the technical ideas, and do not specify the materials, shapes, structures, arrangements, etc. of the components. Various modifications can be made to the present embodiments within the scope of the claims.

[0014] 1 is a block diagram showing the electrical configuration of an electronic control device 1 according to an embodiment. The electronic control device 1 includes control devices U1, U2, and U3 and a higher-level controller U0, and is used, for example, in vehicle applications. The control devices U1, U2, and U3 control some controlled object from output terminals OUT1, OUT2, and OUT3 in response to control signals output from terminals CTL01, CTL02, and CTL03 of the controller U0 and received at terminals CTL1, CTL2, and CTL3, respectively.

[0015] In the example of FIG. 1, the control device U1 is an integrated circuit for power supply control, and a first control circuit 11 realized by a microcomputer or the like drives a switching element SW1 of a switching power supply through a drive circuit D1. In the example of FIG. 1, for the sake of simplicity, only one drive circuit D1 and one switching element SW1, which are the control objects, are shown, but in the case of a power supply circuit, many switching elements SW1 may be provided. The control devices U1, U2, and U3 are used for various purposes, such as a load drive device that amplifies the power of a control signal from a controller U0 to drive a load. In FIG. 1, the control device U3 drives a load L through a drive circuit D3. Depending on the control object, the drive circuits D1 and D3 and the switching element SW1 may be integrated into the control devices U1, U2, and U3.

[0016] The controller U0 and each of the control devices U1, U2, and U3 are supplied with a power supply VDD of, for example, 5 V from a power supply E1, which is applied between the power supply input terminals P01, P11, P21, and P31 and the GND terminals P02, P12, P22, and P32, respectively. A power supply VCC of, for example, 24 V is supplied from a power supply E2 to a drive circuit D1 for power supply control, and a power supply VCC of, for example, 400 V is supplied from a power supply E3 to a drive circuit D3 for driving a load.

[0017] The control devices U1 and U2 are according to the embodiment, and the control device U2 is configured in the same or similar manner as the control device U1. For the sake of simplicity, the control device U1 will be described below in detail. The control device U3 is an existing control device. First, the control device U3 will be described. The control device U3 includes a first control circuit 31, detection circuits C31, C32, and C33, and an OR gate G3. The first control circuit 31 can directly control the drive circuit D3 and the load L, which are the control objects, or indirectly control them via a higher-level controller U0, or can control other control objects depending on the state of the control objects (D3, L).

[0018] For this reason, sensors S31, S32, and S33 are provided in association with the drive circuit D3. The detection results of the sensors S31, S32, and S33 are inputted from input terminals IN31, IN32, and IN33 to the first control circuit 31 and the detection circuits C31, C32, and C33, and the first control circuit 31 appropriately controls the controlled object (D3, L) from the output terminal OUT3.

[0019] The detection circuits C31, C32, and C33 are realized by simple comparators, etc., and compare the detection results of the sensors S31, S32, and S33 with a predetermined threshold value to determine whether or not a predetermined state has been reached. The detection circuits C31, C32, and C33 determine, for example, two states, normal or abnormal, and output a binary signal of high level or low level. Here, the output of the detection circuits C31, C32, and C33 is specifically, for example, switched between VDD (5V) and GND (0V), and is high active, with a threshold value of 2.5V. Then, the detection circuits C31, C32, and C33 determine a predetermined state such as a fault (abnormal) state when it is 2.5V or more (hereinafter referred to as abnormal), and a non-fault (normal) state when it is less than 2.5V (hereinafter referred to as normal) that is not a predetermined state.

[0020] Therefore, the binary signal from each detection circuit C31, C32, C33 indicates the status of the monitoring factor, and when an abnormality occurs, it can be notified by changing to one level (active) side that indicates the abnormality. The binary signals from the detection circuits C31, C32, C33 are ORed by the OR gate G3, that is, when it is detected that any one of them has become abnormal, it is output at one level (active). The output of the OR gate G3 is output from a single fault terminal F3 to a terminal F04 of the interface circuit 52 of the control device U0. As described above, when the binary signal from the OR gate G3 is at a low level in a normal state and at an active high level in an abnormal state, it is called a fault signal, and in the opposite case, in the case of the control device U1 of the power supply control described later, it may be called a power good signal. Hereinafter, in this embodiment, it will be described as a fault signal.

[0021] When the fault signal becomes active, the first control circuit 31 performs appropriate control such as stopping control of the controlled object (D3, L) or reducing the load. In the example of Fig. 1, the detection results of the sensors S31, S32, and S33 are input to the first control circuit 31, enabling detailed control. However, the first control circuit 31 may perform control based on binary signals from the detection circuits C31, C32, and C33.

[0022] The control device U1 includes the first control circuit 11, the detection circuits C11, C12, and C13, and the type determination circuit 12. The first control circuit U1 directly controls the drive circuit D1 and the switching element SW, which are the control objects, or indirectly controls them via a higher-level controller U0, or can control other control objects depending on the state of the control objects (D1, SW).

[0023] For such control, the control device U1 is provided with detection circuits C11, C12, and C13 similar to the detection circuits C31, C32, and C33, which monitor factors that should be monitored in the controlled object (D1, SW1). The monitored factors are appropriately determined according to the relationship between the control device U1 and the controlled object (D1, SW1), such as a plurality of monitored factors in one controlled object (D1, SW1) as shown in FIG. 1, or one for each of the controlled objects. Corresponding detection circuits C11, C12, and C13 are provided for each monitored factor. In the example of FIG. 1, an example is shown in which the monitored factors occur in the drive circuit D1, and sensors S11, S12, and S13 are provided in association with the drive circuit D1. Regarding power supply control, the monitored factors that should be detected by the drive circuit D1 include output overvoltage, output undervoltage, input overvoltage, and output overcurrent. The sensors S11, S12, and S13 are realized by voltage dividing resistors for voltage detection, and current-voltage conversion resistors for current detection.

[0024] The detection results of the sensors S11, S12, and S13 are input from input terminals IN11, IN12, and IN13 to the first control circuit 11 and detection circuits C11, C12, and C13. In response to the detection results of the sensors S11, S12, and S13, the first control circuit 11 controls the switching element SW1 from the output terminal OUT1 via the drive circuit D1 so as to provide a constant voltage, a constant current, or the like.

[0025] The control device U1 of the present disclosure also includes a single fault terminal F1. However, the control device U1 of the present disclosure includes a type determination circuit 12 instead of the above-mentioned OR gate G3. The type determination circuit 12 includes a plurality of (four in the example of FIG. 1) ladder resistors R1, R2, R3, R4, switch elements Q1, Q2, Q3, Q4, a unity gain buffer B1, a buffer B2, and AND gates G1, G2, G4, and configures a voltage shifter. The ladder resistors R1, R2, R3, R4 are connected between the power supply input terminal P11 and the GND terminal P12. The connection points of the ladder resistors R1, R2, R3, R4 and the GND terminal P12 are commonly connected to the non-inverting input terminal of the unity gain buffer B1 via the switch elements Q1, Q2, Q3, Q4. The inverting input terminal of the unity gain buffer B1 is negatively fed back and is connected to the above-mentioned fault terminal F1.

[0026] Therefore, like the OR gate G3, the type determination circuit 12 can integrate the fault signals of the multiple detection circuits C11, C12, and C13, that is, output the logical sum of a binary signal of high level or low level to the fault terminal F1. Furthermore, when any one of the fault signals becomes one level (active), the type determination circuit 12 shifts the fault signal by a number of predetermined small levels on the one level (active, VDD) side according to the monitoring factor that caused it to become so, and outputs it. For example, if the fault signal is high active, the monitoring factor of the detection circuit C11 is -ΔV, the monitoring factor of the detection circuit C12 is -2ΔV, and the monitoring factor of the detection circuit C13 is -3ΔV.

[0027] Specifically, the resistance values ​​of the ladder resistors R1, R2, R3, and R4 are, for example, in a ratio of 1:1:1:7. Then, from VDD=5V, ΔV=0.5V. Each of the switch elements Q1, Q2, and Q3 is selectively turned on when the output of the corresponding detection circuit C11, C12, and C13 becomes active (high level). Here, the output of the detection circuit C11 drives the switch element Q1 via the buffer B2. Therefore, when the output of the detection circuit C11 becomes one level (active, VDD), the switch element Q1 turns ON. On the other hand, the output of the detection circuit C12 is input to a first input terminal of the AND gate G1, and the output of the detection circuit C11 is inverted and input to a second input terminal of this AND gate G1, and the output of the AND gate G1 drives the switch element Q2. Therefore, when the output of the detection circuit C12 is one level (active, VDD) and the output of the detection circuit C11 is the other level (inactive, GND), the switch element Q2 turns ON. Similarly, the output of the detection circuit C13 is input to a first input terminal of an AND gate G2, the outputs of the detection circuits C12 and C11 are inverted and input to the second and third input terminals of this AND gate G2, and the output of the AND gate G2 drives the switch element Q3. Therefore, when the output of the detection circuit C13 is at one level (active, VDD) and the outputs of the detection circuits C11 and C12 are both at the other level (inactive, GND), the switch element Q3 is turned ON.

[0028] Therefore, when the output of each detection circuit C11, C12, C13 becomes active (high level), the switch elements Q1, Q2, Q3 are selectively turned on in this order. Then, when the output of each detection circuit C11, C12, C13 becomes active (high level), the voltage of the fault terminal F1 becomes VDD×90%, VDD×80%, VDD×70%, respectively. In addition, the output of the detection circuits C11, C12, C13 is inverted and input to the AND gate G4, and when all of these outputs become inactive (low level), the switch element Q4 is turned on and the input of the unity gain buffer B1 becomes GND level. In this way, even with a single fault terminal F1, it is possible to notify the outside that which monitoring factor has become abnormal with a small level shift on the active (high level) side.

[0029] Fig. 2 is a waveform diagram of a fault signal output from the fault terminal F1. The vertical axis of Fig. 2 indicates voltage, and the horizontal axis indicates time, with an abnormality occurring at time t0. Reference symbol α0 indicates the voltage change at the fault terminal F3 of the control device U3, which is at GND level (0V) until time t0 and at high level (5V) after time t0. In contrast, reference symbols α1 to α3 indicate the voltage change at the fault terminal F1 of the control device U1 of the present disclosure, which is at GND level (0V) until time t0 and at a different high level after time t0. Reference symbol α1 is VDD x 90% = 4.5V, reference symbol α2 is VDD x 80% = 4.0V, and reference symbol α3 is VDD x 70% = 3.5V.

[0030] As described above, the controller U0 is not limited to controlling the control devices U1, U2, and U3, but may simply display the fault signal, which is a status signal, or watch it for other control, and a plurality of controllers may be provided. In FIG. 1, the controller U0 corresponds to the control devices U1 and U2 described above. The controller U0 includes a second control circuit 51 realized by a central processing circuit or the like, and its peripheral circuits 52 to 55. In the example of FIG. 1, the peripheral circuit 52 is an interface circuit, the peripheral circuit 53 is a memory, the peripheral circuit 54 is a multiplexer, and the peripheral circuit 55 is an analog / digital conversion circuit.

[0031] The second control circuit 51 performs arithmetic processing using a memory 53 and the like, creates control signals for the control devices U1, U2, and U3, and outputs them from the terminals CTL01, CTL02, and CTL03, as described above. Meanwhile, the controller U0 in FIG. 1 includes fault terminals F01-F03, which are external input terminals, and an input terminal F04. An input signal to the input terminal F04 is input to the central processing circuit 51 via an interface circuit 52. Meanwhile, the signals input to the fault terminals F01-F03 are sequentially selected by a multiplexer 54, converted to digital values ​​by an analog / digital conversion circuit 55, and input to the second control circuit 51.

[0032] 1, the control device U3 is an existing control device as described above, and the fault signal from the control device U3 is a binary signal, so it is input to the input terminal F04 of the interface circuit 52, but it may also be input to the fault terminal F03 that is converted into analog / digital. The multiplexer 54 does not have to be provided separately, but by providing this multiplexer 54, it is possible to share the analog / digital conversion circuit 55 with the multiple fault terminals F01 to F03 and other input terminals for analog signals (not shown). In particular, the fault signal is a signal that changes little (almost no change) and changes slowly, so the selection operation by the multiplexer 54 may also be slow.

[0033] The fault signals from the control devices U1, U2, U3 are selected by multiplexer 54 and converted by analog / digital conversion circuit 55 to digital values ​​representing analog values ​​of 5 V, 4.5 V, 4.0 V, 3.5 V, or 0 V. The resolution of analog / digital conversion circuit 55 is much higher than the voltage resolution of ladder resistors R1 to R4 of the control devices U1 and U2.

[0034] By doing so, the analog / digital conversion circuit 55 can constitute a judgment circuit that judges that the control devices U1, U2, and U3 are in a fault (abnormal) state because the fault signal has become high level. Furthermore, when the analog / digital conversion circuit 55 detects minute level shift amounts -ΔV, -2ΔV, and -3ΔV on the fault judgment side, it can constitute a type decoding unit that decodes the type of the monitoring factor that caused the fault (abnormal) state from the detection result. The second control circuit 51 can perform control that takes into consideration not only the fault judgment result obtained from the analog / digital conversion circuit 55 but also the monitoring factor that caused the fault (abnormal) state. The analog / digital conversion circuit 55 only needs to recognize which of the multiple fault terminals F01 to F03 the signal taken in for conversion corresponds to, and the analog / digital conversion circuit 55 does not need to be provided individually for each fault terminal F01 to F03.

[0035] Therefore, the electronic control device 1 of this embodiment has the following features. That is, by combining the control devices U1 and U2 having the type determination circuit 12 with the controller U0 having the analog / digital conversion circuit 55 as a type decoding unit, the fault signal can be used more highly without providing a special communication terminal and communication circuit. Specifically, by using the existing fault terminals F01-F03; F1-F2, the second control circuit 51 can recognize not only that a fault state has occurred, but also which monitoring factor has caused the fault, and can perform more precise or more limit-close control. Also, in the prototype stage, when a fault state occurs, it is necessary to monitor the output of the sensor S11 or the like with an oscilloscope or the like to determine the monitoring factor, but according to the present disclosure, it is only necessary to measure the voltage of the fault terminals F1-F2.

[0036] Furthermore, the analog / digital converter 55 used as the type decoding unit of the controller U0 is a relatively general-purpose configuration for the controller U0 that includes the second control circuit 51 realized by a central processing circuit or the like, and its peripheral circuits 52 to 55. Therefore, by using this general-purpose analog / digital converter 55, which is likely to be installed as standard, for decoding the fault signal indicating the monitoring cause by performing a minute level shift, it is possible to suppress an increase in the cost of the controller U0.

[0037] On the other hand, even if the controller U0 does not use the analog / digital conversion circuit 55 and has an existing configuration in which a binary signal from the input terminal F04 is simply received as a fault signal by the interface circuit 52, the fault state of the control devices U1 and U2 can be accurately determined. Also, even if an existing control device U3 that does not have a type determination circuit 12 and outputs a fault signal by an OR gate G3 is combined with the controller U0 that has the analog / digital conversion circuit 55 as a type decoding unit, the second control circuit 51 can accurately determine only the fault state.

[0038] In this way, without making any particular specification changes to the existing controller and control device U3, the controller U0 and control devices U1 and U2 of the present disclosure can be arbitrarily combined to configure the electronic control device 1. Therefore, such an electronic control device 1 can reduce the costs associated with modification and introduction, and does not impair the reliability of existing fault signals.

[0039] Fig. 3 is a block diagram showing the electrical configuration of a specific example of a power supply circuit 60 using the electronic control unit 1 shown in Fig. 1. This power supply circuit 60 includes the control devices U1, U2, and U3 in the above-mentioned electronic control unit 1, and the controller U0. In the above description, the control device U3 has an existing configuration that outputs a binary signal as a fault signal, but it may have a configuration similar to that of the control devices U1 and U2 that include the type determination circuit 12. In this power supply circuit 60, it is sufficient that at least one of the control devices U1, U2, and U3 includes the type determination circuit 12.

[0040] This power supply circuit 60 is a two-stage power supply circuit in which a primary circuit 61 and a secondary circuit 62 are electrically insulated by a transformer 63. In the primary circuit 61, AC current from a commercial power source 64 is input to a first-stage power factor correction circuit 71 through an electromagnetic interference countermeasure filter 65, and is converted to DC current by switching by a switching element SW1 and smoothing by a capacitor 711. The power factor correction circuit 71 includes a reactance 66 for power factor correction. The switching element SW1 is driven by a control device U1 via a drive circuit D1.

[0041] The second-stage LLC converter 72 is disposed between the primary circuit 61 and the secondary circuit 62 via the transformer 63. The LLC converter 72 uses the capacitor 711 as a power source and generates a predetermined high voltage on the secondary winding 63b side by switching of the switching element SW21 and the accompanying resonance operation of the primary winding 63a of the transformer 63 and the capacitor 721. The high voltage is rectified by the switching element SW22 and smoothed by the capacitor 722 to become a direct current. The switching elements SW21 and SW22 are controlled by drive circuits D21 and D22, respectively. The drive circuit D21 is driven by a control device U2.

[0042] The third-stage Buck converter 73 uses a capacitor 722 as a power source and generates a predetermined low voltage on the output terminal 733 side by switching by a switching element SW3, the associated energy storage and release operation of an inductor 731, and the smoothing operation of a capacitor 732. A Boost converter may be used instead of this Buck (step-down) converter 73. The switching element SW3 is driven by a control device U3 via a drive circuit D3.

[0043] In the power supply circuit 60 configured as above, at least one of the control devices U1, U2, and U3 includes a type determination circuit 12. Therefore, when the fault signal becomes active, the power supply circuit 60 does not simply stop the system, but can perform more appropriate control according to the monitored cause of the fault (abnormal) state, for example, lowering the switching frequency or the duty.

[0044] The technical ideas that can be understood from this disclosure are described below. Note that, for the purpose of aiding understanding, and not for the purpose of limiting the scope of the invention, the components described in the appendices are given the reference symbols of the corresponding components in the embodiments. The reference symbols are shown as examples for the purpose of aiding understanding, and the components described in each appendix should not be limited to the components indicated by the reference symbols.

[0045] <Appendix 1> The control device according to claim 1 includes a control device (U1) for controlling one or more control targets (D1, SW), a plurality of detection circuits (C11, C12, C13) which monitor the controlled object (D1, SW1) using a plurality of mutually different monitoring factors (S11, S12, S13) and, when it is detected that a predetermined state has been reached, set a status signal output as a binary signal of a high level (VDD) or a low level (GND) to one level (VDD) which indicates the predetermined state; a first control circuit (11) that controls a control target (D1, SW1) and, when a predetermined state is detected by at least one of a plurality of detection circuits (C11, C12, C13) from a status signal, also performs control according to the state; The type determination circuit (12) integrates status signals from a plurality of detection circuits (C11, C12, C13) and performs a type determination as to which of the status signals from the plurality of detection circuits (C11, C12, C13) a monitoring factor of a predetermined type has been detected, and, depending on the determination result, outputs the status signal by shifting it from one level (VDD) by one or more predetermined small levels (Δ1, Δ2, Δ3) on the side of one level (VDD) representing the predetermined type.

[0046] According to the above configuration, the receiving side, such as a higher-level controller (U0) or another control device that receives a status signal from the control device (U1), can determine that the control device (U1) has become a monitoring factor of a predetermined mode when the status signal becomes one of the levels (VDD). Furthermore, the receiving side (U0) detects the minute level shift amount (Δ1, Δ2, Δ3) of the status signal and has a type decoding unit (55) that decodes the type of the monitoring factor that has become the predetermined mode from the detection result, so that more information can be provided without providing a special communication terminal and communication circuit other than the receiving terminal (F01) of the status signal. On the other hand, the receiving side (F04, 52) of an existing controller or the like that can only receive and determine the status signal as a normal binary signal will not erroneously determine the status signal because the level shift amount of the status signal is minute.

[0047] <Appendix 2> The control device (U1) described in Supplementary Note 2 is the control device (U1) described in Supplementary Note 1, in which the first control circuit (11) performs control in accordance with a predetermined mode, taking into consideration the determination result of the type determination circuit (12).

[0048] According to the above-described configuration, the first control circuit (11) performs control in response to the cause of the abnormality, for example, when an abnormal state occurs in a predetermined manner, and therefore, more precise control or control closer to the limit can be performed.

[0049] <Appendix 3> The controller (U0) described in Supplementary Note 3 includes one or more external input terminals (F01, F02, F03) to which status signals are input from one or more of the control devices (U1) described in Supplementary Note 1 or 2; a determination circuit (55) corresponding to the external input terminals (F01, F02, F03); a second control circuit (51) that utilizes the determination result of the determination circuit (55); The determination circuit (55) determines that the control device (U1) has become a monitoring factor of a predetermined mode when the status signal has become one of the levels (VDD), and is provided with a type decoding unit (55) that, when it detects a predetermined minute level shift amount (Δ1, Δ2, Δ3) from one of the levels (VDD), high level (VDD) or low level (GND), decodes the type of the monitoring factor that has become the predetermined mode from the detection result.

[0050] According to the above configuration, the controller (U0) can be combined with a control device (U1) capable of level-shifting the status signal to recognize monitoring factors that have become predetermined, and to utilize the status signal in a more advanced manner, without providing special communication terminals and communication circuits, etc. On the other hand, the controller (U0) can also be used in combination with an existing control device (U3) that cannot level-shift the status signal, without making any special changes to its own specifications.

[0051] <Appendix 4> The controller (U0) described in supplementary note 4 is the controller (U0) described in supplementary note 3, in which the type decoding unit (55) is an analog / digital converter.

[0052] According to the above configuration, since the analog / digital converter (55) in the controller (U0) including the central processing unit and its associated circuits is relatively versatile, it is possible to suppress an increase in the cost of the controller (U0).

[0053] <Appendix 5> The electronic control device (1) described in Appendix 5 includes the control device (U1) described in Appendix 1 or 2 and the controller (U0) described in Appendix 3 or 4.

[0054] According to the above configuration, it is possible to realize an electronic control device (1) that can utilize status signals in a more advanced manner without providing a special communication terminal, communication circuit, or the like.

[0055] <Appendix 6> The electronic control device (1) according to supplementary note 6 is the electronic control device (1) according to supplementary note 5, wherein the status signal is a fault signal indicating that the monitored factor is in an abnormal state.

[0056] According to the above configuration, the fault signal indicating that the monitored object (D1, SW1) is in an abnormal state is, for example, a binary signal that switches to a low level (GND) when in a healthy state and to a high level (VDD) when in an abnormal state, and has been widely used in the past. Therefore, it is preferable that the use of the fault signal in the electronic control device (1) can determine the type of monitoring cause that caused the fault state without providing a special communication terminal or communication circuit. In addition, it is preferable that both the control device (U3) and the controller can use existing configurations.

[0057] <Appendix 7> The electronic control device (1) described in Appendix 7 is the electronic control device (1) described in Appendix 5 or 6, and has another controller in which the judgment circuit has, instead of the type decoding unit (55), a binary judgment unit (52) that judges whether the level (VDD) has become one of a predetermined high level (VDD) or a low level (GND).

[0058] According to the above configuration, instead of or in addition to the controller (U0) of the present disclosure having a type decoding unit (55) in the judgment circuit, an existing controller (52) that does not have a type decoding unit (55) and can only make binary judgments is used. In this case, for example, the controller (U0) of the present disclosure cooperates with the control device (U1) to perform highly accurate control, while the existing controller performs other unrelated control or simply watches the status signal and uses the status signal in binary form. In this way, it is possible to update part of the control devices (U1, U2, U3) and controller (U0) that constitute the electronic control device (1), thereby expanding the versatility of the electronic control device (1).

[0059] <Appendix 8> The electronic control device (1) described in Supplementary Note 8 is the electronic control device (1) described in any one of Supplementary Notes 5 to 7, in which the control device (U1) is a control device for a power supply circuit (D1, SW1) that supplies power to a load.

[0060] According to the above configuration, it is possible to realize a power supply control device that can perform more precise control or control closer to the limit.

[0061] <Appendix 9> The electronic control device (1) described in Appendix 9 is the electronic control device (1) described in any one of Appendixes 5 to 8, in which the control device (U3) is a load driving device that power amplifies a control signal from the controller (U0) to drive a load (L).

[0062] According to the above configuration, it is possible to realize a load driver that can perform more precise or closer-to-limit control. [Explanation of symbols]

[0063] 1 Electronic control device 11, 31 First control circuit 12 Type determination circuit 51 Second control circuit 52 Interface Circuit 53 Memory 54 Multiplexer 55 Analog / Digital Conversion Circuit 60 Power circuit 61 Primary side circuit 62 Secondary circuit 63 Trans 63a primary winding 63b Secondary winding 64 Commercial power supply 65 Filters 66 Reactance 71 Power factor correction circuit 711, 721, 722, 732 Capacitors 72 LLC Converter 73 Buck Converter 731 Inductor 733 Output terminal B1 Unity Gain Buffer B2 Buffer C11, C12, C13, C31, C32, C33 detection circuit CTL01, CTL02, CTL03, CTL1, CTL2, CTL3 terminals D1, D21, D22, D3 drive circuit E1, E2, E3 power supply F01, F02, F03, F1, F2, F3 Fault terminals F04 Input terminal G1, G2, G4 AND gate G3 OR Gate IN11, IN12, IN13, IN31, IN32, IN33 input terminals L load OUT1, OUT2, OUT3 output terminals P01, P11, P21, P31 Power input terminals P02, P12, P22, P32 GND terminal Q1, Q2, Q3, Q4 Switching elements R1, R2, R3, R4 ladder resistors S11, S12, S13, S31, S32, S33 Sensors SW1, SW21, SW22, SW3 switching elements U0 Controller U1, U2, U3 Control Unit

Claims

1. In a control device for controlling one or more control objects, a plurality of detection circuits which monitor the controlled object based on a plurality of mutually different monitoring factors, and when it is detected that the controlled object has reached a predetermined state, change a status signal outputted as a binary signal of high level or low level to one level which represents the predetermined state; a first control circuit that controls the controlled object and, when the predetermined state is detected by at least one of the plurality of detection circuits from the status signal, also performs control according to the state; a type determination circuit that integrates status signals of the plurality of detection circuits, and performs a type determination as to which of the status signals of the plurality of detection circuits has detected a monitoring factor of the predetermined mode, and, depending on a result of the determination, shifts the status signal by one or more predetermined small levels from one level representing the predetermined mode, and outputs the status signal.

2. The control device according to claim 1 , wherein the first control circuit performs control in accordance with the predetermined mode while taking into consideration a result of determination by the type determination circuit.

3. one or more external input terminals to which the status signals are input from one or more of the control devices according to claim 1; a determination circuit corresponding to the external input terminal; a second control circuit that utilizes a determination result of the determination circuit; The determination circuit determines that a monitoring factor of a predetermined mode has occurred in the control device when the status signal has become at one of the levels, and the determination side is provided with a type decoding unit that, when a predetermined minute level shift amount is detected from one of the high level and low level, decodes the type of the monitoring factor that has become the predetermined mode from the detection result.

4. The controller of claim 3 , wherein the type decoder is an analog-to-digital converter.

5. The control device according to claim 1 is provided with the controller according to claim 3. Electronic control unit.

6. 6. The electronic control device according to claim 5, wherein the status signal is a fault signal which indicates that the monitored factor is in an abnormal state.

7. 6. The electronic control device according to claim 5, further comprising, in said determination circuit, another controller provided with a binary determination section for determining whether said predetermined level has reached one of a high level and a low level, instead of said type decoding section.

8. 6. The electronic control device according to claim 5, wherein the control device is a control device for a power supply circuit that supplies power to a load.

9. 6. The electronic control device according to claim 5, wherein the control device is a load driver that drives a load by amplifying the power of the control signal from the controller.

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