Method for manufacturing semiconductor device

Abstract

To provide a method for manufacturing a semiconductor device that can improve electrical characteristics.SOLUTION: In a method for manufacturing a semiconductor device, a substrate on which an oxide semiconductor is formed is loaded into a chamber, the temperature in the chamber is set to the first temperature, oxidizing gas is supplied to the chamber, the temperature in the chamber is lowered from the first temperature, the supply of oxidizing gas to the chamber is stopped after the temperature in the chamber starts to drop, and after the temperature in the chamber reaches the second temperature lower than the first temperature, the substrate is unloaded from the chamber.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present embodiment relates to a method for manufacturing a semiconductor device. [Background technology]

[0002] 2. Description of the Related Art Semiconductor devices including an oxide semiconductor have been proposed. In a semiconductor device including an oxide semiconductor, it is desirable to suppress oxygen vacancies in the oxide semiconductor and improve electrical characteristics. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2021-180328 A [Patent Document 2] JP 2023-29647 A Summary of the Invention [Problem to be solved by the invention]

[0004] According to this embodiment, a method for manufacturing a semiconductor device capable of improving electrical characteristics is provided. [Means for solving the problem]

[0005] One aspect of the present disclosure provides a method for manufacturing a semiconductor device having an oxide semiconductor, comprising: loading a substrate having an oxide semiconductor formed thereon into a chamber; setting the temperature in the chamber to a first temperature; supplying an oxidizing gas into the chamber; lowering the temperature in the chamber from the first temperature; after starting to lower the temperature, stopping the supply of the oxidizing gas into the chamber; and, after the temperature in the chamber reaches a second temperature lower than the first temperature, unloading the substrate from the chamber. [Brief description of the drawings]

[0006] [Figure 1] 1 is a circuit diagram showing an example of a circuit configuration of a semiconductor memory device according to an embodiment of the present invention; [Diagram 2] 1 is a schematic cross-sectional view showing an example of a physical configuration of a semiconductor memory device according to an embodiment of the present invention; [Figure 3A] FIG. 2 is a schematic side view of the substrate processing apparatus 200. [Figure 3B] FIG. 2 is a schematic cross-sectional plan view of the substrate processing apparatus 200. [Figure 4] 1 is a flowchart of a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Diagram 5] 11 is a schematic diagram showing a change in temperature over time in a chamber in a semiconductor device manufacturing method according to a comparative example. [Figure 6] 5A to 5C are schematic diagrams showing changes in temperature over time within a chamber in the method for manufacturing a semiconductor device according to the embodiment; [Figure 7] 5A to 5C are schematic diagrams showing changes in temperature over time within a chamber in the method for manufacturing a semiconductor device according to the embodiment; [Figure 8] 5A to 5C are schematic diagrams showing changes in temperature over time within a chamber in the method for manufacturing a semiconductor device according to the embodiment; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, the present embodiment will be described with reference to the accompanying drawings. In order to facilitate understanding of the description, the same components in each drawing are denoted by the same reference numerals as much as possible, and duplicate descriptions will be omitted or simplified.

[0008] Each drawing may show an X-axis, a Y-axis, and a Z-axis. The X-axis, the Y-axis, and the Z-axis form a right-handed three-dimensional Cartesian coordinate system. Hereinafter, the direction of the X-axis arrow may be called the X-axis + direction, and the direction opposite to the arrow may be called the X-axis - direction, and the same applies to the other axes. The Z-axis + direction and the Z-axis - direction may be called "upper" and "lower", respectively. Planes perpendicular to the X-axis, Y-axis, or Z-axis may be called the YZ plane, ZX plane, or XY plane, respectively. The Z-axis direction may be called the "upper / lower direction". "Upper", "lower", and "upper / lower direction" are terms that indicate the relative positional relationship within the drawing, and are not terms that define the orientation based on the vertical direction.

[0009] In addition, unless otherwise specifically explained, the dimensions of components shown in each drawing may be shown differently from their actual dimensions in order to make the explanation easier to understand.

[0010] In this specification, the term "connection" includes not only a physical connection but also an electrical connection, and unless otherwise specified, includes not only a direct connection but also an indirect connection via another object.

[0011] In this specification, the term "formed above" does not only mean a case where the material is formed in contact with the material above, but also includes a case where the material is formed above via another object, unless otherwise specified. The same applies to "formed below" and the like.

[0012] [First embodiment] Hereinafter, a semiconductor memory device 101 (hereinafter also referred to as the semiconductor device 101) having a memory cell array in which a plurality of memory cells are arranged will be described, which is a semiconductor device manufactured by a manufacturing method of a semiconductor device according to an embodiment of the present disclosure. Note that, below, the semiconductor device and the manufacturing method thereof according to the embodiment of the present disclosure will be described using a DRAM as an example, but the embodiment of the present disclosure is not limited thereto. The semiconductor device according to the embodiment of the present disclosure may be other semiconductor devices having an oxide semiconductor, and the manufacturing method of a semiconductor device according to an embodiment of the present disclosure can be used as a manufacturing method of such other semiconductor devices.

[0013] [Circuit configuration of semiconductor memory device] 1 shows an example of a circuit configuration of a semiconductor memory device 101 according to this embodiment. As shown in the figure, the semiconductor memory device 101 includes a memory cell array composed of a plurality of memory cells MC, a plurality of word lines WL, and a plurality of bit lines BL. In the figure, a word line WL is shown as an example of the plurality of word lines WL. n , word line WL n+1 and word line WL n+2 (where n is a positive integer). As an example of the plurality of bit lines BL, m , bit line BLm+1 and bit line BL m+2 where m is a positive integer.

[0014] A plurality of memory cells MC are arranged in, for example, a matrix to form a memory cell array. The memory cell MC includes a memory transistor MTR, which is a field effect transistor (FET), and a memory capacitor MCP.

[0015] A plurality of memory cells MC arranged in the row direction are connected to a word line WL (e.g., word line WL n Specifically, the gate of the memory transistor MTR included in the memory cell MC is connected to the word line WL corresponding to the row to which the memory cell MC belongs.

[0016] A plurality of memory cells MC arranged in the column direction are connected to a bit line BL (e.g., bit line BL m+2 ) In particular, one of the source or drain of the memory transistor MTR is connected to a bit line BL corresponding to the column to which the memory cell MC belongs. Meanwhile, the other of the source or drain of the memory transistor MTR is connected to one electrode of the memory capacitor MCP included in the memory cell MC.

[0017] The memory capacitor MCP is configured to be able to hold data by holding electric charges, and includes one capacitor electrode connected to the other of the source or drain of the memory transistor MTR, a capacitor dielectric film, and the other capacitor electrode facing the one capacitor electrode via the capacitor dielectric film.

[0018] In the above configuration, a voltage is applied to a predetermined word line WL to switch a predetermined number of memory transistors MTR connected to the word line WL. Furthermore, by passing a current through a bit line BL connected to a predetermined memory transistor MTR, it becomes possible to store charge in a memory capacitor MCP connected to the memory transistor MTR via one of the memory transistors MTR. In this way, each memory cell MC of the memory cell array is configured to be able to hold data.

[0019] [Physical structure of semiconductor memory device] 2 is a schematic cross-sectional view showing the physical configuration of the semiconductor memory device 101 according to this embodiment. As shown in FIG. 2, the semiconductor memory device 101 includes a semiconductor substrate 10, a logic circuit 11, a capacitor 20, a field effect transistor 40, a conductor 33, insulating layers 34, 35, 45, and 63, and a conductive layer 51.

[0020] The capacitor 20 corresponds to the memory capacitor MCP in Fig. 1. The field effect transistor 40 corresponds to the memory transistor MTR in Fig. 1. The semiconductor device 30 corresponds to the memory cell MC in Fig. 1. The semiconductor device 30 includes the capacitor 20 and the field effect transistor 40.

[0021] The capacitor 20 is a pillar-type capacitor extending in the vertical direction. The capacitor 20 includes a conductor 21, a capacitor electrode 24 electrically connected to the conductor 21, a capacitor electrode 25 facing the capacitor electrode 24, an insulating film 22 provided between the capacitor electrode 24 and the capacitor electrode 25, and a conductor 23 electrically connected to the capacitor electrode 25 for applying a constant potential (for example, a ground potential) to the capacitor electrode 25.

[0022] The conductor 21 has an upper end that abuts against the lower end of the lower electrode 32, and is formed to extend downward from the upper end. The capacitor electrode 24 is formed to be electrically connected to the lower electrode 32 and the conductor 21, and in this embodiment is formed so as to cover the side surfaces of the lower electrode 32 and the conductor 21. The insulating film 22 is formed so as to cover the side surfaces of the capacitor electrode 24. The capacitor electrode 25 surrounds the lower side surfaces and bottom surface of the insulating film 22, and has a lower end that abuts against the upper end surface of the conductor 23.

[0023] The conductor 21 may be made of a material such as amorphous silicon. The insulating film 22 may be made of a material such as hafnium oxide. The conductor 23 and the capacitor electrodes 24 and 25 may be made of a material such as tungsten (W) and titanium nitride (TiN).

[0024] The field effect transistor 40 includes a lower electrode 32, an oxide semiconductor 70, a gate insulating film 43, a conductive layer 42, and an upper electrode 50. The oxide semiconductor 70 is formed above the lower electrode 32 and is electrically connected to the lower electrode 32. The oxide semiconductor 70 corresponds to the channel of the field effect transistor 40. The gate insulating film 43 surrounds the side surface of the oxide semiconductor 70. The conductive layer 42 is provided opposite to the oxide semiconductor 70 via the gate insulating film 43, and corresponds to the gate electrode of the field effect transistor 40.

[0025] In this embodiment, the field effect transistor 40 is formed above the capacitor 20. As will be described later, the field effect transistor 40 is a vertical transistor having a channel extending in the vertical direction. As shown in FIG. 2, the position of the capacitor 20 in the Z direction is different from the position of the field effect transistor 40 in the Z direction.

[0026] 2, an imaginary straight line including a central axis extending in the vertical direction of the capacitor 20 passes through a channel extending in the vertical direction of the field effect transistor 40. This makes it possible to increase the density of the memory cell array.

[0027] As described later, the semiconductor memory device 101 of this embodiment further includes at least a part of the logic circuit 11 below the capacitor 20, which allows for further integration of the semiconductor memory device. However, the semiconductor memory device 101 may include another capacitor capable of storing electric charge instead of the three-dimensional capacitor shown in this embodiment.

[0028] The lower electrode 32 is provided so that its upper end is in contact with the lower end of the oxide semiconductor 70 and its lower end is in contact with the conductor 21 of the capacitor 20, thereby supplying electric charge to the capacitor 20. The lower electrode 32 is, for example, an oxide conductor containing indium (In), tin (Sn) and oxygen (O). The lower electrode 32 contains, for example, indium tin oxide.

[0029] The oxide semiconductor 70 includes an upper end portion corresponding to one of the drain or source of the field effect transistor 40, a lower end portion corresponding to the other of the drain or source, and a central portion provided between the upper end portion and the lower end portion and corresponding to a channel. The oxide semiconductor 70 is formed in a columnar shape extending in the vertical direction. Therefore, the field effect transistor 40 is a so-called vertical transistor.

[0030] The oxide semiconductor 70 is a semiconductor in which oxygen vacancies serve as donors. The oxide semiconductor 70 contains, for example, at least one element selected from the group consisting of indium (In), gallium (Ga), silicon (Si), aluminum (Al), titanium (Ti), and tin (Sn), zinc (Zn), and oxygen (O). In detail, the oxide semiconductor 70 is a layer containing oxides of indium, gallium, and zinc, that is, indium gallium zinc oxide. The oxide semiconductor 70 has, for example, an amorphous structure. However, the oxide semiconductor 70 may be another type of oxide semiconductor.

[0031] The gate insulating film 43 includes, for example, a silicon nitride film containing silicon and nitrogen.

[0032] The conductive layer 42 corresponds to the gate electrode of the field effect transistor 40, and is provided opposite to a central portion between the upper and lower ends of the oxide semiconductor 70 via a gate insulating film 43. The conductive layer 42 is made of, for example, tungsten (W).

[0033] The upper electrode 50 is electrically connected to the oxide semiconductor 70 and is formed above the oxide semiconductor 70 .

[0034] The upper electrode 50 includes a metal oxide layer 50a, a barrier metal layer 50b, and a metal film 50c.

[0035] The upper electrode 50 is provided above the oxide semiconductor 70 in contact with the upper end of the oxide semiconductor 70. The metal oxide layer 50a is an oxide conductor containing, for example, indium (In), tin (Sn) and oxygen (O). The upper electrode 50 contains, for example, indium tin oxide.

[0036] In this embodiment, the barrier metal layer 50b is electrically connected to the metal oxide layer 50a and is formed above and in contact with the metal oxide layer 50a.

[0037] In this embodiment, the barrier metal layer 50b is a barrier metal and is made of, for example, titanium nitride (TiN).

[0038] The metal film 50c is electrically connected to the barrier metal layer 50b and is formed above the barrier metal layer 50b. The metal film 50c is made of tungsten (W).

[0039] The upper electrode 50 is electrically connected to a conductive layer 51 (an example of a "signal line") that corresponds to the bit line BL. The conductive layer 51 is provided in contact with the metal film 50c that is the upper end of the upper electrode 50, for example.

[0040] The logic circuit 11 includes peripheral circuits such as a decoder for selecting one or more memory cells MC from the memory cells MC included in the semiconductor memory device 101, a sense amplifier connected to the bit line BL, and a register constituted by an SRAM.

[0041] The logic circuit 11 may be realized by a CMOS circuit having field effect transistors, that is, P-channel field effect transistors (Pch-FETs) and N-channel field effect transistors (Nch-FETs), formed by a CMOS process.

[0042] The field effect transistors of the logic circuit 11 can be formed using a semiconductor substrate 10 such as a single crystal silicon substrate. The Pch-FET and Nch-FET are so-called horizontal (planar) field effect transistors that have a channel region, a source region, and a drain region in the semiconductor substrate 10 and have a channel for flowing carriers in the X-axis direction or Y-axis direction approximately parallel to the surface of the semiconductor substrate 10 in a region close to the surface of the semiconductor substrate 10. FIG. 2 illustrates an example of a horizontal field effect transistor included in such a logic circuit 11.

[0043] The conductor 33 includes wiring that electrically connects the logic circuit 11 and the semiconductor device 30. The conductor 33 may include via wiring extending in the vertical direction and wiring extending in the horizontal direction, and may have via wiring that extends in the Z-axis direction as shown in Fig. 2 and connects the word line WL and the logic circuit 11 provided on the semiconductor substrate 10. The conductor 33 may be made of, for example, copper.

[0044] The insulating layer 34 is formed between the capacitors 20 so as to insulate the capacitors 20 from each other. The insulating layer 35 is provided above the insulating layer 34. The insulating layer 45 is formed between the oxide semiconductors 70 so as to insulate the oxide semiconductors 70 from each other. The insulating layer 63 is formed between the upper electrodes 50, between the conductive layers 51, and above the conductive layers 51 so as to insulate the upper electrodes 50 from each other and the conductive layers 51 from each other.

[0045] The insulating layers 34 and 45 are made of, for example, a silicon oxide film containing silicon and oxygen. The insulating layer 35 is made of, for example, a silicon nitride film containing silicon and nitrogen so that it also functions as a protective layer. The insulating layer 63 is made of, for example, a silicon oxide film containing silicon and oxygen, or a silane film containing silicon and hydrogen.

[0046] According to the semiconductor memory device 101 having the above configuration, when writing information, a voltage is applied to the word line WL selected by the logic circuit 11 to make the field effect transistor 40 connected to this word line WL conductive, and a voltage is applied to the bit line BL selected by the logic circuit 11, so that it is possible to store charge from the bit line BL to the memory capacitor MCP via the channel of the field effect transistor 40, thereby recording information. When reading information, when a voltage is applied to the word line WL selected by the logic circuit 11 to make the field effect transistor 40 connected to this word line WL conductive, it is possible to read information based on sensing the voltage in the bit line BL selected by the logic circuit 11, which varies depending on the presence or absence of charge stored in the memory capacitor MCP.

[0047] [Configuration of substrate processing equipment] The configuration of a substrate processing apparatus 200 used in carrying out the semiconductor device manufacturing method according to this embodiment will be described with reference to Figures 3A and 3B. Figure 3A is a schematic side view of the substrate processing apparatus 200. Figure 3B is a schematic plan sectional view of the substrate processing apparatus 200. The substrate processing apparatus 200 can be used as a processing furnace (chamber) used in the semiconductor device manufacturing method according to this embodiment.

[0048] As shown in Figures 3A and 3B, the substrate processing apparatus 200 includes a processing furnace 210 (chamber), a gas supply section 220, a gas exhaust section 230, a heating section 240, a cooling section 250, a wafer support section 260, a vacuum pump 280, and a control section 300.

[0049] The process furnace 210 is cylindrical with a hemispherical upper end, and is formed inside an outer tube 270. The process furnace 210 and the outer tube 270 include quartz.

[0050] The control unit 300 includes a gas flow rate control unit 302 , a gas discharge control unit 304 , a heating control unit 306 , a cooling control unit 308 , and a transfer control unit 310 .

[0051] The gas supply unit 220 includes a gas supply chamber 222 provided inside the processing furnace 210, a plurality of gas supply ports 224 provided on a side wall of the gas supply chamber 222, a gas supply valve 226, and a mass flow controller (MFC) 228. Gas is supplied from the gas supply unit 220 into the processing furnace 210. The supply of gas into the processing furnace 210 is controlled by a control unit 300. A gas flow rate control unit 302 of the control unit 300 is electrically connected to the gas supply valve 226 and the MFC 228. The gas flow rate control unit 302 controls the gas supply valve 226 and the MFC 228 to control the flow rate of the processing gas supplied into the processing furnace 210 and the timing at which the processing gas is supplied into the processing furnace 210.

[0052] The gas supply ports 224 are provided so that gas is uniformly supplied to the wafer 10 supported by the wafer support 260. The gas supply unit 220 further has one or more gas supply sources (not shown) and supplies one or more types of gas.

[0053] The gas exhaust unit 230 includes a gas exhaust chamber 232 provided between the processing furnace 210 and the outer tube 270, a plurality of gas exhaust ports 234 provided on a side wall of the gas exhaust chamber 232, a pressure sensor 237, and a gas exhaust valve 239. A vacuum pump 280 is provided downstream of the gas exhaust valve 239. The gas exhaust unit 230 exhausts gas from the processing furnace 210. The exhaust of gas from the processing furnace 210 is controlled by the control unit 300. The pressure sensor 237 detects the pressure in the processing furnace 210. The pressure sensor 237, the gas exhaust valve 239, and the vacuum pump 280 are electrically connected to a gas exhaust control unit 304 of the control unit 300. The gas exhaust control unit 304 controls the amount and timing of exhaust of the processing gas from the processing furnace 210 by controlling the gas exhaust valve 239 and the vacuum pump 280 based on the pressure value in the processing furnace 210 detected by the pressure sensor 237, for example. Further, the gas exhaust control unit 304 controls the pressure inside the processing furnace 210. For example, the gas exhaust control unit 304 controls the timing of drawing a vacuum inside the processing furnace 210 and the pressure inside the processing furnace 210 when drawing a vacuum.

[0054] The multiple gas exhaust ports 234 are provided so that gas is uniformly removed (e.g., exhausted) from the wafers 10 supported by the multiple wafer supports 262. The gas exhaust port 234 is provided, for example, in the processing furnace 210. Between the gas exhaust port 234 and the outer tube 270, for example, a gas exhaust chamber 232 is provided.

[0055] The heating unit 240 is disposed outside the outer tube 270, has an RF coil, and heats the processing furnace 210 by, for example, induction heating. The heating of the processing furnace 210 by the heating unit 240 is controlled by a heating control unit 306 of the control unit 300.

[0056] The cooling unit 250 is disposed outside the heating unit 240, and has a cooling medium flow path formed therein through which a cooling medium, such as cooling water, can flow. The cooling unit 250 has a cooling medium removal unit (not shown), and removes the cooling medium used for cooling when the cooling of the processing furnace 210 is completed, etc. The cooling of the processing furnace 210 by the cooling unit 250 is controlled by a cooling control unit 308 of the control unit 300.

[0057] The wafer support part 260 is provided inside the processing furnace 210. The wafer support part 260 supports a wafer (substrate 10) to be processed in the processing furnace 210. The loading and unloading of the wafer into the processing furnace 210 is controlled by the transfer control part 310 of the control part 300, for example, by driving a wafer transfer device (not shown).

[0058] The substrate processing apparatus 200 may further include one or more thermometer units for measuring the temperature inside the processing furnace 210. The heating control unit 306 and the cooling control unit 308 of the control unit 300 control the heating unit 240 and the cooling unit 250 based on the temperature inside the processing furnace 210 measured by the temperature measuring units.

[0059] [Method of manufacturing semiconductor device] A method for manufacturing a semiconductor device according to an embodiment of the present disclosure will be described with reference to FIG.

[0060] The manufacturing method of a semiconductor device according to this embodiment is a manufacturing method of a semiconductor device 101 having an oxide semiconductor 70, in which a substrate on which an oxide semiconductor is formed is loaded (carried into) a chamber (process furnace 210 (FIGS. 3A and 3B), etc.), the temperature in the chamber is set to a first temperature, an oxidizing gas is supplied into the chamber, the temperature in the chamber is lowered from the first temperature, and after the temperature lowering starts, the supply of the oxidizing gas into the chamber is stopped, and after the temperature in the chamber reaches a second temperature lower than or equal to a second temperature that is lower than the first temperature, the substrate is unloaded from the chamber. The manufacturing method of a semiconductor device according to an embodiment of the present disclosure can be used, for example, in manufacturing a semiconductor device having the above-mentioned oxide semiconductor.

[0061] Hereinafter, a method for manufacturing a semiconductor device according to an embodiment of the present disclosure will be described with reference to Fig. 4. The method for manufacturing a semiconductor device according to the present embodiment shown in Fig. 4 may be carried out, for example, in a step of supplying oxygen to a layer or film formed of a metal oxide exhibiting semiconductor properties, such as the oxide semiconductor 70, in a method for manufacturing a semiconductor device.

[0062] 4, first, the substrate 10 on which the oxide semiconductor is formed is loaded into the chamber (S402). The substrate 10 has, for example, the structure shown in FIG. 2. The substrate 10 may include the oxide semiconductor 70, and may not include, for example, the upper electrode 50, the conductive layer 51, and the insulating layer 63.

[0063] Next, the temperature inside the chamber is set to a first temperature (S404).

[0064] Next, an oxidizing gas is supplied into the chamber (S406).

[0065] Next, the temperature inside the chamber is decreased from the first temperature (S408).

[0066] After the temperature drop is started, the supply of the oxidizing gas is stopped (S410).

[0067] Then, after the temperature inside the chamber reaches a second temperature lower than the first temperature, the substrate 10 is unloaded from the chamber (S412). At this time, the temperature inside the chamber has been lowered to the second temperature.

[0068] In the method for manufacturing a semiconductor device according to the present embodiment, an oxidizing gas is supplied into a chamber in which the substrate 10 on which the oxide semiconductor 70 is formed is loaded (e.g., into a chamber into which the substrate 10 is carried), whereby oxygen can be supplied to the oxide semiconductor 70 formed on the substrate 10, for example. The oxide semiconductor 70 is supplied with oxygen that has passed through the insulating layer 63 (see FIG. 2), for example. In the method for manufacturing a semiconductor device according to the present embodiment, as described below, it is possible to suppress desorption of oxygen supplied to the oxide semiconductor 70, and as a result, the oxide semiconductor 70 can have sufficient oxygen.

[0069] A comparative example of a semiconductor device manufacturing method will be described with reference to Fig. 5. Fig. 5 is a schematic diagram showing the change in temperature (vertical axis) in a chamber over time (horizontal axis) in the comparative example of a semiconductor device manufacturing method. In Fig. 5, the upper part shows the gas supplied into the chamber.

[0070] In the comparative example of the semiconductor device manufacturing method, a substrate is loaded into a chamber at time t50. The temperature in the chamber when the substrate is loaded is, for example, 400° C. When the substrate is loaded, nitrogen gas is supplied into the chamber. Note that the supply of nitrogen gas into the chamber may be performed before the substrate is loaded.

[0071] After that, from time t51, the nitrogen gas in the chamber is removed using a vacuum pump to evacuate the chamber. Note that the chamber used for processing may be capable of simultaneously supplying gas into the chamber and evacuating the chamber. In such a case, the supply of nitrogen gas into the chamber may be stopped at time t51 to remove the nitrogen gas from the chamber.

[0072] Subsequently, from time t52, an oxidizing gas is supplied into the chamber. As described later, for example, ozone gas is supplied as the oxidizing gas, and oxygen is thereby supplied to, for example, a substrate (specifically, for example, an oxide semiconductor provided on the substrate) in the chamber at least partly between time t52 and time t53.

[0073] Next, from time t53 to time t54, the oxidizing gas is removed using a vacuum pump to create a vacuum inside the chamber again, and then nitrogen gas is supplied into the chamber at time t54. Then, at time t55, the substrate is unloaded from the chamber in the nitrogen gas atmosphere to finish the process.

[0074] In the comparative semiconductor device manufacturing method, as shown in Fig. 5, the temperature inside the chamber is kept at the same temperature (e.g., about 400°C) from when the substrate is loaded into the chamber to when it is unloaded. In other words, the temperature inside the chamber is kept almost constant while the oxidizing gas is being supplied. The temperature of the chamber when the supply of the oxidizing gas starts is approximately the same as the temperature of the chamber when the supply of the oxidizing gas is stopped.

[0075] It was found that when a process of supplying oxygen to a substrate having an oxide semiconductor was carried out by the comparative example semiconductor device manufacturing method, the manufactured semiconductor device did not have the desired electrical characteristics in some cases. For example, it was found that a transistor using an oxide semiconductor in a channel region had a current exceeding a desired value at a specified voltage.

[0076] It is considered that oxygen vacancies exist in the oxide semiconductor, which generate electrons as carriers. Therefore, the threshold voltage of a transistor in which a channel region is formed using an oxide semiconductor may shift in the negative direction. This is considered to be because oxygen in the oxide semiconductor is desorbed because the temperature inside the chamber remains high even after the supply of the oxidation gas is stopped. In other words, it is considered that oxygen supplied to the oxide semiconductor from time t52 to time t53 is desorbed from the oxide semiconductor from time t53 to time t55.

[0077] As a result of extensive research, the present inventors have found that the electrical characteristics can be improved by stopping the supply of the oxidizing gas after starting to lower the temperature inside the chamber.

[0078] Fig. 6 shows the change in temperature in the chamber over time in the method for manufacturing a semiconductor device according to this embodiment, similar to Fig. 5. As in Fig. 5, Fig. 6 also shows the gas supplied to the chamber.

[0079] 6, in the method for manufacturing a semiconductor device according to this embodiment, a substrate 10 is loaded into a chamber at time t60. The temperature in the chamber when the substrate is loaded is, for example, 400° C. When the substrate is loaded, nitrogen gas is supplied into the chamber. Note that nitrogen gas may be supplied into the chamber before the substrate 10 is loaded.

[0080] Thereafter, from time t61, the nitrogen gas in the chamber is removed using vacuum pump 280 to evacuate the chamber. As in the case of the semiconductor device manufacturing method of the present embodiment, for example, in a configuration in which nitrogen gas is supplied into the chamber and exhausted at the same time from time t60 to time t61, the supply of nitrogen gas into the chamber may be stopped at time t61 to remove the nitrogen gas from the chamber.

[0081] Subsequently, at time t62, an oxidizing gas such as ozone gas is supplied into the chamber. During at least a portion of the period from time t62 to time t65, oxygen is supplied to, for example, the substrate 10 (specifically, for example, the oxide semiconductor 70 provided on the substrate 10) in the chamber.

[0082] Next, from time t65 to time t66, the oxidizing gas is removed using a vacuum pump to create a vacuum inside the chamber again, and then nitrogen gas is supplied into the chamber at time t66. Then, at time t67, the substrate 10 is unloaded from the chamber in the nitrogen gas atmosphere to finish the process.

[0083] In the method for manufacturing a semiconductor device according to the present embodiment, as shown in FIG. 6, the temperature in the chamber is lowered (at time t63) before the time t65 at which the supply of the oxidizing gas is stopped. For example, at time t62, the temperature in the chamber (the first temperature in this embodiment) is 400° C., and the oxidizing gas is supplied while the temperature in the chamber is kept at 400° C., and then, from time t63 to time t64 before time t65, the temperature in the chamber is lowered from 400° C. to 200° C. (the second temperature in this embodiment). After that, the second temperature is maintained from time t64 to time t65, and then, evacuation is performed from time t65 while the temperature in the chamber remains at the second temperature. Next, nitrogen gas is supplied into the chamber at time t66, and then, the substrate is unloaded at time t67. At time t67, the temperature in the chamber is the second temperature, and the substrate is unloaded while the temperature in the chamber is at the second temperature.

[0084] While the oxidizing gas is being supplied, the temperature inside the chamber is not constant, and begins to decrease from time t63. After the temperature decrease, the supply of the oxidizing gas is stopped, and then the substrate 10 is unloaded.

[0085] In this manner, the temperature in the chamber is decreased during the supply of the oxidizing gas. Specifically, the temperature in the chamber is decreased from a first temperature to a second temperature while the oxidizing gas is being supplied. After the second temperature is reached, the supply of the oxidizing gas is stopped. Therefore, the temperature in the chamber is lower at the end of the supply of the oxidizing gas than at the start of the supply of the oxidizing gas. In the example shown in FIG. 6, the temperature in the chamber at time t62 is the first temperature, and the temperature in the chamber at time t65 is the second temperature, so that the temperature in the chamber is lower at time t65, which is the end of the supply of the oxidizing gas, than at time t62, which is the start of the supply of the oxidizing gas.

[0086] According to the study by the present inventors, it has been confirmed that the electrical characteristics of a semiconductor device including a substrate provided with the oxide semiconductor thus manufactured can be improved. For example, it has been found that a transistor using an oxide semiconductor to which oxygen is not supplied as in the present embodiment in a channel region has a current at a predetermined voltage that is equal to or lower than a desired value.

[0087] In the manufacturing method of the semiconductor device of this embodiment, it is considered that the temperature inside the chamber is lowered before unloading the substrate 10, which makes it difficult for oxygen supplied to the oxide semiconductor 70 to be desorbed from the oxidizing gas atmosphere inside the chamber, thereby suppressing an increase in oxygen vacancies.

[0088] As in the comparative example of the semiconductor device manufacturing method, if the supply of oxidizing gas is stopped while maintaining a relatively high temperature without lowering the temperature inside the chamber, it is considered that the oxygen supplied to the oxide semiconductor is desorbed before the substrate is unloaded. This is because the temperature inside the chamber is high when the supply of oxidizing gas is stopped and the amount of oxidizing gas in the chamber is reduced. In this embodiment, when the supply of oxidizing gas is stopped and the amount of oxidizing gas in the chamber is reduced, the temperature is low enough that oxygen desorption from the oxide semiconductor does not occur. Note that, since it takes time to lower the temperature inside the chamber, in this embodiment, the temperature is lowered halfway through the supply of oxidizing gas. Therefore, when the supply of oxidizing gas is stopped, the temperature inside the chamber is sufficiently low. In other words, the temperature inside the chamber is the second temperature when the supply of oxidizing gas is stopped and the chamber is in a vacuum, when nitrogen gas is supplied, or when the substrate is unloaded.

[0089] The amount of oxygen contained in the oxide semiconductor was compared between the semiconductor device manufacturing method of this embodiment and the semiconductor device manufacturing method of the comparative example. The amount of oxygen in the oxide semiconductor was about twice as much as that in the comparative example. In this specification, the amount of oxygen contained can be measured by, for example, sheet resistance or X-ray photoelectron spectroscopy (XPS).

[0090] In this embodiment, the first temperature may be a first temperature range that is a predetermined temperature range. In the example shown in FIG. 6, the inside of the chamber is maintained at a constant temperature of, for example, 400° C. as the first temperature from time t60 to time t63, but in this embodiment, the temperature in the chamber may not be constant. In this embodiment, the temperature in the chamber may change within a first temperature range of, for example, 390° C. to 410° C. from time t60 to time t63. For example, the temperature in the chamber may decrease within the first temperature range from 400° C. to 390° C. from time t60 to time t63. Alternatively, the temperature in the chamber may change within a first temperature range of, for example, 400° C. or more, 490° C. to 510° C., around 500° C. from time t60 to time t63.

[0091] In this embodiment, the second temperature may be in a second temperature range. For example, in the example shown in Fig. 6, the inside of the chamber is maintained at a constant temperature of, for example, 200°C as the second temperature from time t64 to time t67, but in this embodiment, the temperature in the chamber does not have to be constant. The temperature in the chamber may change within a second temperature range of, for example, 190°C to 210°C from time t64 to time t67.

[0092] 4, the method for manufacturing a semiconductor device according to the present embodiment has been described by taking as an example a case in which the substrate 10 on which an oxide semiconductor is formed is loaded into a chamber (S402) and then the temperature in the chamber is set to a first temperature (S404), but is not limited thereto. As described above with reference to FIG. 6, the substrate 10 may be loaded into the chamber after the temperature in the chamber is set to the first temperature (or a temperature in the first temperature range).

[0093] In this embodiment, while the oxidizing gas is being supplied into the chamber, for example, from time t62 to time t65 in FIG. 6 or during a part of the period from time t62 to time t65, the pressure in the chamber may be, for example, 100 Torr or more. That is, at this time, the pressure in the chamber may be 13332 Pa or more. For example, at this time, the pressure in the chamber may be 760 Torr or more (101325 Pa or more). The pressure between time t62 to time t65 or during a part of the period from time t62 to time t65 may be approximately the same as the pressure from time t60 to time t61 or from time t66 to time t67 when N2 gas is being supplied. By setting the pressure to a relatively high pressure during the supply of the oxidizing gas, the amount of oxygen contained in the oxide semiconductor 70 can be increased.

[0094] In the present embodiment, the first temperature may be equal to or higher than 300° C. By setting the first temperature to equal to or higher than 300° C., such as 400° C., oxygen can be supplied to the oxide semiconductor 70 more effectively.

[0095] The first temperature may be equal to or lower than 600° C. In the case where it is desired to suppress crystallization of the oxide semiconductor and have the oxide semiconductor contain an amorphous phase, the first temperature is preferably equal to or lower than 600° C.

[0096] In this embodiment, the difference between the temperature in the chamber at time t62 (first temperature) and the temperature in the chamber at time t64 may be 100° C. or more. For example, the first temperature may be adjusted to be 400° C. or more, and the second temperature may be adjusted to be 200° C. or less. Also, in this embodiment, the second temperature may be 250° C. or less.

[0097] In this embodiment, the oxidizing gas supplied into the chamber may be at least one of oxygen (O2), ozone (O3), water vapor (H2O), nitric oxide (NO), and nitrous oxide (N2O).

[0098] In this embodiment, the type of oxidizing gas supplied to the chamber may be switched from the first oxidizing gas to the second oxidizing gas midway. For example, before the temperature inside the process furnace 210 (chamber) starts to decrease from the first temperature, the supply of the first oxidizing gas may be stopped and the second oxidizing gas may be supplied. Figure 7 shows the change in temperature inside the chamber over time and the gases supplied at this time.

[0099] 7, ozone gas may be supplied from time t72 to time t73, and oxygen gas, which has a weaker oxidizing power than ozone gas, may be supplied from time t73 to time t76. By switching from ozone gas to oxygen gas, unloading of the substrate 10 can be performed more safely. Also, evacuation from time t76 to time t77 can be omitted.

[0100] The supply of oxygen gas starts at time t73, and the temperature inside the chamber starts to decrease (from the first temperature) at time t74. Then, at time t75, the temperature inside the chamber reaches the second temperature, and the supply of oxygen gas is stopped at time t76. That is, evacuation of the inside of the chamber starts at time t76.

[0101] As shown in Fig. 7, the process from time t70 to time t72 may be the same as the process from time t60 to time t62 described with reference to Fig. 6. That is, at time t70, the temperature inside the chamber is set to, for example, 400°C, and the substrate 10 is loaded into the chamber, and nitrogen gas is supplied into the chamber when the substrate is loaded. From time t71, the nitrogen gas in the chamber is removed using the vacuum pump 280 to evacuate the chamber. Also, at time t72, an oxidizing gas such as ozone gas is supplied into the chamber.

[0102] By supplying a sufficient amount of oxygen to the oxide semiconductor 70 while the temperature inside the chamber is at the first temperature, a second oxidizing gas having a weaker oxidizing power can be used while the temperature inside the chamber is lower than the first temperature. Note that it is not preferable to use a gas other than the oxidizing gas in place of the second oxidizing gas. This is because using a gas other than the oxidizing gas makes it easier for oxygen to be desorbed from the oxide semiconductor.

[0103] In this case, the oxidizing power of the first oxidizing gas may be equal to or greater than the oxidizing power of the second oxidizing gas. As the second oxidizing gas, oxygen (O2) or a gas containing oxygen (O2) and nitrogen (N2) may be used. In this embodiment, the oxidizing power of the first oxidizing gas and / or the second oxidizing gas means the ability to oxidize other substances (in this embodiment, the oxide semiconductor 70 of the substrate 10). The relationship of the strength of the oxidizing power is indicated by the size of the oxide film thickness when the film to be oxidized is oxidized at the same temperature and pressure, for example. When the same object is oxidized for a predetermined time under the same conditions (i.e., the same temperature and the same pressure), if the oxide film thickness formed on the object by the first oxidizing gas is greater than the oxide film thickness formed on the object by the second oxidizing gas, it can be said that the oxidizing power of the first oxidizing gas is greater than the oxidizing power of the second oxidizing gas.

[0104] In this embodiment, the first oxidizing gas and the second oxidizing gas may be different from each other. For example, ozone gas may be used as the first oxidizing gas, and oxygen gas may be used as the second oxidizing gas. Alternatively, the first oxidizing gas and the second oxidizing gas may be the same oxidizing gas. For example, both the first oxidizing gas and the second oxidizing gas may be oxygen gas. In this case, the oxidizing power of the first oxidizing gas and the oxidizing power of the second oxidizing gas are the same. Furthermore, the supply of the same oxidizing gas, such as oxygen gas, can be continued without switching the oxidizing gas supplied to the chamber.

[0105] According to the study by the present inventors, when the process according to this embodiment (the process described above with reference to FIG. 6 and the like) was performed under the same conditions as when oxygen gas was used as both the first oxidizing gas and the second oxidizing gas, and when ozone gas was used as the first oxidizing gas and oxygen gas was used as the second oxidizing gas, the oxygen content in the oxide semiconductor 70 was improved when ozone gas was used as the first oxidizing gas and oxygen gas was used as the second oxidizing gas. This is believed to be because the amount of oxygen supplied by the first oxidizing gas was improved by using an oxidizing gas with a stronger oxidizing power as the first oxidizing gas.

[0106] In this embodiment, as described above with reference to FIG. 6, nitrogen gas (N2) may be supplied into the chamber when the substrate 10 is loaded into the chamber. If the substrate 10 is loaded into a chamber containing an oxidizing gas, there is a possibility that parts and the like near the chamber may be oxidized. Nitrogen gas may be supplied into the chamber before the substrate is loaded. In particular, when an oxidizing gas with a relatively strong oxidizing power is used, it is considered that oxidation of parts and the like near the chamber is likely to progress. By supplying nitrogen gas when the substrate 10 is loaded into the chamber, oxidation of parts and the like near the chamber can be suppressed.

[0107] Also, after loading the substrate into the chamber, the nitrogen gas may be removed from the chamber. Thereafter, the chamber may be evacuated with the nitrogen gas removed from the chamber. At this time, the pressure inside the chamber may be, for example, 1 Torr or less (133 Pa or less). That is, in this embodiment, the chamber may be evacuated by, for example, setting the pressure inside the chamber to 1 Torr or less (133 Pa or less). By evacuating the chamber, for example, the nitrogen gas that has been supplied into the chamber can be more reliably removed.

[0108] Thereafter, the pressure in the chamber may be increased to, for example, 100 Torr or more (13,332 Pa or more) as described above. When the first oxidizing gas is supplied into the chamber as described above, the pressure in the chamber may be 100 Torr or more. Thereafter, after the temperature in the chamber is lowered to the second temperature, the chamber may be evacuated, and the pressure in the chamber may be 133 Pa or less, for example. As in the case where the chamber is evacuated after the supply of nitrogen gas, the first oxidizing gas can be more reliably removed by evacuating the chamber after removing the first oxidizing gas.

[0109] Thereafter, when the substrate 10 is unloaded from the chamber, nitrogen gas may be supplied into the chamber. Thereafter, the substrate 10 may be unloaded from the chamber with nitrogen gas being supplied into the chamber (for example, with the chamber being in a nitrogen gas atmosphere). Just as nitrogen gas is supplied into the chamber when the substrate 10 is loaded, by supplying nitrogen gas into the chamber when the substrate 10 is unloaded, oxidation of parts around the chamber can be suppressed.

[0110] In the example shown in FIG. 7, the first temperature may be in the first temperature range, and the second temperature may be in the second temperature range, as described above for the example shown in FIG. 6. Therefore, the temperature in the chamber may not be constant from time t70 to time t74, and the temperature in the chamber may not be constant from time t75 to time t78. For example, the temperature in the chamber may change within a first temperature range of about 400° C., which is a range of 390° C. to 410° C., from time t70 to time t74. Also, the temperature in the chamber may change within a second temperature range, for example, 190° C. to 210° C., from time t75 to time t78.

[0111] [Second embodiment] In the first embodiment, the case where the temperature inside the chamber is raised to the first temperature after the substrate 10 is loaded and before the oxidizing gas is supplied has been described as an example, but the present invention is not limited to this. In this embodiment, for example, after the substrate 10 is loaded, nitrogen gas may be removed from the chamber, the chamber is evacuated, and the supply of the oxidizing gas is then started before the temperature rise to the first temperature begins. In other words, the temperature rise to the first temperature may begin after the oxidizing gas is supplied into the chamber.

[0112] The manufacturing method of the semiconductor device in this case will be described with reference to Fig. 8. Fig. 8 shows the change in temperature in the chamber over time, similar to Fig. 6. As in Fig. 6, Fig. 8 also shows the gas supplied to the chamber.

[0113] As shown in FIG. 8, in the method for manufacturing a semiconductor device according to this embodiment, the substrate 10 is loaded into the chamber at time t80. When the substrate 10 is loaded, nitrogen gas may be supplied into the chamber. The temperature in the chamber at this time is, for example, lower than the first temperature (third temperature in this embodiment). The third temperature in this embodiment may be approximately the same as the second temperature described above, which is the temperature after the temperature is lowered from the first temperature, which is the temperature in the chamber when the first oxidizing gas is supplied, and is, for example, 200° C. The temperature in the chamber may be set to the third temperature after the supply of nitrogen gas into the chamber is started, or the supply of nitrogen gas into the chamber may be started after the temperature in the chamber is set to the third temperature. Nitrogen gas may be supplied into the chamber while adjusting the temperature in the chamber to the third temperature.

[0114] Next, from time t81, the nitrogen gas in the chamber is removed using vacuum pump 280 to evacuate the chamber. At this time, the pressure in the chamber may be set to 133 Pa or less, for example.

[0115] Subsequently, at time t82, a third oxidizing gas, such as oxygen gas, is supplied into the chamber.

[0116] With the third oxidizing gas being supplied into the chamber, i.e., with the chamber being in a third oxidizing gas atmosphere, the temperature inside the chamber starts to rise at time t83. At time t84, with the third oxidizing gas being supplied into the chamber, the temperature inside the chamber reaches, for example, 400° C. (the first temperature in this embodiment).

[0117] After that, from time t85, the supply of a first oxidizing gas such as ozone gas starts. Thus, the inside of the chamber becomes a first oxidizing gas atmosphere with the temperature inside the chamber at the first temperature.

[0118] Next, at time t86, the supply of the first oxidizing gas into the chamber is stopped, and the supply of a second oxidizing gas, such as oxygen gas, is started. With the second oxidizing gas being supplied into the chamber, the temperature inside the chamber is lowered from time t87. At time t88, the temperature inside the chamber reaches, for example, 200° C. (the second temperature in this embodiment).

[0119] After that, from time t89 to time t810, the second oxidizing gas is removed using the vacuum pump 280, and the chamber is evacuated. At this time, the pressure in the chamber is set to, for example, 133 Pa or less. As in the above-described embodiment, by evacuating the chamber after removing the second oxidizing gas, the second oxidizing gas can be more reliably removed.

[0120] Thereafter, at time t810, nitrogen gas begins to be supplied into the chamber, similarly to the process described with reference to Fig. 6. Subsequently, at time t811, nitrogen gas is supplied into the chamber, and the substrate 10 is unloaded.

[0121] In the process described with reference to FIG. 8, the temperature inside the chamber is maintained at a relatively low third temperature while nitrogen gas is being supplied into the chamber and while the chamber is in a vacuum. Furthermore, when the third oxidizing gas is being supplied into the chamber, the temperature inside the chamber is lower than the first temperature. While the third oxidizing gas is being supplied, the temperature inside the chamber is increased from the third temperature to the first temperature. Furthermore, when the second oxidizing gas is being supplied into the chamber, the temperature inside the chamber is lower than the first temperature. While the second oxidizing gas is being supplied, the temperature inside the chamber is decreased from the first temperature to the second temperature. In this way, by providing a time during which the temperature inside the chamber is maintained at or below the first temperature, it is possible to suppress desorption of oxygen from the oxide semiconductor.

[0122] As shown in FIG. 8, by creating an atmosphere of a second oxidizing gas such as oxygen gas inside the chamber while the temperature is rising from the third temperature to the first temperature (from time t83 to time t84), it is possible to create an atmosphere of a second oxidizing gas such as oxygen gas inside the chamber while the temperature is falling from the first temperature to the second temperature after the supply of the first oxidizing gas (from time t87 to time t88).

[0123] As described above, the third temperature may be, for example, the same as or approximately the same as the second temperature, and, for example, the difference between the first temperature and the third temperature may be 100°C or more, and the third temperature may be 250°C or less.

[0124] Also, in the example shown in FIG. 8, the first temperature may be in the first temperature range, the second temperature may be in the second temperature range, and the third temperature may be in the third temperature range, as described above for the examples shown in FIG. 6 and FIG. 7. Therefore, the temperature in the chamber may not be constant from time t84 to time t87, nor from time t80 to time t83, nor from time t88 to time t811. For example, the temperature in the chamber may change within a first temperature range of temperatures around 400° C., which is a range of 390° C. to 410° C., from time t84 to time t87. Also, the temperature in the chamber may change within a third temperature range, for example, 190° C. to 210° C., from time t80 to time t83, and the temperature in the chamber may change within a second temperature range, for example, 190° C. to 210° C., from time t88 to time t811.

[0125] In the embodiment described above, a process of supplying the above-mentioned oxidizing gas may be performed on the substrate 10 having the insulating layer 63 provided above the oxide semiconductor 70. At this time, for example, oxygen that has permeated through the insulating layer 63 is supplied to the oxide semiconductor 70. That is, at this time, the insulating layer 63 becomes an oxygen permeable layer for the oxide semiconductor 70. At this time, when the insulating layer 63 that becomes the oxygen permeable layer has a thickness of 5 nm or more, the pressure and temperature in the chamber may be high and / or high depending on the film thickness.

[0126] In the above-described embodiment, an insulating layer 63 may be provided above the oxide semiconductor 70, and an oxidizing gas may be supplied into the chamber, so that oxygen is supplied to the oxide semiconductor through the insulating layer 63 of the substrate 10. When the insulating layer 63 has a thickness of 5 nm or more, the pressure in the chamber when the first oxidizing gas is supplied may be 200 Torr or more (26664 Pa or more). For example, when the insulating layer 63 has a thickness of 200 nm or more, the pressure in the chamber when the first oxidizing gas is supplied may be 600 Torr or more (79993 Pa or more). According to the study by the present inventors, for example, when the insulating layer 63 has a thickness of 300 nm, it has been found that a semiconductor device manufactured with a pressure in the chamber of about 700 Torr (about 93326 Pa) when the first oxidizing gas is supplied exhibits desired current-voltage characteristics.

[0127] In the above-described embodiment, the insulating layer 63 may be formed to have a lower density than other layers (e.g., layers other than the insulating layer 63 provided in the semiconductor device 101 described with reference to FIG. 2). The insulating layer 63 may be formed of at least one of silicon dioxide (SiO2) and aluminum oxide (Al2O3). Furthermore, the insulating layer 63 may contain nitrogen, and by adjusting the nitrogen contained in the insulating layer 63, the degree of freedom of oxygen diffusion in the insulating layer 63 can be adjusted.

[0128] In the above-described embodiment, the first temperature may be 300° C. or more and 600° C. or less. According to the study by the present inventors, for example, if the first temperature is in the range of 300° C. or more and 600° C. or less, a higher first temperature is preferable because it can further improve the amount of oxygen supplied by the first oxidizing gas. For example, when the process according to this embodiment was carried out under the same conditions except that the first temperature was set to 400° C. or 420° C., the amount of oxygen contained was improved when the first temperature was set to 420° C. compared to when the first temperature was set to 400° C.

[0129] Similarly, by increasing the pressure in the chamber during the supply of the first oxidizing gas, the amount of oxygen supplied can be increased, which is preferable. For example, when the process according to this embodiment was carried out under the same conditions except that the pressure in the chamber during the supply of the first oxidizing gas was set to 9 Torr (about 1200 Pa) and 760 Torr (about 101325 Pa), the amount of oxygen contained was increased when the pressure in the chamber was set to about 101325 Pa compared to when it was set to about 1200 Pa.

[0130] In the above-described embodiment, the chamber is evacuated after the oxidizing gas (first oxidizing gas or second oxidizing gas) is removed from the chamber. However, if the oxidizing power of the oxidizing gas used is relatively low, the next process (e.g., supply of nitrogen gas) may be started without evacuating the chamber.

[0131] The present embodiment has been described above with reference to specific examples. However, the present disclosure is not limited to these specific examples. Any design modifications made by a person skilled in the art to these specific examples are also included within the scope of the present disclosure as long as they have the features of the present disclosure. The elements of each of the above-mentioned specific examples and their arrangements, conditions, shapes, etc. are not limited to those exemplified and can be changed as appropriate. The combination of each of the elements of each of the above-mentioned specific examples can be changed as appropriate as long as no technical contradiction occurs. [Explanation of symbols]

[0132] 10 Substrate 63 Insulating Layer 70 Oxide Semiconductors 101 Semiconductor device 200 Substrate processing equipment 210 Processing furnace 220 Gas Supply Section 222 Gas Supply Room 224 Gas supply port 230 Gas exhaust section 232 Gas Exhaust Chamber 234 Gas exhaust port 240 Heating section 250 Cooling section 260 Wafer support 262 Wafer Support 280 Vacuum Pump 300 Control section

Claims

1. A method for manufacturing a semiconductor device having an oxide semiconductor, comprising the steps of: loading the substrate on which the oxide semiconductor is formed into a chamber; a temperature within the chamber is a first temperature; supplying an oxidizing gas into the chamber; decreasing the temperature in the chamber from the first temperature; After the temperature drop is started, the supply of the oxidizing gas into the chamber is stopped. unloading the substrate from the chamber after the temperature within the chamber reaches a second temperature lower than the first temperature. A method for manufacturing a semiconductor device.

2. After the temperature in the chamber reaches the second temperature, the supply of the oxidizing gas is stopped. The method for manufacturing a semiconductor device according to claim 1 .

3. The pressure in the chamber during the supply of the oxidizing gas is set to 13,332 Pa or more; The first temperature is 300° C. or higher. The method for manufacturing a semiconductor device according to claim 1 .

4. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the difference between the first temperature and the second temperature is 100[deg.] C. or more.

5. The oxidizing gas is oxygen (O ２ ), ozone (O ３ ), water vapor (H ２ O), nitric oxide (NO), nitrous oxide (N ２ 10. The method for manufacturing a semiconductor device according to claim 1, further comprising:

6. supplying the oxidizing gas into the chamber includes supplying a first oxidizing gas and supplying a second oxidizing gas; The oxidizing power of the first oxidizing gas is equal to or greater than the oxidizing power of the second oxidizing gas. The method for manufacturing a semiconductor device according to claim 1 .

7. after stopping the supply of the first oxidizing gas into the chamber, starting the supply of the second oxidizing gas into the chamber; After starting the supply of the second oxidizing gas into the chamber, the temperature in the chamber is decreased from the first temperature; after starting the temperature decrease, stopping the supply of the second oxidizing gas into the chamber; The method for manufacturing a semiconductor device according to claim 6 .

8. After the temperature in the chamber reaches the second temperature, the supply of the second oxidizing gas is stopped. The method for manufacturing a semiconductor device according to claim 7 .

9. The second oxidizing gas is oxygen (O ２ ), or oxygen (O ２ ) and nitrogen (N ２ 7. The method for manufacturing a semiconductor device according to claim 6, further comprising the steps of:

10. supplying nitrogen gas into the chamber when the substrate is loaded into the chamber; stopping the supply of the nitrogen gas into the chamber after loading the substrate into the chamber; supplying the oxidizing gas into the chamber after stopping the supply of the nitrogen gas into the chamber; supplying nitrogen gas into the chamber after stopping the supply of the oxidizing gas into the chamber and when unloading the substrate from the chamber; The method for manufacturing a semiconductor device according to claim 1 .

11. supplying the oxidizing gas into the chamber includes supplying a first oxidizing gas, supplying a second oxidizing gas, and supplying a third oxidizing gas; setting the temperature in the chamber at a third temperature lower than the first temperature; After starting the supply of the third oxidizing gas into the chamber at the third temperature, the temperature in the chamber is increased from the third temperature; After the temperature in the chamber reaches the first temperature, the supply of the third oxidizing gas into the chamber is stopped; after stopping the supply of the third oxidizing gas into the chamber, starting the supply of the first oxidizing gas into the chamber; after stopping the supply of the first oxidizing gas into the chamber, starting the supply of the second oxidizing gas into the chamber; After starting the supply of the second oxidizing gas into the chamber, the temperature in the chamber is decreased from the first temperature; after starting the temperature decrease, stopping the supply of the second oxidizing gas into the chamber; The method for manufacturing a semiconductor device according to claim 1 .

12. An insulating layer is provided above the oxide semiconductor. The method for manufacturing a semiconductor device according to claim 1 .

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