Semiconductor device and method for manufacturing the same

Abstract

To provide a semiconductor device including a fuse that can be electrically cut by a small current, and a method for manufacturing the same.SOLUTION: A semiconductor device includes: a semiconductor substrate; an insulating film located on the semiconductor substrate, a first recess being formed in an upper surface of the insulating film; a silicon film located on the insulating film and containing an impurity, a second recess being formed in an upper surface of the silicon film in a region directly above the first recess; a silicide layer located on the silicon film and contacting the silicon film; and a first contact and a second contact connected to portions of the silicide layer, a region directly above the second recess being interposed between the portions.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The embodiments relate to a semiconductor device and a manufacturing method thereof. [Background technology]

[0002] In semiconductor devices, fuses may be provided to configure an OTPROM (One Time Programmable Read only memory) or the like. There are two types of fuses: one that is blown by irradiating a laser, and one that is blown by passing an electric current through it. The type that is blown by passing an electric current through it has the advantage that it can be placed at the bottom of the stacked structure, but it requires a relatively large current supply circuit to blow it. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-057484 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the embodiments is to provide a semiconductor device including a fuse that can be electrically cut by a small current, and a manufacturing method thereof. [Means for solving the problem]

[0005] A semiconductor device according to an embodiment includes a semiconductor substrate, an insulating film disposed on the semiconductor substrate and having a first recess formed in an upper surface thereof, a silicon film disposed on the insulating film, containing impurities, and having a second recess formed in an upper surface thereof directly above the first recess, a silicide layer disposed on the silicon film and in contact with the silicon film, and a first contact and a second contact connected to portions of the silicide layer sandwiching the region directly above the second recess.

[0006] A manufacturing method for a semiconductor device according to the embodiment includes the steps of forming a first LOCOS film and a second LOCOS film on the upper surface of a semiconductor substrate so as to connect them to each other, forming a silicon film containing impurities on a region including a connection portion between the first LOCOS film and the second LOCOS film, forming a silicide layer on the upper surface of the silicon film, and connecting a first contact and a second contact to regions of the silicide layer that sandwich the region directly above the connection portion. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a plan view showing a semiconductor device according to a first embodiment. [Diagram 2] FIG. 2 is a cross-sectional view taken along line AA' shown in FIG. [Diagram 3] 3(a) to 3(d) are cross-sectional views illustrating the steps of the method for manufacturing the semiconductor device according to the first embodiment. [Figure 4] 4(a) to (c) are cross-sectional views showing the operation of the semiconductor device according to the first embodiment. [Diagram 5] FIG. 5 is a plan view showing a semiconductor device according to a comparative example. [Figure 6] FIG. 6 is a cross-sectional view taken along line BB' shown in FIG. [Figure 7] FIG. 7 is a cross-sectional view showing a semiconductor device according to a first modified example of the first embodiment. [Figure 8] FIG. 8 is a cross-sectional view showing a semiconductor device according to a second modification of the first embodiment. [Figure 9] FIG. 9 is a cross-sectional view showing a semiconductor device according to the second embodiment. [Figure 10] FIG. 10 is a plan view showing the semiconductor device according to the third embodiment. [Figure 11] FIG. 11 is a cross-sectional view taken along line CC' shown in FIG. [Figure 12] 12(a) to 12(c) are cross-sectional views illustrating the steps of a method for manufacturing a semiconductor device according to the third embodiment. [Figure 13]FIG. 13 is a plan view showing the semiconductor device according to the fourth embodiment. [Figure 14] FIG. 14 is a cross-sectional view taken along line DD' shown in FIG. [Figure 15] FIG. 15 is a cross-sectional view taken along line EE' shown in FIG. [Figure 16] 16(a) to 16(d) are cross-sectional views illustrating the steps of a method for manufacturing a semiconductor device according to the fourth embodiment. [Figure 17] FIG. 17 is a plan view showing a semiconductor device according to a first modification of the fourth embodiment. [Figure 18] FIG. 18 is a cross-sectional view taken along line FF' shown in FIG. [Figure 19] FIG. 19 is a cross-sectional view taken along line GG' shown in FIG. [Figure 20] FIG. 20 is a cross-sectional view showing a semiconductor device according to a second modification of the fourth embodiment. [Figure 21] FIG. 21 is a cross-sectional view showing a semiconductor device according to a third modification of the fourth embodiment. [Figure 22] 22A to 22C are cross-sectional views illustrating steps in a method for manufacturing a semiconductor device according to a third modification of the fourth embodiment. [Diagram 23] FIG. 23 is a plan view showing the semiconductor device according to the fifth embodiment. [Figure 24] FIG. 24 is a cross-sectional view taken along line HH' shown in FIG. [Diagram 25] FIG. 25 is a cross-sectional view taken along line II' shown in FIG. [Figure 26] 26(a) to 26(c) are cross-sectional views illustrating the steps of a method for manufacturing a semiconductor device according to the fifth embodiment. [Figure 27] FIG. 27 is a plan view showing a semiconductor device according to a modification of the fifth embodiment. [Figure 28] FIG. 28 is a cross-sectional view taken along line JJ' shown in FIG. [Figure 29] FIG. 29 is a cross-sectional view taken along line K-K' shown in FIG. [Diagram 30]30(a) and (b) are plan views showing another embodiment. [Diagram 31] 31(a) and (b) are plan views showing another embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] <First embodiment> The semiconductor device 1 according to this embodiment is a semiconductor device including a fuse. The fuse constitutes, for example, an OTPROM.

[0009] (composition) FIG. 1 is a plan view showing a semiconductor device according to the present embodiment. FIG. 2 is a cross-sectional view taken along line AA' shown in FIG. 1 and 2, in the semiconductor device 1 according to this embodiment, a semiconductor substrate 10, an insulating film 20, a silicon film 30, a silicide layer 40, contacts 51 and 52, and a sidewall 60 are provided. Note that the sidewall 60 is not shown in Fig. 1. The same applies to other plan views described later.

[0010] The semiconductor substrate 10 is made of, for example, single crystal silicon (Si), and impurities are introduced into each portion to make each portion have an n-type or p-type conductivity. The insulating film 20 is disposed on the semiconductor substrate 10, and is made of an insulating material, for example, silicon oxide (SiO2).

[0011] In this embodiment, the insulating film 20 includes two LOCOS (local oxidation of silicon) films 21 and 22. The LOCOS films 21 and 22 are formed by thermally oxidizing the upper portion of the semiconductor substrate 10. The peripheral portions of the LOCOS films 21 and 22 each have a bird's beak shape, and become thinner toward the edge. The end of the LOCOS film 21 and the end of the LOCOS film 22 are interconnected. As a result, a recess 23 is formed on the upper surface of the boundary between the LOCOS films 21 and 22.

[0012] The silicon film 30 is made of polysilicon into which an impurity has been introduced. The impurity introduced into the silicon film 30 is not particularly limited, but may be, for example, boron (B) or arsenic (As). The silicon film 30 is provided with pad portions 31 and 32, and a fuse portion 33 disposed between the pad portions 31 and 32. In the example shown in FIG. 1, the width of the fuse portion 33 is narrower than the width of the pad portion 31 and the width of the pad portion 32. However, the width of the fuse portion 33 may be equal to or wider than the width of the pad portion 31 and the width of the pad portion 32. The pad portions 31 and 32 and the fuse portion 33 are integrally formed.

[0013] The fuse portion 33 of the silicon film 30 is disposed in a position spanning the recess 23 of the insulating film 20. When viewed from above, the pad portion 31 and the pad portion 32 are disposed on either side of the recess 23. A recess 34 is formed in the upper surface of the fuse portion 33 in the region directly above the recess 23.

[0014] The silicide layer 40 is made of a compound of silicon and a metal, for example, nickel silicide (NiSi) or cobalt silicide (CoSi). The silicide layer 40 is formed by silicidizing the upper layer portion of the silicon film 30, and is formed continuously with the silicon film 30. In the silicide layer 40, a recess 43 reflecting the shape of the recess 23 is formed directly above the recess 23.

[0015] The contacts 51 and 52 are disposed on the silicide layer 40. The contact 51 is connected to a portion of the silicide layer 40 disposed on the pad portion 31 of the silicon film 30, and the contact 52 is connected to a portion of the silicide layer 40 disposed on the pad portion 32 of the silicon film 30. Thus, the contacts 51 and 52 are connected to portions of the silicide layer 40 that are separated from each other with the recess 43 in between. In this specification, "connection" refers to electrical connection.

[0016] The sidewall 60 is an insulating film, for example, a laminated film including a silicon oxide layer and a silicon nitride layer. The sidewall 60 is disposed on the side surface of the silicon film 30.

[0017] Hereinafter, for convenience of explanation, in this specification, an XYZ Cartesian coordinate system is adopted. The direction perpendicular to the upper surface of the semiconductor substrate 10 is the "Z direction", the direction from the contact 51 to the contact 52 is the "X direction", and the direction perpendicular to the Z direction and the X direction is the "Y direction". The longitudinal direction of the fuse portion 33 is the X direction, and the width direction is the Y direction. The number of the contacts 51 and the contacts 52 is arbitrary. When a plurality of contacts 51 and 52 are provided, they are arranged, for example, along the Y direction. In addition, in the Z direction, the direction from the semiconductor substrate 10 toward the silicide layer 40 is also called "upper", and the opposite direction is also called "lower", but this expression is also for convenience and has no relation to the direction of gravity. Furthermore, in this specification, the "directly above region" refers to a region that is above an object and overlaps when viewed from the Z direction. In other words, the directly above region of an object is located at the same position as the object in the X direction and the Y direction. Similarly, the "directly below area" refers to the area below the object and overlapping when viewed from the Z direction.

[0018] (Manufacturing method) 3(a) to 3(d) are cross-sectional views showing the steps of the method for manufacturing a semiconductor device according to this embodiment. 3(a), a LOCOS film 21 and a LOCOS film 22 are formed by selectively performing a thermal oxidation process on the upper layer portion of the semiconductor substrate 10. A bird's beak-shaped recess 23 is formed on the upper surface of the boundary between the LOCOS film 21 and the LOCOS film 22. The LOCOS film 21 and the LOCOS film 22 constitute the insulating film 20.

[0019] 3(b), silicon and impurities are deposited by, for example, a CVD (Chemical Vapor Deposition) method to form a silicon film 30. The silicon film 30 is made of polysilicon containing impurities. A recess 34 is formed in the upper surface of the silicon film 30 directly above the recess 23.

[0020] 3(c), a resist mask 201 is formed in a region including the area directly above the recess 23. Next, the silicon film 30 is etched using the resist mask 201 as a mask. This results in patterning of the silicon film 30, and the pad portions 31 and 32 and the fuse portion 33 are integrally formed. The recess 34 is disposed on the upper surface of the fuse portion 33. The resist mask 201 is then removed.

[0021] 3(d), a silicon oxide layer and a silicon nitride layer are formed, and anisotropic etching such as RIE is performed to form insulating sidewalls 60 on the side surfaces of the silicon film 30. Next, a metal is deposited on the silicon film 30, and a heat treatment is performed to form a silicide layer 40 on the upper surface of the silicon film 30. A recess 43 is formed in the silicide layer 40 directly above the recess 23.

[0022] Next, an interlayer insulating film (not shown) is formed on the semiconductor substrate 10 so as to cover the insulating film 20, the silicon film 30, the silicide layer 40, and the sidewall 60. Next, contact holes are formed in the interlayer insulating film, reaching the silicide layer 40. Next, contacts 51 and 52 are formed in the contact holes. In this manner, the semiconductor device 1 is manufactured.

[0023] (operation) The operation of cutting the fuse portion 33 of the silicon film 30 will now be described. 4(a) to (c) are cross-sectional views showing the operation of the semiconductor device according to this embodiment.

[0024] 4(a), a voltage is applied to the fuse portion 33 to be cut, with the contact 51 as the positive electrode and the contact 52 as the negative electrode. This causes an electronic current E to flow from the contact 52 to the contact 51. The electronic current E flows mainly through the silicide layer 40, generating Joule heat. At this time, the current is concentrated in the recess 43 of the silicide layer 40, so that a large amount of heat is generated near the recess 43.

[0025] 4(b), electromigration occurs due to the movement of heat and electrons generated by the electronic current E, and metal atoms in the silicide layer 40 move toward the contact 51. The electronic current E also flows through the silicon film 30. At this time, the electronic current E is concentrated in the recess 34. As a result, a large amount of heat is generated also in the vicinity of the recess 34. As a result, impurity atoms in the silicon film 30 also move toward the contact 51 due to electromigration.

[0026] As a result, a high resistance portion 39 with reduced metal concentration and impurity concentration is formed in the region of the silicide layer 40 and the silicon film 30 on the contact 52 side. When an electronic current E flows, the high resistance portion 39 spreads toward the contact 51. Between the high resistance portion 39 and the silicon film 30, a high concentration portion 38 with an increased impurity concentration is formed.

[0027] 4(c), when the high resistance portion 39 occupies a certain portion of the fuse portion 33, the electrical resistance of the entire fuse portion 33 increases, and the contacts 51 and 52 are substantially insulated. In this manner, the fuse portion 33 is electrically cut off. Hereinafter, in this specification, the formation of a high resistance portion in the fuse portion and the electrical cutting of the fuse portion will simply be referred to as "the fuse portion being cut off." By selectively cutting a plurality of fuse portions 33, data is stored in the OTPROM.

[0028] (effect) According to this embodiment, by forming the recess 23 in the insulating film 20, the recess 34 is formed in the silicon film 30, and the recess 43 is formed in the silicide layer 40. Therefore, when the electron current E flows between the contact 51 and the contact 52, the electron current E concentrates near the recess 43 and generates heat. The electron current E also concentrates near the recess 34 of the silicon film 30 and generates heat. This promotes electromigration and efficiently forms the high resistance portion 39. As a result, the fuse portion 33 can be cut with a small current. If the electron current E for cutting the fuse portion 33 can be reduced, the circuit for supplying the electron current E can be made smaller, and the semiconductor device 1 can be highly integrated and reduced in cost.

[0029] <Comparative Example> FIG. 5 is a plan view showing a semiconductor device according to a comparative example. FIG. 6 is a cross-sectional view taken along line BB' shown in FIG.

[0030] 5 and 6, in the semiconductor device 101 according to this embodiment, the insulating film 120 is composed of one LOCOS film 121, and no recess is formed. Therefore, no recess is formed in the silicon film 130 and the silicide layer 140 either.

[0031] In the semiconductor device 101 according to this comparative example, it is also possible to cut the fuse portion by the operations shown in Figures 4(a) to 4(c). However, since there is no portion where current concentrates in the silicide layer 140 and the silicon film 130, heat is not generated efficiently and electromigration is not promoted sufficiently. For this reason, a large current needs to be passed in order to cut the fuse portion. As a result, a large current supply circuit is required, which hinders high integration and cost reduction of the semiconductor device 101.

[0032] <First Modification of the First Embodiment> FIG. 7 is a cross-sectional view showing a semiconductor device according to this modification. 7, in the semiconductor device 1a according to this modification, a recess 24 is formed by selectively etching the insulating film 20. Then, a silicon film 30 is formed so as to straddle the recess 24, and a silicide layer 40 is formed. As a result, a recess 44 is formed in the silicide layer 40 directly above the recess 24.

[0033] In this modification, the fuse portion can be efficiently cut off because the electronic current E is concentrated in the recess 44 of the silicide layer 40. Other than the above, the configuration, manufacturing method, operation, and effects of this modification are similar to those of the first embodiment.

[0034] <Second Modification of the First Embodiment> FIG. 8 is a cross-sectional view showing a semiconductor device according to this modification. 8, in the semiconductor device 1b according to this modification, when forming the silicon film 30, for example, in a chamber of a CVD film forming apparatus, silicon is deposited and the deposited silicon film is etched. Also, a sidewall 60 is left in an area directly above the recess 24 in the silicon film 30. Then, a silicidation process is performed to form a silicide layer 40.

[0035] As a result, in the semiconductor device 1b, an inclined portion 30a is formed in the silicon film 30 directly above the side surface of the recess 24. Also, in part of the region directly above the recess 24, a portion 30b is generated where the silicide layer 40 is not formed on the upper surface.

[0036] As a result, the electron current E flows through the portion 30b of the silicon film 30. Since the electrical resistance of the silicon film 30 is higher than the electrical resistance of the silicide layer 40, heat is generated effectively in the portion 30b. Furthermore, since the inclined portion 30a is thinner than other portions of the silicon film 30, the electron current E is concentrated therein. This also results in effective heat generation by the electron current E. Other configurations, manufacturing methods, operations, and effects of this modified example are similar to those of the first embodiment.

[0037] <Second embodiment> This embodiment is different from the first embodiment in that the insulating film 20 has protrusions instead of recesses. FIG. 9 is a cross-sectional view showing the semiconductor device according to this embodiment.

[0038] 9, in the semiconductor device 2 according to this embodiment, a convex portion 25 is provided on the upper surface of the insulating film 20. The fuse portion 33 of the silicon film 30 is formed so as to straddle the convex portion 25. As a result, a convex portion 45 is formed in the silicide layer 40 in an area directly above the convex portion 25.

[0039] In the semiconductor device 2, current concentrates on the protruding portion 45 of the silicide layer 40, generating heat. Current also concentrates on a portion of the silicon film 30 that spans the protruding portion 25, generating heat. This effectively causes electromigration, allowing the fuse to be cut with a small current. Other configurations, manufacturing methods, operations, and effects of this embodiment are similar to those of the first embodiment.

[0040] <Third embodiment> This embodiment is different from the first embodiment in that the insulating film 20 has openings instead of recesses.

[0041] (composition) FIG. 10 is a plan view showing the semiconductor device according to the present embodiment. FIG. 11 is a cross-sectional view taken along line CC' shown in FIG.

[0042] 10 and 11, in the semiconductor device 3 according to this embodiment, a groove-shaped opening 26 extending in the Y direction is formed in the insulating film 20. The pad portion 31 and the pad portion 32 of the silicon film 30 are disposed at positions sandwiching the opening 26 on the insulating film 20, and the fuse portion 33 is disposed so as to straddle the opening 26. As a result, a recess 36 is formed in the fuse portion 33 directly above the opening 26, and a recess 46 is formed in the silicide layer 40 directly above the recess 36.

[0043] Since the resistivity of the silicide layer 40 and the silicon film 30 is extremely low compared to the resistivity of the semiconductor substrate 10, the electronic current E flowing between the contact 52 and the contact 51 when the fuse portion 33 is cut hardly flows into the semiconductor substrate 10. In addition, the silicon film 30 may be electrically isolated from the semiconductor substrate 10 by forming a pn junction in a portion of the semiconductor substrate 10 that contacts the silicon film 30.

[0044] (Manufacturing method) 12(a) to 12(c) are cross-sectional views showing the steps of the method for manufacturing a semiconductor device according to this embodiment.

[0045] 12(a), an insulating film 20 is formed on the upper surface of a semiconductor substrate 10. The insulating film 20 is formed of, for example, one LOCOS film. Next, as shown in FIG. 12(b), the insulating film 20 is selectively etched to form an opening 26.

[0046] 12(c), silicon and impurities are deposited on the entire surface to form a silicon film 30. At this time, a recess 36 is formed in the silicon film 30 directly above the opening 26. The subsequent steps are the same as those shown in Figures 3(c) and 3(d) In this manner, the semiconductor device 3 is manufactured.

[0047] (effect) In the semiconductor device 3, the electron current E concentrates in the silicide layer 40 near the recess 46 to generate heat, and in the silicon film 30, it concentrates in the silicon film 30 near the recess 36 to generate heat. This promotes electromigration, and allows the fuse portion 33 to be cut with a small current. Other than the above, the configuration, manufacturing method, operation, and effects of this embodiment are similar to those of the first embodiment.

[0048] <Fourth embodiment> This embodiment is different from the third embodiment in that the opening 26 of the insulating film 20 is formed inside the silicon film 30 when viewed from above.

[0049] (composition) FIG. 13 is a plan view showing the semiconductor device according to this embodiment. FIG. 14 is a cross-sectional view taken along line DD' shown in FIG. FIG. 15 is a cross-sectional view taken along line EE' shown in FIG.

[0050] 13 to 15, in the semiconductor device 4 according to this embodiment, the shape of the opening 26 is rectangular when viewed from above, and the silicon film 30 is disposed so as to cover the entire opening 26. The pad portions 31 and 32 of the silicon film 30 are disposed on the insulating film 20 at positions sandwiching the region immediately above the opening 26. The portion of the silicon film 30 disposed within the opening 26 and in the region immediately above the opening 26 serves as a fuse portion 33.

[0051] When the silicon film 30 is thinner than the insulating film 20, the upper surface of the fuse portion 33 is located lower than the lower surfaces of the pad portions 31 and 32. When viewed from above, the recess 36 of the silicon film 30 and the recess 46 of the silicide layer 40 are located inside the opening 26. In the semiconductor device 4, one each of the contacts 51 and 52 is provided, but the number of the contacts 51 and 52 is arbitrary.

[0052] (Manufacturing method) 16(a) to 16(d) are cross-sectional views showing the steps of the method for manufacturing a semiconductor device according to this embodiment.

[0053] 16(a), an insulating film 20 is formed on the upper surface of a semiconductor substrate 10. The insulating film 20 is, for example, a LOCOS film. Next, an opening 26 is formed in the insulating film 20 as shown in FIG. 16(c), a silicon film 30 is formed on the entire surface. The silicon film 30 is also formed inside the opening 26. When viewed from above, a recess 36 of the silicon film 30 is formed inside the opening 26.

[0054] 16(d), a resist mask 202 is formed on the silicon film 30. The resist mask 202 is formed so as to cover the entire opening 26. Next, the silicon film 30 is etched using the resist mask 202 as a mask. The subsequent steps are the same as those shown in Figures 3(c) and 3(d) In this manner, the semiconductor device 4 is manufactured.

[0055] (effect) In the semiconductor device 4 as well, the electron current E concentrates in the non-flat portions of the silicide layer 40 and the silicon film 30, generating heat. Specifically, the electron current E concentrates in the recesses 46 of the silicide layer 40 and the recesses 36 of the silicon film 30, generating heat. The film thickness of the silicon film 30 is also non-uniform in the Y direction, which also causes the electron current E to concentrate. This makes it possible to effectively cut off the fuse portion 33. Other configurations, manufacturing methods, operations, and effects of this embodiment are similar to those of the first embodiment.

[0056] <First Modification of the Fourth Embodiment> This modification is different from the fourth embodiment in that two fuse portions 33 are formed in one opening 26 of the insulating film 20.

[0057] FIG. 17 is a plan view showing a semiconductor device according to this modification. FIG. 18 is a cross-sectional view taken along line FF' shown in FIG. FIG. 19 is a cross-sectional view taken along line GG' shown in FIG.

[0058] 17 to 19, in the semiconductor device 4a according to this modification, the width of the opening 26, i.e., the length in the Y direction, is wider than the width of the opening 26 in the semiconductor device 4. Two silicon films 30c and 30d are provided so as to straddle one opening 26. A fuse portion 33 is formed in each of the silicon films 30c and 30d.

[0059] In this modification, as in the first embodiment, the electronic current E is concentrated in the non-flat portions of the silicide layer and the silicon film, thereby accelerating electromigration and cutting the fuse portion 33 with a small current. This allows the circuit for supplying the electronic current E to be miniaturized, and the semiconductor device 4a to be highly integrated and inexpensive. In addition, since two fuse portions 33 can be disposed within one opening 26, the width of each fuse portion 33 can be narrowed. This also allows the electronic current E to be reduced. Other configurations, manufacturing methods, operations, and effects of this modification are the same as those of the fourth embodiment.

[0060] <Second Modification of the Fourth Embodiment> This modification is different from the fourth embodiment in that an inclined portion is provided on the upper surface of the silicon film 30 in the vicinity of the area directly above the side surface of the opening .

[0061] FIG. 20 is a cross-sectional view showing a semiconductor device according to this modification. As shown in FIG. 20, in a semiconductor device 4b according to this modification, an inclined portion 30a is provided on the upper surface of a silicon film 30 in the vicinity of a region directly above a side surface of an opening .

[0062] 16(c), silicon deposition and etching are performed simultaneously or alternately when forming the silicon film 30. This selectively etches the corners of the silicon film 30. As a result, an inclined portion 30a is formed in the silicon film 30 in the vicinity of the area directly above the side surface of the opening 26 in the insulating film 20. The silicon film 30 is thinner in the area directly below the inclined portion 30a than in other portions.

[0063] In this modification, when an electron current E flows through the silicon film 30, the current concentrates in the region directly below the inclined portion 30a. Other than the above, the configuration, manufacturing method, operation, and effects of this modification are similar to those of the fourth embodiment.

[0064] <Third Modification of the Fourth Embodiment> This modification is different from the fourth embodiment in that the silicon film 30 has a single crystal portion and a polycrystalline portion.

[0065] (composition) FIG. 21 is a cross-sectional view showing a semiconductor device according to this modification. 21, in a semiconductor device 4c according to this modification, the semiconductor substrate 10 is made of single crystal silicon, and the insulating film 20 is made of silicon oxide. Of the silicon film 30, the portion disposed on the semiconductor substrate 10 is a single crystal portion 30e, and the portion disposed on the insulating film 20 is a polycrystalline portion 30f. The pad portions 31 and 32 are generally polycrystalline portions 30f, and the fuse portion 33 is generally single crystal portion 30e. A step 30g is formed at the boundary between the single crystal portion 30e and the polycrystalline portion 30f. Note that there are cases in which no step is formed.

[0066] (Manufacturing method) 22A to 22C are cross-sectional views showing the steps of a manufacturing method for a semiconductor device according to this modification. First, the steps shown in FIGS. 16(a) and 16(b) are carried out.

[0067] Next, as shown in FIG. 22, a silicon film 30 is formed. At this time, the film is formed under conditions that allow a single-crystal silicon film to grow on the semiconductor substrate 10 made of single-crystal silicon. As a result, a single-crystal portion 30e is formed starting from the semiconductor substrate 10. Also, since silicon oxide is amorphous, the silicon film formed on the insulating film 20 becomes polycrystalline. Therefore, a polycrystalline portion 30f is formed on the insulating film 20. Since the single-crystal portion 30e and the polycrystalline portion 30f grow at different rates, a step 30g may be formed at the boundary between the two portions.

[0068] 21, the silicon film 30 is patterned. Next, a sidewall 60, a silicide layer 40, and contacts 51 and 52 are formed. In this manner, the semiconductor device 4c is formed.

[0069] (effect) In this modification, a step is formed at the boundary between the single crystal portion 30e and the polycrystalline portion 30f in the silicon film 30, so that current tends to concentrate in the portion of the silicide layer 40 that covers the step. In addition, in the silicon film 30, the electrical resistivity of the single crystal portion 30e is higher than that of the polycrystalline portion 30f, so that heat is likely to be generated in the single crystal portion 30e when the electronic current E flows. In addition, an electric field tends to concentrate at the interface between the single crystal portion 30e and the polycrystalline portion 30f. As a result, electromigration is promoted. Other configurations, manufacturing methods, operations, and effects of this modification are similar to those of the fourth embodiment.

[0070] <Fifth embodiment> This embodiment is different from the fourth embodiment in that the silicon film 30 is entirely disposed within the opening 26 of the insulating film 20.

[0071] (composition) FIG. 23 is a plan view showing the semiconductor device according to this embodiment. FIG. 24 is a cross-sectional view taken along line HH' shown in FIG. FIG. 25 is a cross-sectional view taken along line II' shown in FIG.

[0072] As shown in FIGS. 23 to 25, in the semiconductor device 5 according to this embodiment, a silicon film 30 and a silicide layer 40 are disposed in an opening 26 of an insulating film 20. A recess 36 is formed in an upper surface of the silicon film 30. A recess 46 reflecting the recess 36 of the silicon film 30 is formed in the silicide layer 40. The contacts 51 and 52 are connected to portions of the silicide layer 40 that sandwich a region directly above the recess 36. For example, the side surface of the recess 46 of the silicide layer 40 is inclined with respect to the XY plane, and the contacts 51 and 52 are connected to the side surfaces of the recess 46 that face each other.

[0073] (Manufacturing method) 26(a) to 26(c) are cross-sectional views showing the steps of a method for manufacturing a semiconductor device according to this embodiment. First, the steps shown in Figures 16(a) to (c) are carried out. As a result, a silicon film 30 is formed to cover the semiconductor substrate 10 and the insulating film 20, as shown in Figure 26(a). At this time, a recess 36 is formed in the upper surface of the silicon film 30 directly above the opening 26 in the insulating film 20. When viewed from above, the recess 36 is located inside the opening 26.

[0074] 26(b), the silicon film 30 is etched. This removes the portion of the silicon film 30 that is located outside the opening 26 when viewed from above. As a result, the silicon film 30 with the recess 36 formed on its upper surface remains within the opening 26 of the insulating film 20.

[0075] 26(c), a silicide layer 40 is formed on the upper surface of the silicon film 30. The silicide layer 40 is also formed only in the opening 26. A recess 46 is formed on the upper surface of the silicide layer 40, reflecting the recess 36 of the silicon film 30. Next, contacts 51 and 52 are formed and connected to the mutually opposing side surfaces of the recess 46 of the silicide layer 40. In this manner, the semiconductor device 5 is manufactured.

[0076] (operation) In the semiconductor device 5, when the electronic current E flows through the silicide layer 40, the current concentrates and generates heat at the boundary between the bottom and side surfaces of the recess 46. Also, when the electronic current E flows through the silicon film 30, the current concentrates and generates heat in the recess 36. This promotes electromigration, and the fuse portion can be effectively cut with a small current.

[0077] (effect) In this embodiment, as in the first embodiment, the electron current E is concentrated in the non-flat portions of the silicide layer and the silicon film, thereby accelerating electromigration and cutting the fuse portion 33 with a small current. This allows the circuit for supplying the electron current E to be miniaturized, and the semiconductor device 5 can be highly integrated and reduced in cost. Furthermore, the thickness of the silicon film 30 is non-uniform in the Y direction, which also causes the electron current E to concentrate. Other configurations, manufacturing methods, operations, and effects of this embodiment are the same as those of the fourth embodiment.

[0078] <Modification of the fifth embodiment> This modification is different from the fifth embodiment in that two fuse portions 33 are formed in one opening 26 of the insulating film 20.

[0079] FIG. 27 is a plan view showing a semiconductor device according to this modification. FIG. 28 is a cross-sectional view taken along line JJ' shown in FIG. FIG. 29 is a cross-sectional view taken along line K-K' shown in FIG.

[0080] 27 to 29, in a semiconductor device 5a according to this modification, two silicon films 30c and 30d are provided in one opening 26. A fuse portion 33 is formed in each of the silicon films 30c and 30d. A sidewall 60 is arranged between the silicon films 30c and 30d in the opening 26.

[0081] According to this modification, two fuse portions 33 can be arranged in one opening 26, so the width of each fuse portion 33 can be narrowed. This allows the electronic current E to be reduced, and the circuit for supplying the electronic current E to be made smaller. As a result, the semiconductor device 5a can be made more highly integrated and less expensive. Other configurations, manufacturing methods, operations, and effects of this modification are the same as those of the fifth embodiment.

[0082] <Other embodiments> The positional relationship between the opening 26 in the insulating film 20 and the silicon film 30 is not limited to the above-described embodiments and their modifications, but may take various forms. Some specific examples will be described below.

[0083] 30(a) to 31(b) are plan views showing other embodiments. For example, as shown in FIG. 30(a), a plurality of openings 26 of the same size may be arranged in a matrix, and a silicon film 30 may be disposed so as to cover all of them. Alternatively, as shown in FIG. 30(b), a plurality of openings 26 of the same size may be arranged in a staggered pattern, and a silicon film 30 may be disposed so as to cover all of them.

[0084] Alternatively, as shown in FIG. 31(a), a plurality of openings 26 having mutually different sizes may be arranged in a matrix, and a silicon film 30 may be disposed so as to cover a portion of them. Furthermore, as shown in FIG. 31(b), a plurality of openings 26 having mutually different sizes may be arbitrarily arranged, and a silicon film 30 may be arranged so as to cover a part of them.

[0085] Thus, there may be one opening 26 or multiple openings 26. Furthermore, the silicon film 30 may cover the entirety of the opening 26 or may cover a portion of it. Furthermore, the shape of the opening 26 is not limited to a rectangle, and may be, for example, a circle, a rectangle with rounded corners, a groove shape extending in a direction inclined with respect to the X direction and the Y direction, or a lattice shape.

[0086] In the above-described embodiments and their modifications, the shape of the upper surface of the insulating film 20 is made non-uniform, and the shape of the silicon film 30 formed thereon is made non-uniform, thereby forming a portion where the electron current E concentrates in the silicide layer 40 and the silicon film 30. However, the silicon film 30 may be formed on a flat region on the upper surface of the insulating film 20, and the silicon film 30 may be processed, such as by etching, to form a portion where the current concentrates. Also, the silicide layer 40 may be processed, such as by etching, to form a portion where the current concentrates.

[0087] In addition, in each of the above-described embodiments and their variations, an example has been shown in which the fuse portion constitutes an OTPROM, but this is not limited to this, and the fuse portion may be used to separate a defective portion or to select a redundant circuit.

[0088] According to the embodiment described above, it is possible to realize a semiconductor device including a fuse that can be electrically cut by a small current, and a method for manufacturing the same.

[0089] Although several embodiments of the present invention have been described above, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. In addition, the above-mentioned embodiments can be implemented in combination with each other.

[0090] The present invention includes the following aspects.

[0091] (Appendix 1) A semiconductor substrate; an insulating film disposed on the semiconductor substrate and having a first recess formed on an upper surface thereof; a silicon film disposed on the insulating film, containing impurities, and having a second recess formed in an upper surface directly above the first recess; a silicide layer disposed on the silicon film and in contact with the silicon film; a first contact and a second contact connected to portions of the silicide layer that sandwich a region directly above the second recess; A semiconductor device comprising:

[0092] (Appendix 2) The insulating film is A first LOCOS film; A second LOCOS film; having the first LOCOS film and the second LOCOS film are connected to each other, 2. The semiconductor device according to claim 1, wherein the first recess is a connection portion between the first LOCOS film and the second LOCOS film.

[0093] (Appendix 3) A semiconductor substrate; an insulating film disposed on the semiconductor substrate and having an opening; a silicon film containing impurities and disposed on the insulating film across the opening; a silicide layer disposed on the silicon film and in contact with the silicon film; a first contact and a second contact connected to portions of the silicide layer that sandwich a region directly above the opening; A semiconductor device comprising:

[0094] (Appendix 4) A semiconductor substrate; an insulating film disposed on the semiconductor substrate and having an opening; a silicon film containing impurities, the silicon film being disposed on the insulating film so as to cover the opening; a silicide layer disposed on the silicon film and in contact with the silicon film; a first contact and a second contact connected to portions of the silicide layer that sandwich a region directly above the opening; A semiconductor device comprising:

[0095] (Appendix 5) A semiconductor substrate; an insulating film disposed on the semiconductor substrate and having an opening; a silicon film disposed in the opening, containing impurities, and having a recess formed on an upper surface thereof; a silicide layer disposed on the silicon film and in contact with the silicon film; a first contact and a second contact connected to portions of the silicide layer that sandwich a region directly above a bottom surface of the recess; A semiconductor device comprising:

[0096] (Appendix 6) forming a first LOCOS film and a second LOCOS film on an upper surface of a semiconductor substrate so as to be connected to each other; forming a silicon film containing an impurity on a region including a connection portion between the first LOCOS film and the second LOCOS film; forming a silicide layer on an upper surface of the silicon film; connecting a first contact and a second contact to regions of the silicide layer that sandwich a region directly above the coupling portion; A method for manufacturing a semiconductor device comprising the steps of:

[0097] (Appendix 7) forming an insulating film on a top surface of a semiconductor substrate; forming an opening in the insulating film; forming a silicon film containing an impurity in a region including a region directly above the opening; forming a silicide layer on an upper surface of the silicon film; connecting a first contact and a second contact to regions of the silicide layer that sandwich a region directly above the opening; A method for manufacturing a semiconductor device comprising the steps of:

[0098] (Appendix 8) 8. The method for manufacturing a semiconductor device according to claim 7, wherein the silicon film is formed so as to straddle the opening.

[0099] (Appendix 9) 8. The method for manufacturing a semiconductor device according to claim 7, wherein the silicon film is formed so as to cover the opening.

[0100] (Appendix 10) forming an insulating film on a top surface of a semiconductor substrate; forming an opening in the insulating film; forming a silicon film containing impurities and having a recess formed on an upper surface thereof in the opening; forming a silicide layer on an upper surface of the silicon film; connecting a first contact and a second contact to portions of the silicide layer that sandwich a region directly above a bottom surface of the recess; A method for manufacturing a semiconductor device comprising the steps of:

[0101] (Appendix 11) The step of forming the silicon film includes: forming a silicon film on the insulating film so as to cover the opening; removing a portion of the silicon film disposed outside the opening when viewed from above; 11. A method for manufacturing a semiconductor device according to claim 10, comprising: [Explanation of symbols]

[0102] 1, 1a, 1b, 2, 3, 4, 4a, 4b, 4c, 5, 5a semiconductor device 10. Semiconductor Substrate 20 Insulating film 21, 22 LOCOS membrane 23 Recess 24 Recess 25 Convex 26 Opening 30 Silicone membrane 30a Slope 30b part 30c, 30d Silicone membrane 30e Single crystal part 30f polycrystalline part 30g step 31, 32 Pad section 33 Fuse section 34 Recess 36 Recess 38 High concentration area 39 High resistance part 40 Silicide layer 43 Recess 44 Recess 45 Convex 46 Recess 51, 52 Contact 60 Sidewall 101 Semiconductor device 120 Insulating film 121 LOCOS membrane 130 Silicone membrane 140 Silicide layer 201, 202 Resist mask E electron current

Claims

1. A semiconductor substrate; an insulating film disposed on the semiconductor substrate, the insulating film having a first recess formed on an upper surface thereof; a silicon film disposed on the insulating film, containing impurities, and having a second recess formed in an upper surface of the silicon film directly above the first recess; a silicide layer disposed on the silicon film and in contact with the silicon film; a first contact and a second contact connected to portions of the silicide layer that sandwich a region directly above the second recess; A semiconductor device comprising:

2. The insulating film is A first LOCOS film; A second LOCOS film; having the first LOCOS film and the second LOCOS film are connected to each other, 2. The semiconductor device according to claim 1, wherein the first recess is a connecting portion between the first LOCOS film and the second LOCOS film.

3. A semiconductor substrate; an insulating film disposed on the semiconductor substrate and having an opening; a silicon film containing impurities and disposed on the insulating film across the opening; a silicide layer disposed on the silicon film and in contact with the silicon film; a first contact and a second contact connected to portions of the silicide layer that sandwich a region directly above the opening; A semiconductor device comprising:

4. A semiconductor substrate; an insulating film disposed on the semiconductor substrate and having an opening; a silicon film containing impurities, the silicon film being disposed on the insulating film so as to cover the opening; a silicide layer disposed on the silicon film and in contact with the silicon film; a first contact and a second contact connected to portions of the silicide layer that sandwich a region directly above the opening; A semiconductor device comprising:

5. A semiconductor substrate; an insulating film disposed on the semiconductor substrate and having an opening; a silicon film disposed in the opening, containing impurities, and having a recess formed on an upper surface thereof; a silicide layer disposed on the silicon film and in contact with the silicon film; a first contact and a second contact connected to portions of the silicide layer that sandwich a region directly above a bottom surface of the recess; A semiconductor device comprising:

6. forming a first LOCOS film and a second LOCOS film on an upper surface of a semiconductor substrate so as to be connected to each other; forming a silicon film containing an impurity on a region including a connection portion between the first LOCOS film and the second LOCOS film; forming a silicide layer on an upper surface of the silicon film; connecting a first contact and a second contact to regions of the silicide layer that sandwich a region directly above the coupling portion; A method for manufacturing a semiconductor device comprising the steps of:

7. forming an insulating film on a top surface of a semiconductor substrate; forming an opening in the insulating film; forming a silicon film containing an impurity in a region including a region directly above the opening; forming a silicide layer on an upper surface of the silicon film; connecting a first contact and a second contact to regions of the silicide layer that sandwich a region directly above the opening; A method for manufacturing a semiconductor device comprising the steps of:

8. The method for manufacturing a semiconductor device according to claim 7 , wherein the silicon film is formed so as to straddle the opening.

9. The method for manufacturing a semiconductor device according to claim 7 , wherein the silicon film is formed so as to cover the opening.

10. forming an insulating film on a top surface of a semiconductor substrate; forming an opening in the insulating film; forming a silicon film containing impurities and having a recess formed on an upper surface thereof in the opening; forming a silicide layer on an upper surface of the silicon film; connecting a first contact and a second contact to portions of the silicide layer that sandwich a region directly above a bottom surface of the recess; A method for manufacturing a semiconductor device comprising the steps of:

11. The step of forming the silicon film includes: forming a silicon film on the insulating film so as to cover the opening; removing a portion of the silicon film disposed outside the opening when viewed from above; The method for manufacturing a semiconductor device according to claim 10, comprising:

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