Semiconductor device, power supply device, and vehicle

Abstract

To provide a semiconductor device capable of improving load regulation.SOLUTION: A semiconductor device has an integrated power supply circuit (10). The power supply circuit comprises: a reference voltage source (4) configured to generate a first output voltage (VOUT) as a reference voltage; an error amplifier (3) configured to receive as input the first output voltage and a feedback voltage (FB) based on a second output voltage (Vo) of the power supply circuit; and one or more transistors (2) controlled based on an output of the error amplifier and configured to allow a load current (Io) to flow. The reference voltage source has a plurality of elements (M1, M2) having temperature characteristics, and a temperature difference is created among the plurality of elements by changing the distance to each of the plurality of elements from the heat source (2) configured to generate heat when the load current flows, thereby giving the first output voltage a positive characteristic with respect to the load current.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device. [Background technology]

[0002] 2. Description of the Related Art Conventionally, semiconductor devices are known in which a power supply circuit such as a linear regulator is integrated. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2020-4214 A

[0004] [overview] Here, in linear regulators and the like, there is a demand for improvement in a performance called load regulation, which refers to the fluctuation of the output voltage in response to the fluctuation of the load current.

[0005] In view of the above circumstances, an object of the present disclosure is to provide a semiconductor device capable of improving load regulation.

[0006] A semiconductor device according to an embodiment of the present disclosure includes: A semiconductor device having an integrated power supply circuit, The power supply circuit includes: a reference voltage source configured to generate a first output voltage as a reference voltage; an error amplifier configured to receive the first output voltage and a feedback voltage based on the second output voltage of the power supply circuit; one or more transistors controlled based on an output of the error amplifier and configured to conduct a load current; Equipped with the reference voltage source includes a plurality of elements having a temperature characteristic; A temperature difference is created among the plurality of elements by varying the distance of each of the plurality of elements from a heat source configured to generate heat when the load current flows, and the first output voltage is configured to have a positive characteristic with respect to the load current. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram showing the configuration of an exemplary power supply device. [Diagram 2] FIG. 2 is a diagram illustrating load regulation. [Diagram 3] FIG. 3 is a diagram illustrating an example of the configuration of a reference voltage source. [Figure 4A] FIG. 4A is a diagram showing a schematic diagram of temperature characteristics of various voltages. [Figure 4B] FIG. 4B is a diagram showing a schematic diagram of temperature characteristics of various voltages. [Diagram 5] FIG. 5 is a diagram showing a first example of the layout of elements in the reference voltage source 4. In FIG. [Figure 6] FIG. 6 is a diagram showing a second example of the layout of elements in the reference voltage source 4. In FIG. [Figure 7] FIG. 7 is a diagram showing a third example of the layout of elements in the reference voltage source 4. In FIG. [Figure 8] FIG. 8 is a diagram illustrating another example of the configuration of the power supply device. [Figure 9] FIG. 9 is a diagram showing a first example of the layout of elements in the reference voltage source 16. In FIG. [Figure 10] FIG. 10 is a diagram showing a second example of the layout of elements in the reference voltage source 16. In FIG. [Figure 11] FIG. 11 is a diagram showing a configuration of a reference voltage source according to a modified example. [Figure 12] FIG. 12 is an external view showing an example of the configuration of a vehicle.

[0008] [Detailed Description] Hereinafter, exemplary embodiments of the present disclosure will be described with reference to the drawings.

[0009] <Linear regulator> Fig. 1 is a diagram showing the configuration of an exemplary power supply device. The power supply device 1 shown in Fig. 1 is a linear regulator. The power supply device 1 includes a power supply circuit 10 and voltage dividing resistors 5A and 5B. The semiconductor device 1A has the power supply circuit 10 integrated.

[0010] The power supply circuit 10 includes an output transistor 2, an error amplifier 3, and a reference voltage source 4.

[0011] The output transistor 2 is configured by, for example, a P-channel MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor). A first terminal (for example, a source) of the output transistor 2 is connected to an application terminal of an input voltage Vin. A second terminal (for example, a drain) of the output transistor 2 is connected to a first terminal of a voltage-dividing resistor 5A at a node N1. A second terminal of the voltage-dividing resistor 5A is connected to a first terminal of a voltage-dividing resistor 5B at a node N2. A second terminal of the voltage-dividing resistor 5B is connected to a ground terminal (an application terminal of a ground potential).

[0012] The node N2 is connected to a first input terminal of the error amplifier 3. The reference voltage source 4 generates an output voltage VOUT as a reference voltage. The second input terminal of the error amplifier 3 is connected to the output terminal of the reference voltage source 4. The output terminal of the error amplifier 3 is connected to the control terminal (e.g., the gate) of the output transistor 2.

[0013] An output voltage Vo is generated at a node N1. The output voltage Vo is divided by voltage dividing resistors 5A and 5B to generate a feedback voltage FB at a node N2. An error amplifier 3 amplifies and outputs the difference between the output voltage (reference voltage) VOUT and the feedback voltage FB. The error amplifier 3 drives the control end of the output transistor 2 so that the feedback voltage FB matches the output voltage VOUT, and continuously controls the on-resistance of the output transistor 2. As a result, the output voltage Vo is controlled to a target voltage defined by the output voltage VOUT and the resistance values ​​of the voltage dividing resistors 5A and 5B.

[0014] <Load regulation> The power supply device 1 has a performance called load regulation. FIG. 2 is a diagram showing load regulation in schematic form. The horizontal axis of FIG. 2 indicates the load current Io, and the vertical axis indicates the output voltage Vo. The load current (output load current) Io flows through the output transistor 2 as shown in FIG. 1. As shown by the dashed line in FIG. 2, ideally the output voltage Vo is constant regardless of the load current Io, but in reality, as shown by the solid line, the output voltage Vo decreases as the load current Io increases. This is because the error amplifier 3 controls the gate voltage of the output transistor 2 in response to the load current Io, and at this time the input offset Os (FIG. 1) of the error amplifier 3 changes slightly.

[0015] Load regulation refers to the amount of fluctuation (drop) in the output voltage Vo in response to fluctuations in the load current. Load regulation can be improved by suppressing the amount of fluctuation in the output voltage Vo.

[0016] <Reference voltage source> Fig. 3 is a diagram showing an example of the configuration of the reference voltage source 4. The reference voltage source 4 shown in Fig. 3 is a so-called ED type reference voltage source. With reference to this figure, the reference voltage source 4 includes a transistor M1 and a transistor M2. The transistor M1 is configured by a depression type N-channel MOSFET. The transistor M2 is configured by an enhancement type N-channel MOSFET.

[0017] Note that the depletion type is one in which a drain current flows even when the gate-source voltage is 0 V. On the other hand, the enhancement type is one in which no drain current flows when the gate-source voltage is 0 V.

[0018] The drain of the transistor M1 is connected to a terminal to which the power supply voltage Vcc is applied. The source and back gate of the transistor M2 are connected to a ground terminal. The gate, source and back gate of the transistor M1 and the gate and drain of the transistor M2 are all connected to a terminal to which the output voltage VOUT is applied.

[0019] In the reference voltage source 4, the gate and source of the transistor M1 are shorted. Therefore, the gate-source voltage Vgs1 of the transistor M1 is 0V. Therefore, the transistor M1 functions as a constant current source that generates a constant drain current Idd1. In other words, a constant bias current (= drain current Idd1) flows through the transistor M2. As a result, a constant output voltage VOUT equivalent to the gate-source voltage Vgs2 of the transistor M2 is generated.

[0020] Here, assuming that the currents flowing through the transistors M1 and M2 operating in the saturation region are I1 and I2, respectively, the currents I1 and I2 are expressed by the following formulas (1a) and (1b).

[0021]

number

[0022] In the above formulas (1a) and (1b), μ1 and μ2 are the carrier mobilities of the transistors M1 and M2, respectively. Cox is the oxide film capacitance of the transistors M1 and M2, respectively. W1 and W2 are the gate widths of the transistors M1 and M2, respectively. L1 and L2 are the gate lengths of the transistors M1 and M2, respectively. Vth1 and Vth2 are the threshold voltages of the transistors M1 and M2, respectively.

[0023] In the reference voltage source 1, I1=I2 holds. Therefore, the output voltage Vout is expressed by the following equation (2).

[0024]

number

[0025] The threshold voltage Vth1 of the depletion-type transistor M1 is a negative value. Therefore, the above formula (2) can be expressed as the following formula (3).

[0026]

Number

[0027] Therefore, by appropriately designing the W / L of each of the transistors M1 and M2, the temperature characteristics of the threshold voltages Vth1 and Vth2 can be offset. FIG. 4A is a diagram schematically showing the temperature characteristics of various voltages. As shown in FIG. 4A, the

Number

[0028] <Layout> Here, in the present embodiment, in order to improve load regulation, the layout of the elements in the reference voltage source 4, specifically the transistors M1 and M2, is as follows. FIG. 5 is a diagram showing a first example of the layout of the elements in the reference voltage source 4. FIG. 5 is a plan view of the semiconductor device 1A, showing a first direction (X) and a second direction (Y) orthogonal to each other.

[0029] As shown in FIG. 5, the output transistor 2 is arranged in a rectangular shape in the semiconductor device 1A. The first side 2A of the output transistor 2 extends in the first direction, and the second side 2B extends in the second direction. The reference voltage source 4 is arranged at a distance from the output transistor 2 in the second direction. The transistors M1 and M2 are arranged on the same perpendicular line P extending in the second direction with respect to the first side 2A. The distance L1 from the first side 2A on the perpendicular line P of the transistor M1 and the distance L2 from the first side 2A on the perpendicular line P of the transistor M2 are such that L1 < L2. That is, the transistor M1 is arranged closer to the output transistor 2 than the transistor M2.

[0030] The reason for arranging transistors M1 and M2 as above will be explained. When load current Io flows, output transistor 2 generates heat. The heat is generated due to losses expressed as (Vin-Vo) x Io. In other words, output transistor 2 is the heat source. When output transistor 2 generates heat, a temperature gradient ΔT (Figure 5) occurs with output transistor 2 at its center. Transistor M1 is arranged closer to output transistor 2 than transistor M2, so the temperature gradient ΔT causes transistor M1 to become relatively higher in temperature than transistor M2.

[0031] 4A, which was mentioned above, shows the case where the transistors M1 and M2 are at the same temperature, and when the temperature of the transistor M1 is relatively higher than that of the transistor M2, as shown in FIG 4B, the absolute value of the threshold voltage Vth1, which is a negative value of the transistor M1, becomes larger, and the first voltage component based on Vth1 shifts to the negative side (dashed line in FIG 4B). Therefore, the output voltage VOUT becomes higher in voltage value than when the transistors M1 and M2 are at the same temperature (dashed line in FIG 4B).

[0032] The larger the load current Io, i.e., the greater the heat generated by the output transistor 2, the larger the gradient of the temperature gradient ΔT becomes, and therefore the relative temperature difference between the transistor M1 and the transistor M2 becomes. Therefore, the more the load current Io increases, the higher the output voltage VOUT becomes. In other words, the output voltage VOUT has a positive characteristic with respect to the load current Io.

[0033] In this way, the transistors M1 and M2 are arranged so that there is an intentional temperature difference between them, and the output voltage VOUT has a positive characteristic with respect to the load current Io. This makes it possible to suppress a decrease in the output voltage Vo caused by the input offset Os of the error amplifier 3 when the load current Io increases by increasing the output voltage VOUT of the reference voltage source 4, thereby improving load regulation. Note that in this embodiment, fluctuations in the output voltage Vo caused by changes in the load current, not limited to changes in the steady value, can also be suppressed.

[0034] In other words, the above can be rephrased as follows. The output voltage VOUT has a negative first voltage component and a positive second voltage component, and is represented by the difference between the first voltage component and the second voltage component. Both the first voltage component and the second voltage component have a negative temperature characteristic. The first parameter (Vth1) included in the first voltage component is a parameter of the first element (M1). The second parameter (Vth2) included in the second voltage component is a parameter of the second element (M2). The first parameter, which is a negative value, has an absolute value that becomes larger as the temperature increases. The first element is arranged closer to the heat source (output transistor 2) than the second element.

[0035] FIG. 6 is a diagram showing a second example of the layout of elements in the reference voltage source 4. In the layout shown in FIG. 6, the transistors M1 and M2 are arranged with a shift in the first direction. That is, the transistor M1 is arranged on the perpendicular line P1 to the first side 2A, and the transistor M2 is arranged on the perpendicular line P2 to the first side 2A. The perpendicular line P1 is different from P2. The distance L1 from the first side 2A on the perpendicular line P1 of the transistor M1 and the distance L2 from the first side 2A on the perpendicular line P2 of the transistor M2 are such that L1 < L2. Even with such a layout, the above-described effects can be achieved.

[0036] Also, FIG. 7 is a diagram showing a third example of the layout of elements in the reference voltage source 4. Here, assuming that the output transistor 2, which is the heat source, is represented by a point, the transistors M1 and M2 are arranged on concentric circles C1 and C2 centered on the output transistor 2, respectively. The radius r1 of the concentric circle C1 and the radius r2 of the concentric circle C2 are such that r1 < r2. With such a layout, the transistor M1 can be arranged closer to the output transistor 2 than the transistor M2.

[0037] <Switching regulator> FIG. 8 is a diagram showing another configuration example of the power supply device. The power supply device 11 shown in FIG. 8 is a switching regulator. More specifically, the power supply device 11 is a step-down DC / DC converter that converts the input voltage Vin into the output voltage Vo.

[0038] The power supply device 11 includes a power supply circuit 20, an inductor 17, an output capacitor 18, and voltage dividing resistors 19A and 19B. The semiconductor device 11A includes the power supply circuit 20 in an integrated form.

[0039] The power supply circuit 20 includes an upper transistor 12, a lower transistor 13, and a control circuit 14. The inverter circuit has an upper transistor 12 and a lower transistor 13, which are configured by, for example, MOSFETs. The upper transistor 12 and the lower transistor 13 are connected in series between an application terminal of an input voltage Vin and a ground terminal. A node N11 to which the upper transistor 12 and the lower transistor 13 are connected is connected to a first terminal of an inductor 17. A second terminal of the inductor 17 is connected to a first terminal of an output capacitor 18. An output voltage Vo is generated at the second terminal of the inductor 17.

[0040] The voltage dividing resistors 19A and 19B are connected in series between the second terminal of the inductor 17 and the ground terminal. A feedback voltage FB obtained by dividing the output voltage Vo by the voltage dividing resistors 19A and 19B is generated at a node N12 to which the voltage dividing resistors 19A and 19B are connected.

[0041] A feedback voltage FB is input to a first terminal of the error amplifier 15. An output voltage VOUT is input to a second terminal of the error amplifier 15 as a reference voltage generated by a reference voltage source 16. A control circuit 14 drives the respective control terminals of the upper transistor 12 and the lower transistor 13 based on the output of the error amplifier 15. The upper transistor 12 and the lower transistor 13 are switched complementarily. As a result, the upper transistor 12 and the lower transistor 13 are switched by, for example, PWM (pulse width modulation) control so that the feedback voltage FB coincides with the output voltage VOUT, and the output voltage Vo is controlled to a target voltage.

[0042] In order to improve the load regulation in such a power supply device 11, the following layout configuration is implemented. FIG. 9 is a diagram showing a first example of the layout of elements in the reference voltage source 16. FIG. 9 is a plan view of the semiconductor device 11A, showing a first direction (X) and a second direction (Y) orthogonal to each other.

[0043] As shown in FIG. 9, the upper transistor 12 and the lower transistor 13 are each arranged in a rectangular shape in the semiconductor device 11A. The upper transistor 12 has a first side 12A extending in the first direction and a second side 12B extending in the second direction.

[0044] As shown in FIG. 8, when the upper transistor 12 is in the on state, the load current Io flows through the upper transistor 12, and the upper transistor 12 generates heat. Therefore, with the upper transistor 12 as the heat source, a temperature gradient ΔT occurs centered on the upper transistor 12. The reference voltage source 16 has the same configuration as the aforementioned reference voltage source 4 (FIG. 3) and includes transistors M1 and M2. The transistors M1 and M2 are arranged on the same perpendicular line P with respect to the first side 12A. Regarding the distance L1 from the first side 12A of the transistor M1 and the distance L2 from the first side 12A of the transistor M2, L1 < L2. That is, the transistor M1 is arranged closer to the upper transistor 12 than the transistor M2.

[0045] Also, as shown in FIG. 8, when the lower transistor 13 is in the on state, the load current Io flows through the lower transistor 13, and the lower transistor 13 generates heat. Therefore, the lower transistor 13 also becomes a heat source. The lower transistor 13 has a first side 13A extending in the first direction and a second side 13B extending in the second direction. Taking a point on the first side 13A as Pt, the respective distances L3 and L4 between the arbitrary point Pt and the transistors M1 and M2 are such that L3 < L4.

[0046] Note that the transistor M2 may be arranged, for example, on a perpendicular line to the first side 13A. In this case, for the distance L1 from the first side 12A of the transistor M1 and the distance L2 from the first side 13A of the transistor M2, L1 < L2 shall be satisfied.

[0047] Also, the transistors M1 and M2 may be arranged between the upper transistor 12 and the lower transistor 13 at the first direction position. In this case, for any point Pt1 on the first side 12A, the respective distances L1 and L2 between the arbitrary point Pt1 and the transistors M1 and M2 are such that L1 < L2. For any point Pt2 on the first side 13A, the respective distances L3 and L4 between the arbitrary point Pt2 and the transistors M1 and M2 are such that L3 < L4.

[0048] With such a layout configuration, the temperature of the transistor M1 can be made relatively higher than that of the transistor M2, the output voltage VOUT of the reference voltage source 16 can be increased with respect to the increase in the load current Io, and the load regulation can be improved.

[0049] Also, FIG. 10 is a diagram showing a second example of the layout of the elements in the reference voltage source 16. Thus, in the concentric circles C1, C2 centered on the upper transistor 12 which is a heat source respectively, and the concentric circles C3, C4 centered on the lower transistor 13 which is a heat source respectively, the radius r1 of the concentric circle C1 < the radius r2 of the concentric circle C2, and the radius r3 of the concentric circle C3 < the radius r4 of the concentric circle C4. The transistor M1 is arranged on the concentric circle C1 and on the concentric circle C3. The transistor M2 is arranged on the concentric circle C2 and on the concentric circle C4.

[0050] Thereby, the temperature of the transistor M1 can be made relatively higher than that of the transistor M2.

[0051] <Modification Example of Reference Voltage Source> Fig. 11 is a diagram showing the configuration of a reference voltage source 4 (or a reference voltage source 16) according to a modified example. The reference voltage source 4 shown in Fig. 11 is a bandgap reference circuit having resistors R1 to R3 and NPN transistors Q1 to Q3.

[0052] A first end of the resistor R1 is connected to the output end of the output voltage (reference voltage) VOUT. A second end of the resistor R1 is connected to the collector of the NPN transistor Q1. The collector and base of the NPN transistor Q1 are shorted. The emitter of the NPN transistor Q1 is connected to the ground end. The bases of the NPN transistors Q1 and Q2 are connected to each other. The emitter of the NPN transistor Q2 is connected to the first end of the resistor R3. A second end of the resistor R3 is connected to the ground end. A first end of the resistor R2 is connected to the output end of the output voltage VOUT. A second end of the resistor R2 is connected to the collector of the NPN transistor Q2. The collector of the NPN transistor Q3 is connected to the output end of the output voltage VOUT. A base of the NPN transistor Q3 is connected to the collector of the NPN transistor Q2. The emitter of the NPN transistor Q3 is connected to the ground end.

[0053] Here, when the base-emitter voltages of NPN transistors Q1 and Q3 are equal, the relationship between the collector currents Ic1 and Ic2 flowing through Q1 and Q2, respectively, and the resistors R1 and R2 is expressed by the following equation (A). Ic1 / Ic2=R2 / R1 (A)

[0054] A difference ΔVbe between the base-emitter voltages Vbe1 and Vbe2 of Q1 and Q2 is generated across resistor R3. Vr3 = ΔVbe = Vbe1 - Vbe2 =Vt·ln(Ic1 / Is)-Vt·ln(Ic2 / Is) =Vt·ln(R2 / R1) (B) where Vt is the thermal voltage (=kT / q), k is the Boltzmann constant, q is the electron charge, T is the absolute temperature, and Is is the reverse saturation current of the transistor.

[0055] The current flowing through resistor R3 = collector current Ic2 flowing through Q2, and the voltage drop Vr2 across resistor R2 is expressed by the following equation (C). Vr2 = Ic2 R2 =(R2 / R3) Vt ln(R2 / R1) (C)

[0056] The output voltage VOUT is the sum of the base-emitter voltage Vbe3 of Q3 and the voltage drop Vr2, and is expressed by the following equation (D). VOUT=Vbe3+(R2 / R3)·Vt·ln(R2 / R1) (D)

[0057] Differentiating the above equation (D) with respect to temperature gives the following equation (E). ∂VOUT / ∂T=∂Vbe3 / ∂T+(R2 / R3)·(k / q)·ln(R2 / R1) (E)

[0058] The first term on the right side of the above equation (E) is the temperature coefficient of the base-emitter voltage Vbe3 of Q3, and is a negative coefficient. The second term on the right side of the above equation (E) is the temperature coefficient of Vr2, and is a positive coefficient.

[0059] In this embodiment, the resistance values ​​of both resistors R2 and R3 have a positive temperature characteristic, and when the load current flows and the heat source generates heat, by placing resistor R2 closer to the heat source than resistor R3, the temperature of resistor R2 becomes relatively higher than that of resistor R3 due to the temperature gradient, and the value of R2 / R3 becomes larger. This allows the output voltage VOUT to have a positive characteristic with respect to the load current.

[0060] <Application example> Next, an example of the use of the power supply device described above will be described. Fig. 12 is an external view showing an example of the configuration of a vehicle equipped with on-board devices. The vehicle X of this example is equipped with on-board devices X11 to X17 and a battery (not shown) that supplies power to these on-board devices X11 to X17. The standard value of the voltage output from the battery is, for example, 48V.

[0061] The in-vehicle device X11 is responsible for engine-related controls (injection control, electronic throttle control, idling control, oxygen sensor heater control, and auto cruise control, etc. This is an engine control unit.

[0062] The in-vehicle device X12 is a high intensity discharge lamp (HID) and daytime running light (DRL). It is a lamp control unit that controls the turning on and off of lighting lamps.

[0063] The in-vehicle device X13 is a transmission controller that controls the transmission. It is a troll unit.

[0064] The in-vehicle device X14 controls the motion of the vehicle X (ABS [anti-lock brake system] control, EPS [electric power steering] control, electronic suspension control, etc. The body control unit.

[0065] The in-vehicle device X15 is a security control device that controls the operation of door locks, security alarms, etc. It is a troll unit.

[0066] The X16 automotive device is equipped with wipers, electric door mirrors, power windows, electric sunroofs, Electric seats and air conditioning are standard equipment and manufacturer options available from the factory. It is an electronic device that is installed in vehicle X at the stage.

[0067] The in-vehicle device X17 is a product line that includes in-vehicle A / V [audio / visual] devices, car navigation systems, Also, ETC [Electronic Toll Collection System], etc., can be installed in vehicle X at the user's discretion. It is an electronic device that is worn.

[0068] The power supply devices 1 and 11 described above can be incorporated in any of the in-vehicle devices X11 to X17.

[0069] <Other> In addition to the above-mentioned embodiment, various technical features disclosed in this specification can be modified in various ways without departing from the spirit of the technical creation. In other words, the above-mentioned embodiment should be considered to be illustrative and not restrictive in all respects, and the technical scope of the present invention should not be limited to the above-mentioned embodiment, but should be understood to include all modifications that fall within the meaning and scope equivalent to the scope of the claims.

[0070] For example, the power supply device to which the semiconductor device according to the present disclosure can be applied is not limited to a linear regulator or a switching regulator, and may be any other power supply device.

[0071] <Additional Notes> As described above, the semiconductor device (1A) according to one embodiment of the present disclosure is A semiconductor device having an integrated power supply circuit (10), The power supply circuit includes: a reference voltage source (4) configured to generate a first output voltage (VOUT) as a reference voltage; an error amplifier (3) configured to receive the first output voltage and a feedback voltage (FB) based on a second output voltage (Vo) of the power supply circuit; one or more transistors (2) that are controlled based on an output of the error amplifier and configured to pass a load current (Io); Equipped with The reference voltage source has a plurality of elements (M1, M2) having temperature characteristics, A temperature difference is provided among the plurality of elements by varying the distance of each of the plurality of elements from a heat source (2) configured to generate heat when the load current flows, and the first output voltage is configured to have a positive characteristic with respect to the load current (first configuration).

[0072] According to this configuration, when the load current increases, the decrease in the second output voltage caused by the change in the input offset of the error amplifier can be suppressed by increasing the first output voltage, thereby solving the problem of improving the load regulation.

[0073] In the first configuration, the heat source may be the transistor (2) (second configuration).

[0074] In the second configuration, the transistor (2) has a first side (2A) in a plan view, Each of the plurality of elements (M1, M2) is disposed on a perpendicular line (P) to the first side, The distance from the first side to the perpendicular line of each of the plurality of elements may be different (third configuration).

[0075] In addition, in the above first or second configuration, each of the multiple elements (M1, M2) may be configured to be arranged on concentric circles (C1, C2) of different radii centered on the heat source (2) (fourth configuration).

[0076] In any one of the first to fourth configurations, the plurality of elements includes a first element (M1) and a second element (M2), the first output voltage (VOUT) has a first voltage component having a negative value and a second voltage component having a positive value, and is represented by a difference between the first voltage component and the second voltage component; the first voltage component and the second voltage component both have negative temperature characteristics; a first parameter (Vth1) included in the first voltage component is a parameter of the first element, a second parameter (Vth2) included in the second voltage component is a parameter of the second element, The first parameter, which is a negative value, has a larger absolute value as the temperature increases, A distance from the first element to the heat source may be shorter than a distance from the second element to the heat source (fifth configuration).

[0077] In the fifth configuration, the first element (M1) is composed of a depletion-type N-channel MOSFET, The second element (M2) is composed of an enhancement type N-channel MOSFET, the first parameter is a threshold voltage (Vth1) of the first element, the second parameter is a threshold voltage (Vth2) of the second element, the first element and the second element are connected in series between an input voltage and a ground terminal; The gate and source of the first element and the gate of the second element may be connected to an application terminal of the first output voltage (sixth configuration).

[0078] In addition, in any one of the first to fourth configurations, The reference voltage source (4) a first resistor (R1) having a first terminal connected to an output terminal of the first output voltage (VOUT); a first NPN transistor (Q1) including a first collector connected to the second end of the first resistor, a first base shorted to the first collector, and a first emitter connected to a ground terminal; a second NPN transistor (Q2) including a second base connected to the first base, a second collector, and a second emitter; a second resistor (R2) including a first terminal connected to the output terminal and a second terminal connected to the second collector; a third resistor (R3) including a first terminal connected to the second emitter and a second terminal connected to a ground terminal; a third NPN transistor (Q3) including a third base connected to the second collector, a third collector connected to the output terminal, and a third emitter connected to a ground terminal; having The plurality of elements may include the second resistor and the third resistor (seventh configuration).

[0079] In any one of the first to seventh configurations, the power supply circuit (10) is included in a linear regulator (1), The transistor (2) may be an output transistor connected between an input voltage (Vin) and an output terminal of the second output voltage (Vo) (eighth configuration).

[0080] In any one of the first to seventh configurations, the power supply circuit (20) is included in a switching regulator (11), The transistors may be configured as an upper transistor (12) and a lower transistor (13) connected in series between an input voltage (Vin) and a ground terminal (ninth configuration).

[0081] Moreover, a power supply device (1) according to an embodiment of the present disclosure includes a semiconductor device (1A) having any one of the first to ninth configurations described above (tenth configuration).

[0082] Moreover, a vehicle (X) according to an aspect of the present disclosure includes a power supply device (1, 11) having the above-mentioned tenth configuration (eleventh configuration). [Industrial Applicability]

[0083] The present disclosure can be used in power supply devices for various applications, such as in-vehicle power supply devices. [Explanation of symbols]

[0084] 1 power supply 1A Semiconductor Device 2 Output transistors 2A Side 1 2B Side 2 3 Error Amplifier 4 Reference Voltage Source 5A,5B Voltage divider resistor 10 Power circuit 11 Power supply 11A Semiconductor Device 12 Upper Transistor 12A Side 1 12B Side 2 13 Lower Transistor 13A Side 1 13B Side 2 14 Control circuit 15 Error Amplifier 16 Reference Voltage Source 17 Inductors 18 Output Capacitor 19A, 19B Voltage divider resistor 20 Power circuit C1, C2 concentric circles C3, C4 concentric circles P perpendicular P1,P2 perpendicular M1, M2 transistors Pt point R1~R3 ​​resistance Q1~Q3 NPN transistors X Vehicle X11~X17 In-vehicle equipment

Claims

1. A semiconductor device having an integrated power supply circuit, The power supply circuit includes: a reference voltage source configured to generate a first output voltage as a reference voltage; an error amplifier configured to receive the first output voltage and a feedback voltage based on the second output voltage of the power supply circuit; one or more transistors controlled based on an output of the error amplifier and configured to conduct a load current; Equipped with the reference voltage source includes a plurality of elements having a temperature characteristic; A semiconductor device in which a temperature difference is created among the plurality of elements by varying the distance of each of the plurality of elements from a heat source configured to generate heat when the load current flows, thereby giving the first output voltage a positive characteristic with respect to the load current.

2. The semiconductor device according to claim 1 , wherein the heat source is the transistor.

3. the transistor has a first side in a plan view, Each of the plurality of elements is disposed on a perpendicular line to the first side, The semiconductor device according to claim 2 , wherein the distances of the perpendicular lines of the plurality of elements from the first side are different from each other.

4. The semiconductor device according to claim 1 , wherein each of said plurality of elements is arranged on a concentric circle having a different radius with said heat source as a center.

5. the plurality of elements includes a first element and a second element; the first output voltage has a first voltage component having a negative value and a second voltage component having a positive value, and is represented by a difference between the first voltage component and the second voltage component; the first voltage component and the second voltage component both have negative temperature characteristics; a first parameter included in the first voltage component is a parameter of the first element, a second parameter included in the second voltage component is a parameter of the second element, The first parameter, which is a negative value, has a larger absolute value as the temperature increases, The semiconductor device according to claim 1 , wherein a distance from said first element to said heat source is shorter than a distance from said second element to said heat source.

6. the first element is composed of a depletion type N-channel MOSFET, the second element is configured by an enhancement type N-channel MOSFET, the first parameter is a threshold voltage of the first element; the second parameter is a threshold voltage of the second element; the first element and the second element are connected in series between an input voltage and a ground terminal; 6. The semiconductor device according to claim 5, wherein the gate and source of said first element and the gate of said second element are connected to an application terminal of said first output voltage.

7. The reference voltage source is a first resistor having a first end connected to an output end of the first output voltage; a first NPN transistor including a first collector connected to the second end of the first resistor, a first base shorted to the first collector, and a first emitter connected to a ground terminal; a second NPN transistor including a second base connected to the first base, a second collector, and a second emitter; a second resistor having a first end connected to the output end and a second end connected to the second collector; a third resistor having a first end connected to the second emitter and a second end connected to ground; a third NPN transistor including a third base connected to the second collector, a third collector connected to the output terminal, and a third emitter connected to a ground terminal; having The semiconductor device according to claim 1 , wherein said plurality of elements includes said second resistor and said third resistor.

8. The power supply circuit is included in a linear regulator, 2. The semiconductor device according to claim 1, wherein the transistor is an output transistor connected between an input voltage and an output terminal of the second output voltage.

9. The power supply circuit is included in a switching regulator, 2. The semiconductor device according to claim 1, wherein said transistors are an upper transistor and a lower transistor connected in series between an input voltage and a ground terminal.

10. A power supply device comprising the semiconductor device according to claim 1 .

11. A vehicle comprising the power supply device according to claim 10.

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