Semiconductor device and method for manufacturing semiconductor device

Abstract

To provide a semiconductor device and a method for manufacturing the semiconductor device, capable of suppressing damage to a semiconductor chip.SOLUTION: A semiconductor device 1 includes: a substrate 2; a first stacked chip 3A comprising a plurality of semiconductor chips 30A stacked on a main surface 2a of the substrate 2; first fixed layers 5A disposed between the main surface 2a of the substrate 2 and the first stacked chip 3A, and between the plurality of semiconductor chips 30A in the first stacked chip 3A; and a first filet 6A extending from the first fixed layer 5A so as to protrude from between the main surface 2a of the substrate 2 and the first stacked chip 3A and between the plurality of semiconductor chips 30A in the first stacked chip 3A. The first filet 6A is connected to the main surface 2a of the substrate 2 and an end surface 3Aa of the first stacked chip 3A.SELECTED DRAWING: Figure 7

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing a semiconductor device. [Background technology]

[0002] Conventionally, there has been known a method for manufacturing a semiconductor device in which multiple semiconductor chips are stacked on the main surface of a substrate using technology such as TSV (Through-Silicon Via) (see, for example, Patent Documents 1 and 2). In such a method, multiple semiconductor chips are stacked on the main surface of the substrate by arranging an underfill material such as a film-like adhesive between the main surface of the substrate and the multiple semiconductor chips and between the multiple semiconductor chips. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2023 / 074474 [Patent Document 2] US Patent Application Publication No. 2021 / 210397 Summary of the Invention [Problem to be solved by the invention]

[0004] However, since the film-like adhesive flows when connected, the flowing adhesive overflows from between the main surface of the substrate and the semiconductor chips and between the semiconductor chips, forming multiple fillets. The fillets are the adhesive (or its hardened product) that overflows from between the main surface of the substrate and the semiconductor chips and between the semiconductor chips, and protrude from between the substrate and the semiconductor chips and between the semiconductor chips. For this reason, each fillet is susceptible to external stress, and when each fillet is subjected to external stress, there is a possibility that each semiconductor chip may be damaged.

[0005] In addition, Patent Document 1 describes a film-like adhesive for semiconductors that has a first adhesive region that is photocurable and thermosetting and a second adhesive region that is not photocurable but thermosetting, as an underfill material, with the goal of reducing the amount of fillets that occur. However, the technology described in Patent Document 1 requires the use of a specific underfill material, which causes a problem of lacking versatility. For this reason, it is desirable to suppress damage to semiconductor chips by other methods.

[0006] An object of the present disclosure is to provide a semiconductor device and a method for manufacturing a semiconductor device that can suppress damage to a semiconductor chip. [Means for solving the problem]

[0007] The semiconductor device disclosed herein comprises a substrate, a stacked chip consisting of a plurality of semiconductor chips stacked on a main surface of the substrate, a fixing layer disposed between the main surface of the substrate and the stacked chip and between the plurality of semiconductor chips in the stacked chip, and a fillet extending from the fixing layer so as to protrude between the main surface of the substrate and the stacked chip and between the plurality of semiconductor chips in the stacked chip, the fillet being connected to the main surface of the substrate and an end face of the stacked chip.

[0008] In this semiconductor device, a fillet extending from the fixing layer so as to protrude between the main surface of the substrate and the stacked chip and between the semiconductor chips in the stacked chip is connected to the main surface of the substrate and the end surface of the stacked chip, so that the fillet, the substrate, and the semiconductor chips are fixed to each other. Therefore, even if an external stress is applied to the fillet, the displacement of the semiconductor chips relative to the substrate is suppressed, and damage to the semiconductor chips can be suppressed.

[0009] In the above semiconductor device, the fillet may have a chip connection portion extending in the stacking direction of the stacked chips, and a substrate connection portion extending from the chip connection portion in the substrate direction, which is the direction along the main surface of the substrate. Some semiconductor devices include a sealing portion that seals the main surface of the substrate and the stacked chips. Such a sealing portion is formed by pouring molten resin around the main surface of the substrate and the stacked chips. At this time, if a large unevenness is formed on the fillet, the flow of the molten resin may be hindered and large voids may occur. However, in this semiconductor device, the fillet has a chip connection portion extending in the stacking direction and a substrate connection portion extending from the chip connection portion in the substrate direction. Therefore, when the sealing portion is formed, the obstruction of the flow of the molten resin by the fillet is suppressed, and the occurrence of large voids can be suppressed. In addition, even if the multiple semiconductor chips are misaligned with each other or the sizes of the multiple semiconductor chips are different from each other, the chip connection portion of the fillet can fill the steps of the end faces of the multiple semiconductor chips. This also suppresses the obstruction of the flow of the molten resin caused by the misalignment or size difference of the multiple semiconductor chips. Moreover, by extending the chip connection portion of the fillet in the stacking direction of the stacked chips, the size of the fillet in the direction perpendicular to the stacking direction of the stacked chips can be reduced, thereby enabling space saving and high density mounting.

[0010] In the semiconductor device described above, the surface of the chip connection portion opposite the stacked chip may be formed in a flat shape. In this semiconductor device, since the surface of the chip connection portion opposite the stacked chip is formed in a flat shape, it is possible to further suppress the generation of large voids when forming the sealing portion.

[0011] In the semiconductor device described above, the surface of the substrate connecting portion opposite to the main surface of the substrate may be formed in a flat shape. In this semiconductor device, since the surface of the substrate connecting portion opposite to the main surface of the substrate is formed in a flat shape, it is possible to further suppress the generation of large voids when forming the sealing portion.

[0012] In the above semiconductor device, the maximum thickness of the chip connection portion in the substrate direction may be 5 μm or more and 300 μm or less. In this semiconductor device, the maximum thickness of the chip connection portion in the substrate direction is 5 μm or more and 300 μm or less, so that the step between the end face of the stacked chip and the chip connection portion can be reduced. This can further suppress the occurrence of large voids when forming the sealing portion. In addition, the size of the fillet in the direction perpendicular to the end face of the stacked chip can be reduced. This can save space and enable high-density mounting.

[0013] In the semiconductor device, the maximum thickness of the substrate connection portion in the stacking direction may be 5 μm or more and 100 μm or less. In this semiconductor device, the maximum thickness of the substrate connection portion in the stacking direction is 5 μm or more and 100 μm or less, so that the step between the main surface of the substrate and the substrate connection portion can be reduced. This can further suppress the occurrence of large voids when forming the sealing portion.

[0014] The semiconductor device may include a second stacked chip consisting of a plurality of semiconductor chips stacked on a main surface of a substrate, a second fixing layer disposed between the main surface of the substrate and the second stacked chip and between the plurality of semiconductor chips in the second stacked chip, and a second fillet extending from the second fixing layer so as to protrude between the main surface of the substrate and the second stacked chip and between the plurality of semiconductor chips in the second stacked chip, and the second fillet may be connected to the fillet. In this semiconductor device, the fillet extending from the fixing layer and the second fillet extending from the second fixing layer are connected to each other, so that the rigidity of the fillet and the second fillet is increased, and the displacement of the plurality of semiconductor chips of the stacked chip relative to the substrate and the displacement of the plurality of semiconductor chips of the second stacked chip relative to the substrate are further suppressed. This can further suppress damage to the semiconductor chips.

[0015] In the above semiconductor device, the second fillet may have a second chip connection portion extending in the stacking direction of the second stacked chips and a second substrate connection portion extending from the second chip connection portion in a substrate direction along the main surface of the substrate, and the second substrate connection portion of the second fillet may be connected to the substrate connection portion of the fillet. In this semiconductor device, the substrate connection portion of the fillet and the second substrate connection portion of the second fillet are connected to each other, so that the step between the main surface of the substrate and the fillet and the second fillet can be reduced or eliminated. This can further suppress the generation of large voids when forming the sealing portion.

[0016] The semiconductor device may further include a sealing portion that seals the main surface of the substrate and the stacked chips. Since the semiconductor device includes the sealing portion that seals the main surface of the substrate and the stacked chips, the main surface of the substrate and the stacked chips can be protected.

[0017] The manufacturing method of a semiconductor device according to the present disclosure includes a stacking process in which a film-like underfill material is placed between a main surface of a substrate and a plurality of semiconductor chips and between the plurality of semiconductor chips, and the plurality of semiconductor chips are stacked on the main surface of the substrate, and in the stacking process, the underfill material is caused to protrude between the substrate and the plurality of semiconductor chips and between the plurality of semiconductor chips, and fillets of the underfill material protruding between the substrate and the plurality of semiconductor chips and between the plurality of semiconductor chips are connected to the main surface of the substrate and an end face of a stacked chip consisting of the plurality of semiconductor chips.

[0018] In this method of manufacturing a semiconductor device, the fillets of the underfill material that protrude between the substrate and the semiconductor chips and between the semiconductor chips are connected to the main surface of the substrate and the end surface of the stacked chip, so that the fillets, the substrate, and the semiconductor chips are fixed to each other. Therefore, even if an external stress is applied to the fillets, the displacement of the semiconductor chips relative to the substrate is suppressed, and damage to the semiconductor chips can be suppressed.

[0019] The method for manufacturing a semiconductor device described above may further include a cutting step of cutting a portion of the fillet. In this method for manufacturing a semiconductor device, since a portion of the fillet is cut, the fillet can be formed into any shape.

[0020] In the above-mentioned method for manufacturing a semiconductor device, in the cutting step, a part of the fillet may be cut so that the fillet is formed at the chip connection part extending in the stacking direction of the stacked chips and the substrate connection part extending from the chip connection part in the substrate direction, which is the direction along the main surface of the substrate. In manufacturing a semiconductor device, the main surface of the substrate and the stacked chips may be sealed with resin. Such sealing is performed by pouring molten resin around the main surface of the substrate and the stacked chips. At this time, if a large unevenness is formed in the fillet, the flow of the molten resin may be hindered and large voids may occur. However, in this method for manufacturing a semiconductor device, a part of the fillet is cut so that the fillet is formed at the chip connection part extending in the stacking direction and the substrate connection part extending from the chip connection part in the substrate direction. Therefore, when sealing the main surface of the substrate and the stacked chips with resin, the obstruction of the flow of the molten resin by the fillet is suppressed, and the generation of large voids can be suppressed. In addition, even if the semiconductor chips are misaligned with each other or the sizes of the semiconductor chips are different from each other, the chip connection part can fill the steps of the end faces of the semiconductor chips. This also makes it possible to suppress the disruption of the flow of molten resin caused by misalignment or size differences between multiple semiconductor chips. Moreover, by extending the chip connection portion of the fillet in the stacking direction, the size of the fillet in the direction perpendicular to the stacking direction of the stacked chips can be reduced. This allows for space saving and high-density packaging.

[0021] In the above-mentioned manufacturing method of a semiconductor device, in the cutting step, a part of the fillet may be cut so that the surface of the chip connection part opposite to the stacked chip is formed in a flat shape. In this manufacturing method of a semiconductor device, since a part of the fillet is cut so that the surface of the chip connection part opposite to the stacked chip is formed in a flat shape, it is possible to further suppress the generation of large voids when sealing the main surface of the substrate and the stacked chip with resin.

[0022] In the above-mentioned manufacturing method of a semiconductor device, in the cutting step, a part of the fillet may be cut so that the surface of the substrate connecting portion opposite to the substrate is formed in a flat shape. In this manufacturing method of a semiconductor device, since a part of the fillet is cut so that the surface of the substrate connecting portion opposite to the substrate is formed in a flat shape, it is possible to further suppress the generation of large voids when sealing the main surface of the substrate and the laminated chip with resin.

[0023] The method for manufacturing a semiconductor device described above may further include a sealing step of sealing the main surface of the substrate and the stacked chips with resin. In this method for manufacturing a semiconductor device, since the main surface of the substrate and the stacked chips are sealed with resin, the main surface of the substrate and the stacked chips can be protected. Effect of the Invention

[0024] According to the present disclosure, damage to the semiconductor chip can be suppressed. [Brief description of the drawings]

[0025] [Figure 1] 1 is a schematic cross-sectional view showing a semiconductor device according to an embodiment; [Diagram 2] 5A to 5C are schematic cross-sectional views for explaining a method for manufacturing a semiconductor device according to an embodiment. [Diagram 3] 5A to 5C are schematic cross-sectional views for explaining a method for manufacturing a semiconductor device according to an embodiment. [Figure 4] 5A to 5C are schematic cross-sectional views for explaining a method for manufacturing a semiconductor device according to an embodiment. [Diagram 5]5A to 5C are schematic cross-sectional views for explaining a method for manufacturing a semiconductor device according to an embodiment. [Figure 6] 5A to 5C are schematic cross-sectional views for explaining a method for manufacturing a semiconductor device according to an embodiment. [Figure 7] FIG. 13 is a schematic cross-sectional view showing a semiconductor device according to a modified example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] Hereinafter, the present embodiment will be described in detail with reference to the drawings. In the following description, the same or corresponding parts are denoted by the same reference numerals, and duplicated descriptions will be omitted. Furthermore, the dimensional ratios of the drawings are not limited to those shown in the drawings.

[0027] In this specification, the term "layer" includes a structure having a shape formed over the entire surface as well as a structure having a shape formed on a portion of the surface when observed in a plan view. In addition, in this specification, the term "process" includes not only an independent process, but also a process that cannot be clearly distinguished from other processes as long as the intended effect of the process is achieved. In addition, a numerical range indicated using "~" indicates a range including the numerical values ​​before and after "~" as the minimum and maximum values, respectively.

[0028] (Semiconductor Device) Fig. 1 is a schematic cross-sectional view showing a semiconductor device according to an embodiment. As shown in Fig. 1, the semiconductor device 1 according to this embodiment is configured by stacking a first stacked chip 3A and a second stacked chip 3B on a main surface 2a of a substrate 2. The semiconductor device 1 is, for example, a semiconductor device (semiconductor package) such as a processor or a memory. The processor may be, for example, a processor unit such as a GPU (Graphics Processing Unit) or a CPU (Central Processing Unit). The memory may be, for example, a memory unit such as an HBM (High Bandwidth Memory).

[0029] The substrate 2 may be, for example, a silicon substrate such as an interposer, an organic substrate, or a metal substrate such as a lead frame. A plurality of electrodes 2b are formed on a main surface 2a of the substrate 2. The main surface 2a is one surface of the substrate 2, and is the surface on which the plurality of electrodes 2b are formed. The electrodes 2b may be through-silicon vias (TSVs) that penetrate from the main surface 2a to a back surface 2c opposite to the main surface 2a.

[0030] The first stacked chip 3A is composed of a plurality of semiconductor chips 30A stacked on the main surface 2a of the substrate 2. The plurality of semiconductor chips 30A may be the same as each other or may be different from each other. In this embodiment, the first stacked chip 3A is composed of three semiconductor chips that are the same as each other, a first semiconductor chip 31A, a second semiconductor chip 32A, and a third semiconductor chip 33A. That is, in this embodiment, the plurality of semiconductor chips 30A are composed of a first semiconductor chip 31A, a second semiconductor chip 32A, and a third semiconductor chip 33A. In the first stacked chip 3A, the first semiconductor chip 31A, the second semiconductor chip 32A, and the third semiconductor chip 33A are stacked in this order on the main surface 2a of the substrate 2.

[0031] Each of the first semiconductor chip 31A, the second semiconductor chip 32A, and the third semiconductor chip 33A (hereinafter, simply referred to as "semiconductor chip 30A") has a first main surface 30Aa and a second main surface 30Ab. The first main surface 30Aa is a surface on one side of the semiconductor chip 30A, and the second main surface 30Ab is a surface of the semiconductor chip 30A opposite to the first main surface 30Aa. The first main surface 30Aa is a surface of the semiconductor chip 30A facing the substrate 2, and the second main surface 30Ab is a surface of the semiconductor chip 30A opposite to the substrate 2. A plurality of electrodes 30Ac are formed on the first main surface 30Aa of the semiconductor chip 30A, and a plurality of electrodes 30Ad are formed on the second main surface 30Ab of the semiconductor chip 30A. The electrode 30Ad may be a TSV penetrating toward the electrode 30Ac on the opposite side to the electrode 30Ad. Bumps 4A are arranged between a plurality of electrodes 2b formed on the main surface 2a of the substrate 2 and a plurality of electrodes 30Ac formed on the first main surface 30Aa of the first semiconductor chip 31A, and the bumps 4A provide electrical conductivity between the substrate 2 and the first semiconductor chip 31A.

[0032] A first fixing layer 5A is disposed between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30A and between the plurality of semiconductor chips 30A. That is, the first fixing layer 5A is disposed between the main surface 2a of the substrate 2 and the first main surface 30Aa of the first semiconductor chip 31A, between the second main surface 30Ab of the first semiconductor chip 31A and the first main surface 30Aa of the second semiconductor chip 32A, and between the second main surface 30Ab of the second semiconductor chip 32A and the first main surface 30Aa of the third semiconductor chip 33A. The first fixing layer 5A connects (fixes) the substrate 2 and the plurality of semiconductor chips 30A. The first fixing layer 5A is a hardened product of an underfill material disposed between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30A and between the plurality of semiconductor chips 30A during the manufacture of the semiconductor device 1. The material of the underfill material and the first fixing layer 5A is not particularly limited, but is, for example, a thermosetting resin such as an epoxy resin. In addition, the first fixing layer 5A is arranged to cover the bumps 4A between the main surface 2a of the substrate 2 and the multiple semiconductor chips 30A and between the multiple semiconductor chips 30A in order to ensure electrical continuity between the substrate 2 and the multiple semiconductor chips 30A.

[0033] A first fillet 6A extending from the first fixing layer 5A protrudes between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30A and between the plurality of semiconductor chips 30A. In other words, the first fillet 6A extends from the first fixing layer 5A so as to protrude between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30A and between the plurality of semiconductor chips 30A. The first fillet 6A is a hardened product of the underfill material protruding between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30A and between the plurality of semiconductor chips 30A during the manufacture of the semiconductor device 1.

[0034] The first fillet 6A is connected to the main surface 2a of the substrate 2 and the end surface 3Aa of the first stacked chip 3A. The end surface 3Aa of the first stacked chip 3A is an end surface of the plurality of semiconductor chips 30A (the first semiconductor chip 31A, the second semiconductor chip 32A, and the third semiconductor chip 33A). The first fillet 6A is connected to the main surface 2a of the substrate 2 and the end surface 3Aa of the first stacked chip 3A, meaning that the first fillet 6A is fixed to the main surface 2a of the substrate 2 and is fixed to the end surface 3Aa of the first stacked chip 3A. The first fillet 6A is formed by the underfill material that protrudes between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30A and between the plurality of semiconductor chips 30A during the manufacture of the semiconductor device 1, and is hardened in a state of contact with the main surface 2a of the substrate 2 and the end surface 3Aa of the first stacked chip 3A.

[0035] The first fillet 6A has a first chip connection portion 61A extending in the stacking direction D1 of the first stacked chip 3A, and a first substrate connection portion 62A extending from the first chip connection portion 61A in a substrate direction D2, which is a direction along the main surface 2a of the substrate 2. In this embodiment, the first fillet 6A is configured (formed) by the first chip connection portion 61A and the first substrate connection portion 62A. The stacking direction D1 of the first stacked chip 3A is also a direction perpendicular to the main surface 2a of the substrate 2 or a direction perpendicular to the substrate direction D2. Therefore, the first fillet 6A is formed to have an L-shaped cross section by the first chip connection portion 61A and the first substrate connection portion 62A.

[0036] A surface 61Aa of the first chip connection portion 61A opposite to the first stacked chip 3A is formed in a flat shape. A surface 62Aa of the first substrate connection portion 62A opposite to the main surface 2a of the substrate 2 is formed in a flat shape. The surface 61Aa of the first chip connection portion 61A is a surface extending in the stacking direction D1 of the first stacked chip 3A. The surface 62Aa of the first substrate connection portion 62A is a surface extending in the substrate direction D2.

[0037] The maximum thickness of the first chip connection portion 61A in the substrate direction D2 is, for example, 5 μm to 300 μm, 10 μm to 250 μm, or 20 μm to 200 μm. The maximum thickness of the first substrate connection portion 62A in the stacking direction D1 of the first stacked chip 3A is, for example, 5 μm to 100 μm, 8 μm to 90 μm, or 10 μm to 80 μm.

[0038] The second stacked chip 3B is composed of a plurality of semiconductor chips 30B stacked on the main surface 2a of the substrate 2. The plurality of semiconductor chips 30B may be the same as each other or may be different from each other. In this embodiment, the second stacked chip 3B is composed of three semiconductor chips that are the same as each other, a first semiconductor chip 31B, a second semiconductor chip 32B, and a third semiconductor chip 33B. That is, in this embodiment, the plurality of semiconductor chips 30B are composed of a first semiconductor chip 31B, a second semiconductor chip 32B, and a third semiconductor chip 33B. In the second stacked chip 3B, the first semiconductor chip 31B, the second semiconductor chip 32B, and the third semiconductor chip 33B are stacked in this order on the main surface 2a of the substrate 2.

[0039] Each of the first semiconductor chip 31B, the second semiconductor chip 32B, and the third semiconductor chip 33B (hereinafter, simply referred to as "semiconductor chip 30B") has a first main surface 30Ba and a second main surface 30Bb. The first main surface 30Ba is a surface on one side of the semiconductor chip 30B, and the second main surface 30Bb is a surface of the semiconductor chip 30B opposite to the first main surface 30Ba. The first main surface 30Ba is a surface of the semiconductor chip 30B facing the substrate 2, and the second main surface 30Bb is a surface of the semiconductor chip 30B opposite to the substrate 2. A plurality of electrodes 30Bc are formed on the first main surface 30Ba of the semiconductor chip 30B, and a plurality of electrodes 30Bd are formed on the second main surface 30Bb of the semiconductor chip 30B. The electrode 30Bd may be a TSV penetrating toward the electrode 30Bc opposite to the electrode 30Bd. Bumps 4B are arranged between a plurality of electrodes 2b formed on the main surface 2a of the substrate 2 and a plurality of electrodes 30Bc formed on the first main surface 30Ba of the first semiconductor chip 31B, and the bumps 4B provide electrical conductivity between the substrate 2 and the first semiconductor chip 31B.

[0040] Second fixing layers 5B are disposed between the main surface 2a of the substrate 2 and the plurality of semiconductor chips 30B and between the plurality of semiconductor chips 30B. The second fixing layers 5B connect (fix) the substrate 2 and the plurality of semiconductor chips 30B, similar to the first fixing layers 5A.

[0041] Then, second fillets 6B extending from the second fixing layer 5B protrude from between the main surface 2a of the substrate 2 and the multiple semiconductor chips 30B and between the multiple semiconductor chips 30B. That is, similar to the first fillet 6A, the second fillet 6B extends from the second fixing layer 5B so as to protrude from between the main surface 2a of the substrate 2 and the multiple semiconductor chips 30B and between the multiple semiconductor chips 30B.

[0042] The second fillet 6B, like the first fillet 6A, is connected to the main surface 2a of the substrate 2 and the end surface 3Ba of the second stacked chip 3B. Like the first fillet 6A, the second fillet 6B has a second chip connecting portion 61B extending in the stacking direction D1 of the second stacked chip 3B and a second substrate connecting portion 62B extending from the second chip connecting portion 61B in the substrate direction D2. In this embodiment, the second fillet 6B, like the first fillet 6A, is configured (formed) by the second chip connecting portion 61B and the second substrate connecting portion 62B.

[0043] A surface 61Ba of the second chip connection portion 61B opposite to the second stacked chip 3B is formed in a flat shape. Also, a surface 62Ba of the second substrate connection portion 62B opposite to the main surface 2a of the substrate 2 is formed in a flat shape.

[0044] The maximum thickness of the second chip connection portion 61B in the substrate direction D2 can be the same as the maximum thickness of the first chip connection portion 61A in the substrate direction D2. Moreover, the maximum thickness of the second substrate connection portion 62B in the stacking direction D1 of the second stacked chip 3B can be the same as the maximum thickness of the first substrate connection portion 62A in the stacking direction D1 of the first stacked chip 3A.

[0045] The first chip stack 3A and the second chip stack 3B are spaced apart from each other, and the second substrate connection portion 62B of the second fillet 6B and the first substrate connection portion 62A of the first fillet 6A are connected to each other between the first chip stack 3A and the second chip stack 3B.

[0046] The main surface 2a of the substrate 2, the first stack chip 3A, and the second stack chip 3B are sealed by the sealing portion 7. That is, the sealing portion 7 seals the main surface 2a of the substrate 2, the first stack chip 3A, and the second stack chip 3B. The sealing portion 7 may seal a portion of the substrate 2 other than the main surface 2a, or may seal the entire substrate 2. The material of the sealing portion 7 is not particularly limited, but is, for example, a thermosetting resin such as an epoxy resin.

[0047] (Method of manufacturing a semiconductor device) Next, a method for manufacturing a semiconductor device according to this embodiment will be described with reference to Fig. 2 to Fig. 6. The method for manufacturing a semiconductor device according to this embodiment is a method for manufacturing the above-mentioned semiconductor device 1. Fig. 2 to Fig. 6 are schematic cross-sectional views for explaining the method for manufacturing a semiconductor device according to this embodiment.

[0048] <Lamination process> In the manufacturing method of the semiconductor device according to the present embodiment, first, a first lamination step is performed. In the first lamination step, the substrate 2, the first semiconductor chip 31A, the second semiconductor chip 32A, the third semiconductor chip 33A, the first semiconductor chip 31B, the second semiconductor chip 32B, the third semiconductor chip 33B, the film-shaped underfill material 51A, and the film-shaped underfill material 51B are prepared. The first semiconductor chip 31A, the second semiconductor chip 32A, and the third semiconductor chip 33A have bumps 4A attached to a plurality of electrodes 30Ac formed on the first main surface 30Aa. The first semiconductor chip 31B, the second semiconductor chip 32B, and the third semiconductor chip 33B have bumps 4B attached to a plurality of electrodes 30Bc formed on the first main surface 30Aa. The material of the underfill material 51A and the underfill material 51A can be the same as the material of the first fixing layer 5A and the second fixing layer 5B described above.

[0049] Next, as shown in FIG. 2 and FIG. 3, an underfill material 51A is disposed between the main surface 2a of the substrate 2 and the first semiconductor chip 31A, and the first semiconductor chip 31A is laminated on the main surface 2a of the substrate 2. Then, the substrate 2 and the first semiconductor chip 31A are heated and pressurized to connect (fix) the first semiconductor chip 31A to the main surface 2a of the substrate 2, and the substrate 2 and the first semiconductor chip 31A are electrically connected to each other by the bumps 4A. Similarly, an underfill material 51B is disposed between the main surface 2a of the substrate 2 and the first semiconductor chip 31B, and the first semiconductor chip 31B is laminated on the main surface 2a of the substrate 2. Then, the substrate 2 and the first semiconductor chip 31B are heated and pressurized to connect (fix) the first semiconductor chip 31B to the main surface 2a of the substrate 2, and the substrate 2 and the first semiconductor chip 31B are electrically connected to each other by the bumps 4B.

[0050] At this time, the underfill material 51A arranged between the main surface 2a of the substrate 2 and the first semiconductor chip 31A flows when heated and pressurized, and overflows from between the substrate 2 and the first semiconductor chip 31A. Also, the underfill material 51B arranged between the main surface 2a of the substrate 2 and the first semiconductor chip 31B flows when heated and pressurized, and overflows from between the substrate 2 and the first semiconductor chip 31B. Therefore, the substrate 2 and the first semiconductor chip 31A are heated and pressurized so that the fillet 51Aa of the underfill material 51A overflowing between the substrate 2 and the first semiconductor chip 31A contacts the main surface 2a of the substrate 2 and the end surface 3Aa of the first semiconductor chip 31A. Also, the substrate 2 and the first semiconductor chip 31B are heated and pressurized so that the fillet 51Ba of the underfill material 51B overflowing between the substrate 2 and the first semiconductor chip 31B contacts the main surface 2a of the substrate 2 and the end surface 3Ba of the first semiconductor chip 31B. At this time, the substrate 2, the first semiconductor chip 31A, and the first semiconductor chip 31B may be heated and pressurized so that the fillets 51Aa and 51Ba come into contact with each other.

[0051] 4, an underfill material 51A is disposed between the second main surface 30Ab of the first semiconductor chip 31A and the first main surface 30Aa of the second semiconductor chip 32A, and the second semiconductor chip 32A is laminated on the second main surface 30Ab of the first semiconductor chip 31A. Then, the first semiconductor chip 31A and the second semiconductor chip 32A are heated and pressurized to connect (fix) the second semiconductor chip 32A onto the first semiconductor chip 31A, and the first semiconductor chip 31A and the second semiconductor chip 32A are electrically connected by the bumps 4A, and the underfill material 51A is protruded from between the first semiconductor chip 31A and the second semiconductor chip 32A. Similarly, an underfill material 51B is disposed between the second main surface 30Bb of the first semiconductor chip 31B and the first main surface 30Ba of the second semiconductor chip 32B, and the second semiconductor chip 32B is laminated on the second main surface 30Bb of the first semiconductor chip 31B. Then, by heating and pressurizing the first semiconductor chip 31B and the second semiconductor chip 32B, the second semiconductor chip 32B is connected (fixed) onto the first semiconductor chip 31B, the first semiconductor chip 31B and the second semiconductor chip 32B are made conductive via the bumps 4B, and the underfill material 51B is caused to protrude from between the first semiconductor chip 31B and the second semiconductor chip 32B.

[0052] Furthermore, the first semiconductor chip 31A and the second semiconductor chip 32A are heated and pressurized so that the fillet 51Aa of the underfill material 51A protruding from between the first semiconductor chip 31A and the second semiconductor chip 32A contacts the end surface 3Aa of the first semiconductor chip 31A and the end surface 3Aa of the second semiconductor chip 32A. The first semiconductor chip 31B and the second semiconductor chip 32B are heated and pressurized so that the fillet 51Ba of the underfill material 51B protruding from between the first semiconductor chip 31B and the second semiconductor chip 32B contacts the end surface 3Ba of the first semiconductor chip 31B and the end surface 3Ba of the second semiconductor chip 32B. At this time, the first semiconductor chip 31A, the second semiconductor chip 32A, the first semiconductor chip 31B, and the second semiconductor chip 32B may be further heated and pressurized so that the fillet 51Aa and the fillet 51Ba contact each other.

[0053] 5, an underfill material 51A is disposed between the second main surface 30Ab of the second semiconductor chip 32A and the first main surface 30Aa of the third semiconductor chip 33A, and the third semiconductor chip 33A is laminated on the second main surface 30Ab of the second semiconductor chip 32A. Then, the second semiconductor chip 32A and the third semiconductor chip 33A are heated and pressurized to connect (fix) the third semiconductor chip 33A onto the second semiconductor chip 32A, and the second semiconductor chip 32A and the third semiconductor chip 33A are electrically connected by the bumps 4A, and the underfill material 51A is protruded from between the second semiconductor chip 32A and the third semiconductor chip 33A. Similarly, an underfill material 51B is disposed between the second main surface 30Bb of the second semiconductor chip 32B and the first main surface 30Ba of the third semiconductor chip 33B, and the third semiconductor chip 33B is laminated on the second main surface 30Bb of the second semiconductor chip 32B. Then, by heating and pressurizing the second semiconductor chip 32B and the third semiconductor chip 33B, the third semiconductor chip 33B is connected (fixed) onto the second semiconductor chip 32B, the second semiconductor chip 32B and the third semiconductor chip 33B are made conductive via the bumps 4B, and the underfill material 51B is caused to protrude from between the second semiconductor chip 32B and the third semiconductor chip 33B.

[0054] Furthermore, the second semiconductor chip 32A and the third semiconductor chip 33A are heated and pressurized so that the fillet 51Aa of the underfill material 51A protruding from between the second semiconductor chip 32A and the third semiconductor chip 33A contacts the end face 3Aa of the second semiconductor chip 32A and the end face 3Aa of the third semiconductor chip 33A. Also, the second semiconductor chip 32B and the third semiconductor chip 33B are heated and pressurized so that the fillet 51Ba of the underfill material 51B protruding from between the second semiconductor chip 32B and the third semiconductor chip 33B contacts the end face 3Ba of the second semiconductor chip 32B and the end face 3Ba of the third semiconductor chip 33B. Furthermore, the second semiconductor chip 32A, the third semiconductor chip 33A, the second semiconductor chip 32B, and the third semiconductor chip 33B may be heated and pressurized so that the fillet 51Aa and the fillet 51Ba contact each other.

[0055] As a result, the fillets 51Aa of the underfill material 51A protruding between the substrate 2 and the semiconductor chips 30A and between the semiconductor chips 30A are connected to the main surface 2a of the substrate 2 and the end surface 3Aa of the first stacked chip 3A consisting of the semiconductor chips 30A. Also, the fillets 51Ba of the underfill material 51B protruding between the substrate 2 and the semiconductor chips 30B and between the semiconductor chips 30B are connected to the main surface 2a of the substrate 2 and the end surface 3Ba of the second stacked chip 3B consisting of the semiconductor chips 30B. Also, the fillets 51Aa and 51Ba are in contact with each other. In addition, in the stacking process, the stacking of the first stacked chip 3A and the stacking of the second stacked chip 3B may be performed at the same time or at different times, or some of them may be performed at the same time and the other parts may be performed at different times.

[0056] <Cutting process> When the lamination process is completed and the fillets 51Aa and 51Ba are hardened, the cutting process is performed. As shown in Fig. 6, in the cutting process, a part of the fillets 51Aa and a part of the fillets 51Ba are cut. For example, a cutting blade such as an electroplated blade can be used for cutting.

[0057] In the cutting step, a part of the fillet 51Aa is cut to form a first fillet 6A, which is a hardened product of the fillet 51Aa, into a first chip connection part 61A extending in the stacking direction D1 of the first stacked chip 3A and a first substrate connection part 62A extending from the first chip connection part 61A in the substrate direction D2. A part of the fillet 51Ba is cut to form a second fillet 6B, which is a hardened product of the fillet 51Ba, into a second chip connection part 61B extending in the stacking direction D1 of the second stacked chip 3B and a second substrate connection part 62B extending from the second chip connection part 61B in the substrate direction D2. For example, the cutting position in the stacking direction D1 and the substrate direction D2 is adjusted from the side opposite to the substrate 2 with respect to the first stacked chip 3A and the second stacked chip 3B, and the cutting blade is cut into the hardened product of the fillet 51Aa and the hardened product of the fillet 51Ba. This allows the first fillet 6A to be formed in the first chip connecting portion 61A and the first substrate connecting portion 62A, and the second fillet 6B to be formed in the second chip connecting portion 61B and the second substrate connecting portion 62B.

[0058] At this time, a portion of the first fillet 6A which is the hardened material of the fillet 51Aa is cut so that a surface 61Aa of the first chip connecting portion 61A opposite to the first stacked chip 3A is formed flat, and a surface 62Aa of the first substrate connecting portion 62A opposite to the substrate 2 is formed flat. Also, a surface 61Ba of the second stacked chip 3B of the second chip connecting portion 61B is formed flat, and a portion of the second fillet 6B which is the hardened material of the fillet 51Ba is cut so that a surface 62Ba of the second substrate connecting portion 62B opposite to the substrate 2 is formed flat.

[0059] <Sealing process> After the cutting process is completed, the sealing process is performed. In the sealing process, the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B are sealed with resin. The sealing process can be performed, for example, by placing a laminate in which the first stacked chip 3A and the second stacked chip 3B are stacked on the main surface 2a of the substrate 2 in a mold, and pouring molten resin around the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B. This results in the semiconductor device 1 shown in FIG. 1. In the sealing process, the portions of the substrate 2 other than the main surface 2a may be sealed with resin, or the entire substrate 2 may be sealed with resin.

[0060] As described above, in the semiconductor device 1 according to the present embodiment, the first fillet 6A extending from the first fixing layer 5A so as to protrude between the main surface 2a of the substrate 2 and the first stacked chip 3A and between the semiconductor chips 30A in the first stacked chip 3A is connected to the main surface 2a of the substrate 2 and the end surface 3Aa of the first stacked chip 3A, so that the first fillet 6A, the substrate 2, and the semiconductor chips 30A are fixed to each other. Therefore, even if an external stress is input to the first fillet 6A, the displacement of the semiconductor chips 30A relative to the substrate 2 is suppressed, so that the semiconductor chip 30A can be prevented from being damaged. Moreover, since at least a part of the end surface 3Aa of the first stacked chip 3A is covered by the first fillet 6A, the end surface 3Aa of the first stacked chip 3A can be protected by the first fillet 6A.

[0061] The sealing portion 7 is formed by pouring molten resin around the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B. At this time, if the first fillet has a large unevenness, the flow of the molten resin may be hindered, and large voids may occur. However, in the semiconductor device 1, the first fillet 6A is composed of a first chip connection portion 61A extending in the stacking direction D1 of the first stacked chip 3A, and a second substrate connection portion 62B extending from the first chip connection portion 61A in the substrate direction D2. Therefore, when forming the sealing portion 7, the first fillet 6A is prevented from hindering the flow of the molten resin, and the generation of large voids can be suppressed. In addition, even if the semiconductor chips 30A are misaligned with each other or the sizes of the semiconductor chips 30A are different from each other, the first chip connection portion 61A of the first fillet 6A can fill the steps of the end faces 3Aa of the semiconductor chips 30A. This can also suppress the hindering of the flow of the molten resin caused by the misalignment or size difference of the semiconductor chips 30A. Moreover, by having the first chip connection portion 61A of the first fillet 6A extend in the stacking direction D1 of the first chip stack 3A, the dimension of the first fillet 6A in the direction perpendicular to the stacking direction D1 of the first chip stack 3A can be reduced, thereby making it possible to save space and achieve high-density mounting.

[0062] Furthermore, in this semiconductor device 1, the surface 61Aa of the first chip connection portion 61A opposite the first stacked chip 3A is formed in a flat shape, thereby further suppressing the occurrence of large voids when forming the sealing portion 7.

[0063] Furthermore, in this semiconductor device 1, the surface 62Aa of the first substrate connection portion 62A opposite the main surface 2a of the substrate 2 is formed in a flat shape, thereby further suppressing the occurrence of large voids when forming the sealing portion 7.

[0064] In addition, in the semiconductor device 1, the maximum thickness of the first chip connection portion 61A in the substrate direction D2 is 5 μm to 300 μm, 10 μm to 250 μm, or 20 μm to 200 μm, so that the step between the end face 3Aa of the first stacked chip 3A and the first chip connection portion 61A can be reduced. This can further prevent large voids from being generated when forming the sealing portion 7. Also, the dimension of the first fillet 6A in the direction perpendicular to the end face 3Aa of the first stacked chip 3A can be reduced. This can save space and achieve high-density mounting.

[0065] In addition, in this semiconductor device 1, the maximum thickness of first substrate connection portion 62A in stacking direction D1 is 5 μm to 100 μm, 8 μm to 90 μm, or 10 μm to 80 μm, so that the step between main surface 2a of substrate 2 and first substrate connection portion 62A can be reduced. This can further prevent large voids from being generated when sealing portion 7 is formed.

[0066] Furthermore, in this semiconductor device 1, the first fillet 6A extending from the first fixing layer 5A and the second fillet 6B extending from the second fixing layer 5B are connected to each other, which increases the rigidity of the first fillet 6A and the second fillet 6B, thereby further suppressing the displacement of the multiple semiconductor chips 30A of the first stacked chip 3A relative to the substrate 2 and the displacement of the multiple semiconductor chips 30B of the second stacked chip 3B relative to the substrate 2. This makes it possible to further suppress damage to the semiconductor chips 30A and 30B.

[0067] In addition, in this semiconductor device 1, the first substrate connecting portion 62A of the first fillet 6A and the second substrate connecting portion 62B of the second fillet 6B are connected to each other, so that the steps between the main surface 2a of the substrate 2 and the first and second fillets 6A and 6B can be reduced or eliminated. This can further prevent large voids from being generated when the sealing portion 7 is formed.

[0068] In addition, this semiconductor device 1 has a sealing portion 7 that seals the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B, thereby protecting the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B.

[0069] In the manufacturing method of the semiconductor device according to the present embodiment, the fillet 51Aa of the underfill material 51A protruding between the substrate 2 and the semiconductor chips 30A and between the semiconductor chips 30A is connected to the main surface 2a of the substrate 2 and the end surface 3Aa of the first stacked chip 3A, so that the first fillet 6A, which is a hardened product of the fillet 51Aa, the substrate 2, and the semiconductor chips 30A are fixed to each other. Therefore, even if an external stress is input to the first fillet 6A, the displacement of the semiconductor chips 30A relative to the substrate 2 is suppressed, so that the semiconductor chip 30A is prevented from being damaged. Moreover, at least a part of the end surface 3Aa of the first stacked chip 3A is covered by the first fillet 6A, so that the end surface 3Aa of the first stacked chip 3A can be protected by the first fillet 6A.

[0070] Moreover, in this method for manufacturing a semiconductor device, a portion of the first fillet 6A, which is the hardened product of the fillet 51Aa, is cut, so that the first fillet 6A can be formed into any shape.

[0071] In addition, in the manufacturing method of the semiconductor device, a part of the first fillet 6A is cut so that the first fillet 6A is formed in the first chip connection portion 61A extending in the stacking direction D1 of the first stacked chip 3A and the first board connection portion 62A extending from the first chip connection portion 61A in the board direction D2. Therefore, when the main surface 2a of the board 2, the first stacked chip 3A, and the second stacked chip 3B are sealed with resin, the first fillet 6A is prevented from hindering the flow of the molten resin, and the generation of large voids can be suppressed. In addition, even if the multiple semiconductor chips 30A are misaligned with each other or the sizes of the multiple semiconductor chips 30A are different from each other, the first chip connection portion 61A can fill the steps of the end faces 3Aa of the multiple semiconductor chips 30A. This also makes it possible to suppress the hindering of the flow of the molten resin caused by the misalignment or size difference of the multiple semiconductor chips 30A. Moreover, by having the first chip connection portion 61A of the first fillet 6A extend in the stacking direction D1 of the first chip stack 3A, the dimension of the first fillet 6A in the direction perpendicular to the stacking direction D1 of the first chip stack 3A can be reduced, thereby making it possible to save space and achieve high-density mounting.

[0072] Furthermore, in this manufacturing method for a semiconductor device, a portion of the first fillet 6A is cut so that the surface 61Aa of the first chip connection portion 61A opposite the first stacked chip 3A is formed flat, thereby further suppressing the occurrence of large voids when sealing the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B with resin.

[0073] Furthermore, in this manufacturing method for a semiconductor device, a portion of the first fillet 6A is cut so that the surface 62Aa of the first substrate connection portion 62A opposite the substrate 2 is formed flat, thereby further suppressing the occurrence of large voids when sealing the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B with resin.

[0074] Furthermore, in this semiconductor device manufacturing method, the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B are sealed with resin, thereby protecting the main surface 2a of the substrate 2, the first stacked chip 3A, and the second stacked chip 3B.

[0075] The present disclosure is not limited to the above-described embodiments, and can be modified as appropriate without departing from the spirit of the present disclosure.

[0076] For example, in the above embodiment, the semiconductor device has been described as having a sealing portion, but the semiconductor device may not have a sealing portion, as in a semiconductor device 1A of a modified example shown in Fig. 7. In this case, for example, the sealing step of the above embodiment can be omitted in the method for manufacturing the semiconductor device.

[0077] In the above embodiment, the fillet of the semiconductor device has been described as having a chip connection portion extending in the stacking direction of the stacked chips and a substrate connection portion extending from the chip connection portion in the substrate direction, but the fillet may have any shape as long as it is connected to the main surface of the substrate and the end surface of the stacked chip. In this case, for example, the cutting process can be omitted in the manufacturing method of the semiconductor device of the above embodiment.

[0078] In the above embodiment, the semiconductor device has been described as a semiconductor device in which the substrate connection portion of the first fillet and the substrate connection portion of the second fillet are connected to each other, but the first fillet and the second fillet may be separated from each other and not connected to each other. Such a semiconductor device can be manufactured, for example, by heating and pressurizing the second semiconductor chip 32A, the third semiconductor chip 33A, the second semiconductor chip 32B, and the third semiconductor chip 33B in the stacking step of the above embodiment so that the fillet 51Aa and the fillet 51Ba do not contact each other.

[0079] In addition, in the above embodiment, the semiconductor device is described as having two stacked chips, a first stacked chip and a second stacked chip, stacked on the main surface of the substrate, but the number of stacked chips stacked on the main surface of the substrate is not particularly limited and may be one or three or more.

[0080] The gist of this disclosure is as follows: [1] to

[15] [1] A semiconductor device comprising: a substrate; a laminated chip consisting of a plurality of semiconductor chips stacked on a main surface of the substrate; a fixing layer disposed between the main surface of the substrate and the laminated chip and between the plurality of semiconductor chips in the laminated chip; and a fillet extending from the fixing layer so as to protrude between the main surface of the substrate and the laminated chip and between the plurality of semiconductor chips in the laminated chip, the fillet being connected to the main surface of the substrate and an end face of the laminated chip. [2] The semiconductor device described in [1], wherein the fillet has a chip connection portion extending in the stacking direction of the stacked chips and a substrate connection portion extending from the chip connection portion in a substrate direction, which is a direction along the main surface of the substrate. [3] The semiconductor device according to [2], wherein the surface of the chip connection portion opposite the stacked chip is formed flat. [4] The semiconductor device according to [2] or [3], wherein the surface of the substrate connection portion opposite the main surface of the substrate is formed flat. [5] The semiconductor device according to any one of [2] to [4], wherein the maximum thickness of the chip connection portion in the substrate direction is 5 μm or more and 300 μm or less. [6] The semiconductor device according to any one of [2] to [5], wherein the maximum thickness of the substrate connection portion in the stacking direction is 5 μm or more and 100 μm or less. [7] A semiconductor device described in any of [1] to [6], comprising: a second stacked chip consisting of a plurality of semiconductor chips stacked on the main surface of the substrate; a second fixing layer arranged between the main surface of the substrate and the second stacked chip and between the plurality of semiconductor chips in the second stacked chip; and a second fillet extending from the second fixing layer so as to protrude between the main surface of the substrate and the second stacked chip and between the plurality of semiconductor chips in the second stacked chip, wherein the second fillet is connected to the fillet. [8] The semiconductor device described in [7], wherein the second fillet has a second chip connection portion extending in the stacking direction of the second stacked chip and a second substrate connection portion extending from the second chip connection portion in a substrate direction that is a direction along the main surface of the substrate, and the second substrate connection portion of the second fillet is connected to the substrate connection portion of the fillet. [9] The semiconductor device according to any one of [1] to [8], further comprising a sealing portion that seals the main surface of the substrate and the laminated chip.

[10] A method for manufacturing a semiconductor device, comprising a stacking process of placing a film-like underfill material between a main surface of a substrate and a plurality of semiconductor chips and between the plurality of semiconductor chips, and stacking the plurality of semiconductor chips on the main surface of the substrate, wherein in the stacking process, the underfill material is caused to protrude from between the substrate and the plurality of semiconductor chips and between the plurality of semiconductor chips, and fillets of the underfill material protruding from between the substrate and the plurality of semiconductor chips and between the plurality of semiconductor chips are connected to the main surface of the substrate and an end face of a stacked chip consisting of the plurality of semiconductor chips.

[11] The method for manufacturing a semiconductor device according to

[10] , further comprising a cutting step of cutting a portion of the fillet.

[12] The method for manufacturing a semiconductor device described in

[11] , wherein in the cutting step, a portion of the fillet is cut so that the fillet is formed into a chip connection portion extending in the stacking direction of the stacked chip and a substrate connection portion extending from the chip connection portion in a substrate direction, which is a direction along the main surface of the substrate.

[13] The method for manufacturing a semiconductor device described in

[12] , wherein in the cutting step, a portion of the fillet is cut so that the surface of the chip connection portion opposite the stacked chip is formed flat.

[14] The method for manufacturing a semiconductor device described in

[12] or

[13] , wherein in the cutting step, a portion of the fillet is cut so that a surface of the substrate connection portion opposite the substrate is formed flat.

[15] The method for manufacturing a semiconductor device according to any one of

[10] to

[14] , further comprising a sealing step of sealing the main surface of the substrate and the stacked chip with a resin. [Explanation of symbols]

[0081] 1...semiconductor device, 2...substrate, 2a...main surface, 2b...electrode, 2c...rear surface, 3A...first stacked chip, 3Aa...end surface, 3B...second stacked chip, 3Ba...end surface, 4A...bump, 4B...bump, 5A...first fixing layer, 5B...second fixing layer, 6A...first fillet, 6B...second fillet, 7...sealing portion, 30A...semiconductor chip, 30Aa...first main surface, 30Ab...second main surface, 30Ac...electrode, 30Ad...electrode, 30B...semiconductor chip, 30Ba...first main surface, 30Bb...second main surface, 30Bc...electrode, 30Bd...electrode, 3 1A...first semiconductor chip, 31B...first semiconductor chip, 32A...second semiconductor chip, 32B...second semiconductor chip, 33A...third semiconductor chip, 33B...third semiconductor chip, 51A...underfill material, 51Aa...fillet, 51B...underfill material, 51Ba...fillet, 61A...first chip connection portion, 61Aa...surface, 61B...second chip connection portion, 61Ba...surface, 62A...first substrate connection portion, 62Aa...surface, 62B...second substrate connection portion, 62Ba...surface, D1...stacking direction, D2...substrate direction.

Claims

1. A substrate; a stacked chip including a plurality of semiconductor chips stacked on a main surface of the substrate; a fixing layer disposed between the main surface of the substrate and the stacked chip and between the semiconductor chips in the stacked chip; a fillet extending from the fixing layer so as to protrude between the main surface of the substrate and the stacked chip and between the semiconductor chips in the stacked chip, the fillet is connected to the main surface of the substrate and an end surface of the laminated chip; Semiconductor device.

2. the fillet has a chip connection portion extending in a stacking direction of the stacked chips, and a substrate connection portion extending from the chip connection portion in a substrate direction that is a direction along the main surface of the substrate, The semiconductor device according to claim 1 .

3. The surface of the chip connection portion opposite to the stacked chip is formed in a flat shape. The semiconductor device according to claim 2 .

4. The surface of the substrate connecting portion opposite to the main surface of the substrate is formed in a flat shape. The semiconductor device according to claim 2 .

5. The maximum thickness of the chip connection portion in the substrate direction is 5 μm or more and 300 μm or less. The semiconductor device according to claim 2 .

6. The maximum thickness of the substrate connection portion in the stacking direction is 5 μm or more and 100 μm or less. The semiconductor device according to claim 2 .

7. a second stacked chip including a plurality of semiconductor chips stacked on the main surface of the substrate; a second fixing layer disposed between the main surface of the substrate and the second stacked chip and between the semiconductor chips in the second stacked chip; a second fillet extending from the second fixing layer so as to protrude between the main surface of the substrate and the second chip stack and between the semiconductor chips in the second chip stack, The second fillet is connected to the fillet. The semiconductor device according to claim 1 .

8. the second fillet has a second chip connection portion extending in a stacking direction of the second stacked chips, and a second substrate connection portion extending from the second chip connection portion in a substrate direction that is a direction along the main surface of the substrate, The second substrate connection portion of the second fillet is connected to the substrate connection portion of the fillet. The semiconductor device according to claim 7.

9. Further comprising a sealing portion that seals the main surface of the substrate and the stacked chip. The semiconductor device according to claim 1 .

10. a lamination step of arranging a film-like underfill material between a main surface of a substrate and a plurality of semiconductor chips and between the plurality of semiconductor chips, and laminating the plurality of semiconductor chips on the main surface of the substrate; In the stacking step, the underfill material is caused to protrude between the substrate and the plurality of semiconductor chips and between the plurality of semiconductor chips, and fillets of the underfill material protruding between the substrate and the plurality of semiconductor chips and between the plurality of semiconductor chips are connected to the main surface of the substrate and end faces of a stacked chip consisting of the plurality of semiconductor chips. A method for manufacturing a semiconductor device.

11. The cutting step further includes cutting a portion of the fillet. The method for manufacturing a semiconductor device according to claim 10.

12. In the cutting step, a part of the fillet is cut so that the fillet is formed into a chip connection portion extending in a stacking direction of the stacked chips and a substrate connection portion extending from the chip connection portion in a substrate direction that is a direction along the main surface of the substrate. The method for manufacturing a semiconductor device according to claim 11 .

13. In the cutting step, a portion of the fillet is cut so that a surface of the chip connection portion opposite to the stacked chips is formed into a flat surface. The method for manufacturing a semiconductor device according to claim 12 .

14. In the cutting step, a part of the fillet is cut so that a surface of the substrate connection portion opposite to the substrate is formed flat. The method for manufacturing a semiconductor device according to claim 12 .

15. The method further includes a sealing step of sealing the main surface of the substrate and the stacked chip with a resin. The method for manufacturing a semiconductor device according to claim 10.

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