Liquid crystal panel and display device

Abstract

To provide a liquid crystal panel in which signal delay is suppressed, and a display device including the liquid crystal panel.SOLUTION: A liquid crystal panel includes a display region and a frame region provided around the display region. The liquid crystal panel includes a first substrate, a second substrate disposed facing the first substrate, and a liquid crystal layer and a plurality of spacers disposed between the first substrate and the second substrate. The first substrate or the second substrate includes a frame wire disposed in the frame region. The first substrate includes a transparent conductive layer and a metal wire extending from the frame wire to the display region and electrically connected to the transparent conductive layer in a region overlapping with the spacers in a planar view.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The following disclosure relates to a liquid crystal panel and a display device. [Background technology]

[0002] Conventionally, an image display panel described in Patent Document 1 is known as an example of a liquid crystal panel. The image display panel described in Patent Document 1 has a configuration in which a partition pattern that partitions the pixels in an image display panel having a large number of pixels arranged therein is composed of a large number of boundary segments that extend between two branch points and define the pixels, the average number N of the boundary segments extending from one branch point is 3.0≦N<4.0, and the pattern includes an area in which there is no direction having a repeating period in the pixel arrangement. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2013-050566 A Summary of the Invention [Problem to be solved by the invention]

[0004] One proposed 3D display method is a display device with two stacked liquid crystal panels, where the left and right eye images are alternately displayed on the rear liquid crystal panel (image display panel), the polarization state of each image is controlled by the liquid crystal panel on the observation side, and the left and right eye images are separated and viewed using polarized glasses. The liquid crystal panel on the observation side functions as a so-called active retarder, so it is also called an active retarder panel. A display device that gives a sense of depth by delivering separate images to the left and right eyes in a time-division manner is also called an active retarder type 3D display device.

[0005] FIG. 9 is a schematic plan view showing the configuration of a conventional active retarder panel. The active retarder panel includes, for example, a liquid crystal layer and a pair of electrodes (a pixel electrode and a common electrode) for applying a voltage to the liquid crystal layer. The pixel electrode and the common electrode are formed of transparent electrodes having a relatively high resistance. The pixel electrode (segment electrode) or the common electrode (COM electrode) included in the active retarder panel 11R shown in FIG. 9 is divided into a size that is, for example, a fraction of the display area 1AA, depending on the number of divisions. Specifically, as shown in FIG. 9, the pixel electrode or the common electrode is divided into a first segment 1S, a second segment 2S, a third segment 3S, and a fourth segment 4S.

[0006] It is possible to arrange the frame wiring 100NL, which is a low-resistance metal wiring, in the frame region 1NA of the active retarder panel 11R. Therefore, in the transparent electrodes (pixel electrodes and common electrodes), signals are promptly supplied from the frame wiring 100NL to the region located near the outer periphery of the display region 1AA. However, in the area far from the frame wiring 100NL (near the center of the display region 1AA), as mentioned above, there is no choice but to input signals via the high-resistance transparent electrodes (pixel electrodes, common electrodes), which is likely to cause delays.

[0007] Furthermore, when the number of divisions of a pixel is three or more, there will inevitably be pixels whose contact points with the outer frame wiring 100NL are limited to two sides. In such cases, the delay will be more noticeable. For example, when the number of divisions of a pixel is four (four-division segments), as shown in FIG. 9, signals are supplied to the first segment 1S and the fourth segment 4S from three sides, but signals are supplied to the second segment 2S and the third segment 3S from only two sides. In the first segment 1S and the fourth segment 4S, even in the center, the frame wiring 100NL is close, so the delay is small, but in the center of the second segment 2S and the third segment 3S, the frame wiring 100NL is far away, so signal input delays are likely to occur.

[0008] Thus, in the active retarder panel 11R, signal delays may occur, such as a delay in the signal input to the pixel electrodes, or a time required for the potential that has fluctuated due to noise occurring in the common electrode to return to the original potential.

[0009] The above-mentioned Patent Document 1 does not disclose a liquid crystal panel in which signal delay is suppressed.

[0010] The present invention has been made in view of the above-mentioned current situation, and has an object to provide a liquid crystal panel in which signal delay is suppressed, and a display device including the liquid crystal panel. [Means for solving the problem]

[0011] (1) One embodiment of the present invention is a liquid crystal panel comprising a display area and a frame area arranged around the display area, a first substrate, a second substrate arranged opposite the first substrate, and a liquid crystal layer and a plurality of spacers arranged between the first substrate and the second substrate, wherein the first substrate or the second substrate has frame wiring arranged in the frame area, and the first substrate has a transparent conductive layer, and metal wiring extending from the frame wiring toward the display area and electrically connected to the transparent conductive layer in a region overlapping with the plurality of spacers in a planar view.

[0012] (2) Furthermore, in one embodiment of the present invention, in addition to the configuration of (1) above, the first substrate or the second substrate is provided with a plurality of light-shielding portions that overlap with the plurality of spacers in a planar view and are arranged on the observation surface side of the plurality of spacers and the metal wiring, and the metal wiring is electrically connected to the transparent conductive layer in the area that overlaps with the plurality of spacers and the plurality of light-shielding portions in a planar view.

[0013] (3) Furthermore, one embodiment of the present invention is a liquid crystal panel having the configuration of (1) or (2) above, wherein the transparent conductive layer is divided into three or more segments along one direction of the liquid crystal panel.

[0014] (4) Furthermore, one embodiment of the present invention is a liquid crystal panel, in addition to the configuration of (1), (2), or (3) above, in which the metal wiring is arranged in a mesh pattern in a planar view, with the areas overlapping with the plurality of spacers as end points.

[0015] (5) Furthermore, one embodiment of the present invention is a liquid crystal panel, in which, in addition to the configuration of (1), (2), (3) or (4) above, the metal wiring is arranged in a mesh pattern in a planar view, with all of the areas that overlap with the plurality of spacers as end points.

[0016] (6) Furthermore, one embodiment of the present invention is a liquid crystal panel, in which, in addition to the configuration of (1), (2), (3) or (4) above, the metal wiring is arranged in a mesh pattern in a planar view, with a portion of the area overlapping with the plurality of spacers as its end point.

[0017] (7) Furthermore, one embodiment of the present invention provides a liquid crystal panel having the configuration of (1), (2), or (3) above, in which the metal wiring extends in only one direction from an end point that overlaps with the plurality of spacers in a planar view.

[0018] (8) Furthermore, in one embodiment of the present invention, in addition to the configuration of (1) or (7), the transparent conductive layer is divided into three or more segments along a first direction of the liquid crystal panel, and the metal wiring extends, in a planar view, along a second direction perpendicular to the first direction, with an end point being an area overlapping with the plurality of spacers, and does not extend in the first direction.

[0019] (9) Moreover, in accordance with another embodiment of the present invention, in addition to the configuration of (8), the angle between the metal wiring and the second direction is 45° or less.

[0020] (10) Furthermore, in one embodiment of the present invention, in addition to the configuration of (1), (2), (3), (4), (5), (6), (7), (8) or (9), the liquid crystal panel is configured such that the plurality of spacers are randomly arranged.

[0021] (11) Another embodiment of the present invention is a display device comprising a liquid crystal panel as described in any one of (1), (2), (3), (4), (5), (6), (7), (8), (9) and (10), an image display panel arranged on the rear side of the liquid crystal panel, and a backlight arranged on the rear side of the image display panel. Effect of the Invention

[0022] According to the present invention, it is possible to provide a liquid crystal panel in which signal delay is suppressed, and a display device including the liquid crystal panel. [Brief description of the drawings]

[0023] [Figure 1] 1 is a schematic cross-sectional view of a display device according to a first embodiment. [Diagram 2] 1 is a schematic plan view of a liquid crystal panel according to Embodiment 1. FIG. [Diagram 3] 1 is an equivalent circuit diagram of a liquid crystal panel according to Embodiment 1. FIG. [Figure 4] 3 is an enlarged schematic plan view of the area surrounded by the dashed line in FIG. 2. [Diagram 5] 3 is an enlarged schematic plan view of the area surrounded by the dashed line in FIG. 2. [Figure 6] FIG. 6 is a schematic cross-sectional view taken along line A1-A2 in FIG. [Figure 7] 1 is an enlarged schematic plan view of a liquid crystal panel according to Modification 1 of Embodiment 1. FIG. [Figure 8] 11 is an enlarged schematic plan view of a liquid crystal panel according to Modification 2 of Embodiment 1. FIG. [Figure 9] FIG. 1 is a schematic plan view showing the configuration of a conventional active retarder panel. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] Hereinafter, an embodiment of the present invention will be described. The present invention is not limited to the contents described in the following embodiment, and appropriate design changes can be made within the scope of the configuration of the present invention. In the following description, the same reference numerals are appropriately used in common between different drawings for the same parts or parts having similar functions, and repeated explanations thereof will be omitted as appropriate. Each aspect of the present invention may be appropriately combined within the scope of the gist of the present invention.

[0025] In this specification, the "observation side" means the side closer to the screen (display surface) of the liquid crystal display device, and the "rear side" means the side farther from the screen (display surface) of the liquid crystal display device.

[0026] (Embodiment 1) Fig. 1 is a schematic cross-sectional view of a display device according to embodiment 1. Embodiment 1 will be described with reference to Figs. 1 to 6. In this embodiment, a display device 10 is illustrated. Note that an X-axis, a Y-axis, and a Z-axis are shown in a portion of each drawing, and each axis direction is drawn to be the direction shown in each drawing.

[0027] The display device 10 according to this embodiment is a type of 3D image display device that allows a user to view a 3D image (stereoscopic image), and employs an active retarder system. As shown in FIG. 1, the display device 10 includes a liquid crystal panel 11, an image display panel 12 disposed on the rear side of the liquid crystal panel 11, and a backlight 13 disposed on the rear side of the image display panel 12.

[0028] The image display panel 12 has a function of displaying an image.

[0029] The backlight 13 is an external light source that irradiates light to be used for display on the image display panel 12. The backlight 13 has a light source (e.g., an LED) that emits white light, an optical member that applies an optical effect to the light from the light source to convert it into planar light, and the like.

[0030] The liquid crystal panel 11 functions as a modulator for converting linearly polarized light emitted from the image display panel 12 into circularly polarized light. More specifically, the liquid crystal panel 11 can switch between right-handed and left-handed circularly polarized light in synchronization with the image display panel 12, which alternately displays images for the right eye and images for the left eye. In other words, the liquid crystal panel 11 functions as an active retarder panel.

[0031] The display device 10 of this embodiment is used in combination with circularly polarized glasses having a circularly polarized film with opposite rotation directions on the left and right. A user can view a 3D image by looking at the display device 10 while wearing the circularly polarized glasses. As described above, the liquid crystal panel 11 is driven at high speed in synchronization with the display of the image display panel 12, and therefore it is required to suppress signal delay in the liquid crystal panel 11.

[0032] Fig. 2 is a plan view schematic diagram of the liquid crystal panel according to embodiment 1. Fig. 3 is an equivalent circuit diagram of the liquid crystal panel according to embodiment 1. Fig. 4 is an enlarged plan view schematic diagram of the region surrounded by the dashed line in Fig. 2. Fig. 5 is an enlarged plan view schematic diagram of the region surrounded by the dashed line in Fig. 2. Fig. 6 is a cross-sectional view schematic diagram along the A1-A2 line in Fig. 5.

[0033] As shown in FIG. 2 to FIG. 6, the liquid crystal panel 11 of the present embodiment includes a display area 1AA and a frame area 1NA provided around the display area 1AA, and includes a first substrate 100, a second substrate 200 disposed opposite the first substrate 100, and a liquid crystal layer 300 and a plurality of spacers 400 disposed between the first substrate 100 and the second substrate 200. The first substrate 100 or the second substrate 200 includes a frame wiring 100NL disposed in the frame area 1NA. The first substrate 100 includes a first transparent conductive layer 130 as the transparent conductive layer, and a metal wiring 100M extending from the frame wiring 100NL toward the display area 1AA and electrically connected to the first transparent conductive layer 130 in a region overlapping the plurality of spacers 400 in a plan view. In this way, by providing metal wiring 100M electrically connected to the first transparent conductive layer 130 and the frame wiring 100NL, the effective surface resistance of the first transparent conductive layer 130 is reduced, making it possible to suppress signal delay.

[0034] The liquid crystal panel 11 of this embodiment will be described in detail with reference to FIG. 3. If the metal wiring 100M is not arranged, the frame region 1NA has the low-resistance frame wiring 100NL, but the display region 1AA has only the first transparent conductive layer 130, which is a high-resistance transparent electrode. In the first segment 1S and the fourth segment 4S shown in FIG. 3, the low-resistance frame wiring 100NL is present on the upper and lower sides, so signals can be easily supplied to the left and right center. However, the second segment 2S and the third segment 3S do not have upper and lower sides, so the signal input path is only a high-resistance path (the first transparent conductive layer 130), and the signal is easily delayed. Therefore, in the liquid crystal panel 11 of this embodiment, as shown by the dashed line in FIG. 3, the metal wiring 100M, which is a low-resistance signal propagation path, is provided in parallel, so that the combined resistance can be reduced. Hereinafter, the display device 10 of this embodiment will be described in detail.

[0035] As shown in Fig. 2, the liquid crystal panel 11 of this embodiment includes a display area 1AA and a frame area 1NA provided around the display area 1AA. The display area 1AA may be any area in which the phase difference can be controlled. The display area 1AA is an area in which pixel electrodes, which will be described later, are arranged. In the display area 1AA, the phase difference of the liquid crystal layer 300 is controlled by changing the alignment state of the liquid crystal molecules depending on the magnitude of the voltage applied to the liquid crystal layer 300.

[0036] 6, the liquid crystal panel 11 of the present embodiment includes a first substrate 100, a second substrate 200 disposed opposite the first substrate 100, and a liquid crystal layer 300 and a plurality of spacers 400 sandwiched between the first substrate 100 and the second substrate 200. In the present embodiment, an example will be described in which the first substrate 100, the liquid crystal layer 300 and the plurality of spacers 400, and the second substrate 200 are disposed in this order from the rear surface side toward the observation surface side, but the second substrate 200, the liquid crystal layer 300 and the plurality of spacers 400, and the first substrate 100 may be disposed in this order from the rear surface side toward the observation surface side.

[0037] As shown in FIG. 2 and FIG. 4, the first substrate 100 or the second substrate 200 has a frame wiring 100NL arranged in the frame region 1NA. The frame wiring 100NL may have conductivity. The frame wiring 100NL is electrically connected to the metal wiring 100M in the frame region 1NA. The frame wiring 100NL is a main wiring of the metal wiring 100M. The frame wiring 100NL is, for example, a source line, a gate line, a segment signal line, or a common signal line. The segment signal line is, for example, a wiring electrically connected to a pixel electrode for supplying a segment signal to the segment electrode. The common signal line is, for example, a wiring electrically connected to a common electrode for supplying a common signal to the common electrode.

[0038] The frame wiring 100NL is preferably disposed on the first substrate 100. By adopting such an embodiment, the frame wiring 100NL and the metal wiring 100M can be easily connected.

[0039] The frame wiring 100NL includes, for example, a metal such as copper, titanium, aluminum, molybdenum, tungsten, or an alloy thereof. The metal wiring 100M can be formed by forming a single layer or multiple layers of a metal such as copper, titanium, aluminum, molybdenum, tungsten, or an alloy thereof by a sputtering method or the like, and then patterning the resulting film by a photolithography method or the like.

[0040] The resistivity of the frame wiring 100NL is 1.0×10 -6 Ω cm or more, 3.0×10 -4 It is preferable that the resistance is Ω·cm or less, and 1.0×10 -6 Ω cm or more, 3.0×10 -5 It is more preferable that the resistance is 1.0×10 -6 Ω cm or more, 3.0×10 -6 It is more preferable that the resistance is Ω·cm or less. By adopting such an embodiment, it is possible to effectively reduce signal delay.

[0041] It is preferable that the frame wiring 100NL has a higher resistance than the metal wiring 100M. By adopting such an embodiment, it is possible to effectively reduce signal delay.

[0042] As shown in FIG. 6, the first substrate 100 includes, in order toward the liquid crystal layer 300 side, a first support substrate 110, a metal wiring 100M, a first insulating layer 120, and a first transparent conductive layer 130. The second substrate 200 includes, in order toward the liquid crystal layer 300 side, a second support substrate 210, a plurality of light-shielding portions 200S, a second insulating layer 220, and a second transparent conductive layer 230. In this specification, "transparent" means that the total light transmittance is 90% or more and 100% or less. Preferably, the total light transmittance is 95% or more and 100% or less, and more preferably, the total light transmittance is 98% or more and 100% or less. The total light transmittance is determined according to JIS K7361-1.

[0043] One of the first transparent conductive layer 130 and the second transparent conductive layer 230 is a pixel electrode, and the other is a common electrode. The liquid crystal panel 11 of this embodiment is a vertical electric field type liquid crystal panel in which one of the first substrate 100 and the second substrate 200 has a pixel electrode and the other has a common electrode, and a vertical electric field is applied to the liquid crystal layer 300 sandwiched between the pixel electrode and the common electrode to perform display. An example of the vertical electric field type is vertical alignment (VA), in which liquid crystal molecules in the liquid crystal layer are aligned vertically to the substrate surface when no voltage is applied.

[0044] In this embodiment, the second transparent conductive layer 230 is disposed on the second substrate 200, but the second transparent conductive layer 230 may be disposed on the first substrate 100. In this case, the liquid crystal panel 11 is a liquid crystal panel of a lateral electric field type that performs display by applying a lateral electric field to the liquid crystal layer 300. Examples of the lateral electric field type include a FFS (Fringe Field Switching) mode and an IPS (In Plane Switching) mode in which liquid crystal molecules in the liquid crystal layer are aligned parallel to the substrate surface when no voltage is applied.

[0045] In the display area 1AA, the first substrate 100 or the second substrate 200 includes, on a support substrate (first support substrate 110 or second support substrate 210), for example, a plurality of gate lines extending parallel to each other, and a plurality of source lines extending parallel to each other in a direction intersecting with each gate line via an insulating film. The plurality of gate lines and the plurality of source lines are formed in a lattice shape as a whole so as to partition each pixel. For example, a thin film transistor (TFT) is arranged as a switching element at the intersection of each source line and each gate line.

[0046] The pixel electrodes are electrodes arranged in each region surrounded by, for example, two adjacent source lines and two adjacent gate lines. For example, the pixel electrodes are set to a potential corresponding to a data signal supplied via a corresponding TFT. The common electrode is an electrode formed on almost the entire surface, regardless of the pixel boundary, except for specific parts such as the connection between the pixel electrode and the drain electrode. A common signal maintained at a constant value is supplied to the common electrode, and the common electrode is maintained at a constant potential.

[0047] Between the first substrate 100 and the liquid crystal layer 300, and between the second substrate 200 and the liquid crystal layer 300, an alignment film having the function of controlling the alignment of the liquid crystal molecules contained in the liquid crystal layer 300 is disposed. In a no-voltage state in which no voltage is applied between the pixel electrodes and the common electrode, the liquid crystal molecules contained in the liquid crystal layer 300 are aligned approximately perpendicular to the respective principal surfaces of the pair of substrates.

[0048] For example, the liquid crystal panel 11 further includes a source driver electrically connected to the source lines, a gate driver electrically connected to the gate lines, and a controller. The gate driver sequentially supplies scanning signals to the gate lines under the control of the controller. The source driver supplies data signals to the source lines under the control of the controller at the timing when the TFTs are in a voltage applied state by the scanning signal. Each pixel electrode is set to a potential according to the data signal supplied via the corresponding TFT, and a vertical electric field is generated between the pixel electrode and the common electrode, thereby controlling the orientation of the liquid crystal molecules in the liquid crystal layer. In the liquid crystal panel 11, the light transmittance of the liquid crystal layer 300 is adjusted by changing the orientation state of the liquid crystal molecules in each pixel (the first segment 1S, the second segment 2S, the third segment 3S, and the fourth segment 4S) depending on the magnitude of the voltage applied to the liquid crystal layer 300.

[0049] The liquid crystal panel 11 according to the present embodiment may not include gate lines, source lines, TFTs as switching elements, source drivers, gate drivers, and controllers, but may include segment signal lines and common signal lines instead. In this case, a segment signal is supplied to the pixel electrodes from a driving circuit outside the panel through the segment signal lines, and the pixel electrodes are set to a potential corresponding to the segment signal. Similarly, a common signal is supplied to the common electrode from a driving circuit outside the panel through the common signal line, and the common electrode is set to a potential corresponding to the common signal. This generates a vertical electric field between the pixel electrodes and the common electrode, and the orientation of the liquid crystal molecules in the liquid crystal layer is controlled. In the liquid crystal panel 11, the orientation state of the liquid crystal molecules is changed depending on the magnitude of the voltage applied to the liquid crystal layer 300 in each pixel (the first segment 1S, the second segment 2S, the third segment 3S, and the fourth segment 4S), thereby adjusting the polarization state of light passing through the liquid crystal layer 300.

[0050] Examples of the first support substrate 110 and the second support substrate 210 include insulating substrates such as glass substrates and plastic substrates. Examples of materials for the glass substrate include glass such as float glass and soda glass. Examples of materials for the plastic substrate include plastics such as polyethylene terephthalate, polybutylene terephthalate, polyethersulfone, polycarbonate, and alicyclic polyolefin.

[0051] The metal wiring 100M extends from the frame wiring 100NL toward the display area 1AA, and is electrically connected to the first transparent conductive layer 130 in a region where it overlaps with the spacers 400 in a plan view. This configuration makes it possible to use the metal wiring 100M in addition to the frame wiring 100NL as a wiring for inputting a signal to the first transparent conductive layer 130, thereby reducing the effective surface resistance of the first transparent conductive layer 130 and suppressing signal delay. The metal wiring 100M is electrically connected to the frame wiring 100NL.

[0052] The liquid crystal panel 11 of the present embodiment has, for example, low-resistance metal wiring 100M that sandwiches the first insulating layer 120 and contacts the first transparent conductive layer 130 through a contact hole 120CH. This can reduce the effective resistance value of the first transparent conductive layer 130 and reduce signal delay.

[0053] It is preferable that the first transparent conductive layer 130 has a higher resistance than the metal wiring 100M. By adopting such an embodiment, it is possible to effectively reduce signal delay.

[0054] The resistivity of 100M of metal wiring is 1.0×10 -6 Ω cm or more, 3.0×10 -4 It is preferable that the resistance is Ω·cm or less, and 1.0×10 -6 Ω cm or more, 3.0×10 -5 It is more preferable that the resistance is 1.0×10 -6 Ω cm or more, 3.0×10 -6 It is more preferable that the resistance is Ω·cm or less. By adopting such an embodiment, it is possible to effectively reduce signal delay.

[0055] The metal wiring 100M is preferably provided in a mesh shape with the regions overlapping with the spacers 400 as end points 100MS in a plan view. By adopting such an embodiment, it is possible to effectively suppress signal delay. The mesh shape refers to a structure in which the metal wiring 100M branches in three or more directions from each end point 100MS. The metal wiring 100M preferably has a structure in which the metal wiring 100M branches in three or more directions and seven or less directions from each end point 100MS, and more preferably has a structure in which the metal wiring 100M branches in four or more directions and six or less directions. The metal wiring 100M is more preferably provided in a mesh shape with all of the regions overlapping with the spacers 400 as end points 100MS in a plan view. The number of branches can be set independently for each end point 100MS. The number of branches may be the same for all end points 100MS, or the number of branches at at least some end points 100MS may be different from the number of branches at other end points.

[0056] It is more preferable that the metal wiring 100M is provided in a mesh shape with end points 100MS at regions overlapping both the spacers 400 and the light-shielding portions 200S described later in a plan view. By adopting such an embodiment, it is possible to effectively suppress signal delay and improve display performance. It is more preferable that the metal wiring 100M is provided in a mesh shape with end points 100MS at all regions overlapping both the spacers 400 and the light-shielding portions 200S in a plan view.

[0057] When the first transparent conductive layer 130 is a pixel electrode, the metal wiring 100M has a function of supplying an image signal to the first transparent conductive layer 130. When the first transparent conductive layer 130 is a common electrode, the metal wiring 100M has a function of supplying a common signal to the first transparent conductive layer 130.

[0058] The metal wiring 100M includes, for example, a metal such as copper, titanium, aluminum, molybdenum, tungsten, or an alloy thereof. The metal wiring 100M can be formed by forming a single layer or multiple layers of a metal such as copper, titanium, aluminum, molybdenum, tungsten, or an alloy thereof by a sputtering method or the like, and then patterning the resulting film by a photolithography method or the like.

[0059] The width of the metal wiring 100M depends on the image size and the required driving speed, but is preferably, for example, 2 μm or more and 10 μm or less.

[0060] The first insulating layer 120 and the second insulating layer 220 can be made of an inorganic insulating film, an organic insulating film, or a laminate of the organic insulating film and the inorganic insulating film. The inorganic insulating film can be, for example, an inorganic film (relative dielectric constant ε=5 to 7) such as silicon nitride (SiNx) or silicon oxide (SiO2), or a laminate film thereof. The organic insulating film can be, for example, an organic film (relative dielectric constant ε=2 to 5) with a small relative dielectric constant such as a photosensitive acrylic resin, or a laminate film thereof.

[0061] The first insulating layer 120 is disposed on the liquid crystal layer 300 side of the metal wiring 100M. This configuration makes it possible to flatten the surface of the first substrate 100 on the liquid crystal layer 300 side. When arranging wiring (for example, the metal wiring 100M of this embodiment) in the display area 1AA, the thickness of the wiring may affect the cell thickness. In this embodiment, the metal wiring 100M is covered with the first insulating layer 120 having a flattening effect, and the first transparent conductive layer 130 is provided on the first insulating layer 120, so that the surface of the first substrate 100 on the liquid crystal layer 300 side can be flattened.

[0062] The first insulating layer 120 has contact holes 120CH in a region overlapping the plurality of spacers 400 in a plan view. By adopting such an embodiment, the first transparent conductive layer 130 and the metal wiring 100M can be electrically connected to each other in the region overlapping the plurality of spacers 400.

[0063] At least one of the first transparent conductive layer 130 and the second transparent conductive layer 230 is a transparent electrode. The first transparent conductive layer 130 and the second transparent conductive layer 230 include, for example, indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), tin oxide (SnO), etc. The first transparent conductive layer 130 and the second transparent conductive layer 230 can be formed by forming a single layer or multiple layers of a transparent conductive material such as ITO, IZO, ZnO, SnO, or an alloy thereof by a sputtering method or the like, and then patterning the layer using a photolithography method.

[0064] The liquid crystal layer 300 contains a liquid crystal material, and when a voltage is applied to the liquid crystal layer 300, the orientation state of the liquid crystal molecules in the liquid crystal material changes in response to the applied voltage, thereby controlling the amount of light transmission.

[0065] The liquid crystal molecules may have a positive or negative dielectric anisotropy (Δε) defined by the following formula (L). Liquid crystal molecules having a positive dielectric anisotropy are also called positive type liquid crystals, and liquid crystal molecules having a negative dielectric anisotropy are also called negative type liquid crystals. The long axis direction of the liquid crystal molecules is the direction of the slow axis. The liquid crystal molecules are homogeneously aligned when no voltage is applied (no voltage applied state), and the direction of the long axis of the liquid crystal molecules in the no voltage applied state is also called the direction of the initial alignment of the liquid crystal molecules. Δε = (dielectric constant in the long axis direction of the liquid crystal molecules) - (dielectric constant in the short axis direction of the liquid crystal molecules) (L)

[0066] The spacers 400 have a function of ensuring a gap in the space in which the liquid crystal layer 300 is formed. That is, the spacers 400 have a function of maintaining the cell thickness (the thickness of the liquid crystal layer 300). Each spacer 400 has, for example, a columnar shape. The planar shape of each spacer 400 may be, for example, a polygonal shape, a circular shape, or an elliptical shape. The spacers are also called photospacers, or PS.

[0067] Each spacer 400 preferably includes, for example, a cured product of a photosensitive resin. As the photosensitive resin, for example, a resin having an ultraviolet-reactive functional group can be given.

[0068] In addition, the plurality of spacers 400 included in the liquid crystal panel 11 are preferably disposed at a position where moiré is unlikely to occur between the spacers 400 and the light-shielding pattern of the image display panel 12 disposed on the rear side. By adopting such an embodiment, moiré caused by the arrangement of the metal wiring 100M can be reduced. If the plurality of spacers 400 are configured to be unlikely to cause moiré between the spacers 400 and the light-shielding pattern of the image display panel 12, it is considered that the metal wiring 100M, which is the wiring connecting the patterns of the plurality of spacers 400, also has the effect of being unlikely to cause moiré. Note that the light-shielding pattern of the image display panel 12 is a light-shielding member that overlaps with the plurality of spacers of the image display panel 12 in a plan view and is disposed on the observation surface side of the plurality of spacers of the image display panel 12.

[0069] The spacers 400 are preferably arranged, for example, randomly. Here, the term "randomly arranging the spacers 400" means that the spacers 400 are arranged without periodicity in at least a part of the liquid crystal panel 11 in a plan view. The spacers 400 may have a repeating period and be arranged randomly within the repeating period.

[0070] For reasons of manufacturing and operation, it is difficult to arrange the above-mentioned multiple components randomly (without any periodicity) in the entire area of ​​the liquid crystal panel 11 in a plan view. For example, when using stepper exposure, periodicity may occur. In this embodiment, a certain degree of periodicity is allowed, and if the above-mentioned multiple components are arranged randomly within the period, this corresponds to a random arrangement.

[0071] The spacers 400 have a repeating period and are randomly arranged within the repeating period, the light shielding portions 200S have a repeating period and are randomly arranged within the repeating period, and it is preferable that the repeating period of the arrangement of the spacers 400 is larger than the repeating period of the arrangement of the light shielding portions 200S and is a non-integer multiple of the repeating period of the arrangement of the light shielding portions 200S. By adopting such an embodiment, it is possible to suppress interference occurring between the spacers 400 and the light shielding portions 200S, and moire can be suppressed.

[0072] Here, the repetition period of the arrangement of the plurality of spacers 400 and the repetition period of the arrangement of the plurality of light shielding parts 200S are determined by the constraints of the manufacturing device and the constraints for carrying out a realistic design work. Based on the constraints of the manufacturing device and the constraints for carrying out a realistic design work, it is more preferable that the repetition period of the arrangement of the plurality of spacers 400 is set as large as possible than the repetition period of the arrangement of the plurality of light shielding parts 200S. By adopting such an embodiment, it is possible to further suppress interference occurring between the plurality of spacers 400 and the plurality of light shielding parts 200S, and it is possible to further suppress moire.

[0073] Although the random arrangement has been exemplified in this embodiment, other arrangements may be used as long as they can avoid moire.

[0074] The first substrate 100 or the second substrate 200 includes a plurality of light-shielding portions 200S that overlap with the spacers 400 in a plan view and are disposed closer to the observation surface than the spacers 400 and the metal wiring 100M, and the metal wiring 100M is preferably electrically connected to the transparent conductive layer 130 in a region where the metal wiring 100M overlaps with the spacers 400 and the light-shielding portions 200S in a plan view. By adopting such an embodiment, it is possible to suppress signal delay and to make the disturbance of the liquid crystal alignment less visible, thereby improving the display performance. The light-shielding portions 200S are light-shielding patterns that shield the spacers 400. In this embodiment, the end points of the metal wiring 100M are aligned with the light-shielding patterns.

[0075] The first insulating layer 120 has contact holes 120CH in a region overlapping with the light shielding portions 200S in a plan view (i.e., a region overlapping with both the spacers 400 and the light shielding portions 200S). By adopting such an embodiment, the first transparent conductive layer 130 and the metal wiring 100M can be electrically connected in the region overlapping with the light shielding portions 200S (i.e., a region overlapping with both the spacers 400 and the light shielding portions 200S).

[0076] In this manner, the contact hole 120CH in this embodiment is disposed directly below the multiple light-shielding portions 200S. Since the step of the contact hole 120CH can cause the alignment of the liquid crystal to become disturbed, by disposing the contact hole 120CH directly below the multiple light-shielding portions 200S, it is possible to suppress a decrease in display quality.

[0077] The hole structure of the contact hole 120CH connecting the first transparent conductive layer 130 and the metal wiring 100M causes the liquid crystal alignment to be disturbed, so it is preferable to block the light. The metal wiring 100M of this embodiment is preferably arranged so that the end points are the multiple light-shielding parts 200S as a light-shielding pattern that blocks the multiple spacers 400 of the liquid crystal panel 11, and is preferably electrically connected to the first transparent conductive layer 130 at a position overlapping the multiple light-shielding parts 200S. By adopting such an embodiment, the liquid crystal alignment disturbance caused by the contact hole 120CH becomes less visible, and the display performance can be improved.

[0078] 6 shows an embodiment in which the first substrate 100 is disposed on the rear surface side, the second substrate 200 is disposed on the observation surface side, and the second substrate 200 includes a plurality of light-shielding portions 200S, but the arrangement of the plurality of light-shielding portions 200S is not limited thereto. When the first substrate 100 is disposed on the observation surface side and the second substrate 200 is disposed on the rear surface side, for example, the first substrate 100 includes a plurality of light-shielding portions 200S. Specifically, the plurality of light-shielding portions 200S are disposed on the observation surface side of the metal wiring 100M in the first substrate 100.

[0079] Like the plurality of spacers 400, the plurality of light-shielding portions 200S of the liquid crystal panel 11 are preferably disposed at positions that are unlikely to cause moiré with the light-shielding pattern of the image display panel 12 disposed on the rear side. By adopting such an embodiment, it is possible to reduce moiré caused by the arrangement of the metal wiring 100M. If the plurality of light-shielding portions 200S are configured to be unlikely to cause moiré with the light-shielding pattern of the image display panel 12, it is considered that the metal wiring 100M, which is wiring connecting the patterns of the plurality of light-shielding portions 200S, also has the effect of being unlikely to cause moiré.

[0080] The light blocking portions 200S are preferably arranged, for example, randomly. Although the random arrangement is exemplified in the present embodiment, other arrangements may be used as long as they can avoid moire.

[0081] Thus, the liquid crystal panel 11 of this embodiment includes a plurality of spacers 400 and a plurality of light-shielding portions 200S which are light-shielding patterns thereof. The liquid crystal panel 11 further includes metal wiring 100M which is disposed under a solid transparent electrode (first transparent conductive layer 130 in this embodiment) with the first insulating layer 120 sandwiched therebetween and is electrically connected to the first transparent conductive layer 130 via a contact hole 120CH provided in the first insulating layer 120. The metal wiring 100M is wired so that at least a portion of the light-shielding portions 200S which are the light-shielding patterns of the plurality of spacers 400 serves as an end point, and the contact between the metal wiring 100M and the first transparent conductive layer 130 is disposed so as to overlap the light-shielding portions 200S.

[0082] Here, moire may occur between the periodicity of the pixel structure in a display (liquid crystal, plasma, electroluminescence) and the periodicity of the optical film to be laminated. Moire can be avoided by randomly arranging the pixel structure itself, but completely randomizing it causes uneven brightness in the image. In response to this, the above-mentioned Patent Document 1 discloses a technology that avoids moire and uneven brightness in the image at the same time by randomly arranging the pixels on the image display panel side so as to have a certain rule. Thus, Patent Document 1 discloses a method of random wiring. However, the technology of Patent Document 1 is limited to the image display panel, and does not disclose an active retarder panel. Furthermore, Patent Document 1 does not specify the positional relationship between the spacer and the metal wiring, and the positional relationship between the light shielding pattern that shields the spacer and the metal wiring.

[0083] The first transparent conductive layer 130 is divided into three or more segments along one direction of the liquid crystal panel 11. By adopting such an embodiment, in the first transparent conductive layer 130, there are generated segments (the second segment S2 and the third segment S3 in FIG. 2) that have fewer connection sides with the frame region 1NA than the other segments. When a signal is input to the first transparent conductive layer 130 from a signal line (frame wiring 100NL) arranged in the frame region 1NA, a signal delay may occur in a segment that has fewer connection sides with the frame region 1NA. However, since the liquid crystal panel 11 of the present embodiment includes the metal wiring 100M, it is possible to input a signal through the metal wiring 100M even to a segment that has fewer connection sides with the frame region 1NA, and the signal delay can be effectively suppressed. Thus, the liquid crystal panel 11 of the present embodiment is particularly suitable when there is a pixel in which the number of connection sides between the signal line in the frame region 1NA and the first transparent conductive layer 130 is reduced due to the division of the first transparent conductive layer 130.

[0084] Next, a description will be given of the image display panel 12. The image display panel 12 preferably includes a plurality of pixels. The pixel is a display unit for displaying an image, and in the case of color display, the pixel includes, for example, red, blue, and green pixels.

[0085] The image display panel 12 may have a TFT substrate on which a plurality of TFTs are arranged. The TFT substrate may include a plurality of gate lines extending parallel to each other on a support substrate, and a plurality of source lines extending parallel to each other in a direction intersecting the gate lines via a gate insulating film. The gate lines and source lines may be formed in a lattice pattern in a plan view, and each region partitioned by the gate lines and the source lines corresponds to a pixel.

[0086] The supporting substrate is preferably a transparent substrate, and examples thereof include a glass substrate and a plastic substrate.

[0087] At the intersections of each gate line and each source line, a TFT may be disposed as a switching element for each pixel. The gate terminal of the TFT may be connected to the gate line, the source terminal may be connected to the source line, and the drain terminal may be connected to the pixel electrode. The image display panel 12 may have a common electrode to which a common electrode voltage is applied, in addition to the pixel electrodes.

[0088] The image display panel 12 may be a liquid crystal display panel, an OLED panel including an organic light emitting diode (OLED), or a QD-LED panel including a quantum dot light emitting diode (QD-LED). In this specification, when there is no particular distinction between OLED and QD-LED, they are also referred to as light emitting diodes (LEDs).

[0089] When the image display panel 12 is a liquid crystal display panel, the image display panel 12 includes a TFT substrate, a counter substrate disposed opposite the TFT substrate, and a liquid crystal layer disposed between the TFT substrate and the counter substrate. A color filter layer is disposed on the TFT substrate or the counter substrate.

[0090] When the image display panel 12 is an OLED panel or a QD-LED panel, the configuration of the light-emitting diode is not particularly limited, and may be, for example, a cathode, an electron transport layer, a light-emitting layer, a hole transport layer, and an anode stacked in this order.

[0091] The material for the cathode and anode is not particularly limited, but examples thereof include transparent conductive materials such as ITO (indium tin oxide), IZO (indium zinc oxide), In3O3, SnO2, and ZnO, aluminum, silver, and alloys thereof.

[0092] In the case of a top-emission type LED, the pixel electrode of the TFT substrate may be used as an anode, and the common electrode may be used as a cathode. A reflective electrode such as aluminum, silver, or an alloy thereof may be used as the anode, and the transparent conductive material may be used as the cathode.

[0093] The hole transport layer is a layer that transports holes injected from the anode to the light emitting layer. The material of the hole transport layer is not particularly limited, but examples thereof include amine compounds such as N,N,N',N'-tetraphenylbenzidine and its derivatives.

[0094] The electron transport layer is a layer that transports electrons injected from the cathode to the light emitting layer. The material of the electron transport layer is not particularly limited, and examples thereof include phenanthroline derivatives such as 2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline (BCP), quinoline derivatives such as tris(8-quinolinolato)aluminum (Alq3), azaindolizine derivatives, oxadiazole derivatives, perylene derivatives, pyridine derivatives, pyrimidine derivatives, quinoxaline derivatives, diphenylquinone derivatives, and nitro-substituted fluorene derivatives.

[0095] An electron injection layer may be provided between the cathode and the electron transport layer. Also, a hole injection layer may be provided between the anode and the hole transport layer. As the material for the electron injection layer, an inorganic insulating material may be used, and examples thereof include an oxide or halide of an alkali metal, and an oxide or halide of an alkaline earth metal.

[0096] When the image display panel 12 is an OLED, the light-emitting layer may include a fluorescent material, a phosphorescent material, etc. as a light-emitting material.

[0097] When the image display panel 12 is a QD-LED panel, the light-emitting layer may contain quantum dots as a light-emitting material. Quantum dots are nanoscale (for example, with an average particle size of 2 to 10 nm) semiconductor crystals that have optical properties according to quantum mechanics, and examples of such quantum dots include colloidal particles composed of about 10 to 50 atoms.

[0098] (Modification 1 of the first embodiment) FIG. 7 is an enlarged schematic plan view of a liquid crystal panel according to Modification 1 of Embodiment 1. FIG. 7 is an enlarged schematic plan view of a display area 1AA. In the above-mentioned embodiment 1, the metal wiring 100M is provided in a mesh shape with all of the areas overlapping with the spacers 400 (more specifically, both the spacers 400 and the light shielding parts 200S) as end points 100MS. However, the metal wiring 100M provided in the liquid crystal panel 11 of this modification is provided in a mesh shape with some of the areas overlapping with the spacers 400 (more specifically, both the spacers 400 and the light shielding parts 200S) as end points 100MS in a plan view, as shown in FIG. 7. By adopting such a configuration, it is possible to suppress a decrease in transmittance and suppress signal delay even when the density of the spacers 400 is high.

[0099] The metal wiring 100M is preferably arranged in a mesh shape with end points 100MS at 1% or more and 50% or less of the total number of areas overlapping with the plurality of spacers 400 (more specifically, both the plurality of spacers 400 and the plurality of light-shielding portions 200S), more preferably arranged in a mesh shape with end points 100MS at 1% or more and 30% or less, and even more preferably arranged in a mesh shape with end points 100MS at 1% or more and 10% or less. The liquid crystal panel 11 of this modified example is preferably used when the density of the plurality of spacers 400 is high.

[0100] In the liquid crystal panel 11 of this modification, the metal wiring 100M is arranged for a part of the pattern (light shielding pattern) of the plurality of light shielding portions 200S. Which light shielding pattern is to be used as the end point 100MS for arranging the metal wiring 100M is determined, for example, by the following procedure.

[0101] 1. The degree of aperture ratio reduction permitted by the specifications of the liquid crystal panel 11 and the necessary degree of signal delay are estimated, and the number of 100 MS end points per unit area is determined. 2. Select the number of light blocking patterns determined in the above step 1 that are unlikely to cause moire between the liquid crystal panel 11 and the rear display (image display panel 12). This can be done, for example, by random arrangement. 3. Metal wiring 100M is placed with the light-shielding pattern determined in step 2 above as its end point 100MS.

[0102] In this manner, in this modified example, the metal wiring 100M is arranged with a part of the light shielding pattern as an end point 100MS. Since the metal wiring 100M arranged within the display area 1AA causes a decrease in transmittance, it is desirable to minimize the number of metal wirings 100M.

[0103] In the liquid crystal panel 11 of the above-mentioned first embodiment, when the density of the spacers 400 is high, the transmittance may decrease significantly, and the effective resistance value of the first transparent conductive layer 130 may become excessively small. However, in the liquid crystal panel 11 of this modification, even when the density of the spacers 400 is high, the decrease in transmittance can be suppressed.

[0104] (Modification 2 of the first embodiment) FIG. 8 is an enlarged schematic plan view of a liquid crystal panel according to Modification 2 of Embodiment 1. FIG. 8 is an enlarged schematic plan view of a display area 1AA. In the liquid crystal panel 11 according to the above-mentioned embodiment 1 and Modification 1 of the above-mentioned embodiment 1, the metal wiring 100M is provided in a mesh shape with the area overlapping with the plurality of spacers 400 (more specifically, both the plurality of spacers 400 and the plurality of light-shielding parts 200S) as end points 100MS, but the metal wiring 100M provided in the liquid crystal panel 11 of this modification is extended in only one direction with the area overlapping with the plurality of spacers 400 (more specifically, both the plurality of spacers 400 and the plurality of light-shielding parts 200S) as end points 100MS in a plan view, as shown in FIG. By adopting such an embodiment, it is possible to suppress a signal delay while suppressing a decrease in transmittance.

[0105] More specifically, the first transparent conductive layer 130 of this modification is divided into three or more segments along the y-axis direction (vertical direction) which is the first direction of the liquid crystal panel 11, and the metal wiring 100M is preferably extended along the x-axis direction (horizontal direction) which is the second direction perpendicular to the first direction, with the end point 100MS being an area where the metal wiring 100M overlaps with the spacers 400 (more specifically, both the spacers 400 and the light shielding parts 200S) in a plan view, and is not preferably extended in the first direction. Although the addition of the metal wiring 100M may reduce the transmittance, in this modification, the metal wiring 100M is arranged only in the horizontal direction, so that the effective resistance value of the first transparent conductive layer 130 can be effectively reduced while suppressing the reduction in the transmittance.

[0106] Here, the metal wiring 100M extending along the second direction (x-axis direction, horizontal direction of the liquid crystal panel 11) means that the angle between the metal wiring 100M and the second direction is 50° or less. The angle θ between the metal wiring 100M and the second direction (x-axis direction, horizontal direction of the liquid crystal panel 11) is preferably 45° or less. Note that, if the metal wiring 100M cannot be arranged at an appropriate angle due to random arrangement of the multiple spacers 400, the angle θ is not limited to the above range.

[0107] In this modification, the metal wiring 100M is arranged taking into consideration the shape of the first transparent conductive layer 130 and how the signal delay is distributed depending on the shape of the first transparent conductive layer 130. For example, the second segment 2S of the first transparent conductive layer 130 is connected to the frame wiring 100NL at the left and right sides of the liquid crystal panel 11, and a signal is input from the connected portion. Since the signal delay inside the second segment 2S is considered to have a distribution in the left and right direction, if the resistance of the first transparent conductive layer 130 can be reduced only in the left and right (i.e., horizontal) direction, the effect of reducing the signal delay can be sufficiently exhibited. On the other hand, even if the metal wiring 100M is arranged in the up and down (i.e., vertical) direction, it does not contribute much to improving the point where the signal is most delayed within the plane of the second segment 2S.

[0108] The effects of the present invention will be described below with reference to examples and comparative examples, but the present invention is not limited to these examples.

[0109] Example 1 The liquid crystal panel 11 of this embodiment corresponds to the liquid crystal panel 11 of the above-mentioned embodiment 1. The liquid crystal panel 11 of this embodiment includes metal wiring 100M, and the metal wiring 100M is provided in a mesh shape with all of the regions overlapping with the plurality of spacers 400 (more specifically, both the plurality of spacers 400 and the plurality of light shielding portions 200S) as end points 100MS in a plan view, so that the effective sheet resistance of the first transparent conductive layer 130 is reduced and signal delay can be suppressed.

[0110] Example 2 The liquid crystal panel 11 of this embodiment corresponds to Modification 1 of the above-mentioned Embodiment 1. The liquid crystal panel 11 of this embodiment includes metal wiring 100M, which is provided in a mesh shape with end points 100MS at parts of regions overlapping with the plurality of spacers 400 (more specifically, both the plurality of spacers 400 and the plurality of light shielding portions 200S) in a plan view, and therefore signal delay can be suppressed while suppressing a decrease in transmittance.

[0111] Example 3 The liquid crystal panel 11 of this embodiment corresponds to Modification 2 of the above-described embodiment 1. The liquid crystal panel 11 of this embodiment includes metal wiring 100M, which extends in only one direction from an end point 100MS, in a plan view, at a region overlapping with the plurality of spacers 400 (more specifically, both the plurality of spacers 400 and the plurality of light shielding portions 200S). Therefore, it is possible to suppress a decrease in transmittance and suppress signal delay.

[0112] The above-described aspects of the present invention may be combined as appropriate without departing from the gist of the present invention. [Explanation of symbols]

[0113] 1AA:Display area 1NA: Frame area 1S, 2S, 3S, 4S: Segments 10:Display device 11: LCD panel 11R: Active retarder panel 12: Image display panel 13: Backlight 100, 200: Substrate 100M: Metal wiring 100MS: End point 100NL: Picture frame wiring 110, 210: supporting substrate 120, 220: Insulating layer 120CH: Contact hole 130, 230: transparent conductive layer 200S: Light shielding part 300: Liquid crystal layer 400: Spacer

Claims

1. A display area and a frame area provided around the display area, A liquid crystal display device comprising: a first substrate; a second substrate disposed opposite to the first substrate; and a liquid crystal layer and a plurality of spacers disposed between the first substrate and the second substrate; the first substrate or the second substrate has frame wiring arranged in the frame region; The liquid crystal panel is characterized in that the first substrate has a transparent conductive layer and metal wiring extending from the frame wiring toward the display area and electrically connected to the transparent conductive layer in a region overlapping with the plurality of spacers in a planar view.

2. the first substrate or the second substrate includes a plurality of light-shielding portions that overlap the plurality of spacers in a plan view and are disposed closer to an observation surface than the plurality of spacers and the metal wiring; The liquid crystal panel according to claim 1 , wherein the metal wiring is electrically connected to the transparent conductive layer in a region overlapping the spacers and the light blocking portions in a plan view.

3. 2. The liquid crystal panel according to claim 1, wherein the transparent conductive layer is divided into three or more segments along one direction of the liquid crystal panel.

4. 2. The liquid crystal panel according to claim 1, wherein the metal wiring is provided in a mesh shape in a plan view, with the metal wiring having end points at regions overlapping the plurality of spacers.

5. 2. The liquid crystal panel according to claim 1, wherein the metal wiring is provided in a mesh shape in a plan view, with all of the areas overlapping the plurality of spacers as end points.

6. 2. The liquid crystal panel according to claim 1, wherein the metal wiring is provided in a mesh shape in a plan view, with ends located at parts of areas overlapping the plurality of spacers.

7. 2. The liquid crystal panel according to claim 1, wherein the metal wiring extends in only one direction from an end point at a region where the metal wiring overlaps with the plurality of spacers in a plan view.

8. the transparent conductive layer is divided into three or more segments along a first direction of the liquid crystal panel; The liquid crystal panel according to claim 1, characterized in that the metal wiring, in a planar view, extends along a second direction perpendicular to the first direction, with an area overlapping the plurality of spacers as an end point, and does not extend in the first direction.

9. 9. The liquid crystal panel according to claim 8, wherein the angle between the metal wiring and the second direction is 45 degrees or less.

10. 2. The liquid crystal panel according to claim 1, wherein the spacers are arranged randomly.

11. A liquid crystal panel according to any one of claims 1 to 10, an image display panel disposed on the rear side of the liquid crystal panel; a backlight disposed on a rear side of the image display panel.

Images