Test device

Abstract

To provide a test device capable of enhancing accuracy of endurance test data.SOLUTION: A test device 1 comprises: a G power source applying a voltage to a gate of a semiconductor element; a G measuring apparatus measuring gate characteristics; an M power source applying a current between main electrodes; an M measuring apparatus measuring the voltage between the main electrodes in current application by the M power source; an S power source applying a current between the main electrodes; an S measuring apparatus measuring the voltage between the main electrodes in current application by the S power source; and a control part. The control part controls the driving of the G power source, the M power source and the S power source. The control part executes a power cycle test as endurance test and electric characteristics evaluation in a switching manner. The control part pauses the power cycle test and executes the electric characteristics evaluation in the middle of the power cycle test.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The disclosure herein relates to a test device. [Background technology]

[0002] Patent Document 1 discloses a test device for semiconductor devices. The contents of the prior art documents are incorporated by reference as explanations of technical elements in this specification. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2022-170675 Summary of the Invention [Problem to be solved by the invention]

[0004] In order to evaluate the state in which the electrical characteristics change over time, it is necessary to stop the test during a durability test such as a power cycle test, and remove the test object from the test device and evaluate it. When the test object is assembled into the test device to continue the durability test after the evaluation of the electrical characteristics, the assembly state and therefore the thermal resistance may change. In other words, the accuracy of the durability test data may decrease. In the above-mentioned respects and other respects not mentioned, further improvements in the test device are required.

[0005] An object of the present disclosure is to provide a test device capable of improving the accuracy of durability test data. [Means for solving the problem]

[0006] A test apparatus according to one embodiment of the present disclosure comprises: A test apparatus for performing a durability test on a semiconductor device including a semiconductor element, A first power supply (10) that applies a voltage to a gate of a semiconductor element; a first measuring device (11) for measuring gate characteristics while applying a voltage from a first power supply; a second power source (20) that applies a first physical quantity, which is one of a current and a voltage, between main electrodes of the semiconductor element; a second measuring device (21) that measures a second physical quantity, which is the other of a current and a voltage between the main electrodes, while a first physical quantity is applied by a second power source; a third power source (30) that applies a current between the main electrodes; a third measuring device (31) for measuring a voltage between the main electrodes while a current is applied from a third power source; a control unit (40) that controls the operation of the first power source, the second power source, and the third power source; Equipped with The control unit is capable of switching between a durability test and an electrical characteristic evaluation in which the durability test is temporarily stopped and the electrical characteristics are measured during the durability test, In the durability test, the control unit drives the first power supply and the second power supply while applying a current from the third power supply and monitoring a temperature of the semiconductor element based on a voltage measured by the third measuring device; In the electrical characteristic evaluation, the control unit drives at least one of the first power supply, the second power supply, and the third power supply to evaluate the electrical characteristics.

[0007] According to the disclosed testing device, the durability test can be temporarily stopped and the electrical characteristics can be evaluated during the durability test. In other words, the durability test and the electrical characteristics evaluation can be performed using a common (single) testing device. Since the electrical characteristics evaluation can be performed without removing the semiconductor device from the testing device, the accuracy of the durability test data can be improved.

[0008] The various aspects disclosed in this specification employ different technical means to achieve their respective objectives. The claims and the parenthetical symbols described in this section are merely illustrative of the corresponding relationships with the embodiments described below, and are not intended to limit the technical scope. The objectives, features, and effects disclosed in this specification will become clearer with reference to the following detailed description and the accompanying drawings. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram showing a test device according to a first embodiment. [Diagram 2] FIG. 13 is a diagram showing a measurement configuration and waveform of a threshold voltage Vth. [Diagram 3] FIG. 13 is a diagram showing a measurement configuration and waveform of a saturation voltage Vce(sat). [Figure 4] FIG. 13 is a diagram showing a measurement configuration and waveform of a gate leakage current Iges. [Diagram 5] 1 is a timing chart of a power cycle test and an electrical characteristic evaluation. [Figure 6] 4 is a flowchart showing a process executed by a control unit. [Figure 7] 1 is a flowchart showing a power cycle test. [Figure 8] 13 is a flowchart showing an evaluation of a gate leakage current Iges. [Figure 9] 1 is a flowchart showing an evaluation of a threshold voltage Vth. [Figure 10] 1 is a flowchart showing an evaluation of a saturation voltage Vce(sat). [Figure 11] FIG. 13 is a diagram showing a configuration for measuring a forward voltage Vf of a diode in a modified example including a MOSFET. [Figure 12] 1 is a timing chart of a power cycle test and an electrical characteristic evaluation. [Figure 13] 13 is a flowchart showing an evaluation of a forward voltage Vf from among the electrical characteristic evaluations. [Figure 14] 13 is a diagram showing an example of a semiconductor device tested by a test apparatus according to a second embodiment. FIG. [Figure 15] FIG. 11 is a diagram showing a test device according to a second embodiment. [Figure 16] 1 is a timing chart of a power cycle test and an electrical characteristic evaluation. [Figure 17] 1 is a flowchart showing a power cycle test. [Figure 18]13 is a flowchart showing an evaluation of a gate leakage current Iges. [Figure 19] 1 is a flowchart showing an evaluation of a saturation voltage Vce(sat). [Figure 20] 13 is a flowchart showing a process executed by a control unit in a test apparatus according to a third embodiment. [Figure 21] 1 is a timing chart of a continuous current test and an electrical characteristic evaluation. [Figure 22] 13 is a flowchart showing a continuous communication test. [Diagram 23] 13 is a timing chart showing a modified example of the 2-in-1 configuration. [Figure 24] 1 is a flowchart showing a continuous energization test. [Diagram 25] FIG. 13 is a diagram showing a test device according to a fourth embodiment. [Figure 26] 4 is a flowchart showing a process executed by a control unit. [Figure 27] 1 is a timing chart of a bias test and an electrical characteristic evaluation. [Figure 28] 1 is a flowchart showing a bias test. [Figure 29] 13 is a diagram showing a measurement configuration and waveform of a main withstand voltage leakage current Ices. FIG. [Diagram 30] 13 is a flowchart showing an evaluation of a main withstand voltage leakage current Ices. [Diagram 31] 13 is a flowchart showing a modified example of a bias test. [Diagram 32] 13 is a flowchart showing a modified example of the evaluation of the main withstand voltage leakage current Ices. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, several embodiments will be described with reference to the drawings. In addition, by assigning the same reference numerals to corresponding components in each embodiment, duplicated explanations may be omitted. When only a part of the configuration is described in each embodiment, the configuration of the other embodiment described above can be applied to the other parts of the configuration. In addition to the combination of configurations explicitly stated in the description of each embodiment, configurations of several embodiments can be partially combined together even if not explicitly stated, as long as there is no particular problem with the combination.

[0011] (First embodiment) First, the schematic configuration of the test device will be described with reference to FIG.

[0012] <Test Equipment> The test device 1 shown in FIG. 1 is configured to be capable of performing a durability test and an electrical characteristic evaluation during the durability test on a test object. The test object is a semiconductor device including a semiconductor element 50. The semiconductor device may include only the semiconductor element 50, or may include the semiconductor element 50, wiring members electrically connected to the semiconductor element 50, and external connection terminals. The semiconductor device may include a sealant that seals the semiconductor element 50. The semiconductor element 50 is formed by forming a switching element having a gate on a semiconductor substrate made of silicon (Si), a wide band gap semiconductor having a wider band gap than silicon, or the like. The switching element is, for example, an IGBT or a MOSFET. IGBT is an abbreviation for Insulated Gate Bipolar Transistor. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. The semiconductor element 50 is sometimes called a power element.

[0013] As an example, the semiconductor element 50 of this embodiment is an IGBT 51. A freewheeling diode 52 is connected in inverse parallel to the IGBT 51. The semiconductor device provides one arm of the upper and lower arm circuits that constitute a power conversion circuit. The semiconductor device is a power card with a so-called 1-in-1 package structure.

[0014] The test apparatus 1 includes a G power supply 10, a G measuring instrument 11, an M power supply 20, an M measuring instrument 21, an S power supply 30, an S measuring instrument 31, and a control unit 40. The test apparatus 1 includes three power supplies and three measuring instruments corresponding to the power supplies.

[0015] The G power supply 10 is a power supply that applies a voltage to the gate of the semiconductor element 50 (IGBT). The G power supply 10 can apply a predetermined voltage, for example, a voltage up to 25 V. The G measuring device 11 is provided between the G power supply 10 and the main electrode (emitter) on the low potential side of the semiconductor element 50. The G measuring device 11 measures a current flowing between the gate and the emitter when a voltage is applied by the G power supply 10. The G measuring device 11 can measure a current up to 1 mA, for example. The G power supply 10 corresponds to the first power supply, and the G measuring device 11 corresponds to the first measuring device. The G measuring device 11 may measure, for example, the voltage across a shunt resistor, that is, a voltage equivalent to the current flowing between the gate and the emitter. The G measuring device 11 may be any device that measures gate characteristics.

[0016] The M power supply 20 is a power supply that applies a current between the main electrodes of the semiconductor element 50, i.e., between the collector and emitter. The M power supply 20 is capable of applying a large current, for example, up to 500 A. The M measuring device 21 measures the voltage between the main electrodes while a current is being applied by the M power supply 20. The M measuring device 21 is capable of measuring a voltage up to 10 V, for example. The M power supply 20 corresponds to the second power supply, and the M measuring device 21 corresponds to the second measuring device.

[0017] The S power supply 30 is a power supply that applies a current between the main electrodes of the semiconductor element 50, that is, between the collector and the emitter. The S power supply 30 applies a current smaller than that applied by the M power supply 20. The S power supply 30 can apply a small current, for example, up to 0.5 A. The S measuring instrument 31 can measure a voltage up to 10 V, for example. The S power supply 30 corresponds to the third power supply, and the S measuring instrument 31 corresponds to the third measuring instrument. Hereinafter, the G power supply 10, the M power supply 20, and the S power supply 30 may be simply referred to as power supplies 10, 20, and 30. Similarly, the G measuring instrument 11, the M measuring instrument 21, and the S measuring instrument 31 may be simply referred to as measuring instruments 11, 21, and 31.

[0018] The control unit 40 controls the driving of the power supplies 10, 20, and 30. The control unit 40 controls the driving of the power supplies 10, 20, and 30 so as to execute a durability test and an electrical characteristic evaluation. The control unit 40 controls the driving of the power supplies 10, 20, and 30 so as to temporarily stop the durability test midway through the τ-drain test and execute the electrical characteristic evaluation at room temperature. The control unit 40 controls the driving of the power supplies 10, 20, and 30 based on the measurement results of the measuring instruments 11, 21, and 31. The control unit 40 switches between a durability test mode and an electrical characteristic evaluation mode. As an example, the control unit 40 in this embodiment executes a power cycle test as a durability test.

[0019] The control unit 40 includes, for example, a processor, a memory, and a storage. The processor is, for example, a CPU. The CPU is an abbreviation for Central Processing Unit. The processor executes various processes to realize functions by accessing the memory. The memory is a volatile storage medium, for example, a RAM. The RAM is an abbreviation for Random Access Memory. The storage includes a non-volatile storage medium such as a flash memory. The storage stores a control program executed by the processor. The processor executing the control program corresponds to the execution of a control method corresponding to the control program. The storage stores thresholds and the like used for judgment as appropriate.

[0020] <Electrical characteristics> Figure 2 shows the measurement setup and waveform of the threshold voltage Vth. Figure 3 shows the measurement setup and waveform of the saturation voltage Vce(sat). Figure 4 shows the measurement setup and waveform of the gate leakage current Iges. The electrical characteristics evaluated during the power cycle test are, for IGBT, at least one of the threshold voltage Vth, saturation voltage Vce(sat), and gate leakage current Iges.

[0021] As shown in FIG. 2, in order to evaluate the threshold voltage Vth, that is, the Vg-Ic characteristic, it is necessary to increase the voltage Vge applied to the gate so that the collector current Ic (Ice) flowing between the collector and emitter becomes a predetermined value. As shown in FIG. 3, in order to measure the saturation voltage Vce (sat), that is, the Vc-Ic characteristic, it is necessary to apply the voltage Vge to the gate, gradually increase the collector current Ic, and measure the collector-emitter voltage Vce, that is, Vce (sat), when the collector current Ic becomes a predetermined value. As shown in FIG. 4, in order to evaluate the gate leakage current Iges, that is, the Vg-Ig characteristic, it is necessary to apply the voltage Vge to the gate and measure the current Ige flowing between the gate and emitter while the collector and emitter are short-circuited.

[0022] The test apparatus 1 shown in FIG. 1, with the above-mentioned configuration, is capable of evaluating all of the threshold voltage Vth, the saturation voltage Vce(sat), and the gate leakage current Iges.

[0023] <Overall flow of power cycle testing and electrical characteristic evaluation> FIG. 5 is a timing chart of a power cycle test and an electrical characteristic evaluation in a semiconductor device having a 1-in-1 package structure. FIG. 6 is a flowchart showing the process executed by the control unit. For convenience, FIG. 5 shows the n-th cycle after the 1st cycle. The thick solid line shown in FIG. 5 indicates the current applied by the M power supply 20, and the thin solid line indicates the timing of measuring the voltage by the M measuring device 21, that is, the timing of acquiring the voltage by the control unit 40. The thick dashed line indicates the voltage applied by the G power supply 10, and the thin dashed line indicates the timing of measuring the current by the G measuring device 11, that is, the timing of acquiring the current by the control unit 40. The thick two-dot chain line indicates the current applied by the S power supply 30, and the thin two-dot chain line indicates the timing of measuring the voltage by the S measuring device 31, that is, the timing of acquiring the voltage by the control unit 40.

[0024] As shown in Fig. 5 and Fig. 6, the control unit 40 first executes a power cycle test (step S10). In the power cycle test, the temperature is repeatedly increased and decreased. The control unit 40 executes the test for a specified number of cycles. The specified number of cycles may be a uniform value, or may vary depending on the number of times step S10 is executed. As an example, in this embodiment, the specified number of cycles is uniform (constant value) at n cycles.

[0025] When the power cycle test for the specified number of cycles is completed, the control unit 40 then determines whether or not all cycles of the power cycle test are completed (step S15). If all cycles are completed, the control unit 40 ends the series of processes shown in FIG. 6, that is, the power cycle test and the electrical characteristic evaluation process.

[0026] If all cycles have not been completed, the control unit 40 performs an evaluation process of the electrical characteristics at room temperature (step S20). After performing the electrical characteristic evaluation, the control unit 40 performs the processes from step S10 onward again. In this way, the control unit 40 temporarily stops the power cycle test and performs the evaluation process of the electrical characteristics in the middle of the power cycle test.

[0027] <Power cycle test> 7 is a flowchart showing the power cycle test, and illustrates the process of step S10 in FIG.

[0028] As shown in FIG. 5 and FIG. 7, the control unit 40 first drives the G power supply 10 to apply a predetermined voltage to the gate (step S100). Next, the control unit 40 measures the temperature (junction temperature Tj) of the semiconductor element 50 in a low-temperature state before the M power supply 20 applies a current (large current). In the temperature measurement, the control unit 40 drives the S power supply 30 to apply a small current for temperature measurement between the collector and the emitter (step S101). Then, the control unit 40 acquires the measurement result of the voltage Vce by the S measuring instrument 31 in the state where the S power supply 30 applies a current, that is, measures the voltage (step S102). The control unit 40 derives the temperature based on the voltage. The control unit 40 measures the temperature Tj of the semiconductor element 50 using the S power supply 30 and the S measuring instrument 31, and when the measurement is completed, cuts off the application of the current by the S power supply 30 (step S103).

[0029] Next, the control unit 40 controls the driving of the M power supply 20 so that the temperature Tj has a predetermined temperature history. The control unit 40 drives the M power supply 20 so as to apply a large current between the collector and the emitter (step S104). Then, the control unit 40 acquires the measurement result of the voltage Vce by the M measuring device 21 while the M power supply 20 is applying a current, that is, measures the voltage (step S105). In this way, the control unit 40 monitors the voltage Vce while the large current is being applied. Also, the control unit 40 acquires the measurement result of the current Ige by the G measuring device 11 while the M power supply 20 is applying a current, that is, measures the current (step S106). In this way, the control unit 40 monitors the presence or absence of the current Ige, that is, the gate leakage current Iges, while the large current is being applied.

[0030] Next, the control unit 40 cuts off the application of current by the M power supply 20 (step S107), and drives the S power supply 30 to apply a small current in order to measure the temperature Tj in the high-temperature state (step S108). Then, while the S power supply 30 is applying a current, the control unit 40 acquires the measurement result of the voltage Vce by the S meter 31, that is, measures the voltage (step S109). The control unit 40 derives the temperature based on the voltage. The control unit 40 measures the temperature Tj of the semiconductor element 50 using the S power supply 30 and the S meter 31, and cuts off the application of current by the S power supply 30 when the measurement is completed (step S110).

[0031] Next, the control unit 40 cuts off the application of voltage by the G power supply 10 (step S111) and determines whether or not the specified cycle has been reached (step S112). If the specified cycle has been reached, the control unit 40 ends the series of processes. If the specified cycle has not been reached, the control unit 40 executes the processes from step S100 onwards again. The control unit 40 may determine whether or not the specified cycle has been reached based on, for example, the counter value and a specified cycle value previously stored in the storage.

[0032] The current applied by the S power supply 30 is sufficiently smaller than the current applied by the M power supply 20. Therefore, a configuration may be adopted in which the processes of steps S103 and S108 shown in Fig. 7 are eliminated. In other words, a configuration may be adopted in which the S power supply 30 applies a current from when the S power supply 30 is driven in step S101 until when the current is cut off in step S110.

[0033] <Electrical characteristic evaluation> Fig. 8 is a flowchart showing an evaluation of a gate leakage current Iges. Fig. 9 is a flowchart showing an evaluation of a threshold voltage Vth. Fig. 10 is a flowchart showing an evaluation of a saturation voltage Vce(sat). Figs. 8, 9, and 10 show the process contents of step S20 in Fig. 6.

[0034] When evaluating the gate leakage current Iges as an electrical characteristic, the control unit 40 first drives the G power supply 10 to apply a predetermined voltage to the gate (step S200), as shown in Fig. 5 and Fig. 8. Next, while the G power supply 10 is applying a voltage, the control unit 40 obtains the measurement result of the current Ige by the G measuring device 11, that is, measures the current (step S201). Next, the control unit 40 determines whether the voltage applied by the G power supply 10 has reached an upper limit (step S202).

[0035] If the applied voltage reaches the upper limit, the control unit 40 ends the evaluation process of the gate leakage current Iges. If the applied voltage has not reached the upper limit, the control unit 40 changes the setting of the applied voltage (step S203). The control unit 40 sets, for example, a gate voltage one step higher as the applied voltage. Then, the process from step S200 onwards is executed again. The control unit 40 drives the G power supply 10 so as to apply the voltage set in step S203. In this way, the current Ige is measured at each voltage while changing the voltage until the upper limit is reached, and the gate leakage current Iges is evaluated.

[0036] When evaluating the threshold voltage Vth as an electrical characteristic, the control unit 40 first drives the G power supply 10 to apply a predetermined voltage to the gate (step S210), as shown in Fig. 5 and Fig. 9. Next, the control unit 40 drives the S power supply 30 to apply a predetermined current (small current) between the collector and the emitter (step S211), and while the S power supply 30 is applying a current, the control unit 40 obtains the measurement result of the voltage Vce by the S measuring device 31, that is, measures the voltage (step S212). Next, the control unit 40 determines whether the voltage applied by the G power supply 10 has reached an upper limit (step S213).

[0037] If the applied voltage reaches the upper limit, the control unit 40 ends the evaluation process of the threshold voltage Vth. If the applied voltage does not reach the upper limit, the control unit 40 changes the settings of the applied voltage and applied current (step S214). The control unit 40 sets, for example, a gate voltage and current value one step higher. Then, the process from step S210 onwards is executed again. The control unit 40 drives the G power supply 10 so as to apply the voltage set in step S214. The control unit 40 drives the S power supply 30 so as to apply the current set in step S214.

[0038] When evaluating the saturation voltage Vce(sat) as an electrical characteristic, the control unit 40 first drives the G power supply 10 to apply a predetermined voltage to the gate (step S220), as shown in Fig. 5 and Fig. 10. Next, the control unit 40 drives the M power supply 20 to apply a predetermined current (large current) between the collector and the emitter (step S221), and while the M power supply 20 is applying a current, the control unit 40 obtains the measurement result of the voltage Vce by the M measuring device 21, that is, measures the voltage (step S222). Next, the control unit 40 determines whether the current applied by the M power supply 20 has reached an upper limit (step S223).

[0039] If the applied current has not reached the upper limit, the control unit 40 changes the applied current setting (step S224). The control unit 40 sets, for example, a current value one step higher. Then, the process from step S221 onward is executed again. The control unit 40 drives the M power source 20 so as to apply the current set in step S224.

[0040] When the applied current reaches the upper limit, the control unit 40 judges whether the voltage applied by the G power supply 10 has reached the upper limit (step S225). When the applied voltage has reached the upper limit, the control unit 40 ends the evaluation process of the saturation voltage Vce(sat). When the applied voltage has not reached the upper limit, the control unit 40 changes the settings of the applied voltage and applied current (step S226). The control unit 40 sets, for example, a gate voltage one step higher. Then, the process from step S220 onwards is executed again. The control unit 40 drives the G power supply 10 so as to apply the voltage set in step S226. The control unit 40 sweeps the applied current at each gate voltage.

[0041] 10 shows an example in which not only the current from the M power supply 20 but also the voltage applied by the G power supply 10 is changed, but this is not limiting. If the G power supply 10 is not changed, the processes of steps S225 and S226 in FIG. 10 can be omitted.

[0042] As an example, in this embodiment, the electrical characteristics are evaluated in the order of the gate leakage current Iges, the threshold voltage Vth, and the saturation voltage Vce(sat). First, it is evaluated whether there is a gate failure, and the saturation voltage Vce(sat) to which a large current is applied is evaluated last.

[0043] <Summary of the First Embodiment> According to this embodiment, a power cycle test, which is a durability test, and an electrical characteristic evaluation can be performed by a common (single) test apparatus 1. The test apparatus 1 can temporarily stop the power cycle test and evaluate the electrical characteristics during the power cycle test. Since the electrical characteristic evaluation can be performed without removing the semiconductor device from the test apparatus 1, it is possible to suppress changes in the assembly state, and in turn changes in thermal resistance. Therefore, it is possible to improve the accuracy of the durability test data while evaluating the state in which the electrical characteristics change over time.

[0044] The M power supply 20 (second power supply) may apply a current between the main electrodes as the first physical quantity that is greater than the current applied by the S power supply 30 (third power supply). The M measuring device 21 (second measuring device) may measure the voltage between the main electrodes as the second physical quantity. This allows, for example, the saturation voltage Vce(sat) to be evaluated in addition to the power cycle test.

[0045] As the electrical characteristics, at least one of the gate leakage current Iges, the threshold voltage Vth, and the saturation voltage Vce(sat) may be evaluated. According to this embodiment, the endurance test (power cycle test) and the evaluation of at least one of the gate leakage current Iges, the threshold voltage Vth, and the saturation voltage Vce(sat) can be performed by a common test device 1.

[0046] <Modification> When the semiconductor element 50 includes a MOSFET as a switching element, the forward voltage Vf of a diode connected inversely in parallel may be evaluated as an electrical characteristic. For example, when the on-resistance of the MOSFET is small, such as in the case of a SiC-MOSFET, the heat generated by the MOSFET does not cause the temperature Tj to reach a predetermined temperature, so the heat generated by the diode may be used. In this case, the forward voltage Vf of the diode is evaluated as an electrical characteristic. The diode connected inversely in parallel to the MOSFET may be a parasitic diode, or may be a diode provided separately from the parasitic diode.

[0047] Fig. 11 shows the measurement configuration for the forward voltage Vf. The drain-source voltage Vds (negative voltage) can be measured while a reverse current (negative current) is applied between the main electrodes, i.e., between the drain and source. The reverse direction is the forward direction of the diode, and the negative current If flows through the diode. The above-mentioned test device 1 can evaluate the forward voltage Vf, i.e., the Vf-If characteristics.

[0048] FIG. 12 shows a timing chart for evaluating the forward voltage Vf. FIG. 12 corresponds to FIG. 5. In FIG. 12, the n-th cycle is shown after the first cycle for convenience. The thick solid line indicates the current applied by the M power supply 20, and the thin solid line indicates the timing of measuring the voltage by the M measuring instrument 21. The thick dashed line indicates the voltage applied by the G power supply 10, and the thin dashed line indicates the timing of measuring the current by the G measuring instrument 11. The thick two-dot chain line indicates the current applied by the S power supply 30, and the thin two-dot chain line indicates the timing of measuring the voltage by the S measuring instrument 31. FIG. 13 is a flowchart showing the evaluation of the forward voltage Vf. FIG. 13 shows the process of step S20 in FIG. 6.

[0049] When evaluating the forward voltage Vf as an electrical characteristic, the control unit 40 first drives the G power supply 10 to apply a predetermined voltage to the gate (step S230), as shown in Fig. 12 and Fig. 13. In the case of a SiC-MOSFET, if the voltage applied to the gate is not a negative voltage or zero (0) V, leakage current will flow from the channel. For example, 0 V is applied initially.

[0050] Next, the control unit 40 drives the M power supply 20 so as to apply a large current (negative current) in the reverse direction between the main electrodes (step S231). Then, while the M power supply 20 is applying a negative current, the control unit 40 obtains the measurement result of the negative voltage by the M measuring device 21, that is, measures the negative voltage (step S232). Next, the control unit 40 determines whether the current applied by the M power supply 20 has reached a lower limit (step S233).

[0051] If the applied current has not reached the upper limit, the control unit 40 changes the setting of the applied current (step S234). The control unit 40 sets, for example, a current value one step lower. The current value one step lower is a current value one step higher in terms of absolute value. Then, the processing from step S231 onwards is executed again. The control unit 40 drives the M power source 20 so as to apply the current set in step S234.

[0052] When the applied current reaches the lower limit, the control unit 40 judges whether the voltage applied by the G power supply 10 has reached the lower limit (step S235). When the applied voltage has reached the lower limit, the control unit 40 ends the evaluation process of the forward voltage Vf. When the applied voltage has not reached the lower limit, the control unit 40 changes the settings of the applied voltage and applied current (step S236). For example, it switches from 0V to a negative voltage. Then, the process from step S230 onwards is executed again. The control unit 40 drives the G power supply 10 so as to apply the voltage set in step S236. The control unit 40 sweeps the applied current at each gate voltage.

[0053] The test apparatus 1 may evaluate at least one of the electrical characteristics, the gate leakage current Iges, the threshold voltage Vth, the saturation voltage Vce(sat), and the forward voltage Vf of the diode. In evaluating the forward voltage Vf, a large current is applied. Therefore, as shown in FIG. 12, it is preferable to evaluate the forward voltage Vf after evaluating the gate leakage current Iges and the threshold voltage Vth.

[0054] Second embodiment This embodiment is a modification of the preceding embodiment as a basic form, and the description of the preceding embodiment can be used. In the preceding embodiment, the test device is used for a semiconductor device that provides one of the upper and lower arms. Instead of this, the test device may be used for a semiconductor device that provides upper and lower arms for one phase.

[0055] <Semiconductor device> FIG. 14 is a plan view showing an example of a semiconductor device tested and evaluated by the test device of this embodiment. The semiconductor device 53 shown in FIG. 14 provides upper and lower arms for one phase. The semiconductor device 53 includes a semiconductor element 50U providing an upper arm and a semiconductor element 50L providing a lower arm. For example, an IGBT and a diode are formed in each of the semiconductor elements 50U and 50L. The semiconductor device 53 has a 2-in-1 package structure. Furthermore, the semiconductor device 53 includes a sealing body 54, main terminals 55, 56, and 57, a signal terminal 58, and inspection terminals 59U and 59L.

[0056] The sealing body 54 seals the semiconductor elements 50U and 50L. The main terminals 55, 56, and 57 protrude from the side surface 54a of the sealing body 54 to the outside. The main terminal 55 is electrically connected to the collector of the semiconductor element 50U. The main terminal 56 is electrically connected to the emitter of the semiconductor element 50L. The main terminal 57 is electrically connected to the emitter of the semiconductor element 50U and the collector of the semiconductor element 50L. The main terminal 55 may be referred to as a P terminal, a positive terminal, etc. The main terminal 56 may be referred to as an N terminal, a negative terminal, etc. The main terminal 57 may be referred to as an output terminal, etc.

[0057] The signal terminal 58 is electrically connected to pads (signal electrodes) (not shown) of the semiconductor elements 50U and 50L. The signal terminal 58 protrudes from the sealing body 54 to the outside from the side surface 54b opposite to the side surface 54a. The signal terminal 58 includes a gate terminal electrically connected to the gates of the semiconductor elements 50U and 50L. The signal terminal 58 includes Kelvin emitter terminals 58KeU and 58KeL. The Kelvin emitter terminal 58KeU is electrically connected to the emitter of the semiconductor element 50U. The Kelvin emitter terminal 58KeL is electrically connected to the emitter of the semiconductor element 50L. The inspection terminals 59U and 59L protrude from the side surface 54b to the outside of the sealing body 54. The inspection terminal 59U is electrically connected to the collector of the semiconductor element 50U. The inspection terminal 59L is electrically connected to the collector of the semiconductor element 50L.

[0058] For durability tests and electrical characteristic evaluations, main terminals 55, 56, and 57 may be used, or Kelvin emitter terminals 58KeU and 58KeL or inspection terminals 59U and 59L may be used.

[0059] <Test Equipment> FIG. 15 is a diagram showing a test apparatus according to this embodiment. FIG. 15 corresponds to FIG. 1. The test apparatus 1 includes a G power supply 10, a G measuring instrument 11, an M power supply 20, an M measuring instrument 21, an S power supply 30, an S measuring instrument 31, and a control unit 40, as in the previous embodiment. The difference from the previous embodiment is that the test apparatus includes two each of the G power supply 10, the G measuring instrument 11, the M measuring instrument 21, the S power supply 30, and the S measuring instrument 31. The M power supply 20 is common to the semiconductor elements 50U and 50L. One end of the M power supply 20 is electrically connected to the collector of the semiconductor element 50U, and the other end is electrically connected to the emitter of the semiconductor element 50L.

[0060] The G power supply 10 includes a G1 power supply 101 that applies a voltage to the gate of the semiconductor element 50U on the upper arm side, and a G2 power supply 102 that applies a voltage to the gate of the semiconductor element 50L on the lower arm side. The G measuring instrument 11 includes a G1 measuring instrument 111 on the semiconductor element 50U side, and a G2 measuring instrument 112 on the semiconductor element 50L side. The M measuring instrument 21 includes an M1 measuring instrument 211 on the semiconductor element 50U side, and an M2 measuring instrument 212 on the semiconductor element 50L side. The S power supply 30 includes an S1 power supply 301 on the semiconductor element 50U side, and an S2 power supply 302 on the semiconductor element 50L side. The S measuring instrument 31 includes an S1 measuring instrument 311 on the semiconductor element 50U side, and an S2 measuring instrument 312 on the semiconductor element 50L side.

[0061] <Overall flow of power cycle testing and electrical characteristic evaluation> FIG. 16 is a timing chart of the power cycle test and the electrical characteristic evaluation. FIG. 16 corresponds to FIG. 5. In FIG. 16, like FIG. 5, the nth cycle is shown after the first cycle. The thick solid line indicates the current applied by the M power supply 20, and the thin solid line indicates the timing of measuring the voltage by the M measuring instrument 21. The thick dashed line indicates the voltage applied by the G power supply 10, and the thin dashed line indicates the timing of measuring the current by the G measuring instrument 11. The thick two-dot chain line indicates the current applied by the S power supply 30, and the thin two-dot chain line indicates the timing of acquiring the voltage measured by the S measuring instrument 31. Current 1 indicates the current of the semiconductor element 50U, and current 2 indicates the current of the semiconductor element 50L. Voltage 1 indicates the voltage of the semiconductor element 50U, and voltage 2 indicates the voltage of the semiconductor element 50L.

[0062] The test apparatus 1 (control unit 40) of this embodiment also executes the process shown in FIG. 6 of the preceding embodiment. That is, first, a power cycle test is executed, and if all cycles are not completed, an evaluation process of the electrical characteristics is executed at room temperature. The above process is repeated until all cycles are completed. The control unit 40 temporarily stops the power cycle test, and executes an evaluation process of the electrical characteristics at room temperature in the middle of the power cycle test.

[0063] <Power cycle test> FIG. 17 is a flowchart showing a power cycle test. The power cycle test is basically the same as that of the preceding embodiment. The processes of steps S100A, S101A, S102A, S103A, S105A, S106A, S108A, S109A, S110A, and S111A shown in FIG. 17 correspond to the processes of steps S100, S101, S102, S103, S105, S106, S108, S109, S110, and S111 shown in FIG. 7 of the preceding embodiment. As described above, the power supplies 10 and 30 and the measuring instruments 11, 21, and 31, except for the M power supply 20, are provided separately for the semiconductor element 50U and the semiconductor element 50L. The semiconductor elements 50U and 50L are tested in a common step. The test contents are, for example, common to the semiconductor elements 50U and 50L. For example, in step S100A, G1 power supply 101 applies a voltage to the gate of semiconductor element 50U, and G2 power supply 102 applies a voltage to the gate of semiconductor element 50L.

[0064] <Electrical characteristic evaluation> FIG. 18 is a flowchart showing the evaluation of the gate leakage current Iges. FIG. 18 corresponds to FIG. 8. FIG. 19 is a flowchart showing the evaluation of the saturation voltage Vce(sat). FIG. 19 corresponds to FIG. 10. The electrical characteristic evaluation is basically the same as that of the preceding embodiment. As shown in FIG. 16, the threshold voltage Vth (Vg-Ig characteristics) is evaluated for the semiconductor element 50U and the semiconductor element 50L separately. The G power supply 10, the S power supply 30, and the S measuring instrument 31 are provided for the semiconductor element 50U and the semiconductor element 50L separately. As an example, in this embodiment, the threshold voltage Vth of the semiconductor element 50U is evaluated using the G1 power supply 101, the S1 power supply 301, and the S1 measuring instrument 311. After the evaluation of the semiconductor element 50U, the threshold voltage Vth of the semiconductor element 50L is evaluated using the G2 power supply 102, the S2 power supply 302, and the S2 measuring instrument 312.

[0065] In the evaluation of the gate leakage current Iges shown in FIG. 18, the processes of steps S200A and S201A correspond to the processes of steps S200 and S201 shown in FIG. 8 of the preceding embodiment. The G power supply 10 and the G measuring device 11 are provided separately for the semiconductor element 50U and the semiconductor element 50L. The semiconductor elements 50U and 50L are evaluated in a common step. The evaluation content is common to the semiconductor elements 50U and 50L, for example. For example, in step S200A, the G1 power supply 101 applies a voltage to the gate of the semiconductor element 50U, and the G2 power supply 102 applies a voltage to the gate of the semiconductor element 50L.

[0066] In the evaluation of the saturation voltage Vce(sat) shown in FIG. 19, the processes of steps S220A and S222A correspond to the processes of steps S220 and S222 shown in FIG. 10 of the preceding embodiment. As described above, the G power supply 10 and the M measuring device 21 are provided separately on the upper arm side and the lower arm side. The M power supply 20 is common to the semiconductor elements 50U and 50L. The semiconductor elements 50U and 50L are evaluated in a common step. The evaluation content is common to the semiconductor elements 50U and 50L, for example. For example, in step S220A, the G1 power supply 101 applies a voltage to the gate of the semiconductor element 50U, and the G2 power supply 102 applies a voltage to the gate of the semiconductor element 50L. In step S221, the M power supply 20 applies a current between the main electrodes of the semiconductor element 50U and between the main electrodes of the semiconductor element 50L. In step S222A, the measurement result of the voltage Vce of the semiconductor element 50U by the M1 measuring instrument 211 is obtained, and the measurement result of the voltage Vce of the semiconductor element 50L by the M2 measuring instrument 212 is obtained. The other configurations are similar to those described in the preceding embodiments.

[0067] <Summary of the second embodiment> According to this embodiment, a power cycle test, which is a durability test, and an electrical characteristic evaluation can be performed on a 2-in-1 semiconductor device 53 using a common (single) test device 1. Therefore, the same effects as those of the configurations described in the preceding embodiments can be achieved. For example, the accuracy of data from the durability test can be improved while evaluating the state in which the electrical characteristics change over time.

[0068] Although not shown, forward voltage Vf may be evaluated as the electrical characteristic as shown in the modified example of the preceding embodiment (see FIG. 13). In step S230, a voltage is applied to the gate of semiconductor element 50U by G1 power supply 101, and a voltage is applied to the gate of semiconductor element 50L by G2 power supply 102. In step S232, the negative voltage of semiconductor element 50U is measured by M1 measuring device 211, and the negative voltage of semiconductor element 50L is measured by M2 measuring device 212.

[0069] Third embodiment This embodiment is a modification of the previous embodiment as a basic form, and the description of the previous embodiment can be used. In the previous embodiment, a power cycle test is shown as an example of the durability test. Instead of this, a continuous current test may be performed.

[0070] <Test Equipment> The test apparatus 1 of this embodiment has the same configuration as that shown in the preceding embodiment (see FIG. 1). The test apparatus 1 includes a G power supply 10, a G measuring instrument 11, an M power supply 20, an M measuring instrument 21, an S power supply 30, an S measuring instrument 31, and a control unit 40.

[0071] <Overall flow of continuous current testing and electrical characteristic evaluation> Fig. 20 is a flowchart showing the processing executed by the test apparatus 1 (control unit 40). Fig. 21 is a timing chart of a continuous current test and an electrical characteristic evaluation of a semiconductor device having a 1-in-1 package structure. As in Fig. 5, the thick solid line in Fig. 21 indicates the current applied by the M power supply 20, and the thin solid line indicates the timing of voltage measurement by the M measuring instrument 21. The thick dashed line indicates the voltage applied by the G power supply 10, and the thin dashed line indicates the timing of current measurement by the G measuring instrument 11. The thick two-dot chain line indicates the current applied by the S power supply 30, and the thin two-dot chain line indicates the timing of voltage measurement by the S measuring instrument 31.

[0072] As shown in Fig. 20 and Fig. 21, the test device 1 (control unit 40) first executes a continuous current test (step S10A). The control unit 40 executes the continuous current test for a specified time out of the total current time of the continuous current test. The specified time may be a uniform value, or may be different depending on the number of times step S10A is executed. As an example, in this embodiment, the specified time is uniform (constant value) at n hours.

[0073] When the continuous current test for the specified time is completed, the control unit 40 then determines whether or not the entire current time of the continuous current test has been completed (step S15A). If the entire current time has been completed, the control unit 40 ends the series of processes shown in FIG. 20, that is, the continuous current test and the electrical characteristic evaluation process. The entire current time and the specified time are set in advance. The control unit 40 controls the driving of the power sources 10, 20, and 30 so as to secure the specified time, and therefore the entire current time.

[0074] If the entire current flow time has not ended, the control unit 40 executes the process of step S20, i.e., the process of evaluating the electrical characteristics, at room temperature, as in Fig. 6. After executing the electrical characteristic evaluation, the control unit 40 executes the processes from step S10A onwards again. In this way, the control unit 40 temporarily stops the continuous current test, and executes the process of evaluating the electrical characteristics at room temperature in the middle of the continuous current test.

[0075] <Continuous current test> Fig. 22 is a flow chart showing the continuous energization test, which illustrates the process of step S10A in Fig. 20.

[0076] As shown in FIGS. 21 and 22, the control unit 40 first drives the G power supply 10 to apply a predetermined voltage to the gate (step S120). Next, the control unit 40 measures the temperature Tj of the semiconductor element 50 before the current is applied by the M power supply 20. In the temperature measurement, the control unit 40 drives the S power supply 30 to apply a small current for temperature measurement between the collector and emitter (step S121). Then, while the S power supply 30 is applying a current, the control unit 40 obtains the measurement result of the voltage Vce by the S measuring device 31, that is, measures the voltage (step S122). The control unit 40 derives the temperature based on the voltage.

[0077] Next, the control unit 40 controls the driving of the M power supply 20 so that the temperature Tj has a predetermined temperature history. The control unit 40 drives the M power supply 20 so as to apply a large current between the collector and the emitter (step S123). Then, the control unit 40 acquires the measurement result of the voltage Vce by the M measuring device 21 while the M power supply 20 is applying a current, that is, measures the voltage (step S124). In this way, the control unit 40 monitors the voltage Vce while the large current is being applied. Also, the control unit 40 acquires the measurement result of the current Ige by the G measuring device 11 while the M power supply 20 is applying a current, that is, measures the current (step S125). In this way, the control unit 40 monitors the presence or absence of the current Ige, that is, the gate leakage current Iges, while the large current is being applied.

[0078] Next, the control unit 40 cuts off the application of current by the M power supply 20 (step S126) and obtains the measurement result of the voltage Vce by the S meter 31, that is, measures the voltage (step S127). The control unit 40 derives the temperature based on the voltage.

[0079] Next, the control unit 40 judges whether or not the specified time has been reached (step S128). If the specified time (n hours) has been reached, the control unit 40 cuts off the application of current by the S power supply 30 (step S129), then cuts off the application of voltage by the G power supply 10 (step S130), and ends the series of processes. If the specified time has not been reached, the control unit 40 executes the processes from step S213 onwards again.

[0080] In addition, an example has been shown in which the S power supply 30 applies a current in step S121, and then cuts off the current application by the S power supply 30 in step S129 after the specified time has elapsed, but the present invention is not limited to this. The control unit 40 may control the driving of the S power supply 30 in accordance with the timing of the voltage measurement (temperature measurement) by the S measuring device 31. For example, the control unit 40 may cut off the current application by the S power supply 30 after executing step S122. The control unit 40 may drive the S power supply 30 to apply a current after executing step S126 and before executing step S127, and cut off the current application by the S power supply 30 after executing step S127.

[0081] <Electrical characteristic evaluation> The electrical characteristic evaluation is the same as in the preceding embodiment (FIGS. 8, 9, and 10), and therefore will not be described. The electrical characteristics evaluated during the continuous energization test are at least one of the gate leakage current Iges, threshold voltage Vth, and saturation voltage Vce(sat), as in the power cycle test. As an example, in this embodiment, the control unit 40 evaluates the electrical characteristics in the order of the gate leakage current Iges, threshold voltage Vth, and saturation voltage Vce(sat). The other configurations are the same as those described in the preceding embodiment.

[0082] <Summary of the third embodiment> According to this embodiment, it is possible to achieve the effects described in the preceding embodiment. According to this embodiment, a continuous current test, which is a durability test, and an electrical characteristic evaluation can be performed by a common (single) test apparatus 1. The test apparatus 1 can temporarily stop the continuous current test and evaluate the electrical characteristics in the middle of the continuous current test. The electrical characteristic evaluation can be performed without removing the semiconductor device from the test apparatus 1. Therefore, it is possible to improve the accuracy of the durability test data while evaluating the state in which the electrical characteristics change over time.

[0083] The M power supply 20 (second power supply) may apply a current between the main electrodes as the first physical quantity that is greater than the current applied by the S power supply 30 (third power supply). The M measuring device 21 (second measuring device) may measure the voltage between the main electrodes as the second physical quantity. This makes it possible to evaluate, for example, the saturation voltage Vce(sat) in addition to the continuous current test.

[0084] As the electrical characteristics, at least one of the gate leakage current Iges, the threshold voltage Vth, and the saturation voltage Vce(sat) may be evaluated. According to this embodiment, the durability test (continuous current test) and the evaluation of at least one of the gate leakage current Iges, the threshold voltage Vth, and the saturation voltage Vce(sat) can be performed by a common test device 1.

[0085] <Modification> As shown in the modified example of the preceding embodiment (see FIGS. 11 to 13), the forward voltage Vf of the diode may be evaluated as the electrical characteristic.

[0086] A continuous current test and an electrical characteristic evaluation may be performed on the semiconductor device having the 2-in-1 package structure. The test device 1 may be the test device 1 shown in the second embodiment (see FIG. 15).

[0087] Fig. 23 is a timing chart of a continuous current test and an electrical characteristic evaluation of a semiconductor device having a 2-in-1 package structure. As in Fig. 16, the thick solid line indicates the current applied by the M power supply 20, and the thin solid line indicates the timing of voltage measurement by the M measuring instrument 21. The thick dashed line indicates the voltage applied by the G power supply 10, and the thin dashed line indicates the timing of current measurement by the G measuring instrument 11. The thick two-dot chain line indicates the current applied by the S power supply 30, and the thin two-dot chain line indicates the timing of voltage measurement by the S measuring instrument 31. Current 1 indicates the current of the semiconductor element 50U, and current 2 indicates the current of the semiconductor element 50L. Voltage 1 indicates the voltage of the semiconductor element 50U, and voltage 2 indicates the voltage of the semiconductor element 50L.

[0088] In combination with the continuous current test, the threshold voltage Vth (Vg-Ig characteristics) is evaluated for the semiconductor elements 50U and 50L individually. The continuous current test for the semiconductor elements 50U and 50L is performed using a common step. The evaluation of the gate leakage current Iges and the evaluation of the saturation voltage Vce(sat) for the semiconductor elements 50U and 50L are performed using a common step.

[0089] The electrical characteristic evaluation is the same as that shown in the second embodiment. FIG. 24 is a flowchart showing a continuous durability test. The processes of steps S120A, S121A, S122A, S124A, S125A, S127A, S129A, and S130A shown in FIG. 24 correspond to the processes of steps S120, S121, S122, S124, S125, S127, S129, and S130 shown in FIG. 22. As shown in FIG. 15, the power supplies 10 and 30 and the measuring instruments 11, 21, and 31, except for the M power supply 20, are provided separately for the semiconductor element 50U and the semiconductor element 50L. The semiconductor elements 50U and 50L are tested in a common step. The test contents are, for example, common to the semiconductor elements 50U and 50L. For example, in step S120A, G1 power supply 101 applies a voltage to the gate of semiconductor element 50U, and G2 power supply 102 applies a voltage to the gate of semiconductor element 50L.

[0090] (Fourth embodiment) This embodiment is a modification based on the previous embodiment, and the description of the previous embodiment can be used. In the previous embodiment, the M power supply 20 applied a current and the M measuring device 21 measured a voltage. Alternatively, the M power supply 20 may apply a voltage and the M measuring device 21 may measure a current. In the previous embodiment, the test device performed a power cycle test or a continuous current test as a durability test. Alternatively, the test device may perform a bias test in any of a high temperature environment, a low temperature environment, and a high temperature and high humidity environment.

[0091] <Test Equipment> FIG. 25 shows a test apparatus according to this embodiment. The test apparatus 1 includes a G power supply 10, a G measuring instrument 11, an M power supply 20, an M measuring instrument 21, an S power supply 30, an S measuring instrument 31, and a control unit 40. The test apparatus 1 is configured to perform a bias test and an electrical characteristic evaluation in any one of a high temperature environment, a low temperature environment, and a high temperature and high humidity environment. The test apparatus 1 temporarily stops the bias test and performs an electrical characteristic evaluation during the bias test. The temperature and humidity are controlled by an external device, for example, a chamber. The semiconductor device is tested and evaluated while placed in the chamber. The control unit 40 of the test apparatus 1 controls, for example, the operation of the chamber.

[0092] In this embodiment, the M power supply 20 applies a voltage (high voltage) between the main electrodes of the semiconductor element 50. The M power supply 20 is capable of applying a voltage of, for example, up to 1500 V. The M measuring device 21 measures the current flowing between the main electrodes while a voltage is applied by the M power supply 20. The M measuring device 21 is capable of measuring a current of, for example, up to 1 mA. The other configurations are the same as those of the preceding embodiment. In this embodiment, the voltage applied by the M power supply 20 corresponds to a first physical quantity, and the current measured by the M measuring device 21 corresponds to a second physical quantity.

[0093] <Overall flow of bias testing and electrical characteristic evaluation> Fig. 26 is a flowchart showing the processing executed by the test apparatus 1 (control unit 40). Fig. 27 is a timing chart of the bias test and electrical characteristic evaluation of a semiconductor device with a 1-in-1 package structure. In Fig. 27, the thick solid line indicates the voltage applied by the M power supply 20, and the thin solid line indicates the timing of measuring the current by the M measuring instrument 21. The thick dashed line indicates the voltage applied by the G power supply 10, and the thin dashed line indicates the timing of measuring the current by the G measuring instrument 11. The thick two-dot chain line indicates the current applied by the S power supply 30, and the thin two-dot chain line indicates the timing of measuring the voltage by the S measuring instrument 31.

[0094] As shown in Fig. 26 and Fig. 27, the test apparatus 1 (control unit 40) first executes a bias test in any one of a high temperature environment, a low temperature environment, and a high temperature and high humidity environment (step S10B). The control unit 40 executes the bias test for a specified time out of the total current application time. The specified time may be a uniform value, or may be varied depending on the number of times step S10B is executed. As an example, in this embodiment, the specified time is uniform (constant value) at n hours.

[0095] When the bias test for the specified time is completed, the control unit 40 then determines whether or not the entire current-on time of the bias test has been completed (step S15B). If the entire current-on time has been completed, the control unit 40 ends the series of processes shown in FIG. 26, that is, the bias test and the electrical characteristic evaluation process. The entire current-on time and the specified time are set in advance. The control unit 40 controls the driving of the power supplies 10, 20, and 30 so as to secure the specified time, and therefore the entire current-on time.

[0096] If the entire current application time has not ended, the control unit 40 executes the process of step S20, that is, the process of evaluating the electrical characteristics, as in Fig. 6. After executing the electrical characteristic evaluation, the control unit 40 executes the processes from step S10B onwards again. In this way, the control unit 40 temporarily stops the bias test and executes the process of evaluating the electrical characteristics in the middle of the bias test.

[0097] <Bias test> Fig. 28 is a flowchart showing the bias test, which illustrates the process of step S10B in Fig. 26.

[0098] 27 and 28, the control unit 40 first drives the S power supply 30 to apply a small current for temperature measurement between the collector and emitter (step S140). Then, while the S power supply 30 is applying a current, the control unit 40 acquires the measurement result of the voltage Vce by the S measuring instrument 31, that is, measures the voltage (step S141), and cuts off the application of the current by the S power supply 30 (step S142). The control unit 40 derives the temperature based on the acquired voltage.

[0099] Next, the control unit 40 drives the M power supply 20 to apply a high voltage between the collector and emitter (step S143). Then, while a voltage is being applied by the M power supply 20, the control unit 40 acquires the measurement result of the current Ic by the M measuring device 21, that is, measures the voltage (step S144). In this way, the control unit 40 monitors the current Ic when a high voltage is being applied. Also, while a voltage is being applied by the M power supply 20, the control unit 40 acquires the measurement result of the current Ige by the G measuring device 11, that is, measures the current (step S145). In this way, the control unit 40 monitors the presence or absence of the current Ige, that is, the gate leakage current Iges, when a high voltage is being applied. The gate leakage current is likely to increase, for example, at high temperatures.

[0100] Next, the control unit 40 cuts off the application of voltage by the M power supply 20 (step S146). Then, the control unit 40 drives the S power supply 30 again (step S147), and while the S power supply 30 is applying current, the control unit 40 obtains the measurement result of the voltage Vce by the S measuring instrument 31, that is, measures the voltage (step S148). The control unit 40 derives the temperature based on the voltage. After measuring the voltage, the control unit 40 cuts off the application of current by the S power supply 30 (step S149).

[0101] Next, the control unit 40 determines whether or not the specified time has been reached (step S150). If the specified time (n hours) has been reached, the control unit 40 ends the series of processes. If the specified time has not been reached, the control unit 40 executes the processes from step S143 onwards again.

[0102] Note that the processes of steps S142 and S147 may be omitted. That is, a current may be applied by the S power supply 30 from when the S power supply 30 is driven in step S140 until when the current is cut off in step S149.

[0103] <Electrical characteristic evaluation> 29 shows the measurement setup and waveform of the main withstand voltage leakage current Ices. The electrical characteristics evaluated during the bias test are, for example, at least one of the threshold voltage Vth, the gate leakage current Iges, and the main withstand voltage leakage current Ices in an IGBT.

[0104] 29, in order to evaluate the main breakdown voltage leakage current Ices, it is necessary to apply a voltage Vce between the collector and the emitter with the gate and the emitter shorted, and measure the current Ice flowing between the collector and the emitter. According to the test device 1 of this embodiment, it is possible to perform a bias test and evaluate electrical characteristics.

[0105] The evaluation of the threshold voltage Vth and the gate leakage current Iges is the same as in the preceding embodiment. FIG. 30 is a flowchart showing the evaluation of the main withstand voltage leakage current Ices. When evaluating the main withstand voltage leakage current Ices as an electrical characteristic, as shown in FIG. 27 and FIG. 30, the control unit 40 first drives the M power supply 20 so as to apply a predetermined voltage between the collector and the emitter (step S240). Then, the control unit 40 acquires the measurement result of the current by the M measuring device 21 in the state where the voltage is applied by the M power supply 20, that is, measures the voltage (step S241). Next, the control unit 40 determines whether the voltage applied by the M power supply 20 has reached an upper limit (step S242).

[0106] If the applied voltage has not reached the upper limit, the control unit 40 changes the setting of the applied voltage (step S243). The control unit 40 sets, for example, a voltage value one step higher. Then, the process from step S240 onwards is executed again. The control unit 40 drives the M power source 20 so as to apply the voltage set in step S243. If the applied voltage has reached the upper limit, the control unit 40 ends the series of processes.

[0107] As an example, in this embodiment, the electrical characteristics are evaluated in the order of the gate leakage current Iges, the threshold voltage Vth, the main withstand voltage leakage current Ices, and the gate leakage current Iges. First, it is evaluated whether there is a gate failure, and after evaluating the main withstand voltage leakage current Ices when a large voltage is applied, it is again evaluated whether there is a gate failure.

[0108] <Summary of the Fourth Embodiment> According to this embodiment, it is possible to achieve the effects described in the preceding embodiment. According to this embodiment, a bias test, which is a durability test, and an electrical characteristic evaluation can be performed by a common (single) test apparatus 1. The test apparatus 1 can temporarily stop the bias test and evaluate the electrical characteristics during the bias test. Since the electrical characteristic evaluation can be performed without removing the semiconductor device from the test apparatus 1, it is possible to improve the accuracy of the durability test data while evaluating the state in which the electrical characteristics change over time.

[0109] The M power supply 20 (second power supply) may apply a voltage between the main electrodes as the first physical quantity, and the M measuring device 21 (second measuring device) may measure a current between the main electrodes as the second physical quantity. This allows, for example, the main breakdown voltage leakage current Ices to be evaluated in addition to the bias test.

[0110] As the electrical characteristics, at least one of the gate leakage current Iges, the threshold voltage Vth, and the main withstand voltage leakage current Ices may be evaluated. According to this embodiment, the endurance test (bias test) and the evaluation of at least one of the gate leakage current Iges, the threshold voltage Vth, and the main withstand voltage leakage current Ices can be performed by a common test device 1. The main withstand voltage leakage current Ices corresponds to the leakage current between the main electrodes.

[0111] <Modification> Although the bias test and electrical characteristic evaluation for a semiconductor device having a 1-in-1 package structure have been described, the same bias test and electrical characteristic evaluation are also performed for a semiconductor device having a 2-in-1 package structure, since testing is performed on one arm at a time.

[0112] As in the previous embodiment, the semiconductor element 50 may include a MOSFET. In this case, the forward voltage Vf of a diode connected in antiparallel may be evaluated as the electrical characteristic.

[0113] For example, in the case of a SiC-MOSFET, a negative voltage may be applied to the gate to suppress gate leakage. FIG. 31 shows a modified example of the bias test. After step S142 is completed and before step S143 is executed, the control unit 40 executes the process of step S143P so as to apply a predetermined negative voltage to the gate in step S143P. After step S146 is completed and before step S147 is executed, the control unit 40 executes the process of step S147P. In step S147P, the control unit 40 cuts off the application of a voltage (negative voltage) by the G power supply 10. The other processes are the same as those shown in FIG. 28.

[0114] 32 shows a modified example of the evaluation of the main breakdown voltage leakage current Ices. For example, in the case of a SiC-MOSFET, before executing step S240, the process of step S240P is executed. In step S240P, the control unit 40 drives the G power supply 10 so as to apply a predetermined negative voltage to the gate. The other processes are the same as those shown in FIG.

[0115] (Other embodiments) The disclosure in this specification and drawings, etc. is not limited to the exemplified embodiments. The disclosure includes the exemplified embodiments and modifications by those skilled in the art based thereon. For example, the disclosure is not limited to the combination of parts and / or elements shown in the embodiments. The disclosure can be implemented by various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure includes the omission of parts and / or elements of the embodiments. The disclosure includes the substitution or combination of parts and / or elements between one embodiment and another embodiment. The disclosed technical scope is not limited to the description of the embodiments. Some disclosed technical scopes are indicated by the description of the claims, and should be interpreted as including all modifications within the meaning and scope equivalent to the description of the claims.

[0116] The disclosure in the specification and drawings is not limited by the claims. The disclosure in the specification and drawings includes the technical ideas described in the claims, and extends to more diverse and broader technical ideas than the technical ideas described in the claims. Therefore, various technical ideas can be extracted from the disclosure in the specification and drawings without being bound by the claims.

[0117] When an element or layer is referred to as being "on," "coupled," "connected," or "bonded," it may be directly coupled, connected, or bonded to another element or layer, and intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly coupled," "directly connected," or "directly bonded" to another element or layer, there are no intervening elements or layers. Other words used to describe relationships between elements should be construed in a similar manner (e.g., "between" vs. "directly between," "adjacent" vs. "directly adjacent," etc.). As used in this specification, the term "and / or" includes any and all combinations of one or more of the associated listed items. That is, a reference to A and / or B means at least one of A and B.

[0118] Spatially relative terms such as "inside," "outside," "back," "bottom," "low," "top," "top," and the like are utilized herein to facilitate the description of the relationship of one element or feature to another element or feature as depicted in the figures. Spatially relative terms may be intended to encompass different orientations of the device during use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "directly below" other elements or features would be oriented "above" the other elements or features. Thus, the term "bottom" can encompass both an orientation of top and bottom. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used in this specification would be interpreted accordingly.

[0119] Although an example in which the control unit 40 includes a CPU as a processor has been shown, this is not limiting. An MPU, a GPU, a DFP, or the like may also be adopted. MPU is an abbreviation for Micro-Processing Unit. GPU is an abbreviation for Graphics Processing Unit. DFP is an abbreviation for Data Flow Processor. ASIC is an abbreviation for Application Specific Integrated Circuit. FPGA is an abbreviation for Field-Programmable Gate Array.

[0120] Some or all of the functions of the processor may be realized by combining multiple types of arithmetic processing devices. Some or all of the functions of the processor may be realized using SoC, ASIC, FPGA, etc. SoC is an abbreviation for System on Chip. ASIC is an abbreviation for Application Specific Integrated Circuit. FPGA is an abbreviation for Field-Programmable Gate Array. Some or all of the functions of the processor may be realized using hardware logic circuits.

[0121] The program may be stored in a computer-readable non-transitory tangible storage medium as instructions executed by a computer. The program may be stored in a storage medium such as an HDD, an SSD, or a flash memory. HDD is an abbreviation for Hard-disk Drive. SSD is an abbreviation for Solid State Drive. [Explanation of symbols]

[0122] 1...Test device, 10...G power supply, 101...G1 power supply, 102...G2 power supply, 11...G measuring device, 111...G1 measuring device, 112...G2 measuring device, 20...M power supply, 21...M measuring device, 211...M1 measuring device, 212...M2 measuring device, 30...S power supply, 301...S1 power supply, 302...S2 power supply, 31...S measuring device, 311...S1 measuring device, 312...S2 measuring device, 40...Control unit, 50, 50U, 50L...Semiconductor element, 51...IGBT, 52...Diode, 53...Semiconductor device, 54...Sealing body, 54a, 54b...Side, 55, 56, 57...Main terminal, 58...Signal terminal, 58KeU, 58KeL...Kelvin emitter terminal, 59U, 59L...Inspection terminal

Claims

1. A test apparatus for performing a durability test on a semiconductor device including a semiconductor element, A first power source (10) that applies a voltage to a gate of the semiconductor element; a first measuring device (11) for measuring gate characteristics while applying a voltage from the first power supply; a second power source (20) for applying a first physical quantity, which is one of a current and a voltage, between main electrodes of the semiconductor element; a second measuring device (21) that measures a second physical quantity, which is the other one of the current and the voltage between the main electrodes, while the first physical quantity is applied by the second power source; A third power source (30) that applies a current between the main electrodes; a third measuring device (31) for measuring a voltage between the main electrodes while a current is applied by the third power source; a control unit (40) that controls driving of the first power source, the second power source, and the third power source; Equipped with the control unit is capable of switching between the durability test and an electrical characteristic evaluation in which the durability test is temporarily stopped and electrical characteristics are measured during the durability test, In the durability test, the control unit drives the first power supply and the second power supply while applying a current from the third power supply and monitoring a temperature of the semiconductor element based on a voltage measured by the third measuring device; In the electrical characteristic evaluation, the control unit drives at least one of the first power supply, the second power supply, and the third power supply to evaluate the electrical characteristics.

2. the second power supply applies, as the first physical quantity, a current greater than a current applied between the main electrodes by the third power supply; The test apparatus according to claim 1 , wherein the second measuring device measures a voltage between the main electrodes as the second physical quantity.

3. 3. The test apparatus according to claim 2, wherein the durability test is a power cycle test.

4. The test device according to claim 2 , wherein the durability test is a continuous current test.

5. 5. The test device according to claim 2, wherein the electrical characteristic is at least one of a gate leakage current, a threshold voltage of the semiconductor element, a saturation voltage between the main electrodes, and a forward voltage of a diode provided in the semiconductor element.

6. the second power supply applies a voltage between the main electrodes as the first physical quantity; The test apparatus according to claim 1 , wherein the second measuring device measures a current between the main electrodes as the second physical quantity.

7. 7. The testing apparatus according to claim 6, wherein the durability test is a bias test in any one of a high-temperature environment, a low-temperature environment, and a high-temperature and high-humidity environment.

8. 8. The test apparatus according to claim 7, wherein the electrical characteristic is at least one of a gate leakage current, a threshold voltage of the semiconductor element, and a leakage current between the main electrodes.

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