Image sensing device

The image sensing device addresses the challenge of suboptimal light utilization by employing a dual pixel separation structure within the device, resulting in improved quantum efficiency through enhanced light concentration and separation.

JP2025063808APending Publication Date: 2025-04-16SK HYNIX INC
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Patent Information

Application Number
JP2024034586
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-10-04
Filing Date
2024-03-07
Publication Date
2025-04-16

AI Technical Summary

Technical Problem

Existing image sensing devices face challenges in improving pixel separation structures for efficient light utilization, leading to suboptimal quantum efficiency.

Method used

The proposed image sensing device incorporates a dual pixel separation structure, featuring an external structure between pixel blocks and an internal structure within each block, with the internal structure including a first pixel separation structure overlapping the microlens center and a second structure overlapping its edges, optimized to enhance light concentration and separation.

Benefits of technology

This configuration significantly improves the utilization efficiency of incident light by optimizing the pixel separation structures, thereby enhancing the quantum efficiency of the image sensing device.

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Abstract

To increase the utilization efficiency of incident light by improving a pixel separation structure.SOLUTION: An image sensing device according to one embodiment of the present technology includes: a plurality of pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) which is arranged in a first direction X and a second direction Y intersecting with the first direction X, and each of which includes a plurality of unit pixels (PX_R, PX_Gr, PX_Gb, PX_B) that shares one microlens 144; an outer pixel separation structure DTI_O that is located between the pixel blocks to separate the pixel blocks; and an internal pixel separation structure DTI_I that is located between the unit pixels in the pixel block to separate the unit pixels. The internal pixel separation structure DTI_I may include a first pixel separation structure DTI 1 having a structure different from the outer pixel separation structure DTI_O.SELECTED DRAWING: Figure 2
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Description

[Technical field]

[0001] The present invention relates to an image sensing device. [Background technology]

[0002] Image sensing devices are devices that capture images using the properties of semiconductors that react to light. Recently, with the development of the computer and communication industries, there has been an increasing demand for image sensors with improved performance in various fields, such as digital cameras, camcorders, PCS (Personal Communication Systems), game consoles, security cameras, medical micro cameras, and robots.

[0003] Image sensing devices can be broadly divided into image sensing devices using a CCD (Charge Coupled Device) and image sensing devices using a CMOS (Complementary Metal Oxide Semiconductor). Recently, image sensing devices using CMOS have been widely used due to the advantage that analog and digital control circuits can be directly implemented on a single integrated circuit (IC). Summary of the Invention [Problem to be solved by the invention]

[0004] An embodiment of the present invention aims to provide an image sensing device capable of improving the utilization efficiency (quantum efficiency) of incident light by improving a pixel isolation structure that isolates photoelectric conversion elements of a unit pixel. [Means for solving the problem]

[0005] An image sensing device according to one embodiment of the present invention may include a plurality of pixel blocks arranged in a first direction and a second direction intersecting the first direction, each including a plurality of unit pixels sharing one microlens, an external pixel isolation structure positioned between the pixel blocks to separate the pixel blocks, and an internal pixel isolation structure positioned between the unit pixels within the pixel blocks to separate the unit pixels, wherein the internal pixel isolation structure may include a first pixel isolation structure having a different structure from the external pixel isolation structure.

[0006] An image sensing device according to another embodiment of the present invention may include a plurality of unit pixels having color filters of the same color and sharing one microlens, and a pixel separation structure located between photoelectric conversion elements of the plurality of unit pixels, wherein the pixel separation structure may include a first pixel separation structure located to overlap with a center portion of the microlens, and a second pixel separation structure located to overlap with an edge portion of the microlens and having a structure different from the first pixel separation structure.

[0007] The technical problems of the present invention are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description. Effect of the Invention

[0008] The embodiments of the present invention can increase the efficiency of incident light utilization by improving the pixel separation structure. [Brief description of the drawings]

[0009] [Figure 1] 1 is a block diagram illustrating a schematic configuration of an image sensing device according to an embodiment of the present invention; [Diagram 2] 2 is a diagram illustrating an example of a planar structure of some pixel blocks in the pixel region of FIG. 1; [Diagram 3]3 is a plan view showing in more detail and enlarged form the pixel isolation structure of region "A" in FIG. 2. FIG. [Figure 4a] 3 is a cross-sectional view exemplarily showing a shape cut along the cutting line X1-X1' in FIG. 2. FIG. [Figure 4b] 3 is a cross-sectional view exemplarily showing a shape cut along the cutting line X2-X2' in FIG. 2. FIG. [Figure 4c] 3 is a cross-sectional view exemplarily showing a shape cut along the cutting line X3-X3' in FIG. 2. FIG. [Diagram 5] 13 is a diagram illustrating an example of a planar structure of a pixel block according to another embodiment of the present invention; [Figure 6] 6 is a plan view showing in more detail and enlarged form the pixel isolation structure of region "B" in FIG. 5. FIG. [Figure 7a] 13 is a diagram illustrating a planar structure of an internal pixel isolation structure according to another embodiment of the present invention; FIG. [Figure 7b] 13 is a diagram illustrating a planar structure of an internal pixel isolation structure according to another embodiment of the present invention; FIG. [Figure 7c] 13 is a diagram illustrating a planar structure of an internal pixel isolation structure according to another embodiment of the present invention; FIG. [Figure 7d] 13 is a diagram illustrating a planar structure of an internal pixel isolation structure according to another embodiment of the present invention; FIG. [Figure 7e] 13 is a diagram illustrating a planar structure of an internal pixel isolation structure according to another embodiment of the present invention; FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, some embodiments of the present invention will be described in detail with reference to exemplary drawings. In attaching reference numerals to components in each drawing, it should be noted that the same components are given the same numerals as much as possible even if they are displayed in different drawings. In addition, in describing the embodiments of the present invention, if a detailed description of related known configurations or functions is deemed to hinder understanding of the embodiments of the present invention, the detailed description will be omitted.

[0011] FIG. 1 is a block diagram showing a schematic configuration of an image sensing device according to an embodiment of the present invention.

[0012] As shown in FIG. 1, the image sensing device may include a pixel region 100, a row driver 200, a correlated double sampler (CDS) 300, an analog-to-digital converter (ADC) 400, an output buffer 500, a column driver 600, and a timing controller 700.

[0013] The pixel region 100 may include a plurality of pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) that are continuously arranged in a row direction and a column direction. The pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) may be arranged to be adjacent to each other in a 2×2 form in a Bayer pattern. Each of the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) may include a structure in which a plurality of unit pixels having the same color are arranged to be adjacent to each other in a N×N form (N is a natural number equal to or greater than 2). Each unit pixel may include a photoelectric conversion element (e.g., PD, Photo Diode) that converts incident light to generate an electric signal (pixel signal). One microlens may be formed in each of the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B). The structure of such pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) will be described in more detail below.

[0014] The pixel area 100 may receive driving signals, such as a row selection signal, a reset signal, and a transmission signal, from a row driver 200. When a unit pixel receives the driving signals, the unit pixel is activated to perform an operation corresponding to the row selection signal, the reset signal, and the transmission signal.

[0015] The row driver 200 may operate the unit pixels based on a control signal provided from a control circuit such as the timing controller 700. The row driver 200 may select at least one unit pixel connected to at least one row line of the pixel array 100. The row driver 200 may generate a row selection signal for selecting at least one row line among a plurality of row lines. The row driver 200 may sequentially enable a reset signal and a transmission signal for the unit pixels of the selected row line. A pixel signal generated in the unit pixel of the selected row line may be output to the correlated double sampler 300.

[0016] The correlated double sampler 300 can remove an unwanted offset value of a unit pixel by using a correlated double sampling (CDS) method. For example, the correlated double sampler 300 can remove an unwanted offset value of a unit pixel by comparing an output voltage of the unit pixel obtained before and after a photocharge generated by incident light is accumulated in a sensing node (floating diffusion node). Through this, a pixel signal generated only by incident light without a noise component can be obtained. The correlated double sampler 300 can sequentially sample and hold a voltage level of a reference signal and a voltage level of a pixel signal received from the pixel array 100 through a plurality of column lines based on a clock signal provided by the timing controller 700. The correlated double sampler 300 can output the reference signal and the pixel signal to the analog-to-digital converter 400 as a correlated double sampling (CDS) signal.

[0017] The analog-to-digital converter 400 may convert the CDS signal received from the correlated double sampler 300 into a digital signal. The analog-to-digital converter 400 may include a ramp-comparison type analog-to-digital converter. The analog-to-digital converter 400 may generate a comparison signal by comparing a ramp signal provided from the timing controller 700 with the CDS signal provided from the correlated double sampler 300. The analog-to-digital converter 400 may count a level transition time of the comparison signal based on the ramp signal provided from the timing controller 700 and output the count value to the output buffer 500.

[0018] The output buffer 500 may temporarily store data in units of columns provided from the analog-to-digital converter 300 under the control of the timing controller 170. The output buffer 500 may operate as an interface to compensate for a difference in transmission (or processing) speed between the image sensing device and another device connected thereto.

[0019] The column driver 600 can select a column of the output buffer 500 under the control of the timing controller 700, and sequentially output data temporarily stored in the selected column of the output buffer 500. When the column driver 600 receives an address signal from the timing controller 700, the column driver 600 can generate a column selection signal based on the address signal to select a column of the output buffer 500, thereby controlling image data from the selected column of the output buffer 500 to be output as an output signal.

[0020] The timing controller 700 may generate signals for controlling operations of the row driver 200, the analog-digital converter 400, the output buffer 500, and the column driver 600. The timing controller 700 may provide a clock signal required for the operation of each component of the image sensing device, a control signal for timing control, and an address signal for selecting a row or a column to the row decoder 200, the column driver 600, the analog-digital converter 400, and the output buffer 500. According to an embodiment, the timing controller 700 may include a logic control circuit, a Phase Lock Loop (PLL) circuit, a timing control circuit, a communication interface circuit, and the like.

[0021] Fig. 2 is a diagram showing an example of a planar structure of a portion of a pixel block in the pixel region of Fig. 1. Fig. 3 is a plan view showing a pixel isolation structure of region "A" in Fig. 2 in more detail and enlarged form.

[0022] As shown in FIGS. 2 and 3, the pixel area 100 may include a number of pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) arranged consecutively in a row direction and a column direction.

[0023] Each pixel block (PB_R, PB_Gr, PB_Gb, PB_B) may include a plurality of unit pixels (PX_R, PX_Gr, PX_Gb, PX_B) having the same color and arranged adjacent to each other in a form of N×N (N is a natural number equal to or greater than 2). One microlens 144 may be formed in each pixel block (PB_R, PB_Gr, PB_Gb, PB_B).

[0024] For example, the pixel block (PB_R) may have four unit pixels (PX_R) having red color filters arranged adjacent to each other in a 2×2 configuration, and the four unit pixels (PX_R) may share one microlens 144. The pixel block (PB_Gr) may have four unit pixels (PX_Gr) having green color filters arranged adjacent to each other in a 2×2 configuration, and the four unit pixels (PX_Gr) may share one microlens 144. The pixel block (PB_Gb) may have four unit pixels (PX_Gb) having green color filters arranged adjacent to each other in a 2×2 configuration, and the four unit pixels (PX_Gb) may share one microlens 144. The pixel block (PB_B) may have four unit pixels (PX_B) having blue color filters arranged adjacent to each other in a 2×2 configuration, and the four unit pixels (PX_B) may share one microlens 144. Such pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) may be arranged in a Bayer pattern.

[0025] Each unit pixel (PX_R, PX_Gr, PX_Gb, PX_B) may include a photoelectric conversion element in a substrate, and adjacent photoelectric conversion elements may be physically separated by a pixel isolation structure. The pixel isolation structure may include an outer pixel isolation structure (DTI_O) and an inner pixel isolation structure (DTI_I) formed in the substrate. The outer pixel isolation structure (DTI_O) and the inner pixel isolation structure (DTI_I) may include a front deep trench isolation (FDTI) or a back deep trench isolation (BDTI) structure. For example, the outer pixel isolation structure (DTI_O) and the inner pixel isolation structure (DTI_I) may include an FDTI or BDTI structure penetrating the substrate.

[0026] The outer pixel isolation structure (DTI_O) may be formed between adjacent pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) to surround each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). The outer pixel isolation structure (DTI_O) may include a conductive material 116a and an insulating material 116b. For example, the outer pixel isolation structure (DTI_O) may include an insulating material 116b formed on a sidewall of a pixel isolation trench formed by etching a substrate, and a conductive material 116a located between the insulating material 116b so that the pixel isolation trench is gap-filled. The conductive material 116a may include doped polysilicon or a metallic material implanted with ions. The insulating material 116b may include a material having a lower light absorption rate than the conductive material 116a. For example, the insulating material 116a may include an oxide film.

[0027] The internal pixel isolation structure (DTI_I) may be located between adjacent unit pixels (PX_R, PX_Gr, PX_Gb, PX_B) in each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). The internal pixel isolation structure (DTI_I) may include a first pixel isolation structure (DTI1) and a second pixel isolation structure (DTI2).

[0028] The first pixel isolation structure (DTI1) may be located in a portion between adjacent unit pixels (PX_R, PX_Gr, PX_Gb, PX_B) in each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). For example, the first pixel isolation structure (DTI1) may be located to overlap with a center of the microlens 144 in each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). The center of the microlens 144 may refer to an area within a certain distance from the center point of the microlens 144.

[0029] The first pixel isolation structure (DTI1) may be connected to the second pixel isolation structure (DTI2) and may be formed to extend from the second pixel isolation structure (DTI2) to the center of the pixel block (PB_R, PB_Gr, PB_Gb, PB_B). For example, the first pixel isolation structure (DTI1) may be formed in a "+" shape in which a portion extending in a line type in a first direction (e.g., X direction) between the second pixel isolation structures (DTI2) and a portion extending in a line type in a second direction (Y direction) intersect with each other at the center of the pixel block (PB_R, PB_Gr, PB_Gb, PB_B).

[0030] The first pixel isolation structure (DTI1) may be formed to have a narrower width (length in the minor axis direction) than the second pixel isolation structure (DTI2). For example, the width (W) of the first pixel isolation structure (DTI1) may be formed to be equal to or less than twice the thickness of the insulating material 116b of the second pixel isolation structure (DTI2).

[0031] The first pixel isolation structure (DTI1) may include an insulating material 116b. For example, the first pixel isolation structure (DTI1) may include a structure in which the insulating material 116b is gap-filled without the conductive material 116a in a pixel isolation trench etched from a substrate.

[0032] The second pixel isolation structure (DTI2) may be located in a portion between adjacent unit pixels (PX_R, PX_Gr, PX_Gb, PX_B) in each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). For example, the first pixel isolation structure (DTI1) may be located in a region overlapping an edge portion of the microlens 144 in each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). The edge portion of the microlens 144 may refer to an outer region of the center of the microlens 144.

[0033] The second pixel isolation structure (DTI2) may have both ends connected to the outer pixel isolation structure (DTI_O) and the first pixel isolation structure (DTI1). For example, the second pixel isolation structure (DTI2) may be formed as a line type extending from the outer pixel isolation structure (DTI_O) to the first pixel isolation structure (DTI1). The second pixel isolation structure (DTI2) may have the same width as the outer pixel isolation structure (DTI_O).

[0034] The second pixel isolation structure (DTI2) may include a conductive material 116a and an insulating material 116b. For example, the second pixel isolation structure (DTI2) may include the same structure as the outer pixel isolation structure (DTI_O).

[0035] The first pixel isolation structure (DTI1) may be formed when the insulating material 116b of the outer pixel isolation structure (DTI_O) and the second pixel isolation structure (DTI2) is formed. For example, when a trench (first pixel isolation trench) for forming the first pixel isolation structure (DTI1) and a trench (second pixel isolation trench) for forming the second pixel isolation structure (DTI2) are formed, the width of the first pixel isolation trench may be set to be equal to or less than twice the thickness of the insulating material 116b to be formed in the second pixel isolation structure (DTI2). Thus, when an insulating film formation process is performed on the sidewalls of the first pixel isolation trench and the second pixel isolation trench, the insulating material 116b is formed only on the sidewalls of the second pixel isolation trench, while the first pixel isolation trench may be gap-filled with the insulating material 116b.

[0036] For example, the insulating material 116b may be formed by oxidizing the sidewalls of the first pixel isolation trench and the second pixel isolation trench through a thermal treatment process, or the insulating material 116b may be formed on the sidewalls of the first pixel isolation trench and the second pixel isolation trench through a deposition process.

[0037] If the first pixel isolation trench is gap-filled with the insulating material 116b and then the second pixel isolation trench is gap-filled with the conductive material 116a in a subsequent process, the conductive material 116a may be included in the second pixel isolation structure (DTI2) but not in the first pixel isolation structure (DTI1), as shown in Figure 3. The outer pixel isolation structure (DTI_O) may be formed in the same manner as the second pixel isolation structure (DTI2).

[0038] In an image sensing device using a trench structure in which a substrate is etched, such as DTI, a conductive material is formed in the trench and a negative voltage can be applied to the conductive material in order to control dark noise that may occur at the interface of the trench. However, in a structure in which a plurality of unit pixels (PX_R, PX_Gr, PX_Gb, PX_B) of each pixel block (PB_R, PB_Gr, PB_Gb, PB_B) share one microlens, as in the present embodiment, a large amount of light incident through the microlens 144 may be concentrated at the center of the pixel block (PB_R, PB_Gr, PB_Gb, PB_B).

[0039] Therefore, when the pixel separation structure in the center of the pixel block (PB_R, PB_Gr, PB_Gb, PB_B) contains a conductive material, the conductive material absorbs light well, so a large amount of incident light may be absorbed by the conductive material without being converted into photocharges (electrons). In such a case, the utilization efficiency (quantum efficiency) of the incident light becomes low.

[0040] In this embodiment, the pixel separation structure formed in the area where the incident light is not concentrated includes a conductive material for controlling dark noise, and the pixel separation structure formed in the area where the incident light is concentrated does not include a conductive material, thereby increasing the quantum efficiency of the image sensing device.

[0041] 4a to 4c are cross-sectional views exemplarily showing shapes cut along cutting lines X1-X1', X2-X2' and X3-X3' in FIG. 2, respectively.

[0042] The pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) may have the same structure except for the color of the color filters. Therefore, in this embodiment, the structure of only one pixel block (PB_Gb) will be described.

[0043] As shown in FIGS. 4 a to 4 c , the pixel area 100 may include a substrate layer 110 , a grid structure 120 , a color filter layer 130 and a lens layer 140 .

[0044] The substrate layer 110 may include a substrate 112, a photoelectric conversion element 114, and pixel isolation structures (DTI_O, DTI_I). The substrate layer 110 may include a first surface (rear surface) and a second surface (front surface) located opposite to the first surface. The first surface is a surface to which light is incident from the outside, and a grid structure 120, a color filter layer 130, and a lens layer 140 may be formed thereon. A pixel transistor (not shown) for reading out photocharges generated in the photoelectric conversion region 114 of the unit pixel may be formed in each unit pixel region on the second surface.

[0045] The substrate 112 may include a semiconductor substrate including single crystal silicon. The substrate 112 may include a P-type impurity.

[0046] The photoelectric conversion elements 114 may be formed in the substrate 112 to correspond to each unit pixel. The photoelectric conversion elements 114 may generate photocharges by photoelectrically converting visible light incident through the lens layer 140 and the color filter layer 130. The photoelectric conversion elements 114 may include N-type impurities.

[0047] The pixel isolation structures (DTI_O, DTI_I) may be located between adjacent photoelectric conversion elements 114 in the substrate 112 to isolate the photoelectric conversion elements 114. The pixel isolation structures (DTI_O, DTI_I) may include an external pixel isolation structure (DTI_O) located outside the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) and an internal pixel isolation structure (DTI_I) located within the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B). The internal pixel isolation structure (DTI_I) may include a first pixel isolation structure (DTI1) and a second pixel isolation structure (DTI2). The pixel isolation structures (DTI_O, DTI_I) may include an FDTI or BDTI structure penetrating the substrate 112.

[0048] An exterior pixel isolation structure (DTI_O) may be formed between the photoelectric conversion elements 114 of adjacent pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B) within the substrate 112, and an interior pixel isolation structure (DTI_I) may be formed between adjacent photoelectric conversion elements 114 within each pixel block (PB_R, PB_Gr, PB_Gb, PB_B).

[0049] The outer pixel isolation structure (DTI_O) and the second pixel isolation structure (DTI2) may include the same structure. For example, the outer pixel isolation structure (DTI_O) and the second pixel isolation structure (DTI2) may include an insulating material 116b formed on sidewalls of the pixel isolation trenches and a conductive material 116a formed between the insulating material 116b such that the pixel isolation trenches are gap filled.

[0050] In the internal pixel isolation structure (DTI_I), the first pixel isolation structure (DTI1) may be located between the photoelectric conversion elements 114 so as to overlap with the center of the microlens 144, and the second pixel isolation structure (DTI2) may be located between the photoelectric conversion elements 114 so as to overlap with the edge of the microlens 144.

[0051] The first pixel isolation structure (DTI1) may be formed to be narrower than the second pixel isolation structure (DTI2). The first pixel isolation structure (DTI1) may have a structure in which the conductive material 116a is not present and the gap is filled with the insulating material 116b. The first pixel isolation structure (DTI1) may be formed when the insulating material 116b of the outer pixel isolation structure (DTI_O) and the second pixel isolation structure (DTI2) are formed.

[0052] The grid structure 120 may be formed between the color filters on the first surface of the substrate 112 to prevent crosstalk between the color filters. For example, the grid structure 120 may not be formed in the pixel block (PB_R, PB_Gr, PB_Gb, PB_B) but may be formed between the color filters of the adjacent pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B). The grid structure 120 may include a metal (e.g., tungsten).

[0053] The color filter layer 130 may include a color filter that filters visible light from light incident through the lens layer 140. Although only one color filter is shown in Figs. 4a to 4c, the color filter layer 130 may include a red color filter formed in the pixel block (PB_R) and passing red visible light of a first wavelength band, a green color filter formed in the pixel blocks (PB_Gr, PB_Gb) and passing green visible light of a second wavelength band shorter than the first wavelength band, and a blue color filter formed in the pixel block (PB_B) and passing blue visible light of a third wavelength band shorter than the second wavelength band. The color filters may be located between the grid structures 120. One color filter shared by four unit pixels may be formed in each pixel block (PB_R, PB_Gr, PB_Gb, PB_B).

[0054] The lens layer 140 may include an overcoating layer 142 and a microlens 144. The overcoating layer 142 may be formed on the color filter layer 130. The overcoating layer 142 may act as a planarization layer to compensate for steps that may occur due to the color filter layer 130. The microlenses 144 may be formed on the overcoating layer 142 and may focus incident light onto the substrate layer 110. The microlenses 144 may be formed for each pixel block (PB_R, PB_Gr, PB_Gb, PB_B). The microlenses 144 may be formed of the same material as the overcoating layer 142.

[0055] 5 is a diagram illustrating an example of a planar structure of a pixel block according to another embodiment of the present invention, and FIG 6 is a plan view illustrating a pixel isolation structure of a region "B" in FIG 5 in more detail and enlarged.

[0056] In this embodiment, the only difference is the first pixel isolation structure formed in the center of each pixel block (PB_R, PB_Gr, PB_Gb, PB_B) compared to the embodiment of Figures 2 and 3 described above, and the other components are substantially the same in structure. Therefore, in this embodiment, the structures other than the first pixel isolation structure (DTI1') are given the same reference numerals as in Figures 2 and 3, and the description thereof may be omitted.

[0057] 5 and 6, the pixel isolation structure (DTI_O, DTI_I') may include an outer pixel isolation structure (DTI_O) and an inner pixel isolation structure (DTI_I'). The inner pixel isolation structure (DTI_I') may include a first pixel isolation structure (DTI1') and a second pixel isolation structure (DTI2).

[0058] The first pixel isolation structures DTI1' may include island-type pixel isolation structures located to overlap with the center of the microlens 144 in each of the pixel blocks PB_R, PB_Gr, PB_Gb, and PB_B. The first pixel isolation structures DTI1' may be arranged between the second pixel isolation structures DTI2 at regular intervals in the first direction (X direction) and the second direction (Y direction). Although FIG. 5 illustrates a shape in which three first pixel isolation structures DTI1' are arranged in each of the first direction and the second direction, this is not limiting. Also, FIG. 5 illustrates a case in which the first pixel isolation structures DTI1' are formed in a square shape on a plane, this is not limiting. For example, the first pixel isolation structures DTI1' may be formed in a rectangular, diamond, or circular shape.

[0059] Each of the first pixel isolation structures (DTI1') may include a structure in which the insulating material 116b is gap-filled in a pixel isolation trench penetrating the substrate. The insulating material 116b of the first pixel isolation structure (DTI1') may be formed together with the insulating material 116b of the outer pixel isolation structure (DTI_O) and the second pixel isolation structure (DTI2). The pixel isolation trench (third pixel isolation trench) in which the first pixel isolation structure (DTI1') is formed may be formed to a size that allows the third pixel isolation trench to be gap-filled with the insulating material 116b when the insulating material 116b of the outer pixel isolation structure (DTI_O) and the second pixel isolation structure (DTI2) is formed. For example, the length of the third pixel isolation trench in the first direction or the second direction may be equal to or less than twice the thickness of the insulating material 116b to be formed in the second pixel isolation structure (DTI2).

[0060] In an image sensing device using a trench structure in which a substrate is etched, such as a DTI, a passivation region may be formed by implanting ions (e.g., P-type ions) into a sidewall of the trench in order to reduce dark noise that may occur at the interface of the trench. The distance between adjacent first pixel isolation structures (DTI1') and second pixel isolation structures (DTI2) and the distance between adjacent first pixel isolation structures (DTI1') may be less than twice the length of the passivation region into which ions are implanted to reduce such dark noise (the length of the arrow in FIG. 6). For example, the first pixel isolation structure (DTI1') and the second pixel isolation structure (DTI2) may be formed to be spaced apart from each other by a distance that allows the passivation regions formed on the sidewalls of the third pixel isolation trench and the second pixel isolation trench to be connected to each other through a PLAD (PLAsma Doping) process. This allows the unit pixels (PX_R, PX_Gr, PX_Gb, PX_B) to be surrounded by their ion implantation regions (passivation regions) and isolated from one another.

[0061] 7a to 7e are diagrams illustrating exemplary planar structures of inner pixel separating structures according to other embodiments of the present invention.

[0062] As shown in Fig. 7a to Fig. 7e, the internal pixel isolation structure formed in the pixel block (PB_R, PB_Gr, PB_Gb, PB_B) may be formed in a form in which a pixel isolation structure including a conductive material and a pixel isolation structure not including a conductive material are variously combined. Hereinafter, for convenience of explanation, only differences from the above-mentioned embodiment will be described. Furthermore, hereinafter, among the internal pixel isolation structures not including a conductive material, a pixel isolation structure formed in a "+" shape will be referred to as a first pixel isolation structure (DTI1), and a pixel isolation structure formed in a rectangular island type will be referred to as a first pixel isolation structure (DTI1'). Also, an internal pixel isolation structure including a conductive material will be referred to as a second pixel isolation structure (DTI2).

[0063] As shown in Fig. 7a, the internal pixel isolation structure may include a first pixel isolation structure (DTI1) and a second pixel isolation structure (DTI2). The first pixel isolation structure (DTI1) may be formed in a "+" shape at the center of the pixel block (PB_R, PB_Gr, PB_Gb, PB_B) so as to overlap with the center of the microlens 144 as shown in Fig. 2. However, the first pixel isolation structure (DTI1) may be formed separately from the second pixel isolation structure (DTI2) without being connected thereto. In this case, the first pixel isolation structure (DTI1) and the second pixel isolation structure (DTI2) may be formed to be spaced apart from each other by a distance that allows the ion implantation regions of ions implanted through the PLAD process to contact each other as described above.

[0064] 7b, the internal pixel separating structure may include only a first pixel separating structure (DTI1) formed in the shape of a '+'. For example, the first pixel separating structure (DTI1) may be formed in such a manner that a first portion extending in a line type in a first direction and a second portion extending in a line type in a second direction intersect at the center of the pixel block (PB_R, PB_Gr, PB_Gb, PB_B) so as to overlap not only the center but also the edge portion of the microlens 144.

[0065] The first pixel isolation structure (DTI1) may be formed to be separated from the outer pixel isolation structure (DTI_O) by a certain distance without being connected thereto. In this case, the first pixel isolation structure (DTI1) and the outer pixel isolation structure (DTI_O) may be formed to be separated from each other by a distance that allows the ion implantation regions of ions implanted through the PLAD process to contact each other, as described above.

[0066] As shown in FIG. 7c, the inner pixel isolation structure may be formed such that the first pixel isolation structure (DTI1) is connected to the outer pixel isolation structure (DTI_O), unlike the structure of FIG. 7b.

[0067] As shown in Fig. 7d, the inner pixel isolation structure may include only first pixel isolation structures (DTI1') formed as island types spaced apart from each other at regular intervals. The first pixel isolation structures (DTI1') may all have the same size. The first pixel isolation structures (DTI1') and the outer pixel isolation structure (DTI_O) may be spaced apart from each other by a distance that allows the ion implantation regions of ions implanted through a PLAD process to contact each other.

[0068] 7e, the inner pixel isolation structure may be formed in a form in which first pixel isolation structures (DTI1, DTI1') of different structures are combined. For example, in the pixel blocks (PB_R, PB_Gr, PB_Gb, PB_B), a first pixel isolation structure (DTI1) in the shape of a '+' may be formed in a region overlapping with a center portion of the microlens 144, and an island-type first pixel isolation structure (DTI1') may be formed in a region overlapping with an edge portion of the microlens 144. In this case, the first pixel isolation structures (DTI1, DTI1') and the outer pixel isolation structure (DTI_O) may be formed to be spaced apart from each other by a distance that allows the ion implantation regions of ions implanted through the PLAD process to contact each other.

[0069] The above description is merely an illustrative example of the technical concept of the present invention, and various modifications and variations may be made by a person having ordinary skill in the art to which the present invention pertains without departing from the essential characteristics of the present invention.

[0070] Therefore, the embodiments disclosed in the present invention are intended to explain the technical idea of ​​the present invention, not to limit it, and the scope of the technical idea of ​​the present invention is not limited by such embodiments. The scope of protection of the present invention should be interpreted according to the claims, and all technical ideas within the equivalent range should be interpreted as being included in the scope of the present invention. [Explanation of symbols]

[0071] 100 pixel region 112 Substrate 114 Photoelectric conversion element 116a Conductive material 116b Insulating materials DTI_I Internal pixel isolation structure DTI_O External pixel isolation structure PB_R, PB_Gr, PB_Gb, PB_B pixel blocks

Claims

1. A plurality of pixel blocks are arranged in a first direction and a second direction intersecting the first direction, each pixel block including a plurality of unit pixels sharing one microlens; an outer pixel isolation structure disposed between the pixel blocks and isolating the pixel blocks; an internal pixel isolation structure located between the unit pixels in the pixel block to isolate the unit pixels; The internal pixel isolation structure includes a first pixel isolation structure having a different structure than the external pixel isolation structure.

2. The first pixel isolation structure includes: The image sensing device according to claim 1 , wherein the light emitting element is positioned so as to overlap with a central portion of the microlens.

3. The first pixel isolation structure includes:

3. The image sensing device of claim 2, wherein a first portion extending in a line type in the first direction and a second portion extending in a line type in the second direction intersect at a center of the pixel block.

4. The internal pixel isolation structure comprises: The image sensing device of claim 3 , further comprising a second pixel isolation structure having the same structure as the outer pixel isolation structure and extending in a line type between the outer pixel isolation structure and the first pixel isolation structure.

5. the second pixel isolation structure The image sensing device of claim 4 , wherein the external pixel isolation structure and the first pixel isolation structure are coupled together.

6. the second pixel isolation structure The image sensing device of claim 4 , wherein the first pixel isolation structure is isolated from the outer pixel isolation structure and the second pixel isolation structure is connected to the outer pixel isolation structure.

7. The first portion and the second portion are The image sensing device of claim 4 , wherein the second pixel isolation structure extends with a width narrower than that of the second pixel isolation structure.

8. the second pixel isolation structure includes an insulating material formed on sidewalls of a pixel isolation trench and a conductive material disposed between the insulating material such that the pixel isolation trench is gap filled; The image sensing device of claim 7 , wherein the first and second portions have a width that is equal to or less than twice the thickness of the insulating material.

9. The first portion and the second portion are The image sensing device according to claim 3 , wherein the first and second electrodes are extended to an area overlapping an edge of the microlens.

10. The first portion and the second portion are The image sensing device of claim 9 , coupled to the external pixel isolation structure.

11. The first portion and the second portion are The image sensing device of claim 9 , wherein the external pixel isolation structure is isolated.

12. The first pixel isolation structure includes: The image sensing device of claim 2 , comprising a plurality of island-type pixel separating structures arranged to be spaced apart at regular intervals in the first direction and the second direction.

13. The internal pixel isolation structure comprises: The image sensing device of claim 12 , further comprising a second pixel isolation structure having the same structure as the outer pixel isolation structure and extending in a line type between the outer pixel isolation structure and the first pixel isolation structure.

14. The plurality of island-type pixel isolation structures include: The image sensing device of claim 12 , wherein the first and second electrodes are arranged to extend to an area overlapping an edge of the microlens.

15. The first pixel isolation structure includes: In a region overlapping with a center of the microlens, a first portion extending in a line type in the first direction and a second portion extending in a line type in the second direction have a shape intersecting with each other at a center of the pixel block, The image sensing device of claim 2 , wherein a plurality of island-type pixel separating structures are arranged at regular intervals in the region overlapping with the edge portion of the microlens.

16. the outer pixel isolation structure includes a pixel isolation trench having an insulating material and a conductive material gap-filled therein; 2. The image sensing device of claim 1, wherein the first pixel isolation structure comprises a pixel isolation trench that is gap-filled with the insulating material without the conductive material.

17. the conductive material includes polysilicon or a metallic material; The image sensing device of claim 16 , wherein the insulating material comprises an oxide film.

18. A plurality of unit pixels each having a color filter of the same color and sharing one microlens; a pixel isolation structure located between the photoelectric conversion elements of the unit pixels; The pixel isolation structure includes: a first pixel separating structure positioned to overlap a center portion of the microlens; a second pixel separating structure positioned to overlap an edge portion of the microlens and having a structure different from that of the first pixel separating structure.

19. the second pixel isolation structure includes an insulating material formed on sidewalls of a second pixel isolation trench and a conductive material disposed between the insulating material such that the second pixel isolation trench is gap filled; 20. The image sensing device of claim 18, wherein the first pixel isolation structure comprises a structure in which a first pixel isolation trench is gap-filled with the insulating material without the conductive material.

20. the conductive material includes polysilicon or a metallic material; The image sensing device of claim 19 , wherein the insulating material comprises an oxide film.