Selector, semiconductor device including the same, and method for manufacturing the same

Abstract

To provide a selector having excellent electrical and physical characteristics by using carbon as a matrix of the selector, chemically reacting the carbon with a trivalent element, and then ion-implanting a dopant, a semiconductor device including the selector, and a method for manufacturing the same.SOLUTION: A selector according to an embodiment of the present invention is based on carbon and can include a dopant introduced by chemical bonding between carbon and a trivalent element and ion implantation. Also, a method for manufacturing a selector according to an embodiment of the present invention can include the steps of forming a carbon layer, chemically reacting a trivalent element with the carbon layer, and introducing a dopant by ion implantation.SELECTED DRAWING: Figure 1B

Description

[Technical field]

[0001] This patent document relates to memory circuits or devices and their application in semiconductor devices. [Background technology]

[0002] In recent years, due to miniaturization, low power consumption, high performance, and diversification of electronic devices, there is a demand for semiconductor devices capable of storing information in various electronic devices such as computers and portable communication devices, and research into this is ongoing. Among such semiconductor devices are semiconductor devices capable of storing data by utilizing the characteristic of switching between different resistance states depending on the applied voltage or current, such as RRAM (Resistive Random Access Memory), PRAM (Phase-change Random Access Memory), FRAM (Ferroelectric Random Access Memory), MRAM (Magnetic Random Access Memory), and electronic fuses (E-fuses). Summary of the Invention [Problem to be solved by the invention]

[0003] The problem to be solved by the embodiments of the present invention is to provide a selector having excellent electrical and physical properties by using carbon as the matrix of the selector, chemically reacting the carbon with a trivalent element, and then ion-implanting a dopant, a semiconductor device including the same, and a method for manufacturing the same. [Means for solving the problem]

[0004] A selector according to an embodiment of the present invention for solving the above problems is based on carbon and can include a dopant introduced by chemical bonding between carbon and a trivalent element and ion implantation.

[0005] In order to solve the above problem, a method for manufacturing a selector according to another embodiment of the present invention includes the steps of forming a carbon layer, chemically reacting a trivalent element with the carbon layer, and introducing a dopant by an ion implantation process.

[0006] In order to solve the above problems, a semiconductor device according to another embodiment of the present invention may include a selector pattern based on carbon and including a dopant introduced by chemical bonding between carbon and a trivalent element and ion implantation, and a memory pattern arranged above or below the selector pattern.

[0007] In order to solve the above problems, a manufacturing method of a semiconductor device according to another embodiment of the present invention includes the steps of forming a carbon layer on a substrate, chemically reacting a trivalent element with the carbon layer, introducing a dopant by an ion implantation process to form a selector layer, forming a memory layer on the upper or lower part of the selector layer, and etching the memory layer and the selector layer by an etching process using a mask pattern to form a memory cell including a memory pattern and a selector pattern. Effect of the Invention

[0008] According to the embodiments of the present invention, a selector having excellent electrical and physical properties, a semiconductor device including the same, and a manufacturing method thereof can be provided by using carbon as a matrix of the selector, chemically reacting the carbon with a trivalent element, and then ion-implanting a dopant. [Brief description of the drawings]

[0009] [Figure 1A] 5A to 5C are diagrams for explaining a method of manufacturing a selector according to one embodiment of the present invention. [Figure 1B] 5A to 5C are diagrams for explaining a method of manufacturing a selector according to one embodiment of the present invention. [Figure 1C] 5A to 5C are diagrams for explaining a method of manufacturing a selector according to one embodiment of the present invention. [Figure 2A] 1 is a diagram showing a semiconductor device according to an embodiment of the present invention; [Figure 2B] 1 is a diagram showing a semiconductor device according to an embodiment of the present invention; [Figure 3A] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 3B] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 3C] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 3D] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 3E] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 3F] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 3G] 1A to 1C are diagrams illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention. [Figure 4A] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device according to another embodiment of the present invention. [Figure 4B] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device according to another embodiment of the present invention. [Figure 4C] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device according to another embodiment of the present invention. [Figure 4D] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device according to another embodiment of the present invention. [Figure 4E] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device according to another embodiment of the present invention. [Figure 4F] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device according to another embodiment of the present invention. [Figure 4G] 10A to 10C are diagrams illustrating a method for manufacturing a semiconductor device according to another embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Various embodiments will now be described in detail with reference to the accompanying drawings.

[0011] The drawings are not necessarily drawn to scale, and in some instances, the proportions of at least some of the structures shown in the drawings may be exaggerated to more clearly illustrate the features of the embodiments. When a multi-layer structure having two or more layers is disclosed in the drawings or detailed description, the relative positions and order of the layers as shown reflects a particular embodiment only, and the present invention is not limited thereto, and the relative positions and order of the layers may vary. In addition, the drawings or detailed description of a multi-layer structure may not reflect all layers present in a particular multi-layer structure (e.g., one or more additional layers may be present between two layers shown). For example, when a first layer is on a second layer or on a substrate in a multi-layer structure in the drawings or detailed description, it may not only represent that the first layer can be formed directly on the second layer or directly on the substrate, but also represent that one or more other layers are present between the first layer and the second layer or between the first layer and the substrate.

[0012] 1A to 1C are diagrams illustrating a method for manufacturing a selector according to one embodiment of the present invention.

[0013] In the embodiment of FIGS. 1A to 1C, only the manufacturing method of the selector itself is shown, and the description of the structure other than the selector that can be disposed above and below the selector is omitted.

[0014] As shown in FIG. 1A, a carbon layer CL can be formed.

[0015] The carbon layer CL can act as a matrix that forms the base of the selector. The carbon layer CL is made of an amorphous phase and is easily chemically reactive. When a dopant such as arsenic (As) is ion-implanted, the carbon layer CL can easily form new structural bonds and can well maintain the metallic state of the dopant. Therefore, the ion-implanted dopant can more easily and efficiently form trap sites for conductive carriers, and the threshold switching operation characteristics of the selector can be effectively realized. In addition, since the carbon layer CL has a low density and a high thermal conductivity, a selector based on the carbon layer CL can have excellent electrical and physical properties.

[0016] The carbon layer CL may be formed by depositing carbon (C) by a physical deposition method, for example, physical vapor deposition or sputtering.

[0017] In one embodiment, the carbon layer CL contains carbon (C) atoms as a main component, and may further contain at least one of nitrogen (N) atoms, oxygen (O) atoms, or hydrogen (H) atoms in addition to carbon (C). In this case, at least one of nitrogen (N) atoms, oxygen (O) atoms, or hydrogen (H) atoms may be doped into the carbon layer CL by performing the carbon (C) deposition process in an atmosphere of at least one gas selected from nitrogen gas, oxygen gas, and hydrogen gas.

[0018] The carbon layer CL can be formed to a thickness T1.

[0019] As shown in FIG. 1B, a chemical reaction can be performed on the carbon layer CL to convert it into a chemically reactive layer 10A.

[0020] The chemical reaction shown in FIG. 1B means that a trivalent element is chemically reacted with the surface of the carbon layer CL. In other words, the trivalent element is not implanted into the carbon layer CL by the direct ion implantation method, but is chemically reacted with the element contained in the carbon layer CL. In the case of the direct ion implantation method, ions are bombarded with the carbon layer CL to introduce it into the inside, and the implanted ions do not chemically react with the element contained in the carbon layer CL to form a new structural bond. In this embodiment, the chemical reaction layer 10A can include a complex chemical bond between the element contained in the carbon layer CL and the trivalent element by the chemical reaction shown in FIG. 1B. As described above, the carbon layer CL can include carbon (C) atoms, and can optionally further include at least one of nitrogen (N) atoms, oxygen (O) atoms, or hydrogen (H) atoms in addition to the carbon (C) atoms. Therefore, the chemical reaction layer 10A can include carbon (C) as a main component and can include a complex chemical bond formed by a chemical reaction with a trivalent element. That is, the chemically reactive layer 10A can include chemical bonds between carbon (C) and a trivalent element formed by a chemical reaction, and in addition, can optionally include chemical bonds between at least one of nitrogen (N), oxygen (O), or hydrogen (H) and a trivalent element.

[0021] A trivalent element refers to an element having three valence electrons. Here, the valence electron refers to an electron that can participate in a chemical bond if the outer shell of an atom is not closed. The trivalent element chemically reacts with an element contained in the carbon layer CL to form a chemical bond, and traps a part of the conductive carriers by holes generated by the trivalent structure to prevent excess current, thereby controlling off current characteristics.

[0022] The trivalent element capable of chemically reacting with the element contained in the carbon layer CL can include at least one of boron (B), aluminum (Al), gallium (Ga), indium (In), or thallium (Tl).

[0023] In one embodiment, when the trivalent element includes boron (B), chemically reactive layer 10A may include complex chemical bonds of carbon (C), nitrogen (N), oxygen (O), hydrogen (H), or boron (B), such as at least one of a BC bond, a BN bond, or a BO bond.

[0024] The chemical reaction between the element contained in the carbon layer CL and the trivalent element may be a plasma chemical reaction, and may include a PLAD (plasma doping) process. When the trivalent element is chemically reacted with the carbon layer CL through the PLAD process, the trivalent element chemically reacts with elements containing carbon (C) on the surface and inside of the carbon layer CL to form new chemical bonds, and the carbon layer CL may be converted into a chemically reactive layer 10A having a structure and composition different from that of the carbon layer CL.

[0025] In one embodiment, the chemical reaction between the element contained in the carbon layer CL and the trivalent element is carried out with an energy of 1 to 5 KV and 2.5×10 15 ~2.5×10 16 cm -2 The PLAD process can be performed under the condition of the amount of trivalent element introduced of 1000 to 20000. If the amount of trivalent element introduced is outside the above range, the flexibility of the carbon that forms the base of the selector may decrease, and as a result, it may be difficult to ensure stable physical properties of the selector.

[0026] In one embodiment, when the trivalent element includes boron (B), the PLAD process includes adding B 2 H 6 or BF 3 This can be done using plasma, with energies of 1-5 KV and 2.5×10 15 ~2.5×10 16 cm -2 This can be achieved by the PLAD process, which is carried out under the condition of the amount of trivalent element introduced of B 2 H 6 or BF 3 Hydrogen (H) contained in the plasma can also form chemical bonds within the chemically reactive layer 10A.

[0027] Since the chemical reaction layer 10A includes chemical bonds generated by a chemical reaction, the thickness T2 of the chemical reaction layer 10A can be greater than the thickness T1 of the carbon layer CL. Such an increase in thickness can have a positive effect on ensuring stable physical properties of the selector that is finally formed. Specifically, in the subsequent process of dopant ion implantation during the formation of the selector, the chemical reaction layer 10A is inevitably damaged due to the ion implantation process, so that the selector can function even if it is damaged only if a minimum thickness is ensured. According to this embodiment, the thickness T2 of the chemical reaction layer 10A increases from the thickness T1 of the carbon layer CL before conversion due to the chemical reaction with the trivalent element shown in FIG. 2B, so that the stable physical properties of the selector that is finally formed can be ensured despite the damage caused by the subsequent ion implantation process.

[0028] In addition, the surface roughness of the chemical reaction layer 10A may be improved by chemical reaction between the elements contained in the carbon layer CL and the trivalent element. The carbon layer CL may have poor surface roughness because it is deposited by a sputtering method, but the surface roughness of the chemical reaction layer 10A is sufficiently reduced by forming complex chemical bonds through chemical reaction with the trivalent element, so that the surface roughness of the chemical reaction layer 10A can be maintained as a flat surface.

[0029] Additionally, the chemically reactive layer 10A exhibits improved density and flexibility compared to the carbon layer CL due to the newly formed complex chemical bonds, which may result in improved physical properties of the selector. As shown in FIG. 1C, a dopant can be introduced into chemically reactive layer 10A to form selector 10.

[0030] The dopants can form trapping sites for conductive carriers and enable the selector 10 to perform threshold switching operations.

[0031] The dopant may include, for example, at least one of arsenic (As), phosphorus (P), or antimony (Sb).

[0032] In one embodiment, the introduction of dopants can be done by an ion implantation process.

[0033] The selector 10 may be formed with a thickness T3. In one embodiment, the thickness T3 of the selector 10 may be the same as the thickness T2 of the chemically reactive layer 10A. In another embodiment, the thickness T3 of the selector 10 may be smaller than the thickness T2 of the chemically reactive layer 10A. This is because a portion of the top of the chemically reactive layer 10A may be lost due to damage that may occur during the ion implantation process.

[0034] The selector 10 according to the present embodiment formed according to the above-mentioned method may include amorphous carbon (C) as a main component and a dopant introduced by ion implantation, and may include a complex chemical bond formed by a chemical reaction between carbon (C) and a trivalent element. In addition to the chemical bond between carbon (C) and a trivalent element, the selector 10 may further include a chemical bond between at least one of nitrogen (N), oxygen (O), or hydrogen (H) and a trivalent element. The trivalent element may include at least one of boron (B), aluminum (Al), gallium (Ga), indium (In), or thallium (Tl), and the dopant may include at least one of arsenic (As), phosphorus (P), or antimony (Sb).

[0035] The selector 10 according to the present embodiment includes amorphous carbon (C) which is easily chemically reactive as a main component, unlike conventional doped nitride or oxide-based selectors, and can form complex structural bonds by chemical reaction between carbon (C), which is a tetravalent element, and a trivalent element, so that defects and vacancies can be formed in the selector 10. As a result, the metallic state of the dopant can be well maintained, and trap sites for conductive carriers can be formed more easily and efficiently, thereby further improving the electrical characteristics of the selector 10. In addition, the trivalent element chemically reacted with carbon traps a portion of the conductive carriers to prevent excess current, thereby controlling the off-current characteristics. In addition, the physical characteristics of the selector 10 can be improved based on the essential characteristics of carbon, which is the main component. On the other hand, when the selector 10 further contains at least one of nitrogen (N), oxygen (O) and hydrogen (H) in addition to carbon (C), a more complex structural bond can be formed by chemical reaction between these additional elements and trivalent elements, and the degree of formation of defects and vacancies in the selector 10 can be further increased. Therefore, the degree of structural bond formed by chemical reaction in the selector 10 can be controlled by comprehensively considering the physical properties and electrical characteristics required for the target selector 10.

[0036] The selector 10 according to the present embodiment may have improved thickness, density, and flexibility, reduced surface roughness, and excellent electrical and physical properties, as compared with the starting carbon layer CL.

[0037] The selector 10 according to the present embodiment may be a current regulation layer capable of controlling the flow of current, and may function to reduce and / or suppress leakage current between memory elements of a semiconductor device. To this end, the selector 10 may have a threshold switching characteristic, i.e., a characteristic in which when an applied voltage is less than a predetermined threshold, almost no current flows, and when the applied voltage exceeds a predetermined threshold, a current that suddenly increases flows. This threshold is called a threshold voltage, and the selector 10 may be realized in a turn-on state or a turn-off state based on the threshold voltage.

[0038] The selector 10 according to the present embodiment can be applied as a selector layer of a memory cell having a structure in which a selector layer and a memory layer are stacked on the upper and lower parts of the same element, which will be described in more detail with reference to FIGS. 2A and 2B.

[0039] 2A and 2B are diagrams showing a semiconductor device according to an embodiment of the present invention, in which the detailed description of the embodiment shown in FIGS. 1A to 1C is similar to that described above will be omitted in this embodiment.

[0040] As shown in Figures 2A and 2B, the semiconductor device of this embodiment may have a cross-point structure formed on a substrate 100, including a first conductive line 110 extending in a first direction, a second conductive line 130 located on the first conductive line 110 and extending in a second direction intersecting the first direction, and memory cells 120 arranged at each intersection between the first conductive line 110 and the second conductive line 130.

[0041] The substrate 100 may include a semiconductor material, such as silicon, etc. A desired substructure (not shown) may be formed in the substrate 100. For example, the substructure may include a driving circuit (not shown) electrically connected to control the first conductive line 110 and / or the second conductive line 130 formed on the substrate 100.

[0042] The first conductive line 110 and the second conductive line 130 are connected to the memory cell 120 to transmit a voltage or a current to the memory cell 120, thereby driving the memory cell 120. One of the first conductive line 110 and the second conductive line 130 can function as a word line, and the other can function as a bit line. The first conductive line 110 and the second conductive line 130 can have a single layer structure or a multi-layer structure including a conductive material. Examples of the conductive material can include, but are not limited to, a metal, a metal nitride, a conductive carbon material, or a combination thereof. For example, the first conductive line 110 and the second conductive line 130 may include tungsten (W), titanium (Ti), tantalum (Ta), platinum (Pt), aluminum (Al), copper (Cu), zinc (Zn), nickel (Ni), cobalt (Co), lead (Pd), tungsten nitride (WN), tungsten silicide (WSi), titanium nitride (TiN), titanium silicon nitride (TiSiN), titanium aluminum nitride (TiAlN), tantalum nitride (TaN), tantalum silicon nitride (TaSiN), tantalum aluminum nitride (TaAlN), carbon (C), silicon carbide (SiC), silicon carbon nitride (SiCN), or combinations thereof.

[0043] The memory cells 120 may be arranged in a matrix form along the first and second directions so as to overlap the intersection region between the first conductive line 110 and the second conductive line 130. The memory cells 120 may have a size equal to or smaller than the intersection region between the first conductive line 110 and the second conductive line 130, or may have a size larger than the intersection region.

[0044] The shape of the memory cell 120 may be, but is not limited to, a cylindrical or rectangular prism.

[0045] The spaces between the first conductive line 110, the second conductive line 130, and the memory cells 120 may be filled with an insulating material (not shown).

[0046] The memory cell 120 may include a stacked structure, which may include a bottom electrode 121 , a selector pattern 122 , an intermediate electrode 123 , a memory pattern 124 , and a top electrode 125 .

[0047] The selector pattern 122 shown in Fig. 2B may correspond to the selector 10 shown in Fig. 1C. Therefore, in this embodiment, detailed description of contents similar to the above-mentioned embodiment will be omitted.

[0048] The bottom electrode 121 is located at the bottom of the memory cell 120 and is electrically connected to the first conductive line 110, and may function as a current or voltage transmission path between the first conductive line 110 and the memory cell 120. The middle electrode 123 is located between the selector pattern 122 and the memory pattern 124 and may serve to physically separate them while electrically connecting them. The top electrode 125 is located at the top of the memory cell 120 and may function as a current or voltage transmission path between the second conductive line 130 and the memory cell 120.

[0049] The bottom electrode 121, the middle electrode 123, and the top electrode 125 may have a single layer structure or a multi-layer structure including various conductive materials, for example, metals, nitrides, silicide-based materials, or combinations thereof, etc. For example, the bottom electrode 121, the middle electrode 123, and the top electrode 125 may include tungsten (W), titanium (Ti), tantalum (Ta), platinum (Pt), aluminum (Al), copper (Cu), zinc (Zn), nickel (Ni), cobalt (Co), lead (Pd), chromium (Cr), tungsten nitride (WN), tungsten silicide (WSi), titanium silicide (TiSi), titanium nitride (TiN), titanium silicon nitride (TiSiN), titanium aluminum nitride (TiAlN), tantalum nitride (TaN), tantalum silicon nitride (TaSiN), tantalum aluminum nitride (TaAlN), or combinations thereof. The bottom electrode 121, the middle electrode 123, and the top electrode 125 may be formed of the same material or different materials.

[0050] The bottom electrode 121, the middle electrode 123, and the top electrode 125 may have the same thickness or different thicknesses from each other.

[0051] At least one of the lower electrode 121, the intermediate electrode 123, and the upper electrode 125 may be omitted. For example, when the lower electrode 121 is omitted, the first conductive line 110 may function as the lower electrode 121 instead of the omitted lower electrode 121, and when the upper electrode 125 is omitted, the second conductive line 130 may function as the upper electrode 125 instead of the omitted upper electrode 125.

[0052] The selector pattern 122 may be a current adjusting layer capable of controlling the flow of current and may function to prevent current leakage that may occur between memory cells 121 sharing the first conductive line 110 or the second conductive line 130. To this end, the selector pattern 122 may have a threshold switching characteristic, i.e., a characteristic in which almost no current flows when an applied voltage is less than a predetermined threshold, and a current that suddenly increases flows when the applied voltage is equal to or greater than a predetermined threshold. This threshold is called a threshold voltage, and the selector pattern 122 may be realized in a turn-on state or a turn-off state based on the threshold voltage.

[0053] The selector pattern 122, unlike conventional doped nitride or oxide-based selectors, may include amorphous carbon (C) as a main component and a dopant introduced by ion implantation, and may include a complex chemical bond formed by a chemical reaction between carbon (C) and a trivalent element. In addition to the chemical bond between carbon (C) and a trivalent element, the selector pattern 122 may further include a chemical bond between at least one of nitrogen (N), oxygen (O), or hydrogen (H) and a trivalent element. The trivalent element may include at least one of boron (B), aluminum (Al), gallium (Ga), indium (In), or thallium (Tl), and the dopant may include at least one of arsenic (As), phosphorus (P), or antimony (Sb).

[0054] The selector pattern 122 includes amorphous carbon (C) which is easily chemically reactive as a main component, and can form complex structural bonds by chemical reaction between carbon (C), which is a tetravalent element, and a trivalent element, and defects and vacancies can be formed in the selector pattern 122. As a result, the metallic state of the dopant can be well maintained, and trap sites for conductive carriers can be formed more easily and efficiently, thereby further improving the electrical characteristics of the selector pattern 122. In addition, the trivalent element chemically reacted with carbon traps a portion of the conductive carriers to prevent excess current, thereby controlling the off-current characteristics. In addition, the physical characteristics of the selector pattern 122 can be improved based on the essential characteristics of carbon, which is the main component. Meanwhile, when at least one of nitrogen (N), oxygen (O), or hydrogen (H) is further included in the selector pattern 122 in addition to carbon (C), a more complex structural bond can be formed by chemical reaction between these additional elements and trivalent elements, and the degree of formation of defects and vacancies in the selector pattern 122 can be further increased. Therefore, the degree of structural bond due to chemical reaction in the selector pattern 122 can be controlled by comprehensively considering the physical properties and electrical characteristics required for the target selector pattern 122.

[0055] The selector pattern 122 according to the present embodiment may have improved thickness, density, and flexibility, reduced surface roughness, and excellent electrical and physical properties. In addition, the selector pattern 122 is very important in terms of flatness in order to contribute to stable crystallization of the memory pattern 122 when the memory pattern 124 is formed thereon, and the selector pattern 122 according to the present embodiment has improved roughness characteristics due to the formation of complex structural bonds through chemical reactions, so that the crystallization of the memory pattern 124 can be more stably performed.

[0056] The memory pattern 124 can store different data by switching between different resistance states depending on a voltage or current applied through the upper and lower ends. The memory pattern 124 can include a material used in RRAM, PRAM, FRAM, MRAM, etc., for example, a material having variable resistance characteristics used in RRAM, PRAM, FRAM, MRAM, etc. The memory pattern 124 can include a phase change material such as a transition metal oxide, a metal oxide such as a perovskite-based material, a chalcogenide-based material, a ferroelectric material, a ferromagnetic material, etc., used in RRAM, PRAM, FRAM, MRAM, etc.

[0057] For example, the memory pattern 124 may include a magnetic tunnel junction (MTJ) structure including a free layer having a changeable magnetization direction, a fixed layer having a fixed magnetization direction, and a tunnel barrier layer interposed between the free layer and the fixed layer.

[0058] The free layer is a layer that can store different data by having a changeable magnetization direction, and may be referred to as a storage layer. The free layer may have one of different magnetization directions or one of different electron spin directions, and the resistance value may be changed by switching the polarity of the free layer in the MTJ structure. In some embodiments, the polarity of the free layer is changed or reversed when a voltage or current signal (e.g., a driving current above a certain threshold) is applied to the MTJ structure. The change in polarity of the free layer causes the free layer and the fixed layer to have different magnetization directions or different electron spin directions, so that the memory pattern 124 can store different data or represent different data bits. The magnetization direction of the free layer may be changed between a top-to-bottom direction and a bottom-to-top direction. The change in the magnetization direction of the free layer may be induced by a spin transfer talk generated by the applied current or voltage.

[0059] The pinned layer can have a fixed magnetization direction, and such fixed magnetization direction does not change while the magnetization direction of the free layer changes. The pinned layer can also be referred to as a reference layer, etc. In some embodiments, the pinned layer can be fixed in a magnetization direction that points from top to bottom. In some embodiments, the pinned layer can be fixed in a magnetization direction that points from bottom to top.

[0060] The free layer and the pinned layer may have a single layer or a multi-layer structure including a ferromagnetic material. For example, the free layer and the pinned layer may include an alloy mainly composed of Fe, Ni, or Co, such as an Fe-Pt alloy, an Fe-Pd alloy, a Co-Pd alloy, a Co-Pt alloy, an Fe-Ni-Pt alloy, a Co-Fe-Pt alloy, a Co-Ni-Pt alloy, a Co-Fe-B alloy, etc., or may include a laminate structure made of metal, such as a laminate structure of Co / Pt, Co / Pd, etc.

[0061] The tunnel barrier layer can enable tunneling of electrons during both data read and data write operations. The tunnel barrier layer can be made of insulating oxides such as MgO, CaO, SrO, TiO, VO, NbO, Al 2 O 3 , TiO 2 , Ta 2 O 5 , RuO 2 , B 2 O 3 The oxides may include

[0062] The memory pattern 124 may have a single layer structure or a multi-layer structure that exhibits variable resistance characteristics by combining two or more layers, but the present embodiment is not limited thereto, and the memory cell 120 may include other memory layers that can store different data in various ways instead of the memory pattern 124.

[0063] In the present embodiment, the memory cell 120 includes a lower electrode 121, a selector pattern 122, an intermediate electrode 123, a memory pattern 124, and an upper electrode 125, which are sequentially stacked. However, as long as the memory cell 120 has a data storage characteristic, it may be modified in various ways. For example, at least one of the intermediate electrode 123 and the upper electrode 125 may be omitted. Also, the positions of the selector pattern 122 and the memory pattern 124 may be changed. Also, the memory cell 120 may further include one or more layers (not shown) for improving the characteristics of the memory cell 120 or improving the process in addition to the layers 121, 122, 123, 124, and 125. For example, at least one of a lower electrode contact and an upper electrode contact may further be included. Also, for example, a hard mask pattern may remain.

[0064] The memory cells 120 thus formed may be spaced apart from one another at regular intervals, with trenches formed therebetween. The trenches between the memory cells 120 may have a height-to-width (H / W) aspect ratio in the range of, for example, about 1:1 to 40:1, or about 10:1 to 40:1, or about 10:1 to 20:1, or about 5:1 to 10:1, or about 10:1 to 15:1, or about 1:1 to 25:1, or about 1:1 to 30:1, or about 1:1 to 35:1, or about 1:1 to 45:1, or about 1:1 to 40:1.

[0065] In some embodiments, such trenches may have sidewalls that are substantially perpendicular to the top surface of substrate 100. Also, in one embodiment, adjacent trenches may be spaced substantially equidistant from one another, however, in other embodiments, the spacing between adjacent trenches may vary.

[0066] Although the present embodiment has been described with respect to a single layer of cross-point structures, two or more layers of cross-point structures may be stacked vertically.

[0067] Next, an embodiment of a method for manufacturing a semiconductor device according to the present embodiment will be described with reference to Figures 3A to 3G. In the following description, the lower electrode layer 221A, the selector layer 222A, the intermediate electrode layer 223A, the memory layer 224A, and the upper electrode layer 225A represent material layers formed by a patterning process to form the lower electrode 221, the selector pattern 222, the intermediate electrode 223, the memory pattern 224, and the upper electrode 225, respectively.

[0068] As shown in FIG 3A, a first conductive line 210 may be formed on a substrate 200 on which a predetermined substructure (not shown) is formed. The first conductive line 210 may be formed by forming a conductive layer for forming the first conductive line 210 on the substrate 200 and then etching the conductive layer using a line-shaped mask pattern extending in a first direction. The first conductive line 210 may have a single layer structure or a multi-layer structure including a conductive material. Examples of the conductive material may include, but are not limited to, a metal, a metal nitride, a conductive carbon material, or a combination thereof.

[0069] A bottom electrode layer 221A may be formed on the first conductive line 210. The bottom electrode layer 221A may be formed of a single layer structure or a multi-layer structure including various conductive materials, such as metal, nitride, silicide-based materials, or combinations thereof.

[0070] As shown in FIG. 3B, a carbon layer CL can be formed on the lower electrode layer 221A.

[0071] The carbon layer CL can act as a matrix that forms the base of the selector. The carbon layer CL is made of an amorphous phase and is easily chemically reactive. When a dopant such as arsenic (As) is ion-implanted, the carbon layer CL can easily form new structural bonds and can well maintain the metallic state of the dopant. Therefore, the ion-implanted dopant can more easily and efficiently form trap sites for conductive carriers, and the threshold switching operation characteristics of the selector can be effectively realized. In addition, since the carbon layer CL has a low density and a high thermal conductivity, a selector based on the carbon layer CL can have excellent electrical and physical properties.

[0072] The carbon layer CL may be formed by depositing carbon (C) by a physical deposition method, for example, physical vapor deposition or sputtering.

[0073] In one embodiment, the carbon layer CL contains carbon (C) atoms as a main component, and may further contain at least one of nitrogen (N) atoms, oxygen (O) atoms, or hydrogen (H) atoms in addition to carbon (C). In this case, at least one of nitrogen (N) atoms, oxygen (O) atoms, or hydrogen (H) atoms may be doped into the carbon layer CL by performing the carbon (C) deposition process in an atmosphere of at least one gas selected from nitrogen gas, oxygen gas, and hydrogen gas.

[0074] The carbon layer CL can be formed to a thickness T4.

[0075] As shown in FIG. 3C, a chemical reaction can be performed on the carbon layer CL to convert it into a chemically reactive layer 222B.

[0076] The chemical reaction shown in FIG. 3C means that a trivalent element is chemically reacted with the surface of the carbon layer CL. In other words, the trivalent element is not implanted into the carbon layer CL by the direct ion implantation method, but is chemically reacted with the element contained in the carbon layer CL. In this embodiment, the chemical reaction layer 222B can include a complex chemical bond between the element contained in the carbon layer CL and the trivalent element by the chemical reaction shown in FIG. 3C. As described above, the carbon layer CL can include carbon (C) atoms, and can optionally further include at least one of nitrogen (N) atoms, oxygen (O) atoms, or hydrogen (H) atoms in addition to the carbon (C) atoms. Therefore, the chemical reaction layer 222B can include carbon (C) as a main component and can include a complex chemical bond formed by a chemical reaction with the trivalent element. That is, the chemically reactive layer 222B can include chemical bonds between carbon (C) and a trivalent element formed by a chemical reaction, and in addition, can optionally include chemical bonds between at least one of nitrogen (N), oxygen (O), or hydrogen (H) and a trivalent element.

[0077] The trivalent element reacts with the element contained in the carbon layer CL to form a chemical bond, and traps some of the conductive carriers by holes generated by the trivalent structure, preventing excess current and thus controlling the off current characteristics.

[0078] The trivalent element capable of chemically reacting with the element contained in the carbon layer CL can include at least one of boron (B), aluminum (Al), gallium (Ga), indium (In), or thallium (Tl).

[0079] In one embodiment, when the trivalent element includes boron (B), chemically reactive layer 222B can include multiple chemical bonds of carbon (C), nitrogen (N), oxygen (O), hydrogen (H), or boron (B), such as at least one of a BC bond, a BN bond, or a BO bond.

[0080] The chemical reaction between the element contained in the carbon layer CL and the trivalent element may be a plasma chemical reaction, and may include a PLAD (plasma doping) process. When the trivalent element is chemically reacted with the carbon layer CL through the PLAD process, the trivalent element chemically reacts with elements containing carbon (C) on the surface and inside of the carbon layer CL to form new chemical bonds, and the carbon layer CL may be converted into a chemically reactive layer 222B having a structure and composition different from that of the carbon layer CL.

[0081] In one embodiment, the chemical reaction between the element contained in the carbon layer CL and the trivalent element is carried out with an energy of 1 to 5 KV and 2.5×10 15 ~2.5×10 16 cm -2 The PLAD process can be performed under the condition of the amount of trivalent element introduced of 1000 to 20000. If the amount of trivalent element introduced is outside the above range, the flexibility of the carbon that forms the base of the selector may decrease, and as a result, it may be difficult to ensure stable physical properties of the selector.

[0082] In one embodiment, when the trivalent element includes boron (B), the PLAD process includes adding B 2H 6 or BF 3 This can be done using plasma, with energies of 1-5 KV and 2.5×10 15 ~2.5×10 16 cm -2 This can be achieved by the PLAD process, which is carried out under the condition of the amount of trivalent element introduced of B 2 H 6 or BF 3 Hydrogen (H) contained in the plasma can also form chemical bonds within the chemically reactive layer 222B.

[0083] Since the chemical reaction layer 222B includes chemical bonds generated by a chemical reaction, the thickness T5 of the chemical reaction layer 222B may be greater than the thickness T4 of the carbon layer CL. During the formation of the selector pattern 222, the chemical reaction layer 222B is inevitably damaged by the ion implantation process of the dopant, which is a subsequent process. Therefore, the chemical reaction layer 222B can function as a selector even if it is damaged by the ion implantation process if a minimum thickness is ensured. According to this embodiment, the thickness T5 of the chemical reaction layer 222B is increased from the thickness T4 of the carbon layer CL before conversion by the chemical reaction with the trivalent element shown in FIG. 3B, so that the stable physical properties of the final selector pattern 222 can be ensured despite the damage caused by the subsequent ion implantation process.

[0084] In addition, the surface roughness of the chemical reaction layer 222B may be improved by chemical reaction between the elements contained in the carbon layer CL and the trivalent element. The carbon layer CL may have poor surface roughness because it is deposited by a sputtering method, but the surface roughness of the chemical reaction layer 222B may be sufficiently reduced by forming complex chemical bonds through chemical reaction with the trivalent element, thereby maintaining a flat surface.

[0085] In addition, the chemically reactive layer 222B exhibits improved density and flexibility compared to the carbon layer CL due to the newly formed complex chemical bonds, and as a result, the physical properties of the selector pattern 222 may be improved.

[0086] As shown in FIG. 3D, a dopant can be introduced into chemically reactive layer 222B to form selector layer 222A.

[0087] The dopants can form trapping sites for conductive carriers, enabling the ultimately produced selector pattern 222 to exhibit threshold switching behavior.

[0088] The dopant may include, for example, at least one of arsenic (As), phosphorus (P), or antimony (Sb).

[0089] In one embodiment, the introduction of dopants can be done by an ion implantation process.

[0090] The selector layer 222A may be formed with a thickness T6. In one embodiment, the thickness T6 of the selector layer 222A may be the same as the thickness T5 of the chemically reactive layer 222B. In another embodiment, the thickness T6 of the selector layer 222A may be less than the thickness T5 of the chemically reactive layer 222B. This may result in the loss of a portion of the top of the chemically reactive layer 222B due to damage that may occur during the ion implantation process.

[0091] 3E, an intermediate electrode layer 223A may be formed on the selector layer 222A. The intermediate electrode layer 223A may be formed of a single layer structure or a multi-layer structure including various conductive materials, such as metals, nitrides, silicide-based materials, or combinations thereof.

[0092] The memory layer 224A may be formed on the intermediate electrode layer 223A. The memory layer 224A may be formed of a material used in RRAM, PRAM, FRAM, MRAM, etc., for example, a material having variable resistance characteristics used in RRAM, PRAM, FRAM, MRAM, etc. In one embodiment, the memory layer 224A may include a phase change material, such as a metal oxide such as a transition metal oxide or a perovskite-based material, a chalcogenide-based material, a ferroelectric material, or a ferromagnetic material, used in RRAM, PRAM, FRAM, MRAM, etc. In another embodiment, the memory layer 224A may include a magnetic tunnel junction (MTJ) structure including a free layer having a changeable magnetization direction, a fixed layer having a fixed magnetization direction, and a tunnel barrier layer interposed between the free layer and the fixed layer.

[0093] An upper electrode layer 225A may be formed on the memory layer 224A. The upper electrode layer 225A may be formed of a single layer structure or a multi-layer structure including various conductive materials, such as metal, nitride, silicide-based materials, or combinations thereof.

[0094] As shown in FIG. 3F, using a mask pattern as an etching barrier, the upper electrode layer 225A, memory layer 224A, intermediate electrode layer 223A, selector layer 222A, and lower electrode layer 221A are sequentially etched to form a memory cell 220 in which a lower electrode 221, a selector pattern 222, an intermediate electrode 223, a memory pattern 224, and an upper electrode 225 are sequentially stacked.

[0095] 3G, a second conductive line 230 may be formed on the upper electrode 225. The second conductive line 230 may be formed by depositing a conductive layer for forming the second conductive line 230 and etching the conductive layer using a line-shaped mask pattern extending in the second direction.

[0096] Through the above-mentioned process, the semiconductor device shown in FIG. 3G can be formed.

[0097] The semiconductor device according to this embodiment may include a first conductive line 210, a memory cell 220, and a second conductive line 230, which are sequentially formed on a substrate 200. The memory cell 220 may include a lower electrode 221, a selector pattern 222, an intermediate electrode 223, a memory pattern 224, and an upper electrode 225, which are sequentially formed.

[0098] Unlike conventional doped nitride or oxide selectors, the selector pattern 222 may include amorphous carbon (C) as a main component and a dopant introduced by ion implantation, and may include a complex chemical bond formed by a chemical reaction between carbon (C) and a trivalent element. In addition to the chemical bond between carbon (C) and a trivalent element, the selector pattern 222 may further include a chemical bond between at least one of nitrogen (N), oxygen (O), or hydrogen (H) and a trivalent element. The trivalent element may include at least one of boron (B), aluminum (Al), gallium (Ga), indium (In), or thallium (Tl), and the dopant may include at least one of arsenic (As), phosphorus (P), or antimony (Sb).

[0099] The selector pattern 222 includes amorphous carbon (C) which is easily chemically reactive as a main component, and can form complex structural bonds by chemical reaction between carbon (C), which is a tetravalent element, and a trivalent element, and defects and vacancies can be formed in the selector pattern 222. As a result, the metallic state of the dopant can be well maintained, and trap sites for conductive carriers can be formed more easily and efficiently, thereby further improving the electrical characteristics of the selector pattern 222. In addition, the trivalent element chemically reacted with carbon traps a portion of the conductive carriers to prevent excess current, thereby controlling the off-current characteristics. In addition, the physical characteristics of the selector pattern 222 can be improved based on the essential characteristics of carbon, which is the main component. Meanwhile, when at least one of nitrogen (N), oxygen (O), or hydrogen (H) is further contained in the selector pattern 222 in addition to carbon (C), a more complex structural bond can be formed by chemical reaction between these additional elements and trivalent elements, and the degree of formation of defects and vacancies can be further increased in the selector pattern 222. Therefore, the degree of structural bond by chemical reaction in the selector pattern 222 can be controlled by comprehensively considering the physical properties and electrical characteristics required for the target selector pattern 222.

[0100] The selector pattern 222 according to the present embodiment may have improved thickness, density, and flexibility, reduced surface roughness, and excellent electrical and physical properties. In addition, the smoothness of the selector pattern 222 is very important in order to contribute to stable crystallization of the memory pattern 222 when the memory pattern 124 is formed thereon, and the selector pattern 222 according to the present embodiment has improved roughness characteristics due to the formation of complex structural bonds through chemical reactions, so that the crystallization of the memory pattern 224 can be more stably performed.

[0101] The substrate 200, the first conductive line 210, the memory cell 220, the second conductive line 230, the lower electrode 221, the selector pattern 222, the intermediate electrode 223, the memory pattern 224, and the upper electrode 225 shown in FIG. 3G may correspond to the substrate 100, the first conductive line 110, the memory cell 120, the second conductive line 130, the lower electrode 121, the selector pattern 122, the intermediate electrode 123, the memory pattern 124, and the upper electrode 125 shown in FIG. 2B, respectively.

[0102] In this embodiment, the selector pattern 222 is formed below the memory pattern 224, but the relative positions of the selector pattern 222 and the memory pattern 224 may be changed, which will be described with reference to Figures 4A to 4G.

[0103] 4A to 4G are diagrams showing a method for manufacturing a semiconductor device according to another embodiment of the present invention. Differences from the embodiment shown in FIGS. 1A to 1C, 2A and 2B, and 3A to 3G will be mainly described. In the following description, lower electrode layer 321A, selector layer 322A, intermediate electrode layer 323A, memory layer 324A, and upper electrode layer 325A respectively represent material layers formed into lower electrode 321, selector pattern 322, intermediate electrode 323, memory pattern 324, and upper electrode 325 by a patterning process.

[0104] 4A, a first conductive line 310 may be formed on a substrate 300 on which a predetermined substructure (not shown) is formed. The first conductive line 310 may be formed by forming a conductive layer for forming the first conductive line 210 on the substrate 300 and then etching the conductive layer using a line-shaped mask pattern extending in a first direction.

[0105] A bottom electrode layer 321A may be formed on the first conductive line 310. The bottom electrode layer 321A may be formed of a single layer structure or a multi-layer structure including various conductive materials, such as metal, nitride, silicide-based materials, or combinations thereof.

[0106] A memory layer 324A may be formed on the lower electrode layer 321A. The memory layer 324A may be formed of a material used in RRAM, PRAM, FRAM, MRAM, etc., for example, a material having variable resistance characteristics used in RRAM, PRAM, FRAM, MRAM, etc.

[0107] An intermediate electrode layer 323A may be formed on the memory layer 324A. The intermediate electrode layer 323A may be formed as a single layer structure or a multi-layer structure including various conductive materials, such as metal, nitride, silicide-based materials, or a combination thereof.

[0108] 4B, a carbon layer CL may be formed on the intermediate electrode layer 323A. The carbon layer CL may be formed by depositing carbon (C) by a physical deposition method, for example, physical vapor deposition or sputtering.

[0109] In one embodiment, the carbon layer CL contains carbon (C) atoms as a main component, and may further contain at least one of nitrogen (N) atoms, oxygen (O) atoms, or hydrogen (H) atoms in addition to carbon (C). In this case, at least one of nitrogen (N) atoms, oxygen (O) atoms, or hydrogen (H) atoms may be doped into the carbon layer CL by performing the carbon (C) deposition process in an atmosphere of at least one gas selected from nitrogen gas, oxygen gas, and hydrogen gas.

[0110] The carbon layer CL can be formed to a thickness T7.

[0111] As shown in FIG. 4C, a chemical reaction can be performed on the carbon layer CL to convert it into a chemically reactive layer 322B.

[0112] 4C, the chemical reaction layer 322B can include a complex chemical bond between the element contained in the carbon layer CL and a trivalent element. That is, the chemical reaction layer 322B can include a chemical bond between carbon (C) and a trivalent element formed by a chemical reaction, and in addition, can selectively include a chemical bond between at least one of nitrogen (N), oxygen (O), or hydrogen (H) and a trivalent element.

[0113] The trivalent element capable of chemically reacting with the element contained in the carbon layer CL can include at least one of boron (B), aluminum (Al), gallium (Ga), indium (In), or thallium (Tl).

[0114] In one embodiment, when the trivalent element includes boron (B), chemically reactive layer 322B can include multiple chemical bonds of carbon (C), nitrogen (N), oxygen (O), hydrogen (H), or boron (B), such as at least one of a BC bond, a BN bond, or a BO bond.

[0115] The chemical reaction between the element contained in the carbon layer CL and the trivalent element may be a plasma chemical reaction, and may include a PLAD (plasma doping) process. When the trivalent element is chemically reacted with the carbon layer CL through the PLAD process, the trivalent element chemically reacts with elements containing carbon (C) on the surface and inside of the carbon layer CL to form new chemical bonds, and the carbon layer CL may be converted into a chemically reactive layer 222B having a structure and composition different from that of the carbon layer CL.

[0116] In one embodiment, the chemical reaction between the element contained in the carbon layer CL and the trivalent element is carried out with an energy of 1 to 5 KV and 2.5×10 15 ~2.5×10 16 cm -2 The PLAD process can be performed under the condition of the amount of trivalent element introduced of 1000 to 20000. If the amount of trivalent element introduced is outside the above range, the flexibility of the carbon that forms the base of the selector may decrease, and as a result, it may be difficult to ensure stable physical properties of the selector.

[0117] In one embodiment, when the trivalent element includes boron (B), the PLAD process includes adding B 2 H 6 or BF 3 This can be done using plasma, with energies of 1-5 KV and 2.5×10 15 ~2.5×10 16 cm -2 This can be achieved by the PLAD process, which is carried out under the condition of the amount of trivalent element introduced of B 2 H 6 or BF 3 Hydrogen (H) contained in the plasma can also form chemical bonds within the chemically reactive layer 222B.

[0118] Since the chemical reaction layer 322B includes chemical bonds generated by a chemical reaction, the thickness T8 of the chemical reaction layer 322B may be greater than the thickness T7 of the carbon layer CL. Such an increase in thickness may have a positive effect on ensuring stable physical properties of the final selector pattern 322.

[0119] In addition, the surface roughness of the chemical reaction layer 322B may be improved by chemical reaction between the elements contained in the carbon layer CL and the trivalent elements.

[0120] In addition, the chemically reactive layer 322B exhibits improved density and flexibility compared to the carbon layer CL due to the newly formed complex chemical bonds, and as a result, the physical properties of the selector pattern 322 may be improved.

[0121] As shown in FIG. 4D, a dopant can be introduced into chemically reactive layer 322B to form selector layer 322A.

[0122] The dopants can form trapping sites for conductive carriers, enabling the ultimately produced selector pattern 322 to exhibit threshold switching behavior.

[0123] The dopant may include, for example, at least one of arsenic (As), phosphorus (P), or antimony (Sb).

[0124] In one embodiment, the introduction of dopants can be done by an ion implantation process.

[0125] The selector layer 322A may be formed with a thickness T9. In one embodiment, the thickness T9 of the selector layer 322A may be the same as the thickness T8 of the chemically reactive layer 322B. In another embodiment, the thickness T9 of the selector layer 322A may be smaller than the thickness T8 of the chemically reactive layer 322B. This may result in the loss of a portion of the top of the chemically reactive layer 322B due to damage that may occur during the ion implantation process.

[0126] 4E, an upper electrode layer 325A may be formed on the selector layer 322A. The upper electrode layer 323A may be formed of a single layer structure or a multi-layer structure including various conductive materials, such as metals, nitrides, silicide-based materials, or combinations thereof.

[0127] As shown in FIG. 4F, using a mask pattern as an etching barrier, the upper electrode layer 325A, the selector layer 322A, the intermediate electrode layer 323A, the memory layer 324A, and the lower electrode layer 321A are sequentially etched to form a memory cell 320 in which the lower electrode 321, the memory pattern 324, the intermediate electrode 323, the selector pattern 322, and the upper electrode 325 are sequentially stacked.

[0128] 4G, a second conductive line 330 may be formed on the upper electrode 325. The second conductive line 330 may be formed by depositing a conductive layer for forming the second conductive line 330 and etching the conductive layer using a line-shaped mask pattern extending in the second direction.

[0129] Through the above-mentioned process, the semiconductor device shown in FIG. 4G can be formed.

[0130] The semiconductor device according to this embodiment may include a first conductive line 310, a memory cell 320, and a second conductive line 330, which are sequentially formed on a substrate 300. The memory cell 320 may include a lower electrode 321, a memory pattern 324, an intermediate electrode 323, a selector pattern 322, and an upper electrode 325, which are sequentially formed.

[0131] The selector pattern 322, unlike conventional doped nitride or oxide selectors, may include amorphous carbon (C) as a main component and a dopant introduced by ion implantation, and may include a complex chemical bond formed by a chemical reaction between carbon (C) and a trivalent element. In addition to the chemical bond between carbon (C) and a trivalent element, the selector pattern 322 may further include a chemical bond between at least one of nitrogen (N), oxygen (O), or hydrogen (H) and a trivalent element. The trivalent element may include at least one of boron (B), aluminum (Al), gallium (Ga), indium (In), or thallium (Tl), and the dopant may include at least one of arsenic (As), phosphorus (P), or antimony (Sb).

[0132] The selector pattern 322 according to the present embodiment may have improved thickness, density, and flexibility, reduced surface roughness, and excellent electrical and physical properties.

[0133] The substrate 300, the first conductive line 310, the memory cell 320, the second conductive line 330, the lower electrode 321, the selector pattern 322, the intermediate electrode 323, the memory pattern 324, and the upper electrode 325 shown in FIG. 4G may correspond to the substrate 200, the first conductive line 210, the memory cell 220, the second conductive line 230, the lower electrode 221, the selector pattern 222, the intermediate electrode 223, the memory pattern 224, and the upper electrode 225 shown in FIG. 3G, and the substrate 100, the first conductive line 110, the memory cell 120, the second conductive line 130, the lower electrode 121, the selector pattern 122, the intermediate electrode 123, the memory pattern 124, and the upper electrode 125 shown in FIG. 2B, respectively.

[0134] Although various embodiments for solving the problems to be solved have been described above, it will be apparent to those skilled in the art that various changes and modifications can be made within the scope of the technical concept of the present invention. [Explanation of symbols]

[0135] 10 Selectors CL carbon layer 110, 210, 310 First conductive line 120, 220, 320 memory cells 130, 230, 330 Second conductive line 121, 221, 321 Lower electrode 122, 222, 322 selector patterns 123, 223, 333 Intermediate electrode 124, 224, 324 memory patterns 125, 225, 325 upper electrode

Claims

1. Carbon-based Chemical bonds between carbon and trivalent elements, and A selector containing a dopant introduced by ion implantation.

2. 2. The selector of claim 1, wherein the trivalent element comprises at least one of boron (B), aluminum (Al), gallium (Ga), indium (In), or thallium (Tl).

3. 2. The selector of claim 1, further comprising a chemical bond between at least one of nitrogen, oxygen, or hydrogen and said trivalent element.

4. 2. The selector of claim 1, wherein the dopant comprises at least one of arsenic (As), phosphorus (P), or antimony (Sb).

5. 2. The selector of claim 1, wherein there is a defect or vacancy created by said chemical bond in said selector.

6. 2. The selector of claim 1, wherein the trivalent element comprises boron (B) and the dopant comprises arsenic (As).

7. 2. The selector of claim 1, wherein said carbon is in an amorphous phase.

8. forming a carbon layer; Chemically reacting a trivalent element with the carbon layer; introducing dopants by an ion implantation process; A method for manufacturing a selector comprising:

9. The method of claim 8 , wherein the carbon layer forming step includes a physical vapor deposition process.

10. 9. The method for manufacturing a selector according to claim 8, wherein the carbon layer forming step is performed in an atmosphere of at least one gas selected from the group consisting of nitrogen gas, oxygen gas, and hydrogen gas.

11. 9. The method of claim 8, wherein the chemical reaction step includes a reaction with a trivalent element including at least one of boron (B), aluminum (Al), gallium (Ga), indium (In), or thallium (Tl).

12. The method for manufacturing a selector according to claim 8 , wherein the chemical reaction step includes a PLAD (plasma doping) process.

13. The PLAD process uses an energy of 1 to 5 KV and 2.5×10 １５ ~2.5 x 10 １６ cm －２ The method for producing a selector according to claim 12, wherein the method is carried out under conditions of an amount of trivalent element introduction of 0.1 to 1.

0.

14. The PLAD process is ２ H ６ or B.F. ３ The method for manufacturing a selector according to claim 12, which is carried out using plasma.

15. The method for manufacturing a selector according to claim 8 , wherein the thickness of the carbon layer after the chemical reaction is formed to be greater than the thickness of the carbon layer before the chemical reaction.

16. The method for manufacturing a selector according to claim 8 , wherein the surface roughness of the carbon layer after the chemical reaction is lower than the surface roughness of the carbon layer before the chemical reaction.

17. 9. The method for manufacturing a selector according to claim 8, wherein the ion implantation step is performed using a dopant containing at least one of arsenic (As), phosphorus (P), and antimony (Sb).

18. A selector pattern based on carbon and including a dopant introduced by chemical bonding of carbon with a trivalent element and ion implantation; a memory pattern disposed above or below the selector pattern; A semiconductor device comprising:

19. 20. The semiconductor device of claim 18, wherein the selector pattern is configured to control current flow and prevent current leakage between memory cells, and the memory pattern is configured to switch between different resistance states depending on an applied voltage or current to store different data.

20. The semiconductor device according to claim 18, further comprising at least one of a first electrode arranged between the selector pattern and a substrate or between the substrate and a memory pattern, a second electrode arranged between the selector pattern and the memory pattern, or a third electrode arranged on the top of the memory pattern or on the top of the selector pattern.

21. 20. The semiconductor device according to claim 18, wherein the trivalent element includes at least one of boron (B), aluminum (Al), gallium (Ga), indium (In), or thallium (Tl).

22. The semiconductor device according to claim 18 , wherein the selector pattern further includes a chemical bond between at least one of nitrogen, oxygen, and hydrogen and the trivalent element.

23. 20. The semiconductor device according to claim 18, wherein the dopant includes at least one of arsenic (As), phosphorus (P), or antimony (Sb).

24. 20. The semiconductor device according to claim 18, wherein a defect or a vacancy generated by the chemical bond exists in the selector pattern.

25. 20. The semiconductor device according to claim 18, wherein the trivalent element includes boron (B) and the dopant includes arsenic (As).

26. The semiconductor device according to claim 18 , wherein the carbon is in an amorphous phase.

27. forming a carbon layer on a substrate; Chemically reacting a trivalent element with the carbon layer; introducing dopants by an ion implantation process to form a selector layer; forming a memory layer above or below the selector layer; etching the memory layer and the selector layer by an etching process using a mask pattern to form a memory cell including a memory pattern and a selector pattern; A method for manufacturing a semiconductor device comprising the steps of:

28. forming a first electrode layer between the substrate and the selector layer or between the substrate and the memory layer; forming a second electrode layer between the selector layer and the memory layer; or 28. The method for manufacturing a semiconductor device according to claim 27, further comprising at least one of the steps of forming a third electrode layer on the upper part of the memory layer or on the upper part of the selector layer.

29. 28. The method of claim 27, wherein the carbon layer forming step includes a physical vapor deposition process.

30. 28. The method of claim 27, wherein the carbon layer forming step is performed in an atmosphere of at least one gas selected from the group consisting of nitrogen gas, oxygen gas, and hydrogen gas.

31. 28. The method of claim 27, wherein the chemical reaction step includes a reaction with a trivalent element including at least one of boron (B), aluminum (Al), gallium (Ga), indium (In), or thallium (Tl).

32. 28. The method of claim 27, wherein the chemical reaction step includes a PLAD (plasma doping) process.

33. The PLAD process uses an energy of 1 to 5 KV and 2.5×10 １５ ~2.5 x 10 １６ cm －２ 33. The method for producing a semiconductor device according to claim 32, wherein the method is carried out under the condition of an amount of trivalent element introduced of:

34. The PLAD process is ２ H ６ or B.F. ３ The method for manufacturing a semiconductor device according to claim 32, which is carried out by using plasma.

35. 28. The method for manufacturing a semiconductor device according to claim 27, wherein the thickness of the carbon layer after the chemical reaction is formed to be greater than the thickness of the carbon layer before the chemical reaction.

36. The method for manufacturing a semiconductor device according to claim 27, wherein the surface roughness of the carbon layer after the chemical reaction is lower than the surface roughness of the carbon layer before the chemical reaction.

37. 28. The method for manufacturing a semiconductor device according to claim 27, wherein the ion implantation step is performed using a dopant containing at least one of arsenic (As), phosphorus (P), and antimony (Sb).

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