Semiconductor device, power conversion apparatus, and method for manufacturing semiconductor device

Abstract

To provide a semiconductor device capable of easily forming an electrode.SOLUTION: A semiconductor device comprises: a semiconductor substrate; a surface electrode provided on the top face of the semiconductor substrate; an anode electrode provided on the top face of the semiconductor substrate to surround the surface electrode; a cathode electrode provided on the top face of the semiconductor substrate to surround the anode electrode; and a physical quantity detection film provided between the anode electrode and the cathode electrode. Thus, a semiconductor device capable of easily forming an electrode can be obtained. In addition, a method for manufacturing the semiconductor device includes: a process for forming the surface electrode on the top face of the semiconductor substrate; a process for forming the anode electrode on the top face of the semiconductor substrate to surround the surface electrode; a process for forming the cathode electrode on the top face of the semiconductor substrate to surround the anode electrode; and a process for forming the physical quantity detection film between the anode electrode and the cathode electrode. Thus, a semiconductor device capable of easily forming an electrode can be obtained.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device having a configuration for detecting a physical quantity, a power conversion device, and a method for manufacturing the semiconductor device. [Background technology]

[0002] Prior art discloses a humidity sensor that includes a sensitive part consisting of a porous layer formed on one surface side of an element formation substrate, and a pair of comb-shaped electrodes formed on one side of the sensitive part in the thickness direction, with the comb teeth of each electrode fitting into the comb grooves of the other electrode (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2006-153511 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, when a humidity sensor is applied to a semiconductor device, the electrodes have a comb shape, which requires precise electrode formation, resulting in a problem that the shape of the electrodes becomes complicated.

[0005] The present disclosure has been made to solve the above-mentioned problems, and has an object to provide a semiconductor device in which electrodes can be easily formed. [Means for solving the problem]

[0006] The semiconductor device according to the present disclosure includes a semiconductor substrate, a surface electrode provided on an upper surface of the semiconductor substrate, an anode electrode provided on the upper surface of the semiconductor substrate so as to surround the surface electrode, a cathode electrode provided on the upper surface of the semiconductor substrate so as to surround the anode electrode, and a physical quantity detection film provided between the anode electrode and the cathode electrode.

[0007] In addition, the semiconductor device according to the present disclosure includes a semiconductor substrate, a surface electrode provided on an upper surface of the semiconductor substrate, an anode electrode provided on the upper surface of the semiconductor substrate so as to surround the surface electrode, a cathode electrode provided on the upper surface of the semiconductor substrate so as to surround the anode electrode, and a physical quantity detection film provided between the anode electrode and the surface electrode.

[0008] In addition, the power conversion device according to the present disclosure has the above-mentioned semiconductor device and includes a main conversion circuit that converts and outputs input power, and a control circuit that outputs a control signal to the main conversion circuit to control the main conversion circuit.

[0009] In addition, a manufacturing method of a semiconductor device according to the present disclosure includes the steps of forming a surface electrode on an upper surface of a semiconductor substrate, forming an anode electrode on the upper surface of the semiconductor substrate so as to surround the surface electrode, forming a cathode electrode on the upper surface of the semiconductor substrate so as to surround the anode electrode, and forming a physical quantity detection film between the anode electrode and the cathode electrode. Effect of the Invention

[0010] According to the semiconductor device of the present disclosure, a semiconductor device in which electrodes can be easily formed can be obtained. Also, according to the power conversion device of the present disclosure, a power conversion device in which electrodes can be easily formed can be obtained. Also, according to the manufacturing method of the semiconductor device of the present disclosure, a semiconductor device in which electrodes can be easily formed can be obtained. [Brief description of the drawings]

[0011] [Figure 1] 1 is a top view of a semiconductor chip according to a first embodiment of the present disclosure. [Diagram 2] 1 is a cross-sectional view of a semiconductor chip according to a first embodiment of the present disclosure. [Diagram 3] 1 is a cross-sectional view of a semiconductor chip according to a first embodiment of the present disclosure. [Figure 4] 1 is a cross-sectional view of a semiconductor chip according to a first embodiment of the present disclosure. [Diagram 5] 1 is a cross-sectional view of a semiconductor chip according to a first embodiment of the present disclosure. [Figure 6] 1 is a cross-sectional view of a semiconductor device according to a first embodiment of the present disclosure. [Figure 7] 2A to 2C are diagrams illustrating a method for manufacturing a semiconductor chip according to a first embodiment of the present disclosure. [Figure 8] 2A to 2C are diagrams illustrating a method for manufacturing a semiconductor chip according to a first embodiment of the present disclosure. [Figure 9] 2A to 2C are diagrams illustrating a method for manufacturing a semiconductor chip according to a first embodiment of the present disclosure. [Figure 10] 2A to 2C are diagrams illustrating a method for manufacturing a semiconductor chip according to a first embodiment of the present disclosure. [Figure 11] 2A to 2C are diagrams illustrating a method for manufacturing a semiconductor chip according to a first embodiment of the present disclosure. [Figure 12] 2A to 2C are diagrams illustrating a manufacturing method of a semiconductor device according to a first embodiment of the present disclosure. [Figure 13] 2A to 2C are diagrams illustrating a manufacturing method of a semiconductor device according to a first embodiment of the present disclosure. [Figure 14] 2A to 2C are diagrams illustrating a manufacturing method of a semiconductor device according to a first embodiment of the present disclosure. [Figure 15] FIG. 11 is a top view of a semiconductor chip according to a second embodiment of the present disclosure. [Figure 16] FIG. 11 is a top view of a semiconductor chip according to a third embodiment of the present disclosure. [Figure 17] FIG. 11 is a cross-sectional view of a semiconductor chip according to a fourth embodiment of the present disclosure. [Figure 18] FIG. 13 is a top view of a semiconductor chip according to a fifth embodiment of the present disclosure. [Figure 19] FIG. 11 is a cross-sectional view of a semiconductor chip according to a fifth embodiment of the present disclosure. [Figure 20] FIG. 13 is a top view of a semiconductor chip according to a sixth embodiment of the present disclosure. [Figure 21] FIG. 13 is a cross-sectional view of a semiconductor chip according to a sixth embodiment of the present disclosure. [Figure 22] FIG. 13 is a block diagram showing a configuration of a power conversion system to which a power conversion device according to a seventh embodiment of the present disclosure is applied. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Hereinafter, the embodiments of the present disclosure will be described with reference to the accompanying drawings. Note that the drawings are schematic, and the interrelationships of sizes and positions shown in different drawings are not necessarily limited to those described and may be changed as appropriate. In addition, in the following description, similar components are illustrated with the same reference numerals, and their names and functions are the same or similar. Therefore, detailed description thereof may be omitted.

[0013] Embodiment 1 A semiconductor device 101 according to the first embodiment will be described with reference to Fig. 1 to Fig. 6. Fig. 1 is a top view of a semiconductor chip 111 included in the semiconductor device 101 (not shown in Figs. 1 to 5) according to the first embodiment. Also, in Fig. 1, a physical quantity detection film and a protective film are omitted.

[0014] As shown in FIG. 1, a semiconductor chip 111 according to this embodiment includes a surface electrode 1, an anode electrode 2, a cathode electrode 3, a guard ring 4, an insulating film 5, and a semiconductor substrate 6.

[0015] The surface electrode 1 is provided on the upper surface of the semiconductor substrate 6. Taking the semiconductor substrate 6 as a reference, the side on which the surface electrode 1 and other components are provided is defined as the upper surface. A surface different from the upper surface, i.e., the side opposite the upper surface, is defined as the lower surface. The direction penetrating the upper and lower surfaces is defined as the thickness direction. Surfaces other than the upper and lower surfaces are defined as side surfaces. The same applies to the following explanations.

[0016] The front surface electrode 1 is provided so as to cover the central portion of the upper surface of the semiconductor substrate 6. In other words, the front surface electrode 1 does not cover the periphery of the upper surface of the semiconductor substrate 6, but covers a part of the surface. The front surface electrode 1 is formed, for example, of a laminated film of Ti or a Ti alloy and Al or an Al alloy. The front surface electrode 1 is also formed, for example, of a laminated film of Ti or a Ti alloy and Cu or a Cu alloy.

[0017] The anode electrode 2 is provided on the upper surface of the semiconductor substrate 6 via an insulating film 5. The anode electrode 2 is provided so as to surround the surface electrode 1 in a direction different from the thickness direction of the semiconductor substrate 6. That is, as shown in FIG. 1, the anode electrode 2 is provided so as to appear to surround the surface electrode 1 when the semiconductor chip 111 is viewed from above. The anode electrode 2 is provided so as to surround the surface electrode 1 in a ring shape. The anode electrode 2 is provided so as to surround the surface electrode 1 in a direction including a plane parallel to the semiconductor substrate 6. The anode electrode 2 is provided on the upper surface of the semiconductor substrate 6, closer to the end than the surface electrode 1.

[0018] The anode electrode 2 is provided so as to surround the surface electrode 1, but the anode electrode 2 does not need to be provided continuously around the entire periphery of the surface electrode 1 and may be partially interrupted. Furthermore, a plurality of anode electrodes 2 may be provided. The anode electrode 2 may be divided into a plurality of electrodes and provided so as to surround the surface electrode 1.

[0019] The anode electrode 2 includes an anode pad 7. The width of the anode pad 7 in the direction toward the surface electrode 1 is greater than the width of other parts of the anode electrode 2 in the direction toward the surface electrode 1. The anode pad 7 is, for example, rectangular in shape. The anode pad 7 is connected to a wiring wire, which will be described later.

[0020] The cathode electrode 3 is provided on the upper surface of the semiconductor substrate 6 via an insulating film 5. The cathode electrode 3 is provided so as to surround the anode electrode 2 in a direction different from the thickness direction of the semiconductor substrate 6. That is, as shown in FIG. 1, the cathode electrode 3 is provided so as to appear to surround the anode electrode 2 when the semiconductor chip 111 is viewed from above. The cathode electrode 3 is also provided so as to surround the surface electrode 1 in a direction different from the thickness direction of the semiconductor substrate 6. The cathode electrode 3 is provided so as to surround the anode electrode 2 in a ring shape. The cathode electrode 3 is provided so as to surround the surface electrode 1 in a ring shape.

[0021] The cathode electrode 3 is provided to surround the anode electrode 2 in a direction including a plane parallel to the semiconductor substrate 6. The cathode electrode 3 is provided to surround the surface electrode 1 in a direction including a plane parallel to the semiconductor substrate 6. The cathode electrode 3 is provided on the upper surface of the semiconductor substrate 6, closer to the end than the surface electrode 1 and the anode electrode 2.

[0022] By surrounding the anode electrode 2 with the cathode electrode 3, it is possible to reduce the effect of the potential of the guard ring 4 on the anode electrode 2. In other words, it is possible to reduce disturbance of the electric field when measuring a physical quantity such as humidity using the anode electrode 2.

[0023] It is desirable that the cathode electrode 3 surrounds the anode electrode 2 without interruption. When the cathode electrode 3 surrounds the anode electrode 2 without interruption, disturbance of the electric field can be further reduced.

[0024] The cathode electrode 3 is electrically connected to the surface electrode 1 and is provided so as to have the same potential as the surface electrode 1. In the present embodiment, the cathode electrode 3 is formed integrally with the surface electrode 1. That is, the surface electrode 1 and the cathode electrode 3 have the same potential.

[0025] By providing the anode electrode 2 and the cathode electrode 3 in an annular shape, the capacitance of a physical quantity detection film, which will be described later, can be increased.

[0026] The anode electrode 2 and the cathode electrode 3 are formed of, for example, a laminated film of Ti or a Ti alloy and Al or an Al alloy, similar to the surface electrode 1. The surface electrode 1 is formed of, for example, a laminated film of Ti or a Ti alloy and Cu or a Cu alloy. The anode electrode 2 and the cathode electrode 3 may be formed of the same material as the surface electrode 1, or may be formed of a different material from the surface electrode 1. The anode electrode 2 and the cathode electrode 3 may be formed of the same material or may be formed of different materials.

[0027] The guard ring 4 is provided on the upper surface of the semiconductor substrate 6. The guard ring 4 is provided so as to surround the cathode electrode 3 in a direction different from the thickness direction of the semiconductor substrate 6. That is, as shown in FIG. 1, the guard ring 4 is provided so as to appear to surround the cathode electrode 3 when the semiconductor chip 111 is viewed from above. The guard ring 4 is also provided so as to surround the anode electrode 2 in a direction different from the thickness direction of the semiconductor substrate 6. The guard ring 4 is also provided so as to surround the surface electrode 1 in a direction different from the thickness direction of the semiconductor substrate 6. The guard ring 4 is provided so as to surround the cathode electrode 3 in an annular shape. The guard ring 4 is provided so as to surround the anode electrode 2 in an annular shape. The guard ring 4 is provided so as to surround the surface electrode 1 in an annular shape.

[0028] The guard ring 4 is provided to surround the cathode electrode 3 in a direction including a plane parallel to the semiconductor substrate 6. The guard ring 4 is provided to surround the anode electrode 2 in a direction including a plane parallel to the semiconductor substrate 6. The guard ring 4 is provided to surround the front surface electrode 1 in a direction including a plane parallel to the semiconductor substrate 6. The guard ring 4 is provided on the upper surface of the semiconductor substrate 6, closer to the end than the front surface electrode 1, the anode electrode 2, and the cathode electrode 3.

[0029] The guard ring 4 is provided so as to surround the cathode electrode 3 in a direction different from the thickness direction of the semiconductor substrate 6, thereby making it possible to suppress a decrease in the withstand voltage of the semiconductor chip 111. Furthermore, the guard ring 4 is provided so as to surround the cathode electrode 3 in a direction different from the thickness direction of the semiconductor substrate 6, thereby making it possible to reduce the possibility of the electric field distribution being disrupted.

[0030] It is desirable that the guard ring 4 uninterruptedly surround the cathode electrode 3. By uninterruptedly surrounding the cathode electrode 3 with the guard ring 4, the possibility that the electric field distribution will be disrupted can be further reduced.

[0031] For example, as shown in FIG. 1, three guard rings 4 are provided, that is, three guard rings are provided around the front surface electrode 1. The guard rings 4 are named guard ring 41, guard ring 42, and guard ring 43 in the order of their position closest to the front surface electrode 1. The guard ring 41 is provided so as to surround the cathode electrode 3 in a direction different from the thickness direction of the semiconductor substrate 6. The guard ring 42 is provided so as to surround the cathode electrode 3 in a direction different from the thickness direction of the semiconductor substrate 6. The guard ring 42 is provided so as to surround the guard ring 41 in a direction different from the thickness direction of the semiconductor substrate 6. The guard ring 43 is provided so as to surround the cathode electrode 3 in a direction different from the thickness direction of the semiconductor substrate 6. The guard ring 43 is provided so as to surround the guard ring 41 in a direction different from the thickness direction of the semiconductor substrate 6. The guard ring 43 is provided so as to surround the guard ring 42 in a direction different from the thickness direction of the semiconductor substrate 6.

[0032] Guard ring 41 is provided to surround cathode electrode 3 in a direction including a plane parallel to semiconductor substrate 6. Guard ring 42 is provided to surround cathode electrode 3 in a direction including a plane parallel to semiconductor substrate 6. Guard ring 42 is provided to surround guard ring 41 in a direction including a plane parallel to semiconductor substrate 6. Guard ring 43 is provided to surround cathode electrode 3 in a direction including a plane parallel to semiconductor substrate 6. Guard ring 43 is provided to surround guard ring 42 in a direction including a plane parallel to semiconductor substrate 6. Guard ring 42 is provided to surround guard ring 41 in a direction including a plane parallel to semiconductor substrate 6.

[0033] Guard ring 41 is provided on the upper surface of semiconductor substrate 6, closer to the end than surface electrode 1, anode electrode 2, and cathode electrode 3. Guard ring 42 is provided on the upper surface of semiconductor substrate 6, closer to the end than surface electrode 1, anode electrode 2, cathode electrode 3, and guard ring 41. Guard ring 43 is provided on the upper surface of semiconductor substrate 6, closer to the end than surface electrode 1, anode electrode 2, cathode electrode 3, guard ring 41, and guard ring 42.

[0034] The number of guard rings 4 is not limited to three. One or more may be provided. The guard ring 4 may be formed using the same material as the surface electrode 1, the anode electrode 2, and the cathode electrode 3, or the surface electrode 1, the anode electrode 2, the cathode electrode 3, and the guard ring 4 may be formed using different materials. When the guard ring 4 is formed using the same material as the surface electrode 1, the anode electrode 2, and the cathode electrode 3, the guard ring 4 is easily manufactured.

[0035] The insulating film 5 is provided between the semiconductor substrate 6 and the anode electrode 2. Moreover, the insulating film 5 is provided between the semiconductor substrate 6 and the cathode electrode 3. Moreover, the insulating film 5 may be provided partially between the semiconductor substrate 6 and the front surface electrode 1. Moreover, the insulating film 5 may be provided partially between the semiconductor substrate 6 and the guard ring 4.

[0036] In FIG. 1 , in which the sealing resin and the physical quantity detection film are omitted, the insulating film 5 is exposed between the surface electrode 1 and the anode electrode 2, between the anode electrode 2 and the cathode electrode 3, between the cathode electrode 3 and the guard ring 41, between the guard ring 41 and the guard ring 42, and between the guard ring 42 and the guard ring 43.

[0037] FIG. 2 is a cross-sectional view of the semiconductor chip 111 according to the first embodiment. FIG. 2 shows an example in which a diode is used as the semiconductor element. FIG. 2 corresponds to the A-A' cross section of FIG. 1. That is, FIG. 2 shows an enlarged view of a portion of the end portion of the semiconductor chip 111. The same applies to the subsequent cross-sectional views. In FIG. 2, the right side of the paper corresponds to the center side in FIG. 1, and the left side of the paper corresponds to the end side in FIG. 1.

[0038] As shown in FIG. 2, the semiconductor chip 111 includes a surface electrode 1, an anode electrode 2, a cathode electrode 3, a guard ring 41, a guard ring 42, a guard ring 43, an insulating film 5, a semiconductor substrate 6, a physical quantity detection film 8, a protective film 9, and a back surface electrode 10.

[0039] 2, the surface electrode 1 is provided on the upper surface of the semiconductor substrate 6. A portion of the surface electrode 1 may be provided on the upper surface of the semiconductor substrate 6 via an insulating film 5. The anode electrode 2 is provided on the upper surface of the semiconductor substrate 6. The anode electrode 2 is provided on the end side of the surface electrode 1. The anode electrode 2 is provided on the upper surface of the semiconductor substrate 6 via the insulating film 5.

[0040] The cathode electrode 3 is provided on the upper surface of the semiconductor substrate 6. The cathode electrode 3 is provided on the end side of the anode electrode 2. The cathode electrode 3 is also provided on the end side of the surface electrode 1. The cathode electrode 3 is provided on the upper surface of the semiconductor substrate 6 with an insulating film 5 interposed therebetween. The anode electrode 2 is provided between the surface electrode 1 and the cathode electrode 3.

[0041] Guard ring 41 is provided on the upper surface of semiconductor substrate 6. Part of guard ring 41 may be provided on the upper surface of semiconductor substrate 6 with insulating film 5 interposed therebetween. Guard ring 42 is provided on the upper surface of semiconductor substrate 6. Part of guard ring 42 may be provided on the upper surface of semiconductor substrate 6 with insulating film 5 interposed therebetween. Guard ring 43 is provided on the upper surface of semiconductor substrate 6. Part of guard ring 43 may be provided on the upper surface of semiconductor substrate 6 with insulating film 5 interposed therebetween.

[0042] The cathode electrode 3 is provided between the anode electrode 2 and the guard ring 4. In addition, the cathode electrode 3 is provided between the surface electrode 1 and the guard ring 4.

[0043] The insulating film 5 is provided between the anode electrode 2 and the semiconductor substrate 6. The insulating film 5 is also provided between the cathode electrode 3 and the semiconductor substrate 6. The insulating film 5 may also be provided partially between the surface electrode 1 and the semiconductor substrate 6. The insulating film 5 may also be provided partially between the guard ring 41 and the semiconductor substrate 6. The insulating film 5 may also be provided partially between the guard ring 42 and the semiconductor substrate 6. The insulating film 5 may also be provided partially between the guard ring 43 and the semiconductor substrate 6.

[0044] The semiconductor substrate 6 includes a P+ layer 11, a drift layer 12, and an N cathode layer 13. The P+ layer 11 is provided on an upper surface of the drift layer 12. For example, a plurality of P+ layers 11 are provided. The N cathode layer 13 is provided on a lower surface of the drift layer 12.

[0045] As shown in FIG. 2, the surface electrode 1 is provided on the upper surface of the P+ layer 11. The surface electrode 1 is electrically connected to the P+ layer 11. A part of the surface electrode 1 may be provided on the upper surface of the P+ layer 11 via an insulating film 5. The anode electrode 2 is provided on the upper surface via the insulating film 5. The anode electrode 2 may be provided on the upper surface of the drift layer 12. The cathode electrode 3 is provided on the upper surface of the P+ layer 11 via the insulating film 5. The cathode electrode 3 may be provided on the upper surface of the drift layer 12.

[0046] The guard ring 41 is provided on the upper surface of the P+ layer 11. The guard ring 41 is electrically connected to the P+ layer 11. A part of the guard ring 41 may be provided on the upper surface of the P+ layer 11 via an insulating film 5. The guard ring 42 is provided on the upper surface of the P+ layer 11. The guard ring 42 is electrically connected to the P+ layer 11. A part of the guard ring 42 may be provided on the upper surface of the P+ layer 11 via an insulating film 5. The guard ring 43 is provided on the upper surface of the P+ layer 11. The guard ring 43 is electrically connected to the P+ layer 11. A part of the guard ring 43 may be provided on the upper surface of the P+ layer 11 via an insulating film 5.

[0047] The insulating film 5 is provided between the anode electrode 2 and the P+ layer 11. The insulating film 5 insulates the anode electrode 2 from the P+ layer 11. In other words, the anode electrode 2 and the P+ layer 11 are not electrically connected. The insulating film 5 is also provided between the cathode electrode 3 and the P+ layer 11. The insulating film 5 insulates the cathode electrode 3 from the P+ layer 11. In other words, the cathode electrode 3 and the P+ layer 11 are not electrically connected.

[0048] Furthermore, the insulating film 5 may be provided partially between the surface electrode 1 and the P+ layer 11. Furthermore, the insulating film 5 may be provided partially between the guard ring 41 and the P+ layer 11. Furthermore, the insulating film 5 may be provided partially between the guard ring 42 and the P+ layer 11. Furthermore, the insulating film 5 may be provided partially between the guard ring 43 and the P+ layer 11.

[0049] The insulating film 5 is formed of, for example, a silicon oxide film or a silicon nitride film. The thickness of the insulating film 5 in the thickness direction of the semiconductor substrate 6 is, for example, 0.1 to 1 μm.

[0050] As shown in FIG. 2, the physical quantity detection film 8 is provided between the surface electrode 1 and the anode electrode 2. The physical quantity detection film 8 is also provided between the anode electrode 2 and the cathode electrode 3. The physical quantity detection film 8 is also provided on the upper surface of the surface electrode 1. The physical quantity detection film 8 is also provided on the upper surface of the anode electrode 2. The physical quantity detection film 8 is also provided on the upper surface of the cathode electrode 3. That is, the physical quantity detection film 8 is continuously provided between the surface electrode 1 and the anode electrode 2, between the anode electrode 2 and the cathode electrode 3, on the upper surface of the surface electrode 1, and on the upper surface of the cathode electrode 3.

[0051] The physical quantity detection film 8 detects, for example, humidity. The physical quantity detection film 8 is formed, for example, of a material whose dielectric constant changes when it absorbs moisture. The physical quantity detection film 8 is formed, for example, of a polymer organic material represented by polyimide and phenolic resin. The physical quantity detection film 8 may be formed of silica gel that has the property of adsorbing water molecules, or a silicon oxide film containing boron or phosphorus.

[0052] The semiconductor chip 111 can measure the capacitance of the physical quantity detection film 8 and measure physical quantities such as humidity by applying a voltage between the anode electrode 2 and the cathode electrode 3. Also, the semiconductor chip 111 can measure the capacitance of the physical quantity detection film 8 and measure humidity by applying a voltage between the anode electrode 2 and the surface electrode 1.

[0053] The smaller the distance between the anode electrode 2 and the cathode electrode 3, the larger the capacitance value of the physical quantity detection film 8. In other words, it is less susceptible to noise, so it is easier to measure physical quantities such as humidity. Also, the smaller the distance between the anode electrode 2 and the surface electrode 1, the larger the capacitance value of the physical quantity detection film 8. In other words, it is less susceptible to noise, so it is easier to measure physical quantities such as humidity. Also, the smaller the sum of the distance between the anode electrode 2 and the cathode electrode 3 and the distance between the anode electrode 2 and the surface electrode 1, the larger the capacitance value of the physical quantity detection film 8. In other words, it is less susceptible to noise, so it is easier to measure physical quantities such as humidity.

[0054] On the other hand, the distance between the anode electrode 2 and the cathode electrode 3 needs to be large enough to prevent electrical continuity between the anode electrode 2 and the cathode electrode 3. Similarly, the distance between the anode electrode 2 and the surface electrode 1 needs to be large enough to prevent electrical continuity between the anode electrode 2 and the surface electrode 1. Therefore, appropriate sizes need to be selected for the distance between the anode electrode 2 and the cathode electrode 3 and the distance between the anode electrode 2 and the surface electrode 1.

[0055] The distance between the anode electrode 2 and the cathode electrode 3 is desirably, for example, 1 to 5 μm in order to suppress migration between the anode electrode 2 and the cathode electrode 3 and to facilitate connection between the anode electrode 2 and the wiring wire. The distance between the anode electrode 2 and the surface electrode 1 is desirably, for example, 1 to 5 μm in order to suppress migration between the anode electrode 2 and the surface electrode 1, to facilitate connection between the anode electrode 2 and the wiring wire, and to facilitate connection between the surface electrode 1 and the wiring wire.

[0056] Moreover, the distance between the anode electrode 2 and the cathode electrode 3 is desirably, for example, 0.5 to 3 μm in order to facilitate the provision of the physical quantity detection film 8 between the anode electrode 2 and the cathode electrode 3. Moreover, the distance between the anode electrode 2 and the surface electrode 1 is desirably, for example, 0.5 to 3 μm in order to facilitate the provision of the physical quantity detection film 8 between the anode electrode 2 and the cathode electrode 3.

[0057] The physical quantity detection film 8 provided on the upper surfaces of the surface electrode 1, the anode electrode 2, and the cathode electrode 3 has a thickness in the thickness direction of the semiconductor substrate 6 of, for example, about 0.1 to 5 μm.

[0058] Moreover, it is desirable that the anode electrodes 2 are provided over a wide range around the surface electrode 1. That is, even when a plurality of anode electrodes 2 are provided, it is desirable that the anode electrodes 2 are provided with small intervals between them. By providing the anode electrodes 2 over a wide range around the surface electrode 1, it is possible to increase the capacitance value of the physical quantity detection film 8. Furthermore, by providing the anode electrodes 2 over a wide range around the surface electrode 1, it is possible to increase the area in which the physical quantity can be detected.

[0059] The physical quantity detection film 8 only needs to fill most of the space between the anode electrode 2 and the cathode electrode 3, or between the anode electrode 2 and the surface electrode 1, and may include minute voids.

[0060] The protective film 9 is provided so as to cover the upper surface and side surfaces of the guard ring 4. That is, the protective film 9 is provided so as to cover the guard ring 4. The protective film 9 is also provided on the upper surface of the semiconductor substrate 6. The protective film 9 may be provided on the upper surface of the semiconductor substrate 6 with an insulating film 5 interposed therebetween.

[0061] Protective film 9 protects guard ring 4. To protect guard ring 4, it is desirable for protective film 9 to be thick. That is, it is desirable for the portion of protective film 9 provided on the top surface of guard ring 4 to be large in size in the thickness direction of semiconductor substrate 6. Also, it is desirable for the portion of protective film 9 provided on the side surface of guard ring 4 to be large in size in the direction perpendicular to the thickness direction of semiconductor substrate 6.

[0062] Furthermore, since the physical quantity detection film 8 is used to detect a physical quantity such as humidity, and the protective film 9 is used to protect the guard ring 4, the appropriate thicknesses of the physical quantity detection film 8 and the protective film 9 may differ depending on the material of the sealing resin 20, etc. The physical quantity detection film 8 and the protective film 9 may have the same size or different sizes in the thickness direction of the semiconductor substrate 6. By determining the thickness of the physical quantity detection film 8 independently of the protective film 9, the timing at which the semiconductor device 101 including the semiconductor chip 111 detects water molecules, etc. can be freely adjusted.

[0063] The back electrode 10 is provided on the lower surface of the semiconductor substrate 6. The back electrode 10 is formed of, for example, Al, an Al alloy, Ti, or a Ti alloy. The back electrode 10 is formed, for example, by stacking Al or an Al alloy, and Ti or a Ti alloy on the lower surface of the semiconductor substrate 6 in order from the semiconductor substrate 6 side to form a laminated film. The back electrode 10 is formed, for example, of Ni, a Ni alloy, Au, Ag, or an Ag alloy. The back electrode 10 is formed, for example, by stacking Ni or a Ni alloy, and Au, Ag, or an Ag alloy on the lower surface of the semiconductor substrate 6 in order from the semiconductor substrate 6 side to form a laminated film.

[0064] The semiconductor chip 111 includes a front surface electrode 1, an anode electrode 2, a cathode electrode 3, a guard ring 4, an insulating film 5, a semiconductor substrate 6, a physical quantity detection film 8, a protective film 9, and a back surface electrode .

[0065] Moreover, the current carrying region 112 refers to a region where the surface electrode 1 is provided. Moreover, the physical quantity detection region 113 refers to a region where the anode electrode 2, the cathode electrode 3, and the physical quantity detection film 8 are provided. Moreover, the withstand voltage holding region 114 refers to a region where the guard ring 4 and the protective film 9 are provided.

[0066] Fig. 3 is a cross-sectional view of the semiconductor chip 111 according to the first embodiment. Fig. 3 shows an example in which a diode is used as the semiconductor element. Fig. 3 corresponds to the A-A' cross section of Fig. 1. In Fig. 3, the right side of the paper corresponds to the center side in Fig. 1, and the left side of the paper corresponds to the end side in Fig. 1.

[0067] 3, the physical quantity detection film 8 does not have to be provided on the upper surfaces of the surface electrode 1, the anode electrode 2, and the cathode electrode 3. Even if the physical quantity detection film 8 is not provided on the upper surfaces of the surface electrode 1, the anode electrode 2, and the cathode electrode 3, the semiconductor device 101 including the semiconductor chip 111 can detect a physical quantity such as humidity.

[0068] By not providing the physical quantity detection film 8 on the upper surfaces of the surface electrode 1, the anode electrode 2, and the cathode electrode 3, when the physical quantity detection film 8 has a slower rate of water molecule permeability than the sealing resin 20, the water molecules can diffuse into the physical quantity detection film 8 provided between the anode electrode 2 and the surface electrode 1 or between the anode electrode 2 and the cathode electrode 3 more quickly than in the case where the physical quantity detection film 8 is provided on the upper surfaces of the surface electrode 1, the anode electrode 2, and the cathode electrode 3.

[0069] Furthermore, even when the physical quantity detection film 8 is provided on the upper surfaces of the surface electrode 1, the anode electrode 2, and the cathode electrode 3, the size of the physical quantity detection film 8 provided on the upper surfaces of the surface electrode 1, the anode electrode 2, and the cathode electrode 3 in the thickness direction of the semiconductor substrate 6 is small, and therefore water molecules can diffuse more quickly than when the size of the physical quantity detection film 8 in the thickness direction of the semiconductor substrate 6 is large.

[0070] In other words, by changing the size in the thickness direction of the semiconductor substrate 6 of the physical quantity detection film 8 provided on the upper surfaces of the surface electrode 1, the anode electrode 2, and the cathode electrode 3, it is possible to adjust the time it takes for water molecules, etc. to reach the physical quantity detection film 8 provided between the anode electrode 2 and the surface electrode 1 or between the anode electrode 2 and the cathode electrode 3, and it is possible to adjust the timing at which the semiconductor device 101 including the semiconductor chip 111 detects water molecules, etc.

[0071] Furthermore, in the case where the physical quantity detection film 8 allows water molecules to pass through it faster than the sealing resin 20, the size of the physical quantity detection film 8 provided on the upper surfaces of the surface electrode 1, the anode electrode 2, and the cathode electrode 3 in the thickness direction of the semiconductor substrate 6 can be increased, thereby allowing the water molecules to diffuse more quickly than when the size of the physical quantity detection film 8 in the thickness direction of the semiconductor substrate 6 is small.

[0072] It is preferable that the size of the physical quantity detection film 8 provided on the upper surface of the anode electrode 2 in the thickness direction of the semiconductor substrate 6 is smaller than the size of the anode electrode 2 in the thickness direction of the semiconductor substrate 6. It is also preferable that the size of the physical quantity detection film 8 provided on the upper surface of the front electrode 1 in the thickness direction of the semiconductor substrate 6 and the size of the physical quantity detection film 8 provided on the upper surface of the cathode electrode 3 in the thickness direction of the semiconductor substrate 6 are smaller than the size of the anode electrode 2 in the thickness direction of the semiconductor substrate 6.

[0073] The physical quantity detection film 8 does not have to be provided on the upper surfaces of the surface electrode 1, the anode electrode 2, and the cathode electrode 3, but if the physical quantity detection film 8 is provided on the upper surfaces of the surface electrode 1, the anode electrode 2, and the cathode electrode 3, it is easy to form the physical quantity detection film 8.

[0074] Furthermore, the physical quantity detection film 8 may not be provided between the surface electrode 1 and the anode electrode 2, but may be provided only between the anode electrode 2 and the cathode electrode 3. Furthermore, the physical quantity detection film 8 may not be provided between the anode electrode 2 and the cathode electrode 3, but may be provided only between the surface electrode 1 and the anode electrode 2. When the physical quantity detection film 8 is not provided between the surface electrode 1 and the anode electrode 2, a sealing resin 20 is provided between the surface electrode 1 and the anode electrode 2. When the physical quantity detection film 8 is not provided between the anode electrode 2 and the cathode electrode 3, a sealing resin 20 is provided between the anode electrode 2 and the cathode electrode 3.

[0075] Fig. 4 is a cross-sectional view of the semiconductor chip 111 according to the first embodiment. Fig. 4 shows an example in which a diode is used as the semiconductor element. Fig. 4 corresponds to the B-B' cross section of Fig. 1. In Fig. 4, the right side of the paper corresponds to the center side in Fig. 1, and the left side of the paper corresponds to the end side in Fig. 1.

[0076] 4, the surface electrode 1 and the cathode electrode 3 are integrally formed and connected at the B-B' cross section. Since the surface electrode 1 and the cathode electrode 3 have the same potential, the potential of the cathode electrode 3 can be measured by measuring the potential of the wiring wire connected to the surface electrode 1. In other words, since the electrical signal of the cathode electrode 3 is obtained from the wiring wire connected to the surface electrode 1, there is no need to connect a wiring wire to the cathode electrode 3, which can reduce costs.

[0077] Fig. 5 is a cross-sectional view of the semiconductor chip 111 according to the first embodiment. Fig. 5 shows an example in which a diode is used as the semiconductor element. Fig. 5 corresponds to the CC' cross section of Fig. 1. In Fig. 5, the right side of the paper corresponds to the center side in Fig. 1, and the left side of the paper corresponds to the end side in Fig. 1.

[0078] 5, in the CC' cross section, the anode electrode 2 is provided so as to be thicker in the direction including the semiconductor substrate 6 than in the A-A' cross section. The anode electrode 2 also includes an anode pad 7 exposed from the physical quantity detection film 8. The anode pad 7 is exposed from the physical quantity detection film 8, and a wiring wire can be connected to the anode pad 7. In addition, in the CC' cross section, the physical quantity detection film 8 is not provided between the surface electrode 1 and the anode electrode 2.

[0079] Fig. 6 is a cross-sectional view of the semiconductor device 101 according to the first embodiment. Note that the internal configuration of the semiconductor substrate 6 is omitted in Fig. 6. Also, in Fig. 6, the anode electrode 2, the cathode electrode 3, the guard ring 4, the insulating film 5, the physical quantity detection film 8, and the protective film 9 are omitted.

[0080] The semiconductor device 101 includes a semiconductor chip 111 , a solder 14 , a circuit board 15 , a wiring wire 16 , a terminal 17 , a terminal 18 , a case 19 , and a sealing resin 20 .

[0081] Solder 14 is provided on the underside of semiconductor chip 111. Solder 14 is also provided on the upper side of circuit board 15. Backside electrode 10 of semiconductor chip 111 is electrically connected to copper 21 of circuit board 15 via solder 14.

[0082] The circuit board 15 includes copper 21, copper 22, a ceramic substrate 23, and copper 24. The ceramic substrate 23 has the copper 21 and the copper 22 provided on an upper surface thereof. The ceramic substrate 23 has the copper 24 provided on a lower surface thereof. The copper 21 is electrically connected to the semiconductor chip 111 via the solder 14.

[0083] The wiring wire 16 is connected to, for example, the surface electrode 1 or the anode pad 7. Although one wiring wire 16 is provided in Fig. 6, two or more wiring wires 16 may be provided.

[0084] Of the ends of the wiring wire 16 connected to the surface electrode 1, the end not connected to the surface electrode 1 is electrically connected to a terminal 17 via copper 22. Although not shown in Fig. 6, of the ends of the wiring wire 16 connected to the anode pad 7 of the anode electrode 2, the end not connected to the anode pad 7 of the anode electrode 2 is electrically connected to a terminal 18. Alternatively, of the ends of the wiring wire 16, the end not connected to the anode pad 7 of the anode electrode 2 is connected to a signal pad of a signal processing semiconductor element incorporating a capacitance measuring circuit.

[0085] The side surfaces of the semiconductor device 101 are covered with a case 19. It is to be noted that the case 19 does not necessarily have to be provided.

[0086] As shown in FIG. 6, the sealing resin 20 seals the semiconductor chip 111, the circuit board 15, the wiring wires 16, and the solder 14 integrally.

[0087] The circuit board 15, the terminals 17 for extracting electric signals, and the terminals 18 are partially exposed from the sealing resin 20. The circuit board 15, particularly the copper 24, is exposed from the sealing resin 20. The ceramic substrate 23 of the circuit board 15 may or may not be exposed from the sealing resin 20. The circuit board 15 is partially exposed from the sealing resin 20 and functions as an insulating heat dissipation member.

[0088] The sealing resin 20 is, for example, an epoxy resin or a silicone gel. Epoxy resin and silicone gel have low moisture permeability and moisture barrier properties compared to metals, etc. Therefore, in a high humidity environment, water molecules may permeate the sealing resin 20 and reach the semiconductor chip 111 from the outside of the sealing resin 20.

[0089] Furthermore, the circuit board 15, the terminals 17, and the terminals 18, which are partially exposed from the sealing resin 20, are in contact with the outside of the semiconductor device 101. Therefore, moisture may easily enter the semiconductor device 101 from the interfaces between the sealing resin 20 and the circuit board 15, the terminals 17, and the terminals 18.

[0090] For example, a voltage is applied between the anode electrode 2 and the surface electrode 1 or the cathode electrode 3 in advance in a plurality of known humidity environments, and the capacitance of the physical quantity detection film 8 is measured to measure the correlation between the capacitance and the moisture amount or humidity in the physical quantity detection film 8. By measuring the correlation between the capacitance and the moisture amount or humidity in the physical quantity detection film 8 in advance, the moisture amount or humidity can be estimated from the capacitance value between the anode electrode 2 and the surface electrode 1 or the cathode electrode 3.

[0091] The semiconductor device 101 may use, as the semiconductor element, for example, a diode, a bipolar transistor, an insulated gate bipolar transistor (IGBT), or a metal oxide semiconductor field effect transistor (MOSFET).

[0092] When the semiconductor element is a diode, an IGBT, or a MOSFET, an n-type semiconductor is often used for the semiconductor substrate 6, but a p-type semiconductor may also be used. The semiconductor substrate 6 may be, for example, a Si substrate or a SiC substrate.

[0093] The wiring wire 16 is made of Al, an Al alloy, Cu, a Cu alloy, Ag, an Ag alloy, or Au. The diameter of the wiring wire 16 is preferably several tens of microns to several hundreds of microns. More preferably, the diameter of the wiring wire 16 is 200 μm. The diameter of the wiring wire 16 can be arbitrarily selected from the viewpoint of the bondability between the wiring wire 16 and the surface electrode 1 or the anode electrode 2, and from the viewpoint of the measurement accuracy due to the electrical resistance of the wiring wire 16 during capacitance measurement.

[0094] The material and diameter of the wiring wire 16 connected to the surface electrode 1 are desirably the same as the material and diameter of the wiring wire 16 connected to the anode electrode 2. By making the material and diameter of the wiring wire 16 connected to the surface electrode 1 the same as the material and diameter of the wiring wire 16 connected to the anode electrode 2, assembly such as attaching the wiring wire 16 to the surface electrode 1 or attaching the wiring wire 16 to the anode electrode 2 is facilitated. Note that the material and diameter of the wiring wire 16 connected to the surface electrode 1 may be different from the material and diameter of the wiring wire 16 connected to the anode electrode 2.

[0095] Next, a method for manufacturing the semiconductor device 101 according to the present embodiment will be described. Note that a conventional method can be used to form a diode, a bipolar transistor, a MOSFET, an IGBT, etc. Also, the front surface electrode 1 can be formed by a conventional method.

[0096] Next, a manufacturing method of the semiconductor chip 111 according to the first embodiment will be described with reference to Figs. 7 to 11. Fig. 7 is a diagram showing the manufacturing method of the semiconductor chip 111 according to the first embodiment. Fig. 7 corresponds to the CC' cross section of Fig. 1. First, as shown in Fig. 7, a P+ layer 11 is formed in the semiconductor substrate 6. For example, four P+ layers 11 are provided in the CC' cross section of Fig. 1. Note that the number of P+ layers 11 provided is not limited to four.

[0097] Next, an insulating film 5 is formed on the upper surface of the semiconductor substrate 6. For example, four insulating films 5 are provided in the CC' cross section of FIG. 1. The four P+ layers 11 are not connected to each other and are provided independently. The insulating film 5 is provided so that the P+ layer 11 provided in the semiconductor substrate 6 is partially exposed. The P+ layer 11 partially exposed from the insulating film 5 is connected to the front electrode 1 or the guard ring 4. The insulating film 5 is provided so as to straddle the P+ layer 11 provided in the semiconductor substrate 6. The number of P+ layers 11 provided is not limited to four.

[0098] Fig. 8 is a diagram showing a manufacturing method of the semiconductor chip 111 according to the first embodiment. Fig. 8 corresponds to the CC' cross section of Fig. 1. As shown in Fig. 8, a surface electrode 1, an anode electrode 2, a cathode electrode 3, a guard ring 41, a guard ring 42, and a guard ring 43 are formed on the upper surface of a semiconductor substrate 6.

[0099] An anode electrode 2 is formed so as to surround the surface electrode 1 in a direction different from the thickness direction of the semiconductor substrate 6. A cathode electrode 3 is formed so as to surround the anode electrode 2 in a direction different from the thickness direction of the semiconductor substrate 6. A guard ring 4 is formed so as to surround the cathode electrode 3 in a direction different from the thickness direction of the semiconductor substrate 6.

[0100] The surface electrode 1, the anode electrode 2, the cathode electrode 3, the guard ring 41, the guard ring 42, and the guard ring 43 are formed by, for example, a sputtering method or a vacuum deposition method.

[0101] The surface electrode 1, the guard ring 41, the guard ring 42, and the guard ring 43 are provided on the upper surface of the semiconductor substrate 6 so as to be in contact with the P+ layer 11. The anode electrode 2 and the cathode electrode 3 are provided on the upper surface of the semiconductor substrate 6 via the insulating film 5 so as not to be in contact with the P+ layer 11.

[0102] When forming the surface electrode 1, the anode electrode 2, the cathode electrode 3, the guard ring 41, the guard ring 42, and the guard ring 43, if the surface electrode 1, the anode electrode 2, the cathode electrode 3, the guard ring 41, the guard ring 42, and the guard ring 43 have the same size in the thickness direction of the semiconductor substrate 6 and are made of the same material, the surface electrode 1, the anode electrode 2, the cathode electrode 3, the guard ring 41, the guard ring 42, and the guard ring 43 can be formed simultaneously. By forming the surface electrode 1, the anode electrode 2, the cathode electrode 3, the guard ring 41, the guard ring 42, and the guard ring 43 simultaneously, the manufacture of the semiconductor device 101 including the semiconductor chip 111 becomes easier and the productivity is improved.

[0103] Furthermore, when the surface electrode 1, the anode electrode 2, the cathode electrode 3, the guard ring 41, the guard ring 42, and the guard ring 43 are formed of different materials, the surface electrode 1, the anode electrode 2, the cathode electrode 3, the guard ring 41, the guard ring 42, and the guard ring 43 may be formed in any order and by any film formation method. In other words, the step of forming the surface electrode 1, the step of forming the anode electrode 2, the step of forming the cathode electrode 3, and the step of forming the guard ring 4 can be performed in any order.

[0104] 9 is a diagram showing a manufacturing method of the semiconductor chip 111 according to the first embodiment. FIG. 9 corresponds to the CC' cross section of FIG. 1. As shown in FIG. 9, a protective film 9 is formed on the upper surfaces of the guard rings 41, 42, and 43. The protective film 9 is formed so as to cover the guard rings 41, 42, and 43. The protective film 9 may be in contact with the cathode electrode 3, the insulating film 5, and the semiconductor substrate 6 as long as it covers the guard rings 41, 42, and 43. The protective film 9 is formed by a chemical vapor deposition method (CVD method), a spin coating method, an inkjet method, or the like.

[0105] Fig. 10 is a diagram showing a manufacturing method of the semiconductor chip 111 according to the first embodiment. Fig. 10 corresponds to the CC' cross section of Fig. 1. As shown in Fig. 10, the physical quantity detection film 8 is formed on the upper surfaces of the surface electrode 1, the anode electrode 2, and the cathode electrode 3. The physical quantity detection film 8 is also formed between the anode electrode 2 and the cathode electrode 3. The physical quantity detection film 8 may also be formed between the anode electrode 2 and the surface electrode 1. The physical quantity detection film 8 may not be formed on the upper surfaces of the surface electrode 1, the anode electrode 2, and the cathode electrode 3, but may be formed only between the anode electrode 2 and the cathode electrode 3.

[0106] When forming the physical quantity detection film 8, if the material used for the physical quantity detection film 8 has a photosensitive property, a desired pattern can be formed by a direct exposure phenomenon. Also, if the material used for the physical quantity detection film 8 has a non-photosensitive property, the physical quantity detection film 8 can be formed into a desired pattern by applying the physical quantity detection film 8 to the surface electrode 1, the anode electrode 2, or the cathode electrode 3, and then patterning a resist mask and etching the physical quantity detection film 8.

[0107] Furthermore, when the physical quantity detection film 8 is made of a resin-based material, the pattern of the physical quantity detection film 8 may be directly formed by a screen printing method or an inkjet method. After the pattern formation of the physical quantity detection film 8 is completed, the physical quantity detection film 8 is subjected to a heat treatment at a temperature of about 200° C. to 400° C. in order to remove the solvent component from the physical quantity detection film 8.

[0108] It is desirable to form the physical quantity detection film 8 after forming the protective film 9. The protective film 9 may be formed at a higher temperature than the physical quantity detection film 8. In cases where the protective film 9 is formed at a higher temperature than the physical quantity detection film 8, the physical quantity detection film 8 can be prevented from being damaged by heat by forming the protective film 9 before the physical quantity detection film 8. Depending on the selection of materials for the physical quantity detection film 8 and the protective film 9, the physical quantity detection film 8 may not be damaged even if the physical quantity detection film 8 is formed before the protective film 9. Therefore, the physical quantity detection film 8 may be formed before the protective film 9.

[0109] Fig. 11 is a diagram showing a method for manufacturing a semiconductor chip 111 according to the first embodiment. Fig. 11 corresponds to the CC' cross section of Fig. 1. As shown in Fig. 11, the lower surface of the semiconductor substrate 6, which is the surface opposite to the upper surface on which the P+ layer 11 is provided, is ground until the N cathode layer 13 has a desired thickness, thereby forming the N cathode layer 13. Grinding methods include physical grinding with a grindstone, chemical grinding with an acid, and a combination of physical grinding and chemical grinding.

[0110] 11, a back electrode 10 is formed on the lower surface of the semiconductor substrate 6. That is, the back electrode 10 is formed on the lower surface of the N cathode layer 13. Before forming the back electrode 10, the semiconductor substrate 6 is subjected to hydrofluoric acid treatment, ammonia / hydrogen peroxide treatment, hydrochloric acid / hydrogen peroxide treatment, sulfuric acid / hydrogen peroxide treatment, or sputter etching treatment in order to remove a natural oxide film and foreign matter formed on the surface of the semiconductor substrate 6. The back electrode 10 is formed by, for example, a sputtering method, a vacuum deposition method, or a plating method.

[0111] Next, a method for manufacturing semiconductor device 101 using semiconductor chip 111 will be described with reference to Fig. 12 to Fig. 14. Fig. 12 is a diagram showing a method for manufacturing semiconductor device 101 according to embodiment 1. Fig. 12 corresponds to the CC' cross section of Fig. 1. Fig. 12 shows a part of semiconductor device 101. As shown in Fig. 12, semiconductor chip 111, which has been divided into individual pieces by dicing or the like, is joined to circuit board 15 using solder 14.

[0112] For example, a solder paste is applied to the circuit board 15, the semiconductor chip 111 is placed on the solder paste, and after the semiconductor chip 111 is placed, the semiconductor chip 111 and the circuit board 15 are joined by heating or cooling. Alternatively, the solder 14 is placed on the preheated circuit board 15, the solder 14 is melted, and then the semiconductor chip 111 is placed on the molten solder 14, and the semiconductor chip 111 is cooled, thereby joining the semiconductor chip 111 and the circuit board 15.

[0113] Alternatively, after applying molten solder 14 onto heated circuit board 15, semiconductor chip 111 is placed thereon to bond semiconductor chip 111 to circuit board 15. Solder 14 is formed with Sn as a main component. Solder 14 also contains Ag, Cu, Bi, Sb, Ni, Pb, P, or the like.

[0114] FIG. 13 is a diagram showing a manufacturing method of the semiconductor device 101 according to the first embodiment. FIG. 13 corresponds to the CC' cross section of FIG. 1. FIG. 13 shows a part of the semiconductor device 101. As shown in FIG. 13, the wiring wire 16 is ultrasonically bonded to the anode pad 7. The wiring wire 16 is provided on the upper surface of the anode pad 7 provided on the anode electrode 2. The wiring wire 16 is electrically connected to the anode pad 7. The wiring wire 16 is also ultrasonically bonded to the surface electrode 1. The wiring wire 16 is provided on the upper surface of the surface electrode 1. The wiring wire 16 is electrically connected to the surface electrode 1.

[0115] When the wiring wire 16 connected to the anode pad 7 and the wiring wire 16 connected to the surface electrode 1 are of the same thickness and the same material, the wiring wire 16 connected to the anode pad 7 and the wiring wire 16 connected to the surface electrode 1 may be wire bonded simultaneously.

[0116] Furthermore, for example, when the wiring wire 16 connected to the anode pad 7 is thinner than the wiring wire 16 connected to the surface electrode 1, it is desirable to connect the wiring wire 16 to the anode pad 7 after connecting the wiring wire 16 to the surface electrode 1. By connecting the wiring wire 16 to the anode pad 7 after connecting the wiring wire 16 to the surface electrode 1, the possibility of the previously connected wiring wire 16 breaking can be reduced.

[0117] The ultrasonic bonding may be ball bonding or wedge bonding. The method of bonding the wiring wire 16 to the surface electrode 1 or the anode pad 7 is not limited to ultrasonic bonding. The wiring wire 16 may be bonded to the surface electrode 1 or the anode electrode 2 using a solder or a paste material containing a metal material as a bonding material. The end of the wiring wire 16 that is not connected to the surface electrode 1 or the anode electrode 2 may be connected to a terminal 17 or a terminal 18 shown in FIG. 6.

[0118] FIG. 14 is a diagram showing a manufacturing method of the semiconductor device 101 according to the first embodiment. FIG. 14 corresponds to the CC' cross section of FIG. 1. FIG. 14 shows a part of the semiconductor device 101. As shown in FIG. 14, the entire semiconductor chip 111 is sealed with sealing resin 20. A method of injecting gel or potting resin into a box-shaped case, or a transfer molding method using a metal mold, which are conventional methods for producing semiconductor packages, can be adopted. FIG. 14 shows only a part of the sealing resin 20.

[0119] Since the semiconductor device 101 is provided with the anode electrode 2, the cathode electrode 3, and the physical quantity detection film 8, it becomes possible to detect a high humidity state before a malfunction occurs due to conduction, discharge, migration, or the like caused by moisture or humidity in the sealing resin 20 in the high electric field region generated in the withstand voltage holding region 114.

[0120] In addition, if the possibility of malfunction becomes high, special operations can be performed to suppress the malfunction, such as stopping the operation of the semiconductor device 101, evaporating moisture by generating heat in the semiconductor device 101, or transmitting information to the outside.

[0121] Although the physical quantity detection film 8 detects humidity in the above embodiment, the physical quantity detection film 8 may detect a physical quantity other than humidity.

[0122] The semiconductor device 101 includes a semiconductor substrate 6, a surface electrode 1 provided on an upper surface of the semiconductor substrate 6, an anode electrode 2 provided so as to surround the surface electrode 1 in a direction different from the thickness direction of the semiconductor substrate 6, a cathode electrode 3 provided so as to surround the anode electrode 2 in a direction different from the thickness direction of the semiconductor substrate 6, a guard ring 4 provided so as to surround the cathode electrode 3 in a direction different from the thickness direction of the semiconductor substrate 6, and a physical quantity detection film 8 provided between the anode electrode 2 and the cathode electrode 3, so that it is possible to obtain the semiconductor device 101 in which the anode electrode 2 and the cathode electrode 3 can be easily formed.

[0123] Furthermore, the semiconductor device 101 includes the semiconductor substrate 6, the surface electrode 1 provided on the upper surface of the semiconductor substrate 6, the anode electrode 2 provided so as to surround the surface electrode 1 in a direction different from the thickness direction of the semiconductor substrate 6, the cathode electrode 3 provided so as to surround the anode electrode 2 in a direction different from the thickness direction of the semiconductor substrate 6, the guard ring 4 provided so as to surround the cathode electrode 3 in a direction different from the thickness direction of the semiconductor substrate 6, and the physical quantity detection film 8 provided between the anode electrode 2 and the surface electrode 1, so that the semiconductor device 101 can be obtained in which the anode electrode 2 and the cathode electrode 3 can be easily formed. That is, the productivity of the semiconductor device 101 is improved.

[0124] Furthermore, by arranging the anode electrode 2 and the cathode electrode 3 not in a comb shape but so as to surround the surface electrode 1 in a direction including a plane parallel to the semiconductor substrate 6, even when the anode electrode 2, the cathode electrode 3, and the physical quantity detection film 8 are applied to a semiconductor device that does not include the anode electrode 2, the cathode electrode 3, and the physical quantity detection film 8, the space for arranging the electrodes can be reduced, and the size of the semiconductor device can be reduced.

[0125] Moreover, the anode electrode 2, the cathode electrode 3, and the guard ring 4 are provided on the upper surface of the semiconductor substrate 6, and are provided so as to surround the surface electrode 1 in a direction including a plane parallel to the semiconductor substrate 6. That is, the anode electrode 2 and the cathode electrode 3 used for detecting a physical quantity are formed in a shape similar to the guard ring 4 forming the termination structure of the semiconductor chip 111. That is, the anode electrode 2 and the cathode electrode 3 are formed by utilizing the termination structure of the semiconductor chip 111. By forming the anode electrode 2 and the cathode electrode 3 by utilizing the termination structure of the semiconductor chip 111, the formation of the semiconductor chip 111 becomes easier. That is, the productivity of the semiconductor device 101 is improved.

[0126] Furthermore, the manufacturing method of the semiconductor device 101 includes the steps of forming the surface electrode 1 on the upper surface of the semiconductor substrate 6, forming the anode electrode 2 so as to surround the surface electrode 1 in a direction different from the thickness direction of the semiconductor substrate 6, forming the cathode electrode 3 so as to surround the anode electrode 2 in a direction different from the thickness direction of the semiconductor substrate 6, forming the guard ring so as to surround the cathode electrode 3 in a direction different from the thickness direction of the semiconductor substrate 6, and forming the physical quantity detection film 8 between the anode electrode 2 and the cathode electrode 3, thereby making it possible to obtain the semiconductor device 101 in which the anode electrode 2 and the cathode electrode 3 can be easily formed. That is, the productivity of the semiconductor device 101 is improved.

[0127] Embodiment 2 A semiconductor chip 122 in the second embodiment will be described with reference to Fig. 15. Descriptions of configurations similar to those in the first embodiment will be omitted. In Fig. 15, the same reference numerals as those in Figs. 1 to 14 indicate the same or corresponding parts.

[0128] Fig. 15 is a top view of semiconductor chip 122 according to embodiment 2. Also, in Fig. 15, physical quantity detection film 8 and protective film 9 are omitted. As shown in Fig. 15, semiconductor chip 122 according to this embodiment differs from semiconductor chip 111 according to embodiment 1 in that a plurality of surface electrodes are provided. The following description will focus on the differences from semiconductor chip 111 according to embodiment 1.

[0129] The semiconductor device according to the second embodiment includes a semiconductor chip 122. As shown in Fig. 15, the semiconductor chip 122 according to the second embodiment includes a surface electrode 51 and a surface electrode 52. The surface electrode 51 is formed integrally with the cathode electrode 3, for example. By providing the surface electrodes 51 and 52 on the upper surface of the semiconductor substrate 6 and providing a gap between the surface electrodes 51 and 52, it is possible to provide another element, gate wiring, or the like (not shown) on the portion of the upper surface of the semiconductor substrate 6 where the surface electrodes 51 and 52 are not provided.

[0130] Although the semiconductor chip 122 shown in FIG. 15 includes two surface electrodes, the number of surface electrodes is not limited to two, and the semiconductor chip 122 may include three or more surface electrodes.

[0131] Embodiment 3 A semiconductor chip 123 in the third embodiment will be described with reference to Fig. 16. Descriptions of configurations similar to those in the first embodiment will be omitted. In Fig. 16, the same reference numerals as those in Figs. 1 to 15 indicate the same or corresponding parts.

[0132] Fig. 16 is a top view of semiconductor chip 123 according to embodiment 3. Also, in Fig. 16, the physical quantity detection film 8 and protective film 9 are omitted. As shown in Fig. 16, semiconductor chip 123 according to this embodiment differs from semiconductor chip 111 according to embodiment 1 in that a plurality of anode electrodes are provided. The following description will focus on the differences from semiconductor chip 111 according to embodiment 1.

[0133] 16, the semiconductor chip 123 according to the third embodiment includes a surface electrode 51, a surface electrode 52, an anode electrode 53, and an anode electrode 54. The anode electrode 53 includes an anode pad 55. The anode electrode 54 includes an anode pad 56.

[0134] The anode pad 55 and the anode pad 56 are exposed from the physical quantity detection film 8. In addition, the anode pad 55 and the anode pad 56 can be connected to wiring wires (not shown).

[0135] By providing the semiconductor chip 123 with a plurality of anode electrodes, the thickness or material of the physical quantity detection films 8 provided in contact with each anode electrode can be made different from each other, thereby making it possible to adjust the detection sensitivity of the physical quantity.

[0136] Although the semiconductor chip 123 shown in FIG. 16 includes two anode electrodes, the number of anode electrodes is not limited to two, and the semiconductor chip 123 may include three or more anode electrodes.

[0137] Embodiment 4 A semiconductor chip 124 in the fourth embodiment will be described with reference to Fig. 17. Descriptions of configurations similar to those in the first embodiment will be omitted. In Fig. 17, the same reference numerals as those in Figs. 1 to 16 indicate the same or corresponding parts.

[0138] Fig. 17 is a cross-sectional view of the semiconductor chip 124 according to the first embodiment. Fig. 17 shows an example in which a diode is used as the semiconductor element. Fig. 17 corresponds to the AA' cross section of Fig. 1.

[0139] 17, the semiconductor chip 124 according to the present embodiment differs from the semiconductor chip 111 of the first embodiment in that a physical quantity detection film is provided so as to cover the guard ring 41, the guard ring 42, and the guard ring 43. The following description will focus on the differences from the semiconductor chip 111 of the first embodiment.

[0140] 17, the physical quantity detection film 57 is provided on the upper surface of the semiconductor substrate 6. The physical quantity detection film 57 is provided so as to cover the anode electrode 2, the cathode electrode 3, the guard ring 41, the guard ring 42, and the guard ring 43. The physical quantity detection film 57 may be provided so as to cover a portion of the surface electrode 1. The physical quantity detection film 57 may be provided so as to cover a portion of the insulating film 5.

[0141] The physical quantity detection film 57 protects the guard ring 41, the guard ring 42, and the guard ring 43. It is desirable that the physical quantity detection film 57 provided on the upper surfaces of the guard ring 41, the guard ring 42, and the guard ring 43 has a large size in the thickness direction of the semiconductor substrate 6. By making the physical quantity detection film 57 provided on the upper surfaces of the guard ring 41, the guard ring 42, and the guard ring 43 have a large size in the thickness direction of the semiconductor substrate 6, the physical quantity detection film 57 can better protect the guard ring 41, the guard ring 42, and the guard ring 43.

[0142] By providing physical quantity detection film 57 so as to cover guard ring 41, guard ring 42, and guard ring 43, it is possible to eliminate the need for protective film 9 provided on semiconductor chip 111 according to embodiment 1. That is, the step of providing protective film 9 can be omitted. This allows the manufacturing cost to be reduced.

[0143] Since the semiconductor chip 124 includes a physical quantity detection film 57 that covers the anode electrode 2, the cathode electrode 3, the guard ring 41, the guard ring 42, and the guard ring 43, the semiconductor chip 124 and a semiconductor device including the semiconductor chip 124 can be manufactured while reducing costs.

[0144] Next, a manufacturing method of the semiconductor chip 124 according to the present embodiment will be described. After forming the surface electrode 1, the anode electrode 2, the cathode electrode 3, the guard ring 41, the guard ring 42, and the guard ring 43, the physical quantity detection film 57 is formed. The physical quantity detection film 57 is formed on the upper surface of the semiconductor substrate 6 so as to cover the anode electrode 2, the cathode electrode 3, the guard ring 41, the guard ring 42, and the guard ring 43. The physical quantity detection film 57 can be formed using the same technique as that used when forming the physical quantity detection film 8 according to the first embodiment.

[0145] After forming the physical quantity detection film 57, similarly to the semiconductor chip 111 according to the first embodiment, an N cathode layer 13 is formed on the lower surface of the semiconductor substrate 6, which is the surface opposite to the upper surface on which the P+ layer 11 is provided.

[0146] Since the manufacturing method for the semiconductor chip 124 includes a step of forming a physical quantity detection film 57 that covers the anode electrode 2, the cathode electrode 3, the guard ring 41, the guard ring 42, and the guard ring 43, the cost of manufacturing the semiconductor chip 124 and a semiconductor device including the semiconductor chip 124 can be reduced.

[0147] Embodiment 5. A semiconductor chip 125 in the fifth embodiment will be described with reference to Figures 18 to 19. Descriptions of configurations similar to those in the first embodiment will be omitted. Also, in Figures 18 to 19, the same reference numerals as those in Figures 1 to 17 indicate the same or corresponding parts.

[0148] Fig. 18 is a top view of semiconductor chip 125 according to embodiment 5. Also, in Fig. 18, physical quantity detection film 8 and protective film 9 are omitted. As shown in Fig. 18, semiconductor chip 125 according to this embodiment differs from semiconductor chip 111 according to embodiment 1 in that a surface electrode and a cathode electrode are formed as separate bodies. The following description will focus on the differences from semiconductor chip 111 according to embodiment 1.

[0149] 18, the cathode electrode 59 is provided so as to surround the surface electrode 58 and the anode electrode 2. The surface electrode 58 and the cathode electrode 59 are not integrally formed, but are provided as separate bodies.

[0150] Fig. 19 is a cross-sectional view of a semiconductor chip 125 according to embodiment 5. Fig. 19 shows an example in which a diode is used as the semiconductor element. Fig. 19 corresponds to the D-D' cross section of Fig. 18. In Fig. 19, the right side of the paper corresponds to the center side of Fig. 18, and the left side of the paper corresponds to the end side of Fig. 18. In Fig. 19, the sealing resin is omitted.

[0151] 19, the surface electrode 58 and the cathode electrode 59 are formed as separate bodies, and the surface electrode 58 and the cathode electrode 59 are not in direct contact with each other in the D-D' cross section. The lower surface of the cathode electrode 59 is in direct contact with the P+ layer 11 of the semiconductor substrate 6. That is, the entire lower surface of the cathode electrode 59 is not covered with the insulating film 5, but is partially exposed. The portion of the lower surface of the cathode electrode 59 that is exposed from the insulating film 5 is in direct contact with the P+ layer 11 of the semiconductor substrate 6.

[0152] The lower surface of the front surface electrode 58 is in direct contact with the P+ layer 11 of the semiconductor substrate 6. Note that the front surface electrode 58 may be partially covered with the insulating film 5. The front surface electrode 58 is in direct contact with the P+ layer 11 of the semiconductor substrate 6 at a portion of the lower surface of the front surface electrode 58 that is exposed from the insulating film 5.

[0153] The P+ layer 11 of the semiconductor substrate 6, which is in direct contact with the lower surface of the surface electrode 58 and the lower surface of the cathode electrode 59, is integrally formed. That is, the surface electrode 58 and the cathode electrode 59 are electrically connected via the P+ layer 11 of the semiconductor substrate 6. That is, the surface electrode 58 and the cathode electrode 59 are at the same potential. Since the surface electrode 58 and the cathode electrode 59 are at the same potential, the potential of the cathode electrode 59 can be measured by measuring the potential of the wiring wire connected to the surface electrode 58.

[0154] In addition, in FIG. 19, the surface electrode 58 and the cathode electrode 59 are electrically connected via the P+ layer 11 of the semiconductor substrate 6, but the surface electrode 58 and the cathode electrode 59 may be electrically connected via a wire or the like.

[0155] 19, the physical quantity detection film 8 is provided between a surface electrode 58 and an anode electrode 2. Moreover, the physical quantity detection film 8 is provided between an anode electrode 2 and a cathode electrode 59. Moreover, the physical quantity detection film 8 is provided on the upper surface of the surface electrode 58. Moreover, the physical quantity detection film 8 is provided on the upper surface of the anode electrode 2. Moreover, the physical quantity detection film 8 is provided on the upper surface of the cathode electrode 59.

[0156] Embodiment 6 A semiconductor chip 126 in the sixth embodiment will be described with reference to Figures 20 and 21. Descriptions of configurations similar to those in the first embodiment will be omitted. Also, in Figures 20 and 21, the same reference numerals as those in Figures 1 to 19 indicate the same or corresponding parts.

[0157] Fig. 20 is a top view of a semiconductor chip 126 according to the sixth embodiment. Moreover, in Fig. 20, the physical quantity detection film 8 and the protective film 9 are omitted. As shown in Fig. 20, the semiconductor chip 126 according to the present embodiment differs from the semiconductor chip 111 according to the first embodiment in that a gate electrode is provided. The following description will focus on the differences from the semiconductor chip 111 according to the first embodiment.

[0158] 20, the semiconductor chip 126 includes a gate electrode 68. The gate electrode 68 is provided, for example, between the surface electrode 1 and the anode electrode 2. The gate electrode 68 is provided such that a portion that appears exposed in a top view in which the physical quantity detection film 8 and the sealing resin 20 are omitted surrounds the surface electrode 1.

[0159] Fig. 21 is a cross-sectional view of semiconductor chip 126 according to embodiment 6. Fig. 21 corresponds to the E-E' cross section of Fig. 20. In Fig. 21, the right side of the paper corresponds to the center side of Fig. 20, and the left side of the paper corresponds to the end side of Fig. 20. In Fig. 21, the sealing resin is omitted.

[0160] As shown in FIG. 21, the semiconductor chip 126 includes a surface electrode 61, an anode electrode 2, a cathode electrode 3, a guard ring 41, a guard ring 42, a guard ring 43, an insulating film 5, a semiconductor substrate 62, a physical quantity detection film 8, a protective film 9, a back electrode 10, a gate electrode 60, a gate electrode 68, and an oxide film 63.

[0161] The semiconductor substrate 62 includes a P+ collector layer 64, an N+ buffer layer 65, a drift layer 12, a P+ layer 11, a P+ layer 66, and an N+ layer 67. The N+ buffer layer 65 is provided on the lower surface of the drift layer 12. The P+ collector layer 64 is provided on the lower surface of the N+ buffer layer 65. The back electrode 10 is provided on the lower surface of the P+ collector layer 64.

[0162] The N+ layer 67 is provided on the upper part of the drift layer 12. The P+ layer 66 is provided around the N+ layer 67. In addition, the P+ layer 11 is provided on the lower surfaces of the guard rings 42, 43.

[0163] The gate electrode 60 is provided on the upper surface of the semiconductor substrate 62. The gate electrode 60 is provided on the upper surface of the P+ layer 66. The oxide film 63 is provided so as to cover the gate electrode 60. The gate electrode 68 is provided on the upper surface of the semiconductor substrate 62 with the insulating film 5 interposed therebetween. The surface electrode 61 is provided on the upper surface of the semiconductor substrate 62 so as to cover the gate electrode 60 and the oxide film 63.

[0164] The gate electrode 68 is provided on the upper surface of the semiconductor substrate 62 via the insulating film 5. The gate electrode 68 is provided between the surface electrode 61 and the anode electrode 2. By providing the gate electrode 68 between the surface electrode 61 and the anode electrode 2, it is possible to reduce variation in the timing at which the gate signal reaches each element within the semiconductor chip 126.

[0165] The gate electrode 60 and the gate electrode 68 are, for example, integrally formed and connected at an arbitrary location (not shown). The gate electrode 68 may be partially covered by the surface electrode 61.

[0166] The anode electrode 2 and the cathode electrode 3 are provided on the upper surface of the semiconductor substrate 62 via an insulating film 5. The physical quantity detection film 8 is provided between the anode electrode 2 and the cathode electrode 3. The physical quantity detection film 8 is provided so as to cover the anode electrode 2 and the cathode electrode 3, for example.

[0167] A method of manufacturing a semiconductor chip 126 according to the sixth embodiment will be described. An insulating film 5 is formed on the upper surface of a semiconductor substrate 62. After forming the insulating film 5, an N+ layer 67 is formed on the upper part of the semiconductor substrate 62. A gate electrode 60 is also formed on the upper surface of the semiconductor substrate 62, and an oxide film 63 is formed around the gate electrode 60. A gate electrode 68 is also formed on the upper surface of the semiconductor substrate 62 via the insulating film 5. The N+ layer 67, the gate electrode 60, the gate electrode 68, and the oxide film 63 can be formed using known methods.

[0168] After forming the N+ layer 67, the gate electrode 60, the gate electrode 68, and the oxide film 63, a surface electrode 61 is formed so as to cover the gate electrode 60 and the oxide film 63. Furthermore, an anode electrode 2 and a cathode electrode 3 are formed on the upper surface of the semiconductor substrate 62 with an insulating film 5 interposed therebetween. Furthermore, a guard ring 41, a guard ring 42, and a guard ring 43 are formed on the upper surface of the P+ layer 11.

[0169] Next, the protective film 9 is formed so as to cover the guard ring 41, the guard ring 42, and the guard ring 42. Next, the physical quantity detection film 8 is formed between the anode electrode 2 and the cathode electrode 3. Alternatively, the physical quantity detection film 8 is formed so as to cover the anode electrode 2 and the cathode electrode 3.

[0170] After forming the front surface electrode 61, the anode electrode 2, the cathode electrode 3, the guard rings 41, 42, 43, the protective film 9, and the physical quantity detection film 8, the lower surface of the semiconductor substrate 62 is ground to a desired thickness to form an N+ buffer layer 65 and a P+ collector layer 64. The P+ collector layer 64 is formed on the lower surface of the N+ buffer layer 65. Next, a back surface electrode 10 is formed on the lower surface of the semiconductor substrate 62, i.e., on the lower surface of the P+ collector layer 64.

[0171] By providing the semiconductor chip 126 with the gate electrode 60 and the gate electrode 68, a semiconductor device can be obtained in which the anode electrode 2, the cathode electrode 3, and the physical quantity detection film 8 are applied to a gate-driven semiconductor element.

[0172] Embodiment 7 In this embodiment, the semiconductor device according to the above-mentioned first to sixth embodiments is applied to a power conversion device. Although the present disclosure is not limited to a specific power conversion device, a case in which the present disclosure is applied to a three-phase inverter will be described below as a seventh embodiment.

[0173] FIG. 22 is a block diagram showing a configuration of a power conversion system to which the power conversion device according to this embodiment is applied.

[0174] The power conversion system shown in Fig. 22 is composed of a power source 1000, a power conversion device 2000, and a load 3000. The power source 1000 is a DC power source and supplies DC power to the power conversion device 2000. The power source 1000 can be composed of various things, for example, a DC system, a solar cell, or a storage battery, or it may be composed of a rectifier circuit connected to an AC system or an AC / DC converter. The power source 1000 may also be composed of a DC / DC converter that converts DC power output from a DC system into a predetermined power.

[0175] The power conversion device 2000 is a three-phase inverter connected between the power source 1000 and the load 3000, converts DC power supplied from the power source 1000 into AC power, and supplies the AC power to the load 3000. As shown in Fig. 19, the power conversion device 2000 includes a main conversion circuit 2001 that converts DC power input from the power source 1000 into AC power and outputs it, and a control circuit 2003 that outputs a control signal for controlling the main conversion circuit 2001 to the main conversion circuit 2001.

[0176] The load 3000 is a three-phase motor driven by AC power supplied from the power conversion device 2000. The load 3000 is not limited to a specific use, but is a motor mounted on various electric devices, and is used as a motor for, for example, a hybrid car, an electric car, a railroad car, an elevator, or an air conditioner.

[0177] The power conversion device 2000 will be described in detail below. The main conversion circuit 2001 includes switching elements and free wheel diodes (not shown), and converts DC power supplied from the power source 1000 into AC power by switching the switching elements, and supplies the AC power to the load 3000. There are various specific circuit configurations of the main conversion circuit 2001, but the main conversion circuit 2001 according to this embodiment is a two-level three-phase full bridge circuit, and can be configured with six switching elements and six free wheel diodes connected in reverse parallel to each switching element. At least one of the switching elements and free wheel diodes of the main conversion circuit 2001 is a switching element or free wheel diode of the semiconductor device 2002 corresponding to any of the semiconductor devices according to the above-mentioned first to sixth embodiments. The six switching elements are connected in series with two switching elements to form upper and lower arms, and each upper and lower arm forms each phase (U phase, V phase, W phase) of the full bridge circuit. The output terminals of each upper and lower arm, i.e., the three output terminals of the main conversion circuit 2001, are connected to the load 3000.

[0178] The main conversion circuit 2001 also includes a drive circuit (not shown) for driving each switching element, but the drive circuit may be built in the semiconductor device 2002, or the semiconductor device 2002 may include a drive circuit separate from the semiconductor device 2002. The drive circuit generates drive signals for driving the switching elements of the main conversion circuit 2001 and supplies them to the control electrodes of the switching elements of the main conversion circuit 2001. Specifically, in accordance with a control signal from a control circuit 2003 (described later), the drive circuit outputs to the control electrodes of each switching element a drive signal for turning the switching element on and a drive signal for turning the switching element off. When maintaining a switching element in the on state, the drive signal is a voltage signal (on signal) equal to or higher than the threshold voltage of the switching element, and when maintaining a switching element in the off state, the drive signal is a voltage signal (off signal) equal to or lower than the threshold voltage of the switching element.

[0179] The control circuit 2003 controls the switching elements of the main conversion circuit 2001 so that the desired power is supplied to the load 3000. Specifically, the control circuit 2003 calculates the time (on time) for which each switching element of the main conversion circuit 2001 should be in the on state based on the power to be supplied to the load 3000. For example, the main conversion circuit 2001 can be controlled by PWM control that modulates the on time of the switching elements according to the voltage to be output. Then, a control command (control signal) is output to a drive circuit provided in the main conversion circuit 2001 so that an on signal is output to a switching element that should be in the on state at each point in time, and an off signal is output to a switching element that should be in the off state. The drive circuit outputs an on signal or an off signal as a drive signal to the control electrode of each switching element according to this control signal.

[0180] In the power conversion device according to the present embodiment, the semiconductor device according to any one of the first to sixth embodiments is applied as the semiconductor device 2002 constituting the main conversion circuit 2001, and therefore, a power conversion device in which electrodes can be easily formed can be realized.

[0181] Furthermore, in the power conversion device according to the present embodiment, the semiconductor device according to the first to sixth embodiments is applied as the semiconductor device 2002 constituting the main conversion circuit 2001. Therefore, when the possibility of causing a malfunction becomes high, special operations such as stopping the operation of the semiconductor device, evaporating moisture by generating heat from the semiconductor device, and transmitting information to the outside can be performed, thereby suppressing malfunctions in the power conversion device.

[0182] In the present embodiment, an example of applying the present disclosure to a two-level three-phase inverter has been described, but the present disclosure is not limited thereto and can be applied to various power conversion devices. In the present embodiment, a two-level power conversion device is described, but a three-level or multi-level power conversion device may be used. In addition, when power is supplied to a single-phase load, the present disclosure may be applied to a single-phase inverter. In addition, when power is supplied to a DC load or the like, the present disclosure may be applied to a DC / DC converter or an AC / DC converter.

[0183] Furthermore, the power conversion device to which the present disclosure is applied is not limited to the case where the above-mentioned load is an electric motor, but can also be used, for example, as a power supply device for an electric discharge machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system, and can also be used as a power conditioner for a solar power generation system, a power storage system, etc.

[0184] In addition, in each of the above embodiments described in this specification, the material, material, size, shape, relative positional relationship, or implementation conditions of each component may be described, but these are examples in all aspects and are not limited to the embodiments described. Therefore, countless modified examples not exemplified are expected within the scope of each embodiment. For example, this includes cases where any component is modified, added, or omitted, and further cases where at least one component in at least one embodiment is extracted and combined with a component of another embodiment.

[0185] Although the preferred embodiments have been described in detail above, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the claims.

[0186] Various aspects of the present disclosure are summarized below as appendices.

[0187] (Appendix 1) A semiconductor substrate; a surface electrode provided on an upper surface of the semiconductor substrate; an anode electrode provided on an upper surface of the semiconductor substrate so as to surround the surface electrode; a cathode electrode provided on an upper surface of the semiconductor substrate so as to surround the anode electrode; A physical quantity detection film provided between the anode electrode and the cathode electrode. Semiconductor device. (Appendix 2) The physical quantity detection film is further provided between the anode electrode and the surface electrode. 2. The semiconductor device according to claim 1. (Appendix 3) The cathode electrode is further provided with a guard ring provided on an upper surface of the semiconductor substrate so as to surround the cathode electrode. 3. The semiconductor device according to claim 1 or 2. (Appendix 4) The physical quantity detection film is further provided to cover the guard ring. 4. The semiconductor device according to claim 3. (Appendix 5) A gate electrode is provided between the surface electrode and the anode electrode. 5. The semiconductor device according to claim 1 , (Appendix 6) The physical quantity detection film is formed of polyimide, phenolic resin, silica gel, or silicon oxide film. 6. The semiconductor device according to claim 1, (Appendix 7) A plurality of the surface electrodes are provided. 7. The semiconductor device according to claim 1 . (Appendix 8) The surface electrode and the cathode electrode are integrally formed. 8. The semiconductor device according to claim 1 , (Appendix 9) the surface electrode and the cathode electrode are provided separately and are electrically connected via the semiconductor substrate; 9. The semiconductor device according to claim 1 , (Appendix 10) A semiconductor substrate; a surface electrode provided on an upper surface of the semiconductor substrate; an anode electrode provided on an upper surface of the semiconductor substrate so as to surround the surface electrode; a cathode electrode provided on an upper surface of the semiconductor substrate so as to surround the anode electrode; A physical quantity detection film provided between the anode electrode and the surface electrode. Semiconductor device. (Appendix 11) forming a surface electrode on a top surface of a semiconductor substrate; forming an anode electrode on the upper surface of the semiconductor substrate so as to surround the surface electrode; forming a cathode electrode on an upper surface of the semiconductor substrate so as to surround the anode electrode; forming a physical quantity detection film between the anode electrode and the cathode electrode; A method for manufacturing a semiconductor device. (Appendix 12) forming a guard ring on the upper surface of the semiconductor substrate so as to surround the cathode electrode; 12. A method for manufacturing the semiconductor device according to claim 11. (Appendix 13) forming the physical quantity detection film so as to cover the guard ring; 13. A method for manufacturing the semiconductor device according to claim 12. (Appendix 11) A main conversion circuit having the semiconductor device according to any one of claims 1 to 10, which converts input power and outputs the converted power; a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit; A power conversion device comprising: [Explanation of symbols]

[0188] 1, 51, 52, 58, 61 surface electrode, 2, 53, 54 anode electrode, 3, 59 cathode electrode, 4, 41, 42, 43 guard ring, 5 insulating film, 6, 62 semiconductor substrate, 7, 55, 56 anode pad, 8, 57 physical quantity detection film, 9 protective film, 10 back electrode, 15 circuit board, 16 wiring wire, 20 sealing resin, 60, 68 gate electrode, 101, 2002 semiconductor device, 111 semiconductor chip, 1000 power supply, 2000 power conversion device, 2001 main conversion circuit, 2003 control circuit, 3000 load

Claims

1. A semiconductor substrate; a surface electrode provided on an upper surface of the semiconductor substrate; an anode electrode provided on an upper surface of the semiconductor substrate so as to surround the surface electrode; a cathode electrode provided on an upper surface of the semiconductor substrate so as to surround the anode electrode; A physical quantity detection film provided between the anode electrode and the cathode electrode. Semiconductor device.

2. The physical quantity detection film is further provided between the anode electrode and the surface electrode. The semiconductor device according to claim 1 .

3. The cathode electrode is further provided with a guard ring provided on an upper surface of the semiconductor substrate so as to surround the cathode electrode. The semiconductor device according to claim 1 .

4. The physical quantity detection film is further provided to cover the guard ring. The semiconductor device according to claim 3 .

5. A gate electrode is provided between the surface electrode and the anode electrode. The semiconductor device according to claim 1 .

6. The physical quantity detection film is formed of polyimide, phenolic resin, silica gel, or silicon oxide film. The semiconductor device according to claim 1 .

7. A plurality of the surface electrodes are provided. The semiconductor device according to claim 1 .

8. The surface electrode and the cathode electrode are integrally formed. The semiconductor device according to claim 1 .

9. the surface electrode and the cathode electrode are provided separately and are electrically connected via the semiconductor substrate; The semiconductor device according to claim 1 .

10. A semiconductor substrate; a surface electrode provided on an upper surface of the semiconductor substrate; an anode electrode provided on an upper surface of the semiconductor substrate so as to surround the surface electrode; a cathode electrode provided on an upper surface of the semiconductor substrate so as to surround the anode electrode; A physical quantity detection film provided between the anode electrode and the surface electrode. Semiconductor device.

11. forming a surface electrode on a top surface of a semiconductor substrate; forming an anode electrode on the upper surface of the semiconductor substrate so as to surround the surface electrode; forming a cathode electrode on an upper surface of the semiconductor substrate so as to surround the anode electrode; forming a physical quantity detection film between the anode electrode and the cathode electrode; A method for manufacturing a semiconductor device.

12. forming a guard ring on the upper surface of the semiconductor substrate so as to surround the cathode electrode; The method for manufacturing a semiconductor device according to claim 11 .

13. forming the physical quantity detection film so as to cover the guard ring; The method for manufacturing a semiconductor device according to claim 12 .

14. A main conversion circuit having the semiconductor device according to any one of claims 1 to 10, which converts input power and outputs the converted power; a control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit; A power conversion device comprising:

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