Semiconductor device

Abstract

To provide a semiconductor device having a transistor using a highly reliable oxide semiconductor; and provide a semiconductor device which eliminates a photolithography process and which has high productivity and high yield.SOLUTION: A semiconductor device has first wiring, second wiring, and third wiring located between the first wiring and the second wiring and has potential lower than that of each of the first wiring and the second wiring. The first wiring and the third wiring are electrically connected via a first transistor to which a gate electrode layer and a source electrode layer are electrically connected; the second wiring and the third wiring are electrically connected via a second transistor to which the gate electrode layer and the source electrode layer are electrically connected; and a continuous oxide semiconductor film is provided above or below the first wiring, the second wiring and the third wiring, and is used for semiconductor regions of the first transistor and the second transistor.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally speaking, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. [Background technology]

[0003] A technology to construct transistors using semiconductor thin films formed on substrates with insulating surfaces Transistors are used in devices such as integrated circuits (ICs) and image display devices (display devices). It is widely used in electronic devices.

[0004] Metal oxides have been attracting attention as materials that exhibit semiconducting properties that can be applied to transistors. A transistor that uses a metal oxide as a channel forming region and exhibits the following semiconductor characteristics is known. (See Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0006] A semiconductor device including a plurality of transistors having various complex configurations to provide high functionality. In the manufacturing process of such a semiconductor device, a photolithography process is used. However, the increase in photolithography processes has led to the This leads to an increase in the number of processes and steps, which leads to higher costs and reduced productivity. do.

[0007] In view of the above, one embodiment of the present invention is a semiconductor device including a highly reliable transistor including an oxide semiconductor. An object of the present invention is to provide a semiconductor device.

[0008] In addition, one embodiment of the present invention is capable of reducing the number of photolithography steps and increasing the yield with higher productivity. It is an object of the present invention to provide a good semiconductor device. [Means for solving the problem]

[0009] One embodiment of a semiconductor device disclosed in this specification and the like is a semiconductor device using an oxide semiconductor film as a semiconductor region. In a semiconductor device having a plurality of transistors and a plurality of wirings, and a third wiring between the first wiring and the second wiring and having a lower potential than the first wiring and the second wiring. The first wiring and the third wiring are connected to a first transistor in which a gate electrode layer and a source electrode layer are electrically connected. The second wiring and the third wiring are electrically connected to each other through a gate electrode layer and a source electrode layer. The first wiring and the second transistor are electrically connected to each other. Above or below the wiring and the third wiring, the semiconductor regions of the first transistor and the second transistor are provided. A continuous oxide semiconductor film is provided for use in the insulating layer.

[0010] Another aspect of the semiconductor device disclosed in the present specification is a semiconductor device including a first wiring, a second wiring, and a first wiring and a second wiring. Between the first and second wirings, a third wiring having a lower potential than the first and second wirings, and a drain electrode layer are provided. The gate electrode layer and the source electrode layer are electrically connected to the first wiring, and the gate electrode layer and the source electrode layer are electrically connected to the third wiring. The drain electrode layer of the first transistor is electrically connected to the second wiring, and the gate a second transistor having a gate electrode layer and a source electrode layer electrically connected to a third wiring; The first transistor and the second transistor are disposed above or below the first wiring, the second wiring, and the third wiring. A continuous oxide semiconductor film is provided for use in a semiconductor region of a transistor.

[0011] Therefore, the semiconductor regions of the transistors are not provided in the semiconductor layer separated into islands, The insulating film is provided in a continuous oxide semiconductor film including a plurality of openings.

[0012] In the above configuration, a transistor is electrically connected to each of the first wiring and the second wiring. For example, a semiconductor device may include a capacitor, a resistor, and / or a capacitor. In one embodiment, a transistor electrically connected to the first wiring and a transistor electrically connected to the second wiring are a transistor electrically connected to the first wiring and a liquid crystal element electrically connected to the second wiring; a transistor electrically connected to the first wiring or the liquid crystal display device which is a capacitor wiring; a transistor electrically connected to the second wiring; and a light emitting diode electrically connected to the transistor. A light emitting device having an element and a third wiring serving as a power supply line is exemplified.

[0013] The semiconductor device includes a plurality of transistors each having a gate electrode layer, a gate insulating layer, an oxide semiconductor layer, and a A structure in which a semiconductor film, a source electrode layer, and a drain electrode layer are laminated in this order can be used. . Effect of the Invention

[0014] The photolithography process for processing the semiconductor region into an island-shaped semiconductor layer is eliminated, This also reduces the number of masks and processes required. A conductor device can be provided.

[0015] In the above configuration, a resistor lower than the first wiring and the second wiring is provided between the first wiring and the second wiring. A transistor is provided in which a potential wiring, a gate electrode layer, and a source electrode layer are electrically connected to each other. Therefore, even if the oxide semiconductor film is provided continuously above or below the adjacent wirings, This makes it possible to prevent leakage current between the first wiring and the second wiring, thereby providing a highly reliable semiconductor device. A conductor device can be provided. [Brief description of the drawings]

[0016] [Figure 1] 1A to 1C are a plan view, a cross-sectional view, and a circuit diagram illustrating one embodiment of the present invention. [Diagram 2] FIG. 1 is a cross-sectional view illustrating one embodiment of the present invention. [Diagram 3] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of the present invention. [Figure 4] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Diagram 5] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of the present invention. [Figure 6] FIG. 1 is a circuit diagram illustrating one embodiment of the present invention. [Figure 7] 1A to 1C illustrate one embodiment of a manufacturing method of a semiconductor device. [Figure 8] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 9] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 10] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 11] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 12] FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] The embodiment will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiment, and various changes and modifications may be made in the form and details without departing from the spirit and scope of the present invention. It will be easily understood by those skilled in the art that the above-mentioned invention can be obtained by the following embodiments. The present invention should not be construed as being limited to the contents described below. The same reference numerals are used in different drawings to indicate the same parts or parts having similar functions. A repeated explanation thereof will be omitted.

[0018] A transistor is a type of semiconductor device that amplifies current and voltage and controls conduction or non-conduction. In this specification, the transistor can realize a switching operation such as IGFET(Insulated Gate Field Effect Transi) stor) and thin film transistor (TFT) Includes.

[0019] In addition, the functions of the "source" and "drain" of a transistor are different for transistors of different polarities. This may be reversed when using a current source or when the direction of the current changes during circuit operation. For this reason, in this specification, the terms "source" and "drain" are used interchangeably. It is possible to use it.

[0020] In addition, the terms "electrode" and "wiring" used in this specification and the like do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wire." In addition, the term "electrode" or "wiring" may be used to refer to the plural "electrodes" or "wirings". This also includes cases where the "line" is formed as a single unit.

[0021] (Embodiment 1) In this embodiment, a semiconductor device and a manufacturing method thereof according to one embodiment of the present invention will be described with reference to FIGS. This will be explained with reference to FIG.

[0022] (Configuration of Semiconductor Device) FIG. 1 illustrates a semiconductor device according to one embodiment of the present invention. FIG. 1A illustrates a plan view of the semiconductor device. 1(B) is a cross-sectional view of the dashed line A1-A2 and dashed line B1- FIG. 1C is an equivalent circuit diagram of the region 170 in FIG. is equivalent to.

[0023] The semiconductor device shown in FIGS. 1A and 1B includes a first wiring 110a, a second wiring 110b, and a first Between the wiring 110a and the second wiring 110b, The first wiring 110a and the third wiring 111 are connected to each other by a gate. The gate electrode layer 103a and the source electrode layer are electrically connected to each other through the oxide semiconductor film 106. The second wiring 110b and the third wiring 111 are connected to the gate electrode layer 103a and the The semiconductor layer is electrically connected to the base electrode layer via an oxide semiconductor film 106. do.

[0024] As shown in FIG. 1B, the first transistor 160 is provided on the substrate 100. a gate electrode layer 103a; a gate insulating layer 104 provided on the gate electrode layer 103a; An oxide semiconductor film 106 provided over the gate insulating layer 104 and an electrode The first transistor has a source electrode layer and a drain electrode layer electrically connected to each other. The source electrode layer of the gate electrode 160 corresponds to the third wiring 111 and is connected to the gate electrode 122 via the contact 126. The drain electrode layer of the first transistor 160 is connected to the drain electrode layer 103a. is electrically connected to the first wiring 110a. That is, one region of the first wiring 110a is , which functions as the drain electrode layer of the first transistor 160.

[0025] Similarly, the second transistor 162 includes a gate electrode layer 103a provided on the substrate 100, A gate insulating layer 104 is provided on the gate electrode layer 103a. The oxide semiconductor film 106 is electrically connected to a source electrode 106. The source electrode layer of the second transistor 162 and the drain electrode layer of the second transistor 163 are corresponds to the third wiring 111 and is connected to the gate electrode layer 103a via the contact 126. The drain electrode layer of the second transistor 162 is electrically connected to the second wiring 110b. That is, one region of the second wiring 110b is electrically connected to the second transistor 162. It functions as a drain electrode layer.

[0026] The first wiring 110a, the second wiring 110b, the third wiring 111, and the first transistor 160 An insulating layer 114 may be provided to cover the second transistor 162 and the like.

[0027] As shown in FIG. 1A, in a semiconductor device according to one embodiment of the present invention, an oxide semiconductor film 1 06 is formed over almost the entire surface of the substrate 100. As a result, the oxide semiconductor film Since it is no longer necessary to process the oxide semiconductor film 106 into an island shape, In addition, the photolithography process can be reduced. The number of photomasks and processes required can also be reduced. This results in high productivity and high yield. Thus, a semiconductor device can be provided.

[0028] However, by providing the oxide semiconductor film 106 over almost the entire surface, the first wiring 11 There is also a risk of leakage current occurring between the first wiring 110a, the second wiring 110b, and the third wiring 111. If leakage current occurs between these wirings, the reliability of the semiconductor device may decrease. There it is.

[0029] In the semiconductor device according to one aspect of the present invention, the first transistor 160 and the second transistor In the transistor 162, the third wiring 111 and the gate electrode layer 103a are connected to the contact 12. 6, the first transistor 160 and the second transistor 162 are connected In addition, the first wiring 110a, the second wiring 110b, and the first A third wiring 111 having a lower potential than the wiring 110a and the second wiring 110b is provided. As a result, above or below the first wiring 110a, the second wiring 110b, and the third wiring 111, Even when a continuous oxide semiconductor film is provided, the first wiring 110a and the second wiring 110b and the third wiring 111. Therefore, a semiconductor device with high reliability can be provided.

[0030] Although not shown in FIG. 1A, the third wiring 111 and the gate electrode layer 103b Therefore, the first transistor 160 and the second transistor A transistor similar to the transistor 162 is formed. That is, the first wiring 110a and the third wiring The wiring 111 forms a transistor similar to the first transistor 160, and the second wiring The line 110b and the third wiring 111 form a transistor similar to the second transistor 162. These transistors can also function as diodes. Thus, the first wiring 110a, the second wiring 110b, and the third wiring 111 are continuously formed above or below the first wiring 110a, the second wiring 110b, and the third wiring 111. Even when an oxide semiconductor film is provided, the first wiring 110a and the second wiring 110 b. The leakage current occurring between the third wirings 111 can be prevented.

[0031] For ease of understanding, in FIG. 1A, the first transistor 160 and the second transistor 170 are The region 170 in which the transistor 162 is formed is shown by a dotted line. A region in which the second wiring 110a, the third wiring 111, and the gate electrode layer 103a extend In this embodiment, a first transistor 160 and a second transistor 162 are formed. The first wiring 110a, the second wiring 110b, the third wiring 111 and the gate electrode layer 103a are In the extending region, a gap is generated between the first wiring 110a, the second wiring 110b, and the third wiring 111. Similarly, the first wiring 110a and the second wiring 110b can be prevented from causing a leakage current. In the region where the third wiring 111 and the gate electrode layer 103b extend, the first wiring 110 a) A leak current occurring between the second wiring 110b and the third wiring 111 can be prevented.

[0032] In addition, a gate electrode layer 102, a gate electrode layer 103a, and a gate electrode layer 103b are intersected. In addition, openings 124a and 124b are provided along the third wiring 111. Therefore, even when the continuous oxide semiconductor film 106 is used, the gate electrode layer 102 and the gate To prevent leakage current from occurring in the gate electrode layer 103a and the gate electrode layer 103b, can be done.

[0033] FIG. 1C shows an equivalent circuit of the region 170 shown in FIGS.

[0034] The semiconductor device according to one aspect of the present invention includes a first wiring 110a, a second wiring 110b, and a first wiring 110c. The third wiring 111 has a lower potential than the first wiring 110a and the second wiring 110b. The drain electrode of the transistor 160 is connected to the first wiring 110a, and the gate electrode and the source The gate electrode and source electrode of the second transistor 162 and the third wiring 111 are The drain electrode of the second transistor 162 is connected to the second wiring 110b. do.

[0035] As shown in FIG. 1A, the first wiring 110a and the second wiring 110b are provided with a transistor. The transistor 164 and the transistor 166 may be electrically connected to each other. The gate electrode layer 102 is provided on the substrate 100, and a gate electrode layer 103 is provided on the gate electrode layer 102. a gate insulating layer 104; an oxide semiconductor film 106 provided over the gate insulating layer 104; a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor film 106; Here, the source electrode layer of the transistor 164 corresponds to the conductive layer 112a, and the drain electrode The pole layer corresponds to one region of the first wiring 110a.

[0036] Similarly, the transistor 166 includes a gate electrode layer 102 disposed on a substrate 100 and a gate A gate insulating layer 104 is provided on the gate electrode layer 102, and a gate insulating layer 104 is provided on the gate electrode layer 102. The oxide semiconductor film 106 and the source electrode layer and the The source electrode layer of the transistor 166 is a conductive layer 1 12b, and the drain electrode layer corresponds to one region of the second wiring 110b.

[0037] In the transistors 164 and 166, the oxide semiconductor film 106 Here, the transistor 164 is adjacent to the channel of the transistor 164. Openings 120a and 120b are provided along the length of the panel, and a transistor 166 In the vicinity of the transistor 166, openings 122a and 122b are formed along the channel length direction. As a result, even when the continuous oxide semiconductor film 106 is used, Therefore, leakage current occurring in the transistors 164 and 166 can be prevented. Therefore, a semiconductor device with higher reliability can be provided.

[0038] <Method for Manufacturing Semiconductor Device> Next, a method for manufacturing the semiconductor device shown in FIG. 1 will be described with reference to FIG. corresponds to the cross section taken along the dashed line A1-A2 in FIG.

[0039] First, a conductive layer is formed on the substrate 100. Then, a first photolithography process is performed. The conductive layer is selectively etched away to leave the gate electrode layer 102 and the gate electrode layer 103a. At this time, the gate electrode layer 103b shown in FIG. (not shown).

[0040] The substrate 100 may be a glass substrate, a ceramic substrate, or any other substrate that can withstand the processing temperature of this manufacturing process. A plastic substrate having a heat resistance of 1000 nm or less can be used. If no insulating layer is provided on the surface of a metal substrate such as a stainless steel alloy, an insulating layer may be provided. Examples of the glass substrate include barium borosilicate glass and aluminoborosilicate glass. It is preferable to use a non-alkali glass substrate such as quartz or aluminosilicate glass. A substrate, a sapphire substrate, or the like can be used as the substrate 100. 550mm x 650mm), 3.5th generation (600mm x 720mm, or 620mm x 750mm), 4th generation (680mm x 880mm, or 730mm x 920mm) , 5th generation (1100mm x 1300mm), 6th generation (1500mm x 1850mm) , 7th generation (1870mm x 2200mm), 8th generation (2200mm x 2400mm) , 9th generation (2400mm x 2800mm, 2450mm x 3050mm), 10th generation A glass substrate having a size of 2950 mm×3400 mm or the like can be used. The substrate 100 is made of aluminoborosilicate glass.

[0041] Before forming the conductive layer on the substrate 100, an insulating layer may be formed as a base (see FIG. The thickness of the insulating layer that serves as the base is 50 nm to 300 nm, preferably 100 nm or more. The insulating layer is formed to a thickness of 200 nm or less. Choose from aluminum, silicon nitride, silicon oxide, silicon nitride oxide, and silicon oxynitride. These films are formed of a single layer structure or a laminate structure using one or more of the materials mentioned above. A function of preventing the diffusion of impurity elements such as alkali metals and alkaline earth metals from the plate 100. In this specification and the like, silicon nitride oxide refers to a material having a composition containing more oxygen than silicon. It has a high nitrogen content, and is preferably measured by Rutherford backscattering spectroscopy (RBS). Therford Backscattering Spectrometry and water Hydrogen Forward Scattering (HFS) When measured using this method, the composition range is 5-30 atomic % oxygen and 20-55 atomic % nitrogen. It refers to a material that contains 25 to 35 atomic percent silicon and 10 to 30 atomic percent hydrogen. The insulating layer can be formed by appropriately using a sputtering method, a CVD method, a coating method, a printing method, or the like. Cut.

[0042] In this embodiment, a stack of silicon nitride and silicon oxide is used as the insulating layer serving as the base. Specifically, silicon nitride is formed on the substrate 100 to a thickness of 50 nm. Silicon oxide is formed on the silicon substrate to a thickness of 150 nm. It may be doped with phosphorus (P) or boron (B).

[0043] In addition, by incorporating halogen elements such as chlorine and fluorine into the insulating layer, the substrate 1 This further improves the function of preventing the diffusion of impurity elements from the insulating base. The concentration of halogen elements contained in the edge layer was analyzed using SIMS (secondary ion mass spectrometry). In the concentration peak obtained by 15 / cm 3 More than 1×10 20 / cm 3 Below It would be better to put it below.

[0044] Gallium oxide may be used as the base insulating layer. A laminated structure of gallium oxide and the insulating layer may be used. Gallium oxide is a material that is difficult to charge. Therefore, it is possible to suppress the fluctuation of the threshold voltage due to the charge-up of the insulating layer.

[0045] The conductive layers for forming the gate electrode layer 102, the gate electrode layer 103a, and the like are formed by sputtering. A coating method, a vacuum deposition method, or a plating method is used to form a film having a thickness of 100 nm to 500 nm, preferably The gate electrode layer 102 and the gate The conductive layer for forming the electrode layer 103a is made of molybdenum (Mo), titanium (Ti), or tantalum (Ta). W, Tantalum (Ta), Aluminum (Al), Copper (Cu), Chromium (Cr ), neodymium (Nd), scandium (Sc), or other metallic materials or alloys containing these as the main components. The gold material can be used to form a single layer or a multilayer structure.

[0046] The gate electrode layer 102 and the gate electrode layer 103a are made of a low resistance material since they also function as wirings. It is preferable to use Al or Cu, which are materials with high resistance to heat. By using Al or Cu, the signal delay can be reduced. It is possible to reduce the heat resistance of aluminum and to realize high image quality. Al migration is likely to occur. To prevent this, metal materials with higher melting points than Al, such as Mo, Ti, and W, are laminated on Al. In addition, it is preferable that the gate electrode layer 102, the gate electrode layer 103a, etc. are made of a material containing Al. When using this material, the maximum process temperature in the subsequent steps must be 380°C or less. It is preferable to set the temperature at 350° C. or lower.

[0047] In addition, when Cu is used for the gate electrode layer 102 and the gate electrode layer 103a, migration In order to prevent defects due to ionization and diffusion of Cu elements, Mo, Ti, W, and other elements with melting points higher than Cu are used. In addition, the gate electrode layer 102 and the gate electrode layer 103 are preferably stacked. When using a material containing Cu for 103a, the maximum process temperature in the subsequent steps should be set at 4 It is preferable to keep the temperature at 50°C or lower.

[0048] In this embodiment, a conductive film for forming the gate electrode layer 102, the gate electrode layer 103a, and the like is formed. As a conductive layer, a Ti layer with a thickness of 5 nm is formed, and a Cu layer with a thickness of 250 nm is formed on the Ti layer. do.

[0049] The resist mask used in the photolithography process may be formed by an inkjet method. In the inkjet method, no photomask is used, which further reduces the manufacturing cost. The resist mask is peeled off after the etching process. A description of the photolithography process will be omitted.

[0050] Next, the gate insulating layer 104 is formed on the gate electrode layer 102 and the gate electrode layer 103a. After that, the oxide semiconductor film 106 is formed (see FIG. 2B).

[0051] The gate insulating layer 104 is formed to a thickness of 50 nm or more by using a plasma CVD method, a sputtering method, or the like. The thickness is 800 nm or less, preferably 100 nm to 600 nm. The gate insulating layer 104 is made of silicon oxide, silicon nitride, silicon oxynitride, silicon oxynitride, or silicon nitride oxide. Aluminum oxide, aluminum nitride, aluminum oxide nitride, aluminum oxide tantalum oxide, gallium oxide, yttrium oxide, hafnium oxide, hafnium silicon Cate (HfSi x O y (x>0, y>0)), nitrogen-introduced hafnium silicate The insulating layer is formed in a single layer or a multilayer structure using hafnium aluminate or the like into which nitrogen is introduced. do.

[0052] The gate insulating layer 104 can be formed by a sputtering method, a plasma CVD method, or a microwave (e.g. For example, a high-density plasma CVD method using a frequency of 2.45 GHz is used. It is possible.

[0053] In this embodiment, a stack of silicon nitride and silicon oxide is used as the gate insulating layer 104. Specifically, silicon nitride is deposited on the gate electrode layer 102 and the gate electrode layer 103a by 50. A silicon nitride film is formed to a thickness of 100 nm, and silicon oxide is formed on the silicon nitride film to a thickness of 100 nm.

[0054] The gate insulating layer 104 also functions as a protective layer. When the layer 103a contains Cu, it is covered with an insulating layer containing silicon nitride. This can prevent Cu diffusion from the electrode layer 102.

[0055] The gate insulating layer 104 is an insulating layer containing the same component as the oxide semiconductor film to be formed later. In the case where the gate insulating layer 104 is a stack of different layers, an oxide semiconductor may be used. The insulating layer in contact with the conductive film may be an insulating layer containing the same kind of component as the oxide semiconductor. Such an insulating layer is compatible with an oxide semiconductor film. This is because the state of the interface with the oxide semiconductor film can be kept good. The term "component of the same kind as an oxide semiconductor" refers to one or more elements selected from the constituent elements of an oxide semiconductor. For example, the oxide semiconductor film is made of an In-Ga-Zn oxide semiconductor material. In the case of the insulating layer having the same composition, the insulating layer may be made of gallium oxide.

[0056] In addition, in the case where the gate insulating layer 104 has a stacked structure, a layer containing the same kind of component as the oxide semiconductor is used. The insulating film may have a laminated structure including a film made of an insulating material and a film containing a material different from the component material of the insulating film. .

[0057] In addition, impurities such as hydrogen, water, a hydroxyl group, or hydride are less likely to be mixed into the oxide semiconductor film. It is preferable that the oxide semiconductor film contains as few impurities as possible, such as hydrogen and water. In order to prevent this, a pretreatment for forming the oxide semiconductor film is performed by pre-treating the sputtering device. The substrate 100 is preheated in a preheating chamber to remove hydrogen adsorbed on the substrate 100 and the gate insulating layer 104. It is preferable to remove impurities such as water and evacuate the gas. A cryopump is preferable. This preheating process can be omitted. The pre-heating is performed before the gate insulating layer 104 is formed. The same process may be carried out on the substrate 100 on which steps 3a have been formed.

[0058] As the oxide semiconductor film, there are four-element metal oxides such as In-Sn-Ga-Zn oxides, Ternary metal oxides: In-Ga-Zn oxide, In-Sn-Zn oxide, In- Al-Zn oxide, Sn-Ga-Zn oxide, Al-Ga-Zn oxide, Sn-A l-Zn oxides, binary metal oxides such as In-Zn oxides and Sn-Zn oxides , Al-Zn oxide, Zn-Mg oxide, Sn-Mg oxide, In-Mg oxide In-Ga oxide, In oxide, Sn oxide, Zn oxide, etc. The oxide may contain SiO2.

[0059] The oxide semiconductor film is preferably an oxide semiconductor containing In, more preferably In, In order to make the oxide semiconductor film i-type (intrinsic), Subsequent dehydration or dehydrogenation is advantageous.

[0060] Here, for example, the In-Ga-Zn oxide is an oxide of indium (In), gallium (Ga It means an oxide containing zinc (Zn), and the composition ratio is not particularly important. In addition, elements other than In, Ga, and Zn may be included.

[0061] The oxide semiconductor film has the chemical formula InMO3(ZnO) m A thin film expressed as (m>0) Here, M is one selected from Ga, Al, Mn, and Co, or Indicates multiple metal elements. For example, M can be Ga, Ga and Al, Ga and Mn, or G Examples include a and Co.

[0062] In this embodiment, an In-Ga-Zn-based oxide target is used for the oxide semiconductor film. The oxide semiconductor film is formed to a thickness of 30 nm by a sputtering method. Typically, in an argon atmosphere, an oxygen atmosphere, or a mixture of rare gas and oxygen. The film can be formed by a sputtering method.

[0063] As a target for forming an oxide semiconductor film by a sputtering method, for example, The ratio of the target was In2O3:Ga2O3:ZnO=1:1:1 [molar ratio]. In-Ga-Zn-O film is formed using this target. For example, the target of In2O3:Ga2O3:ZnO=1:1:2 [molar ratio] A kit may also be used.

[0064] The relative density of the target is 90% or more and 100% or less, preferably 95% or more and 99.9% or less. By using a metal oxide target with a high relative density, the oxide formed This allows the semiconductor film to be a dense film.

[0065] The sputtering gas used in forming the oxide semiconductor film is hydrogen, water, a hydroxyl group, a hydride, or the like. It is preferable to use a high-purity gas from which impurities have been removed.

[0066] The oxide semiconductor film was formed by holding a substrate in a formation chamber kept under reduced pressure and raising the substrate temperature to 1 The temperature is set to 00°C or higher and 600°C or lower, preferably 300°C or higher and 500°C or lower. When Al is used as the material of the electrode layer 102 and the gate electrode layer 103a, the substrate temperature is The temperature is set to 380° C. or less, preferably 350° C. or less. When Cu is used as the material of the pole layer 103a, the substrate temperature is set to 450° C. or lower.

[0067] By forming the oxide semiconductor film while heating the substrate, hydrogen, water, and The concentration of impurities such as hydrides or hydroxides can be reduced. Damage caused by etching is reduced. In addition, hydrogen and moisture are removed while removing residual moisture in the formation chamber. The removed sputtering gas is introduced, and an oxide semiconductor film is formed using the above target.

[0068] To remove residual moisture in the formation chamber, an adsorption type vacuum pump, such as a cryopump, is used. It is preferable to use an ion pump or a titanium sublimation pump. The stage may be a turbomolecular pump plus a cold trap. The formation chamber is evacuated using an opto-pump, and contains hydrogen atoms, water (H2O), etc. Since compounds containing carbon atoms (and more preferably compounds containing carbon atoms) are exhausted from the formation chamber, The concentration of impurities contained in the formed oxide semiconductor film can be reduced.

[0069] As an example of the formation conditions, the distance between the substrate and the target is 100 mm, and the pressure is 0.6 Pa. The conditions were: DC power supply 0.5kW, oxygen (oxygen flow rate 100%) atmosphere. In addition, when a pulsed DC power supply is used, the powdery substances (particles, etc.) generated during the formation process can be easily removed. This is preferable because it can reduce the amount of adhesion (also referred to as the "friction") and make the film thickness distribution uniform.

[0070] In addition, sodium (Na), lithium (Li), potassium (K), etc. in the oxide semiconductor film The concentration of alkali metals is 5×10 16 cm -3 Less than or equal to 1×10 16 c m -3 Less than 1×10, more preferably 15 cm -3 In the following, Li is 5×10 15 cm -3 Less than or equal to 1×10 15 cm -3 In the following, K is 5×10 15 cm -3 The following is preferably is 1×10 15 cm -3 The following applies.

[0071] Oxide semiconductors are insensitive to impurities, and there are a large number of metal impurities in oxide semiconductors. It is not a problem if it contains a lot of alkali metals such as sodium. It has been pointed out that d-lime glass can also be used (Kamiya, Nomura, Hosono, "Amorphous Oxide Semiconductors" "Physical properties of the body and the current status of device development," Solid State Physics, September 2009, Vol. 44, pp. 621-633) However, this is not an appropriate indication. Alkali metals form oxide semiconductors. Alkaline earth metals are not constituent elements of oxide semiconductors and are therefore considered impurities. In particular, Na, an alkali metal, is an impurity when it is not an element that is included in the alloy. When the insulating layer in contact with the semiconductor film is an oxide, Na diffuses into the insulating layer. + It becomes. In addition, Na separates the bonds between the metal and oxygen that constitute the oxide semiconductor in the oxide semiconductor film. As a result, for example, the threshold voltage may shift in the negative direction. The shift leads to degradation of transistor characteristics such as normally on and reduced mobility. In addition, the transistor characteristics may vary. The deterioration and variation in characteristics occur when the hydrogen concentration in the oxide semiconductor film is sufficiently low. Therefore, when the hydrogen concentration in the oxide semiconductor is 5×10 19 cm -3 Below, especially 5×10 18 cm -3 When the ratio of the alkali metal in the oxide semiconductor is 0.01 to 0.01, the amount of the alkali metal in the oxide semiconductor is 0.01 to 0.01. It is highly recommended to achieve the above concentration values.

[0072] Next, first heat treatment is performed. By the first heat treatment, excess ions in the oxide semiconductor film are removed. Hydrogen (including water and hydroxyl groups) is removed (dehydration or dehydrogenation) to change the structure of the oxide semiconductor film. In addition, the oxide semiconductor film can be formed in a uniform shape, and defect levels in the energy gap can be reduced. By this, defects generated at the interface between the oxide semiconductor film and the insulating layer in contact with the oxide semiconductor film can be reduced.

[0073] The first heat treatment may be performed under a reduced pressure atmosphere, an inert gas atmosphere such as nitrogen or a rare gas, or an oxygen gas atmosphere. Ambient or ultra-dry air (CRDS (Cavity Ring Down Laser Spectroscopy) method) The moisture content measured using a dew point meter is 20 ppm or less (-55°C in terms of dew point), and In an atmosphere of 250°C to 750°C, preferably 1 ppm or less, and preferably 10 ppb or less, The temperature is set to 400°C or lower and below the distortion point of the substrate. The gate electrode layer 102 and the gate electrode layer 103a formed by the lithography process are made of Al. If so, the heat treatment temperature should be 380°C or less, preferably 350°C or less. In addition, when Cu is used for the wiring layer formed by the first photolithography process, In this embodiment, the temperature of the heat treatment is set to 450° C. or less. The substrate was placed in an electric furnace, and the oxide semiconductor film was heated at 450° C. for 1 hour in a nitrogen atmosphere. Heat treatment is performed.

[0074] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heating element such as a resistance heating element. The apparatus may be equipped with a device for heating the object to be treated by radiation. For example, a GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (Lamp Rapid Thermal Annealing equipment such as RTA (Rapid Thermal Annealing) The LRTA device can be used with halogen lamps, metal halide lamps, etc. lamp, xenon arc lamp, carbon arc lamp, high pressure sodium lamp, high pressure A device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp such as a mercury lamp. The GRTA device is a device that uses high-temperature gas to perform heat treatment. The gas used is a rare gas such as argon or nitrogen, which does not react with the workpiece during heat treatment. A suitable inert gas is used.

[0075] For example, in the first heat treatment, the substrate is moved into an inert gas heated to a high temperature, After heating for a few minutes, the substrate is moved and taken out of the heated inert gas for GRTA. It is also possible.

[0076] Heat treatment is carried out under an atmosphere of inert gas such as nitrogen or rare gas, oxygen, or ultra-dry air. In this case, it is preferable that the atmosphere does not contain water, hydrogen, etc. The purity of nitrogen, oxygen, or rare gas introduced into the treatment equipment should be 6N (99.9999%) or higher. Preferably, the concentration is 7N (99.99999%) or more (i.e., the impurity concentration is 1 ppm or less, It is preferable to keep the concentration at 0.1 ppm or less.

[0077] Next, the oxide semiconductor film 106 is selectively etched by a second photolithography process. Then, the etched portion is removed to form a contact 126 (see FIG. 2(C)). Also, openings 120a, 120b, 122a, 122b, 124a, and 124b are formed ( (Not shown). The second photolithography process may be performed before the first heat treatment. .

[0078] When forming the contact 126, the openings 120a, 120b, 122a, 122b, Since the oxide semiconductor film 106 is also formed, the oxide semiconductor film 106 is formed into an island shape. The lithography process can be reduced. The number of photomasks and steps can also be reduced.

[0079] Next, a conductive layer is formed over the oxide semiconductor film 106 and the contact 126. The conductive layer is selectively etched away by the photolithography process to form the first wiring 110. a, the second wiring 110b, the third wiring 111, and the conductive layer 112a are formed (see FIG. 2(D)). At this time, the conductive layer 112b shown in FIG. 1A is also formed (not shown).

[0080] The conductive layer for forming the first wiring 110a, the second wiring 110b, the third wiring 111, etc. When a conductive layer is formed for forming the gate electrode layer 102, the gate electrode layer 103a, or the like, The first wiring 110a and the second wiring 110b can be formed by the same method and using the same materials. The conductive layer for forming the second wiring 110b and the third wiring 111 is made of a conductive metal oxide. The conductive metal oxide may be, for example, indium oxide (In2O3). , Tin oxide (SnO2), Zinc oxide (ZnO), Indium oxide tin oxide (In2O3- SnO2, abbreviated as ITO), indium zinc oxide (In2O3-ZnO), For the insulating layer, a material containing silicon oxide in these metal oxide materials can be used.

[0081] In addition, conductive layers for forming the first wiring 110a, the second wiring 110b, the third wiring 111, etc. When the layers are selectively etched, the conductive layers provided in the openings 120a, 120b, etc. are also In this case, the gate electrode layer 10 is etched in the openings 120a, 120b, etc. 2. If the gate electrode layers 103a and 103b are present, the gate The etching is performed so that the first electrode layer 102 and the gate electrode layers 103a and 103b are not etched. It is necessary to set the sampling conditions appropriately.

[0082] As a result of the above, the first transistor 160, the second transistor 162, and the transistor 164 In this case, the transistor 1 shown in FIG. 66 will also be produced.

[0083] Next, an insulating layer 114 is formed on the first wiring 110a, the second wiring 110b, the third wiring 111, etc. (See FIG. 2(E)).

[0084] The insulating layer 114 is formed by the same method and the same process as the insulating layer that functions as a base and the gate insulating layer 104. The insulating layer 114 can be formed using a material such as hydrogen or water. The sputtering method is preferable because it is less likely to be mixed in. When hydrogen or the like is contained in the oxide semiconductor film, the hydrogen or the like penetrates into the oxide semiconductor film, or the oxide semiconductor film is deformed by the hydrogen or the like. There is a risk that oxygen will be extracted from the conductive film, causing the oxide semiconductor film 106 to have a low resistance (to become n-type). Therefore, the insulating layer 114 is formed by using a method that does not include hydrogen, water, etc. It is important to do so.

[0085] Representative examples of the insulating layer 114 include silicon oxide, silicon oxynitride, hafnium oxide, Inorganic insulating materials such as aluminum oxide and gallium oxide can be used. Since silicon is a material that does not easily become charged, the threshold voltage does not fluctuate due to charging of the insulating layer. In addition, when an oxide semiconductor film is used as the semiconductor region, the insulating layer 11 4 or laminated with the insulating layer 114, a metal oxide containing the same component as the oxide semiconductor is used. A solid layer may be formed.

[0086] In this embodiment, silicon oxide having a thickness of 200 nm is deposited as the insulating layer 114 by sputtering. The substrate temperature during film formation should be between room temperature and 300°C. In the present embodiment, the temperature is set to 100° C. The silicon oxide layer is formed by sputtering. (typically argon) atmosphere, oxygen atmosphere, or a mixture of rare gas and oxygen atmosphere. The target may be silicon oxide or silicon. For example, silicon can be used as a target and sputtered in an atmosphere containing oxygen. By carrying out the above steps, silicon oxide can be formed.

[0087] In order to remove the residual moisture in the formation chamber during the formation of the insulating layer 114, an adsorption type vacuum pump is used. It is preferable to use a pump (such as a cryopump). The insulating layer 114 formed in the formation chamber has a reduced concentration of impurities contained in the insulating layer 114. Also, it can be used as an exhaust means for removing residual moisture in the formation chamber of the insulating layer 114. may be a turbomolecular pump plus a cold trap.

[0088] The sputtering gas used in forming the insulating layer 114 is hydrogen, water, a hydroxyl group, a hydride, or the like. It is preferable to use a high-purity gas from which impurities have been removed.

[0089] Then, the mixture is subjected to a reduced pressure atmosphere, an inert gas atmosphere, an oxygen gas atmosphere, or an ultra-dry air atmosphere. A second heat treatment is performed under atmospheric pressure (preferably at 200° C. or higher and 600° C. or lower, for example at 250° C. or higher and 55° C. or lower). However, the first photolithography process and the second photolithography process may be performed at a temperature of 0° C. or lower. When Al is used in the wiring layer formed by the lithography process, the temperature of the heat treatment The temperature is set to 380° C. or less, preferably 350° C. or less, and Cu is used for the wiring layer. In this case, the heat treatment temperature is set to 450°C or less. For example, 450°C in a nitrogen atmosphere. The second heat treatment may be performed for 1 hour. The temperature of the channel forming region is raised while the region is in contact with the insulating layer 114. The oxygen can be supplied to the oxide semiconductor film. It is preferable not to be caught.

[0090] Through the above steps, the semiconductor device shown in FIG. 1 can be manufactured (see FIG. 2E).

[0091] The hydrogen concentration is sufficiently reduced and highly purified, and sufficient oxygen is supplied to prevent oxygen deficiency. In oxide semiconductors with reduced defect levels in the energy gap, the carrier concentration is 1×1 0 12 / cm 3 Less than 1×10 11 / cm 3 Less than 1.45 is preferable ×10 10 / cm 3 For example, the off-state current (here, unit: The value per channel width (1 μm) is 100zA / μm (1zA (zeptoampere) is 1×10 -21 A) or less, preferably 10zA / μm or less. Also, at 85°C, 100zA / μm(1×10 -19 A / μm) or less, preferably 10zA / μm (1×1 0 -20 In this way, the i-type (intrinsic) or substantially i-type By using a thin oxide semiconductor, a transistor with excellent off-state current characteristics can be obtained. can be done.

[0092] In addition, a transistor including a highly purified oxide semiconductor has low threshold voltage, on-state current, and other properties. Almost no temperature dependence is observed in any of the electrical characteristics. There is also little gender variation.

[0093] In this way, a transistor having an oxide semiconductor that has been highly purified and made electrically i-type (intrinsic) is produced. The change in electrical characteristics of the capacitor is suppressed, and the capacitor is electrically stable. It is possible to provide a highly reliable semiconductor device including an oxide semiconductor having excellent thermal conductivity.

[0094] According to another aspect of the present invention, a semiconductor region is processed into an island-shaped semiconductor layer by photolithography. Since the film process is reduced, the number of photomasks and the number of processes can also be reduced. It is possible to provide semiconductor devices with higher productivity and higher yield.

[0095] For example, when forming the contact 126, the openings 120a, 120b, 122a, In order to process the oxide semiconductor film 106 into an island shape, the oxide semiconductor film 106 is formed. In addition, the photolithography process can be reduced. The number of photomasks and steps required can also be reduced.

[0096] Such openings 120a, 120b, 122a, 122b, 124a, and 124b are provided. This eliminates the need to remove the oxide semiconductor film 106 unnecessarily. Therefore, a step or the like caused by unnecessary removal of the oxide semiconductor film 106 is not formed. Therefore, the insulating layer and the conductive layer formed after the oxide semiconductor film 106 are prevented from being broken. This can prevent problems such as the above, thereby improving the yield of semiconductor devices. In addition, since the oxide semiconductor film 106 is not unnecessarily removed, the semiconductor device of this embodiment can be manufactured without any problems. When applied to a pixel portion of a display device, the aperture ratio of the pixel portion can be improved.

[0097] According to another aspect of the present invention, a first wiring and a second wiring are provided between the first wiring and the second wiring. A transistor in which a gate electrode layer and a source electrode layer are electrically connected to a low-potential third wiring In order to provide the above, a continuous oxide semiconductor is provided above or below the first wiring, the second wiring, and the third wiring. Even if the insulating film is provided, leakage current between the first wiring, the second wiring, and the third wiring can be prevented. In other words, even if the semiconductor region is not processed into an island-shaped semiconductor layer, This prevents leakage current from occurring between transistors or wirings, etc., thus improving reliability. Therefore, a semiconductor device with high reliability can be provided.

[0098] (Embodiment 2) In this embodiment, as an example of a semiconductor device disclosed in this specification, a liquid crystal display device is shown in FIG. 4. The same parts as those in the first embodiment or parts having similar functions, The steps can be performed in the same manner as in the first embodiment, and the repeated explanation will be omitted. A detailed description of the location will be omitted.

[0099] FIG. 3A is a plan view of the liquid crystal display device, and FIG. 3B is a diagram showing the structure of the liquid crystal display device along the dashed line C1- 3A is a cross-sectional view of the pixel electrode layer 30. 7 is a plan view of the substrate 300 side where the insulating layer 306 and the like are omitted for simplification. Moreover, Fig. 4 is an equivalent circuit diagram of the liquid crystal display device corresponding to Figs. 3(A) and (B).

[0100] FIG. 3 shows an active matrix type liquid crystal display device in which multiple pixels are arranged adjacent to each other. The liquid crystal display device shown in FIG. That is, the first wiring 311, the second wiring 313, and the first wiring 311 and a third wiring 310 having a lower potential than the second wiring 313. The third wiring 310 is an oxide semiconductor film 303 in which a gate electrode layer and a drain electrode layer are connected. The second wiring 313 and the third wiring 310 are electrically connected to each other via a gate electrode. The source electrode layer is electrically connected to the oxide semiconductor film 303. It is being done.

[0101] In addition, the first wiring 311, the second wiring 313, the third wiring 310, the first transistor 331, and An insulating layer 305 and an insulating layer 306 are provided so as to cover the second transistor 332 and the like. The pixel electrode layer 3 is connected to the insulating layer 305 via a contact 324 provided in the insulating layer 306. 07 and the conductive layer 312 are connected.

[0102] Here, the transistor 330 is electrically connected to the first wiring 311. A liquid crystal element 334 is electrically connected to the third wiring 310. The liquid crystal element 334 includes a pixel electrode layer 307, an electrode layer 323, and a liquid crystal layer The liquid crystal layer 326 is sandwiched between insulating layers 321 functioning as alignment films. The electrode layer 323 is provided on the substrate 320 side, and the pixel electrode layer 321a and the pixel electrode layer 321b are provided. The liquid crystal layer 326 is disposed between the electrode layer 307 and the electrode layer 323 .

[0103] As shown in FIG. 3B, the first transistor 331 is provided on the substrate 300. A gate electrode layer 304, a gate insulating layer 302 provided on the gate electrode layer 304, and a gate An oxide semiconductor film 303 provided over the insulating layer 302 and a and a source electrode layer and a drain electrode layer connected to the first transistor. The source electrode layer 331 corresponds to the third wiring 310 and is connected to the gate The drain electrode layer of the first transistor 331 is connected to the electrode layer 304. That is, one region of the conductive layer 312 is electrically connected to the first transistor. The gate electrode layer 304 functions as the drain electrode layer of the gate insulator 331. The layer 302 , the oxide semiconductor film 303 , and the conductive layer 312 also function as a capacitor 333 .

[0104] Similarly, the second transistor 332 is formed by a gate electrode layer 304 provided on the substrate 300. A gate insulating layer 302 is provided on the gate electrode layer 304. The oxide semiconductor film 303 and the source The source electrode layer and the drain electrode layer of the second transistor 332. The layer corresponds to the third wiring 310 and is connected to the gate electrode layer 304 via a contact 325. The drain electrode layer of the second transistor 332 is electrically connected to the second wiring 313. That is, one region of the second wiring 313 is connected to the drain of the second transistor 332. It serves as the rain electrode layer.

[0105] As shown in FIG. 3A, in the liquid crystal display device according to the present embodiment, the oxide semiconductor film The oxide semiconductor film 303 is formed on almost the entire surface. Since it is not necessary to process the oxide semiconductor film 303 into an island shape, The lithography process can be reduced. This also reduces the number of masks and processes required. A display device can be provided.

[0106] In the liquid crystal display device according to the present embodiment, the first transistor 331 and the second transistor In the sta 332, the third wiring 310 and the gate electrode layer 304 are connected to a contact 325. By connecting the first transistor 331 and the second transistor 332 through Each of the first wiring 311 and the second wiring 312 can function as a diode. 13, and a third wiring 310 having a lower potential than the first wiring 311 and the second wiring 313. As a result, the first wiring 311, the second wiring 313, and the third wiring 310 are above or below Even if a continuous oxide semiconductor film 303 is provided on the first wiring 311, It is possible to prevent leakage current occurring between the second wiring 313 and the third wiring 310. As a result, a highly reliable liquid crystal display device can be provided.

[0107] In addition, in FIG. 3, a transistor 330 electrically connected to the first wiring 311 is provided. The transistor 330 is electrically connected to a liquid crystal element 334. However, the liquid crystal display device has a transistor electrically connected to the second wiring 313. The transistor is electrically connected to a liquid crystal element.

[0108] The transistor 330 includes a gate electrode layer 301 provided on a substrate 300 and a gate electrode layer A gate insulating layer 302 is provided on the gate insulating layer 301, and an oxide film is provided on the gate insulating layer 302. A semiconductor film 303, a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor film 303, Here, the source electrode layer of the transistor 330 is connected to the conductive layer 312. The drain electrode layer corresponds to one region of the first wiring 311. The transistors used in the second embodiment have the same configuration as the transistor 330.

[0109] The transistor 330 also includes a continuous oxide semiconductor film 303. In the vicinity of the transistor 330, an opening is formed along the channel length direction of the transistor 330. The opening 335b is provided on the pixel electrode layer 307. In this way, when the continuous oxide semiconductor film 303 is used, Even if the transistor 330 is connected to the power supply 310, the leakage current generated in the transistor 330 and the leakage current generated between the wirings can be prevented. Therefore, a more reliable liquid crystal display device can be provided.

[0110] Moreover, by providing such openings 335a and 335b, unnecessary oxide semiconductor This eliminates the need to remove the oxide semiconductor film 303. Therefore, the oxide semiconductor film is less likely to have a step due to the removal of the oxide semiconductor film. It is possible to prevent the insulating layer and the conductive layer formed after 303 from being cut off. In addition, the oxide semiconductor film 303 is not necessary. Since the film is not necessarily removed, the aperture ratio of the pixel can be improved.

[0111] FIG. 4 shows an equivalent circuit of FIG.

[0112] The liquid crystal display device according to one aspect of the present invention includes a first wiring 311, a second wiring 313, and a first wiring The first and second wirings 311 and 313 have a lower potential than the third wiring 310. The gate electrode of the transistor 330 is connected to the gate line (including the gate electrode layer 301). The in-electrode is connected to the first wiring 311, and the source electrode is connected to one of the electrodes of the liquid crystal element 334 and the capacitance One electrode of the element 333 is connected to the drain electrode of the transistor 331. The other electrode of the capacitor 333 and the gate electrode of the transistor 331 (gate electrode layer 304 ) and source electrode, the gate electrode (gate electrode layer 304) and source electrode of the transistor 332 The electrode is connected to the third wiring 310. The drain electrode of the transistor 332 is , and is connected to the second wiring 313.

[0113] According to one aspect of the present invention, a photolithography process is performed to process a semiconductor region into an island-shaped semiconductor layer. Since the number of steps is reduced, the number of photomasks and steps can also be reduced. It is possible to provide liquid crystal displays with high productivity and high yield.

[0114] According to another aspect of the present invention, a first wiring and a second wiring are provided between the first wiring and the second wiring. A transistor in which a gate electrode layer and a source electrode layer are electrically connected to a low-potential third wiring In order to provide the above, a continuous oxide semiconductor is provided above or below the first wiring, the second wiring, and the third wiring. Even if the insulating film is provided, leakage current between the first wiring, the second wiring, and the third wiring can be prevented. In other words, even if the semiconductor region is not processed into an island-shaped semiconductor layer, This prevents leakage current from occurring between transistors or wirings, etc., thus improving reliability. Therefore, it is possible to provide a highly reliable liquid crystal display device.

[0115] (Embodiment 3) In this embodiment, an example of a light-emitting display device is shown as an example of a semiconductor device disclosed in this specification. 5 and 6. The same parts as those in the first embodiment or parts having similar functions, The steps and processes can be performed in the same manner as in the first embodiment, and the repeated explanation will be omitted. Detailed explanation of each part will be omitted.

[0116] FIG. 5A is a plan view of the light-emitting display device, and FIG. 5B is a diagram showing the structure of the light-emitting display device along the dashed line D1- 5A is a cross-sectional view taken along the dashed line D3-D4 of the pixel electrode layer 20. 7 is a plan view of the substrate 200 side where the insulating layer 206 and the like are omitted for simplification. FIG. 6 is an equivalent circuit diagram of the light-emitting display device corresponding to FIGS. 5(A) and 5(B). .

[0117] FIG. 5 shows an active matrix type light emitting display device in which a plurality of pixels are arranged adjacent to each other. The light-emitting display device shown in FIG. That is, the first wiring 211, the second wiring 213, and the first wiring 211 and a third wiring 210 that is at a lower potential than the second wiring 213. The third wiring 210 is an oxide semiconductor film 203 in which a gate electrode layer and a drain electrode layer are connected. The second wiring 213 and the third wiring 210 are electrically connected to each other via a gate electrode. The source electrode layer is electrically connected to the oxide semiconductor film 203. It is being done.

[0118] In addition, the first wiring 211, the second wiring 213, the third wiring 210, the first transistor 231, and An insulating layer 205 and an insulating layer 206 are provided so as to cover the second transistor 232 and the like. The pixel electrode layer is connected to the insulating layer 205 via a contact 224 provided in the insulating layer 206. 207 and the conductive layer 212 are connected.

[0119] Here, the transistor 230 is electrically connected to the first wiring 211. The light emitting element 234 is electrically connected to the third wiring 210. The light-emitting element 234 includes a pixel electrode layer 207, an electrode layer 223, and a light-emitting layer 2 The electrode layer 223 functions as a cathode, and the insulating layer 221 functions as a partition wall. do.

[0120] As shown in FIG. 5B, the first transistor 231 is provided on the substrate 200. A gate electrode layer 204, a gate insulating layer 202 provided on the gate electrode layer 204, and a gate An oxide semiconductor film 203 provided over the insulating layer 202 and and a source electrode layer and a drain electrode layer connected to the first transistor. The source electrode layer 231 corresponds to the third wiring 210 and is connected to the source electrode layer 231 via the contacts 225a and 225b. The drain of the first transistor 231 is connected to the gate electrode layer 204. The electrode layer is electrically connected to the conductive layer 212. That is, one region of the conductive layer 212 is It functions as a drain electrode layer of the first transistor 231. Here, the gate electrode layer 204 The gate insulating layer 202, the oxide semiconductor film 203, and the third wiring 210 constitute a capacitance element 233. It also works.

[0121] Similarly, the second transistor 232 is formed by a gate electrode layer 204 provided on the substrate 200. A gate insulating layer 202 is provided on the gate electrode layer 204. The oxide semiconductor film 203 and the source The source electrode layer and the drain electrode layer of the second transistor 232. The layer corresponds to the third wiring 210, and is connected to the gate electrode layer via contacts 225a and 225b. 204. The drain electrode layer of the second transistor 232 is connected to the second wiring 213. That is, one region of the second wiring 213 is electrically connected to the second transistor. The contacts 225a and 225b function as the drain electrode layer of the transistor 232. The gate electrode layer 204 and the third wiring 210 are electrically connected by a conductive layer 216. It is being done.

[0122] As shown in FIG. 5A, in the light-emitting display device according to the present embodiment, an oxide semiconductor film 203 is formed over almost the entire surface of the substrate 200. Since it is no longer necessary to process the oxide semiconductor film 203 into an island shape, In addition, the photolithography process for the purpose of the present invention can be reduced. This also reduces the number of photomasks and processes required for the manufacturing process. It is therefore possible to provide a light emitting display device with improved performance.

[0123] In the light emitting display device according to the present embodiment, the first transistor 231 and the second transistor In the sta 232, the third wiring 210 and the gate electrode layer 204 are connected to a contact 225a. , 225b, the first transistor 231 and the second transistor The first wiring 211 and the second wiring 232 can function as diodes. and a third wiring 210 having a lower potential than the first wiring 211 and the second wiring 213. As a result, the first wiring 211, the second wiring 213, and the third wiring 210 Even when a continuous oxide semiconductor film 203 is provided above or below the first It is possible to prevent leakage current occurring between the wiring 211, the second wiring 213, and the third wiring 210. Therefore, a highly reliable light-emitting display device can be provided.

[0124] In addition, in FIG. 5, a transistor 230 electrically connected to the first wiring 211 is provided. In this way, the transistor 232 functions as a selection transistor. The transistor 235 electrically connected to the light emitting element 234 is electrically connected to the light emitting element 234. It functions as a transistor for driving the element 234. The line 213 also has a transistor electrically connected thereto.

[0125] The transistor 230 includes a gate electrode layer 201 provided on a substrate 200 and a gate electrode layer A gate insulating layer 202 is provided on the gate insulating layer 201, and an oxide semiconductor is provided on the gate insulating layer 202. A conductive film 203 and a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor film 203 Here, the source electrode layer of the transistor 230 corresponds to the conductive layer 214. In this case, the drain electrode layer corresponds to one region of the first wiring 211. The conductive layer 214 and the gate electrode layer 208 are connected to each other by the conductive layer 215 through the gate electrodes 226a and 226b. The electrodes are electrically connected to each other.

[0126] Similarly, the transistor 232 includes a gate electrode layer 208 disposed on the substrate 200 and a gate A gate insulating layer 202 is provided on the gate electrode layer 208, and a gate insulating layer 203 is provided on the gate insulating layer 202. The oxide semiconductor film 203 and the source electrode layer electrically connected to the oxide semiconductor film 203 are Here, the source electrode layer of the transistor 232 is a conductive layer. 212 , and the drain electrode layer corresponds to one region of the third wiring 210 .

[0127] The transistors 230 and 232 also include the continuous oxide semiconductor film 203. Here, in the vicinity of the transistor 230, The opening 236b is provided with a pixel electrode 236a. The oxide semiconductor film 203 is provided so as to surround the oxide semiconductor film 207. Even if the transistor 230 is connected to the power supply 210, the leakage current generated in the transistor 230 and the leakage current generated between the wirings are prevented. Therefore, it is possible to provide a light emitting display device having higher reliability. can.

[0128] Moreover, by providing such openings 236a and 236b, oxide semiconductor This eliminates the need to remove the oxide semiconductor film 203. Therefore, the oxide semiconductor film is less likely to have a step due to the removal of the oxide semiconductor film. It is possible to prevent the insulating layer and the conductive layer formed after 203 from being cut off. In addition, the oxide semiconductor film 203 can be formed unnecessarily. Since it is not removed, the aperture ratio of the pixel can be improved.

[0129] FIG. 6 shows an equivalent circuit of FIG.

[0130] The first wiring 211 and the second wiring 213, the third wiring 214 having a lower potential than the first wiring 211 and the second wiring 213 The transistor 230 includes a gate electrode layer 201 and a wiring 210. ) is connected to the gate line, the drain electrode is connected to the first wiring 211, and the source electrode is connected to the capacitance element One of the terminals 233 is connected to the gate electrode of the transistor 235. The drain electrode of the transistor 235, the drain electrode of the transistor 231, and the light-emitting element 234 The third wiring 210 is connected to one of the source and drain terminals of the transistor 231. the source electrode, gate electrode, and source electrode of transistor 232; The source electrode of the transistor 23 is connected to the other end of the capacitor 233. The drain electrode of 2 is connected to a second wiring 213 .

[0131] According to one aspect of the present invention, a photolithography process is performed to process a semiconductor region into an island-shaped semiconductor layer. Since the number of steps is reduced, the number of photomasks and steps can also be reduced. It is possible to provide a light emitting display device with high productivity and high yield.

[0132] According to another aspect of the present invention, a first wiring and a second wiring are provided between the first wiring and the second wiring. A transistor in which a low-potential third wiring is electrically connected to a gate electrode layer and a source electrode layer. In order to provide the above, a continuous oxide semiconductor is provided above or below the first wiring, the second wiring, and the third wiring. Even if the insulating film is provided, leakage current between the first wiring, the second wiring, and the third wiring can be prevented. In other words, even if the semiconductor region is not processed into an island-shaped semiconductor layer, This prevents leakage current from occurring between transistors or wirings, thereby improving reliability. Therefore, a semiconductor device with high reliability can be provided.

[0133] (Embodiment 4) In the above-described embodiments 1 to 3, an oxide that can be used for a semiconductor film of a transistor One embodiment of the semiconductor film will be described with reference to FIG.

[0134] The oxide semiconductor film of this embodiment has a first crystalline oxide semiconductor film and a second crystalline oxide semiconductor film. The semiconductor film has a stacked structure including a second crystalline oxide semiconductor film that is thicker than the semiconductor film.

[0135] An insulating layer 437 is formed on the insulating layer 400. In this embodiment, the insulating layer 437 is made of P An oxide film with a thickness of 50 nm to 600 nm is formed by CVD or sputtering. An insulating layer is formed. For example, a silicon oxide film, a gallium oxide film, an aluminum oxide film, an oxide a silicon oxynitride film, an aluminum oxynitride film, or a silicon oxynitride film; Layers or stacks thereof may be used.

[0136] Next, a first oxide semiconductor film is formed to a thickness of 1 nm to 10 nm over the insulating layer 437. The first oxide semiconductor film is formed by a sputtering method. The substrate temperature during the film formation is set to 200° C. or higher and 400° C. or lower.

[0137] In this embodiment, a target for an oxide semiconductor (In-Ga-Zn oxide target ( In2O3:Ga2O3:ZnO=1:1:2 [molar ratio]) was used to fabricate the substrate and target The distance between the plates was 170 mm, the substrate temperature was 250°C, the pressure was 0.4 Pa, and the DC power supply was The first step was performed at 0.5 kW, oxygen only, argon only, or argon and oxygen atmosphere with a thickness of 5 nm. An oxide semiconductor film 1 is formed.

[0138] Next, the atmosphere in the chamber in which the substrate is placed is changed to nitrogen or dry air, and a first heat treatment is performed. The temperature of the first heat treatment is set to 400° C. or more and 750° C. or less. Thus, a first crystalline oxide semiconductor film 450a is formed (see FIG. 7A).

[0139] Although it depends on the temperature of the first heat treatment, the first heat treatment causes crystallization from the film surface. In the first heat treatment, crystals grow from the surface of the film toward the inside, and crystals with a C-axis orientation are obtained. Due to this process, zinc and oxygen gather on the surface of the film, and the top surface of the film is made up of zinc and oxygen in a hexagonal shape. One or more layers of graphene-type two-dimensional crystals are formed on the outermost surface, and these are aligned in the thickness direction. When the temperature of the heat treatment is increased, the layers grow from the surface to the inside, and then from the inside to the inside. The bottom and crystal growth proceeds.

[0140] The first heat treatment converts oxygen in the insulating layer 437, which is an oxide insulating layer, into a first crystalline oxide. The semiconductor film 450a is diffused at its interface or in its vicinity (within ±5 nm from the interface). As a result, oxygen vacancies in the first crystalline oxide semiconductor film are reduced. The insulating layer 437 is insulated from the first crystalline oxide semiconductor film 450a in the film (bulk). At least one of the interfaces of the edge layer 437 and the edge layer 438 has an amount of oxygen exceeding the stoichiometric ratio. is preferred.

[0141] Next, a second oxide semiconductor film having a thickness of more than 10 nm is formed on the first crystalline oxide semiconductor film 450a. The second oxide semiconductor film is formed by a sputtering method. The substrate temperature during film formation is set to 200° C. or higher and 400° C. or lower. By setting the temperature to 400° C. or higher, the first crystalline oxide semiconductor film is formed in contact with the surface of the first crystalline oxide semiconductor film. The precursors are aligned in the oxide semiconductor film, so that the oxide semiconductor film can have order. .

[0142] In this embodiment, a target for an oxide semiconductor (In-Ga-Zn oxide target ( In2O3:Ga2O3:ZnO=1:1:2 [molar ratio]) was used to fabricate the substrate and target The distance between the plates was 170 mm, the substrate temperature was 400°C, the pressure was 0.4 Pa, and the DC power supply was 0.5kW, oxygen only, argon only, or argon and oxygen atmosphere, 25nm thick A second oxide semiconductor film is formed.

[0143] Next, the atmosphere in the chamber in which the substrate is placed is changed to nitrogen or dry air, and a second heat treatment is performed. The temperature of the second heat treatment is 400° C. or more and 750° C. or less. Thus, a second crystalline oxide semiconductor film 450b is formed (see FIG. 7B). The treatment is carried out in a nitrogen atmosphere, an oxygen atmosphere, or a mixture of nitrogen and oxygen. This increases the density of the second crystalline oxide semiconductor film and reduces the number of defects. Therefore, the first crystalline oxide semiconductor film 450a is used as a core, and the first crystalline oxide semiconductor film 450a is expanded in the thickness direction, that is, from the bottom to the inside. As the crystal growth progresses, a second crystalline oxide semiconductor film 450b is formed.

[0144] In addition, the steps from the formation of the insulating layer 437 to the second heat treatment are performed continuously without exposure to the air. The steps from the formation of the insulating layer 437 to the second heat treatment are preferably performed in the following order. In an atmosphere containing almost no moisture (inert atmosphere, reduced pressure atmosphere, dry air atmosphere, etc.) For example, the moisture content is controlled to a dew point of -40°C or less, preferably a dew point of - The atmosphere should be dry nitrogen and below 50℃.

[0145] Next, the first crystalline oxide semiconductor film 450a and the second crystalline oxide semiconductor film 450b are The stacked oxide semiconductor layers are processed to form an island-shaped oxide semiconductor film 45. In FIG. 7C, a first crystalline oxide semiconductor film 450a and a second crystalline oxide semiconductor film 3 are formed. The interface of the crystalline oxide semiconductor film 450b is indicated by a dotted line, and the oxide semiconductor stack is described. However, there is no clear interface, and the illustration is only for the purpose of easy understanding. is.

[0146] The oxide semiconductor stack is processed by forming a mask with a desired shape over the oxide semiconductor stack. The above-described mask can be used for etching the oxide semiconductor stack. It can be formed using a method such as photolithography. The mask may be formed using a method such as a photolithography method.

[0147] Note that the etching of the oxide semiconductor stack can be either dry etching or wet etching. Of course, these may be used in combination.

[0148] In addition, the first crystalline oxide semiconductor film and the second crystalline oxide semiconductor film obtained by the above manufacturing method The semiconductor film has a feature that it has a C-axis orientation. The crystalline oxide semiconductor film and the second crystalline oxide semiconductor film do not have a single crystal structure but have an amorphous structure. The structure is not C-axis aligned crystals. The first crystalline oxide semiconductor has an oxide containing tal (also referred to as CAAC). The first crystalline oxide semiconductor film and the second crystalline oxide semiconductor film partly have grain boundaries.

[0149] To obtain CAAC, it is necessary to form hexagonal crystals in the initial stage of deposition of the oxide semiconductor film. It is important to do so and to allow the crystal to grow using the crystal as a seed. For this purpose, the substrate heating temperature is set to 100° C. to 500° C., preferably 200° C. to 400° C., and more preferably It is preferable to set the temperature to 250° C. to 300° C. In addition, the substrate heating temperature during film formation is The oxide semiconductor film is then heat-treated at a temperature higher than the temperature at which the oxide semiconductor film is deposited. It is possible to repair defects such as defects at the interface between layers.

[0150] The first and second crystalline oxide semiconductor films are made of an oxide material containing at least Zn. In-Al-Ga-Zn oxides, which are quaternary metal oxides, and In-Al-Ga-Z n-based oxides, In-Si-Ga-Zn-based oxides, In-Ga-B-Zn-based oxides, In-Sn-Ga-Zn oxides and ternary metal oxides such as In-Ga-Zn oxides , In-Al-Zn oxide, In-Sn-Zn oxide, In-B-Zn oxide, S n-Ga-Zn oxide, Al-Ga-Zn oxide, Sn-Al-Zn oxide, etc. In-Zn oxide, Sn-Zn oxide, Al-Zn oxide, which are elemental metal oxides, There are Zn-Mg oxides and Zn oxides. The above materials also contain SiO2. It may be possible.

[0151] Note that alkali metals are not elements that constitute an oxide semiconductor and are therefore considered impurities. In particular, lithium-earth metals are impurities when they are not elements constituting an oxide semiconductor. Among the alkali metals, Na is preferable when the insulating film in contact with the oxide semiconductor film is an oxide. Diffusion into the insulating film + In addition, Na is an element that is contained in the oxide semiconductor film. It breaks the bond between the metal and oxygen that make up the conductor, or interrupts that bond. As a result, For example, the threshold voltage shifts in the negative direction, resulting in a normally-on state and a decrease in mobility. This leads to deterioration of the transistor characteristics, and also to variations in characteristics. The degradation and variation in transistor characteristics caused by impurities are due to the oxide semiconductor This phenomenon is noticeable when the hydrogen concentration in the oxide semiconductor film is sufficiently low. Hydrogen concentration is 5×10 19 cm -3 Below, especially 5×10 18 cm -3 If It is desirable to reduce the concentration of the above impurities. The measured Na concentration is 5×10 16 / cm 3 Less than or equal to 1×10 16 / cm 3 below , more preferably 1×10 15 / cm 3 Similarly, the measured value of Li concentration is , 5×10 15 / cm 3 Less than or equal to 1×10 15 / cm 3 The following is recommended. The measured K concentration is 5×10 15 / cm 3 Less than or equal to 1×10 15 / cm 3 Below It is better to put it below.

[0152] In addition, a two-layer structure in which a second crystalline oxide semiconductor film is formed on a first crystalline oxide semiconductor film can be used. However, the present invention is not limited to the above, and a third crystalline oxide semiconductor film may be formed after the second crystalline oxide semiconductor film is formed. By repeating the process of film formation and heat treatment to form a layer structure of three or more layers, good.

[0153] The oxide semiconductor film 453 formed by the above-described method is A transistor that can be applied to the semiconductor device disclosed in Transistors 160, 162, 164, 166, 330, 331, 332, 230, 23 1, 232, 233) can be used as appropriate. The current of the transistor mainly flows through the interface of the oxide semiconductor stack. Even if irradiation or BT stress is applied, the degradation of transistor characteristics is suppressed. , or reduced.

[0154] A first crystalline oxide semiconductor film such as an oxide semiconductor film 453 and a second crystalline oxide semiconductor film By using a stack of films in a transistor, it is possible to obtain a transistor with stable electrical characteristics and high reliability. This makes it possible to realize a low-power transistor.

[0155] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0156] (Embodiment 5) A semiconductor device having a display function (display function) using the transistors described in any of Embodiments 1 to 4 In addition, it is possible to manufacture a part of a driver circuit including a transistor. The entire display can be integrated with the pixel section on the same substrate to form a system-on-panel. do.

[0157] In FIG. 8A, a pixel portion 4002 provided on a first substrate 4001 is surrounded by a A sealant 4005 is provided and the semiconductor device is sealed with a second substrate 4006. In A), a region surrounded by a sealant 4005 on a first substrate 4001 and The semiconductor layer is formed of a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate in a different region. A scanning line driver circuit 4004 and a signal line driver circuit 4003 are also mounted. A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a signal line driver circuit 4005 are provided to the pixel portion 4002. Various signals and potentials are transmitted through the FPC (Flexible Printed Circuit). )Powered by 4018a and 4018b.

[0158] In FIG. 8B and FIG. 8C, a pixel portion 4002 is provided on a first substrate 4001. A sealant 4005 is provided so as to surround the scanning line driver circuit 4004 . In addition, a second substrate 4006 is provided on the pixel portion 4002 and the scanning line driver circuit 4004. Therefore, the pixel portion 4002 and the scanning line driver circuit 4004 are in a synchronous with the first substrate 4001. The display element is sealed by a sealing material 4005 and a second substrate 4006. In FIG. 8B and FIG. 8C, the first substrate 4001 is surrounded by a sealant 4005. A single crystal semiconductor film or a polycrystalline semiconductor film is formed on a separately prepared substrate in a region different from the region where the semiconductor device is mounted. A signal line driver circuit 4003 formed of a conductor film is mounted. In the above embodiment, a signal line driver circuit 4003 and a scanning line driver circuit 4004 are separately formed. Various signals and potentials applied to the pixel portion 4002 are supplied from an FPC 4018. .

[0159] In addition, in FIG. 8B and FIG. 8C, a signal line driver circuit 4003 is formed separately. However, the present invention is not limited to this configuration. The circuit may be formed separately and mounted, or may be a part of a signal line driver circuit or a part of a scanning line driver circuit. Alternatively, only the portion may be formed separately and mounted.

[0160] The method of connecting the separately formed drive circuit is not particularly limited, and may be any of the following: ip On Glass) method, wire bonding method, or TAB (Tape A A method such as a utomated bonding method can be used. This is an example in which a signal line driver circuit 4003 and a scanning line driver circuit 4004 are implemented by the OG method. FIG. 8B shows an example in which a signal line driver circuit 4003 is mounted by the COG method, and FIG. 4003) is an example in which a signal line driver circuit 4003 is mounted by the TAB method.

[0161] The display device includes a panel in which a display element is sealed, and a controller for the panel. and modules in which ICs, etc., including the above, are mounted.

[0162] In this specification, the term "display device" refers to an image display device, a display device, or an optical Also refers to connectors, such as FPC or TAB tape. Modules with TCP attached, TAB tape or TCP with printed wiring board attached The IC (integrated circuit) is directly mounted on the installed module or display element using the COG method. The display device includes all of the modules installed in the display device.

[0163] The pixel portion and the scanning line driver circuit provided on the first substrate have a plurality of transistors. The transistor shown as an example in Embodiment 1 can be used.

[0164] Examples of display elements provided in the display device include liquid crystal elements (also called liquid crystal display elements), light-emitting elements ( The light-emitting element can be used as a light-emitting display element. This category includes elements whose brightness can be controlled, specifically inorganic EL (Electroluminescent) Luminescence, organic electroluminescence, etc. Also, electronic ink, etc. A display medium whose contrast changes depending on use can also be applied.

[0165] One embodiment of a semiconductor device will be described with reference to FIGS. This corresponds to the cross-sectional view at MN in FIG. 8(B).

[0166] As shown in FIGS. 9 to 11, the semiconductor device has a connection terminal electrode 4015 and a terminal electrode 4016. The connection terminal electrode 4015 and the terminal electrode 4016 are connected to the terminals of the FPC 4018. The electrode is electrically connected to the anisotropic conductive film 4019 .

[0167] The connection terminal electrode 4015 is formed from the same conductive film as the first electrode layer 4030. 016 denotes source and drain electrodes of the transistor 4010 and the transistor 4011. It is formed of the same conductive film as that of the first embodiment.

[0168] In addition, a pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. 9 to 11, the transistors included in the pixel portion 4002 are 4010 and a transistor 4011 included in the scanning line driver circuit 4004. is doing.

[0169] In this embodiment, the transistors 4010 and 4011 are the transistors The transistors shown in the following can be applied: transistor 4010, transistor 4 011 is electrically stable with the electrical characteristic fluctuation suppressed. As the semiconductor device of this embodiment shown in FIG. 11, a highly reliable semiconductor device can be provided. Cut.

[0170] Note that in the transistor 4011, A conductive layer may be provided in the oxide semiconductor film so as to overlap with a channel formation region of the oxide semiconductor film. By providing the transistor at a position closer to the bias-thermal switch, the reliability of the transistor is improved. In the BT test, the threshold voltage of the transistor 4011 before and after the BT test was In addition, the potential of the conductive layer of the transistor 4011 can be reduced. It may be the same as the gate electrode or may be different, and serves as a second gate electrode. In addition, the potential of the conductive layer 4040 can be set to GND, 0 V, or floating. It may be in a locked state.

[0171] The transistor 4010 provided in the pixel portion 4002 is electrically connected to a display element. The display element is not particularly limited as long as it can display, and various display elements can be used. It can be used.

[0172] FIG. 9 shows an example of a liquid crystal display device using liquid crystal elements as display elements. The liquid crystal element 4013 is a first electrode layer 4030, a second electrode layer 4031, and a liquid crystal layer. The liquid crystal layer 4008 is sandwiched between insulating films functioning as alignment films. The second electrode layer 4031 is provided on the second substrate 4006 side. The first electrode layer 4030 and the second electrode layer 4031 are stacked with a liquid crystal layer 4008 interposed therebetween. It has a layered structure.

[0173] Also, 4035 is a columnar spacer obtained by selectively etching the insulating film. The liquid crystal layer 4008 is provided to control the thickness (cell gap) of the liquid crystal layer 4008. A spacer of the above type may be used.

[0174] When liquid crystal elements are used as display elements, thermotropic liquid crystal, low molecular weight liquid crystal, and high molecular weight liquid crystal are used. For example, a polymer-dispersed liquid crystal, a ferroelectric liquid crystal, an antiferroelectric liquid crystal, etc. can be used. Depending on the conditions, liquid crystal materials can have a cholesteric phase, a smectic phase, a cubic phase, a chiral phase, etc. It shows nematic phase, isotropic phase, etc.

[0175] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so it is necessary to improve the temperature range. In order to achieve this, a liquid crystal composition containing at least a few percent by weight of a chiral agent is used in the liquid crystal layer. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent has a short response speed of 1 msec or less. Since the liquid crystal display is optically isotropic, no alignment treatment is required and the viewing angle dependency is small. Since there is no need to provide a rubbing treatment, the It is possible to prevent electrostatic damage, which may occur during the manufacturing process, and to reduce defects and damage to liquid crystal display devices. Therefore, the productivity of the liquid crystal display device can be improved.

[0176] The specific resistivity of the liquid crystal material is 1×10 9 Ω cm or more, preferably 1×10 1 1 Ω cm or more, and more preferably 1×10 12 Ω·cm or more. The specific resistivity values ​​in the detailed description are those measured at 20°C.

[0177] The size of the storage capacitor provided in the liquid crystal display device is determined by the lead of the transistor arranged in the pixel portion. It is set so that the charge can be held for a predetermined period of time, taking into consideration the current drain and other factors. By using a transistor having a semiconductor film, the liquid crystal capacitance of each pixel is It is sufficient to provide a storage volume having a size of 1 / 3 or less, preferably 1 / 5 or less, of the capacity of the do.

[0178] The transistor including the purified oxide semiconductor film used in this embodiment is in an off state. Therefore, the current value (off-state current value) at the time of the image signal or other electric signals can be reduced. The retention time of the data can be extended, and the write interval can also be set longer when the power is on. This reduces the frequency of refresh operations, resulting in reduced power consumption. It plays a key role.

[0179] In addition, the transistor including the purified oxide semiconductor film used in this embodiment has a relatively Since a relatively high field effect mobility can be obtained, high speed driving is possible. By using the above transistor in the pixel portion, a high-quality image can be provided. In addition, the above transistors can be separately manufactured in a driver circuit portion and a pixel portion on the same substrate. This makes it possible to reduce the number of parts in the liquid crystal display device.

[0180] There are two types of LCD displays: TN (Twisted Nematic) and IPS (In-P lane-Switching) mode, FFS (Fringe Field Switching) mode ching) mode, ASM(Axially Symmetric aligned) Micro-cell mode, OCB (Optical Compensated B) irefringence mode, FLC (Ferroelectric Liqui d Crystal) mode, AFLC (AntiFerroelectric Liq. uid Crystal) mode can be used.

[0181] In addition, normally black type liquid crystal display devices, such as those using a vertical alignment (VA) mode, The liquid crystal display device may be a transmission type liquid crystal display device. This is a method of controlling the arrangement of crystal molecules, and it applies a In this method, the liquid crystal molecules are aligned vertically. There are several types of vertical alignment modes: For example, MVA (Multi-Domain Vertical Alignment) nt) mode, PVA (Patterned Vertical Alignment) You can also use the ASV mode, ASV mode, etc. It is a multi-layered device that is divided into regions (sub-pixels) and designed to tilt the molecules in different directions in each region. A method known as domaining or multi-domain design can be used.

[0182] In addition, in display devices, they are used as black matrices (light-shielding layers), polarizing members, phase difference members, reflectors, etc. Optical members (optical substrates) such as a prevention member are provided as appropriate. For example, a polarizing substrate and a retardation substrate Alternatively, a backlight or a sidelight may be used as the light source. It's fine.

[0183] In addition, multiple light-emitting diodes (LEDs) are used as backlights to display the image in a time-division format. It is also possible to perform a field sequential drive method. By applying the color driving method, it is possible to display colors without using color filters. This can be done.

[0184] The display method in the pixel section uses the progressive method, interlace method, etc. In addition, the color elements controlled by pixels when displaying colors are RGB (R is The color is not limited to the three colors red, green, and blue. For example, RGBW (W stands for white). , or RGB plus one or more colors such as yellow, cyan, magenta, etc. The size of the display area may be different for each dot of the color element. The present invention is not limited to color display devices, but may be applied to monochrome display devices. It is also possible.

[0185] In addition, a light-emitting element that utilizes electroluminescence is used as a display element included in the display device. The light-emitting element utilizing electroluminescence is made of a light-emitting material They are classified according to whether they are organic or inorganic compounds. Generally, the former are called organic E The latter is called an inorganic EL element.

[0186] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into layers containing light-emitting organic compounds, causing a current to flow. The rears (electrons and holes) recombine to form an excited state in the light-emitting organic compound. When the excited state returns to the ground state, light is emitted. Such a light-emitting element is called a current-excitation type light-emitting element.

[0187] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements according to their element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor reaction that utilizes the donor and acceptor levels. Thin-film inorganic EL elements are made by sandwiching a light-emitting layer between dielectric layers. The structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0188] In order to extract light emitted from the light-emitting element, at least one of the pair of electrodes must be transparent. Then, a transistor and a light emitting element are formed on the substrate, and light is emitted from the opposite side of the substrate. Top emission, bottom emission where the light is emitted from the surface on the substrate side, or the surface on the substrate side and the opposite side There are light-emitting elements with a double-sided emission structure that extracts light from the outside, and light-emitting elements with any emission structure can be used. It is possible.

[0189] Figure 10 shows an example of a light-emitting device using a light-emitting element as a display element. The transistor 4513 is electrically connected to the transistor 4010 provided in the pixel portion 4002. The light-emitting element 4513 includes a first electrode layer 4030, an electroluminescent layer 4511, a second The electrode layer 4031 has a laminated structure, but is not limited to the structure shown in the figure. The configuration of the light emitting element 4513 can be changed appropriately according to the direction of the light to be extracted from the light emitting element 4513. .

[0190] The partition 4510 is formed using an organic insulating material or an inorganic insulating material, particularly a photosensitive resin. An opening is formed on the first electrode layer 4030 using a material, and the sidewall of the opening is a continuous curved It is preferable to form the inclined surface so that the inclined surface is formed with a certain rate.

[0191] The electroluminescent layer 4511 may be composed of a single layer or may be composed of a plurality of layers stacked together. It doesn't matter whether it is done or not.

[0192] In order to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4513, the second electrode layer A protective film may be formed on the insulating film 4031 and the partition wall 4510. The protective film may be made of silicon nitride. A silicon nitride oxide film, a DLC film, etc. can be formed on the first substrate 400. The space sealed by the first substrate 4001, the second substrate 4006, and the sealant 4005 is filled with a filler 45. 14 is provided and sealed. In this way, it is highly airtight and degassing is possible to prevent exposure to the outside air. Protective films with low damage (laminated films, UV-cured resin films, etc.) and covering materials It is preferable to package (enclose) the

[0193] Filler 4514 can be inert gas such as nitrogen or argon, or ultraviolet curing resin or Thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic, polyimide, etc. Mido, epoxy resin, silicone resin, PVB (Polyvinyl Butyral) or EVA (Elastomer) For example, nitrogen may be used as a filler. stomach.

[0194] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates) and color filters may be provided as appropriate. In addition, the polarizing plate or the circular polarizing plate may be provided with an anti-reflection film. Anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0195] It is also possible to provide electronic paper that drives electronic ink as a display device. Electronic paper is also called an electrophoretic display (electrophoretic display) and is similar to paper. It is possible to make it as easy to read as other display devices, consume less power, and have a thinner and lighter shape. This has the advantage that

[0196] The electrophoretic display device may have various forms, but it has a first particle having a positive charge and A microcapsule containing a negatively charged second particle and a negatively charged second particle is introduced into a solvent or solute. By applying an electric field to the microcapsules, The particles in the cell are moved in opposite directions to each other, and only the color of the particles that have gathered on one side is displayed. In addition, the first particles or the second particles contain a dye, and they do not migrate in the absence of an electric field. The color of the first particle and the color of the second particle are different (including colorless). )

[0197] In this way, the electrophoretic display device is a so-called This is a display that utilizes the dielectrophoretic effect.

[0198] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. A color display is also possible by using a color filter or particles having a pigment.

[0199] The first particles and the second particles in the microcapsules are made of a conductive material, an insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, A material selected from the group consisting of magnetochromic material, magnetophoretic material, and a composite material thereof. Just use it.

[0200] In addition, display devices using the twist ball display method can also be used as electronic paper. The twist ball display method uses black and white spherical particles as the display element. The insulating layer is disposed between a first electrode layer and a second electrode layer, and the first electrode layer and the second electrode layer are electrically connected to each other. This is a method of displaying information by controlling the orientation of spherical particles by applying a potential difference to the electrode layer. be.

[0201] FIG. 11 shows an active matrix type electronic paper as one embodiment of the semiconductor device. The electronic paper shown in FIG. 11 is an example of a display device that uses the twist ball display method. The ball display method is a method in which black and white spherical particles are arranged between the electrode layers used for the display element. The display is performed by controlling the orientation of the spherical particles by generating a potential difference between the electrode layers. This is the method.

[0202] A first electrode layer 4030 connected to the transistor 4010 and a second electrode layer 4006 Between the second electrode layer 4031 and the black area 4615a and the white area 4615b, A spherical particle 4613 is provided that includes a cavity 4612 that is filled with liquid around it. The spherical particles 4613 are filled with a filler 4614 such as a resin. The second electrode layer 4031 corresponds to a common electrode (opposite electrode). are electrically connected.

[0203] In addition, in FIG. 9 to FIG. 11, the first substrate 4001 and the second substrate 4006 are made of Ga. In addition to the glass substrate, a flexible substrate can also be used. For example, a light-transmitting plastic substrate can be used. As for plastic, FRP (Fibreglass) is suitable. SS-Reinforced Plastics) plate, PVF (Polyvinyl Fluoride) ) film, polyester film or acrylic resin film can be used. In addition, sheets with a structure in which aluminum foil is sandwiched between PVF film or polyester film are also available. A .alpha. can also be used.

[0204] The insulating layer 4021 can be formed using an inorganic insulating material or an organic insulating material. , acrylic resin, polyimide, benzocyclobutene resin, polyamide, epoxy resin, etc. In addition, when an organic insulating material having heat resistance is used, it is suitable as a planarizing insulating film. In addition to mechanical insulating materials, low-k materials, siloxane resins, PSG (phosphorus Glass), BPSG (borophosphorus glass), etc. can be used. The insulating layer may be formed by stacking a plurality of insulating films formed by the above method.

[0205] The method for forming the insulating layer 4021 is not particularly limited, and may be a sputtering method, a sintering method, or the like, depending on the material. Pin coat method, dipping method, spray coating, droplet ejection method (inkjet method, screen printing, offset printing, etc.), roll coating, curtain coating, knife coating Coating etc. can be used.

[0206] A display device transmits light from a light source or a display element to display an image. All thin films such as the substrate, insulating film, and conductive film installed in the part are designed to be transparent to light in the visible light wavelength range. It shall be translucent.

[0207] A first electrode layer and a second electrode layer (a pixel electrode layer, a common electrode layer, a pair of electrodes) for applying a voltage to the display element In the case of the electrode layer, the direction of the light to be extracted, the location of the electrode layer, and The light transmitting property or the light reflecting property can be selected depending on the pattern structure of the electrode layer.

[0208] The first electrode layer 4030 and the second electrode layer 4031 are made of indium oxide containing tungsten oxide. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide (ITO) ), indium zinc oxide, indium tin oxide with added silicon oxide, etc. A conductive material that can be used.

[0209] The first electrode layer 4030 and the second electrode layer 4031 are made of tungsten (W) or molybdenum. (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (N b) Tantalum (Ta), Chromium (Cr), Cobalt (Co), Nickel (Ni), Titanium Metals such as titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag), Or, it can be formed by using one or more of its alloys or nitrides. .

[0210] The first electrode layer 4030 and the second electrode layer 4031 are made of a conductive polymer (conductive polymer). The conductive polymer may be a conductive composition containing a conductive polymer. For example, a so-called π-electron conjugated conductive polymer can be used. or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives, or a copolymer consisting of two or more of aniline, pyrrole and thiophene, or a derivative thereof Examples include the body.

[0211] In addition, since transistors are easily damaged by static electricity, etc., a protection circuit for protecting the driver circuit is also required. It is preferable that the protection circuit is configured using a non-linear element.

[0212] As described above, by using the transistor described in Embodiment 1 as an example, a highly reliable semiconductor device can be obtained. Note that the transistors exemplified in the first embodiment can be used in the same manner as in the above-mentioned embodiment. Not only semiconductor devices with display functions, but also power devices mounted on power circuits, LSIs, etc. semiconductor integrated circuits, semiconductor devices with image sensor functions that read information on objects, etc. The present invention can be applied to semiconductor devices having various functions.

[0213] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0214] (Embodiment 6) The semiconductor device disclosed in this specification can be applied to various electronic devices (including game machines). The electronic device can be, for example, a television device (television or television receivers), computer monitors, digital cameras, digital video cameras digital photo frames, mobile phones (also called mobile phones or mobile phone devices), ), portable game machines, personal digital assistants, audio playback devices, pachinko machines and other large game machines, etc. Examples of electronic devices including the display device described in the above embodiment will be described. do.

[0215] FIG. 12A shows a notebook personal computer, which includes a main body 3001 and a housing 300 2, a display unit 3003, a keyboard 3004, etc. By applying the semiconductor device shown in 1 or 2, a highly reliable notebook type personal computer can be manufactured. The input signal may be a computer.

[0216] FIG. 12B shows a portable digital assistant (PDA), which includes a display unit 3023 and a display unit 3024 on a main body 3021. An external interface 3025 and operation buttons 3024 are provided. The semiconductor device shown in the above embodiment is applied to the stylus 3022. This makes it possible to make the personal digital assistant (PDA) more reliable.

[0217] FIG. 12C shows an example of an electronic book 2700. For example, the electronic book 2700 is The device is made up of two housings, a housing 2701 and a housing 2703. The body 2703 is integrated with a shaft portion 2711, and the opening and closing movement is performed around the shaft portion 2711. This configuration allows the device to operate like a paper book. It becomes.

[0218] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a text is displayed on the right display unit (display unit 2705 in FIG. 12C) and An image can be displayed on the display unit (the display unit 2707 in FIG. 12C). By applying the semiconductor device shown in the figure, a highly reliable electronic book 2700 can be obtained. This can be done.

[0219] FIG. 12C shows an example in which an operating unit and the like are provided in the housing 2701. For example, The housing 2701 includes a power supply 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. The display may be configured with a keyboard or a pointing device on the front side. On the back and sides, there are external connection terminals (earphone terminal, USB terminal, etc.), a recording medium insertion section, etc. Furthermore, the electronic book 2700 may have a function as an electronic dictionary. A configuration in which the above is also possible.

[0220] The electronic book 2700 may be configured to transmit and receive information wirelessly. The desired book data can be purchased and downloaded from the electronic book server. is also possible.

[0221] FIG. 12D shows a mobile phone, which is composed of two housings, a housing 2800 and a housing 2801. The housing 2801 includes a display panel 2802, a speaker 2803, a microphone, and a 2804, pointing device 2806, camera lens 2807, external connection terminal The housing 2800 also includes a solar panel for charging the portable information terminal. It is equipped with a battery cell 2810, an external memory slot 2811, etc. The semiconductor device shown in the above embodiment mode is incorporated in the body 2801. This makes it possible to provide a mobile phone with higher reliability.

[0222] The display panel 2802 is equipped with a touch panel, and in FIG. The multiple operation keys 2805 are indicated by dotted lines. It also implements a boost circuit to boost the input voltage to the voltage required for each circuit.

[0223] The display direction of the display panel 2802 changes appropriately depending on the usage mode. Since it has a camera lens 2807 on the same surface as 2802, video telephony is possible. The speaker 2803 and the microphone 2804 are not limited to voice calls, but can also be used for video calls, Recording and playback are possible. Furthermore, the housing 2800 and the housing 2801 can be slid. As shown in 12(D), the device can be folded from the unfolded state to the overlapped state, making it suitable for carrying. This makes it possible to miniaturize the device.

[0224] The external connection terminal 2808 can be connected to various cables such as AC adapters and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. A recording medium can be inserted into the memory slot 2811 to accommodate larger amounts of data storage and transfer. do.

[0225] In addition to the above functions, even if the device has infrared communication function, TV reception function, etc. good.

[0226] FIG. 12(E) shows a digital video camera, which includes a main body 3051, a display unit (A) 3057, An eyepiece 3053, an operation switch 3054, a display unit (B) 3055, a battery 3056, etc. By applying the semiconductor device described in the above embodiment, It is possible to provide a highly reliable digital video camera.

[0227] FIG. 12(F) shows an example of a television device. The television device 9600 includes: A display unit 9603 is incorporated in a housing 9601. The display unit 9603 displays images. In this embodiment, the housing 9601 is supported by a stand 9605. By using the semiconductor device shown in the above embodiment, reliability is improved. It may be a high-performance television device 9600.

[0228] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. The remote control can also be operated by the remote control. A display unit for displaying the output information may be provided.

[0229] The television device 9600 includes a receiver and a modem. It can receive more general television broadcasts, and can also be connected to a modem via wired or wireless connection. By connecting to a network, communication can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0230] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is. [Explanation of symbols]

[0231] 100 Substrates 102 Gate electrode layer 103a Gate electrode layer 103b Gate electrode layer 104 Gate insulating layer 106 Oxide semiconductor film 110a wiring 110b wiring 111 Wiring 112a conductive layer 112b Conductive layer 114 Insulating layer 120a opening 120b opening 122a opening 122b opening 124a opening 124b opening 126 Contacts 160 Transistors 162 Transistor 164 Transistors 166 Transistor 170 areas 200 boards 201 Gate electrode layer 202 Gate insulating layer 203 Oxide Semiconductor Film 204 Gate electrode layer 205 Insulating layer 206 Insulating Layer 207 Pixel electrode layer 208 Gate electrode layer 210 Wiring 211 Wiring 212 Conductive layer 213 Wiring 214 Conductive layer 215 Conductive Layer 216 Conductive Layer 221 Insulating layer 222 Light-emitting layer 223 Electrode layer 224 Contact 225a Contact 225b Contact 226a Contact 226b Contact 230 Transistor 231 Transistor 232 Transistor 233 Capacitive element 234 Light-emitting element 235 Transistor 236a opening 236b opening 300 Substrates 301 Gate electrode layer 302 Gate insulating layer 303 Oxide Semiconductor Film 304 Gate electrode layer 305 Insulation Layer 306 Insulating layer 307 Pixel electrode layer 310 Wiring 311 Wiring 312 Conductive layer 313 Wiring 320 Substrate 321a Insulating layer 321b Insulating layer 323 Electrode layer 324 Contact 325 Contacts 326 Liquid crystal layer 330 Transistor 331 Transistor 332 Transistor 333 Capacitive element 334 Liquid crystal elements 400 Insulation Layer 437 Insulating Layer 450a Crystalline oxide semiconductor film 450b Crystalline oxide semiconductor film 453 Oxide Semiconductor Film 2700 e-books 2701 Case 2703 Case 2705 ​​Display section 2707 Display section 2711 Shaft 2721 Power supply 2723 Operation key 2725 Speaker 2800 Chassis 2801 Case 2802 Display Panel 2803 Speaker 2804 Microphone 2805 Operation key 2806 Pointing Device 2807 Camera lenses 2808 External connection terminal 2810 Solar Cell 2811 External memory slot 3001 Main unit 3002 Case 3003 Display section 3004 Keyboard 3021 Main unit 3022 Stylus 3023 Display section 3024 Operation button 3025 External Interface 3051 Main unit 3053 Eyepiece 3054 Operation switch 3055 Display section (B) 3056 Battery 3057 Display section (A) 335a opening 335b opening 4001 Substrate 4002 Pixel section 4003 Signal line driver circuit 4004 Scanning line driver circuit 4005 Sealing material 4006 Substrate 4008 Liquid crystal layer 4010 Transistor 4011 Transistor 4013 Liquid crystal element 4015 Connection terminal electrode 4016 Terminal electrode 4018 FPC 4018a FPC 4019 Anisotropic conductive film 4021 Insulation layer 4030 Electrode layer 4031 Electrode layer 4032 Insulating film 4033 Insulating film 4040 Conductive layer 4510 Bulkhead 4511 Electroluminescent layer 4513 Light emitting element 4514 Filling material 4612 Cavity 4613 Spherical particles 4614 Filling material 4615a Black area 4615b White area 9600 Television Equipment 9601 Case 9603 Display section 9605 Stand

Claims

1. A first conductive layer above a substrate; a second conductive layer disposed above the substrate and having the same material as the first conductive layer; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the second conductive layer; an oxide semiconductor layer above the first insulating layer; a third conductive layer having a region located above the oxide semiconductor layer; a fourth conductive layer having a region located above the oxide semiconductor layer, the oxide semiconductor layer has a region overlapping with the first conductive layer via the first insulating layer, the first conductive layer has a region that functions as a gate electrode of a first transistor; the second conductive layer has a region that functions as a gate electrode of a second transistor; the first insulating layer has a region that functions as a gate insulating layer of the first transistor; the third conductive layer has a region in contact with a top surface of the oxide semiconductor layer and a region functioning as one of a source electrode and a drain electrode of the first transistor; the fourth conductive layer has a region in contact with a top surface of the oxide semiconductor layer, and has a region functioning as the other of a source electrode or a drain electrode of the first transistor and a region functioning as one of a source electrode or a drain electrode of the second transistor; the third conductive layer has a region in contact with an upper surface of the first conductive layer; In a plan view, each of the first to fourth conductive layers has a region extending in a first direction, In the plan view, the third conductive layer overlaps an end of the first conductive layer in the first direction and also overlaps an end of the second conductive layer in the first direction; In the plan view, the fourth conductive layer overlaps with an end of the second conductive layer in the first direction.

2. A first conductive layer above a substrate; a second conductive layer disposed above the substrate and having the same material as the first conductive layer; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the second conductive layer; an oxide semiconductor layer above the first insulating layer; a third conductive layer having a region located above the oxide semiconductor layer; a fourth conductive layer having a region located above the oxide semiconductor layer, the oxide semiconductor layer has a region overlapping with the first conductive layer via the first insulating layer, the first conductive layer has a region that functions as a gate electrode of a first transistor; the second conductive layer has a region that functions as a gate electrode of a second transistor; the first insulating layer has a region that functions as a gate insulating layer of the first transistor; the third conductive layer has a region in contact with a top surface of the oxide semiconductor layer and a region functioning as one of a source electrode and a drain electrode of the first transistor; the fourth conductive layer has a region in contact with a top surface of the oxide semiconductor layer, and has a region functioning as the other of a source electrode or a drain electrode of the first transistor and a region functioning as one of a source electrode or a drain electrode of the second transistor; the third conductive layer has a region in contact with an upper surface of the first conductive layer; In a plan view, the first conductive layer has a region extending in a second direction intersecting a first direction in which the second conductive layer extends, In the plan view, the third conductive layer overlaps an end of the first conductive layer in the first direction and also overlaps an end of the second conductive layer in the first direction; In the plan view, the fourth conductive layer overlaps with an end of the second conductive layer in the first direction.

3. A first conductive layer above a substrate; a second conductive layer disposed above the substrate and having the same material as the first conductive layer; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the second conductive layer; an oxide semiconductor layer above the first insulating layer; a third conductive layer having a region located above the oxide semiconductor layer; a fourth conductive layer having a region located above the oxide semiconductor layer; a second insulating layer having a region in contact with an upper surface of the oxide semiconductor layer, a region in contact with an upper surface of the third conductive layer, and a region in contact with an upper surface of the fourth conductive layer; the first insulating layer has a stack of a silicon nitride film and a silicon oxide film; the oxide semiconductor layer has a region in contact with an upper surface of the silicon oxide film, the second insulating layer includes silicon oxide and has a region in contact with an upper surface of the oxide semiconductor layer; the oxide semiconductor layer has a region overlapping with the first conductive layer via the first insulating layer, the first conductive layer has a region that functions as a gate electrode of a first transistor; the second conductive layer has a region that functions as a gate electrode of a second transistor; the first insulating layer has a region that functions as a gate insulating layer of the first transistor; the third conductive layer has a region in contact with a top surface of the oxide semiconductor layer and a region functioning as one of a source electrode and a drain electrode of the first transistor; the fourth conductive layer has a region in contact with a top surface of the oxide semiconductor layer, and has a region functioning as the other of a source electrode or a drain electrode of the first transistor and a region functioning as one of a source electrode or a drain electrode of the second transistor; the third conductive layer has a region in contact with an upper surface of the first conductive layer; In a plan view, each of the first to fourth conductive layers has a region extending in a first direction, In the plan view, the third conductive layer overlaps an end of the first conductive layer in the first direction and also overlaps an end of the second conductive layer in the first direction; In the plan view, the fourth conductive layer overlaps with an end of the second conductive layer in the first direction.

4. A first conductive layer above a substrate; a second conductive layer disposed above the substrate and having the same material as the first conductive layer; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the second conductive layer; an oxide semiconductor layer above the first insulating layer; a third conductive layer having a region located above the oxide semiconductor layer; a fourth conductive layer having a region located above the oxide semiconductor layer; a second insulating layer having a region in contact with an upper surface of the oxide semiconductor layer, a region in contact with an upper surface of the third conductive layer, and a region in contact with an upper surface of the fourth conductive layer; the first insulating layer has a stack of a silicon nitride film and a silicon oxide film; the oxide semiconductor layer has a region in contact with an upper surface of the silicon oxide film, the second insulating layer includes silicon oxide and has a region in contact with an upper surface of the oxide semiconductor layer; the oxide semiconductor layer has a region overlapping with the first conductive layer via the first insulating layer, the first conductive layer has a region that functions as a gate electrode of a first transistor; the second conductive layer has a region that functions as a gate electrode of a second transistor; the first insulating layer has a region that functions as a gate insulating layer of the first transistor; the third conductive layer has a region in contact with a top surface of the oxide semiconductor layer and a region functioning as one of a source electrode and a drain electrode of the first transistor; the fourth conductive layer has a region in contact with a top surface of the oxide semiconductor layer, and has a region functioning as the other of a source electrode or a drain electrode of the first transistor and a region functioning as one of a source electrode or a drain electrode of the second transistor; the third conductive layer has a region in contact with an upper surface of the first conductive layer; In a plan view, the first conductive layer has a region extending in a second direction intersecting a first direction in which the second conductive layer extends, In the plan view, the third conductive layer overlaps an end of the first conductive layer in the first direction and also overlaps an end of the second conductive layer in the first direction; In the plan view, the fourth conductive layer overlaps with an end of the second conductive layer in the first direction.

5. In any one of claims 1 to 4, The oxide semiconductor layer contains In, Ga, and Zn.

6. In any one of claims 1 to 5, A semiconductor device, wherein each of the first conductive layer and the second conductive layer has a first layer having Ti and a second layer having a region in contact with an upper surface of the first layer and having Cu.

Images