Semiconductor device

Abstract

To provide a semiconductor device which effectively cools a portion that is locally heated.SOLUTION: A semiconductor device 101 includes a heat dissipation substrate 10 and a plurality of radiation fins 80. The heat dissipation substrate dissipates heat that is generated in a semiconductor element 40. The plurality of radiation fins is joined to a bottom face of the heat dissipation substrate and disposed in parallel with each other. The semiconductor element is held on a top face of the heat dissipation substrate. Each of the plurality of heat dissipation fins includes a plurality of crest parts 81 formed by iteratively folding a band-shaped plate material extending in one direction. A cross-sectional shape of each of the plurality of heat dissipation fins is distorted by having a laterally asymmetric shape. The plurality of crest parts includes a coarse region in which a mutual interval in the extension direction is coarse and a dense region in which a mutual interval in the extension direction is denser than the coarse region.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device. [Background technology]

[0002] A semiconductor device equipped with a heat dissipation fin has been proposed to dissipate heat generated from a semiconductor element. For example, Patent Document 1 discloses a cooling system for electronic components in which a heat sink element is provided on one side of a heat exchanger plate. The heat sink element has a plurality of loops formed therein, and the plurality of loops have a regular pattern. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2016-82237 A Summary of the Invention [Problem to be solved by the invention]

[0004] When the heat dissipation fin has a regular shape, the heat dissipation fin acts to uniformly cool the surface of the heat dissipation base material, but such a heat dissipation fin cannot effectively cool parts of the semiconductor device that locally generate a large amount of heat, such as the semiconductor element, the wire bond part, and the terminal part.

[0005] The present disclosure has been made to solve the above-mentioned problems, and has an object to provide a semiconductor device that effectively cools a portion that locally generates heat. [Means for solving the problem]

[0006] The semiconductor device according to the present disclosure includes a heat dissipation substrate and a plurality of heat dissipation fins. The heat dissipation substrate dissipates heat generated by a semiconductor element. The plurality of heat dissipation fins are joined to a lower surface of the heat dissipation substrate and arranged in parallel to one another. The semiconductor element is held on an upper surface of the heat dissipation substrate. Each of the plurality of heat dissipation fins includes a plurality of peaks formed by repeatedly bending a strip-shaped plate material extending in one direction. The cross-sectional shape of each of the plurality of heat dissipation fins is distorted due to the fact that each of the plurality of peaks has an asymmetric shape. The plurality of peaks have sparse regions where the spacing between them in the extension direction is sparse, and dense regions where the spacing between them in the extension direction is denser than the sparse regions. Effect of the Invention

[0007] According to the present disclosure, a semiconductor device is provided that effectively cools a portion that locally generates heat.

[0008] The objects, features, aspects, and advantages of the present disclosure will become more apparent from the following detailed description and the accompanying drawings. [Brief description of the drawings]

[0009] [Figure 1] 1 is a plan view showing a configuration of a semiconductor device in a first embodiment. [Diagram 2] FIG. 2 is a bottom view showing a configuration of the semiconductor device. [Diagram 3] 1 is a cross-sectional view showing a configuration of a semiconductor device. [Figure 4] 1 is a cross-sectional view showing a configuration of a semiconductor device. [Diagram 5] 1 is a cross-sectional view showing a configuration of a semiconductor device. [Figure 6] 4 is a diagram showing a temperature distribution inside the semiconductor device in the first embodiment. FIG. [Figure 7] FIG. 11 is a diagram showing a temperature distribution inside a semiconductor device in a comparative example. [Figure 8] 1 is a cross-sectional view showing a configuration of a semiconductor device according to a first modification of the first embodiment. [Figure 9]FIG. 11 is a cross-sectional view showing a configuration of a semiconductor device according to a second modification of the first embodiment. [Figure 10] FIG. 11 is a cross-sectional view showing a configuration of a semiconductor device in a second embodiment. [Figure 11] FIG. 11 is a cross-sectional view showing a configuration of a semiconductor device in a second embodiment. [Figure 12] FIG. 11 is a bottom view showing the configuration of a semiconductor device in a third embodiment. [Figure 13] FIG. 11 is a cross-sectional view showing a configuration of a semiconductor device in a fourth embodiment. [Figure 14] FIG. 13 is a cross-sectional view showing a configuration of a semiconductor device in a fifth embodiment. [Figure 15] 11 is a diagram showing the angle between the lower surface of the heat dissipation base material and the peaks of the heat dissipation fins. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] <Embodiment 1> FIG. 1 is a plan view showing the configuration of a semiconductor device 101 in the first embodiment. FIG. 2 is a bottom view showing the configuration of the semiconductor device 101. FIGS. 3 to 5 are cross-sectional views showing the configuration of the semiconductor device 101. FIG. 3 shows the cross-sectional configuration along the line AA shown in FIG. 2. FIG. 4 shows the configuration of a region C shown in FIG. 3. FIG. 5 shows the cross-sectional configuration along the line BB shown in FIG. 2.

[0011] The semiconductor device 101 includes a heat dissipation base 10 , an insulating layer 20 , a circuit pattern 30 , a semiconductor element 40 , a case 50 , terminals 60 , a sealing material 70 , a plurality of heat dissipation fins 80 , and a coolant flow path 90 .

[0012] The heat dissipation base material 10 is a plate made of a metal such as copper or aluminum, or a plate made of an AlSiC composite material. The heat dissipation base material 10 is also called a heat dissipation plate or a base plate. The heat dissipation base material 10 has a function of transferring heat generated by electronic components such as a semiconductor element 40 to the outside, that is, a heat dissipation function.

[0013] The insulating layer 20 is provided on the upper surface of the heat dissipation base material 10. The insulating layer 20 is made of, for example, resin.

[0014] The circuit pattern 30 is provided on the upper surface of the heat dissipation base material 10 via the insulating layer 20. The circuit pattern 30 is made of a conductive material such as a metal.

[0015] The semiconductor element 40 is provided on the circuit pattern 30 via a bonding material 31. That is, the semiconductor element 40 is held on the upper surface of the heat dissipation base material 10. The bonding material 31 is a conductive material such as solder. The semiconductor element 40 is formed of a semiconductor such as Si. The semiconductor is preferably a so-called wide band gap semiconductor such as SiC, GaN, Ga2O3, GeO2, diamond, etc. The semiconductor element 40 is a power semiconductor element, a control IC (Integrated Circuit) for controlling the power semiconductor element, etc. The semiconductor element 40 includes, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a Schottky barrier diode, etc. Alternatively, the semiconductor element 40 may include an RC-IGBT (Reverse-Conducting IGBT) in which an IGBT and a free wheel diode are formed in one semiconductor substrate.

[0016] The case 50 has a rectangular frame body in a plan view. The case 50 accommodates the heat dissipation base material 10, the insulating layer 20, the circuit pattern 30, and the semiconductor element 40 inside the frame body. The case 50 is disposed so as to surround the outer periphery of the heat dissipation base material 10, and is joined to the heat dissipation base material 10. The case 50 is formed of, for example, resin.

[0017] The terminal 60 is held by the case 50. For example, a plurality of terminals 60 are provided on four sides constituting the frame of the case 50. As shown in FIG. 3 and FIG. 5, the terminals 60 are provided on both ends of the case 50. The terminal 60 is a conductor configured to be connectable to an external circuit provided outside the semiconductor device 101. The terminal 60 is, for example, a metal frame formed by processing a metal plate such as copper into a predetermined shape. The terminal 60 is fixed to the case 50 by embedding a part of the terminal 60 inside the case 50. The terminal 60 is electrically connected to the semiconductor element 40. A metal wire 61 is joined to one end of the terminal 60. The metal wire 61 is joined to the circuit pattern 30 or the semiconductor element 40. The terminal 60 includes a C electrode 60A, a P electrode 60B, and an N electrode 60C.

[0018] The sealing material 70 fills the space inside the case 50. The sealing material 70 seals the insulating layer 20, the circuit pattern 30, the semiconductor element 40, a part of the terminal 60, and the metal wire 61. The sealing material 70 is made of a resin having insulating properties and curing properties. The sealing material 70 is, for example, a silicone resin, an epoxy resin, or the like.

[0019] The multiple heat dissipation fins 80 are joined to the lower surface of the heat dissipation base material 10 and are arranged in parallel to one another. The multiple heat dissipation fins 80 in the first embodiment extend in the short-side direction of the case 50. Each of the multiple heat dissipation fins 80 includes multiple peaks 81 and multiple valleys formed by repeatedly bending a strip-shaped plate material extending in the short-side direction, i.e., in one direction.

[0020] The heat dissipation fin 80 is joined to the lower surface of the heat dissipation base material 10 at a plurality of joints 82. The plurality of joints 82 are provided between a plurality of valleys, i.e., a plurality of peaks 81. At least one of the plurality of joints 82 is located directly below the semiconductor element 40. Alternatively, at least one of the joints is located directly below the joining position between the metal wire 61 joined to the terminal 60 and the circuit pattern 30. The metal wire 61 is drawn down from any one of the terminals 60, the C electrode 60A, the P electrode 60B, and the N electrode 60C, to the circuit pattern 30.

[0021] The plurality of peaks 81 have sparse regions in which the spacing between them is sparse in the extension direction of the heat dissipation fin 80, and dense regions in which the spacing between them is denser in the extension direction than the sparse regions. For example, in FIG. 3 and FIG. 4, the sparse regions are arranged on the left side, and the dense regions are arranged on the right side. Although not shown, a plurality of sparse regions and a plurality of dense regions may be arranged in one heat dissipation fin 80. The sparse regions and the dense regions may be arranged irregularly in one heat dissipation fin 80, for example. Alternatively, the sparse regions and the dense regions may be arranged at predetermined positions so that the coolant described later flows intensively at local heat generating locations inside the semiconductor device 101.

[0022] The cross-sectional shape of the heat dissipation fin 80 is distorted in either the left or right direction due to the asymmetric shape of each of the multiple peaks 81. As shown in Figures 3 and 4, in the first embodiment, the multiple peaks 81 provided on one heat dissipation fin 80 are distorted in the same direction, but they may be distorted irregularly in different directions.

[0023] As shown in FIG. 4, the first heat dissipating fin 80A and the second heat dissipating fin 80B among the multiple heat dissipating fins 80 are offset from each other in the joining positions (for example, the center positions of the joints 82) in the extension direction with the lower surface of the heat dissipating base material 10. In other words, the position of the joint 82A of the first heat dissipating fin 80A in the extension direction is offset from the position of the joint 82B of the second heat dissipating fin 80B in the extension direction. In the first embodiment, the position of the joint 82 in the extension direction differs for each heat dissipating fin 80. The first heat dissipating fin 80A and the second heat dissipating fin 80B are any heat dissipating fin among the multiple heat dissipating fins 80. For example, the first heat dissipating fin 80A is a heat dissipating fin in the first row, and the second heat dissipating fin 80B is a heat dissipating fin in the second row.

[0024] The coolant flow path 90 is provided on the lower surface of the heat dissipating base material 10 so as to encompass the multiple heat dissipating fins 80. A coolant for cooling the heat dissipating fins 80 flows through the coolant flow path 90. The coolant in the first embodiment flows in a direction from the C electrode 60A toward the P electrode 60B or the N electrode 60C. The heat dissipating fins 80 extend in a direction intersecting the direction in which the coolant flows. For example, the heat dissipating fins 80 extend in a direction perpendicular to the direction in which the coolant flows.

[0025] When the joints 82 are located directly below the semiconductor element 40 and directly below the joint positions between the metal wires 61 and the circuit pattern 30, the heat generated inside the semiconductor device 101 is efficiently transferred to the heat dissipation fins 80. The sparse and dense regions of the multiple peaks 81 are arranged at predetermined positions according to local heat generation locations. Therefore, the coolant flows intensively to the heat generation locations. As a result, the cooling effect is improved.

[0026] In addition, the cross-sectional shape of the heat dissipating fins 80 is distorted, and the joining positions in the extension direction are different for each heat dissipating fin 80. This configuration generates slight turbulence in the coolant. This turbulence improves the heat dissipation effect of the heat dissipating fins 80. Even if the joining positions in the extension direction are the same for each heat dissipating fin 80, turbulence occurs due to the distorted cross-sectional shape of the heat dissipating fins 80. In order to generate greater turbulence, it is preferable that the joining positions in the extension direction be different for each heat dissipating fin 80.

[0027] When the semiconductor device 101 is driven, a current always flows through the C-electrode 60A, which causes a large amount of heat to be generated at the joining position of the metal wire 61 that is drawn down from the C-electrode 60A to the circuit pattern 30. The cooling liquid cooled by the chiller flows in from the C-electrode 60A side, so the heat generated around the C-electrode 60A is effectively cooled.

[0028] In summary, the semiconductor device 101 in the first embodiment includes a heat dissipation substrate 10 and a plurality of heat dissipation fins 80. The heat dissipation substrate 10 dissipates heat generated by the semiconductor element 40. The plurality of heat dissipation fins 80 are joined to the lower surface of the heat dissipation substrate 10 and arranged in parallel to each other. The semiconductor element 40 is held on the upper surface of the heat dissipation substrate 10. Each of the plurality of heat dissipation fins 80 includes a plurality of peaks 81 formed by repeatedly bending a strip-shaped plate material extending in one direction. The cross-sectional shape of each of the plurality of heat dissipation fins 80 is distorted due to the fact that each of the plurality of peaks 81 has an asymmetric shape. The plurality of peaks 81 have a sparse region where the spacing between each other in the extension direction is sparse, and a dense region where the spacing between each other in the extension direction is denser than the sparse region.

[0029] Fig. 6 is a diagram showing the temperature distribution inside the semiconductor device 101 in the first embodiment. Fig. 7 is a diagram showing the temperature distribution inside the semiconductor device in the comparative example. According to the semiconductor device 101, the parts that locally generate heat are effectively cooled. In other words, local heat generation inside the semiconductor device 101 is suppressed. Such a configuration realizes miniaturization and high density of the semiconductor device 101.

[0030] When the semiconductor element 40 is made of a wide band gap semiconductor, the semiconductor element 40 is miniaturized. Such a configuration allows the semiconductor device 101 to be further miniaturized and highly dense.

[0031] (First Modification of First Embodiment) 8 is a cross-sectional view showing the configuration of a semiconductor device 101A in Modification 1 of Embodiment 1. Like FIG 3, FIG 8 shows the cross-sectional configuration taken along line AA shown in FIG 2.

[0032] The semiconductor device 101A includes an insulating substrate 25. The insulating substrate 25 is bonded to the upper surface of the heat dissipation base material 10 via a bonding material 32. The insulating substrate 25 includes an insulating layer 20, a front circuit pattern 35, and a back circuit pattern 36. The insulating layer 20 is made of, for example, ceramic. The front circuit pattern 35 is provided on the upper surface of the insulating layer 20. The back circuit pattern 36 is provided on the lower surface of the insulating layer 20. The front circuit pattern 35 corresponds to the circuit pattern 30 shown in the first embodiment. Even with this configuration, the same effects as those of the first embodiment can be obtained.

[0033] (Modification 2 of the First Embodiment) 9 is a cross-sectional view showing the configuration of a semiconductor device 101B in Modification 2 of Embodiment 1. Like FIG. 5, FIG. 9 shows the cross-sectional configuration taken along line segment BB shown in FIG.

[0034] The C electrode 60A and the P electrode 60B serving as terminals 60 are joined to the circuit pattern 30 by a bonding material 33 rather than by a metal wire 61. The terminals 60 may be directly joined to the circuit pattern 30. At least one of the multiple bonding portions 82 of the heat dissipation fin 80 is located directly below the bonding position between the terminal 60 and the circuit pattern 30. Even with this configuration, the same effects as in the first embodiment can be obtained.

[0035] <Embodiment 2> In the second embodiment, the same components as those in the first embodiment are given the same reference symbols, and detailed description thereof will be omitted. Figures 10 and 11 are cross-sectional views showing the configuration of a semiconductor device 102 in the second embodiment. Figure 11 shows the configuration of region D shown in Figure 10. Figure 11 shows a cross section of only the second heat dissipation fin 80B out of the multiple heat dissipation fins 80.

[0036] Each of the multiple peaks 81 of the heat dissipation fin 80 includes two or more constrictions 83. The surface area of ​​the heat dissipation fin 80 is increased, thereby improving the cooling capacity of the heat dissipation fin 80. The semiconductor device 102 of the second embodiment is cooled more efficiently than the semiconductor device 101 of the first embodiment. With this configuration, the semiconductor device 102 can be made smaller and more dense.

[0037] <Embodiment 3> In the third embodiment, the same components as those in the first or second embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted. Fig. 12 is a bottom view showing the configuration of a semiconductor device 103 in the third embodiment.

[0038] The multiple joints 82 that join the heat dissipation fins 80 and the heat dissipation base material 10 between the ridges 81 have a V-shape in plan view. The flow of the coolant is complicated, generating greater turbulence. As a result, the cooling effect is improved. This configuration improves the cooling effect more than the semiconductor device 101 of the first embodiment, for example, and further realizes a smaller size and higher density of the semiconductor device 103. The V-shaped joints 82 can be applied not only to the semiconductor device 101 but also to the semiconductor device 102.

[0039] <Fourth embodiment> In the fourth embodiment, the same components as those in any of the first to third embodiments are denoted by the same reference numerals, and detailed description thereof will be omitted. Fig. 13 is a cross-sectional view showing the configuration of a semiconductor device 104 in the fourth embodiment.

[0040] The lower surface of the heat dissipating base material 10 is recessed from the rear surface of the case 50. Heat dissipating fins 80 are arranged in the recessed portion, and a coolant flow path 90 is formed in the recessed portion. This configuration, for example, has a cooling effect equivalent to that of the semiconductor device 101 of the first embodiment, but achieves a smaller size, a lower height, and a higher density than the semiconductor device 101. This configuration is applicable not only to the semiconductor device 101, but also to the semiconductor device 102 and the semiconductor device 103.

[0041] <Embodiment 5> In the fifth embodiment, the same components as those in any of the first to fourth embodiments are given the same reference symbols, and detailed description thereof will be omitted. Fig. 14 is a cross-sectional view showing the configuration of a semiconductor device 105 in the fifth embodiment. Fig. 15 is a diagram showing the angle between the lower surface of the heat dissipation base material 10 and the peak portion 81 of the heat dissipation fin 80. Fig. 15 shows a cross section of only the first heat dissipation fin 80A among the multiple heat dissipation fins 80.

[0042] At least one of the two exterior angles 84 formed by the lower surface of the heat dissipating base material 10 and one peak 81 is 90° or more. When both exterior angles 84 are 90° or more and the cross-sectional shape of the peak 81 is approximately triangular, the strength of the heat dissipating fin 80 against external forces is increased. In particular, the strength against external forces from directly below the heat dissipating base material 10 is increased. Since it is possible to increase the flow rate of the cooling liquid more than in the semiconductor device 101 of the first embodiment, the cooling effect is improved. Such a configuration realizes the miniaturization and high density of the semiconductor device 105. The configuration of the third embodiment or the configuration of the fourth embodiment may be applied to the semiconductor device 105. Although an example in which both exterior angles 84 are 90° or more is shown in FIG. 14 and FIG. 15, only one exterior angle may be 90° or more.

[0043] In the present disclosure, each embodiment can be freely combined, and each embodiment can be modified or omitted as appropriate.

[0044] Various aspects of the present disclosure are summarized below as appendices.

[0045] (Appendix 1) A heat dissipation base material that dissipates heat generated by a semiconductor element; A plurality of heat dissipation fins are joined to the lower surface of the heat dissipation base material and arranged in parallel with each other, The semiconductor element is supported on an upper surface of the heat dissipation base material, Each of the plurality of heat dissipation fins includes a plurality of peaks formed by repeatedly bending a strip-shaped plate material extending in one direction, a cross-sectional shape of each of the plurality of heat dissipation fins is distorted due to the fact that each of the plurality of peaks has an asymmetric shape; The semiconductor device, wherein the plurality of ridges have sparse regions in which the ridges are spaced apart from one another in the extension direction, and dense regions in which the ridges are spaced apart from one another in the extension direction more closely than the sparse regions.

[0046] (Appendix 2) 2. The semiconductor device according to claim 1, wherein a first heat dissipation fin and a second heat dissipation fin among the plurality of heat dissipation fins are joined to the lower surface of the heat dissipation base at positions offset from each other in the extension direction.

[0047] (Appendix 3) 3. The semiconductor device according to claim 1, wherein the sparse regions and the dense regions of the plurality of peaks are irregularly arranged.

[0048] (Appendix 4) Each of the plurality of heat dissipation fins is joined to the lower surface of the heat dissipation base material at a plurality of joints provided between the plurality of peaks, 4. The semiconductor device according to claim 1, wherein at least one of the plurality of bonding portions is located directly below the semiconductor element.

[0049] (Appendix 5) a circuit pattern provided on the upper surface of the heat dissipation base material via an insulating layer; a terminal that is held in a case that accommodates the semiconductor element and is electrically connected to the semiconductor element; the semiconductor element is provided on the circuit pattern, Each of the plurality of heat dissipation fins is joined to the lower surface of the heat dissipation base material at a plurality of joints provided between the plurality of peaks, 5. The semiconductor device according to claim 1, wherein at least one of the plurality of bonding portions is located directly below a bonding position between a metal wire bonded to the terminal and the circuit pattern, or directly below a bonding position between the terminal and the circuit pattern.

[0050] (Appendix 6) A cooling liquid flow path is provided on the lower surface of the heat dissipation base material so as to include the plurality of heat dissipation fins, and through which a cooling liquid flows for cooling the plurality of heat dissipation fins, 6. The semiconductor device according to claim 1, wherein the plurality of heat dissipation fins extend in a direction intersecting a direction in which the coolant flows in the coolant flow path.

[0051] (Appendix 7) a terminal that is held in a case that accommodates the semiconductor element and is electrically connected to the semiconductor element; 7. The semiconductor device according to claim 6, wherein the coolant flows in a direction from a C electrode provided as the terminal toward a P electrode or an N electrode.

[0052] (Appendix 8) 8. The semiconductor device according to claim 1, wherein the heat dissipation base is joined to a case that houses the semiconductor element and is sealed with a sealant filled in the case.

[0053] (Appendix 9) 9. The semiconductor device according to claim 1, wherein each of the plurality of peaks includes two or more constrictions.

[0054] (Appendix 10) Each of the plurality of heat dissipation fins is joined to the lower surface of the heat dissipation base material at a plurality of joints provided between the plurality of peaks, 10. The semiconductor device according to claim 1, wherein the plurality of bonding portions have a V-shape in a plan view.

[0055] (Appendix 11) The semiconductor device further includes a case that accommodates the semiconductor element and surrounds the outer periphery of the heat dissipation base material, 11. The semiconductor device according to claim 1, wherein the lower surface of the heat dissipation base is recessed further than a rear surface of the case.

[0056] (Appendix 12) 12. The semiconductor device according to claim 1, wherein at least one of two exterior angles formed between the lower surface of the heat dissipation base and each of the plurality of peaks is 90° or greater.

[0057] (Appendix 13) 13. The semiconductor device according to claim 1, wherein the semiconductor element is formed of a wide band gap semiconductor. [Explanation of symbols]

[0058] 10 heat dissipation base material, 20 insulating layer, 25 insulating substrate, 30 circuit pattern, 31 bonding material, 32 bonding material, 33 bonding material, 35 front circuit pattern, 36 rear circuit pattern, 40 semiconductor element, 50 case, 60 terminal, 60A C electrode, 60B P electrode, 60C N electrode, 61 metal wire, 70 sealing material, 80 heat dissipation fin, 80A first heat dissipation fin, 80B second heat dissipation fin, 81 ridge portion, 82 joint portion, 82A joint portion, 82B joint portion, 83 constriction portion, 84 outer angle, 90 coolant flow path, 101 to 105 semiconductor device.

Claims

1. A heat dissipation base material that dissipates heat generated by a semiconductor element; A plurality of heat dissipation fins are joined to the lower surface of the heat dissipation base material and arranged in parallel with each other, The semiconductor element is supported on an upper surface of the heat dissipation base material, Each of the plurality of heat dissipation fins includes a plurality of peaks formed by repeatedly bending a strip-shaped plate material extending in one direction, a cross-sectional shape of each of the plurality of heat dissipation fins is distorted due to the fact that each of the plurality of peaks has an asymmetric shape; The semiconductor device, wherein the plurality of ridges have sparse regions in which the ridges are spaced apart from one another in the extension direction, and dense regions in which the ridges are spaced apart from one another in the extension direction more closely than the sparse regions.

2. The semiconductor device according to claim 1 , wherein a first heat dissipation fin and a second heat dissipation fin of the plurality of heat dissipation fins are joined to the lower surface of the heat dissipation base at positions offset from each other in the extension direction.

3. The semiconductor device according to claim 1 , wherein said sparse regions and said dense regions of said plurality of ridges are irregularly arranged.

4. Each of the plurality of heat dissipation fins is joined to the lower surface of the heat dissipation base material at a plurality of joints provided between the plurality of peaks, The semiconductor device according to claim 1 , wherein at least one of said plurality of bonding portions is located directly below said semiconductor element.

5. a circuit pattern provided on the upper surface of the heat dissipation base material via an insulating layer; a terminal that is held in a case that accommodates the semiconductor element and is electrically connected to the semiconductor element; the semiconductor element is provided on the circuit pattern, Each of the plurality of heat dissipation fins is joined to the lower surface of the heat dissipation base material at a plurality of joints provided between the plurality of peaks, 2. The semiconductor device according to claim 1, wherein at least one of the plurality of bonding portions is located directly below a bonding position between a metal wire bonded to the terminal and the circuit pattern, or directly below a bonding position between the terminal and the circuit pattern.

6. A cooling liquid flow path is provided on the lower surface of the heat dissipation base material so as to include the plurality of heat dissipation fins, and through which a cooling liquid flows for cooling the plurality of heat dissipation fins, 2 . The semiconductor device according to claim 1 , wherein the plurality of heat dissipation fins extend in a direction intersecting a direction in which the coolant flows in the coolant flow path.

7. a terminal that is held in a case that accommodates the semiconductor element and is electrically connected to the semiconductor element; 7. The semiconductor device according to claim 6, wherein said cooling liquid flows in a direction from a C-electrode provided as said terminal toward a P-electrode or an N-electrode.

8. 2. The semiconductor device according to claim 1, wherein the heat dissipation base material is joined to a case that houses the semiconductor element, and is sealed with a sealant that fills the inside of the case.

9. The semiconductor device according to claim 1 , wherein each of said plurality of peaks includes two or more constrictions.

10. Each of the plurality of heat dissipation fins is joined to the lower surface of the heat dissipation base material at a plurality of joints provided between the plurality of peaks, The semiconductor device according to claim 1 , wherein the plurality of bonding portions have a V-shape in a plan view.

11. The semiconductor device further includes a case that accommodates the semiconductor element and surrounds the outer periphery of the heat dissipation base material, The semiconductor device according to claim 1 , wherein the lower surface of the heat dissipation base is recessed further than a rear surface of the case.

12. The semiconductor device according to claim 1 , wherein at least one of two exterior angles formed between said lower surface of said heat dissipation base and each of said plurality of peaks is equal to or larger than 90°.

13. The semiconductor device according to claim 1 , wherein the semiconductor element is formed of a wide band gap semiconductor.

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