Semiconductor optical element

Abstract

To provide a semiconductor optical element excellent in high heat dissipation property and low stress property.SOLUTION: A semiconductor optical element comprises: a substrate; an optical function layer disposed on the substrate; a clad layer which is disposed on the optical function layer and in which a mesa structure part extending in a first direction is formed at least in a portion; and an upper surface electrode including a first electrode layer and a second electrode layer, which is thicker than the first electrode layer and disposed on the first electrode layer, and disposed on at least a portion of the clad layer. The semiconductor optical element includes: a mesa structure region in which the mesa structure part is formed; and a first adjacent region which is adjacent to the mesa structure part in a second direction which is vertical to the first direction in a planar view. The first electrode layer is disposed continuously from the mesa structure region to the first adjacent region. The second electrode layer includes a first portion disposed in the mesa structure region and a second portion disposed in the first adjacent region. The second portion includes a portion which is separated from the first portion in the second direction.SELECTED DRAWING: Figure 2A

Description

[Technical field]

[0001] The present invention relates to a semiconductor optical device. [Background technology]

[0002] One type of semiconductor optical element is known to have a mesa structure (ridge structure) for confining light and current. For example, as shown in Patent Document 1, the semiconductor optical element has electrodes formed to cover the top and side surfaces of the mesa structure. The electrodes are in contact with the semiconductor layer at the top of the ridge portion (mesa structure portion). The electrodes not only drive the semiconductor optical element, but also have the function of dissipating heat generated near the optical waveguide region in the semiconductor layer to the outside, which leads to improved characteristics. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2003-258370 A [Patent Document 2] JP 2010-238867 A Summary of the Invention [Problem to be solved by the invention]

[0004] The electrode of Patent Document 1 has a three-layer structure of titanium, platinum, and gold from the semiconductor layer side. Furthermore, the gold is thicker than the other two layers. Except for the vicinity of the end face of the ridge, the electrodes are arranged in all three layers from the top surface of the ridge to the side surface, the rising part of the ridge, and the flat end spreading in the direction away from the ridge. The electrode, which is a metal, and the optical waveguide region formed of semiconductor crystal have different thermal expansion coefficients. In particular, gold has a large thermal expansion coefficient and is thick, so it may give stress to the optical waveguide and fail to realize the characteristics as designed as a semiconductor optical element. Patent Document 2 shows a structure in which gold is arranged only on the upper part of the mesa structure. It is considered that this structure reduces the stress applied to the semiconductor layer compared to Patent Document 1. On the other hand, since gold has excellent heat dissipation properties, the heat dissipation properties of the structure of Patent Document 2 are inferior to those of Patent Document 1, and there is a risk that the designed characteristics cannot be realized.

[0005] An object of the present invention is to provide a semiconductor optical device that is excellent in heat dissipation and low stress. [Means for solving the problem]

[0006] A semiconductor optical device according to a first aspect of the present application includes a substrate, an optical functional layer disposed on the substrate, a cladding layer disposed on the optical functional layer and having a mesa structure portion extending in a first direction formed on at least a portion of the cladding layer, a first electrode layer, and a second electrode layer thicker than the first electrode layer and disposed on the first electrode layer, and an upper surface electrode disposed on at least a portion of the cladding layer, the semiconductor optical device including a mesa structure region in which the mesa structure portion is formed, and a first adjacent region adjacent to the mesa structure portion in a second direction perpendicular to the first direction in a planar view, the first electrode layer being disposed continuously from the mesa structure region to the first adjacent region, the second electrode layer including a first portion disposed in the mesa structure region and a second portion disposed in the first adjacent region, the second portion having a portion separated from the first portion in the second direction. [Brief description of the drawings]

[0007] [Figure 1]1 is an example of a top view of a semiconductor optical device according to a first embodiment. [Figure 2A] 2 is a schematic cross-sectional view taken along line IIA-IIA of the semiconductor optical integrated device shown in FIG. [Figure 2B] 2 is a schematic cross-sectional view taken along line IIB-IIB of the semiconductor optical integrated device shown in FIG. [Diagram 3] FIG. 2 is a schematic cross-sectional view taken along line IIA-IIA according to Modification 1 of the first embodiment. [Figure 4] 4 is an example of a top view of a semiconductor optical device according to a second modification of the first embodiment. FIG. [Diagram 5] 11 is a schematic cross-sectional view taken along line VV according to Modification 2 of the first embodiment. FIG. [Figure 6] 11 is an example of a top view of a semiconductor optical device according to a third modification of the first embodiment. FIG. [Figure 7] FIG. 7 is a schematic cross-sectional view taken along line VII-VII according to Modification 3 of the first embodiment. [Figure 8] FIG. 11 is a schematic cross-sectional view taken along line IIA-IIA according to Modification 4 of the first embodiment. [Figure 9] FIG. 11 is a schematic cross-sectional view taken along line IIA-IIA according to Modification 5 of the first embodiment. [Figure 10] FIG. 13 is a schematic cross-sectional view taken along line IIA-IIA according to Modification 6 of the first embodiment. [Figure 11] 1 is an example of a top view of a semiconductor optical device according to a second embodiment. [Figure 12] 12 is a schematic cross-sectional view taken along line XII-XII of the semiconductor optical integrated device shown in FIG. 11. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] Hereinafter, the embodiments of the present invention will be described in detail with reference to the drawings. In all the drawings, the same reference numerals are used to denote the same or equivalent functions, and the repeated description thereof will be omitted. Note that the size of the figures does not necessarily correspond to the magnification.

[0009] [First embodiment] FIG. 1 is a top view of a semiconductor optical device according to a first embodiment. FIG. 2A is a schematic cross-sectional view taken along line IIA-IIA in FIG. 1. FIG. 2B is a schematic cross-sectional view taken along line IIB-IIB in FIG. 1. The semiconductor optical device has a function of guiding, emitting, absorbing, amplifying, or modulating light. The semiconductor optical device may be a semiconductor laser, and the semiconductor laser may be a distributed feedback semiconductor laser. The semiconductor optical device may be a modulator-integrated optical semiconductor device (e.g., a modulator-integrated laser) in which a modulator section is monolithically integrated in a semiconductor laser. In the modulator-integrated laser, continuous light emitted by injecting a drive current into the laser section is modulated by the modulator section, and signal light is output. The modulator section may be an electroabsorption modulator. In the modulator-integrated laser, the electrode structure for realizing this embodiment may be in the laser section or in the modulator section.

[0010] The semiconductor optical element has a substrate 1. The substrate 1 may be a semiconductor substrate of a conductive type (for example, n-type). An optical functional layer 2 is formed on one surface of the substrate 1. When the semiconductor optical element is a semiconductor laser, the optical functional layer 2 functions as an active layer. When the semiconductor optical element is a modulator, the optical functional layer 2 functions as an absorption layer. The optical functional layer 2 may have a multiple quantum well structure or may be a bulk semiconductor layer. A cladding layer may be included between the substrate 1 and the optical functional layer 2. When no cladding layer is included, the substrate 1 functions as the lower cladding layer. A cladding layer 3 is formed on the upper surface of the optical functional layer 2. The cladding layer 3 is disposed on the optical functional layer 2, and at least a part of the cladding layer 3 has a mesa structure portion extending in a predetermined direction (hereinafter, the first direction D1). The cladding layer 3 is a layer having an effective refractive index smaller than that of the optical functional layer 2. The cladding layer 3 is a semiconductor layer of a conductive type (for example, p-type). A contact layer 4 is formed on the upper surface of the cladding layer 3. The contact layer 4 is in electrical and physical contact with the upper electrode 7 on the upper surface of the mesa structure portion described later. The optical function layer 2, the cladding layer 3, and the contact layer 4 are semiconductor layers. Other semiconductor layers, for example, optical confinement layers, may be included above and below the optical function layer 2. If the semiconductor optical element is a semiconductor laser, a diffraction grating layer may be included either above or below the optical function layer 2. The semiconductor layer may be, for example, an InP-based layer. Specifically, the substrate 1 and the cladding layer 3 are InP layers, the optical function layer 2 is InGaAsP or InGaAlAs, and the contact layer 4 is InGaAs. However, these are merely examples, and other materials may be used.

[0011] The semiconductor optical element includes a mesa structure region 10 in which a mesa structure is formed, a bank region 20 in which a bank region 20 having the same layer structure as the mesa structure is formed, and an adjacent region 30 adjacent to the mesa structure in a direction perpendicular to the first direction D1 in a plan view (hereinafter referred to as a second direction D2). Here, the mesa structure region 10 and the bank region 20 indicate only regions formed of semiconductor layers. The bank region 20 is on the opposite side of the adjacent region 30 from the mesa structure region 10. The adjacent region 30 is disposed on both sides of the mesa structure region 10 in the second direction. The bank region 20 is disposed adjacent to the adjacent region 30 on the opposite side of the mesa structure region 10. As shown in FIG. 2A and FIG. 2B, the bank region 20 and the adjacent region 30 are disposed on both sides of the mesa structure region 10. Hereinafter, when distinguishing between the bank region 20 and adjacent region 30 arranged on the right side and the bank region 20 and adjacent region 30 arranged on the left side, the bank region 20 and adjacent region 30 arranged on the right side will be referred to as the first bank region 20R and the first adjacent region 30R. Similarly, the bank region 20 and adjacent region 30 arranged on the left side will be referred to as the second bank region 20L and the second adjacent region 30L. The mesa structure and the bank include at least a cladding layer 3 and a contact layer 4. The position of the lower surface of the insulating film 5 (described later) provided in the adjacent region 30 is in the cladding layer 3 of the bank region 20, but is not limited thereto and may be located in another layer. As described later, an electric signal is input (current is injected) to the semiconductor layer through the contact layer 4 on the upper part of the mesa structure. The electric signal is transmitted to the optical function layer 2 on the lower part of the mesa structure. At this time, light is distributed around the optical function layer 2 in the stacking direction of the semiconductor layers (hereinafter referred to as the third direction D3). In the second direction D2 perpendicular to the third direction D3, the light is distributed around the mesa structure. The region in which the light is distributed is, in other words, an optical waveguide region.

[0012] An insulating film 5 is formed on the side surface of the mesa structure, through the adjacent region 30, and onto the upper surface of the bank region 20. The insulating film 5 is made of, for example, silicon oxide, and functions as a protective film for the semiconductor layer. The insulating film 5 is disposed so as to avoid the upper surface of the mesa structure.

[0013] An upper electrode 7 is provided on the upper surface of the mesa structure. A lower electrode 6 is formed on the opposite surface of the substrate 1 to the surface on which the upper electrode 7 is disposed. Here, the lower electrode 6 and the upper electrode 7 are metal films. The expressions "upper surface" and "lower surface" do not have a physical meaning, but merely indicate two electrodes connected to semiconductor layers of different conductivity types arranged to sandwich the optical function layer 2. Here, the electrode electrically connected to the cladding layer 3 is referred to as the upper electrode 7, and the electrode electrically connected to the substrate 1 is referred to as the lower electrode 6. For example, the lower electrode 6 may be connected to the substrate 1 on the surface on which the mesa structure is formed.

[0014] The upper electrode 7 includes a first electrode layer 71 and a second electrode layer 72 that is thicker than the first electrode layer 71 and is disposed on the first electrode layer 71, and is disposed on at least a part of the cladding layer 3. Specifically, the upper electrode 7 includes the first electrode layer 71 disposed on the side closer to the semiconductor layer, and the second electrode layer 72 disposed on the first electrode layer 71. The first electrode layer 71 is disposed continuously from the mesa structure region 10 to the first adjacent region 30R. For example, in this embodiment, the first electrode layer 71 has a two-layer structure in which Ti and Pt are laminated in this order from the semiconductor layer side. Ti is disposed for the purpose of improving the adhesion between the semiconductor layer (here, the contact layer 4) and the electrode layer disposed above the semiconductor layer, and forming an ohmic electrode. Pt is disposed to prevent the metal contained in the electrode layer disposed above the semiconductor layer from diffusing into the semiconductor layer. The first electrode layer 71 is not limited to two layers, and may be a laminate structure of three or more layers, and may contain metals other than Ti and Pt. The second electrode layer 72 is formed of a metal layer containing at least Au or an alloy thereof. The second electrode layer 72 is a layer thicker than the first electrode layer 71 in order to improve heat dissipation. The difference in thermal expansion coefficient and Young's modulus between the second electrode layer 72 and the semiconductor layer or the insulating film 5 causes stress to be applied to the semiconductor layer. As an example of the thickness of each layer, the first electrode layer 71 includes a 100 nm Ti layer and a 100 nm Pt layer, and has a total thickness of 200 nm. The second electrode layer 72 is an Au layer and has a thickness of 500 nm. The thickness of the three electrodes is only an example, and other thicknesses may be used. The thickness of the first electrode 71 is preferably, for example, 50 nm or more and 250 nm or less in total. The second electrode layer 72 is preferably 200 nm or more and 1000 nm or less. However, it is not limited to this.

[0015] The upper electrode 7 includes a pad portion 8 arranged on the upper part of the bank portion of the first bank region 20R for electrical connection with the outside. The pad portion 8 has a shape that is a combination of a substantially circular shape and a rectangular shape, but is not limited thereto. As shown in FIG. 2B, the pad portion 8 includes a first electrode layer 71 and a second electrode layer 72. The second electrode layer 72 of the pad portion 8 is separated from the second electrode layer 72 (a first portion 72a described later) on the upper surface of the mesa structure in the second direction D2. The rectangular region of the pad portion 8 is connected to a part of the upper electrode 7 arranged in the first adjacent region 30R. The electrode 7 is arranged to extend in the first direction D1 in which the mesa structure extends, except for the pad portion 8. Here, the electrode 7 is arranged in a shape that follows the mesa structure from the end face (the upper end of FIG. 1) of the semiconductor optical device to the other end face (the lower end of FIG. 1). The electrode 7 is arranged slightly inward from the end face (inward when viewed in the first direction D1 in FIG. 1), but may not necessarily be arranged to the end face. The upper electrode 7 may be arranged to extend to the upper surface of the bank portion.

[0016] As shown in FIG. 2A, the first electrode layer 71 is disposed from the upper surface of the mesa structure through the side surface of the mesa structure to a part of the adjacent region 30. As shown in FIG. 2A, an insulating film 5 is disposed between the first electrode layer 71 and the semiconductor layer (here, the cladding layer 3 and the contact layer 4) on at least a part of the side surface of the mesa structure. On the other hand, the second electrode layer 72 is disposed only on the upper surface of the mesa structure region 10 and a part of the adjacent region 30. In other words, the second electrode layer 72 includes a first portion 72a disposed in the mesa structure region 10 (upper surface of the mesa structure) and a second portion 72b disposed in the adjacent region 30. The second portion 72b is disposed in both the first adjacent region 30R and the second adjacent region 30L. That is, the second portion 72b has a portion separated from the first portion 72a in the second direction D2. One of the features of this embodiment is that the second electrode layer 72 is arranged to avoid the vicinity of the boundary between the adjacent region 30 and the mesa structure region 10 (the side surface of the cladding layer 3 included in the mesa structure portion, hereinafter referred to as the rising portion 40), and the first electrode layer 71 is arranged continuously from the upper surface of the mesa structure region 10 through the side surface of the mesa structure portion to the adjacent region 30. In other words, the second electrode layer 72 is arranged between the mesa structure region 10 and the adjacent region 30 while being spaced apart. Here, the first portion 72a and the second portion 72b have the same layer structure and the same thickness. The same thickness means that they are formed at the same time by the same process, and the thicknesses may be different within the range of manufacturing variations. However, without being limited thereto, the first portion 72a and the second portion 72b may have different layer structures or the same structure but different thicknesses.

[0017] The rising portion 40 indicates a region between the vertical surface (surface along the third direction D3) of the mesa structure and the end of the insulating film 5 arranged in the adjacent region 30 along the second direction D2 on the mesa structure side. The rising portion 40 is not limited to a right-angled shape. For example, it may include a curve or may be an inclined surface. The rising portion 40 is the portion where the upper electrode 7 and the optical waveguide region are closest to each other, and is also the portion where the shape of the semiconductor layer changes. Therefore, the stress applied to the rising portion 40 has a large effect on the semiconductor layer, especially the optical waveguide region. In this embodiment, the thick second electrode layer 72, which causes strong stress, is not arranged near the rising portion 40, so that the stress caused by the upper electrode 7 can be reduced. The reduction in the stress on the optical function layer 2 in the optical waveguide region contributes to improving the characteristics of the semiconductor optical device. The first portion 72a needs to be arranged together with the first electrode layer 71 to form electrical and thermal contact with the semiconductor layer at the top of the mesa structure. The second portion 72b has the effect of dissipating and uniforming the heat transferred from the optical function layer 2 in the waveguide direction, and contributes to improving the characteristics of the semiconductor optical device. If the second portion 72b is placed too far away from the mesa rising portion 40, the heat dissipation performance will be deteriorated. Here, the distance between the side surface of the second portion 72b on the mesa structure side and the side surface of the first electrode layer 71 arranged on the side surface of the mesa structure on the opposite side to the mesa structure side (the side surface facing the second portion 72b) is defined as W. From the viewpoint of achieving both stress reduction and heat dissipation, it is preferable that W is greater than 0 and equal to or less than the thickness of the second portion 72b. Here, the thickness of the second portion 72b is the thickness in the third direction D3.

[0018] The first electrode layer 71 is also disposed near the rising portion 40. From the viewpoint of stress reduction, it is preferable that the first electrode layer 71 is also spaced apart like the second electrode layer 72. However, the rising portion 40 is a region that generates a lot of heat, and the first electrode layer 71 is also disposed near the rising portion 40 to ensure heat dissipation. Here, "disposed near the rising portion 40" means that the first electrode layer 71 is disposed continuously and integrally from the side surface of the mesa structure to the upper surface of the insulating film 5 of the adjacent region 30. However, if the first electrode layer 71 is too thick, the effect of stress cannot be ignored, so the thickness of the first electrode layer 71 is preferably half or less the thickness of the second electrode layer 72.

[0019] In this embodiment, the second electrode layer 72 is spaced apart on both sides of the mesa structure region 10, but may be spaced apart only on one side. The spaced apart region (region in which the second electrode layer 72 of the adjacent region 30 is not arranged in the second direction D2) may be located only in a part of the direction in which the mesa structure of the semiconductor optical device extends (first direction D1). Spaced apart on one side includes a case in which the second portion 72b (excluding the pad portion 8) is not arranged on one side of the adjacent region 30, and the first portion 72a and the second portion 72b are continuous on the other side. The first portion 72a and the second portion 72b are continuous when W is 0. Furthermore, W does not necessarily have to be the same on the left and right sides of the mesa structure. For example, in FIG. 2A, W on the left side may be smaller or larger than W on the right side. However, considering the balance of the stress applied to the mesa structure between the left and right sides, it is preferable that W on the left and right sides be equal.

[0020] [Variation 1] 3 is a schematic cross-sectional view of the semiconductor optical device according to the first modification of the first embodiment taken along line IIA-IIA. The difference from the first embodiment is the shape of a first portion 72a disposed on the upper part of the mesa structure. The first portion 72a is disposed from the upper surface of the mesa structure to a part of the side surface of the mesa structure. However, the first portion 72a is spaced apart from the second portion 72b disposed in the adjacent region 30. This structure can promote heat dissipation from the side surface of the mesa structure while maintaining the effect of reducing stress.

[0021] [Variation 2] FIG. 4 is a top view of a semiconductor optical device according to Modification 2 of the semiconductor optical device of the first embodiment. FIG. 5 is a schematic cross-sectional view taken along line VV in FIG. 4. The semiconductor optical device of Modification 2 differs from the first embodiment only in the shape of the second electrode layer 72. In this modification, the second electrode layer 72 has a portion that continues from the upper surface of the mesa structure to the pad portion 8 in the second direction D2. In other words, a part of the second portion 72b is continuous with the first portion 72a. In other regions, the first portion 72a and the second portion 72b are separated from each other as in the first embodiment. Modification 2 has a uniform electrode structure from the pad portion 8 to the upper portion of the mesa structure, so that the electrical resistance is relatively uniform and is excellent in terms of high frequency characteristics.

[0022] [Variation 3] FIG. 6 is a top view of a semiconductor optical device according to Modification 3 of the semiconductor optical device of the first embodiment. FIG. 7 is a schematic cross-sectional view taken along line VII-VII in FIG. 6. The semiconductor optical device of Modification 3 differs from the first embodiment only in the shape of the second electrode layer 72. The shape of the second electrode layer 72 in the first adjacent region 30R and the first bank region 20R (right side) is the same as that in Modification 2 of the first embodiment. In Modification 3, the shape of the second electrode layer 72 in the second adjacent region 30L and the second bank region 20L (left side) is different from that in Modification 2. The second electrode layer 72 has a portion that continues from the first adjacent region 30R through the upper surface of the mesa structure to the second adjacent region 30L in the second direction D2. That is, the first portion 72a and the second portion 72b are also partially continuous in the second direction D2 in the second adjacent region 30L. In the first direction D1 in which the mesa structure extends, the length of the first portion 72a and the second portion 72b continuing is approximately the same on the left and right. As described above, in the case of a structure in which the first portion 72a and the second portion 72b are continuing in the second direction D2, the stress on the optical waveguide region increases. In the case of the structure of the modified example 2, the stress is large only on the right side of the mesa structure, and the stress balance is different between the left and right. On the other hand, in this modified example, the first portion 72a and the second portion 72b are continuing with the same width (length in the first direction D1) on the left side as well, and the stress balance between the left and right is better than that of the modified example 2. The effect of stress on the characteristics of the semiconductor optical element is not only the strength of the stress but also the balance of the stress, so that the modified example 3 has the effect of reducing the effect on the characteristics. Furthermore, since the second electrode layer 72, which has excellent heat dissipation properties, is arranged on a part of the side surface of the mesa structure, it is also excellent in terms of heat dissipation properties.

[0023] As described above, the first portion 72a and the second portion 72b do not necessarily need to be completely separated from each other over the entire area when viewed in a plan view, and the effects of the present invention can be obtained as long as they are separated in the second direction D2 in a portion of the direction in which the mesa structure extends. The larger the separation area is, the smaller the stress that the second electrode layer 72 applies to the semiconductor layer will be. Conversely, the smaller the separation area is, the better the heat dissipation properties will be. Preferably, the portion where the first portion 72a and the second portion 72b are separated in the second direction D2 is 50% or more, more preferably 80% or more, of the length in the first direction D1, to obtain good characteristics.

[0024] [Variation 4] FIG. 8 is a schematic cross-sectional view of a semiconductor optical device according to the fourth modification of the first embodiment taken along line IIA-IIA. The difference from the first embodiment is that an isolation groove 35 is formed in the adjacent region 30. The bottom surface of the isolation groove 35 extends beyond the cladding layer 3 and the optical function layer 2 to the substrate 1. The isolation groove 35 has an effect of confining a current injected into the mesa structure to a region (optical waveguide region) sandwiched between the two isolation grooves 35, for example, and contributes to improving the characteristics of the semiconductor optical device. In the fourth modification, the second portion 72b covers the side surface of the isolation groove 35 on the mesa structure side. In other words, the second portion 72b is formed continuously from the bottom surface of the adjacent region 30 on the mesa structure side to the bottom surface of the isolation groove 35. In the semiconductor optical device, the optical function layer 2 generates the most heat. On the side surface of the isolation groove 35 on the mesa structure side, the optical function layer 2 contacts the insulating film 5 without any other semiconductor layer. By arranging the second portion 72b, which has excellent heat dissipation properties, in this region, high heat dissipation properties can be ensured. As in the other modified examples, the second electrode layer 72 is arranged to avoid the vicinity of the rising portion 40, so that the above-mentioned stress reduction effect can also be obtained.

[0025] [Variation 5] FIG. 9 is a schematic cross-sectional view of a semiconductor optical device according to Modification 5 of the first embodiment taken along line IIA-IIA. The difference from the first embodiment is that the first electrode layer 71 is continuous from the upper surface of the mesa structure through the first adjacent region 30R to the upper surface of the bank. The end of the first electrode layer 71 and the end of the second portion 72b do not necessarily need to coincide. The second portion 72b may be disposed up to the upper surface of the bank, but the stress on the semiconductor layer increases. On the other hand, the amount of heat generated in the region away from the mesa structure is small, and the heat dissipation is sufficient if the first electrode layer 71 is disposed. Therefore, even if the second portion 72b (second electrode layer 72) is disposed up to the upper surface of the bank, the heat dissipation characteristics do not change much. On the other hand, the stress increases, so there is a risk of it affecting the characteristics. Modification 5 can improve the heat dissipation characteristics.

[0026] [Variation 6] FIG. 10 shows a schematic cross-sectional view of a semiconductor optical device according to the sixth modified example of the semiconductor optical device of the first embodiment taken along line IIA-IIA. The difference from the first embodiment is that the upper electrode 7 further includes a third electrode layer 73 layer that is disposed on the second electrode layer 72 and is thinner than the second electrode layer 72. The third electrode layer 73 has a two-layer structure of, for example, a Pt layer and an Au layer, but is not limited thereto. The third electrode layer 73 is thinner than the second electrode layer 72. The thickness of the third electrode layer 73 is preferably half or less than the thickness of the second electrode layer 72. More preferably, the total thickness of the first electrode layer 71 and the third electrode layer 73 is preferably half or less than the thickness of the second electrode layer 72. The third electrode layer 73 is continuous in the second direction from the upper surface of the mesa structure through the side surface of the mesa structure to the first adjacent region 30R. The present invention can be effective if the thickest layer of the multiple metal layers (electrode layers) is separated from a part between the upper surface of the mesa structure and the adjacent region 30.

[0027] [Second embodiment] Fig. 11 is a top view of the semiconductor optical device according to the second embodiment. Fig. 12 is a schematic cross-sectional view taken along line XII-XII in Fig. 11. The semiconductor layer structure of the semiconductor optical device according to this embodiment is the same as that of the semiconductor optical device according to the first embodiment. In this embodiment, the mesa structure 210 includes at least an optical function layer 2, a cladding layer 3, and a contact layer 4.

[0028] In this embodiment, the area other than the mesa structure area 210 where the mesa structure is provided is flat, and the second portion 72b is disposed in the flat end area (adjacent area). Note that a bank portion may be disposed as in the first embodiment. As in the first embodiment, the first portion 72a disposed on the top of the mesa structure and the second portion 72b disposed on the flat end area are spaced apart in the second direction D2, and the second electrode layer 72 is disposed to avoid the rising portion of the mesa structure. Therefore, the same effect as in the first embodiment is obtained. In particular, in the case of a structure in which the lower surface of the optical function layer 2 is disposed closer to the substrate 1 than the upper surface of the first electrode layer 71 as viewed from the substrate 1, the stress reduction effect is large.

[0029] The present invention achieves both high heat dissipation and low stress in a semiconductor optical device having a mesa structure. An embodiment of the present invention includes a first electrode layer disposed in contact with the mesa structure and a second electrode layer disposed on the first electrode layer. The first electrode layer is disposed continuously from the upper surface of the mesa structure to an adjacent region, and the second electrode layer is disposed on the upper surface of the mesa structure and the adjacent region, but this is achieved by separating the first portion disposed on the upper surface of the mesa structure from the second portion disposed in the adjacent region. The first portion and the second portion are discontinuous in an area of ​​50% or more, preferably 80% or more, in a first direction D1 in which the mesa structure extends. The first electrode layer is thinner than the second electrode layer. The second portion of the second electrode layer disposed in the adjacent region is not connected to the first electrode layer on the side surface of the mesa structure and is disposed at a position equal to or less than the thickness of the second portion from the side surface of the first electrode layer. The mesa structure includes at least a cladding layer disposed on an upper portion of an optical function layer. The mesa structure may include an optical function layer. [Explanation of symbols]

[0030] 1 Board 2. Optical functional layer 3 Cladding layer 4 Contact layer 5. Insulating film 6 Bottom electrode 7 Top electrode 71 1st electrode layer 72 Second electrode layer 72a Part 1 72b Part 2 73 Third electrode layer 8 Pad section 10 Mesa structure area 210 Mesa Structure Area 20 Bank Area 20R 1st bank area 20L Second bank area 30 Adjacent Areas 30R First adjacent region 30L Second adjacent area 35 Isolation groove 40 Rising part D1 1st direction D2 2nd direction D3 Third direction

Claims

1. A substrate; An optical function layer disposed on the substrate; a cladding layer disposed on the optical function layer, the cladding layer having a mesa structure portion at least partially formed therein and extending in a first direction; a top electrode including a first electrode layer and a second electrode layer thicker than the first electrode layer and disposed on the first electrode layer, the top electrode being disposed on at least a portion of the cladding layer; Equipped with a mesa structure region in which the mesa structure is formed; a first adjacent region adjacent to the mesa structure in a second direction perpendicular to the first direction in a plan view; Including, the first electrode layer is disposed continuously from the mesa structure region to the first adjacent region, the second electrode layer includes a first portion disposed in the mesa structure region and a second portion disposed in the first adjacent region; The second portion has a portion spaced apart from the first portion in the second direction.

2. 2. The semiconductor optical device according to claim 1, In a portion where the first portion and the second portion are separated from each other, A semiconductor optical element, wherein the distance between the side of the second portion facing the mesa structure and the side of the first electrode layer arranged on the side of the mesa structure facing the second portion is greater than 0 and smaller than the thickness of the second portion.

3. 2. The semiconductor optical device according to claim 1, The first portion is disposed on a part of a side surface of the mesa structure.

4. 2. The semiconductor optical device according to claim 1, a bank region in which a bank portion having the same layer structure as the mesa structure portion is formed on the opposite side of the first adjacent region from the mesa structure portion, the upper electrode includes a pad portion in the bank region; the second electrode layer has a portion that continues in the second direction from an upper surface of the mesa structure to the pad portion.

5. 2. The semiconductor optical device according to claim 1, a second adjacent region adjacent to the mesa structure on the opposite side to the first adjacent region; the second electrode layer has a portion that continues in the second direction from the first adjacent region, through an upper surface of the mesa structure, to the second adjacent region.

6. 2. The semiconductor optical device according to claim 1, a portion where the first portion and the second portion are separated in the second direction is 50% or more of the length in the first direction.

7. 2. The semiconductor optical device according to claim 1, a region in which the first portion and the second portion are separated from each other in the second direction is 80% or more of the length in the first direction.

8. 2. The semiconductor optical device according to claim 1, the first adjacent region further includes an isolation trench having a bottom surface in the substrate; The second portion is disposed on a side surface of the isolation groove on the side of the mesa structure.

9. 2. The semiconductor optical device according to claim 1, a bank region in which a bank portion having the same layer structure as the mesa structure portion is formed on the opposite side of the first adjacent region from the mesa structure portion, the first electrode layer is continuous from the top surface of the mesa structure through the first adjacent region to the top surface of the bank portion.

10. 10. The semiconductor optical device according to claim 9, The second electrode layer is not disposed on an upper surface of the bank portion.

11. 2. The semiconductor optical device according to claim 1, the top electrode further includes a third electrode layer disposed on the second electrode layer and thinner than the second electrode layer; the third electrode layer is continuous in the second direction from an upper surface of the mesa structure to the first adjacent region.

12. 2. The semiconductor optical device according to claim 1, The mesa structure further includes the optical function layer.

13. 13. The semiconductor optical device according to claim 12, A semiconductor optical device, wherein a lower surface of the optical function layer is closer to the substrate than an upper surface of the first electrode layer disposed in the first adjacent region.

14. 2. The semiconductor optical device according to claim 1, The second electrode layer comprises Au.

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