Electric element testing device and electric element testing method

Abstract

To address the necessity of manufacturing connection jigs in accordance with various standards for element terminal pitches and the number of element terminals of electric elements.SOLUTION: A printed-circuit board 183a and a printed-circuit board 183b include contact patterns 161 with widths W and S formed thereon. The printed-circuit board 183a and the printed-circuit board 183b are so formed that the contact pattern surfaces face each other, and the element terminals 226 are sandwiched between the contact patterns. An electric element 101a has a first terminal pitch, an electric element 101b has a second terminal pitch, and an electric element 101c has the first terminal pitch and the second terminal pitch. The electric element 101a is connected to the contact pattern 161 of width S by bringing a central element terminal into contact therewith, the electric element 101b is connected to the contact pattern 161 of width S by bringing an end element terminal into contact therewith, and all of the element terminals of the electric element 101c are brought into contact with and connected to the contact pattern 161 of width W.SELECTED DRAWING: Figure 7

Description

Technical Field

[0001] The present invention relates to semiconductor devices such as IGBT, SiC, GaO, Ga 2 O 3 , GaN, IGBT, MOS-FET, Gan-FET, bipolar transistors, thyristors, diodes, triacs, posistors, thermistors, etc., resistance elements, coils, crystal elements, capacitor and other electrical elements, semiconductor device (electrical element) test apparatus for performing cycle tests on electrical elements, semiconductor device (electrical element) evaluation apparatus, power cycle test apparatus (power cycle tester), semiconductor device (electrical element) test method, semiconductor device (electrical element) evaluation apparatus or evaluation method, power cycle test (power cycle test) method, and the like. As shown in FIGS. 42 and 43, the present invention can be applied to a variety of electrical elements (semiconductor devices, electrical components, electronic components) 101.

[0002] Further, the present invention relates to a mechanism, structure, mounting device, mounting method, mounting procedure, and mounting method for making electrical connection with terminals of a semiconductor device during testing of the semiconductor device.

[0003] The present invention provides a semiconductor device (electrical element) test apparatus and a test / evaluation method for a semiconductor device (electrical element) that can efficiently reproduce stress close to the failure mode in the actual use environment and actual use state of the semiconductor device and can evaluate and test power semiconductor devices with high accuracy. The present invention provides a method, structure, and test apparatus for easily mounting, removing, and replacing electrical elements and semiconductor devices to be tested.

Background Art

[0004] The life of a power semiconductor device includes the life due to the thermal fatigue phenomenon caused by the heat generation of the power semiconductor device itself and the life due to the thermal fatigue phenomenon caused by the temperature change in the external environment of the power semiconductor device. In addition, there is a life due to voltage fatigue caused by the applied voltage to the gate insulating film of the power semiconductor device.

[0005] Generally, in the life test of a power semiconductor device, the power semiconductor device is repeatedly energized and turned off. A voltage is applied to the emitter terminal (source terminal), collector terminal (drain terminal), etc. of the power semiconductor device, and a test current is passed through. By applying a periodic on / off signal (operation / non-operation signal) to the base terminal (gate terminal), tests of electrical devices and semiconductor devices are carried out.

[0006] The current applied to the semiconductor device during the test is as large as several hundred amperes. Therefore, in order to avoid heat generation and voltage drop, low-resistance connection wiring, etc. is required. Also, there are many types of tests, and it is necessary to change the connection of the connection wiring according to the type of test. It took a long time for connection wiring changes, etc.

[0007] It is necessary to conduct tests on semiconductor devices (electrical devices) according to the usage environment (temperature, humidity). However, it is not easy to generate the usage environment (temperature, humidity) in a short time, and it is difficult to appropriately arrange the semiconductor device (electrical device) in the usage environment (temperature, humidity).

Prior Art Documents

Patent Documents

[0008]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0009] Since the constant current applied to test a semiconductor device such as a transistor is a current of several hundred A or more, it is necessary to use a thick wire material with low resistance for the connection wiring. Also, it is necessary to make a connection with a low resistance value in close proximity to the element terminal 226 of the semiconductor device.

[0010] Thick connection wiring is hard and has no flexibility. Changing the connection of the thick wire connection wiring when corresponding to test items requires a long time. Also, it is necessary to make a connection to the element terminal 226 that does not change over time.

[0011] Therefore, in order to test the transistor, changing the connection of the wiring corresponding to the test items requires a long time. There is a problem that the test apparatus becomes large because a work space for connection change is required.

[0012] Also, it was difficult to appropriately arrange the semiconductor element (electric element) in the usage environment (temperature, humidity). Also, it was difficult to accurately attach many electric elements.

[0013] Also, there are various standards for the element terminal pitch and the number of element terminals of the electric element, and there is a problem that it takes time and cost to manufacture and prepare the connection jig according to the standard. If the contact resistance of the contact portion with the element terminal is high, heat generation occurs at the contact portion with the element terminal, and there is a problem that the semiconductor element is destroyed.

Means for Solving the Problem

[0014] On the printed circuit board 183a and the printed circuit board 183b, a contact pattern 161 with a width W and a contact pattern 161 with a width S are formed. The printed circuit board 183a and the printed circuit board 183b are arranged with their contact pattern surfaces facing each other, and the element terminals 226 of an electric element etc. (electronic component, electric component, electronic element, electric element, transistor, power transistor, power semiconductor, power electric element) 101 are pinched between the contact patterns.

[0015] The semiconductor element (electric element) 101a has terminals with a first terminal pitch interval, and the semiconductor element (electric element) 101b has terminals with a second terminal pitch interval. The semiconductor element (electric element) 101c has terminals with both the first terminal pitch and the second terminal pitch intervals.

[0016] As shown in FIG. 2 and the like, the semiconductor element (electrical element) 101a connects by bringing the central element terminal into contact with the contact pattern 161 having a width S, the semiconductor element (electrical element) 101b connects by bringing the end element terminal into contact with the contact pattern 161 having a width S, and all of the element terminals of the semiconductor element (electrical element) 101c are connected by bringing them into contact with the contact pattern 161 having a width W.

[0017] Also, as shown in FIG. 16 and the like, by using a pressing (metal) tool with the same width of two contact surfaces and a pressing (metal) tool with different widths of two contact surfaces, an electrical connection is made with the semiconductor element (electrical element) 101 having a different element terminal 226 pitch.

[0018] In a conventional semiconductor element test apparatus, a printed circuit board was fabricated according to the shape of the semiconductor element to be tested for mounting the semiconductor element to be tested. Also, the element terminals of the semiconductor element were screwed and fixed so as to be in contact with the pattern of the printed circuit board.

[0019] However, in the conventional method, it is necessary to fabricate a printed circuit board for each semiconductor element to be tested, which requires time and cost. If a printed circuit board is fabricated corresponding to the terminal shape and terminal pitch of each semiconductor element, it is difficult to test various semiconductor elements.

[0020] As shown in FIG. 7, the present invention fabricates a standard printed circuit board. Two types of pattern widths (W, S), or three types of pattern widths (W1, W2, S) are formed on the standard printed circuit board. The pattern widths are arranged periodically, and the element terminals of the semiconductor element are sandwiched and fixed between two printed circuit boards. Also, as shown in FIG. 18 and the like, the element terminals of the semiconductor element are clamped with pressing (metal) tools 351 and 352 having different shapes, electrically connected, and the semiconductor element is held.

Effect of the Invention

[0021] There are various standards for the pitch between element terminals and the number of element terminals of a semiconductor element (electrical element). Making a connection jig to be tested according to the standard is time-consuming and costly. The present invention can be accurately and low-resistively attached to a semiconductor element (electrical element) test apparatus even if the inter-terminal pitch and the number of element terminals of the element terminal 226 are different.

Brief Description of the Drawings

[0022]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13

Figure 14

Figure 15

Figure 16

Figure 17

Figure 18

Figure 19

Figure 20

Figure 21

Figure 22

Figure 23

Figure 24

Figure 25

Figure 26

Figure 27

Figure 28

Figure 29

Figure 30

Figure 31

Figure 32

Figure 33

Figure 34

Figure 35

Figure 36

Figure 37

Figure 38

Figure 39

Figure 40

Figure 41

Figure 42

Figure 43

Figure 44

Figure 45

Figure 46

Figure 47

Figure 48

Figure 49

Figure 50

Figure 51

Figure 52

Figure 53

Figure 54

Figure 55

Figure 56

Figure 57

Figure 58

Figure 59

Figure 60

Figure 61

Figure 62

Figure 63

Figure 64

Figure 65

Figure 66

Figure 67

Figure 68

Figure 69

Figure 70

Figure 71

Figure 72

Figure 73

Figure 74

Figure 75

Figure 76

Figure 77

Embodiments for Carrying Out the Invention

[0023] Hereinafter, with reference to the accompanying drawings, a test apparatus and a test method for an electrical element according to an embodiment of the present invention will be described.

[0024] The present invention relates to a test of an electrical element, and particularly to IGBT, SiC, GaO, Ga 2 O 3、This relates to a test apparatus for semiconductor devices such as GaN, IGBT, MOS-FET, Gan-FET, bipolar transistors, thyristors, diodes, etc., and electrical components such as capacitors and resistors, as well as test, evaluation, and inspection methods.

[0025] In the embodiments described in the specification, among the semiconductor devices (electrical components), mainly IGBT is exemplified for explanation, but it is not limited thereto. It is not limited to IGBT and can be applied to various semiconductor devices and electrical components such as SiC transistors, MOSFETs, JFETs, thyristors, diodes, thermistors, and posistors. Also, transistors, etc. can be either P-channel or N-channel.

[0026] In the specification and drawings of the present application, for example, the drain terminal, source terminal, and gate terminal are names or symbols such as the first terminal, second terminal, third terminal, etc. Also, the collector terminal, emitter terminal, and base terminal are names or symbols such as the first terminal, second terminal, third terminal, etc.

[0027] In FIG. 10 and the like, the symbol D is used as the collector terminal or drain terminal, the symbol S is used as the source terminal or emitter terminal, and the symbol G is used as the gate terminal or base terminal. Also, when the direction of the current flowing between channels is not specified particularly, it can be either direction. For example, the names of the drain terminal and source terminal can be changed. The names of the collector terminal and emitter terminal can be changed. The names of the gate terminal and base terminal can be changed.

[0028] In FIG. 10, FIG. 12, etc., when the transistor etc. (electronic component, electrical component, electronic device, electrical device, power transistor, power semiconductor, power electrical device) 101 is an N-channel IGBT, when an off voltage is applied to the gate terminal (base terminal), no current flows between the channels (collector-emitter or drain-source) of the transistor 101, and when an on voltage is applied to the gate terminal (base terminal), current flows between the channels of the transistor 101.

[0029] The direction of the current flow is from the drain terminal (collector terminal) towards the source terminal (emitter terminal). When the transistor 101 is a P-channel transistor, current flows according to the voltage applied to the gate terminal (base terminal) in accordance with the characteristics of the P-channel transistor. When the transistor 101 is a MOS transistor, it is bidirectional between the drain terminal (collector terminal) and the source terminal (emitter terminal).

[0030] In the embodiments of the present invention, the control terminal for turning the transistor on or off is described as the gate terminal (G), but it goes without saying that the gate terminal (G) may be read as the base terminal (B). The gate terminal (G) and the base terminal (B) are terminals to which a signal for turning the transistor 101 on or off is applied. Also, it goes without saying that the collector terminal (C) and the emitter terminal (E) may be read as the source terminal (S), the drain terminal (D), etc. In the present invention, the terminals of the semiconductor element (electrical element) are considered in terms of the terminal pitch and terminal arrangement, rather than the technical meaning and operation.

[0031] In this embodiment, the semiconductor element (electrical element) 101 may be a single unit as shown in FIG. 42, or may be a semiconductor element (electrical element) module in which a plurality of semiconductor elements (electrical elements) are combined as shown in FIGS. 43(a) to 43(e). As shown in FIGS. 42 and 43, the present invention can be applied to a wide variety of electrical elements etc. (semiconductor elements, electrical components, electronic components) 101.

[0032] The semiconductor element (electrical element) 101 or the test (evaluation) component 117 is included in the concept of the semiconductor element (electrical element) 101 or the test (evaluation) component 117 even if it has a configuration with a heat sink attached, a configuration with a heat pipe attached, etc.

[0033] In the embodiments of the present invention, the base terminal (B) will also be described as the gate terminal (G). The terminal for controlling the on / off of a transistor or the like will be described as the gate terminal, and in some cases, the circuit connected to the gate terminal or the like may be described as a gate drive circuit or the like.

[0034] In the present invention, an N-channel power transistor will be exemplified as the semiconductor element (electrical element) 101 for description, but it is not limited thereto. It may be a P-channel power transistor. Also, it is not limited to a power transistor, and it may be a transistor for small signals. Further, it may be a combination of an N-channel transistor and a P-channel transistor.

[0035] The test apparatus for the electrical element (semiconductor element) and the test method for the electrical element (semiconductor element) of the present invention may be any type of transistor such as a MOS type or a bipolar type as shown in FIGS. 42(a) to 42(i). Also, the transistor may be an N-channel or a P-channel. Needless to say, in addition to semiconductor elements such as diodes (FIG. 42(g)), thyristors (FIG. 42(h)), triacs (FIG. 42(i)), etc., the present invention can also be applied to electrical components such as resistors (FIG. 42(i)), capacitors, coils, relays, crystal oscillators (FIG. 42(k)), etc.

[0036] The present invention is not limited to semiconductor elements. Needless to say, the present invention can also be applied to electrical elements other than semiconductors such as resistance elements, capacitors, coils, crystal elements, thermistors, potentiometers, ZNRs, etc.

[0037] The object to be tested by the test apparatus for the electrical element (semiconductor element) of the present invention is not limited to a single element such as a semiconductor element or an electrical element. For example, as shown in FIG. 43, it goes without saying that semiconductor elements and electrical elements in which a plurality of elements are configured as a module can be inspected or tested.

[0038] Figures 43(a1) and (a2) are transistors incorporating diode Di. Figures 43(b1) and (b2) are semiconductor modules in which Figures 43(a1) and (a2) are connected in series. Further, Figures 43(c1) and (c2) are configuration diagrams of modules in which Figures 43(a1) and (a2) are electrically connected by external connection wiring. Figures 43(d1) and (d2) are configuration diagrams of modules having terminals of temperature measurement diodes D (Ds, Dm). Figures 43(e1) and (e2) are configuration diagrams of a module formed by externally connecting transistors having terminals of temperature measurement diodes D (Ds, Dm). The present invention can be applied to any of these semiconductor elements (electrical elements) 101, semiconductor elements (electrical elements) 101, and test (evaluation) components 117.

[0039] In each of the drawings for explaining the embodiments for carrying out the invention, elements having the same function or similarity are denoted by the same reference numerals. Matters unnecessary for the description are omitted in the drawings, the specification, etc.

[0040] Also, for ease of explanation, the drawings, etc. are simplified or schematized. Also, matters, parts, and other matters unnecessary for the description in each embodiment, and matters identical or similar to those of other embodiments may be omitted from the description. Also, cases may occur where descriptions of parts similar or the same as those of other embodiments are omitted.

[0041] In this specification and the drawings, parts, regions, and descriptions unnecessary for the description may be omitted, and illustrations may also be omitted. Also, each embodiment can be combined in whole or in part. Also, the embodiments of the present invention can be combined with each of the embodiments, and can also be implemented with some modifications.

[0042] TO package (Transistor Outline) Transistor Outline was developed as a package for transistors. Currently, it is used in a wide range of devices from various ICs, sensors, to passive components.

[0043] The package materials include metal, ceramic, and plastic. There are various types of packages for semiconductors (such as ICs and transistors), such as TO (Transistor Outline) and SOT (Small Outline Transistor). Furthermore, there are various types of packages starting with "TO (Transistor Outline).

[0044] There are various package names starting with TO, which are expressed by combining TO with numbers. For example, "TO-92 used for small-power transistors, etc.", "TO-220 used for components with relatively high heat dissipation", "TO-247 which is even larger than TO-220", etc.

[0045] TO-92 is a package for insertion mounting with a lead pitch (distance between leads, terminal pitch) of 1.27 mm. The type with a longer package is called "TO-92MOD". TO-92 may also be denoted as "TO-226AA" in JEDEC standard. TO-92 is used for "3-terminal devices such as transistors and thyristors" and "ICs with a small number of leads such as voltage regulators", etc.

[0046] The main advantages of TO-92 are low manufacturing cost and small size. However, since it does not have a structure that can dissipate much heat, it cannot be used when the power consumption becomes large.

[0047] TO-252 is a package that can be surface-mounted by forming leads. It has various names such as DPAK, PPAK, and SC-63. The lead pitch of TO-252 is 1.27 mm. Similar to TO-92, TO-252 is used for "3-terminal devices such as transistors and thyristors" and "ICs with a small number of leads such as voltage regulators", etc.

[0048] TO-220 is an insertion-mounting package with a lead pitch (distance between leads) of 2.54 mm. It has a metal tab (tab frame) for attachment to a heat sink.

[0049] Since TO-220 has screw holes at the top of the package, it can be screwed to the heat sink. Therefore, it is used for components with a relatively large amount of heat dissipation. Also, there are two types of mounting parts for the heat sink: a "metal package" and a "fully molded package covered with plastic". The fully molded product is designated as TO-220FM. TO-202 is an insertion-mounting package with a lead pitch (distance between leads) of 2.54 mm. It has a flat metal tab (tab frame) on the back.

[0050] TO-263 has a lead pitch (distance between leads) of 2.54 mm and is a package with a smaller metal tab than TO-220. Usually, the leads are formed so that it can be surface-mounted. There are packages with 3 pins, 5 pins, and 7 pins.

[0051] TO-218 is an insertion-mounting package. There are packages with 2 to 5 pins. The lead pitch (distance between leads) varies depending on the number of pins. It has a flat metal tab (tab frame) on the back. For transistors TO-247, TO-3P, and TO-264, which are larger than TO-220, the lead pitch (distance between leads) is 5.45 mm.

[0052] TO-247 is an insertion-mounting package with a lead pitch (distance between leads) of 5.45 mm. It is a package used for components with a large amount of heat dissipation and TO-247 is similar in shape to TO-3P.

[0053] TO-3P is an insertion-mounting package with a lead pitch (distance between leads) of 5.45 mm. It is a package used for components with a large heat dissipation amount, and TO-3P is similar in shape to TO-247. TO-264 is an insertion-mounting package with a lead pitch (distance between leads) of 5.45 mm. The number of pins ranges from 2 to 5 pins.

[0054] There are various package names starting with TO, which are expressed by combining TO with numbers. For example, "TO-92 used for small-power transistors, etc.", "TO-220 used for components with a relatively large heat dissipation amount", "TO-247 which is even larger than TO-220", etc.

[0055] The present invention mainly exemplifies and describes a test apparatus or test method for testing or evaluating transistors in a TO package. For ease of explanation and illustration, the TO package is exemplified and described using TO220, TO247, and TO247-4. However, the present invention is not limited thereto. Needless to say, it can also be applied to other packages such as TO3P and TO264, and device shapes.

[0056] Figure 1 is a configuration diagram and explanatory diagram of a test apparatus for an electrical element (semiconductor element) of the present invention. In an embodiment of the present invention, the TO package is exemplified and described using TO220 (TO-220), TO247 (TO-247), and TO247-4 (TO-247-4).

[0057] The TO220 package is an insertion-mounting package with an element terminal of 2.54 mm. There is a metal tab (tab frame) for attachment to a heat sink. The number of pins includes 3-pin, 5-pin, and 7-pin ones, but in this specification, etc., the 3-pin one is exemplified and described.

[0058] TO247 is an insertion mounting package with a lead pitch (distance between leads) of 5.45 mm. In the three-terminal package (TO-247) of TO-247, the inductance component of the source terminal causes a decrease in the gate voltage, resulting in a delay in the switching speed. The four-terminal package (TO247-4) can separate the power source terminal and the driver source terminal.

[0059] A Kelvin emitter connection is added to the TO247-4 pin package. These four pins are also known as Kelvin emitter terminals, which can bypass the emitter lead inductance on the gate control loop, improve the switching speed of the IGBT, and reduce the switching energy.

[0060] As shown in FIG. 1, TO220 and TO247 have different element terminal pitches (lead pitch, pitch between terminals), and TO247 and TO247-4 have different element terminal numbers and element terminal pitches (pitch between terminals). Therefore, they are exemplified and described in the present invention.

[0061] The present invention is characterized in that packages with different element terminal 226 pitches (pitch between terminals) and different element terminal 226 numbers (number of terminals) can be electrically connected well. The printed circuit board 183 or the like that makes an electrical connection with the element terminals has a left-right line symmetric shape (configuration), etc., and a plurality of pattern widths or pattern pitches are arranged or formed according to the type of terminal arrangement pitch of the electrical element (semiconductor element) 101.

[0062] In the embodiments of the present invention, the printed circuit board 183 is exemplified and described, but it is not limited thereto. The printed circuit board 183 may be a flexible board or the like.

[0063] In addition, it is preferable to use a printed circuit board 183 obtained by attaching a flexible film having a circuit pattern formed on the surface of a copper plate, an aluminum plate, or a stainless steel plate. The copper plate, aluminum plate, and stainless steel plate are rigid and do not deform due to the pressing of the pressing head 322, and can favorably sandwich the lead pins 226 (element terminals, lead terminals, connection portions). Further, it is preferable to attach or arrange a copper plate, an aluminum plate, or a stainless steel plate on the back surface of the flexible film on which the circuit pattern is formed, and to cause the copper plate, aluminum plate, or stainless steel plate to exhibit a heat dissipation function. Further, it is preferable to arrange a heat sink on the back surface or the like of the printed circuit board 183.

[0064] In FIG. 1, as an example, the distance between terminals a is 2.54 mm, and the distance between terminals b is 5.45 mm. TO220 has three element terminals (lead terminals, number of terminals), and the pitch (lead pitch, distance between terminals) of the element terminals 226 is 2.54 mm. TO247 has three element terminals (lead terminals, distance between terminals), and the pitch (lead pitch, distance between terminals) of the element terminals is 5.45 mm. TO247-4 has four element terminals (lead terminals), and the pitch (lead pitch, distance between terminals) between the drain terminal (D) and the source terminal (S1) is 5.45 mm, and the pitch (distance between terminals) of the other three element terminals is 2.54 mm. The present invention is characterized in that it has a configuration and specifications that enable simultaneous testing or the like of semiconductor elements (electrical elements) having different element terminal pitches.

[0065] As shown in FIG. 2 and the like, a plurality of shaped contact patterns 161 are formed on the printed circuit board 183. In the embodiment of FIG. 2, contact patterns 161 having widths W1, W2, and S are formed. The width of the contact pattern is determined in consideration of the pitch and number of the terminals 226 of the semiconductor element (electrical element) 101 to be mounted or attached. As an example, the contact pattern 161 is a copper foil having a thickness of 120 μm or more.

[0066] FIG. 2 is an explanatory diagram schematically showing the position completion between the terminal 226 position and the contact pattern 161, illustrating the TO220 package 101a, the TO247 package 101b, and the TO247-4 package 101c for ease of understanding.

[0067] The package shapes such as the TO220 package 101a, the TO247 package 101b, and the TO247-4 package 101c, and the arrangement of the element terminals 226 are examples. Needless to say, the present invention can be applied and implemented with other package shapes and arrangements of the element terminals 226.

[0068] As an example, the contact pattern 161 is a pattern in which the contact pattern 161a with width W1, the contact pattern 161b with width S, the contact pattern 161c with width W2, and the contact pattern 161d with width S are periodically repeated. The width W2 is approximately twice the width W1, and the width W1 is designed to be approximately twice the width S. Alternatively, the pitch of the contact pattern 161 has a relationship of twice each.

[0069] In the embodiment of FIG. 2(a), the element terminal 226g of the TO220 package (101a) is connected to the contact pattern 161a. The element terminal 226d of the TO220 package (101a) is connected to the contact pattern 161b. The element terminal 226s of the TO220 package (101a) is connected to the contact pattern 161c.

[0070] In the embodiment of FIG. 2(b), the element terminal 226g of the TO247 package (101b) is connected to the contact pattern 161a. The element terminal 226d of the TO247 package (101b) is connected to the contact pattern 161b. The element terminal 226s of the TO247 package (101b) is connected to the contact pattern 161c.

[0071] In the embodiment of FIG. 2(c), the device terminal 226d of the TO247-4 package (101c) is connected to the contact pattern 161b. The device terminals 226s1 and 226s2 of the TO247-4 package (101c) are connected to the contact pattern 161c. The device terminal 226s of the TO247-4 package (101c) is connected to the contact pattern 161d.

[0072] As shown in FIGS. 2(a), 2(b), and 2(c), in the electronic device 101 (TO220 package (101a), TO227 package (101b), TO247-4 package (101c)), the drain terminal 226d is connected to the contact pattern 161d. Therefore, since the contact pattern 161 for positioning the device terminal 226d is specified as the contact pattern 161b, it is easy to position and mount the electronic device 101.

[0073] For ease of understanding, FIG. 2 is shown separated into FIGS. 2(a), 2(b), and 2(c). However, in the embodiment, as shown in FIG. 3, a set of the contact pattern 161a, the contact pattern 161b, the contact pattern 161c, and the contact pattern 161d is repeatedly formed and arranged on the printed circuit board 183.

[0074] As shown in FIG. 3 and as shown in FIG. 2, the device terminals 226 of each semiconductor device (electronic device) 101 (semiconductor device (electronic device) 101a, semiconductor device (electronic device) 101b, semiconductor device (electronic device) 101c) are connected or arranged to each contact pattern 161. The contact pattern 161 of the printed circuit board 183 is formed such that the contact pattern 161 is targeted for the left and right lines.

[0075] The embodiment of FIG. 3 was a pattern in which the contact pattern 161a with width W1, the contact pattern 161b with width S, the contact pattern 161c with width W2, and the contact pattern 161d with width S were periodically repeated. The present invention is not limited to this.

[0076] FIG. 3 shows the case where there are three semiconductor elements (electrical elements) 101, but the invention of the present application is not limited thereto. Needless to say, the semiconductor element (electrical element) may have any configuration as long as a contact pattern 161 capable of mounting two or more elements is formed.

[0077] In the embodiment of FIG. 4, the contact pattern 161 is a pattern in which the contact pattern 161a with width W, the contact pattern 161b with width S, the contact pattern 161c with width S, and the contact pattern 161d with width W are periodically repeated. The width W is approximately twice the width S, or the pitch of the contact pattern 161 has a relationship of approximately twice.

[0078] In the embodiment of FIG. 4, the element terminal 226g of the TO220 package (101a) is connected to the contact pattern 161a. The element terminal 226d of the TO220 package (101a) is connected to the contact pattern 161b. The element terminal 226s of the TO220 package (101a) is connected to the contact pattern 161c.

[0079] The element terminal 226g of the TO247 package (101b) is connected to the contact pattern 161a. The element terminal 226d of the TO247 package (101b) is connected to the contact pattern 161b. The element terminal 226s of the TO247 package (101b) is connected to the contact pattern 161d.

[0080] The element terminal 226d of the TO247-4 package (101c) is connected to the contact pattern 161b. The element terminals 226s1 and 226s2 of the TO247-4 package (101c) are connected to the contact pattern 161d.

[0081] The element terminal 226s of the TO247-4 package (101c) is connected to the contact pattern 161e. The contact pattern 161 on the printed circuit board 183 is formed so as to be symmetric with respect to the left and right lines.

[0082] The embodiment of FIG. 5 is configured such that the contact pattern 161 forms or arranges widths S and W. The contact pattern 161 is a pattern in which the contact pattern 161a with width W, the contact pattern 161b with width S, the contact pattern 161c with width W, and the contact pattern 161d with width W are periodically repeated. The width W is approximately twice the width S, or the pitch of the contact pattern 161 is in an approximately two-fold relationship.

[0083] In the embodiment of FIG. 5(a), the element terminal 226g of the TO220 package (101a) is connected to the contact pattern 161a with width W. The element terminal 226d of the TO220 package (101a) is connected to the contact pattern 161b with width S. The element terminal 226s of the TO220 package (101a) is connected to the contact pattern 161c with width W.

[0084] In the embodiment of FIG. 5(b1), the element terminal 226g of the TO247 package (101b) is connected to the contact pattern 161b with width S. The element terminal 226d of the TO247 package (101b) is connected to the contact pattern 161c with width W. The element terminal 226s of the TO247 package (101b) is connected to the contact pattern 161d with width W.

[0085] As shown in the embodiment of FIG. 5(b2), for the TO247 package (101b), the element terminal 226g of the TO247 package (101b) is connected to the contact pattern 161a with width W. The element terminal 226d of the TO247 package (101b) is connected to the contact pattern 161c with width S. The element terminal 226s of the TO247 package (101b) is connected to the contact pattern 161d with width W.

[0086] As shown in FIG. 5(c), the device terminal 226d of the TO247-4 package (101c) is connected to the contact pattern 161a. The device terminals 226s1 and 226s2 of the TO247-4 package (101c) are connected to the contact pattern 161d. The device terminals 226s1 and 226s1 of the TO247-4 package (101c) are connected to the contact pattern 161e. The device terminal 226g of the TO247-4 package (101c) is connected to the contact pattern 161d. The contact pattern 161 of the printed circuit board 183 is formed such that it is symmetric with respect to the left and right lines.

[0087] In the embodiment of FIG. 6, the device terminals 226 of each semiconductor device (electrical device) 101 (semiconductor device (electrical device) 101a, semiconductor device (electrical device) 101b, semiconductor device (electrical device) 101c) are connected or arranged to each contact pattern 161. The contact pattern 161 of the printed circuit board 183 is formed such that it is symmetric with respect to the left and right lines. The embodiment of FIG. 6 is a pattern in which the contact pattern 161 with width W and the contact pattern 161 with width S are periodically repeated. The present invention is not limited to this.

[0088] Note that FIG. 6 shows the case where there are three semiconductor devices (electrical devices) 101, but the present invention of the present application is not limited to this. Needless to say, the semiconductor device (electrical device) 101 may have any configuration as long as a contact pattern 161 capable of mounting two or more is formed.

[0089] As shown in FIG. 7, on the printed circuit board 183a, the contact patterns 161 (contact pattern 161a, contact pattern 161b, contact pattern 161c, contact pattern 161d) are formed or arranged.

[0090] The embodiment of FIG. 7 illustrates and shows, as an example, the arrangement of the contact pattern 161 in FIG. 6, but the present invention is not limited thereto. For example, the arrangement of the contact pattern 161 in FIGS. 3, 4, etc. may also be used. The above matters are the same in other embodiments of the present invention.

[0091] As shown in FIG. 7, the contact pattern 161c has a pattern width of S (narrow contact pattern 161), and the contact patterns 161a, 161b, and 161d have a pattern width of W (wide contact pattern 161).

[0092] The pattern width S and the pattern width W correspond to (depend on) the pitch of the element terminals (lead pins) of the semiconductor element (electrical element) 101. Also, based on this. The semiconductor element (electrical element) 101 to be tested or evaluated by the test apparatus of the present invention has two types of terminal pitches, so the contact pattern 161 or the pitch of the contact pattern 161 also constitutes two types. Note that the present invention of the present application is not limited to "two types". Needless to say, the embodiments of the present invention can be applied even if there are "three types" or more.

[0093] The printed circuit board 183 is not limited to a wiring board such as a glass epoxy board, a phenolic board, or a paper board. Any pattern or member that forms or constitutes a pattern that contacts the element terminal 226, such as a configuration in which a contact pattern 161 made of a conductor such as a copper foil or a copper plate is formed on a plate or a sheet, may be used. Needless to say, a flexible board or a flexible sheet may also be used.

[0094] For ease of explanation, the pattern width S and the pattern width W are described as the widths of the contact pattern 161, but the present invention is not limited thereto. The gap (spacing) between the contact pattern 161 and the contact pattern 161 may be added and expressed as the pitch distance between the pattern terminals. Also, as shown in FIG. 1, it may be the interval a or the interval b between the element terminals (lead pins) 226. The pattern width and the interval are not limited to two types, and may be three types or more. On the printed circuit board 183 of the present invention, a plurality of pattern widths or pitches between pattern terminals of the contact pattern 161 are formed or arranged.

[0095] At the upper end of the printed circuit board 183a, the contact pattern 161 is formed or arranged. The contact pattern and the element terminal 226 of the semiconductor element (electrical element) 101 are in electrical contact and also connected. Further, they are fitted and held.

[0096] At the lower end of the printed circuit board 183a, the connection pattern 104 is formed or arranged. The connection pattern 104 is connected to the contact pattern 161. The output terminal of the power supply device 132 etc. is connected to the connection pattern 104, and a test current Id or a test voltage Vd is applied to the semiconductor element (electrical element) 101.

[0097] For the printed circuit boards 183a and 183b, the contact patterns 161 are arranged symmetrically about the center line (CC') in Fig. 7(b). The contact pattern of the printed circuit board 183 has a symmetrical configuration.

[0098] In Fig. 7(a), the contact pattern 161 and the connection pattern 104 are formed or configured on the surface of the printed circuit board 183a. In Fig. 7(b), the contact pattern 161 is formed or configured on the back surface of the printed circuit board 183b. Therefore, as shown in Fig. 8, by overlapping the printed circuit board 183a and the printed circuit board 183b and clamping, pressing, fitting, etc. the element terminal 226 of the semiconductor element (electrical element) 101, the semiconductor element (electrical element) 101 can be held, maintained, connected, etc.

[0099] The thin contact pattern 161c of the printed circuit board 183b is disposed facing the thin contact pattern 161c of the printed circuit board 183a. The contact pattern 161d of the printed circuit board 183b is disposed facing the contact pattern 161a of the printed circuit board 183a. The contact pattern 161c of the printed circuit board 183b is disposed facing the contact pattern 161b of the printed circuit board 183a. The contact pattern 161b of the printed circuit board 183b is disposed facing the contact pattern 161c of the printed circuit board 183a. The contact patterns 161 are arranged periodically. In the embodiment of FIG. 7, a set consisting of three thick contact patterns and one thin contact pattern is arranged or formed periodically.

[0100] As shown in FIG. 7(a), the three element terminals 226 of the semiconductor element (electric element) 101a (TO220) have a pitch of 2.54 mm, and the central element terminal 226d is disposed in the thin contact pattern 161c. The element terminals 226g on the left and right of the element terminal 226d are disposed in the thick contact pattern 161b, and the element terminal 226s is disposed in the thick contact pattern 161d.

[0101] As shown in FIG. 7(a), the three element terminals 226 of the semiconductor element (electric element) 101b (TO247) have a pitch of 5.45 mm. The central element terminal 226d is disposed in the thick contact pattern 161d. The element terminals 226d and 226g on the left are disposed in the thin contact pattern 161c, and the element terminal 226s on the right is disposed in the thick contact pattern 161a.

[0102] As shown in FIG. 7(a), the four element terminals 226 of the semiconductor element (electric element) 101c (TO247-4) have a mixed pitch of 5.45 mm and 2.54 mm. The central element terminal 226d is disposed in the thick contact pattern 161d. The element terminals 226d and 226g on the left are disposed in the thin contact pattern 161c, and the element terminal 226s on the right is disposed in the thick contact pattern 161a.

[0103] The element terminals 226s1 and 226s2 are commonly arranged on the thick contact pattern 161d. The other element terminals 226g with a 2.54 mm pitch are arranged on the thick contact pattern 161a adjacent to the thick contact pattern 161d. The leftmost element terminal 226d has a 5.45 mm pitch and is arranged on the thick contact pattern 161b adjacent to the thin contact pattern 161c.

[0104] As described above, by periodically forming the thin contact pattern 161 and the thick contact pattern, it is possible to connect to and hold semiconductor elements (electrical elements) 101 with various element terminal pitches (terminal-to-terminal distances) and the number of element terminals.

[0105] As described above, for the three element terminals 226 of the semiconductor element (electrical element) 101b (TO247), the element terminal located in the center is arranged on the thin contact pattern 161, and the element terminals located on the left and right are arranged on the thick contact pattern 161 arranged adjacent to or formed adjacent to the thin contact pattern 161.

[0106] For the three element terminals 226 of the semiconductor element (electrical element) 101b (TO247), one element terminal 226 is arranged on the thin contact pattern 161, and the other element terminals 226 are arranged on different thick contact patterns 161.

[0107] For the four element terminals 226 of the semiconductor element (electrical element) 101c (TO247-4), the adjacent element terminals 226 are arranged on the common thick contact pattern 161, and the other two element terminals 226 are arranged on different thick contact patterns 161.

[0108] By forming or configuring the contact pattern width in two types, it is possible to connect semiconductor elements (electrical elements) 101 (semiconductor elements (electrical elements) 101a, semiconductor elements (electrical elements) 101b) with different element terminal pitches and semiconductor elements (electrical elements) 101c having a plurality of element terminal pitches. Also, as shown in FIGS. 7(a) and 7(b), by forming or arranging the contact pattern 161 symmetrically with respect to the center line cc', the printed circuit board 183 can be used after being turned over.

[0109] By maintaining the positional relationship between the contact pattern 161 and the element terminal 226 described above, various semiconductor elements (electrical elements) 101 can be mounted and arranged. Also, tests and evaluations can be carried out.

[0110] In the above embodiments, the case where there are two types of terminal (between) pitches was described, but the case where there are three or more types of terminal pitches can be similarly applied. For example, when there are two types of terminal pitches, the width of the contact pattern 161 is made into three types. Or the formation pitch of the contact pattern is made into three types. Different contact patterns are formed or configured periodically.

[0111] On the surface of the contact pattern 161, protruding convex portions with a diameter of 0.2 mm or more and 1.0 mm or less are formed by plating technology, nail head bump technology, printing technology, etc. The convex portions come into contact with the element terminal 226, and the electrical contact property with the element terminal 226 is improved. Also, uneven portions are formed by laser processing.

[0112] As shown in FIG. 8, an electrical element (semiconductor element) 101 is sandwiched or arranged between the printed circuit board 183a and the printed circuit board 183b. Spaces depending on the thickness of the element terminal 226 are held or configured in the printed circuit board 183a and the printed circuit board 183b. Heat generated between the contact pattern 161 and the element terminal 226 is dissipated by injecting cooling air or air (gas) at a predetermined temperature, etc. by a cooling fan 227 (cooler 227), etc. into this space. The air passes from the arrow A to the arrow B in the upward direction. The air (gas) is preferably nitrogen or dry air.

[0113] A liquid or gel may be formed or disposed between the printed circuit board 183a and the printed circuit board 183b, and the liquid or gel may be used to cool or maintain, vary, or cool the temperature at a predetermined value. The above also applies to air (gas).

[0114] FIG. 11 is a configuration diagram and explanatory diagram of a test method and a test apparatus for connecting and testing (evaluating) the semiconductor element (electrical element) 101 of the present invention. For ease of explanation and understanding, the transistor is exemplified and described as the semiconductor element (electrical element) 101. However, the semiconductor element (electrical element) 101 is not limited to a transistor. Other semiconductor elements such as thyristors and diodes may be used, or other elements such as thermistors, potentiometers, and resistance elements may be used.

[0115] As one embodiment, in FIG. 11, n (n is a positive number of 1 or more) semiconductor elements (electrical elements) 101 are connected. A group of a plurality of semiconductor elements (electrical elements) 101 is referred to as a test component (inspection component, evaluation component, inspection element, semiconductor element, electrical element, electrical component, electronic component, etc.) 117 or an evaluation component 117.

[0116] The test component 117 or the evaluation component 117 is composed of a plurality of transistors or the like, but is not limited to a plurality. The switch circuit 124 mounted on the switch circuit board 201 is turned on and off to supply or stop the test current Id. As shown in FIGS. 42 and 43(a), it may be composed of one semiconductor element (electrical element) 101.

[0117] Semiconductor elements (electrical elements) 101, etc. to be tested by the test apparatus of the present invention, as shown in FIGS. 42(a), (b), (c), and (d), the semiconductor element (electrical element) 101 or the test component 117 is exemplified by a MOS transistor or a field effect transistor. As shown in FIGS. 42(e) and (f), an IGBT transistor or an IGBT transistor having a diode is exemplified. As shown in FIGS. 42(g), (h), and (i), semiconductor elements such as diodes, thyristors, and triacs, and as shown in FIG. 42(j), a resistance element, a BJT element, and a thermistor element are exemplified. Further, as shown in FIG. 42(k), electrical elements such as a crystal oscillator and a capacitor are exemplified.

[0118] As the test component 117 and the semiconductor element (electrical element) 101 to be tested or evaluated by the semiconductor element (electrical element) test apparatus of the present invention, a variety of semiconductor elements and semiconductor modules as shown in FIG. 43 are applicable. The semiconductor element (electrical element) 117(101) in FIG. 43 has terminal P electrode terminals, O electrode terminals, and N electrode terminals to which a large current is applied or output. FIG. 43 is a schematic view and an equivalent circuit diagram of a semiconductor element. FIGS. 43(a1) and (a2) have a configuration having one transistor 101 and a diode Di.

[0119] FIGS. 43(b1) and (b2) have a configuration having transistors 101 (transistor 101m, transistor 101s) and diodes Di (diode Dim, diode Dis).

[0120] FIGS. 43(c1) and (c2) show a configuration in which a plurality of transistors are connected and tested by connecting the terminals of a semiconductor element having a transistor 101 (transistor 101m or transistor 101s) and a diode Di (diode Dim or diode Dis).

[0121] FIGS. 43(d1) and (d2) have a configuration having a transistor 101 (transistor 101m, transistor 101s) and a diode D (diode Ds, diode Dm) having terminals independent of the terminals of the transistor.

[0122] Figure 43(e1)(e2) shows a configuration in which a plurality of transistors are connected and tested by connecting the terminals of a semiconductor device having a diode D (diode Dm or diode Ds) having terminals independent of the transistor 101 (transistor 101m or transistor 101s) and the terminals of the transistor.

[0123] In FIG. 11, one power supply device 132 is illustrated. The power supply device 132 is not limited to one unit. For example, in the semiconductor device test apparatus of the present invention, two or more power supply devices 132 may be provided. The more the number of power supply devices 132 increases, the more various current waveforms Id can be generated. The same applies to the embodiments of the present invention.

[0124] In the embodiments of the present invention, the device for supplying the test current Id or the like is described as the power supply device 132, but the power supply device 132 is not limited to one that outputs a constant current. Needless to say, it may be a device that supplies a test voltage.

[0125] The power supply device 132 is not limited to one unit. For example, in the semiconductor device (electrical device) test apparatus of the present invention, two or more power supply devices 132 may be provided. Also, one power supply device 132 configured to be able to output two test voltages or test currents may be used. The more the number of power supply devices 132 increases, the more various waveforms of test current Id, test voltage Vd, etc. can be generated. In the embodiments of the present invention, the power supply device 132 is not limited to one that outputs a predetermined current Id or a test voltage Vd.

[0126] For example, a power supply device 132 that can set a maximum (limit) voltage or a maximum current is used. It is exemplified that it functions to output a predetermined constant current at the set maximum voltage under certain conditions. Also, when outputting the constant current Id, it is exemplified that the output terminal voltage can be set to a predetermined maximum voltage.

[0127] As shown in FIG. 41, a power supply wiring 212 is connected to the power supply device 132, and a switch circuit 122 is connected or arranged on the power supply wiring 212. The switch circuit 122 is mounted or arranged on a switch circuit board 201. By turning on (closing) the switch circuit 122, a test current Id is supplied to the electrical element 117 to be tested. By turning off (opening) the switch circuit 122, the test current Id to the test component 117 (semiconductor element (electrical element) 101) to be tested is stopped.

[0128] The switch circuit 122 or the switch circuit 124 is mounted or arranged on a switch circuit board 201 made of a printed circuit board. A conductor plate (copper bar) 204 is mounted or arranged on the switch circuit board 201.

[0129] The test current Id is output after checking whether each electrical connection is established. For example, the electrical connection between the fork plug 205 and the conductor plate 204, the electrical connection between the fork connector 528 and the conductor plate 204, the electrical connection between the connector 202 and each terminal of the semiconductor element 117, etc. are exemplified. Also, depending on the pressing state of the contact switch 529, it is configured to be able to check whether an electrical connection is established.

[0130] As shown in FIGS. 27 and 28, a mounting plate (component positioning plate) 324 is arranged on the printed circuit board 183. The mounting plate 324 has insertion holes 372 formed or arranged corresponding to the element terminals 226 of the semiconductor element (electrical element) 101. The mounting plate 324 positions the semiconductor element (electrical element) 101.

[0131] The mounting plate 324 is made of or formed of an insulator. Examples of the constituent or forming material include ceramic, bakelite, and engineering plastic. Also, an example is an insulator formed by forming an insulating film or the like on the surface of a conductor such as a metal plate.

[0132] The source terminal (S) of the transistor of the semiconductor element (electrical element) 101 is connected to the drain terminal (D) of the transistor in the next stage. An (insulated type) gate driver 107 is connected to the gate terminal (G) of the transistor. The input terminal (In) and the output terminal (Out) of the gate driver are insulated. A plurality of gate drivers 107 are formed or arranged in the gate driver circuit 113.

[0133] FIG. 10 is an explanatory diagram in which a part of FIG. 11 and the like is detailed. The gate driver 107 has a light-emitting element 402 and a light-receiving element 403. Depending on the signal of the input terminal 401, the light-emitting element 402 emits light or turns off, and the emitted light is received by the light-receiving element 403. The light-emitting part and the light-receiving part are insulated. Since the light-emitting driver Dt and the light-receiving driver Dr are insulated, the potential levels of the input part (In) and the output part (Out) can be arbitrarily set.

[0134] The potential Es1 of the source terminal of the transistor 101(1) varies depending on the potential Ed2 of the drain terminal of the transistor 101(2). The potential Es2 of the source terminal of the transistor 101(2) varies depending on the potential Ed3 of the drain terminal of the transistor 101(3).

[0135] Since the light-emitting driver Dt and the light-receiving driver Dr are insulated, the potential levels of the input part (In) and the output part (Out) can be arbitrarily set. Therefore, since the potential Vs1 of the output part of the gate driver 107(1) can be arbitrarily set, the Out potential based on the potential Es1 of the source terminal can be set. The voltage Vd1 generates a voltage based on the voltage Vs1 and applies it to the gate driver 107(1).

[0136] Since the potential Vs2 of the output part of the gate driver 107(2) can be arbitrarily set, the Out potential based on the potential Es2 of the source terminal can be set. The voltage Vd2 generates a voltage based on the voltage Vs2 and applies it to the gate driver 107(2).

[0137] Also, since the potential Vs3 of the output section of the gate driver 107(3) can be arbitrarily set, the Out potential can be set with reference to the potential Es3 of the source terminal. The voltage Vd3 generates a voltage with reference to the voltage Vs3 and is applied to the gate driver 107(3).

[0138] The gate driver circuit 113 (gate driver 107) has a variable resistance circuit 125. The resistance value R of the variable resistance circuit 125 can be varied between 0 (Ω) and 500 (Ω). Also, the gate driver circuit 113 is configured to be able to be set to a constant voltage or a voltage that changes over time.

[0139] The variable resistance circuit 125 is not limited to a variable resistor and may be a fixed resistance circuit that exhibits a fixed value of resistance or the like. It may also be a resistance element, electrical component, etc. that combines other elements such as diodes.

[0140] The gate driver circuit 113 is configured to be able to be set (output) to a voltage that changes over time periodically. In the case of a fixed resistance element, it is handled by replacing the resistance element.

[0141] It has a voltage measurement circuit (not shown) that measures the voltage across both ends of the resistance value R. The voltage measurement circuit can measure the leakage current flowing through the gate terminal (G) of the transistor 101, etc. The leakage current is measured both when the transistor 101 is in the on state and when it is in the off state.

[0142] A resistor R (not shown) may be arranged between the gate terminal (G) and the source terminal (S), or the drain terminal (D) of the transistor 101. By adjusting the value of the resistor R of the variable resistance circuit 125, the slope angles of the voltage waveforms at the rising and falling edges of the gate signal can be adjusted and set.

[0143] The gate driver circuit 113 can set the slope (rise time Tr) of the rising waveform and the slope (fall time Td) of the falling waveform of the gate voltage Vg applied to the gate terminal (G) of the transistor 101. By adjusting the rise time Tr and the fall time Td separately, the on-time and on-characteristics of the transistor 101 can be controlled to predetermined values.

[0144] As described above, in the electrical element test apparatus and test method of the present invention, the resistance value of the variable resistance circuit 125 connected to the gate terminal of the transistor 101, or the rise time / fall time of the gate driver circuit 113 can be controlled, adjusted, or set.

[0145] In FIG. 1 and the like, although the resistance value R of the variable resistance circuit 125 of the gate driver circuit 113 is assumed to be variable, the present invention is not limited thereto. For example, it goes without saying that the variable resistance circuit 125 may be a fixed resistance element of an external resistor, and this resistor may be connected to the gate terminal (G) of the transistor 101 using a connector (not shown) or the like. As shown in FIG. 12, the test apparatus of the present invention includes a mounting plate (component positioning plate) 324 for positioning the semiconductor element (electrical element) 101.

[0146] FIG. 27(a) shows that insertion holes 372 for inserting three types of semiconductor elements (electrical elements) 101 (semiconductor element (electrical element) 101a, semiconductor element (electrical element) 101b, semiconductor element (electrical element) 101c) are formed or configured in the mounting plate 324. The mounting plate 324 prepares a plurality of insertion holes 372 that differ according to the type of the semiconductor element (electrical element) 101 to be tested, and replaces them according to the test.

[0147] By forming the insertion holes 372, by inserting the lead pins (element terminals) of the semiconductor element (electrical element) into the insertion holes 372, and by mounting the mounting plate 324, a large number of semiconductor elements (electrical elements) 101 can be accurately positioned simultaneously. Also, it is easy to simultaneously attach and detach a large number of semiconductor elements (electrical elements) 101.

[0148] FIG. 27(a) shows that an insertion hole 372a for inserting the element terminal 226 of the semiconductor element (electric element) 101a is formed, an insertion hole 372b for inserting the element terminal 226 of the semiconductor element (electric element) 101b is formed, and an insertion hole 372c for inserting the element terminal 226 of the semiconductor element (electric element) 101c is formed.

[0149] FIG. 27(b) shows that insertion holes 372 for inserting the element terminals 226 of three semiconductor elements (electric elements) 101a (semiconductor element (electric element) 101a1, semiconductor element (electric element) 101a2, semiconductor element (electric element) 101a3) are formed or arranged.

[0150] FIG. 27(c) shows that insertion holes 372 for inserting the element terminals 226 of one semiconductor element (electric element) 101a and two semiconductor elements (electric elements) 101b (semiconductor element (electric element) 101b1, semiconductor element (electric element) 101b2) are formed or arranged.

[0151] Insertion holes 372 are formed or arranged in the mounting plate 324 in accordance with the terminal positions and terminal pitches of the semiconductor elements (electric elements) 101. As shown in FIG. 12, by providing the insertion holes 372, positioning can be achieved at the contact pattern 161 positions described in FIG. 7.

[0152] As shown in FIG. 12, the package portion (P) of the semiconductor element (electric element) 101 is loaded on the mounting plate 324, and is arranged in a specified manner, and the element terminals 226 of the semiconductor element (electric element) 101 are inserted downward from the mounting plate 324. Therefore, the length of the element terminal 226 protruding downward from the mounting plate 324 can be regulated to a constant value.

[0153] FIG. 27 shows a configuration in which three semiconductor elements (electrical elements) 101 are arranged on the mounting plate 324. FIG. 28 shows a configuration in which four or more semiconductor elements (electrical elements) 101 are arranged on the mounting plate 324. The present invention can arrange and attach the number and position of the semiconductor elements (electrical elements) 101 mounted on the mounting plate 324 to match the contact pattern 161 by defining the position and number of the insertion holes 372 formed in the mounting plate 324.

[0154] FIG. 28(a) shows an embodiment in which a plurality of sets are formed with the insertion hole 372a for inserting the element terminal 226 of the semiconductor element (electrical element) 101a, the insertion hole 372b for inserting the element terminal 226 of the semiconductor element (electrical element) 101b, and the insertion hole 372c for inserting the element terminal 226 of the semiconductor element (electrical element) 101c as one set.

[0155] FIG. 28(b) shows an embodiment in which a plurality of sets are formed or arranged with two semiconductor elements (electrical elements) 101c and the insertion hole 372 for inserting the element terminal 226 of one semiconductor element (electrical element) 101c as one set. FIG. 28(c) shows an embodiment in which the insertion hole 372 for inserting the element terminal 226 of the semiconductor element (electrical element) 101c is formed or arranged.

[0156] As shown in the above embodiments, by forming or arranging the insertion holes 372 in accordance with the number of semiconductor elements (electrical elements) 101 to be tested, the terminal positions of the semiconductor elements (electrical elements) 101, and the terminal pitch on the mounting plate 324, it is possible to accurately position at the contact pattern 161 position described in FIG. 7. Further, since the positioning of the semiconductor element (electrical element) 101 only requires inserting the semiconductor element (electrical element) 101, it is easy and can be carried out quickly.

[0157] As shown in FIG. 12, the package portion (P) of the semiconductor element (electrical element) 101 is defined and arranged by the mounting plate 324, and the element terminals 226 of the semiconductor element (electrical element) 101 are inserted downward from the mounting plate 324. Therefore, the length of the element terminal 226 protruding downward from the mounting plate 324 can be regulated to a constant value.

[0158] In the embodiments of FIGS. 10, 11, 12, etc., although no diodes are shown in the transistor 101, temperature measuring diodes may be formed or arranged as shown in FIGS. 42(e) and 42(f).

[0159] FIG. 13 shows an embodiment in which a temperature measuring diode is formed or arranged. The constant current circuit 118 supplies a constant current Ic to the diode Di arranged or formed between the channels of the transistor 101. The operational amplifier (buffer) circuit 116 buffers (lowers the output impedance) the terminal voltage of the diode Di and outputs it as the Vi voltage. The Vi voltage is subjected to analog-digital conversion by the temperature measurement circuit 115.

[0160] As shown in FIGS. 42(e) and 43(d)(e), a temperature measuring diode may be provided separately. Needless to say, a temperature sensor 391 may be arranged in the package or the like of the semiconductor element (electrical element) 101, and temperature information Tj may be obtained from the temperature sensor 391.

[0161] As shown in FIGS. 13 and 41, the terminal voltage Vi of the diode Di is applied to the temperature measurement circuit 115. The temperature measurement circuit 115 obtains the temperature information Tj of the transistor 101 from the terminal voltage Vi and transfers it to the controller circuit (substrate) 111. The temperature information is output from the connector 213 of the device control circuit board 209 to the mother board 207 and sent to the controller circuit (substrate) 111. The gate driver circuit 113 applies a set frequency (on-off period) and a set on-voltage to the gate terminal of the transistor 101.

[0162] The constant current circuit 118 passes a predetermined constant current Ic. The constant current Ic is applied to the diode Di. When the temperature of the transistor 101 changes, the terminal voltage of the diode Di changes. By monitoring the terminal voltage of the diode Di, the temperature change of the transistor 101 can be measured or observed.

[0163] The diode Di may be a diode of another semiconductor chip mounted on the semiconductor chip on which the transistor 101 is formed. The diode Di may utilize a parasitic diode formed secondarily when the transistor 101 is formed.

[0164] To prevent the transistor 101 from generating heat due to the constant current Ic, the constant current Ic is set to a current value sufficiently smaller than the constant current Id flowing through the channel of the transistor 101.

[0165] Specifically, the constant current Ic is set to 1 / 1000 or less of the test current Id flowing through the transistor 101 during the test. Preferably, the current Ic flowing through the transistor 101 is 1×10 6 of 1 or more and 1×10 4 of 1 or less. The constant current Ic is 0.1 mA or more and 100 mA or less.

[0166] The channel current (test current) Id is changed, the diode Di voltage (collector-emitter terminal voltage of the transistor 101) is measured, and the temperature coefficient K is obtained. The obtained temperature coefficient K is stored in the temperature measurement circuit 115.

[0167] The temperature coefficient K is obtained by setting the transistor 101 to a predetermined temperature with the heating and cooling plate 134 and passing the constant current Ic through the diode Di to measure the terminal voltage. Preferably, the heating and cooling plate 134 sandwiches the semiconductor element (electrical element) 101 such as a transistor from above and below. By sandwiching and arranging, the semiconductor element (electrical element) 101 can be maintained at a predetermined temperature to conduct the test. The heating and cooling plate 134 has at least one of the functions of heating or cooling.

[0168] By changing the predetermined temperature and measuring the terminal voltage of the diode Di, the terminal voltage of the diode Di with respect to the temperature of the transistor 101 can be obtained. Therefore, the temperature coefficient K of the transistor 101 can be obtained from the terminal voltage of the diode Di with respect to the temperature.

[0169] The constant current Ic is passed through the diode Di when the channel current Id is not flowing. That is, when the transistor 101 is not on, the constant current Ic is passed and the terminal voltage of the diode Di is measured. The operational amplifier circuit (buffer circuit) 116 outputs the terminal voltage Vi (drain terminal (D)-source terminal (S), collector terminal (C)-emitter terminal (E)) of the diode Di.

[0170] The operational amplifier circuit 116 is not limited to being composed of an operational amplifier element. Any circuit may be used as long as its output impedance is lower than its input impedance.

[0171] The temperature measurement circuit 115 obtains the temperature information Tj of the transistor 101 under test from the held temperature coefficient K and the voltage Vi. The obtained temperature information Tj is sent to the controller circuit board (controller) 111.

[0172] When the temperature information Tj becomes equal to or higher than a predetermined set value, the controller circuit board (controller) 111 determines that the transistor 101 is in a predetermined stress state or a deteriorated state, and performs control change of the test, stop of the test, etc.

[0173] The selection circuit 404 selects which gate driver 107 to apply the on voltage (selection voltage) to. The selected gate driver 107 is not limited to one. Any plurality of gate drivers 107 may be selected.

[0174] The selected gate driver 107 outputs an on-voltage to the gate terminal of the transistor 101, and a test current Id flows between the channels of the transistor 101. For example, when the gate drivers 107(2) and 107(3) are selected, an on-voltage is applied to the gate terminals (G) of the transistors 101(2) and 101(3).

[0175] The buffer circuit 406 is formed or arranged with a buffer circuit 116 that measures or acquires the voltage between the channels of each transistor 101. The selection circuit 405 selects the output of one buffer circuit 116 and outputs it to the temperature measurement circuit 115.

[0176] When a test current Id is applied to the transistor 101, the semiconductor element (electrical element) 101 (transistor 101) generates heat, and as the heat is generated, the temperature information Tj changes (the Vi voltage changes) along with the heat generation of the channel or the like. Also, when the test current Id is stopped, the temperature of the channel or the like rises due to heat dissipation, and the temperature information Tj changes. As an example, the temperature information Tj is equivalent to the voltage between the channels.

[0177] When a test current Id is supplied to the transistor 101, the heat generation increases as the deterioration of the transistor progresses. The heat generation is indicated by the temperature information Tj or is correlated with the temperature. The temperature information Tj is correlated with (depends on) the voltage between the channels of the transistor.

[0178] When stress is applied to the transistor 101 by a test, the Vds voltage (drain terminal - source terminal) or Vce voltage (collector terminal - emitter terminal) of the transistor 101 changes, and usually changes in the direction of increasing the temperature information Tj. The temperature information Tj is the Vds voltage (drain terminal - source terminal) or Vce voltage (collector terminal - emitter terminal) of the transistor 101.

[0179] The temperature information Tj is, for example, the inter-channel voltage Vi (drain terminal - source terminal, collector terminal - emitter terminal) of the transistor 101. As the transistor 101 deteriorates, the temperature rises and the rate of increase also becomes faster. Or, when a diode is arranged or formed between the channels, it is the voltage between the terminals of the diode. The inter-channel voltage generates a terminal voltage by passing a constant current Ic between the channels or through the diode. In the test method for the semiconductor element (electrical element) 101 of the present invention, the test is terminated under any of the following conditions. · When the temperature information Tj deviates from the predetermined range. · When the channel voltage Vce deviates from the predetermined voltage range. · When the thermal resistance deviates from the predetermined range.

[0180] For the deterioration of the transistor 101 as a semiconductor element (electrical element), it is preferable to supply a test current Id to the transistor 101 and measure the terminal voltage Vi by supplying a constant current Ic in the vicinity of the time when the test current Id is stopped.

[0181] When the temperature of the transistor 101 changes, the terminal voltage of the diode Di changes. By monitoring the terminal voltage Vi of the diode Di, the temperature change of the transistor 101 can be measured or observed. The temperature, or the temperature change, is called the temperature information Tj. Therefore, the temperature information Tj is the voltage between the terminals (between the collector - emitter terminals of the transistor 101, between the source - drain terminals of the transistor 101). Also, it is the voltage between the terminals of the diode element.

[0182] The temperature information Tj is the voltage between the anode - cathode terminals of the diode Di, or between the collector - emitter terminals of the transistor 101, or between the drain - source terminals of the transistor 101.

[0183] The diode Di may be a diode of another semiconductor chip mounted on the semiconductor chip on which the transistor 101 is formed. The diode Di may utilize a parasitic diode that is secondarily formed when the transistor 101 is formed.

[0184] A temperature sensor 391 such as a thermocouple may be attached to the package of the semiconductor element (electrical element) 101 and the element terminal 226, and temperature information Tj with respect to temperature changes may be obtained from the temperature sensor 391.

[0185] In the drawings of the embodiments of the present invention, the diode Di, the constant current circuit 118, etc. may be omitted from illustration. Also, the sample connection circuit 203, etc. may also be omitted.

[0186] As described above, portions that are unnecessary for the explanation are omitted from illustration or description. Needless to say, the diode to which the constant current Ic is applied may have a configuration or arrangement such as that shown in FIGS. 42(e), 43(d), 43(e), etc.

[0187] As shown in FIGS. 13, 41, etc., the sample connection circuit 203 has a gate driver circuit 113, a variable resistance circuit 125, a constant current circuit 118, an operational amplifier (buffer circuit) 116, etc. arranged or formed therein.

[0188] The sample connection circuit 203 is separated from the device control circuit board 209 so as to be arranged at a position close to the transistor 101 to be tested, and is electrically connected by the connection pin 206 of the connector 208.

[0189] The sample connection circuit 203 is connected to the transistor 101 by the connection pin 206 of the connector 202. The length (distance) between the gate driver circuit 113 and the gate terminal (G) of the transistor 101 is arranged to be a short distance of 100 mm or less.

[0190] If the distance between the gate driver circuit 113 and the gate terminal (G) of the transistor 101 is long, noise or the like may be superimposed on the gate terminal (G), and the transistor 101 may malfunction due to the noise.

[0191] The gate driver circuit 113 can output gate signal voltages Vg of two or more levels. Also, it can output a triangular wave, a sine wave, etc. that change with time. Further, the gate signal voltage Vg can be randomly changed and applied to the gate terminal.

[0192] The transistor 101 operates / non-operates (turns on / off) according to the gate signal voltage Vg output from the gate driver circuit 113. During the period when the transistor 101 is on, a test current Id flows between the channels of the transistor 101.

[0193] The temperature information Tj may use information from the temperature measurement circuit 115 arranged or mounted on the transistor 101 or the like. The temperature measurement circuit 115 is configured by using a thermocouple, a thermistor, a posistor, etc. as the temperature sensor 391.

[0194] By flowing a constant current Ic, in order to prevent the transistor 101 from generating heat, the constant current Ic is set to a current value sufficiently smaller than the test current Id flowing through the channel of the transistor 101.

[0195] Specifically, the constant current Ic is set to 1 / 1000 or less of the test current Id flowing through the transistor 101 during the test. Preferably, the current Ic flowing through the transistor 101 is 1×10 6 of 1 or more and 1×10 4 of 1 or less. The constant current Ic is set to 0.1 mA or more and 100 mA or less.

[0196] The constant current Ic flowing between channels is changed, and the voltage across a diode Di (the collector-emitter terminal voltage of the transistor 101, the cathode-anode voltage of the diode Di) is measured to obtain the temperature coefficient K. The obtained temperature coefficient K is stored in the temperature measurement circuit 115 or the controller circuit 111.

[0197] In FIG. 13, it has been described that the constant current circuits 118 corresponding to the respective transistors 101 are configured or arranged, but the present invention is not limited thereto. For example, one constant current circuit 118 is configured or arranged, and the connection of the constant current Ic output from the constant current circuit 118 is switched using a selection circuit (for example, the selection circuit 405 or a similar selection circuit). A plurality of transistors 101 may be selected and configured such that the constant current Ic is applied or supplied to the selected transistors 101.

[0198] Although it has been described that the constant current Ic is applied or supplied to the transistor 101 in a state where the transistor 101 is in the off state and the test current Id is not supplied, the present invention is not limited thereto.

[0199] For example, it goes without saying that the test current Id may be turned off, the transistor 101 may be selected, the constant current Ic may be applied to the diode Di added to the selected transistor 101, and the voltage across the channels (between the drain terminal and the source terminal) of the transistor 101 may be measured. Also, the transistor 101 may be kept in the on state, the constant current Ic may be passed between the channels of the transistor, and the terminal voltage may be measured.

[0200] There may also be a case where the diode Di is not formed or arranged. A method or configuration is exemplified in which the transistor 101 is selected to be in the on state, the constant current Ic is supplied in the forward direction of the transistor 101 (in the case of FIG. 13, from the drain terminal to the source terminal direction), and the voltage Vi across the channels of the transistor 101 is measured or acquired. It goes without saying that the above embodiments can be applied to other embodiments described in this specification or the drawings.

[0201] In the embodiments of FIGS. 12 and 13, although the transistor 101 for performing the evaluation or test is shown to be connected in series, the present invention is not limited thereto. For example, FIG. 14 shows an embodiment in which three transistors 101 are directly connected as a set of transistor groups, and a plurality of transistor groups are connected in parallel.

[0202] A test current Id is supplied to each semiconductor element group (electric element group) (transistor group). The test current Id is controlled to be turned on and off by a switch circuit 124 (switch circuit 124a, switch circuit 124b, switch circuit 124c). FIG. 15 shows an embodiment in which the transistors 101 to be tested are connected in parallel. Each transistor 101 is connected in parallel, and the test current Id and the test voltage Vd are applied.

[0203] In FIGS. 14, 15, etc., the power supply device 132 is shown as one unit, but the present invention is not limited thereto. For example, in FIG. 14, it goes without saying that a plurality or three power supply devices 132 may be arranged or connected such that a power supply device 132a is arranged or connected to the test (evaluation) component 117a, a power supply device 132b is arranged or connected to the test (evaluation) component 117b, and a power supply device 132c is arranged or connected to the test (evaluation) component 117c. When there are two semiconductor element groups (electric element groups), two power supply devices 132 are used.

[0204] In FIG. 15, an independent power supply device 132 may be connected or arranged to each semiconductor element (electric element) 101. Each power supply device 132 can output or adjust and set an independent voltage or current, and can perform independent on / off control.

[0205] It goes without saying that three power supply devices 132 may be arranged or the like so that the power supply device 132a is arranged or connected to the test (evaluation) component 117a, the power supply device 132b is arranged or connected to the test (evaluation) component 117b, and the power supply device 132c is arranged or connected to the test (evaluation) component 117c. The power supply device 132 outputs, supplies, generates, etc. a test current, a test voltage, etc.

[0206] FIG. 16 is an explanatory diagram showing a state in which the element terminals 226 of the electrical component 101 are clamped or held using the printed circuit boards 183a and 183b of the present invention.

[0207] As shown in FIG. 16, contact patterns 161 (contact patterns 161a, 161b, 161c, 161d) are formed or arranged on the printed circuit board 183a. Similarly, contact patterns 161 (contact patterns 161a, 161b, 161c, 161d) are formed or arranged on the printed circuit board 183b. The contact pattern may be composed of a conductive material such as a foil or a plate such as a copper foil instead of a pattern.

[0208] As shown in FIG. 7, the contact pattern 161c has a pattern width of S (narrow contact pattern 161), and the contact patterns 161a, 161b, and 161d have a pattern width of W (wide contact pattern 161).

[0209] The pattern width S and the pattern width W are formed or configured based on the pitch of the element terminals 226 of the semiconductor element (electrical element) 101. Since the semiconductor element (electrical element) 101 to be tested or evaluated by the test apparatus of the present invention has two types of element terminal pitches (distance between terminals), the width or pitch of the contact pattern 161 is composed of two types.

[0210] The element terminal 226g of the electrical element (TO220) 101a is clamped by the contact pattern 161b1 of the printed circuit board 183a and the contact pattern 161b1 of the printed circuit board 183b. The element terminal 226d of the electrical element (TO220) 101a is clamped by the contact pattern 161c1 of the printed circuit board 183a and the contact pattern 161c1 of the printed circuit board 183b. The element terminal 226s of the electrical element (TO220) 101a is clamped and held by the contact pattern 161d1 of the printed circuit board 183a and the contact pattern 161d1 of the printed circuit board 183b.

[0211] The element terminal 226g of the electrical element (TO247) 101b is clamped by the contact pattern 161c2 of the printed circuit board 183a and the contact pattern 161c2 of the printed circuit board 183b. The element terminal 226d of the electrical element (TO247) 101b is clamped by the contact pattern 161d2 of the printed circuit board 183a and the contact pattern 161d2 of the printed circuit board 183b. The element terminal 226s of the electrical element (TO247) 101b is clamped by the contact pattern 161a3 of the printed circuit board 183a and the contact pattern 161a3 of the printed circuit board 183b.

[0212] The element terminal 226d of the electrical element (TO247-4) 101c is clamped by the contact pattern 161b3 of the printed circuit board 183a and the contact pattern 161b3 of the printed circuit board 183b. The element terminals 226s1 and 226s2 of the electrical element (TO247-4) 101c are clamped by the contact pattern 161c3 of the printed circuit board 183a and the contact pattern 161c3 of the printed circuit board 183b. The element terminal 226g of the electrical element (TO247-4) 101c is clamped by the contact pattern 161a4 of the printed circuit board 183a and the contact pattern 161a4 of the printed circuit board 183b.

[0213] At the upper end of the printed circuit board 183a, the contact pattern 161 is formed or arranged. The contact pattern and the element terminal 226 of the semiconductor element (electrical element) 101 are in electrical contact and connected.

[0214] At the lower end of the printed circuit board 183a, a connection pattern 104 is formed or arranged. The contact pattern 161 is connected to the connection pattern 104. A connector 811 is mounted on the connection pattern 104. The output terminal of the power supply device 132 etc. is connected to the connection pattern 104, and a test current Id or a test voltage Vd is applied to the semiconductor element (electrical element) 101. Also, a control signal for on / off control of the transistor 101 etc. is supplied. A pressing plate 323 is arranged on the back surface of the printed circuit board 183b. A pressing plate 321 is arranged on the front surface of the printed circuit board 183a.

[0215] Examples of the configuration or forming material of the pressing plate 323 and the pressing plate 321 include resin materials such as Bakelite. Bakelite is a thermosetting resin called "phenolic resin". A plate-like material obtained by applying it to paper or cloth and thermosetting it is used. Plastic is also called "synthetic resin". Engineering plastics and super engineering plastics are exemplified.

[0216] Needless to say, metal materials such as copper, stainless steel, and aluminum may also be used. The pressing plate is preferably made of a metal material having heat resistance and high thermal conductivity.

[0217] In the embodiments of the present invention, the pressing plates 321 and 323 are described, but the present invention is not limited to plates. The pressing plates (the pressing plates 321 and 323) sandwich the printed circuit board 183a and the printed circuit board 183b, apply pressure etc., and sandwich and hold the element terminal 226. Any member or mechanism that makes an electrical connection may be used.

[0218] The object to be pressed by the pressing plate is not specified to the printed circuit board 183. For example, as described in the embodiment of FIG. 30, pressure or the like is applied to metal fittings such as the pressing fitting 351 and the pressing fitting 357, and the element terminal 226 held or arranged between the pressing fittings is pinched, and any member or mechanism that makes electrical contact with the element terminal 226 and the pressing fitting or the like may be used.

[0219] A heat sink 182 is formed or arranged between the printed circuit board 183a and the pressing plate 321 as necessary. Preferably, the heat sink 182 is formed on the printed circuit board 183a. As an example, the heat sink 182 is a copper foil. Alternatively, it is a heat dissipation silicon sheet.

[0220] The heat sinks 181 and 182 are formed on the printed circuit board 183 or the like. The heat sinks 181 and 182 are formed or arranged between the printed circuit board 183b and the pressing plate 323. Preferably, the heat sink 181 is formed on the printed circuit board 183b. The heat sink 182 is formed on the printed circuit board 183a. As an example, the heat sinks 181 and 182 are copper foils or copper plates. Alternatively, it is a heat dissipation silicon sheet. Also, a heat sink may be used.

[0221] The heat sinks 181 (heat dissipation patterns 181, heat sinks 181a, heat sinks 181b, heat sinks 181c), heat sinks 182 (heat dissipation patterns 182) are formed or arranged corresponding to the positions of the semiconductor elements (electrical elements) 101 (semiconductor elements (electrical elements) 101a, semiconductor elements (electrical elements) 101b, semiconductor elements (electrical elements) 101c). Alternatively, it is a liquid. A buffer material 355 is arranged between the heat sink 181 (heat dissipation pattern 181) and the pressing plate 323, or between the heat sink 182 (heat dissipation pattern 182) and the pressing plate 321.

[0222] Heat pipes may be used as the heat dissipation plates 181 and 182. The heat pipes serving as the heat dissipation plates 181 and 182 are arranged or formed on the surface of the printed circuit board 183. Further, they may be arranged or formed on the surfaces of the pressing tools 351, 352, 353, and 354. Further, the pressing tools may be replaced with heat pipes. A heat conductive grease or a heat dissipation silicone oil compound may be applied between the surface of the printed circuit board 183 and the heat pipe.

[0223] The heat pipe 223 has a small amount of liquid (working fluid) vacuum-sealed in a sealed container and is provided with a capillary structure (wick) on the inner wall. As the working fluid, in addition to pure water, methanol (methyl alcohol), acetone, sodium, mercury, a fluorocarbon refrigerant, or ammonia may be used. As the wick material, aluminum, copper, stainless steel, sintered alloy, wire mesh, foamed metal, ceramic, etc. are used.

[0224] Examples of the cushioning material (cushioning material, cushioning portion) 355 include sponge, rubber, etc. A sponge is a porous soft material with innumerable fine holes (holes, spaces) inside. Caymen, etc. are called "natural sponges", and synthetic resins such as polyurethane are called "synthetic sponges". Examples of the rubber material include natural rubber, silicone rubber, urethane rubber, NBR (nitrile rubber), fluororubber, ethylene propylene rubber, butyl rubber, styrene butadiene rubber, etc. Depending on the shape, it is divided into sheets, tapes, groove-shaped rubbers, round bars, round / angled cords, etc. Natural rubber is rich in abrasion resistance and elasticity, and silicone rubber is excellent in cold resistance and heat resistance.

[0225] A temperature sensor 391 is formed or arranged on the heat dissipation plate 181 or the heat dissipation plate 182. Heat is generated between the contact pattern 161 and the element terminal 226 due to contact resistance, etc. The heat generation temperature is monitored or measured by the temperature sensor 391. Examples of the temperature sensor 391 include a thermocouple. Further, examples of the sensor include a thermistor, a bimetal, an infrared sensor, etc.

[0226] The pressing plate 321 is pressed by the pressing head 322 of the pressing tool 325. The printed circuit boards 183a and 183b are uniformly pressed by the pressing plate 321, and a good electrical connection is maintained between the element terminals 226 and the contact pattern 161. As shown in FIG. 12, a plurality of semiconductor elements (electrical elements) 101 are arranged on the mounting plate 324.

[0227] As shown in FIG. 9, a shield plate 705 is arranged between the semiconductor elements (electrical elements) 101. Also, a shield plate 705 is arranged between the drain terminal (D) 226d and the source terminal (S1) 226s1.

[0228] The shield plate 705 has a configuration in which an insulating sheet (or insulating film, insulating plate) 708 is arranged or formed on the surface of a conductor sheet (or conductor foil, conductor plate, conductive plate) 709 made of copper, iron, or aluminum. The conductor sheet 709 is connected to a predetermined potential or ground potential and is fixed in potential.

[0229] The shield plate 705 may be a metal plate (conductor plate) or a metal film (conductor sheet). In that case, it is preferable to arrange or form an insulator or an insulating sheet between the shield plate 705 and the conductive objects such as the pressing tool so that the shield plate 705 does not come into contact with them.

[0230] According to the present invention, by arranging the shield plate 705 between adjacent semiconductor elements (electrical elements) 101, it is possible to prevent malfunction of the semiconductor elements (electrical elements) 101 adjacent to the semiconductor element (electrical element) 101 in which a test is being performed by supplying a test current or the like. By grounding (connecting) adjacent shield plates 705 to different potentials, malfunction can be further prevented and the influence of noise can be suppressed.

[0231] As shown in FIG. 9, the conductor sheet 709b of the shield plate 705c is fixed to a predetermined potential. The conductor sheet 709a of the shield plate 705a is fixed to a predetermined potential. The conductor sheet 709b of the shield plate 705b is fixed to a predetermined potential. The above embodiments are examples of electrically connecting the element terminal 226 and the contact pattern 161 of the printed circuit board 183. The present invention is not limited thereto. FIGS. 17, 18, 24, etc. are examples of connecting to the element terminal 226 using conductive pressing (metal) fittings 351, pressing (metal) fittings 352, etc.

[0232] Not all of the pressing (metal) fittings 351, pressing (metal) fittings 352, etc. need to be made of metal. Any configuration may be used as long as a conductor film is formed or configured on the surface or the like by plating, sputtering, vapor deposition, or the like and has conductivity. Also, it is not limited to metal. For example, a configuration in which the surface of a ceramic member is plated with a metal material is exemplified.

[0233] FIG. 17 is a cross-sectional or schematic configuration diagram of a connection portion of the electrical element test apparatus of the present invention. FIG. 18(a) is an explanatory diagram for explaining the configuration of FIG. 17. Also, FIGS. 18(b) and 12(c) are explanatory diagrams or configuration diagrams of the buffer material portion.

[0234] In FIGS. 17 and 18, the pressing (metal) fittings 351, pressing (metal) fittings 352, pressing (metal) fittings 353, pressing (metal) fittings 354, pressing (metal) fittings 357, pressing (metal) fittings 358, and pressing (metal) fittings 359 are configured or formed of a conductor material made of at least a metal or the like on the surface. Needless to say, the above matters also apply to the embodiments of FIGS. 64, 70, etc.

[0235] The pressing (metal) fitting may be formed of carbon or a carbon compound such as carbon. Also, the surface of the pressing (metal) fitting may be configured or formed of at least a conductor material by plating technology, vapor deposition technology, sputtering technology, coating technology, or the like so as to have conductivity. Examples of the metal material include silver, gold, zinc, copper, iron, nickel, aluminum, and stainless steel. Also, examples include graphite, carbon, etc. Needless to say, the above matters also apply to the embodiments of FIGS. 64, 70, etc.

[0236] The contact portion with the element terminal 226 is made of phosphor bronze or nickel alloy. Also, the surface is gold-plated or silver-plated. The plating improves the electrical stability of the connection portion with the element terminal 226.

[0237] Protrusions are formed or configured on the contact surface with the element terminal 226. The protrusions are formed by knurling. The number of protrusions is preferably 25 to 100 (pieces / cm 2 ) and more preferably 50 to 75 (pieces / cm 2 ). When the element terminals 226 are in contact via a plurality of protrusions respectively, the current flows dispersedly without concentrating at a specific location, and heat generation at the element terminal 226 portion is suppressed. It is preferable to form protrusions on the surface of the contact pattern 164. The protrusions are formed by knurling. The number of protrusions is preferably 25 to 100 (pieces / cm 2 ) and more preferably 50 to 75 (pieces / cm 2 ).

[0238] In FIGS. 17, 18, etc., the element terminal 226g of the semiconductor element (electrical element) 101a is pressed by the pressing (metal) tool 358a and the pressing (metal) tool 352a and clamped to make an electrical connection. The pressing (metal) tools 359a, 357a, and 358a are fixed to the base material with screws or bolts. The pressing (metal) tool 352a is pressed by the pressing plate 321.

[0239] By configuring the pressing (metal) tool with metal or ceramic, the thermal conductivity is good, and the heat generated at the element terminal 226 can be dissipated well. Also, the durability against pressing and pressure is high.

[0240] A buffer material 356a is arranged or configured between the pressing (metal) tool 357a, the pressing (metal) tool 359a, and the pressing (metal) tool 352a. The buffer material is made of or formed from an insulating material.

[0241] Examples of the buffer material 356 include sponge and rubber. A sponge is a porous and soft material with innumerable fine pores inside. Natural sponges such as sea sponges are called "natural sponges", and synthetic resins such as polyurethane are called "synthetic sponges". Examples of rubber materials include natural rubber, silicone rubber, urethane rubber, NBR (nitrile rubber), fluororubber, ethylene propylene rubber, butyl rubber, styrene butadiene rubber, etc. Depending on the shape, it can be divided into sheets, tapes, groove-shaped rubbers, round bars, round or square cords, etc. Natural rubber is rich in wear resistance and elasticity, and silicone rubber is excellent in cold resistance and heat resistance.

[0242] The buffer material 355 can make the pressure applied by the pressing (metal) tool 351 to the element terminal 226 uniform, and can be set and maintained to obtain good pressure (pressing). The buffer material 356 can make the pressure applied by the pressing (metal) tool 352 to the element terminal 226 uniform, and can be set and maintained to obtain good pressure (pressing).

[0243] If the buffer material 355 and the buffer material 356 are made of insulating materials, insulation between the pressing (metal) tools, contact with the pressing (metal) tools, and short circuits can be prevented. For example, the buffer material 355 can be electrically separated without contacting the pressing (metal) tool 351 and the pressing (metal) tool 358. The buffer material 356 insulates the pressing (metal) tool 352 and the pressing (metal) tool 357 and does not short-circuit.

[0244] The buffer material 355 and the buffer material 356 are not limited to being formed of a single solid (object). For example, as shown in FIG. 18(b), the buffer material 355 or the buffer material 356 may be sandwiched or arranged between insulating sheets (insulating plates) 708.

[0245] If either the insulating sheet (insulating plate) 708a or the insulating sheet (insulating plate) 708b is used, an electrical short circuit can be prevented, so either one is acceptable. The insulating sheet (insulating plate) 708 can suppress the deformation of the buffer material due to contact with the pressing (metal) tool, and can be configured to uniformly apply the pressure from the buffer material to the pressing (metal) tool. In this case, the buffer material 355 and the buffer material 356 may be made of conductive materials such as metal and carbon.

[0246] The buffer materials 355 and 356 are not limited to being composed of a single solid buffer material. They may be formed by laminating or bonding buffer materials made of a plurality of materials.

[0247] Also, as shown in FIG. 18(c), the buffer material may be composed of an elastic material such as a spring 383. When the spring 383 is composed of a conductive material, in order to prevent an electrical short circuit with the pressing (metal) fitting, it is sandwiched or arranged between an insulating sheet (insulating plate) 708a and an insulating sheet (insulating plate) 708b. If only one is used, an electrical short circuit can be prevented, so only one side is also acceptable.

[0248] The above matters can also be applied to, for example, FIGS. 34, 64, and 70. An insulating sheet 708 or the like is arranged on at least one of the front and rear of the spring 383 in FIG. 34. Also, the spring 383 in FIG. 34 may be replaced with the buffer materials 355 and 356. It goes without saying that the matters, contents, etc. described in the specification and drawings of the present application can be combined in part or in whole with other embodiments.

[0249] A gate signal to be applied to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101a is applied to the pressing (metal) fitting 352a. A gate signal to be applied to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101b is applied to the pressing (metal) fitting 352b. A gate signal to be applied to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101c is applied to the pressing (metal) fitting 352c.

[0250] As described above, a gate signal is applied or supplied to the pressing (metal) fitting 352, and the gate signal can be applied or supplied to the gate terminals of the respective semiconductor elements (electric elements) 101.

[0251] The pressing (metal) fixture 353 is connected to the element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101a, and an electrical connection is made. The pressing (metal) fixture 353 has the connection wiring 211 connected thereto by the connector 105, and a test current Id is output.

[0252] The pressing (metal) fixture 354 is connected to the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101c, and the pressing (metal) fixture 354 has the connection wiring 211 connected thereto by the connector 105.

[0253] The element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101c is electrically connected to the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101b by the pressing (metal) fixture 351b.

[0254] The element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101b is electrically connected to the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101a by the pressing (metal) fixture 351a.

[0255] Due to the above connections, the test current Id supplied to the connection wiring 211b is supplied to the drain terminal of the semiconductor element (electric element) 101a, and the test current Id is output from the source terminal of the semiconductor element (electric element) 101a.

[0256] The test current Id is supplied to the drain terminal of the semiconductor element (electric element) 101b by the pressing (metal) fixture 351a, and the test current Id is output from the source terminal of the semiconductor element (electric element) 101b. The test current Id is supplied to the drain terminal of the semiconductor element (electric element) 101c by the pressing (metal) fixture 351b, and the test current Id is output from the source terminal of the semiconductor element (electric element) 101c.

[0257] The test current Id is output to the connection wiring 211a. Corresponding to the polarity (N-channel, P-channel) of the semiconductor element (electric element) 101, the supply direction of the test current Id, the input / output directions of the drain terminal and the source terminal, and the positions are set.

[0258] In an embodiment of the present invention, by pressing the pressing plates 321 and 323 with the pressing head 322, the element terminals 226 of the semiconductor element (electrical element) 101 are sandwiched between the printed circuit boards 183 to establish an electrical connection. However, the present invention is not limited to this method.

[0259] The printed circuit board 183, the pressing (metal) fittings, the pressing plates 321, 323, etc. and the pressing head 322 may be integrated (fixed). By integrating (fixing) them, when the pressing head 322 is operated (moved, etc.), the printed circuit board 183 moves. By operating the pressing head 322 to move it forward, the printed circuit board 183 can be separated from the element terminals 226 of the semiconductor element (electrical element) 101. That is, the semiconductor element (electrical element) 101 can be removed by operating the pressing head 322.

[0260] In the embodiment shown in FIG. 34 and the like, by adjusting the pressing force of the spring 383, the pressing plates 321 etc. are pressed to establish a connection by pressing the element terminals 226. However, in addition to adjusting the pressing force of the toggle clamp (composed of the buffer plate 385, spring 383, etc.), the toggle clamp can also be used in the direction of pulling off the printed circuit board 183 by reversing the pressing direction. The element terminals 226 are always pressed by the pressure of the spring 383. The toggle clamp can be used and configured to pull off the printed circuit board 183 to disconnect the element terminals 226 of the semiconductor element (electrical element) 101.

[0261] Needless to say, the above matters can also be applied to other embodiments of the present invention. Also, it goes without saying that it may be configured to be able to perform both pressing the element terminals 226 and separating the element terminals 226.

[0262] As shown in FIG. 18, the pressing (metal) fitting 351 has a width W at one pressure contact portion and a width S at the other pressure contact portion. The pressing (metal) fitting 352 has a width W at one pressure contact portion and also a width W at the other pressure contact portion.

[0263] As described above, for the three pressing members 352 (pressing members 352a, 352b, and 352c), the width of both pressure application portions is W, and for the two pressing members 351 (pressing members 351a and 351b), the width of one pressure contact portion is W and the width of the other pressure contact portion is S.

[0264] The pressing members 352 on the pressing plate 321 side are of the same shape, and the pressing members 351 on the pressing plate 323 side are of the same shape. The pressing member 351 has two shapes where the width of one pressure contact portion is W and the width of the other pressure contact portion is S, and the pressing member 352 has the width of both pressure application portions as W, so that it can be adapted to semiconductor elements (electrical elements) 101 (semiconductor elements (electrical elements) 101a, 101b, and 101c) with different element terminal pitches or numbers of element terminals, and good connection with the element terminals can be achieved. The above matters are the same as or similar to the embodiment using the printed circuit board 183 in FIG. 7. When not considering the "spacing" between the contact patterns 161, the width S of the contact pattern 161 is approximately 1 / 2 of the width W.

[0265] In the above embodiment, it is assumed that the width of W and the width of S of the contact pattern 161 are set or defined. However, as shown in FIG. 1, it goes without saying that it may also be set, configured, or defined by the intervals a and b between the element terminals 226.

[0266] As shown in FIG. 18 and the like, the element terminal 226d of the semiconductor element (electrical element) 101a is pressed and held by the pressing member 359a and the pressing member 353 to establish an electrical connection. The pressing member 359a is fixed to the base material by screws or bolts or adhesion or fitting. The pressing member 353 is pressed by the pressing plate 323.

[0267] The device terminal 226s of the semiconductor device (electrical device) 101a is pressed by the pressing (metal) fitting 357a and the pressing (metal) fitting 351a, clamped, and electrically connected. The pressing (metal) fitting 357a is fixed to the base material by screws or bolts or adhesives. The pressing (metal) fitting 351a is pressed by the pressing plate 323.

[0268] The pressing (metal) fitting 351a connects the device terminal 226s of the semiconductor device (electrical device) 101a and the device terminal 226d of the semiconductor device (electrical device) 101c. The device terminal 226s of the semiconductor device (electrical device) 101a is arranged between the pressing (metal) fitting 357a and the pressing (metal) fitting 351a, pressed, and clamped. Since the terminal surface of the pressing (metal) fitting is subjected to a rosette process, the contact resistance with the device terminal 226 can be significantly reduced.

[0269] The pressing (metal) fitting 358a is arranged at the facing position of the pressing (metal) fitting 352a, and the pressing (metal) fitting 358c is arranged at the facing position of the pressing (metal) fitting 352b. A buffer material 355a is arranged or formed between the pressing (metal) fitting 358a, the pressing (metal) fitting 352c, and the pressing (metal) fitting 351a, and the device terminal 226s of the semiconductor device (electrical device) 101a and the device terminal 226d of the semiconductor device (electrical device) 101b clamped by the pressing (metal) fitting 351a are clamped and held with good pressure.

[0270] The pressing (metal) fitting 351a connects the device terminal 226s of the semiconductor device (electrical device) 101a and the device terminal 226d of the semiconductor device (electrical device) 101b. The device terminal 226s of the semiconductor device (electrical device) 101a is clamped between the pressing (metal) fitting 351a and the pressing (metal) fitting 357a. Also, the device terminal 226d of the semiconductor device (electrical device) 101b is clamped between the pressing (metal) fitting 351a and the pressing (metal) fitting 359b.

[0271] The device terminals 226s1 and 226s2 of the semiconductor device (electrical device) 101c are clamped between the pressing (metal) fitting 354 and the pressing (metal) fitting 357c, and the device terminal 226d of the semiconductor device (electrical device) 101c is electrically connected to the pressing (metal) fitting 354.

[0272] At the facing position of the pressing (metal) fitting 352a, the pressing (metal) fittings 358a and 358b are arranged. At the facing position of the pressing (metal) fitting 352b, the pressing (metal) fittings 358c and 358d are arranged. At the facing position of the pressing (metal) fitting 352c, the pressing (metal) fittings 358e and 358f are arranged.

[0273] At the facing position of the pressing (metal) fitting 351a, the pressing (metal) fittings 357a and 359b are arranged. At the facing position of the pressing (metal) fitting 351b, the pressing (metal) fittings 357b and 359c are arranged.

[0274] Between the pressing (metal) fitting 352a and the pressing (metal) fitting 358a, the element terminal 226g of the semiconductor element (electrical element) 101a is clamped and held. Between the pressing (metal) fitting 353 and the pressing (metal) fitting 359a, the element terminal 226d of the semiconductor element (electrical element) 101a is clamped and held. Between the pressing (metal) fitting 351a and the pressing (metal) fitting 357a, the element terminal 226s of the semiconductor element (electrical element) 101a is clamped and held.

[0275] Between the pressing (metal) fitting 352b and the pressing (metal) fitting 358c, the element terminal 226g of the semiconductor element (electrical element) 101b is clamped and held. Between the pressing (metal) fitting 351a and the pressing (metal) fitting 359a, the element terminal 226d of the semiconductor element (electrical element) 101b is clamped and held.

[0276] Between the pressing (metal) fitting 352c and the pressing (metal) fitting 358d, the element terminal 226g of the semiconductor element (electrical element) 101c is clamped and held. Between the pressing (metal) fitting 351b and the pressing (metal) fitting 357b, the element terminal 226s of the semiconductor element (electrical element) 101b is clamped and held. Between the pressing (metal) fitting 351b and the pressing (metal) fitting 359c, the element terminal 226d of the semiconductor element (electrical element) 101c is clamped and held. Between the pressing (metal) fitting 352c and the pressing (metal) fitting 358f, the element terminal 226g of the semiconductor element (electrical element) 101c is clamped and held.

[0277] By pressing the pressing (metal) fitting 352 with the pressing plate 321, it is connected to the gate terminal 226g of the semiconductor element (electrical element) 101. A gate signal is applied to the gate terminal 226 from a gate driver circuit to perform testing or evaluation by turning the semiconductor element (electrical element) 101 on and off.

[0278] Note that although the pressing plates 321 and 323 are represented as plates, they are not limited to this. Any shape or configuration that can press the pressing (metal) fitting and establish electrical contact with the semiconductor element (electrical element) 101 may be used. When not considering the "gap" between the contact patterns, the width of S is approximately 1 / 2 of W for the widths of W and S of the contact pattern.

[0279] In the above embodiments, it has been described as being set or formed or configured or defined by the widths of W and S of the contact pattern. However, as shown in FIG. 1, it goes without saying that it may also be set or formed or configured or defined by the intervals a and b between the element terminals 226.

[0280] In FIGS. 17 and 18, the pressing (metal) fitting 352 is a member that contacts the element terminal 226g and is also a member that supplies a gate signal. The gate terminal 226g of the semiconductor element (electrical element) 101 is arranged at a position where it contacts the pressing (metal) fitting 352.

[0281] The pressing (metal) fitting 351 has a function of connecting the source terminal 226s and the drain terminal 226d of adjacent semiconductor elements (electrical elements) 101 and relaying the test current Id.

[0282] In FIGS. 17 and 18, although a plurality of pressing (metal) fittings 352 are used, it is not limited to this. For example, a structure in which the pressing (metal) fitting 352a and the pressing (metal) fitting 352b are integrally formed or configured may be used. The same applies to the pressing (metal) fitting 351, and the same also applies to the pressing (metal) fitting 358 and the like.

[0283] In this test apparatus, a plurality of pressing (metal) fittings 351 are used, but the shapes of the pressing (metal) fittings 351 are the same. Also, a plurality of pressing (metal) fittings 352 are used, but the shapes of the pressing (metal) fittings 352 are the same. Therefore, the components can be made common, and maintenance is easy and cost can be reduced.

[0284] Figures 17, 18, etc. show a configuration using three semiconductor elements (electrical elements) 101. The present invention is not limited to this. For example, it can also be configured with two semiconductor elements (electrical elements) 101. In that case, the pressing (metal) fitting 351 is used as a relay member for the test current Id.

[0285] In Figure 18 etc., the pressing (metal) fitting 352 is shown arranged on the side of the pressing plate 321 and the pressing (metal) fitting 351 is shown arranged on the side of the pressing plate 323, but the present invention is not limited to this. Needless to say, the pressing (metal) fitting 351 may be arranged on the side of the pressing plate 321 and the pressing (metal) fitting 352 may be arranged on the side of the pressing plate 323.

[0286] A connection terminal for supplying a voltage (signal) to the gate terminal of the transistor 101 is arranged on the pressing (metal) fitting 352. A connection terminal for supplying the test current Id to the drain terminal or source terminal of the transistor 101 is arranged on the pressing (metal) fitting 351.

[0287] The pressing (metal) fitting 352 has a surface with a width W that contacts the gate terminal of the transistor 101, and the element terminal 226 does not contact the other width W. Therefore, as shown in Figure 20(b), the length of the pressing (metal) fitting 358b facing the pressing (metal) fitting 352 is configured to protrude forward by the thickness of the element terminal 226. Alternatively, the surface with the width W of the pressing (metal) fitting 352 that does not contact the element terminal 226 is configured to protrude forward (longer). Needless to say, a buffer material, a spring, etc. may be arranged between the pressing (metal) fitting 352 and the pressing (metal) fitting 358b facing it.

[0288] The above matters are the same for other pressing (metal) fittings 352 and also for pressing (metal) fitting 351. Similarly, they are also designed, configured, formed, or arranged in pressing (metal) fittings 358, 357, 359, etc.

[0289] The number of pressing (metal) fittings 352 to be tested is arranged or used according to the number of transistors 101. It is preferable from the cost perspective that the pressing (metal) fittings 352 have the same shape. Also, it is preferable from the cost perspective that the pressing (metal) fitting 351 has the same shape.

[0290] The pressing (metal) fitting 351 has a function of electrically connecting the source terminals and drain terminals of adjacent transistors 101. For example, in FIG. 18, when there is no transistor 101b, the pressing (metal) fitting 351b and the pressing (metal) fitting 351a are electrically short-circuited. The pressing (metal) fitting 351 is configured with a screwing portion for connecting wiring to adjacent pressing (metal) fittings 351. Each pressing (metal) fitting 351 is configured to be connectable to the terminals of the power supply device 132. Alternatively, a pressing (metal) fitting 351 integrating the pressing (metal) fitting 351a and the pressing (metal) fitting 351b can be fabricated and used.

[0291] Although the pressing (metal) fitting 352 is configured to apply a signal voltage to the gate terminals of different transistors 101, the present invention is not limited thereto. When applying the same voltage (such as on-voltage, off-voltage, etc.) to the gate terminals of a plurality of transistors 101, it goes without saying that a pressing (metal) fitting 352 integrating the pressing (metal) fitting 352a, the pressing (metal) fitting 352b, etc. in FIG. 18 can be fabricated and used. The width W and the width S are set depending on the pitch or interval of the element terminals 226 of the transistor 101.

[0292] The embodiment of FIG. 18 is an embodiment in which a semiconductor element (electric element) 101b is arranged at the center and a semiconductor element (electric element) 101c is arranged on the right side. The embodiment of FIG. 20(a) is an embodiment in which a semiconductor element (electric element) 101c is arranged at the center and a semiconductor element (electric element) 101b is arranged on the right side. Note that a buffer material may be arranged between the pressing plate 321 and the pressing (metal) fitting 352. A buffer material may be arranged between the pressing plate 323 and the pressing (metal) fitting 351.

[0293] In FIG. 18, the positional relationship between the transistors 101a, 101b, 101c and the pressing (metal) fittings 352, 351 is illustrated as an example. The present invention is not limited thereto. Needless to say, other positional relationships such as those in FIGS. 2, 3, 4, 5, 6, etc. may also be possible.

[0294] Needless to say, the above matters and contents are also applicable to other embodiments of the present application. Also, it goes without saying that embodiments can be configured by combining some or all of them.

[0295] In FIG. 20(a), the pressing (metal) fitting 352a is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101a, and a gate signal voltage is applied or supplied to the gate terminal (G). The pressing (metal) fitting 352b is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101b, and a gate signal is applied or supplied to the gate terminal (G). The pressing (metal) fitting 352c is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101c, and a gate signal voltage is applied or supplied to the gate terminal (G). The above matters are the same as those in the embodiments such as FIG. 18.

[0296] In FIG. 20(a), the pressing (metal) fitting 351a connects the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101a and the element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101b. The pressing (metal) fitting 351b connects the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101b and the element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101c. The above matters are the same as those in the embodiment of FIG. 18 and the like. Needless to say, they are also applicable to the embodiments of FIGS. 64, 70 and the like.

[0297] In the embodiment of FIG. 20(a), the semiconductor element (electric element) 101c is arranged at the central position and the semiconductor element (electric element) 101c is arranged on the right side. Also in FIG. 20(a), similar to the embodiment of FIG. 18, the pressing (metal) fitting 352 is arranged on the pressing plate 321 side, and a plurality of pressing (metal) fittings 352 having the same shape as that in FIG. 18 are used. A gate signal is applied to the semiconductor element (electric element) 101 through the pressing (metal) fitting 352. Also, a plurality of pressing (metal) fittings 351 are arranged on the pressing plate 323 side, and the pressing (metal) fittings 351 form an electrical path connecting the adjacent semiconductor elements (electric elements) 101.

[0298] The embodiment of FIG. 21 is an embodiment for testing three semiconductor elements (electric elements) 101a. The semiconductor elements (electric elements) 101a are arranged at the left end portion, the central portion and the right end portion, and the element terminals 226 are connected by the pressing (metal) fittings 351 and the pressing (metal) fittings 352.

[0299] In FIG. 21, the pressing (metal) fitting 352a is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101a1, and a gate signal is applied or supplied to the gate terminal (G). The pressing (metal) fitting 352b is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101a2, and a gate signal is applied or supplied to the gate terminal (G). The pressing (metal) fitting 352c is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101a3, and a gate signal is applied or supplied to the gate terminal (G). The above matters are the same as those in the embodiment of FIG. 18.

[0300] In FIG. 21, the pressing (metal) fitting 351a connects the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101a1 and the element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101a2. The pressing (metal) fitting 351b connects the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101a2 and the element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101a3. The above matters are the same as those in the embodiments such as FIG. 18.

[0301] Also in FIG. 21, similar to the embodiment of FIG. 18, the pressing (metal) fitting 352 is arranged on the side of the pressing plate 321, and a plurality of pressing (metal) fittings 352 of the same shape as that in FIG. 18 are used. A gate signal (voltage) is applied to the semiconductor element (electric element) 101 through the pressing (metal) fitting 352. Further, a plurality of pressing (metal) fittings 351 are arranged on the side of the pressing plate 323, and the pressing (metal) fittings 351 form or generate an electrical path connecting the adjacent semiconductor elements (electric elements) 101.

[0302] As described above, even for semiconductor elements (electric elements) 101 of the same type but with different terminal pitches, pressing (metal) fittings such as the pressing (metal) fitting 351 and the pressing (metal) fitting 352 can be commonly used. Regarding the application of the gate signal, it is the same as that in the embodiments such as FIG. 18.

[0303] The embodiment of FIG. 22 is an embodiment for testing three semiconductor elements (electric elements) 101b. The semiconductor elements (electric elements) 101b are arranged at the left end, the central part, and the right end, and the element terminals 226 are connected by the pressing (metal) fitting 351 and the pressing (metal) fitting 352.

[0304] In FIG. 22, the pressing (metal) fitting 352a is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101b1, and a gate signal is applied or supplied to the gate terminal (G). The pressing (metal) fitting 352b is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101b2, and a gate signal is applied or supplied to the gate terminal (G).

[0305] The pressing (metal) fitting 352c is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101b3, and applies or supplies a gate signal (voltage) to the gate terminal (G). The above matters are the same as or similar to those in the embodiments such as FIG. 18.

[0306] In FIG. 22, the pressing (metal) fitting 351a connects the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101b1 and the element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101a2. The pressing (metal) fitting 351b connects the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101b2 and the element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101b3. The above matters are the same as those in the embodiments such as FIG. 18.

[0307] Also in FIG. 22, similar to the embodiments such as FIG. 18, the pressing (metal) fittings 352 are arranged on the pressing plate 321 side, and a plurality of pressing (metal) fittings 352 use those having the same shape as FIGS. 18, 20, and 21. A gate signal is applied to the semiconductor element (electric element) 101 through the pressing (metal) fittings 352. Also, a plurality of pressing (metal) fittings 351 are arranged on the pressing plate 323 side, and the pressing (metal) fittings 351 form an electrical path connecting the adjacent semiconductor elements (electric elements) 101.

[0308] The embodiment of FIG. 23 is an embodiment for testing three semiconductor elements (electric elements) 101c. The semiconductor elements (electric elements) 101c are arranged at the left end, the central part, and the right end, and the element terminals 226 are connected by the pressing (metal) fittings 351 and the pressing (metal) fittings 352.

[0309] In FIG. 22, the pressing fixture 352a is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101c1, and applies or supplies a gate signal to the gate terminal (G). The pressing fixture 352b is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101c2, and applies or supplies a gate signal to the gate terminal (G). The pressing fixture 352c is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101c3, and applies or supplies a gate signal to the gate terminal (G). The above matters are the same as or similar to the embodiments of FIGS. 18, 20, 21, etc.

[0310] In FIG. 23, the pressing fixture 351a connects the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101c1 and the element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101c2. The pressing fixture 351b connects the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101a2 and the element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101c3. The above matters are the same as or similar to the embodiments of FIGS. 18, 20, 21, etc.

[0311] Also in FIG. 22, similar to the embodiment of FIG. 18, the pressing fixtures 352 are arranged on the pressing plate 321 side, and a plurality of pressing fixtures 352 of the same shape as those in FIGS. 18, 20, and 21 are used. A gate signal is applied to the semiconductor element (electric element) 101 through the pressing fixture 352. Also, a plurality of pressing fixtures 351 are arranged on the pressing plate 323 side, and the pressing fixtures 351 form an electrical path connecting adjacent semiconductor elements (electric elements) 101.

[0312] As in the above embodiments, the present invention can perform electrical connection by mounting each semiconductor element (electric element), and can perform positioning with good accuracy, even if the terminal pitch of the semiconductor element (electric element) 101 is different, even if different terminal pitches are mixed, and even if there are semiconductor elements (electric elements) with different numbers of terminals of two or more types. Good tests and evaluations can be carried out.

[0313] The pressing (metal) fittings 352 are configured to be able to apply a gate signal voltage to the gate terminals (base terminals) of different semiconductor elements (electrical elements) 101. A connection wiring or connection part for connecting a signal applied to the gate terminal is formed or configured in the pressing (metal) fittings 352. The pressing (metal) fittings 351 function to connect adjacent semiconductor elements (electrical elements (transistors)) 101 in series or in parallel. When adjacent semiconductor elements (electrical elements (transistors)) 101 are not arranged, it has a function of relaying a current or voltage such as a test current Id. The pressing (metal) fittings 353 or the pressing (metal) fittings 354 are arranged at the final stage or the first stage, and a test current Id or a test voltage Vd is supplied or applied. The above matters are the same or similar in other embodiments of the present invention. Also, some or all of them can be combined with other embodiments.

[0314] In FIGS. 17, 18, 20, 21, and 22, the number of electrical elements (transistors) is three, but the present invention of the present application is not limited thereto. For example, FIG. 19 is an embodiment in which the number of semiconductor elements (electrical elements) 101 is five. Therefore, the present invention of the present application is not specified by the number of semiconductor elements (electrical elements).

[0315] In the embodiment of FIG. 19, two semiconductor elements (electrical elements) 101a, two semiconductor elements (electrical elements) 101c, and one semiconductor element (electrical element) 101b are mounted or arranged. The element terminals 226 of the semiconductor element (electrical element) 101 are clamped between the pressing (metal) fittings.

[0316] The pressing (metal) fixture 352a is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101a1, and applies or supplies a gate signal to the gate terminal (G). The pressing (metal) fixture 352b is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101c1, and applies or supplies a gate signal to the gate terminal (G). The pressing (metal) fixture 352c is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101b, and applies or supplies a gate signal to the gate terminal (G).

[0317] The pressing (metal) fixture 352d is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101a2, and applies or supplies a gate signal to the gate terminal (G). The pressing (metal) fixture 352e is connected to the element terminal 226g (gate terminal (G)) of the semiconductor element (electric element) 101c2, and applies or supplies a gate signal to the gate terminal (G).

[0318] In FIG. 19, the pressing (metal) fixture 351a connects the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101a1 and the element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101c1. The pressing (metal) fixture 351b connects the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101c1 and the element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101b.

[0319] The pressing (metal) fixture 351c connects the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101b and the element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101a2.

[0320] The pressing (metal) fixture 351d connects the element terminal 226s (source terminal (S)) of the semiconductor element (electric element) 101a2 and the element terminal 226d (drain terminal (D)) of the semiconductor element (electric element) 101c2.

[0321] As in the above embodiments, the present invention can simultaneously test or evaluate a plurality of semiconductor elements (electrical elements) 101. Further, the present invention can perform electrical connection by mounting each semiconductor element (electrical element) and conduct good tests and evaluations even when the terminal pitches of the semiconductor elements (electrical elements) 101 are different, when the terminal pitches are mixed, or when semiconductor elements (electrical elements) with different numbers of terminals are mixed.

[0322] The pressing (metal) tool 352 of the present invention is configured to be able to apply and supply a gate signal voltage to the gate terminals (base terminals) of different semiconductor elements (electrical elements) 101. Further, it is possible to measure leakage current or the like flowing through the gate terminals.

[0323] A connection wiring or connection part for connecting a signal applied to the gate terminal is formed or configured on the pressing (metal) tool 352. The pressing (metal) tool 352 can adjust or control the pressure applied to the element terminal 226 by the buffer material 356.

[0324] By appropriately adjusting the flexibility and thickness of the buffer material 356, the pressure applied to the element terminal 226 can be adjusted or controlled. The above matters are the same or similar in the case of the buffer material 355.

[0325] The pressing (metal) tool 351 functions to connect adjacent electrical elements (transistors) 101 in series or in parallel. The element terminals 226 of different semiconductor elements (electrical elements) 101 are clamped on the end faces at both ends of the pressing (metal) tool 351, and the element terminals 226 of different semiconductor elements (electrical elements) 101 are electrically connected. When the electrical element (transistor) 101 is not arranged at an adjacent position, it has a function of relaying a current or voltage such as a test current Id. That is, it functions as a short-circuiting tool.

[0326] A pressing (metal) fixture 353 or a pressing (metal) fixture 354 is arranged at the final stage or the initial stage, and a test current Id or a test voltage Vd is supplied or applied. In the embodiment of FIG. 19, the pressing (metal) fixture 353 is connected to the drain terminal 226d of the semiconductor element (electric element) 101a1. The pressing (metal) fixture 354 is connected to the source terminal 226s of the semiconductor element (electric element) 101c2.

[0327] As described above, the present invention can test various semiconductor elements (electric elements) 101 by combining a plurality of pressing (metal) fixtures 351 and pressing (metal) fixtures 352 to form a contact mechanism with the element terminal 226, and can test or evaluate any number of semiconductor elements (electric elements) 101. FIG. 24 is an explanatory view showing, in a perspective view, the configuration of the semiconductor element test apparatus of FIG. 20 and the state in which the semiconductor element (electric element) 101 is mounted and arranged.

[0328] In FIG. 24, a buffer material 356 is inserted and arranged at the arrow portion. The same applies to the buffer material 355. The symbol A portion of the pressing (metal) fixture 352 is configured in a plane. A pressing plate 321 is arranged on the A portion, and the pressing plate 321 is pressed by a pressing head 322. The element terminal 226 is pressed and electrically connected by the pressing of the pressing plate 321. The connection pressure can be arbitrarily set according to the flexibility and thickness of the buffer material 356. The buffer material 356 is adjusted according to the thickness of the pins of the element terminal 226. Since the buffer material 355 and the buffer material 356 are also described in FIGS. 18(b) and 18(c), the description is omitted.

[0329] For positioning the semiconductor element (electric element) 101, as shown in FIG. 25, a mounting plate 324 is used. As shown in FIG. 25, insertion holes 372 for inserting the element terminals 226 of the semiconductor element (electric element) 101 are formed in the mounting plate 324.

[0330] Position the mounting plate 324 such that the insertion holes 372 are mechanically positioned at the clamping portion between the pressing fitting 531 and the pressing fitting 532, etc. The positioning can be accurately performed based on the end face of part A and the size of the pressing fitting 531. With the clamping interval between the pressing fitting 531 and the pressing fitting 532, etc. widened, insert the element terminal 226 of the semiconductor element (electric element) 101 into the insertion hole 372 of the mounting plate 324.

[0331] FIG. 26 shows an embodiment of mounting the semiconductor element (electric element) 101c. The mounting plate 324 is formed with insertion holes 372 so as to match the number (4) of the element terminals 226 of the semiconductor element (electric element) 101c.

[0332] As shown in FIG. 26, form or arrange the insertion holes 372 in the mounting plate 324 to match the shape and type of the semiconductor element (electric element) 101 to be tested. Also, prepare a mounting plate 324 having insertion holes 372 adapted to the shape and type of the semiconductor element (electric element) 101.

[0333] Therefore, by replacing the mounting plate 324 corresponding to the semiconductor element (electric element) 101 to be tested, the semiconductor element (electric element) 101 can be accurately arranged and a good electrical connection can be achieved with the element terminal 226.

[0334] FIG. 27 is a configuration diagram of the mounting plate 324 when three semiconductor elements (electric elements) 101 are mounted. FIG. 27(a) shows an embodiment of mounting the semiconductor element (electric element) 101a, the semiconductor element (electric element) 101b, and the semiconductor element (electric element) 101c. FIG. 27(b) shows an embodiment of mounting three semiconductor elements (electric elements) 101. FIG. 27(c) shows an embodiment of mounting one semiconductor element (electric element) 101a and two semiconductor elements (electric elements) 101.

[0335] As described above, the insertion holes 372 formed in the mounting plate 324 are formed corresponding to the element terminal pitch and the number of the semiconductor elements (electrical elements) 101 to be tested. A test apparatus for testing any semiconductor element (electrical element) 101 can be configured.

[0336] When the element terminals 226 of the semiconductor element (electrical element) 101 are inserted, the resin package portion of the semiconductor element (electrical element) 101 is in a state of being loaded on the mounting plate 324 (a state in which the element terminals 226 are completely inserted).

[0337] Therefore, the insertion lengths of the element terminals 226 of the semiconductor element (electrical element) 101 can be made to match, and the semiconductor element (electrical element) 101 can be stably arranged.

[0338] The embodiment of FIG. 27 was an embodiment in which three semiconductor elements (electrical elements) 101 were mounted (loaded). The present invention is not limited to this, and any configuration can be applied as long as it is a mounting plate 324 on which one or more are mounted. FIG. 28 is an embodiment of a mounting plate 324 on which n (n is a positive number of 1 or more) semiconductor elements (electrical elements) 101 are mounted (loaded) as an example.

[0339] FIG. 28(a) is an embodiment of a mounting plate 324 on which three types of semiconductor elements (electrical elements) 101a, 101b, and 101c are mounted (loaded). FIG. 28(b) is an embodiment of a mounting plate 324 on which two types of semiconductor elements (electrical elements) 101b and 101c are mounted (loaded). FIG. 28(c) is an embodiment of a mounting plate 324 on which one type of semiconductor element (electrical element) 101b is mounted (loaded).

[0340] The embodiments of FIGS. 7 and 16 were embodiments in which the element terminals 226 of the semiconductor element (electrical element) 101 were sandwiched between two printed circuit boards 183. Also, FIGS. 17 and the like were embodiments in which the element terminals 226 were sandwiched between pressing (metal) fittings. The present invention is not limited to this. Needless to say, the matters and examples described with reference to FIGS. 1 to 16 are also applicable to the examples of FIGS. 49 to 74. FIG. 29 shows an example in which the element terminals 226 of a semiconductor element (electric element) 101 are held between a printed circuit board 183 and a pressing (metal) fitting.

[0341] In FIG. 29, a pressing (metal) fitting 352a is electrically connected to the gate terminal 226g of a semiconductor element (electric element) 101a. A pressing (metal) fitting 352b is electrically connected to the gate terminal 226g of a semiconductor element (electric element) 101b1. A pressing (metal) fitting 352c is electrically connected to the gate terminal 226g of a semiconductor element (electric element) 101b2.

[0342] A contact pattern 161c1 on a printed circuit board 183a is electrically connected to the drain terminal 226d of a semiconductor element (electric element) 101a. A contact pattern 161d1 on a printed circuit board 183a is electrically connected to the source terminal 226s of a semiconductor element (electric element) 101a. A contact pattern 161c2 on a printed circuit board 183a is electrically connected to the drain terminal 226d of a semiconductor element (electric element) 101b1.

[0343] A contact pattern 161d2 on a printed circuit board 183a is electrically connected to the source terminal 226s of a semiconductor element (electric element) 101b1. A contact pattern 161c3 on a printed circuit board 183a is electrically connected to the drain terminal 226d of a semiconductor element (electric element) 101b2. A contact pattern 161d3 on a printed circuit board 183a is electrically connected to the source terminal 226s of a semiconductor element (electric element) 101b2.

[0344] The gate terminal 226g of a semiconductor element (electric element) 101a is held between a contact pattern 161b1 on a printed circuit board 183a and a pressing (metal) fitting 352a. The drain terminal 226d of a semiconductor element (electric element) 101a is held between a contact pattern 161c1 on a printed circuit board 183a and a pressing (metal) fitting 359a. The source terminal 226s of a semiconductor element (electric element) 101a is held between a contact pattern 161d1 on a printed circuit board 183a and a pressing (metal) fitting 357a.

[0345] The gate terminal 226g of the semiconductor element (electric element) 101b1 is sandwiched between the contact pattern 161b2 of the printed circuit board 183a and the pressing (metal) tool 352b. The drain terminal 226d of the semiconductor element (electric element) 101b1 is sandwiched between the contact pattern 161c2 of the printed circuit board 183a and the pressing (metal) tool 359b. The source terminal 226s of the semiconductor element (electric element) 101b1 is sandwiched and held between the contact pattern 161d2 of the printed circuit board 183a and the pressing (metal) tool 357b.

[0346] The gate terminal 226g of the semiconductor element (electric element) 101b2 is sandwiched between the contact pattern 161b3 of the printed circuit board 183a and the pressing (metal) tool 352c. The drain terminal 226d of the semiconductor element (electric element) 101b2 is sandwiched between the contact pattern 161c3 of the printed circuit board 183a and the pressing (metal) tool 359c. The source terminal 226s of the semiconductor element (electric element) 101b2 is sandwiched and held between the contact pattern 161d3 of the printed circuit board 183a and the pressing (metal) tool 357c.

[0347] The contact pattern 161d1 and the contact pattern 161c2 of the printed circuit board 183a are connected by a pattern. Therefore, the source terminal 226s of the semiconductor element (electric element) 101a and the drain terminal 226d of the semiconductor element (electric element) 101b1 are connected.

[0348] The contact pattern 161d2 and the contact pattern 161c3 of the printed circuit board 183a are connected by a pattern. Therefore, the source terminal 226s of the semiconductor element (electric element) 101b1 and the drain terminal 226d of the semiconductor element (electric element) 101b2 are connected.

[0349] Also, the drain terminal 226d of the semiconductor element (electric element) 101a is connected to the connection wiring 211b, and the source terminal 226s of the semiconductor element (electric element) 101b2 is connected to the connection wiring 211a.

[0350] As described above, a semiconductor test apparatus can be configured with the printed circuit board 183 and the pressing (metal) fitting. A pattern for connecting the printed circuit board 183 is formed or configured corresponding to the type of the semiconductor element (electric element) 101 to be tested. By commonly using the pressing (metal) fitting 352, cost reduction can be achieved.

[0351] Also in the embodiment of FIG. 29, the content described in FIGS. 16, 18, etc. is common or similar, so the description is omitted. Needless to say, the embodiment of FIG. 29 can also be applied to other embodiments such as FIGS. 64 and 70.

[0352] FIGS. 30 and 31 are explanatory views of the configuration, function, and operation of the pressing tool 325 that presses the pressing plate 321. The pressing tool 325 is screwed to a base 365 (not shown) through a mounting hole 363. The pressing plate 321 is pressed by a pressing head 322. The pressing head 322 is connected or attached to an arm 361. As shown in FIG. 32 etc., the arm 361 moves up and down. By pushing down the arm 361, the arm extends forward and the pressing head 322 presses the pressing plate 321.

[0353] As shown in FIG. 30, a plurality of pressing tools 325 are arranged for one pressing plate 321. When the pressing plate 321 is short and the pressing plate 321 can be pressed at one location, one pressing tool 325 is arranged.

[0354] As shown in FIG. 31, in the semiconductor test apparatus of the present invention, a group of electric elements 102 (group of electronic elements, group of electric components, group of electronic components, group of transistors 102) for performing a plurality of tests is arranged on a base 365 (not shown). Insertion holes 372 are formed in the mounting plate 324 corresponding to the positions of the element terminals 226 of the transistor 101.

[0355] A pressing (metal) fitting or a printed circuit board 183 is arranged in the group of transistors 102 (group of transistors 102a, group of transistors 102b, group of transistors 102c). The group of transistors 102 is pressed by the pressing plates 321 and 323 and connected to the element terminals 226. The pressing plate 321 and the like are pressed by the pressing tool 325. In the embodiment of FIG. 31, the pressing plate 321 is pressed using two pressing tools 325 each.

[0356] FIG. 32 is an explanatory diagram for explaining the operation and mechanism of the pressing tool 325. For ease of understanding, a part of FIG. 32 is shown in a cross-sectional shape. The pressing tool 325 is attached to the base 365. The attachment is fixed by inserting a bolt or the like into the attachment hole 363 of the attachment tool 362.

[0357] The element terminal 226 of the printed circuit board 183 or the semiconductor element (electrical element) 101 sandwiched between the pressing (metal) tools is pressed through the pressing plate 323 and the pressing plate 321 and electrically connected. The pressing plate 321 is pressed by the pressing head 322 of the pressing tool 325. By pushing down the lever 364, the arm 361 extends and strengthens the pressure on the pressing plate 321. By lifting the lever 364, the arm 361 contracts and weakens the pressure on the pressing plate 321.

[0358] With the lever 364 lifted, the element terminal 226 of the semiconductor element (electrical element) 101 is inserted into the insertion hole 372 of the arranged mounting plate 324 to position the semiconductor element (electrical element) 101. Next, by pushing down the lever 364, the pressing plate 321 is pressed to apply pressure to the element terminal 226 of the semiconductor element (electrical element) 101 to clamp it and maintain a stable electrical connection.

[0359] Two connection wirings 211a are connected to the pressing (metal) tool 354. Two connection wirings 211b are connected to the pressing (metal) tool 353. By terminating the two connection wirings to each pressing (metal) tool, the connection resistance can be reduced and connections can be easily made at multiple locations.

[0360] FIGS. 30 and 31 were embodiments in which a plurality of pressing tools 325 were arranged on one pressing plate 321. FIG. 33 is an embodiment in which four pressing tools 325a (pressing tool 325a1, pressing tool 325a2, pressing tool 325a3, pressing tool 325a4) are arranged on the pressing plate 321. The mounting plate 324 uses the mounting plates 324a and 324b.

[0361] Therefore, the process of mounting the transistor 101a on the mounting plate 324a and the process of mounting the transistor 101b on the mounting plate 324b can be separately performed.

[0362] FIG. 34 is an embodiment in which a spring (elastic object, spring, coil, buffer, elastic body) is disposed between a buffer plate (buffer material, buffer portion, buffer tool, buffer means) 385a and a buffer plate 385b on the front surface of the pressing plate 321. A regulating plate 355 (regulating plate 355a, regulating plate 355b) defines the minimum distance between the buffer plate 385a and the buffer plate 385b. Therefore, the pressure in the spring 383 is prevented from exceeding a certain value. The regulating plate 355 may be made of or formed of a flexible material.

[0363] The pressing tools 325a and 325b are connected by a connecting portion 386 to maintain or hold a certain distance between the pressing tools 325a and 325b. Also, the pressing force can be set to a uniform predetermined value. A positioning post 381 is attached to the pressing plate 323.

[0364] By connecting or arranging the pressing tools 325a and 325b with the connecting portion 386, a plurality of pressing tools 325 can simultaneously and uniformly apply or supply pressure to the pressing plate 323. The positioning post 381 is inserted into a hole of the positioning hole 382 to accurately set and maintain the positional relationship between the pressing plate 323 and the pressing plate 321. Also, an element terminal 226 is sandwiched between the printed circuit boards 183a and 183b to maintain an electrically connected state. Further, the pressure and the positional relationship can be adjusted by an adjusting portion 384. It goes without saying that the configuration, mechanism, and operation of the positioning post 381 and the positioning hole 382 can also be applied to other embodiments of the present invention. Also, it goes without saying that a part or all of them can be combined with other embodiments.

[0365] In FIGS. 34 and 35, although illustrated as an example using the printed circuit board 183 as in the examples of FIGS. 7 and 16, the present invention is not limited thereto. Needless to say, as illustrated in FIGS. 17 and 19, a pressing (metal) fitting may be used.

[0366] As illustrated in FIG. 35, also in the example of FIG. 34, as described in the examples of FIGS. 25 and 26, a mounting plate (component positioning plate) 324 is arranged or used. The element terminal 226 of the semiconductor element (electric element) 101 is inserted into the insertion hole 372 and sandwiched between the printed circuit board 183 and the pressing (metal) fitting. Needless to say, the examples of FIGS. 29 to 35 of the present invention can be applied to the examples of FIGS. 49 to 74.

[0367] Needless to say, the examples, configurations, methods, etc. described in FIGS. 1 to 16, FIGS. 30 to 35, etc. can be applied to the examples of FIGS. 49 to 74. Also, needless to say, some or all of the present invention can be combined with other examples of the present invention. Matters that are the same as or similar to those of other examples, and matters that are unnecessary for the description are omitted.

[0368] As illustrated in FIG. 49, the semiconductor element (electric element) and the mounting portion of the present invention are arranged in the case 801. Fans 227 (coolers 227) are arranged at both ends of the case 801. Although not shown in the figure, the fan 227 has a shutter mechanism.

[0369] The fan 227a introduces outside air into the case 801. It is preferable to use an inert gas such as nitrogen or argon as the outside air. Also, it is preferable to use dry air.

[0370] A filter 803a is arranged on the outside air intake side of the fan 227a to prevent dust from the outside of the case 801 from entering. The fan 227b discharges air from the case 801 to the outside of the case 801. A filter 803b is arranged on the outside air discharge side of the fan 227b. The rotation directions of the fans 227a and 227b can be switched. That is, when the fan 227b is used as the intake side, the fan 227a can be used as the exhaust fan. In addition, for the air inhaled by the fan 227, a device for generating heated or cooled air is arranged outside so that heated or cooled air can be inhaled. A plate for heating or cooling the semiconductor element (electrical element) 101 is arranged in the case 801.

[0371] The fan 227 attached to the case 801 is designed or set to be removable. When the fan 227 is removed, the hole of the fan 227 can be blocked with a lid, and the case 801 can be sealed.

[0372] A door 802 is arranged on the case 801. As shown in FIG. 50, by opening the door 802, the semiconductor element (electrical element) 101 can be attached to or removed from the mounting plate 324.

[0373] The test device of the present invention described with reference to FIGS. 33, 34, 35, etc. can be arranged or detached, the semiconductor element (electrical element) 101 to be tested can be removed / attached, wiring can be connected to the connector 811, and operations such as operating the lever 364 can be performed. When the lever 364 is not closed, a detection switch for detecting the opening and closing state of the lever 364 is arranged so that the test is not started.

[0374] The door 802 is controlled by an electromagnetic switch (electromagnetic lock switch) so that it cannot be opened when the test current Id is supplied during the test of the semiconductor element (electrical element) 101.

[0375] As shown in FIG. 50, the fan 227 can be removed from the case 801, the case 801 can be sealed, and dry air can be injected into the case. The dry air is injected into the case 801 from the inlet / outlet pipe 815a. Also, the air in the case 801 is discharged from the inlet / outlet pipe 815b.

[0376] A dew point meter or a temperature and humidity meter 814 is disposed inside the case 801. The temperature and humidity meter 814 measures the temperature and humidity inside the case 801, and the measured temperature and humidity are transmitted as data to the controller circuit 111. The controller circuit 111 controls the amount of dry air input and the amount of dry air discharged from the inlet / outlet pipe 815 based on the received temperature and humidity.

[0377] In the case of a specification in which a heat sink 805 is formed on the semiconductor element (electrical element) 101 for which the test is to be carried out, as shown in FIG. 81, a connecting fitting 804 for connecting to the heat sink 805 is attached.

[0378] As one embodiment of the test, when the fan 227 (fan 227a, fan 227b) is performing a test in which a test current and a test voltage are applied to the semiconductor element (electrical element) 101, the fan 227 is stopped. When the test of the semiconductor element (electrical element) 101 is completed and the semiconductor element (electrical element) 101 is cooled (heat dissipated), the fan 227 is operated. In the semiconductor element test apparatus of the present invention, the rotation detection of the fan 227 is carried out by a Programmable Logic Controller (PLC). For example, during heat dissipation, if the fan 227 has stopped, it is determined as a failure and the test is stopped. Also, during the test, if the fan 227 is rotating, it is detected as an abnormality and the test is stopped.

[0379] FIG. 75 is an explanatory diagram regarding the control method of the fan 227. The controller circuit 111 detects the speed / stop of the fan 227. The rotational speed of the fan 227 is acquired, and the stop determination of the fan and the detection of the air volume change are carried out.

[0380] By independently controlling the rotation speed of fan 227a and the rotation speed of fan 227b, the air volume within case 801 can be controlled. For example, if the speed of fan 227b that exhausts the air within case 801 is decreased and the speed of fan 227a that intakes the air into case 801 is increased to a high speed, the air pressure within case 801 can be increased, and also the temperature within case 801 can be increased. If the speed of fan 227b that exhausts the air within case 801 is increased and the speed of fan 227a that intakes the air into case 801 is increased to a high speed, the air pressure within case 801 can be increased, and also the temperature within case 801 can be increased.

[0381] Connect the output of the fan control unit 761 of fan 227 to the control interface (I / F) 763, and perform pulse counting and fan rotation speed calculation in the fan control unit 761 application. Since the fan control unit 761 outputs a rectangular wave with two cycles per fan rotation, the fan control unit 761 counts the number of pulses per unit time (1 second) to obtain the rotation speed. When the fan stops during the test, an alarm is generated from the alarm 764 during the test.

[0382] Regarding the detection of the air volume change during the test, the change in the fan rotation speed is used. As shown in FIGS. 76 and 77, register the upper and lower change rate limits with respect to the fan rotation speed at the start of the test in advance on the setting screen of the fan control unit 761 or the application.

[0383] Based on the rotation speeds of FAN (fan) 1 and FAN (fan) 2 at the start of the test as reference values, determine the upper and lower limit values of the fan rotation speed during the test from the set upper and lower change rate limits. The determined upper and lower limit values are displayed in the item of the upper and lower limit values of the fan rotation speed on the screen of the fan control unit 761.

[0384] The fan control unit 761 monitors the FAN (fan) rotation speed during the test. When the measured rotation speed exceeds the upper and lower limit values, it is determined that there is an air volume change, and an alarm is generated from the alarm 764. The control software (application) monitors this alarm and stops the test. Measure the fan rotation speed at the start of the test and use it as the reference value. Upper limit value of fan rotation speed = Fan rotation speed at the start of the test + (Fan rotation speed at the start of the test × Upper limit of fan rotation speed change rate / 100) Based on the fan rotation speed at the start of the test, the lower limit of the fan rotation speed during the test is obtained by the following formula. Lower limit value of fan rotation speed = Fan rotation speed at the start of the test - (Fan rotation speed at the start of the test × Lower limit of fan rotation speed change rate / 100) When the current value of the measured fan rotation speed exceeds the upper and lower limit values, the fan control unit 761 generates an alarm.

[0385] The PC app (control software) monitors this alarm and stops the test. The PC app (control software) records the rotation speed of the fan during the test in the log file as debug information.

[0386] When starting the test device, confirm that the semiconductor element (electrical element) to be tested is installed. When the semiconductor element (electrical element) is not installed, confirm that the measurement terminals are not short-circuited to the main body.

[0387] Confirm that the start breaker of the semiconductor element test device is ON. The device main body will not start when the start breaker is not ON. Also, monitor and measure the temperature inside the case 801. If the temperature is not within the predetermined range, do not start the test. The semiconductor element test device of the present invention sets the upper and lower limits of the FAN (fan) rotation speed change rate (%) in FIG. 76, and also sets the upper and lower limit values of the FAN (fan) rotation speed. Also, as shown in FIG. 77, set the following test time. "Measurement delay": The waiting time from when the power is OFF to when the temperature is measured (other than when measuring the temperature-sensitive diode). "Power-on delay": The delay time from when the previous device is powered off to when the next device (such as the semiconductor element 117 to be tested) is powered on. "Power-on time": The power-on time. "Power-off time": The time from when the device is powered off to when it is powered on again. When the app is off from the above time or there is an abnormality, the confirmation lamp 530 is lit and an alarm is issued from the alarm device 764. The test device of the present invention has a function of automatically performing a connection check in order to confirm whether the mounted semiconductor element (electrical element) is correctly connected.

[0388] As an example, the heat sink 805 is connected to the collector terminal of the semiconductor element (electrical element) 101. By attaching the connection fitting 804 to the heat sink 805, the collector potential is stabilized and the shielding effect is exhibited.

[0389] As shown in FIGS. 51(a) and 51(b), the connection fitting 804 has a clip shape and is arranged so as to sandwich the heat sink 805 of the semiconductor element (electrical element) 101. A connection wiring 211 is connected to the connection fitting 804, and one end of the connection wiring 211 is connected as a connection terminal 806 to the supply wiring of the collector voltage. The connection fitting 804 shields the semiconductor element (electrical element) 101.

[0390] FIG. 54 is a configuration diagram and an explanatory diagram of a connection portion between the lead pins 226 (element terminals, lead terminals, connection portions) of the semiconductor element (electrical element) 101 to be tested and the like in an embodiment of the semiconductor element (electrical element) test device of the present invention.

[0391] The spring contact portion 807a is connected to the contact pattern 161a of the printed circuit board 183a by solder 810a. The spring contact portion 807b is connected to the contact pattern 161b of the printed circuit board 183b by solder 810b. At least one of the contact pattern 161a and the contact pattern 161b has a connector 811 arranged or connected thereto. A test current Id and an on / off signal of the semiconductor element (electrical element) 101 are applied or supplied via the connector 811.

[0392] The connection between the spring contact portion 807 and the contact pattern 161 is not limited to solder 810. Conductive paste may be used for connection. The spring contact portion 807 and the contact pattern 161 may be fused by electrical discharge machining. The spring contact portion 807 and the contact pattern 161 may be welded by welding. The spring contact portion 807 and the contact pattern 161 may be fitted together. The electrical connection between the spring contact portion 807 and the contact pattern 161 may be implemented using any technique.

[0393] As shown in FIG. 54(b), by narrowing the distance D between the printed circuit board 183a and the printed circuit board 183b, the distance between the spring contact portion 807a and the spring contact portion 807b can be changed, and the pressure for sandwiching the element terminal (lead pin) 226 of the semiconductor element (electric element) 101 by the spring contact portion 807 can be changed. Although not shown, a pressure gauge is provided to measure the pressing pressure.

[0394] Examples of the material of the spring contact portion 807 include copper alloy materials such as brass, phosphor bronze, nickel silver, and beryllium copper. In the case of phosphor bronze, it is preferable to adopt C5210 material. Copper alloys have high conductivity. As the material of the spring contact portion 807, non-magnetic properties, corrosion resistance, etc. are also good. In addition, carbon steel, stainless steel, nickel alloy, and titanium alloy are exemplified. The thickness of the spring contact portion 807 is preferably 0.3 mm or more and 0.6 mm or less.

[0395] The surface of the spring contact portion is subjected to plating treatment. Examples of the plating include zinc plating, tin plating, and silver plating. Further, it is preferable to form a gold thin film on the surface of the plating.

[0396] Zinc plating has excellent corrosion resistance, but has a property of being more prone to rust than iron with respect to moisture. Zinc itself dissolves to become zinc hydroxide (white rust), but prevents the corrosion of iron during corrosion. Chromate treatment may be performed as a post-treatment.

[0397] Tin plating has the lowest melting point and extremely excellent solderability. Tin maintains its conductivity even when corroded. For RoHS compliance in solder plating, tin plating is used as a lead-free solder replacement plating. Tin plating preferably has nickel plating as an undercoat for whisker prevention.

[0398] For small batch production of the spring contact part 807, it is manufactured using a processing machine that does not require a mold. The material is cut using a laser cutting machine or turret punch (turret punch), and drilling is performed. Bending is processed using a press brake.

[0399] Processing methods are classified into two types: hot forming and cold forming. Hot forming is a method mainly processed at high temperatures of 900 to 1200 degrees, reaching a high temperature above the recrystallization temperature of the metal, making processing easier. It is immediately quenched (quenched) after processing. Hard steel is formed through the quenching process. After that process, it is reheated to a predetermined temperature and tempering is performed.

[0400] Cold forming is a method mainly processed at 720°C or lower and has the characteristic of making the metal structure of steel denser. Since excessive heat is not applied to the metal, high-precision processing can be achieved. Work hardening of the metal is promoted and the material itself hardens. When the processing becomes excessive, internal strain occurs, resulting in "accumulation of residual stress" and "decrease in adhesion strength". To relieve the residual stress, low-temperature annealing is performed.

[0401] Figure 52 is a structural diagram and explanatory diagram of the spring contact part 807. As an embodiment, Figure 52 has a configuration corresponding to the shape (arrangement) of the contact pattern 161 of the printed circuit board 183 shown in Figure 3.

[0402] It goes without saying that the embodiments of the present invention described below can apply the embodiments and configurations described in Figures 1 to 16, Figures 30 to 35, etc. Also, it goes without saying that some or all of the present invention can be combined with other embodiments of the present invention. Also, matters similar or similar to other embodiments, as well as matters unnecessary for the description, are omitted.

[0403] The spring contact part 807 is composed of a contact part 807G and a common part 807M. The contact part 807G is made common during manufacturing with the common part 807M. The contact part 807G and the common part 807M are integrally manufactured (formed). After connecting (mounting) the contact part 807G to the printed circuit board 183, the common part 807M is cut along the line AA’, separating the contact part 807G from the common part 807M. By separating them, the spring contact part 807a, the spring contact part 807b, the spring contact part 807c, and the spring contact part 807 are separated. A V-groove is formed in the AA’ part. By bending the common part 807M along the V-groove, the common part 807M can be easily separated.

[0404] As shown in Fig. 53(a), in a state where the contact part 807G and the common part 807M are integrally formed, it is mounted on the printed circuit board 183a. Holes (not shown) are formed at the four corners of the spring contact part 807 connected by the common part 807M. Also, at the four corners of the printed circuit board 183a, convex columns (not shown) corresponding to the holes (not shown) at the four corners of the spring contact part 807 are formed. Insert the holes (not shown) at the four corners of the spring contact part 807 connected by the common part 807M into the convex columns (not shown) at the four corners of the printed circuit board 183a and fix them integrally.

[0405] In the printed circuit board 183, paste solder (such as cream solder) is printed and applied at the location shown by the dotted line in Fig. 53. Next, the spring contact part 807 is arranged on the printed circuit board 183.

[0406] By inserting the holes (not shown) at the four corners of the spring contact part 807 into the convex columns (not shown) at the four corners of the printed circuit board 183a on which paste solder (such as cream solder) is printed, the spring contact part 807 is positioned on the printed circuit board 183.

[0407] After positioning, the printed circuit board 183 and the spring contact part 807 are inserted into a reflow oven, and the paste solder (cream solder) melts, connecting the printed circuit board 183 and the spring contact part 807.

[0408] The spring contact portion 807 has a V-groove formed in the AA' line portion. By bending the common portion 807M having the V-groove formed in the AA' portion with the V-groove, the common portion 807M can be easily separated. Or, laser processing is performed on the V-groove for cutting. Or, the V-groove is processed with a reamer for cutting. Electrically connect with paste solder (cream solder), and after curing the paste solder (cream solder), cut and separate the common portion 807M at the AA' line portion.

[0409] As shown in FIG. 53(b), by separating the common portion 807M from the contact portion 807G, the spring contact portion 807a, the spring contact portion 807b, the spring contact portion 807c, and the spring contact portion 807d are separated. Also, each spring contact portion 807 is electrically independent.

[0410] The spring contact portion 807a is connected to the contact pattern 161a, the spring contact portion 807b is connected to the contact pattern 161b, the spring contact portion 807c is connected to the contact pattern 161c, and the spring contact portion 807d is connected to the contact pattern 161d. The spring contact portion 807a, the spring contact portion 807b, the spring contact portion 807c, and the spring contact portion 807d are each electrically independent. That is, each spring contact portion 807 is insulated from other spring contact portions 807.

[0411] On the printed circuit board 183b as well, similar to the printed circuit board 183a, the spring contact portion 807 is mounted, and the contact portion 807G is separated by bending the common portion 807M with the V-groove. Needless to say, laser light may be irradiated on the V-groove portion for cutting processing.

[0412] As shown in FIG. 55, the printed circuit board 183a with the spring contact portion 807a attached and the printed circuit board 183b with the spring contact portion 807b attached are arranged to face each other.

[0413] A pressing plate 323 is arranged on the side of the printed circuit board 183a, and a pressing plate 321 is arranged on the side of the printed circuit board 183. By pressing from the side of the pressing plate 321 with the pressing head 322, the interval D can be adjusted and set as shown in FIGS. 54(b) and 55. By narrowing the interval D between the printed circuit board 183a and the printed circuit board 183b, the interval between the spring contact portion 807a and the spring contact portion 807b can be changed, and the clamping pressure of the lead pin 226 (element terminal, lead terminal, connection portion) of the semiconductor element (electric element) 101 by the spring contact portion 807 can be changed. The lead pin 226 is clamped and held by the spring contact portion 807a and the spring contact portion 807b.

[0414] Note that, for ease of explanation, symbols of "spring contact portion 807a" and "spring contact portion 807b" are given to the spring contact portion 807a and the spring contact portion 807b in FIG. 55. They are different from the "spring contact portion 807a" and "spring contact portion 807b" in FIG. 53. The "spring contact portion 807a" of the printed circuit board 183a that clamps the lead pin 226 and the "spring contact portion 807b" of the printed circuit board 183b that clamps it are spring contact portions 807 of the same width. For example, both the "spring contact portion 807a" of the printed circuit board 183a and the "spring contact portion 807b" of the printed circuit board 183b that clamps it have a width of W1. The above matters are the same in other embodiments of the present invention.

[0415] A set of spring contact portions 807 that clamp the lead pin 226 uses those of the same width, such as W1, W2, S, etc. The printed circuit boards 183a and 183b are line targets. By arranging the printed circuit boards 183a and 183b facing each other, the lead pin 226 can be clamped by the spring contact portions 807 of the same width.

[0416] The printed circuit board 183 has been described in FIGS. 1 to 8 etc., so the description thereof will be omitted. Also, the circuit configuration, connection method, etc. will be described in FIGS. 9 to 15, and the mechanisms such as the pressing method etc. will be described in FIGS. 16 to 35 etc., and the driving method, test method, etc. will be described in FIGS. 36 to 40 etc., so the description will be omitted. The above matters are the same in other embodiments of the present invention.

[0417] FIG. 56 is a structural diagram and explanatory diagram of the spring contact portion 807. FIG. 56 has a configuration corresponding to the shape (arrangement) of the contact pattern 161 of the printed circuit board 183 shown in FIG. 4. Since other matters, configurations, and contents are the same as those in FIG. 52, the description will be omitted.

[0418] FIG. 57 is a structural diagram and explanatory diagram of the spring contact portion 807. FIG. 57 has a configuration in which the wide spring contact portions 807a and 807c and the narrow spring contact portions 807b and 807d are alternately arranged. Since other matters, configurations, and contents are the same as those in FIG. 52, the description will be omitted. As described above, the spring contact portion 807 formed by being connected to the common portion 807M can be configured in various forms.

[0419] In the embodiment of FIG. 53, paste solder (cream solder) is printed at the location shown by the dotted line in FIG. 53. The printed circuit board 183 and the spring contact portion 807 are inserted into a reflow furnace, the paste solder (cream solder) melts, and the printed circuit board 183 and the spring contact portion 807 are connected.

[0420] The embodiments of FIGS. 58(a) and 58(b) are partial configuration diagrams and explanatory diagrams of the spring contact portion 807. FIG. 58(a) is an embodiment in which dot-shaped holes 808a are formed in the spring contact portion 807c. FIG. 58(b) is an embodiment in which line-shaped holes 808b are formed in the spring contact portion 807c. The dot-shaped holes 808a and the line-shaped holes 808b have a structure that penetrates the front and back of the spring contact portion 807.

[0421] Similar to FIG. 53(a), a spring contact portion 807 (spring contact portion 807c) is mounted on the printed circuit board 183a. Holes (not shown) are formed at the four corners of the spring contact portion 807. Further, convex columns (not shown) corresponding to the holes (not shown) at the four corners of the spring contact portion 807 are formed at the four corners of the printed circuit board 183a.

[0422] In the printed circuit board 183, paste solder (cream solder) is printed at the location shown by the dotted line in FIG. 53. Next, the spring contact portion 807 is disposed on the printed circuit board 183.

[0423] The spring contact portion 807 is positioned on the printed circuit board 183 by inserting the holes (not shown) at the four corners of the spring contact portion 807 into the convex columns (not shown) at the four corners of the printed circuit board 183a. Note that the convex columns and holes may not be formed, and the spring contact portion 807 and the printed circuit board 183 may be sandwiched with a clip or the like and fixed integrally, and the paste solder (cream solder) may be melted.

[0424] In the embodiment of FIG. 58, the paste solder (cream solder) is exposed from the holes 808 (holes 808a, 808b) of the spring contact portion 807 (spring contact portion 807c). The paste solder (cream solder) is heated and melted by irradiating the exposed portion (holes 808, etc.) with laser light (not shown). The paste solder (cream solder) is melted, and the printed circuit board 183 and the spring contact portion 807 are connected.

[0425] In the embodiment of FIG. 58(a), laser light is irradiated onto the dot-shaped hole 808a. In the embodiment of FIG. 58(b), laser light is irradiated onto the line-shaped hole 808b. Therefore, the spring contact portion 807 (spring contact portion 807c) is mounted on the printed circuit board 183 without using a reflow furnace. Further, soldering iron may be used for heating and connection.

[0426] The spring contact portion 807 (spring contact portion 807c) has a V-groove formed in the AA' line portion. By bending the common portion 807M having the V-groove formed in the AA' portion with the V-groove, the common portion 807M can be easily separated.

[0427] As shown in FIG. 58(c), by separating the common portion 807M from the spring contact portion 807c, the spring contact portion 807c is separated and electrically independent. That is, each spring contact portion 807 is insulated from other spring contact portions 807.

[0428] On the printed circuit board 183b as well, similar to the printed circuit board 183a, the spring contact portion 807 is mounted, and the contact portion 807G is separated by bending the common portion 807M in a V-groove. Needless to say, cutting processing may also be performed by irradiating laser light on the V-groove portion.

[0429] In the embodiments of FIGS. 52, 56, and 57, the spring contact portion 807a is mounted on the printed circuit board 183a, and the common portion 807M is cut. The spring contact portion 807b is mounted on the printed circuit board 183b, and the common portion 807M is cut. As shown in FIG. 54(a), it is an embodiment in which the printed circuit board 183a and the printed circuit board 183b are configured to face each other.

[0430] FIG. 59 is a configuration diagram and an explanatory diagram of the spring contact portion 807 in another embodiment. The spring contact portion 807 in FIG. 59 is mainly composed of a contact portion 807U, a common portion M, and a contact portion 807D. That is, the contact portion 807U and the contact portion 807D are integrally formed by the common portion 807M.

[0431] By cutting along the line A1A1', the contact portion 807U is separated from the common portion 807M. By cutting along the line A2A2', the contact portion 807D is separated from the common portion 807M. The shapes and structures of the contact portion 807U and the contact portion 807D are the same as or similar to the contact portion 807G in FIG. 52.

[0432] As shown in FIG. 59, the spring contact portion 807 is composed of a contact portion 807U, a common portion 807M, and a contact portion 807D. The contact portion 807U of the spring contact portion 807 is arranged on the printed circuit board 183b. The contact portion 807D of the spring contact portion 807 is arranged on the printed circuit board 183a. FIG. 60 is an explanatory diagram of a method for mounting or connecting the spring contact portion 807 of FIG. 59 to the printed circuit boards 183a and 183b.

[0433] As shown in FIG. 60, the spring contact portion 807 is mounted on the printed circuit boards 183a and 183b. Holes (not shown) are formed at the four corners of the contact portion 807U, and holes (not shown) are formed at the four corners of the contact portion 807D. In addition, convex columns (not shown) corresponding to the holes (not shown) of the spring contact portion 807 are formed at the four corners of the printed circuit board 183a and the four corners of the printed circuit board 183b. Instead of forming the convex columns and holes, the spring contact portion 807 and the printed circuit board 183 may be sandwiched with a clip or the like and fixed integrally, and the paste solder (cream solder) may be melted.

[0434] On the printed circuit boards 183a and 183b, paste solder (cream solder) is printed at the locations shown by the dotted lines in FIG. 60. Next, the spring contact portion 807 is disposed on the printed circuit boards 183a and 183b.

[0435] By inserting the holes (not shown) of the spring contact portion 807 into the convex columns (not shown) at the four corners of the printed circuit board 183a and the convex columns (not shown) at the four corners of the printed circuit board 183b, the spring contact portion 807 is positioned on the printed circuit board 183. After positioning, the printed circuit board 183 and the spring contact portion 807 are inserted into a reflow furnace, the paste solder (cream solder) is melted, and the printed circuit board 183 and the spring contact portion 807 are connected.

[0436] After connecting (mounting) the contact portion 807U to the printed circuit board 183b, it is cut along the line A1A1', and the common portion 807M is separated. After connecting (mounting) the contact portion 807D to the printed circuit board 183a, it is cut along the line A2A2', and the common portion 807M is separated. By bending the common portion 807M, in which V-grooves are formed at the portions A1A1' and A2A2', along the V-grooves, the common portion 807M can be easily separated.

[0437] The configuration of FIG. 60 can simultaneously mount the spring contact portion 807U on the printed circuit board 183a and the spring contact portion 807D on the printed circuit board 183b as compared with the configuration of FIG. 53. Therefore, the production time can be shortened, and the positioning accuracy during manufacturing is also high. Needless to say, the configuration and method of FIG. 58 can be applied to FIG. 59.

[0438] The spring contact portion 807 is separated by bending the common portion 807M with a V-groove. Needless to say, cutting processing may also be performed by irradiating a laser beam on the V-groove portion. Reaming may also be performed.

[0439] As shown in FIG. 55, the printed circuit board 183a with the spring contact portion 807a attached and the printed circuit board 183b with the spring contact portion 807b attached are arranged facing each other. The embodiment of FIG. 54 etc. has a configuration in which the lead pin 226 of the semiconductor element (electric element) 101 is clamped at one location of the spring contact portion 807 to establish electrical connection. FIGS. 61 and 62 are configuration diagrams and configuration diagrams of an embodiment having a configuration in which the lead pin 226 is clamped by a plurality of contact portions of the spring contact portion 807.

[0440] FIG. 61 is an embodiment in which a spring contact portion 807 having a plurality of convex portions 812 on the contact pattern 161 is mounted or arranged. The convex portion 812 is formed, for example, by pressing a copper plate serving as a base material. The interval between adjacent convex portions 812 is preferably formed or configured to be 2 mm or more and 10 mm or less. The height of the convex portion 812 is preferably formed or configured to be 1 mm or more and 8 mm or less.

[0441] The convex portion 812 is not limited to a horizontal line shape. For example, it may be formed or configured in a dot shape. Needless to say, the convex portion 812 may have a plurality of heights. As shown in FIG. 62, the convex portion 812 is not limited to an arc shape and may be rectangular. The convex portion 812 is given spring properties. Since the material, surface treatment, etc. constituting the convex portion 812 have been described in the spring contact portion 807 such as in FIG. 52, they are omitted.

[0442] Needless to say, the pitch (interval) of the convex portions 812 may be varied in the contact pattern 161. The convex portions 812 change in shape within the range where they can return by the lead pins 226, and the lead pins 226 are clamped by a plurality of convex portions 812.

[0443] The embodiment of FIG. 61(a) is an embodiment in which the positions of the convex portions 812 are aligned between adjacent contact patterns 161. When inserting the lead pins 226 into the convex portions 812 of different contact patterns 161 (contact pattern 161a, contact pattern 161b, contact pattern 161c), the pressure required at the time of the first pressure insertion becomes uniform, and the insertion adjustment of the lead pins 226 becomes easy.

[0444] In FIGS. 61, 65, 67, 68, etc., it is expressed as the contact pattern 161 in the same manner as in other embodiments, but the contact pattern 161 is used in the meaning of an electrode or a conductive film.

[0445] The embodiment of FIG. 61(b) is an embodiment in which the positions of the convex portions 812 are different between adjacent contact patterns 161. The positions of the convex portion 812a of the contact pattern 161a and the convex portion 812b of the contact pattern 161b are different. The positions of the convex portion 812b of the contact pattern 161b and the convex portion 812c of the contact pattern 161c are different. By varying the positions of adjacent convex portions 812, even if adjacent convex portions 812 are deformed, the occurrence of contact is suppressed. Also, in the semiconductor element (electric element) 101, adjacent lead pins 226 can be stably held.

[0446] FIG. 62 is a configuration diagram and an explanatory diagram in a state where the two spring contact portions 807a and 807b described in FIG. 61 are arranged facing each other and the lead pins 226 are clamped. The spring contact portion 807a and the spring contact portion 807b are spring contact portions having the same width.

[0447] On the printed circuit board 183a, a contact pattern 161a is formed, and a spring contact portion 807a is mounted or arranged on the contact pattern 161a. The convex portions 812 of the spring contact portion 807a are formed in a periodic shape, and the spring contact portion 807 and the contact pattern 161 are connected by solder 810a between the convex portions 812. A plurality of convex portions 812 are formed or arranged on the spring contact portion 807a.

[0448] On the printed circuit board 183b, a contact pattern 161b is formed, and a spring contact portion 807b is mounted or arranged on the contact pattern 161b. The convex portions 812 of the spring contact portion 807b are formed in a periodic shape, and the spring contact portion 807 and the contact pattern 161 are connected by solder 810b between the convex portions 812.

[0449] The connection between the spring contact portion 807 and the contact pattern 161 is not limited to solder 810, similar to FIG. 54, FIG. 58, etc. It may be connected by anisotropic conductive rubber, conductive paste, crimping, or fitting. Needless to say, it may also be connected by electrical discharge machining, laser machining, electrothermal machining, fusion bonding, etc. Needless to say, an electrical connection may also be established by pressing and crimping the contact pattern 161 and the spring contact portion 807. FIG. 62(a) is an embodiment in which the apex of the convex portion 812a of the spring contact portion 807a coincides with the apex of the convex portion 812b of the spring contact portion 807b. FIG. 62(b) is an embodiment in which the apex of the convex portion 812a of the spring contact portion 807a is arranged to be located between the apexes of the convex portions 812b of the spring contact portion 807b. FIG. 63 is an explanatory diagram and a configuration diagram of the semiconductor element test apparatus of the present invention when a pressing head 302 is arranged at the connection portion of FIG. 62.

[0450] In the embodiments of FIGS. 63 and 64, the pressing head 322 is arranged on the pressing plate 323 side and the pressing head 322 is also arranged on the pressing plate 321 side, but only one of the pressing heads 322 may be provided.

[0451] A pressing plate 323 is arranged on the side of the printed circuit board 183a, and a pressing plate 321 is arranged on the side of the printed circuit board 183. Pressing is performed with a pressing head 322 from the side of the pressing plate 321.

[0452] As shown in FIG. 63, the printed circuit board 183a provided with the spring contact portion 807a and the printed circuit board 183b provided with the spring contact portion 807b are arranged facing each other. The lead pins 226 of the semiconductor element (electrical element) 101 are inserted into the insertion holes 372 of the mounting plate 324.

[0453] The lead pins 226 are arranged between the spring contact portion 807a and the spring contact portion 807b. After adjusting the position, the pressing head 322 is moved by the lever 364 to clamp the lead pins 226.

[0454] The lead pins 226 are clamped between a plurality of convex portions 812a and convex portions 812b, and the lead pins 226 are electrically connected to the convex portions 812 and the contact pattern 161 between the convex portions 812.

[0455] A pressing plate 323 is arranged on the side of the printed circuit board 183a, and a pressing plate 321 is arranged on the side of the printed circuit board 183. By pressing with the pressing head 322 from the side of the pressing plate 321, the pressure can be adjusted by adjusting and setting the interval D as shown in FIGS. 54(b) and 55.

[0456] By narrowing the interval D between the printed circuit board 183a and the printed circuit board 183b, the interval between the spring contact portion 807a and the spring contact portion 807b can be changed, and the clamping pressure of the lead pins 226 of the semiconductor element (electrical element) 101 by the spring contact portion 807 can be changed.

[0457] The embodiments in FIGS. 16, 55, 63, etc. have a configuration in which the lead pins 226 are held and clamped between the spring contact portion 807a, the spring contact portion 807b, and the spring contact portion 807b of the printed circuit board 183a. The present invention is not limited to this.

[0458] FIG. 64 shows a configuration in which the lead pin 226 is held by the spring contact portion 807a and pressing members (pressing members 351, 352, 353, 354) and is clamped. The configuration using pressing members and the like is omitted since it has been described in FIGS. 17, 18, 19, 24, 26, etc. As described above, the matters described in other embodiments can be applied to the present invention. Also, some or all of the embodiments can be combined. By clamping the lead pin 226 between the spring contact portion 807 and the pressing member, a stable connection can be achieved. The above embodiments were examples in which the lead pin 226 was held and clamped using the spring contact portion 807 to make a connection. The present invention is not limited to this.

[0459] FIG. 65 is an explanatory diagram of the printed circuit board 183 used in the semiconductor element test apparatus of the present invention. On the contact pattern 161 of the printed circuit board 183, a plating projection 816 is formed. The plating projection 816 is formed by electrolytic or electroless plating. The thickness (height) of the plating projection 816 is preferably in the range of 5 μm or more and 50 μm or less.

[0460] The method of forming or producing the projection of the plating projection 816 is not limited to plating. Although 816 is called the plating projection 816 for ease of explanation, it is not limited to plating. For example, the plating projection 816 may be formed by coating technology, printing technology, vapor deposition technology, sputtering technology, etc. In particular, by forming the plating projection 816 by a screen printing method, it can be formed with high accuracy with a film thickness of 2 μm or more and 40 μm or less. The plating projection 816 is a convex raised portion.

[0461] Two rows of plating projections 816 are formed on the contact pattern 161c (W2) of FIG. 65. As shown in FIG. 65, it is preferable to form and arrange a plurality of rows of plating projections 816c on the wide contact pattern 161c (W2).

[0462] As shown in FIG. 66, plating projections 816a are formed or disposed on the printed circuit board 183a. Plating projections 816b are formed or disposed on the printed circuit board 183b. The printed circuit board 183a and the printed circuit board 183b are disposed facing each other. The lead pin 226 is held and sandwiched between the plating projection 816a and the plating projection 816b.

[0463] The lead pin 226 and the plating projection 816 are electrically connected, and the plating projection 816 and the contact pattern 161 are electrically connected. The contact pattern 161a is connected to the connection pattern 104, and a connector 811 is disposed at one end of the connection pattern 104. A test current Id, a constant current Ic, a control signal of the transistor 101, etc. are supplied from the connector 811. Further, the output voltage between terminals of the terminal voltage of the transistor 101, etc. is output.

[0464] A pressing plate 323 is disposed on the printed circuit board 183a side, and a pressing plate 321 is disposed on the printed circuit board 183 side. By pressing from the pressing plate 321 side with the pressing head 322, the lead pin 226 and the plating projection 816 are brought into close contact, and pressure is concentrated on the plating projection 816, so that a good electrical connection is realized. Further, the occurrence of corrosion at the contact portion is suppressed. Other matters, configurations, and contents are the same as or similar to those of other embodiments of the present invention, so the description is omitted.

[0465] FIG. 67 is an explanatory diagram of the printed circuit board 183 used in the semiconductor element test apparatus of the present invention. Bumps 820 are formed on the contact pattern 161 of the printed circuit board 183. The bumps 820 are formed or disposed by a plating bump method or a screen printing method. FIG. 67(a) is a plan view, and FIG. 67(b) is a cross-sectional view.

[0466] The plating bump method is a method of forming solder bumps by electrolytic plating (electroplating). After forming a seed layer and a photoresist on the contact pattern 161, an electrolytic solder plating, resist stripping, and seed layer etching are performed, and then a reflow process is carried out to shape the bumps 820. Bumps of a small size (height of about 50 μm or less) can be formed. The surface of the bumps 820 is coated with gold.

[0467] The screen printing method is a method of printing solder paste using a metal mask. By customizing the openings of the metal mask, various bumps 820 can be formed.

[0468] Bumps 820 of a size larger than that of the plating bump method (height 50 μm to 100 μm) can be formed. For the bumps 820, a Ni, Pd, Au plating process can be used. By directly performing electroless Pd / Au plating on the Cu bumps, good plating deposition properties and mounting reliability can be obtained. In the electrolytic Sn plating technology, by directly forming Ni and Sn plating on the Cu bumps, solder can be realized only on the top surface.

[0469] As shown in FIG. 69, a plurality of bumps 820 are formed or arranged on the contact pattern 161a of the printed circuit board 183a. A plurality of bumps 820 are formed or arranged on the contact pattern 161b of the printed circuit board 183b. Note that the contact pattern 161 is named using the technical meaning of an electrode, conductive film, or conductor.

[0470] The printed circuit board 183a and the printed circuit board 183b are arranged facing each other. The printed circuit board 183a and the printed circuit board 183b have the same specifications and the arrangement of the contact pattern 164, similar to other embodiments.

[0471] The lead pin 226 is held and clamped between the bumps 820. The lead pin 226 and the bump 820 are electrically connected, and the bump 820 and the contact pattern 161 are electrically connected. The contact pattern 161a is connected to the connection pattern 104, and a connector 811 is disposed at one end of the connection pattern 104. A test current Id or the like is supplied from the connector 811.

[0472] In the cross-sectional views described in FIGS. 60, 67(b), 68(b), etc., for ease of drawing and for ease of understanding, hatching as a cross-sectional view is not shown. The same applies to other drawings.

[0473] A pressing plate 323 is disposed on the printed circuit board 183a side, and a pressing plate 321 is disposed on the printed circuit board 183 side. By pressing from the pressing plate 321 side with the pressing head 322, the lead pin 226 and the bump 820 are brought into close contact, and the pressure is concentrated on the bump 820, realizing a good electrical connection. Other matters, configurations, and contents are the same as or similar to those of other embodiments of the present invention, so the description is omitted.

[0474] FIG. 68 is an explanatory diagram of a printed circuit board 183 used in the semiconductor element test apparatus of the present invention. Concavo-convex portions 821 are formed in the contact pattern 161 of the printed circuit board 183. The concavo-convex portions 821 are formed or arranged by an electroplating bump method or a screen printing method. FIG. 68(a) is a plan view, and FIG. 68(b) is a cross-sectional view. The formation of the concavo-convex portions 821 is formed or arranged by an electroplating bump method or a screen printing method in the same manner as the bumps 820.

[0475] The electroplating bump method is a method of forming the concavo-convex portions 821 by electroplating (electrolytic plating) or the like. After forming a seed layer and a photoresist on the contact pattern 161, an electrolytic solder plating, resist stripping, and seed layer etching are performed, and a reflow process for adjusting the shape of the concavo-convex portions 821 is carried out.

[0476] The screen printing method is a method of printing solder paste using a metal mask. By customizing the openings of the metal mask, various uneven portions 821 can be formed. Uneven portions 821 having a size larger than that of the plating bump method (height: 50 μm to 100 μm) can be formed.

[0477] As shown in FIG. 68, a plurality of uneven portions 821 are formed or arranged on the contact pattern 161a of the printed circuit board 183a. A plurality of uneven portions 821 are formed or arranged on the contact pattern 161b of the printed circuit board 183b. Note that the contact pattern 161 is named using the technical meanings of an electrode, a conductive film, or a conductor.

[0478] The case of the printed circuit board 183 on which the uneven portions 821 are formed is the same as that in FIG. 69. In FIG. 69, the printed circuit board 183 on which the bumps 820 described in FIG. 67 are formed may be replaced with the printed circuit board 183 on which the uneven portions 821 are formed.

[0479] The printed circuit board 183a and the printed circuit board 183b are arranged to face each other. The lead pins 226 are held and sandwiched between the uneven portions 821. The lead pins 226 and the uneven portions 821 are electrically connected, and the uneven portions 821 and the contact pattern 161 are electrically connected. The contact pattern 161a is connected to the connection pattern 104, and a connector 811 is arranged at one end of the connection pattern 104. A test current Id, a constant current Ic, etc. are supplied from the connector 811. Further, the voltage between the terminals of the transistor 101 is output.

[0480] A pressing plate 323 is arranged on the printed circuit board 183a side, and a pressing plate 321 is arranged on the printed circuit board 183 side. By pressing from the pressing plate 321 side with the pressing head 322, the lead pins 226 and the uneven portions 821 are brought into close contact with each other, and pressure is concentrated on the uneven portions 821, thereby realizing a good electrical connection. Other matters, configurations, and contents are the same as or similar to those of other embodiments of the present invention, and thus the description thereof is omitted. Also in the embodiment of FIG. 69, similar to FIG. 64, it can be replaced with a pressing (metal) fixture to constitute the semiconductor element test apparatus of the present invention.

[0481] FIG. 70 shows a configuration in which the lead pin 226 is held and clamped by the bump 820 or the uneven portion 821 and the pressing (metal) fixtures (pressing (metal) fixture 351, pressing (metal) fixture 352, pressing (metal) fixture 353, pressing (metal) fixture 354). By clamping the lead pin 226 between the bump 820 or the uneven portion 821 and the pressing (metal) fixture, a stable connection can be realized. Since other configurations, structures, and methods are the same as those described in other embodiments of the present invention, the description thereof is omitted.

[0482] The embodiment of FIG. 71 is a configuration using the anisotropic conductive rubber 817 as a connection member. As an example of the anisotropic conductive rubber 817, silicon rubber with gold-plated metal wires arranged at equal intervals is exemplified. In the insulating silicon rubber, the gold-plated metal fine wires are oriented in a high density in the thickness direction, and the metal fine wires are inclined to have high repeat characteristics. Also, an example is a silicon rubber with metal particle contacts arranged thereon. The anisotropic conductive rubber 817 is disposed on the printed circuit board 183.

[0483] The lead pin 226 is disposed on the printed circuit board 183a or the printed circuit board 183b. Also, the anisotropic conductive rubber 817 is disposed between the lead pin 226 and the printed circuit board 183b or the printed circuit board 183a.

[0484] In the embodiment of FIG. 72, the lead pin 226 is disposed so as to contact the contact pattern 161b of the printed circuit board 183b. The anisotropic conductive rubber 817 is disposed between the contact pattern 161a of the printed circuit board 183a and the lead pin 226. The anisotropic conductive rubber 817 has flexibility as rubber and electrically connects the lead pin 226 and the contact pattern 161a. The printed circuit board 183a and the printed circuit board 183b are disposed facing each other. The lead pin 226 is held and clamped by the anisotropic conductive rubber 817.

[0485] The lead pin 226 and the contact pattern 161a are electrically connected by the anisotropic conductive rubber 817. The contact pattern 161a is connected to the connection pattern 104, and a connector 811 is disposed at one end of the connection pattern 104. A test current Id or the like is supplied from the connector 811.

[0486] A pressing plate 323 is disposed on the printed circuit board 183a side, and a pressing plate 321 is disposed on the printed circuit board 183 side. By pressing from the pressing plate 321 side with the pressing head 322, the anisotropic conductive rubber 817 is brought into close contact with the lead pin 226, and a good electrical connection is achieved. Other matters, configurations, and contents are the same as or similar to those of other embodiments of the present invention, and thus the description thereof is omitted.

[0487] FIG. 73 shows an embodiment in which socket pins 819 are mounted on the contact pattern 161 of the printed circuit board 183 with solder 810. The lead pins 226 of the semiconductor element (electrical element) 101 are connected by being inserted into the socket pins 819.

[0488] As shown in FIG. 74, the printed circuit board 183a and the printed circuit board 183b are arranged to face each other. The socket pins 819 are held by being sandwiched between the contact pattern 161a and the contact pattern 161b. Note that the contact pattern 161b does not need to be conductive and does not need to be arranged, because the lead pins 226 may be sandwiched and held by the printed circuit board 183b.

[0489] The contact pattern 161a is connected to the connection pattern 104, and a connector 811 is disposed at one end of the connection pattern 104. A test current Id, a constant current Ic, etc. are supplied from the connector 811. A pressing plate 323 is disposed on the printed circuit board 183a side, and a pressing plate 321 is disposed on the printed circuit board 183 side. Other matters, configurations, and contents are the same as or similar to those of other embodiments of the present invention, and thus the description thereof is omitted.

[0490] The present invention mounts a plurality of semiconductor elements (electrical elements) 101 and conducts tests. As shown in FIG. 9, for example, a shield plate 705c is disposed between a semiconductor element (electrical element) 101c1 and a semiconductor element (electrical element) 101c2. Also, a shield plate 705a or a shield plate 705b is disposed between a drain terminal (D) 226d and a source terminal (S) 226s1.

[0491] The shield plate 705 has a configuration in which an insulating sheet (or insulating film, insulating plate) 708 is disposed or formed on the surface of a conductor sheet (or conductor foil, conductor plate, conductive plate) 709 made of copper, iron, or aluminum. The conductor sheet 709 is connected to a predetermined potential or a ground potential and has its potential fixed.

[0492] The shield plate 705 may be a metal plate (conductor plate) or a metal film (conductor sheet). In that case, it is preferable to dispose or form an insulator or an insulating sheet between the shield plate 705 and a conductive object such as a pressing (metal) tool so as not to contact the shield plate 705. Needless to say, the above matters can be applied to the embodiments of the present invention.

[0493] The semiconductor test apparatus (power cycle test apparatus) of the present invention supplies a high current or a high voltage to a test object to conduct a test. When a high current flows or a high voltage is applied, noise is generated and the test state becomes unstable. Also, the semiconductor test apparatus (power cycle test apparatus) malfunctions due to noise.

[0494] The location where noise of high voltage or high current is likely to occur is between a drain terminal (D) (collector terminal (C)) and a source terminal (S) (emitter terminal (E)). A high current flows through the drain terminal (D) (collector terminal (C)) and the source terminal (S) (emitter terminal (E)).

[0495] Noise also has a great impact on adjacent semiconductor devices. When conducting tests by arranging a plurality of semiconductor devices (electronic devices) 101 as shown in Fig. 12, it is rare for all semiconductor devices (electronic devices) 101 to perform the same operation simultaneously. As an example, a test current Id is supplied sequentially to a plurality of semiconductor devices (electronic devices) 101.

[0496] For example, the test current Id flows through semiconductor devices (electronic devices) 101(1), semiconductor devices (electronic devices) 101(2), semiconductor devices (electronic devices) 101(3), semiconductor devices (electronic devices) 101(4) ······ semiconductor devices (electronic devices) 101(n - 2), semiconductor devices (electronic devices) 101(n - 1), and semiconductor devices (electronic devices) 101(n).

[0497] When tests are conducted with a plurality of semiconductor devices (electronic devices) 101 arranged as shown in Fig. 12, noise is applied to adjacent semiconductor devices (electronic devices) 101, and malfunctions are likely to occur in adjacent semiconductor devices.

[0498] In the embodiment of Fig. 9, shield plates 705a and 705b are arranged between the drain terminal (D) 226d and the source terminal (S) 226s of the semiconductor device (electronic device) 101. A shield plate 705c is arranged between adjacent semiconductor devices (electronic devices) 101c1 and 101c2.

[0499] According to the present invention, by arranging a shield plate 705c between adjacent semiconductor devices (electronic devices) 101, it is possible to prevent malfunctions of the semiconductor devices (electronic devices) 101 adjacent to the semiconductor device (electronic device) 101 being tested by supplying a test current Id or the like. By grounding (connecting) adjacent shield plates 705 to different potentials, it is possible to further prevent malfunctions and suppress the generation of noise.

[0500] As shown in FIG. 9, the conductor sheet 709b of the shield plate 705c is fixed at a predetermined potential. The conductor sheet 709a of the shield plate 705a is fixed at a predetermined potential. The conductor sheet 709b of the shield plate 705b is fixed at a predetermined potential.

[0501] Needless to say, the above embodiments such as FIG. 9 can be applied to other embodiments of the present invention. Needless to say, they can be combined with some or all of other embodiments.

[0502] FIG. 44 is a configuration diagram and an explanatory diagram of a semiconductor element test apparatus of the present invention. As shown in FIG. 44, the semiconductor element test apparatus of the present invention includes a housing 210, a chiller (cooling / warming device) 136, a heating / cooling plate 134, and a circulating water pipe 135 that circulates between the heating / cooling plate 134 and the chiller 136. On the heating / cooling plate 134, a transistor 101 or the like to be tested is arranged in close contact with the heating / cooling plate 134.

[0503] In an embodiment of the present invention, the heating / cooling plate 134 is not limited to a plate shape. Any structure or configuration that can hold, arrange, and attach a semiconductor element (electrical element) 101 may be used. Both sides (front and back) of the semiconductor element (electrical element) may be held by the heating / cooling plate 134. The heating / cooling plate 134 is not necessarily limited by the presence or absence of a heating or cooling function. It may have no heating or cooling function.

[0504] The control rack 131 has a power supply device 132 that supplies a test current Id and a test voltage Vd to a semiconductor element 117 (semiconductor element (electrical element) 101), and a controller circuit 111 that controls the semiconductor element 117 (semiconductor element (electrical element) 101) or sets test conditions.

[0505] The controller circuit 111 changes the test current Id, the gate voltage Vg, and the voltage Vce (Vsd) to set test conditions and conducts a test so that the temperature information Tj of the semiconductor element 117 (semiconductor element (electrical element) 101) becomes a predetermined value.

[0506] The controller circuit (control circuit, control device) 111 controls the power supply device 132, and the power supply device 132 supplies a test voltage Vd or a test current Id to the semiconductor element 117 (semiconductor element (electrical element) 101) to be tested.

[0507] When the temperature information Tj changes or changes to a predetermined value, it is determined that the semiconductor element 117 (semiconductor element (electrical element) 101) is deteriorated or its characteristics have changed, and the test of the semiconductor element 117 (semiconductor element (electrical element) 101) is stopped, or the test method and control method are changed.

[0508] By heating or cooling the circulating water of the chiller 136, the temperature of the semiconductor element 117 (semiconductor element (electrical element) 101) is maintained at a specified value or a predetermined value. Also, the temperature of the semiconductor element (electrical element) etc. is periodically changed according to the test conditions, and is constantly cooled or heated so as to conform to the test conditions.

[0509] Also, the temperature information Tj of the semiconductor element 117 (semiconductor element (electrical element) 101) is measured, and the chiller 136 is controlled so as to maintain the measured temperature information Tj at a constant value.

[0510] When a test current Id is applied to the semiconductor element (electrical element) 101, the semiconductor element (electrical element) 101 (transistor 101) generates heat, and along with the heat generation, the temperature information Tj changes (the channel - to - channel density Vi changes) along with the heat generation of the electrical element channel etc. Also, when the test current Id is stopped, the temperature of the channel etc. drops due to heat dissipation, and the temperature information Tj changes. Generally, the temperature information Tj has an equivalent or similar or correlated or linear relationship with the channel - to - channel voltage and the terminal voltage of the diode element.

[0511] A test current Id is supplied to the transistor 101, and as the deterioration of the transistor progresses, the heat generation increases. The heat generation is indicated by the temperature information Tj or is correlated with the temperature. The temperature information Tj is correlated with the inter-channel voltage of the transistor. When the transistor (electrical element) 101 deteriorates, the heat generation of the transistor (electrical element) 101 increases, and the drain-source voltage Vds (collector-emitter voltage Vce) of the transistor 101 increases.

[0512] When stress is applied to the transistor 101 by a test, the Vds voltage (drain terminal-source terminal) or Vce voltage (collector terminal-emitter terminal) of the transistor 101 changes, and usually changes in the direction of increasing the temperature information Tj.

[0513] The temperature information Tj is, for example, the inter-channel voltage Vi of the transistor 101 or the terminal voltage of the diode element. As the transistor 101 deteriorates, the temperature increases, the heat generation also increases, and the rising speed also increases.

[0514] The deterioration of the transistor 101 is measured by supplying a test current Id to the transistor 101 and supplying a constant current Ic in the vicinity of the time when the test current Id is stopped to measure the terminal voltage Vi.

[0515] In the embodiment of the present invention, it is described as measuring the terminal voltage Vi, but it is not limited thereto. Needless to say, the change amount and change speed of the terminal voltage Vi may be measured or observed.

[0516] When the temperature of the transistor 101 changes, the terminal voltage of the diode Di changes. By monitoring the terminal voltage Vi of the diode Di, the temperature change of the transistor 101 can be measured or observed. The temperature or temperature change is called temperature information Tj. Therefore, the temperature information Tj is the voltage between terminals (between the collector-emitter terminals of the transistor 101, between the source-drain terminals of the transistor 101).

[0517] For example, the temperature information Tj is the voltage between the anode and cathode terminals of the diode Di, or the amount of change or rate of change of the voltage. Alternatively, it is the voltage between the collector and emitter terminals (drain and source terminals) of the transistor 101, or the amount of change or rate of change of the voltage. These voltages change according to the temperature of the semiconductor element (electrical element) 101 such as the transistor 101.

[0518] Figures 41, 44, and 45 are configuration diagrams and explanatory diagrams of the semiconductor test apparatus (power cycle test apparatus) of the present invention. The housing 210 of the semiconductor test apparatus is separated into a C1 chamber, a C2 chamber, an A chamber, and a B chamber by a partition 214. The partition 214 is electrostatically shielded and electromagnetically shielded.

[0519] As shown in FIG. 45, the device control circuit board 209 is disposed in the B chamber of the housing 210 of the semiconductor element test apparatus. The housing 210 incorporates a power supply device 132, a drive circuit system, a heating and cooling plate 134, etc. The semiconductor element (electrical element) 101 is sandwiched between the heating and cooling plate 134a and the heating and cooling plate 134b, or the heating and cooling plate 134a and the heating and cooling plate 134b are arranged vertically or horizontally.

[0520] It is preferable to inject dry air into the space where the semiconductor element 117 (semiconductor element (electrical element) 101) to be tested is disposed. Alternatively, dry air is blown onto the element 117 to be tested.

[0521] A liquid leakage sensor 706 is disposed around the heating and cooling plate 134. When condensation or the like occurs on the semiconductor element 117 or the like mounted on the heating and cooling plate 134, a condensation sensor (not shown) operates, and the semiconductor element test apparatus is configured to stop or issue an alarm. The C1 chamber is configured to inject dry air (dry gas, gas with a low dew point temperature).

[0522] The heating and cooling plate 134 is not limited to a plate. Any configuration, structure, or form may be used as long as it can set or adjust the temperature above, below, or around the semiconductor element (electrical element) 101 to a predetermined temperature.

[0523] The sample connection circuit 203 is arranged in the C1 chamber of the housing 210 of the semiconductor element test apparatus in order to be arranged at a position close to the transistor 101 (semiconductor element (electrical element) 101) to be tested. The sample connection circuit 203 is connected to a connector 208 arranged on the side surface of the housing 210. The wiring connected to the connection pins 206 of the connector 208 is connected to the device control circuit board 209 in the B chamber.

[0524] As shown in FIG. 41 and the like, the sample connection circuit 203 is connected to the device control circuit board 209 by the connection pins 206 of the connector 208. The sample connection circuit 203 is individually arranged corresponding to each transistor 101 (semiconductor element (electrical element) 101) to be tested, and the sample connection circuit 203 is configured to be easily removable by a connector 202 or the like.

[0525] As shown in FIG. 47, the circuit boards (the controller circuit 111, the device control circuit board 209, the switch circuit board 201, etc.) are configured to be detachable from the mother board 207 by a connector 213.

[0526] By changing the number of connections of the switch circuit board 201 connected to the mother board 207, the number of semiconductor elements (electrical elements) 101 to be tested can be changed. Further, by connecting and fitting the conductor plate 204 and the fork connector 205 mounted on the switch circuit board 201, the test connection can be easily changed and set.

[0527] The constant current circuit 118 supplies a constant current Ic to a diode Di disposed or formed between channels of a transistor 101 (semiconductor element (electric element) 101). The operational amplifier of a buffer circuit (operational amplifier circuit) 406 buffers the terminal voltage of the diode Di with a buffer circuit 116 and outputs it as a Vi voltage with a low output impedance. The Vi voltage is selected by a selection circuit 405, and the selected Vi voltage is subjected to analog-digital conversion (A-D conversion) by a temperature measurement circuit 115. The buffer circuit 406 may have any configuration or component as long as it can output a low impedance output.

[0528] The terminal voltage Vi of the diode Di is applied or supplied to the temperature measurement circuit 115. The temperature measurement circuit 115 obtains temperature information Tj of the transistor 101 (semiconductor element (electric element) 101) from the terminal voltage Vi and transfers it to a controller circuit (substrate) 111. The temperature information Tj is output from a connector 213 of a device control circuit board 209 to a mother board 207 and sent to the controller circuit (substrate) 111.

[0529] The selection circuit 404 sets the gate driver position to which an on-voltage is applied. A gate driver circuit (substrate) 113 applies the set frequency (on-off period) and the set on-voltage to the gate terminal (base terminal) of the transistor 101 (semiconductor element (electric element) 101).

[0530] Due to the Vg signal voltage output from the gate driver circuit (substrate) 113, the transistor 101 (semiconductor element (electric element) 101) operates (turns on) / does not operate (turns off), and a current Id flows between the channels of the transistor 101 (semiconductor element (electric element) 101) during the period when the transistor 101 (semiconductor element (electric element) 101) is on.

[0531] The gate driver circuit 113 has a variable resistance circuit 125. The resistance value R of the variable resistance circuit 125 can be changed or set between 0 (Ω) and 500 (Ω). A current flows through the variable resistance circuit 125, and a voltage is generated between the terminals. This voltage is configured to be set to a constant voltage or a voltage that changes over time.

[0532] A resistor R (not shown) may be disposed between the gate terminal (G) and the source terminal (S) (emitter terminal e), or the drain terminal (D) (collector terminal c) of the transistor 101 (semiconductor element (electrical element) 101). By adjusting the value of the resistor R, the slope angles of the rising and falling voltage waveforms of the gate signal can be adjusted.

[0533] The gate driver circuit 113 can set the slope of the rising waveform (rise time Tr) and the slope of the falling waveform (fall time Td) of the gate electrical signal applied to the gate terminal (G) of the transistor 101 (semiconductor element (electrical element) 101). By adjusting the rise time Tr and the fall time Td separately, the on-time and on-characteristics of the transistor 101 (semiconductor element (electrical element) 101) can be controlled to predetermined values.

[0534] As described above, the semiconductor element test apparatus and test method of the present invention can control, adjust, or set the value of the variable resistance circuit 125 connected to the gate terminal (G) of the transistor 101 (semiconductor element (electrical element) 101), or the rise time / fall time of the gate driver circuit 113.

[0535] As shown in FIG. 45, the fork plug 205 and the conductor plate 204 are electrically connected by inserting the fork plug 205 through the opening 216 of the partition wall 214. The opening 216 of the partition wall 214 is formed or configured to coincide with the position of the switch circuit board 201.

[0536] The connection between the transistor to be tested and the circuit board having a switch circuit or the like is made by inserting a connection plug (fork plug 205) through an opening 216 provided in the partition wall 214 and bringing the connection plug (fork plug 205) into electrical contact with a conductor plate 204 provided on the circuit board. A switch circuit 124 is mounted or arranged on the switch circuit board 201. The switch circuit 124 is connected to two conductor plates 204.

[0537] The conductor plate (copper bar) 204 is not limited to a plate shape. For example, it may be rod-shaped. Also, it may be cylindrical or foil-shaped. In this embodiment, it is expressed as a conductor plate (copper bar) 204, but the conductor plate (copper bar) 204 is a concept including other shapes and configurations such as conductor rods. The conductor plate (copper bar) 204 is formed or constituted of a copper member, and nickel plating is applied to its surface.

[0538] The conductor plate 204 is not limited to a plate shape, and may be cylindrical, rod-shaped, connector-shaped, etc. The fork plug 205 may be of any configuration, structure, form, format, or method that can be electrically connected to an object such as a conductor plate (copper bar) 204 by fitting, press-fitting, pressure welding, inserting, crimping, holding, or clamping.

[0539] As an example, the conductor plate 204 is a plate made of copper with a thickness of 5 mm and a width of 50 mm. The length of the conductor plate 204 is, for example, 250 mm. For ease of explanation, the conductor plate 204 is exemplified and described.

[0540] Conductor plates 204a and 204b are attached to the switch circuit board 201b. A fork plug 205b is connected to the conductor plate 204b, and a fork plug 205a is connected to the conductor plate 204a.

[0541] Note that the negative terminal of the power supply device 132 may be directly screwed to the conductor plate 204b, and the positive terminal of the power supply device 132 may be directly screwed (bolted) to the conductor plate 204a. They may also be fitted.

[0542] On the switch circuit board 201a, a conductor plate 204c and a conductor plate 204d are attached. A fork plug 205d is connected to the conductor plate 204c, and a fork plug 205e is connected to the conductor plate 204d.

[0543] In the embodiment of the present invention shown in FIG. 41, the fork plug 205 is exemplified as a connection plug for explanation. The fork plug 205e is electrically connected to the collector terminal (drain terminal) of the transistor 101(1). The emitter terminal (source terminal) of the transistor 101(n) is electrically connected to the ground (ground potential, reference potential). The fork plug 205 may be connected to the emitter terminal (source terminal) of the transistor 101(n) and electrically connected to the conductor plate 204b. By connecting to the conductor plate 204b, it can be connected to the ground of the power supply device 132.

[0544] Note that, in the embodiment of the present invention, it is not limited to connecting the fork plug 205 to the conductor plate 204. Needless to say, the conductor plate 204 and the power supply wiring 212 may be screwed or connected with a crimp terminal. (Bolting) may be done. They may be fitted together.

[0545] A temperature sensor (temperature measurement circuit, temperature measurement element) 391 is in contact or in close contact with, arranged or connected to the conductor plate 204. When the electrical connection between the fork plug 205 and the conductor plate 204 is poor, the temperature sensor 391 detects the heat generated at the connection part (contact part) and transmits to the controller circuit (substrate) 111 that it is an abnormal temperature. Examples of the sensor of the temperature sensor 391 include a thermocouple and a thermistor.

[0546] FIG. 45 shows the arrangement of each component of the semiconductor element test apparatus according to the present invention. The housing 210 of the semiconductor element test apparatus has a plurality of parts. The lower part of the housing is separated into a chamber A and a chamber B. A power supply device 132 is arranged in the chamber A. The chamber A and the chamber B are separated by a partition wall 215. The chamber C1 and the chamber C2 are separated by a partition wall 217.

[0547] The power supply device 132, the switch circuit board 201, and the transistor 101 (semiconductor element (electrical element) 101) generate large noise by repeating operation / non-operation. Due to the noise, the circuit board and the like may malfunction. Malfunctions can be prevented by electrostatic and electromagnetic shielding of the partition walls between the chambers. If the partition walls are made of resin, an antistatic treatment is applied.

[0548] Electrostatic and electromagnetic shielding is realized by attaching or forming a conductive plate, a metal plate, a metal film, or a wire mesh around each chamber, on the surface or inside the partition wall.

[0549] In the C1 chamber, a heating / cooling plate 134, a circulating water pipe 135, etc. shown in FIG. 7 are arranged, and the transistor 101 (semiconductor element (electrical element) 101) to be tested is arranged in close contact with the heating / cooling plate 134 (heating / cooling plates 134a and 134b).

[0550] The dry air supply pipe (not shown) is a pipe for supplying dry air maintained at a predetermined relative humidity or less. The dry air supply pipe is arranged so as to protrude from the upper surface at a position on the front end side of the upper surface of the heating / cooling plate 134 and on the front side of the mounting area of the semiconductor element (electrical element) 101.

[0551] If dry air directly hits the semiconductor element (electrical element) 101, it may become a factor affecting the internal temperature. Also, if dry air directly hits the thermometer / hygrometer 707, it may become a factor causing an error in the measured value.

[0552] Therefore, the ejection direction of the dry air is preferably upward. However, the ejection direction of the dry air may be arbitrary as long as it is different from the direction where the semiconductor element (electrical element) 101 and the thermometer / hygrometer 707 are located.

[0553] A thermometer - hygrometer 707 is arranged in Chamber C1. The thermometer - hygrometer 707 is a sensor for measuring the temperature and relative humidity inside Chamber C1. The thermometer - hygrometer 707 is arranged at the right - hand side and the rear - end side on the upper surface of the heating - cooling plate 134. Therefore, since the thermometer - hygrometer 707 is arranged at a position away from the dry - air supply pipe arranged on the front - end side of the upper surface of the heating - cooling plate 134, the occurrence of errors in the measured values is suppressed.

[0554] In Chamber C1, a liquid - leakage prevention member, a drain hole 704, and a liquid - leakage sensor 706 are arranged. The liquid - leakage prevention member is provided to protrude from the upper surface of the heating - cooling plate 134 and is a member for suppressing the leakage of the coolant to the outside. The liquid - leakage prevention member is arranged so as to surround along the inner circumference of the lower end portion of the heating - cooling plate 134.

[0555] The drain hole 704 is a hole for discharging the leaked coolant and is formed at the rear - end portion of the lower surface of the heating - cooling plate 134. The drain hole 704 is arranged inside the liquid - leakage prevention member, and a drain pipe for discharging the leaked coolant is connected to it.

[0556] The liquid - leakage sensor is a sensor for detecting the leaked coolant, for example, by the inter - electrode resistance detection method. The liquid - leakage sensor is arranged inside the liquid - leakage prevention member and has a strip - shaped detection band.

[0557] A liquid - leakage sensor 706 is arranged around the heating - cooling plate of Chamber C1. When circulating water (cooling medium) or the like leaks, the liquid - leakage sensor 706 operates, and the semiconductor element test apparatus is configured to stop or issue an alarm.

[0558] Drain holes 704 are formed around the heating - cooling plate 134. When circulating water (cooling medium) leaks from the heating - cooling plate, the circulating water (cooling medium) flows into the drain holes 704 and is configured to be discharged outside the semiconductor element test apparatus. The heating - cooling plate 134 is mounted on a tray (not shown), and the tray is configured to be detachable from the partition wall 214. As described above, the partition wall 214 is configured such that even if the circulating water pipe 135 or the like is damaged, the circulating water (cooling medium) or the like does not leak into the lower A chamber and B chamber.

[0559] A partition wall 215 is formed between the A chamber in which the power supply device 132 is arranged and the B chamber in which the drive circuit system is arranged. An electrostatic shielding plate is arranged on the partition wall 215, the noise of the power supply device 132 is shielded, and the noise is not applied to the drive circuit system in the B chamber.

[0560] In the embodiment of the present invention, the fork plug 205 is inserted from the C2 chamber and connected to the conductor plate 204 in the B chamber. An opening 216 for inserting the fork plug 205 is formed in the partition wall 214.

[0561] In the embodiment of the present invention, the fork plug 205 is inserted from the upper side to the lower side. The present invention is not limited to this. For example, the conductor plate 204 may be arranged in the C2 chamber, the fork plug 205 may be inserted from the B chamber, and the fork plug 205 and the conductor plate 204 may be electrically connected.

[0562] As shown in FIGS. 41 and 45, the fork plug 205d is connected to the conductor plate 204c of the switch circuit board 201b. The power supply wiring 212 is connected to the switch circuit board 201b through the opening 216 of the partition wall 215. The fork plug 205b is connected to the conductor plate 204b of the switch circuit board 201a. The power supply wiring 212 is connected to the switch circuit board 201a through the opening 216 of the partition wall 215.

[0563] FIG. 45 shows two switch circuit boards 201a and 201b. The switch circuit board 201 is connected to the connector 213 of the mother board 207.

[0564] In the embodiment, it is described that two conductor plates 204 are connected or mounted on the switch circuit board 201, but it goes without saying that the conductor plate 204 may be one.

[0565] As shown in FIG. 45, the fork plug 205c is inserted through the opening 216 of the partition wall 214 provided between the C2 chamber and the B chamber and is connected to the conductor plate 204b. The fork plug 205e is inserted through the opening 216 of the partition wall 214 provided between the C2 chamber and the B chamber and is connected to the conductor plate 204d.

[0566] Since the current flowing through the transistor 101 (semiconductor element (electrical element) 101) to be tested is as large as several hundred amperes, the connection wiring 211 used is also thick. Therefore, the thick connection wiring 211 and the power supply wiring 212 are rigid. Therefore, it is not easy to change the connection of the connection wiring 211 and the power supply wiring 212.

[0567] In the semiconductor element test apparatus of the present invention, the fork plug 205 is inserted into an arbitrary opening 216 of the partition wall 214 from the C2 chamber. By changing the position of the opening 216 into which the fork plug 205 is inserted, it is possible to connect to an arbitrary switch circuit board 201.

[0568] Therefore, to change the connection to the switch circuit board 201 used according to the test conditions of the transistor 101 (semiconductor element (electrical element) 101), it is only necessary to change the position of the opening 216 into which the fork plug 205 is inserted, without the need to change the connection of the connection wiring 211. Further, as shown in FIG. 47(c), the switch circuit board 201 only needs to change the position of the connector 213 connected to the mother board 207.

[0569] As described above, according to the test content of the electrical element 117 such as a semiconductor element and the number of electrical elements 117 to be tested, the switch circuit board 201 and the device control circuit board 209 connected to the mother board 207 are arranged. Also, the connection switching with the switch circuit board 201 or the like is performed by changing the position of the fork plug 205 inserted into the opening 216 of the partition wall 214.

[0570] FIG. 46 is an explanatory diagram of a connection structure 218 in an embodiment of the semiconductor element test apparatus of the present invention. FIG. 46(a) is a diagram schematically showing the back surface, and FIG. 46(b) is a diagram schematically showing the side surface.

[0571] A heat pipe 223 is in close contact with a recess 234 on the surface of the connection structure 218. A heat conductive grease or a heat dissipation silicone oil compound may be applied between the surface of the connection structure 218 and the heat pipe.

[0572] The heat pipe 223 is arranged so as to be fitted into the recess 234. By arranging the heat pipe 223 in the recess on the back surface, the risk of damage to the heat pipe 223 is reduced. A material with a linear expansion rate of the heat pipe fitting 231 of the connection structure 218 smaller than that of the heat pipe 223 pipe is adopted.

[0573] The connection structure 218 is heated during the test. Therefore, the heat pipe 223 and the heat pipe fitting 231 are also heated. Due to the heating, the heat pipe 223 and the heat pipe fitting 231 expand.

[0574] In the present invention, a material with a linear expansion rate of the heat pipe fitting 231 of the connection structure 218 smaller than that of the heat pipe 223 pipe is adopted. Alternatively, a material with a linear expansion rate of the heat pipe 223 pipe of the connection structure 218 larger than that of the heat pipe fitting 231 is adopted. The expansion of the heat pipe 223 material becomes larger in the recess 234, and the heat pipe 223 is firmly fitted by the recess 234. Therefore, the heat pipe 223 does not come off.

[0575] Examples of the material for the heat pipe fitting 231 include copper (linear expansion coefficient 16.8), brass (linear expansion coefficient 19), iron (linear expansion coefficient 12.1), and stainless steel (SUS304) (linear expansion coefficient 17.3). Examples of the material for the heat pipe 223 include materials having a larger linear expansion coefficient than that of the heat pipe fitting 231, such as aluminum (linear expansion coefficient 23), tin (linear expansion coefficient 26.9), and lead (linear expansion coefficient 29.1). Among them, it is preferable to adopt copper (linear expansion coefficient 16.8) as the material for the heat pipe fitting 231 and aluminum (linear expansion coefficient 23) as the material for the heat pipe 223. The heat pipe fitting 231 can also adopt carbon or the like other than metals.

[0576] The heat pipe 223 is a structure in which a small amount of liquid (working fluid) is hermetically sealed in a closed container and has a capillary structure (wick) on the inner wall. As the working fluid, in addition to pure water, methanol (methyl alcohol), acetone, sodium, mercury, a fluorocarbon refrigerant, or ammonia may be used. As the wick material, aluminum, copper, stainless steel, sintered alloy, wire mesh, foamed metal, ceramic, or the like is used.

[0577] The connection structure 218 mainly includes a heat pipe fitting 231, a connection pressure portion 232, and a connection holding portion 233. The element terminal 226 of the semiconductor element is inserted between the connection pressure portion 232 and the connection holding portion 233.

[0578] FIG. 47(a) is a diagram schematically showing, from above, a state in which a conductor plate 204 is attached to a switch circuit board (printed circuit board) 201 on which a switch circuit or the like is formed and a fork plug 205 is connected to the conductor plate 204. FIG. 47(b) is an explanatory diagram of a state in which the fork plug 205 is clamped at one end of the conductor plate 204.

[0579] As shown in FIG. 41, two conductor plates 204 are attached to the switch circuit board 201. The conductor plate 204 and the switch circuit board 201 are screwed or press-fitted and fixed. In addition, a conductor plate on a plane may be arranged on the inner layer of the switch circuit board 201, and this conductor plate may be connected to the fork connector 205.

[0580] As shown in FIG. 47, the fork plug 205 and the conductor plate 204 are electrically connected by being mechanically fitted. When the U-shaped portion of the fork plug 205 is inserted into the conductor plate 204, the U-shaped portion slightly expands, and the fork plug 205 and the conductor plate 204 are well joined. As shown in FIG. 47, a connection bolt 219 is attached to the fork plug 205. A connection wiring 211 is connected to the connection bolt 219.

[0581] The cross-section at AA' in FIG. 47(a) is shown in FIG. 47(b). The conductor plate 204 and the fork plug 205 are in contact at contact portions (connection portions, coupling portions) 220a and 220b formed on the fork plug 205. The contact portions 220 are made of phosphor bronze and nickel alloy and have spring properties. The surfaces of the contact portions 220 are plated with gold, zinc, or silver. The plating reduces the contact resistance value of the connection portions 220 and improves the electrical stability. As shown in FIG. 47(c), a connector 213 is attached to the mother board 207. A controller circuit (board) 111, a device control circuit board 209, and a switch circuit board 201 are attached to the connector 213 of the mother board 207. The switch circuit board 201 is prepared according to the number of transistors 101 (semiconductor elements (electrical elements) 101) to be tested. The number of switch circuit boards 201 can be easily realized by changing the number of switch circuit boards 201 attached to the mother board 207.

[0582] The switch circuit board 201 has a switch circuit 124a or a switch circuit 124b mounted, formed, or arranged thereon. Note that both the switch circuit 124a and the switch circuit 124b may be mounted and arranged on one switch circuit board 201.

[0583] A temperature sensor 391 consisting of a thermocouple and a semiconductor element is mounted or arranged on each switch circuit 124 to monitor the temperature of the switch circuit 124. Based on the output (temperature data) of the temperature sensor 391, the controller circuit 111 changes the test conditions of the test apparatus, stops the test apparatus, and generates an alarm from the test apparatus. The contact state between the fork plug 205 and the conductor plate 204 is monitored and measured for the resistance value between the fork plug 205 and the conductor plate 204 by a resistance circuit. When the contact resistance is greater than the specified value, the controller circuit 111 changes the test conditions of the test apparatus, stops the test apparatus, and generates an alarm from the test apparatus.

[0584] Temperature information Tj, terminal voltage Vi, control signals of the variable resistance circuit 125, control signals of the constant current circuit 118, etc. are transmitted to the mother board 207. Also, power supply wirings and ground wirings of each circuit are formed and supplied to each circuit board via the connector 213. Temperature information Tj, terminal voltage Vi, control signals of the variable resistance circuit 125, control signals of the constant current circuit 118, etc. are sent to the controller circuit 111.

[0585] As shown in FIG. 47(c), the conductor plate 204 is arranged so as to protrude from the switch circuit board 201. The fork plug 205 is connected to this protruding portion.

[0586] The fork plug 205a is connected to the conductor plate 204a of the switch circuit board 201a. The power supply wiring 212 is connected to the switch circuit board 201a through the opening 216 of the partition wall 215.

[0587] In the semiconductor element test apparatus of the present invention, the fork plug 205 is inserted into an arbitrary opening 216 of the partition wall 214 from the C2 chamber. By changing the position of the opening 216 into which the fork plug 205 is inserted, it can be connected to an arbitrary switch circuit board 201. Therefore, to change the connection to the switch circuit board 201 used according to the test conditions of the transistor 101 (semiconductor element (electric element) 101), it is not necessary to change the connection of the connection wiring 211, and it is only necessary to change the position of the opening 216 into which the fork plug 205 is inserted.

[0588] As shown in FIG. 47(c), the switch circuit board 201 only needs to change the position of the connector 213 connected to the mother board 207. The selection of the switch circuit board 201 can be implemented by changing the position of the fork plug 205. Alternatively, it can be implemented by changing the connection wiring 211 connected to the conductor plate 204. By changing the connection of the switch circuit board 201, the test circuit can be easily changed.

[0589] As described above, according to the test content of the electrical element 117 such as a semiconductor element and the number of electrical elements 117 to be tested, the switch circuit board 201 and the device control circuit board 209 connected to the mother board 207 are arranged. Also, the connection switching with the switch circuit board 201 etc. is implemented by changing the position of the fork plug 205 inserted into the opening 216 of the partition wall 214.

[0590] A large amount of noise is generated when the switch circuit 124 of the switch circuit board 201 is turned on and off. As a countermeasure, although not shown in FIG. 47(c), a metal plate that functions as a shield is arranged between the two switch circuit boards 201, and the metal plate is grounded.

[0591] The heat generated by the switch circuit 124 is dissipated to the conductor plate 204. A heat sink (not shown) is attached to the switch circuit 124. The ground terminal of the switch circuit 124 is connected to the ground of the switch circuit board 201. The heat of the conductor plate 204 is also dissipated through the ground copper foil of the switch circuit board 201.

[0592] FIGS. 48(a) and (b) show the state in which the fork plug 205 is inserted into the opening 216 of the partition wall 214. FIG. 48(a) is a view seen from the front surface of the partition wall 214, and FIG. 48(b) is a view seen from the back surface of the partition wall 214.

[0593] As an example, a fork plug 205b and a plurality of fork plugs 205c (fork plugs 205c1 to 205c5) are connected to the conductor plate 204b in Fig. 48. A fork plug 205e1 is connected to the conductor plate 204d1, a fork plug 205e2 is connected to the conductor plate 204d2, a fork plug 205e3 is connected to the conductor plate 204d3, a fork plug 205e4 is connected to the conductor plate 204d4, and a fork plug 205e5 is connected to the conductor plate 204d5.

[0594] When the switch circuit 124 on the switch circuit board 201 turns on and off, a large amount of noise is generated. As a countermeasure, although not shown in Fig. 47(c), a metal plate that functions as a shield is arranged between the two switch circuit boards 201, and the metal plate is grounded.

[0595] The heat generated by the switch circuit 124 is dissipated to the conductor plate 204. A heat sink (not shown) is attached to the switch circuit 124. The ground terminal of the switch circuit 124 is connected to the ground of the switch circuit board 201. The heat of the conductor plate 204 is also dissipated through the ground copper foil of the switch circuit board 201.

[0596] When the switch circuit 124b is turned on (closed), the output terminals of the power supply device 132 are short-circuited, and the short-circuit current Im flows to the ground. Therefore, the output current of the power supply device 132 is not supplied to the transistor 101 (semiconductor element (electrical element) 101). When the switch circuit 124b is open, the output current Id of the power supply device 132 is supplied to the transistor 101 (semiconductor element (electrical element) 101).

[0597] A conductor plate 204c and a conductor plate 204d are attached to the switch circuit board 201a. The conductor plate 204c is connected to a fork plug 205d. The fork plug 205d is connected to the output terminal of the power supply device 132. The conductor plate 204d is connected to a fork plug 205e. The fork plug 205e is connected to the collector terminal of the transistor 101 (semiconductor element (electrical element) 101) for testing.

[0598] In the embodiment of FIG. 48, the conductor plates 204b are made common, and the fork plugs 205b, fork plugs 205c1 to fork plugs 205c5 are electrically connected to the conductor plate 204b.

[0599] One fork plug 205e is electrically connected to one conductor plate 204d, such that the fork plug 205e1 is electrically connected to the conductor plate 204d1, the fork plug 205e2 is electrically connected to the conductor plate 204d2, the fork plug 205e3 is electrically connected to the conductor plate 204d3, and the fork plug 205e4 is electrically connected to the conductor plate 204d4. Further, a plurality of openings 216 are formed in one partition wall 214, and the fork plugs 205 are inserted into the openings 216.

[0600] In the configuration of FIG. 48, the connection wiring 211 attached to the fork plug 205 becomes complicated. Further, the connection wiring 211 obstructs and makes it difficult to insert the fork plug 205 into the opening 216.

[0601] By arranging the connection wiring 211 in a substantially parallel position, intersections with the connection wiring 211 as shown in FIG. 48 are eliminated, and it becomes easy to insert the fork plug 205 into the opening 216. Therefore, it becomes easy to switch which one of the transistors 101 (semiconductor elements (electrical elements) 101) a to transistors 101 (semiconductor elements (electrical elements) 101) e is to be tested by inserting or not inserting the fork plug 205 into the opening 216. FIGS. 36 to 40 are explanatory diagrams of a semiconductor element test apparatus, a driving method of a power cycle test apparatus, a test method, and an evaluation method of a semiconductor element and an electrical element according to the present invention.

[0602] For ease of understanding, in the semiconductor test apparatus of the present invention, mainly, the case where a semiconductor element (electric element) 101 is connected as illustrated in FIG. 11 will be exemplified and described. Note that the test (evaluation) component 117 in the semiconductor element test apparatus, the driving method of the power cycle test apparatus, the test method, and the evaluation method of the semiconductor element and the electric element is not limited to the configuration of FIG. 11, and it goes without saying that other configurations such as FIG. 13 and FIG. 14 may be used.

[0603] In FIG. 36 and the like, the On level (on voltage) is the signal voltage (signal level) at which the electric element (semiconductor element) is in the operating state and the on state. The Off level (off voltage) is the signal voltage (signal level) at which the electric element (semiconductor element) is in the non-operating state and the off state.

[0604] The on voltage and the off voltage can be varied or set by the data applied by the controller circuit (substrate) 111 to the DA converter circuit. Also, the one-cycle time tc, the on time ton, and the off time toff can be varied or set.

[0605] In FIG. 36, the transistors (electric elements) 101(1) to 101(n) turn on simultaneously during the ton period and turn off simultaneously during the toff period.

[0606] A test current Id flows through the transistors (electric elements) 101(1) to 101(n) simultaneously, and the test current Id is cut off. There is a deviation in the timing when the on voltage is applied to the transistor 101 and the transistor 101 turns on. The flow of the test current Id depends on the on timing of the transistor 101 that becomes the on state the latest.

[0607] In the embodiment of FIG. 36, it is assumed that all the transistors 101 are in the ON state, but the present invention is not limited thereto. In the embodiment of FIG. 14, the test (evaluation) components 117 (117a, 117b, 117c) of the three blocks can be independently turned on and off. Also, in the configuration of FIG. 15, each transistor 101 can be independently turned on and off.

[0608] The embodiment of FIG. 37 is an explanatory diagram of an embodiment in which an ON voltage is sequentially applied to the transistors 101(1) to 101(n) for testing or evaluation. An ON voltage is applied to the transistor 101(1) during the ton period, and an OFF voltage is applied during the toff period. After the toff period, an ON voltage is applied to the next transistor 101(2).

[0609] An ON voltage is applied to the transistor 101(2) during the ton period, and an OFF voltage is applied during the toff period. After the toff period, an ON voltage is applied to the next transistor 101(3).

[0610] The subsequent operations are performed on the transistor 101(n). After the implementation of the transistor 101(n), again, an ON voltage is applied to the transistor 101(1) during the ton period, and an OFF voltage is applied during the toff period. After the toff period, an ON voltage is applied to the next transistor 101(2).

[0611] As shown in FIG. 11, when the transistors 101(1) to 101(n) are connected in series, the transistors other than the selected transistor to which the ON voltage is applied are applied with the ON voltage. Therefore, the selected transistor 101 to which the ON voltage is applied controls "flowing", "stopping", and "changing the value of the current Id" of the test current Id.

[0612] In the connection state of the transistors 101 in FIG. 15, the transistors 101 and the power supply device 132 are connected in parallel. Therefore, by implementing the driving method of FIG. 37, each transistor 101 can independently control "flowing" and "stopping" the test current Id.

[0613] Figure 38 is a timing chart of a test method for applying an on-voltage to the gate terminals of a plurality of transistors 101, applying the on-voltage as a set of the plurality of transistors 101, and performing a test or evaluation.

[0614] An on-voltage is applied to the gate terminals of transistor 101(1) and transistor 101(2) during the ton period, and an on-voltage is applied to transistor 101(3) and transistor 101(4) after the toff period. Sequentially, a plurality of transistors 101 are turned on. After an on-voltage is applied to transistor 101(n - 1) and transistor 101(n), again, an on-voltage is applied to the gate terminals of transistor 101(1) and transistor 101(2) during the ton period, and an on-voltage is applied to transistor 101(3) and transistor 101(4) after the toff period.

[0615] As shown in FIG. 11, when transistors 101(1) to 101(n) are connected in series, transistors other than the selected transistor to which the on-voltage is applied are applied with an off-voltage. Therefore, the selected transistor 101 to which the on-voltage is applied controls to "let flow" the test current Id, and the selected transistor 101 to which the off-voltage is applied controls to "stop".

[0616] In the connection state of the transistor 101 in FIG. 14, the power supply device 132 is connected in parallel in sets of three transistors 101 (transistor 101(1), transistor 101(2), transistor 101(3)).

[0617] Therefore, by implementing the driving method of FIG. 38, it is possible to control to "let flow" or "stop" the test current Id by applying an on-voltage or an off-voltage to the gate terminals of each of transistors 101(1) and 101(2), or by applying an on-voltage or an off-voltage to the gate terminal of each transistor 101(3). FIG. 39 is a timing chart showing the application of an on-voltage or an off-voltage to the transistor 101 at the cycle of the tc period.

[0618] In FIG. 39(a), an on-voltage or an off-voltage is applied to the transistor 101(1) at the cycle of the tc period. Next, as shown in FIG. 39(b), an on-voltage or an off-voltage is applied to the transistor 101(2) at the cycle of the tc period. Next, as shown in FIG. 39(c), an on-voltage or an off-voltage is applied to the transistor 101(3) at the cycle of the tc period.

[0619] As described above, the position of the transistor 101 to which the on-voltage is applied is sequentially changed. After applying the on-voltage or the off-voltage to the transistor 101(n) at the cycle of the tc period, the on-voltage or the off-voltage is applied to the transistor 101(1) again at the cycle of the tc period.

[0620] As shown in FIG. 11, when the transistors 101(1) to 101(n) are connected in series, transistors other than the selected transistor 101 to which the on-voltage is applied are applied with an off-voltage. Therefore, the test current Id is controlled to be "flowed" or "stopped" by the selected transistor 101 to which the on-voltage is applied.

[0621] In the connection state of the transistor 101 in FIG. 15, the transistor 101 and the power supply device 132 are connected in parallel. Therefore, by implementing the driving method of FIG. 39, each transistor 101 can independently control the "flowing" and "stopping" of the test current Id.

[0622] In a semiconductor device test apparatus, a plurality of transistors 101 are mounted or installed, and an on-voltage or an off-voltage is applied to each transistor 101 to perform a test or an evaluation. The connection state of the transistor 101 is exemplified by the connection state of FIG. 15 for easy understanding.

[0623] In the embodiment of FIG. 40(a), during the ton period, an on-voltage is applied to transistor 101(1). After the toff period, during the ton period, an on-voltage is applied to transistor 101(2).

[0624] Thereafter, sequentially, after the toff period, during the ton period, an on-voltage is applied to transistor 101(3). After the toff period, during the ton period, an on-voltage is applied to transistor 101(4). ···· During the ton period, an on-voltage is applied to transistor 101(n). Again, during the ton period, an on-voltage is applied to transistor 101(1).

[0625] As shown in FIG. 40(a), when transistor 101(3) is damaged (becomes defective) and transistor 101(3) is turned off, the period from transistor 101(2) until transistor 101(4) is turned on is that after the ton of transistor 101(2), after toff + ton + toff, transistor 101(4) is turned on. Therefore, the period from transistor 101(2) until transistor 101(4) is turned on becomes longer.

[0626] When the cycle in which transistor 101 is turned on changes, changes occur in the state such as a surge voltage and an inrush current in the test current Id output from the power supply device 132. As shown in FIG. 40(a), when transistor 101(3) becomes defective and does not turn on, when transistor 101(4) is turned on or off, changes occur in the state such as a surge voltage and an inrush current. When the state such as a surge voltage and an inrush current changes, it may damage the transistor 101 mounted at the specific position where the test is performed.

[0627] To address this problem, as shown in Fig. 40(b), for the defective transistor 101(3), an off voltage is applied to set or control it to be in the off state at all times. Transistor 101(4) is controlled to be in the on state in advance at the timing when transistor 101(3) in Fig. 40(a) turns on. Similarly, transistor 101(5) is controlled to be in the on state in advance at the timing when transistor 101(4) in Fig. 40(a) turns on.

[0628] That is, the defective transistor 101 is detected, and the defective transistor 101 is turned off or disconnected from the test circuit. Alternatively, for the transistor 101 that stops the test, the application state of the off voltage is maintained and it is disconnected from the test circuit (controlled so that the test current Id is not applied).

[0629] The other transistors 101 are controlled to be in the on state to maintain the tc period. That is, the application control of the on voltage of the transistors 101 is sequentially and continuously performed. Therefore, states such as the surge voltage and inrush current do not change, and a stable test or evaluation can be carried out. Therefore, damage is not caused to the transistors 101 at the specific positions where the test is performed.

[0630] In the embodiments of Figs. 36 to 40 or the embodiments of the present invention, the voltage applied to the gate terminal (G) of the transistor 101 is the on voltage and the off voltage, but it is not limited thereto.

[0631] In the embodiments of the present invention, the voltage output by the gate driver circuit 113 may be the first on voltage V2, the second on voltage V1, and the off voltage Voff (V0). The gate driver circuit 113 can output voltages of three levels or more. For example, the on voltage V2, the on voltage V1, the off voltage Voff1 = 0V, and the off voltage Voff2 = -2V lower than the off voltage Voff1 are exemplified. In particular, when the transistor 101 is made of SiC, it is important to drive it with the off voltage Voff2 lower than the off voltage Voff1 or to maintain the off state.

[0632] The gate driver circuit 113 generates two types of on - voltages (V1 voltage, V2 voltage) and applies them to the gate terminal (G) (gate terminal (G)m, gate terminal (G)s) of the transistor 101.

[0633] The on - voltage V1 is applied to the gate terminal, and then the on - voltage V2 is applied to the gate terminal. By applying the on - voltage V2, the transistor 101 becomes strongly on (the channel - to - channel resistance of the transistor 101 decreases compared to the case of V1). Alternatively, the transistor 101 (test and evaluation component 117) becomes in an on - state due to a predetermined voltage.

[0634] When V1 < V2, the resistance between the channels of the transistor 101 can be made smaller than in the case of V1. When applying the V2 voltage, a constant current Ic is supplied to the transistor 101, and the voltage Vi between the channel terminals of the transistor 101 is measured. The Vi voltage is processed such as integration or addition of coefficients and becomes the temperature information Tj. The gate driver circuit 113 can output voltages of four or more levels. Also, it can output triangular waves, sine waves, etc. that change with time. Further, the voltage Vg can be randomly changed and applied to the gate terminal. The transistor 101 can be turned on / off controlled or set to an intermediate - level potential by the signal voltage Vg such as a triangular wave or a sine wave.

[0635] The transistor 101 operates / non - operates (turns on / off) according to the gate - signal voltage Vg output from the gate driver circuit 113. During the period when the transistor 101 is on, a test current Id flows between the channels of the transistor 101. The gate driver circuit 113 has a variable - resistance circuit 125. The resistance value R of the variable - resistance circuit 125 can be varied between 0 (Ω) and 500 (Ω).

[0636] When supplying a test current Id to the transistor 101 and when supplying a constant current Ic to the transistor 101, the resistance value R of the resistance circuit connected to the gate terminal (G) is changed. Or the resistance values of the resistance circuits are made different. Or changed.

[0637] Also, when changing from the V1 voltage to the V2 voltage, the resistance value R is changed in synchronization with the change timing of the resistance value R of the resistance circuit 125 when the V1 voltage is applied and the resistance value R of the resistance circuit 125 when the V2 voltage is applied. Increasing the resistance value R can suppress the generation of inrush current and surge voltage.

[0638] By changing or making different the resistance value R at the voltages Vn, V0, V1, and V2 applied to the gate terminal (G), the generation of inrush current and surge voltage can be suppressed. Also, by changing and adjusting the resistance value R, inrush current and surge voltage can be intentionally generated.

[0639] The gate driver circuit 113 can be set to a constant voltage or a voltage that changes over time. Also, the gate driver circuit 113 is configured to be able to be set (output) to a voltage that changes over time periodically.

[0640] It is effective to set the resistance value R of the resistance circuit 125 when the V2 voltage is applied to the gate terminal (G) and the resistance value R of the resistance circuit 125 when the V1 voltage is applied to the gate terminal (G) to different values. Depending on the value of the resistance value R, the resistance between the channels of the transistor 101 can be set, a constant current Ic can be supplied, and the inter-channel voltage Vi to be measured can be stabilized.

[0641] A resistor R (not shown) may be arranged between the gate terminal (G) and the emitter terminal e or the collector terminal c of the transistor 101. By adjusting the value of the resistor R, the slope angle of the voltage waveform at the rising and falling edges of the gate signal can be adjusted or set. Also, the generation of inrush current and surge voltage can be suppressed. Also, by making different and setting the resistance value R of the resistance circuit 125, inrush current and surge voltage can be intentionally generated.

[0642] The gate driver circuit 113 can set the slope (rise time Tr) of the rising waveform of the gate signal voltage applied to the gate terminal (G) of the transistor 101 and the slope (fall time Td) of the falling waveform. By separately adjusting the rise time Tr and the fall time Td, the on-time and on-characteristics of the transistor 101 are controlled to predetermined values.

[0643] As described above, in the electrical element (semiconductor element) test apparatus and test method of the present invention, the resistance value R of the variable resistance circuit 125 connected to the gate terminal of the transistor 101, or the rise time / fall time of the gate driver circuit 113 can be controlled, adjusted, or set.

[0644] From the Tj (terminal voltage Vi) before energizing the test current Id and the temperature information Tj (terminal voltage Vi) after energizing the test current Id, the change state due to the application of the test current Id of the transistor 101 can be obtained. Therefore, the characteristic changes and the like of the transistor 101 can be accurately and precisely measured or acquired. Needless to say, the above matters are similarly applicable to the inspection or test method of the semiconductor element (electrical element) in FIGS. 42 and 43. Needless to say, the semiconductor element (electrical element) test method described in the embodiments of the present invention can be combined in whole or in part.

[0645] In the embodiments of the present invention, the transistor 101 for which the test is performed has been described by exemplifying an IGBT, but is not limited thereto. For example, it may be a two-terminal element such as a diode. Further, it is not limited to semiconductor elements, and any electrical element such as a capacitor or a resistor can be applied. Needless to say, the matters or contents described in this specification and the drawings can be combined with each other in whole or in part.

[0646] As described above, specific descriptions have been made based on the embodiments in this specification. However, it goes without saying that the present invention is not limited thereto and can be variously modified without departing from the gist thereof.

Industrial Applicability

[0647] The present invention can achieve a low-resistance and stable connection even with different element terminal pitches in the standards of electrical elements. In addition, since connection changes can be easily implemented under various test conditions, cost reduction of the test apparatus and testing in a short time can be realized.

Explanation of Reference Numerals

[0648] 101 Electrical element (transistor) 102 Group of electrical elements (group of transistors) 104 Connection pattern 105 Screw (connector) 107 (Insulated type) gate driver 111 Controller circuit (controller) 112 Gate signal control circuit 113 Gate driver circuit 115 Temperature measurement circuit 116 Operational amplifier (buffer amplifier) 117 Test (evaluation) component 118 Constant current circuit 121 Constant current source 122 Switch circuit (switch element) 124 Switch circuit (switch element) 125 Variable resistance circuit 132 Power supply device 134 Heating and cooling plate 135 Circulating water pipe 161 Contact pattern 181 Heat dissipation pattern (heat sink) 182 Heat dissipation pattern (heat sink) 183 Printed circuit board (circuit board, printed sheet) 201 Switch circuit board 202 Connector 203 Sample Connection Circuit 204 Conductor Plate 205 Fork Plug 206 Connection Pin 207 Mother Board 208 Connector 209 Device Control Circuit (Board) 210 Housing 211 Connection Wiring 212 Power Supply Wiring 213 Connector 214 Partition 216 Opening 217 Partition 219 Connection Bolt 220 Contact Part 221 Fixing Screw (Fixing Tool, Fixing Screw, Fixing Bolt) 223 Heat Pipe 226 Element Terminal (Lead Terminal, Lead Pin, Connection Part) 227 (Cooling) (Heating) Cooling Fan, Cooler 231 Heat Pipe Fitting 232 Connection Pressure Part 233 Connection Holding Part 321 Pressing Plate 322 Pressing Head 323 Pressing Plate 324 Mounting Plate (Component Positioning Plate) 325 Pressing Tool 351 Pressing (Metal) Tool 352 Pressing (Metal) Tool 353 Pressing (Metal) Tool 354 Pressing (Metal) Tool 355 Buffer Material (Buffer Material, Buffer Part) 356 Buffer Material (Buffer Material, Buffer Part) 357 Pressing (Metal) Tool 358 Pressing (Metal) Tool 359 Pressing (Metal) Tool 361 Arm 362 Mounting Tool 363 Mounting Hole 364 Lever 365 Base 372 Insertion hole 381 Positioning post 382 Positioning hole 383 Spring (elastic object, spring, coil) 384 Adjustment part 385 Buffer plate (buffer) 386 Connecting part (connector) 391 Thermocouple (temperature sensor) 392 Buffer material 401 Input terminal 402 Light-emitting element 403 Light-receiving element 404 Selection circuit (selector) 405 Selection circuit (selector) 406 Buffer circuit (low-impedance circuit) 530 Confirmation lamp 704 Drain hole 705 Shielding plate (shielding board, shielding film) 706 Liquid leakage sensor (water leakage sensor, liquid leakage detection sensor) 707 Thermo-hygrometer (temperature and humidity measuring instrument) 708 Insulating sheet 709 Conductive sheet 761 Fan control unit 763 Control interface (I / F) 764 Alarm 801 Case 802 Door 803 Filter 804 Connecting fitting 805 Heat sink (heat dissipation film, heat dissipation membrane) 806 Connection terminal 807 Spring contact part 808 Common connection part 809 Hole 810 Solder (connection part) 811 Connector 812 Protrusion 814 Thermo-hygrometer 815 Inlet / outlet pipe 816 Plated protrusion (raised part) 817 Anisotropic conductive rubber 818 Socket part 819 Socket Pin 820 Bump 821 Concave-Convex Portion

Claims

[Claim 1] An electric element testing apparatus for testing an electric element having a first element terminal and a second element terminal, comprising: a first substrate on which a first contact pattern having a first width and a second contact pattern having a second width are periodically formed; a second substrate on which a first contact pattern having a first width and a second contact pattern having a second width are periodically formed; a power supply device for supplying a test current between the first connection terminal and the second connection terminal; Arranging the contact pattern of the first substrate and the contact pattern of the second substrate facing each other; the first element terminal is sandwiched between a first contact pattern of the first substrate and a first contact pattern of the second substrate; an electrical element testing device, characterized in that the second element terminal is sandwiched between a second contact pattern of the first substrate and a second contact pattern of the second substrate.

Images