Semiconductor integrated circuit for battery voltage monitoring, and electronic circuit system

Abstract

To provide a semiconductor integrated circuit for battery voltage monitoring capable of performing steady monitoring by a microcomputer and measuring battery voltage with high accuracy, and an electronic circuit system using the same.SOLUTION: The semiconductor integrated circuit for battery voltage monitoring comprises: a voltage input terminal (VIN) through which voltage is inputted from a battery as monitoring target; voltage-dividing circuits (R1, R2) including a series resistor dividing voltage of the voltage input terminal; an output terminal outputting voltage according to the voltage divided by the voltage-dividing circuit; a voltage buffer circuit (51) connected between a connection node (N1) of the series resistor and the output terminal; and a clamp circuit (52) clamping potential of the connection node of the series resistor.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a semiconductor integrated circuit for monitoring and generating a battery voltage for monitoring a battery voltage in an electronic circuit system including an LSI (large-scale semiconductor integrated circuit) that operates using a voltage from a battery as a power source, and an electronic circuit system using the same.

Background Art

[0002] In recent years, automobiles are equipped with an electronic circuit system including electronic devices such as a car audio and a navigation device, and a microcomputer (MCU) for controlling them. For these electronic devices and electronic circuit systems, a voltage obtained by stepping down the voltage from a battery with a DC-DC converter or the like is supplied as a power supply voltage. However, the voltage of an automotive battery is unstable. If the battery voltage drops during operation, the system may malfunction or run wild. Therefore, it is necessary for the microcomputer to immediately know when the power supply voltage is monitored and drops below a predetermined level. The voltage of the battery used in an in-vehicle system is 12V to 18V, and a voltage stepped down to, for example, 3.3V by a DC-DC converter or the like is supplied to the microcomputer.

[0003] Conventionally, there is a technique in which a reset IC that monitors the power supply voltage and generates a reset signal when the power supply voltage drops below a predetermined level is used to reset the microcomputer. As an invention related to such a reset IC and a system in which the reset IC detects that the battery voltage has dropped and resets the microcomputer, for example, there is one described in Patent Document 1.

[0004] Also, there is a method of monitoring the battery voltage by a microcomputer. In that case, a configuration is adopted in which a microcomputer incorporating an AD converter is used, and a voltage obtained by dividing the battery voltage with a series resistor is input to an I / O port for the built-in AD converter. Furthermore, there is an invention related to a semiconductor integrated circuit having a function of monitoring the state of a battery voltage instead of a microcomputer (for example, Patent Document 2).

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0006] The reset IC described in Patent Document 1 detects a decrease or overvoltage in the battery voltage by comparing the voltage obtained by dividing the power supply voltage (battery voltage) to be monitored with a series resistor with a reference voltage using a comparator, and generates a reset signal. Since it is a method of resetting the microcomputer, instantaneous monitoring is possible, but there is a problem that continuous monitoring of the battery voltage cannot be performed. In the case of an automotive battery, for example, the battery may be disconnected due to the cord coming off due to vibration of the vehicle body or the like. At this time, a phenomenon called load dump occurs, and the battery voltage may suddenly rise to an overvoltage state. Therefore, when a technique for monitoring the battery voltage by a microcomputer is adopted, if the voltage obtained by dividing the battery voltage with a series resistor is input to the I / O port for the AD converter, there is a problem that the elements of the I / O port of the microcomputer may be damaged due to the overvoltage accompanying the sudden rise in the battery voltage.

[0007] This invention has been made paying attention to the above problems, and an object thereof is to provide a semiconductor integrated circuit for monitoring a battery voltage that can accurately monitor the battery voltage with continuous monitoring by a microcomputer, and an electronic circuit system using the same. Another object of the present invention is to provide a semiconductor integrated circuit for battery voltage monitoring that can prevent elements of the I / O port of a microcomputer from being damaged when the battery voltage suddenly rises, and an electronic circuit system using the same.

Means for Solving the Problems

[0008] To achieve the above object, the present invention provides In a semiconductor integrated circuit for battery voltage monitoring provided with a voltage input terminal to which a voltage from a battery to be monitored is input, a voltage dividing circuit having a series resistor for dividing the voltage of the voltage input terminal, and an output terminal for outputting a voltage corresponding to the voltage divided by the voltage dividing circuit, a voltage buffer circuit connected between the connection node of the series resistor and the output terminal, a clamp circuit for clamping the potential of the connection node of the series resistor, is provided.

[0009] According to the semiconductor integrated circuit for battery voltage monitoring having the above configuration, since a voltage proportional to the battery voltage input to the voltage input terminal is output from the voltage buffer circuit, the battery voltage can be monitored accurately by performing steady monitoring by a microcomputer. Further, since the clamp circuit is provided, even if the battery voltage suddenly rises, the voltage output from the voltage buffer circuit can be suppressed. Therefore, when a system is configured in which the output voltage of the voltage buffer circuit is input to a microcomputer, it is possible to prevent elements of the I / O port of the microcomputer from being damaged.

Effects of the Invention

[0010] According to the present invention, it is possible to realize a semiconductor integrated circuit for battery voltage monitoring (hereinafter referred to as a battery voltage monitoring IC) that can perform steady monitoring by a microcomputer and accurately monitor the battery voltage, and an electronic circuit system using the same. Further, there is an effect that it is possible to prevent elements of the I / O port of the microcomputer from being damaged when the battery voltage suddenly rises.

Brief Description of the Drawings

[0011]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Mode for Carrying Out the Invention

[0012] Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows an example of a suitable system using a battery voltage monitoring IC to which the present invention is applied. As shown in FIG. 1, in this system, a DC voltage VBAT of 12V to 18V from the battery 11 is stepped down to a low voltage such as 3.3V by a DC-DC converter or a DC voltage conversion circuit 12 such as a regulator (LDO), and is supplied to a semiconductor device 14 such as a microcomputer (MCU) 13 or a system-on-chip (SoC) mounted on an in-vehicle control board.

[0013] Also, in the system shown in FIG. 1, a microcomputer 13 incorporating an AD converter (ADC) is used, and a battery voltage monitoring IC 15 according to the present invention for monitoring the battery voltage VBAT is provided. The output voltage Vout obtained by dividing the input voltage VIN of the battery voltage monitoring IC 15 by 1 / n is input to the ADC input terminal I / O (ADC) of the microcomputer 13. Then, when the battery voltage VBAT drops below a predetermined level or becomes overvoltage, the microcomputer 13 detects this and generates a reset signal RST, which is output to the semiconductor device 14. Also, the microcomputer 13 is configured to generate and output a control signal and a set voltage for the battery voltage monitoring IC 15.

[0014] FIG. 2 shows a circuit configuration of an embodiment of the battery voltage monitoring IC 15. As shown in FIG. 2, the battery voltage monitoring IC 15 of the present embodiment includes a voltage input terminal VIN to which the DC voltage VBAT from the battery 11 is input, a ground terminal GND, a switch element SW and series resistors R1 and R2 for voltage division connected in series between these terminals, and an external terminal CE for inputting an enable signal for on / off control of the switch element SW from the outside. Also, in this embodiment, although not particularly limited, the switch element SW is configured to be turned on and off by a signal obtained by inverting the signal input to the external terminal CE by an inverter INV.

[0015] The battery voltage monitoring IC 15 also includes a voltage buffer circuit 51 composed of a voltage follower or the like having an input terminal connected to the connection node N1 of the voltage dividing resistors R1 and R2, a voltage output terminal OUT for outputting the output voltage Vout of the voltage buffer circuit 51 to the outside, a clamp circuit 52 for clamping the potential of the connection node N1 of the voltage dividing resistors R1 and R2, and an external terminal VIO to which a set voltage V_I / O input to the clamp circuit 52 is input. The set voltage V_I / O is set to an arbitrary potential according to the system to be applied by the microcomputer 13 or the like.

[0016] FIG. 3 shows an example of a specific circuit of the voltage buffer circuit 51 that constitutes the battery voltage monitoring IC 15 of the present embodiment. As shown in FIG. 3, the voltage buffer circuit 51 in the present embodiment includes an input stage 51A including a pair of differential input PMOS transistors M1 and M2, current mirror NMOS transistors M3 and M4 connected between the drain terminals of the transistors M1 and M2 and a ground point, and a constant current resistor R3 connected between the connection node N0 of the switch element SW and the resistor R1 and the common source terminals of the differential input PMOS transistors M1 and M2. The voltage V1 of the connection node N1 of the voltage dividing resistors R1 and R2 is input to the gate terminal of the transistor M1. Instead of the resistor R3, for example, a constant current source using a constant voltage source and a current mirror circuit may be used.

[0017] Furthermore, the voltage buffer circuit 51 includes an output stage 51B including a resistor R4 and an NMOS transistor M5 connected in series between the connection node N0 of the switch element SW and the resistor R1 and a ground point, and an NMOS transistor M6 and a resistor R5 connected in a source follower configuration from R4 and M5. Among these, the potential of the connection node N2 between the transistor M1 and the transistor M3 of the input stage 51A is applied to the gate terminal of the transistor M5. Instead of the resistor R4, a constant current source may be used in the same manner as the resistor R3.

[0018] The gate terminal of the transistor M6 of the output stage 51B is connected to the connection node N3 between the resistor R4 and the transistor M5. The connection node N4 between the transistor M6 and the resistor R5 is connected to the output terminal OUT, and the potential of the connection node N4 is applied to the gate terminal of the differential input transistor M2 of the input stage 51A. Since the voltage buffer circuit 51 has the same configuration and similar functions as a general differential amplifier circuit, a detailed description of the operation is omitted. As described above, since the battery voltage monitoring IC 15 of the present embodiment is provided with the voltage buffer circuit 51, the output impedance can be reduced, and the influence of noise due to wiring routing can be reduced.

[0019] FIG. 4 shows an example of a specific circuit of the clamp circuit 52 that constitutes the battery voltage monitoring IC 15 of the present embodiment. As shown in FIG. 4, the clamp circuit 52 in the present embodiment includes a differential input stage 52A composed of a pair of differential input NMOS transistors M11 and M12, current mirror PMOS transistors M13 and M14 connected between the drain terminals of the transistors M11 and M12 and the power supply voltage terminal of the circuit, and a constant current resistor R6 connected between the common source terminal of the differential input transistors M11 and M12 and the ground point. The gate terminal of the transistor M11 is connected to the external terminal VIO, and is configured to input an external voltage V_I / O. Note that the resistors R6 and R7 may be constant current sources.

[0020] Further, the clamp circuit 52 of the present embodiment includes an amplifier circuit composed of a PMOS transistor M15 and a resistor R7 connected in series between the power supply voltage terminal of the circuit and the ground point, and an output stage 52B having a PMOS transistor M16 to which the potential of the connection node N5 between the drain terminal of the transistor M15 and the resistor R7 is applied. Note that the clamp circuit 52 of the present embodiment is configured to operate with the voltage V_I / O of the external terminal VIO as the power supply voltage, but the power supply voltage of the differential input stage 52A and the output stage 52B in the clamp circuit 52 may be the voltage V0 of the node N0, which is the voltage of the voltage input terminal VIN supplied through the switch SW.

[0021] The clamping circuit 52 having the above-described configuration drives the transistors M15 and M16 of the output stage 52B by the differential input stage 52A so that the gate voltage of the transistor M12 coincides with the gate voltage of M11, that is, the voltage V_I / O of the external terminal VIO. As a result, when the voltage V1 of the connection node N1 of the voltage dividing resistors R1 and R2 in FIG. 3 to which the source terminal of the transistor M16 is connected tends to be higher than the voltage V_I / O, the source current of M16 is increased, thereby clamping the voltage V1 of the node N1 to V_I / O.

[0022] Furthermore, in the present embodiment, although not particularly limited, the differential input stage 52A is configured to operate as a differential amplifier with an offset. Specifically, it is set to have an offset voltage Voff of several hundred mV in advance so that V1 > V_I / O. As a result, V1 = V_I / O + Voff, and the output voltage Vout of the IC15 can vary over the entire dynamic range of the AD converter of the microcomputer to which this voltage is input. More specifically, a differential amplifier generally may have an offset voltage ΔV of several hundred mV due to manufacturing variations. When this offset voltage ΔV becomes negative, if the above offset voltage Voff is not set in advance, V1 will be clamped to V_I / O - ΔV.

[0023] On the other hand, if the differential input stage 52A is designed to have an offset voltage Voff of several hundred mV in advance as described above, the offset voltage Voff and the offset voltage -ΔV due to manufacturing variations cancel each other out, resulting in V1 = V_I / O, and the maximum value of Vout becomes the upper limit value of the dynamic range of the AD converter. On the other hand, when the offset voltage due to manufacturing variations is positive (+ΔV), the clamping voltage V1 = V_I / O + Voff + ΔV, and the maximum value of Vout shifts upward, so that the dynamic range of the AD converter can be effectively utilized.

[0024] Next, the advantages of providing the above clamping circuit 52 in the IC15 will be described. Fig. 5(A) shows the characteristics of the output voltage Vout of the battery voltage monitoring IC when the clamp circuit 52 is not present, and Fig. 5(B) shows the characteristics of the output voltage Vout of the battery voltage monitoring IC when the clamp circuit 52 is present. In both cases, the resistors R1 and R2 for voltage division are assumed to be set with a resistance ratio such that a voltage V1, which compresses the voltage VBAT (e.g., 30V) at the input terminal VIN to 1 / 6, is generated at the node N1.

[0025] When the clamp circuit 52 is not present, as shown in Fig. 5(A), assuming that the input voltage VBAT starts from 0V, rises to 30V, and then drops from 30V to 0V after a predetermined time, the output voltage Vout follows the change in the input voltage VBAT and changes from 0V to 5V and then drops from 5V to 0V after a predetermined time. Therefore, when VBAT = 30V, Vout = 5V. When this voltage Vout is input to the ADC input terminal I / O (ADC) of a microcontroller operating at a power supply voltage of 3.3V, it may damage the internal elements of the microcontroller.

[0026] On the other hand, when the clamp circuit 52 is present, as shown in Fig. 5(B), assuming that the input voltage VBAT starts from 0V, rises to 30V, and then drops from 30V to 0V after a predetermined time, the output voltage Vout starts to rise following the change in the input voltage VBAT, but becomes constant at the time point t1 when it reaches the voltage V_I / O of the external terminal VIO before the time point t2 when VBAT reaches 30V. Also, in the process of the input voltage VBAT dropping, it changes so as to start dropping from the time point t4 when the voltage of VBAT / 6 reaches V_I / O, which is after the timing t3 when VBAT starts to drop from 30V.

[0027] Therefore, if the voltage V_I / O of the external terminal VIO is set to 3.3V, even if VBAT = 30V, the upper limit of Vout will be 3.3V. Even if Vout is input to the ADC input terminal I / O(ADC) of the microcontroller operating at a power supply voltage of 3.3V, the internal elements of the microcontroller will not be damaged. As a result, when the battery voltage monitoring IC15 of this embodiment is used in the in-vehicle system shown in FIG. 1, even if the voltage VBAT of the battery 11 jumps up to an overvoltage state due to cranking, load dump, etc., Vout can be limited by the clamp circuit 52 to protect the I / O port of the microcontroller 13 from overvoltage.

[0028] Also, in the battery voltage monitoring IC15 of this embodiment, since the switch SW and the external terminal CE for inputting the control signal of this switch SW are provided, by turning off the switch SW, it is possible to prevent a current from constantly flowing through the voltage dividing resistors R1 and R2. Therefore, the current consumption can be reduced and the consumption of the battery can be suppressed. Furthermore, different from a system that monitors the battery voltage using a reset IC as described in Patent Document 1, since a voltage (V1) proportional to the battery voltage VBAT can be input to the microcontroller 13, the microcontroller can constantly monitor the state of the battery and perform processes such as detecting abnormalities such as low voltage and predicting the battery life.

[0029] Also, the battery voltage monitoring IC15 of this embodiment has fewer external terminals compared to the LSI of Patent Document 2, and a 5-pin small package can be used, enabling cost reduction and space saving. Furthermore, the battery voltage monitoring IC15 of this embodiment also has advantages as described below compared to a conventional general battery voltage monitoring circuit.

[0030] FIG. 6 shows a configuration example of a conventional general battery voltage monitoring circuit. As shown in FIG. 6, in the case of a conventional battery voltage monitoring circuit, it is common to provide series resistors R1 and R2 for dividing the voltage VBAT of the battery 11 in front of the microcontroller 13, and input the voltage divided by the resistors R1 and R2 to the ADC input terminal I / O(ADC) of the microcontroller 13. However, in the battery voltage monitoring circuit as shown in FIG. 6, since a current constantly flows through the voltage dividing resistors R1 and R2, there is a large amount of wasted power consumption. In addition, since the resistors R1 and R2 are configured as external resistors using discrete elements with large variations, there is a problem that the accuracy of the monitoring voltage input to the microcontroller decreases.

[0031] Also, in the case of a conventional battery voltage monitoring circuit, even if a clamp circuit is provided, it is common to connect a Zener diode Dz between the connection node N1 of the resistors R1 and R2 and the ground point. In such a circuit, there are problems that a leakage current flows through the Zener diode Dz, causing an error in the potential of the node N1, and the number of components increases. Furthermore, when the resistors R1 and R2 are configured by external elements, wiring routing is required to connect the resistor elements, and as the wiring length increases, it becomes more susceptible to noise.

[0032] On the other hand, according to the battery voltage monitoring IC 15 of the above embodiment having the configuration shown in FIGS. 2 to 4 and the system using the same, since the voltage dividing resistors R1 and R2 are on-chip resistor elements, the variation in the resistance ratio is smaller compared to the case of using external elements, and the accuracy of the monitoring voltage input to the microcontroller is higher. Also, since there is no need for wiring routing to connect resistors outside the IC, it becomes less susceptible to noise. Furthermore, since external resistors and Zener diodes are not required, there is an advantage that the number of components can be reduced, the mounting density of the circuit can be increased, and miniaturization can be achieved.

[0033] (Modification example) Next, a modification example of the battery voltage monitoring IC 15 of the above embodiment will be described. In the first modification example, in the battery voltage monitoring IC 15 shown in FIG. 2, the voltage V_IO input to the clamp circuit 52 is configured to be input from the external terminal VIO, whereas a constant voltage circuit for generating the voltage V_IO is provided inside the IC so as to omit the external terminal VIO and reduce the number of terminals of the IC.

[0034] FIG. 7 shows an example of a voltage generation circuit for generating the voltage V_IO. The voltage generation circuit of FIG. 7 includes a depletion-type NMOS transistor M21 and an enhancement-type NMOS transistor M22 connected in series between a power supply voltage terminal and a ground point, and a depletion-type NMOS transistor M23 and series resistors R8 and R9 also connected in series between the power supply voltage terminal and the ground point. Among these, the gate and source of the transistor M21 are connected, the gate terminal of the transistor M23 is connected to the source terminal of M21, the gate terminal of the transistor M22 is connected to the connection node N6 of the resistors R8 and R9, and it is configured to output a constant voltage from the source terminal of the transistor M23. Note that a constant voltage circuit having such a configuration is a known circuit as disclosed in, for example, Japanese Patent Laid-Open No. 8-30345, etc., and thus a detailed description of the operation is omitted.

[0035] FIGS. 8(A) and (B) show other modification examples of the battery voltage monitoring IC 15 of the embodiment of FIG. 2. Among these, the battery voltage monitoring IC 15 of the modification example shown in FIG. 8(A) is provided with an external terminal EF for outputting an error flag FLG and an open-drain NMOS transistor M17 connected between the terminal EF and the ground point, and is configured to turn on the transistor M17 and output the error flag FLG from the external terminal EF when the clamp circuit 52 clamps the potential of the connection node N1 of the resistors R1 and R2.

[0036] Note that a pull-up resistor Rp is connected to the transmission line connected to the external terminal EF. When the transistor M17 is turned on, it draws current from the pull-up resistor Rp and is configured to output a low-level signal to the microcontroller. Also, the signal for turning on the transistor M17 can be generated by providing a comparator in the clamp circuit 52 to detect that the clamp circuit 52 has entered the clamp operation by comparing, for example, the potential of the node N5 in FIG. 4 with a predetermined reference voltage Vref. By appropriately setting this reference voltage Vref, an error flag FLG can be output when the input voltage VBAT becomes an overvoltage and enters the clamp operation.

[0037] On the other hand, the battery voltage monitoring IC15 of the modified example shown in FIG. 8(B) is provided with a reset circuit 53 that detects an abnormal low voltage state or the like and generates a reset signal, an external terminal RS for outputting the reset signal RST, and an open-drain NMOS transistor M17 connected between the terminal RS and the ground point. When the output of the voltage buffer circuit 51 drops below a predetermined voltage, the transistor M17 is turned on to output the reset signal RST from the external terminal RS.

[0038] Note that the reset circuit 53 can be constituted by a comparator that detects that the input voltage VBAT has become an abnormal low voltage state or the like by comparing, for example, the output voltage of the voltage buffer circuit 51 with a predetermined reference voltage. Also, a modified example in which an external terminal EF shown in FIG. 8(A), a transistor M17, and a comparator for detecting an overvoltage state are provided in the battery voltage monitoring IC15 together with the external terminal RS, the transistor M17, and the reset circuit 53 shown in FIG. 8(B) is also possible.

[0039] The above describes an embodiment and a modified example of the present invention. However, the present invention is not limited to the above embodiment, and various modifications are possible based on the technical idea of the present invention. For example, in the above embodiment, a battery voltage monitoring IC composed of MOS transistors was described. However, a bipolar transistor may be used instead of the MOS transistor to configure the battery voltage monitoring IC. Also, in the above embodiment, the case where the present invention is applied to an in-vehicle system was described. However, the present invention can be applied to an electronic circuit system other than the in-vehicle system.

Explanation of Reference Numerals

[0040] 11… Battery, 12… DC voltage conversion circuit, 13… Microcomputer (MCU), 14… Semiconductor device, 15… Battery voltage monitoring IC, 51… Voltage buffer circuit, 52… Clamp circuit, 53… Reset circuit

Claims

1. A semiconductor integrated circuit for monitoring a battery voltage, comprising: a voltage input terminal to which a voltage from a battery to be monitored is input; a voltage dividing circuit having a series resistor for dividing the voltage of the voltage input terminal; and an output terminal for outputting a voltage corresponding to the voltage divided by the voltage dividing circuit. A voltage buffer circuit connected between a connection node of the series resistor and the output terminal. A clamping circuit for clamping the potential of the connection node of the series resistor. A semiconductor integrated circuit for monitoring a battery voltage, characterized by comprising the above.

2. The clamping circuit includes: A differential input stage in which a predetermined set voltage is input to one input terminal and the other input terminal is connected to the connection node of the series resistor. An output stage having a source follower circuit connected to the output node of the differential input stage and an output transistor to which the output of the source follower circuit is applied to a control terminal. The semiconductor integrated circuit for monitoring a battery voltage according to claim 1, wherein the output transistor is connected between the connection node of the series resistor constituting the voltage dividing circuit and the ground point.

3. The semiconductor integrated circuit for monitoring a battery voltage according to claim 2, characterized in that a first external terminal is provided for externally inputting the set voltage input to the one input terminal of the differential input stage.

4. The semiconductor integrated circuit for monitoring a battery voltage according to claim 2, characterized in that a constant voltage circuit for generating the set voltage input to the one input terminal of the differential input stage is provided.

5. A switch element connected in series with the series resistor constituting the voltage dividing circuit. A second external terminal to which a signal for controlling the on / off of the switch element can be input. The semiconductor integrated circuit for monitoring a battery voltage according to claim 1, characterized by comprising the above.

6. An electronic circuit system comprising: the semiconductor integrated circuit for monitoring a battery voltage according to any one of claims 1 to 5; and a microcomputer having an input terminal for inputting a voltage to be AD-converted by the built-in AD conversion circuit. The electronic circuit system is characterized in that the voltage output from the output terminal of the semiconductor integrated circuit for monitoring a battery voltage is input to the input terminal of the microcomputer.

7. An electronic circuit system comprising: a semiconductor integrated circuit for monitoring a battery voltage according to claim 3; and a microcomputer having an input terminal for inputting a voltage to be A / D converted by an A / D conversion circuit incorporated therein, wherein a voltage output from the output terminal of the semiconductor integrated circuit for monitoring the battery voltage is input to the input terminal of the microcomputer, and the microcomputer generates the set voltage, and the generated set voltage is input to the first external terminal.

8. An electronic circuit system comprising: a semiconductor integrated circuit for monitoring a battery voltage according to claim 5; and a microcomputer having an input terminal for inputting a voltage to be A / D converted by an A / D conversion circuit incorporated therein, wherein a voltage output from the output terminal of the semiconductor integrated circuit for monitoring the battery voltage is input to the input terminal of the microcomputer, and a signal for controlling the on / off of the switch element is generated by the microcomputer, and the generated signal is input to the second external terminal.

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