Hermetic packaging of electronic components

Abstract

To provide: implantable electronic devices, e.g., for bio-medical applications, for protecting the body of a patient against leakage of harmful products released from the electronic devices into biotissues and against other adverse effects on the body in vivo, and for protecting implantable devices; and packaging methods for electronic components for manufacturing the electronic devices.SOLUTION: A packaged implantable device 1 comprises an encapsulated electronic component 101, a top encapsulation layer 103 and a bottom encapsulation layer 104, where the top encapsulation layer 103 and the bottom encapsulation layer 104 at least partially overlap to form areas of a double layer structure 105 at side walls of the encapsulated device. The top and bottom encapsulation layer are designed to not only cover the top surface and the bottom surface, respectively, of the electronic component to be packaged, but also extend beyond the top or the bottom surface in the vertical direction, and also cover the side walls of the device. The bottom encapsulation layer 104 forms the outermost layer of the encapsulated device at the areas of double layer structure 105.SELECTED DRAWING: Figure 1A

Description

Technical Field

[0001] The present invention relates to the field of electronic devices, and more particularly to implantable electronic devices for biomedical applications and the like. More specifically, the present invention relates to hermetic package electronic devices for in vivo biomedical applications and a method for packaging electronic components for manufacturing the electronic devices.

Background Art

[0002] Electronic devices are widely used and often required to function even under severe environmental conditions. For example, implantable electronic devices such as chips are used for in vivo biomedical applications such as performing, undertaking, controlling, or monitoring biological functions. A specific example is a retinal implant. Such implantable electronic devices usually come into direct contact with body fluids and tissues. Therefore, electronic devices, particularly implantable electronic devices used for in vivo biomedical applications, must be packaged to achieve the following (1) and (2). (1) Protect the implantable device from any invasion caused by the aqueous environment of the living body, such as the invasion of redox-active or corrosive compounds that may cause corrosion, damage, malfunction, etc. of the implantable device. (2) Protect the body from leakage of harmful substances from the electronic device into the biological tissue or other adverse effects on the patient's body, such as mechanical friction caused by the implantable device in the body.

[0003] In a prior art approach for packaging an implantable electronic device, typically, the device is housed in a metal casing. In this known packaging method, the package is considerably larger than the original chip, and a larger incision is required during implantation, thus resulting in a more extensive healing and inflammatory process. Furthermore, the larger the implant, the greater the fibrous encapsulation, increasing the risk of causing local tissue irritation to the patient during the use of the implant. The hermetic package of the present invention is superior to the prior art approach in that it is small, for example, substantially the same size as or only slightly larger than the original device. A device of small dimensions enables a less traumatic implantation and faster wound healing. Compared with the conventional method of housing individual electronic devices in a metal casing, the method of the present invention has the advantage that it can be applied to the simultaneous processing of a number of electronic devices or components, whether of the same or different types, and is substantially independent of the material of the substrate or components used. Furthermore, the packaging can be carried out in a clean environment such as a clean room after the electronic device or components have been processed, thus avoiding contamination and / or damage. Furthermore, the packaging method of the present invention provides a very good step coverage that achieves a hermetic seal with overlapping layers and a capsule encapsulation with a uniform thickness.

[0004] Patent Document 1 discloses other methods of packaging biomedical devices, and the method does not involve the use of the invention of the release layer as a temporary barrier to protect the capsule layer from deterioration during manufacturing. Due to this difference in the processing method, Patent Document 1 cannot achieve airtight encapsulation with two layers, and an additional coating is required to achieve airtight sealing. Specifically, the packaging method of the present invention enables the provision of an airtight double layer that covers the entire electronic device, particularly the side walls. Such a double layer structure is particularly advantageous for ensuring airtight sealing. This is because a single layer may contain pinholes (i.e., minute defects), and these pinholes may form an inlet for the surrounding medium that may be corrosive. The material of the second layer seals the pinholes and ensures the airtight sealing of the encapsulation. The prior art methods were unable to provide a double layer seal that completely surrounds all sides of the electronic device. The main reason is that the electronic device needs to be fixed during coating, and fixing makes some locations on the surface of the electronic device inaccessible. Only with the packaging method of the present invention, which reverses the device and uses a release layer such as photoresist as a temporary protective barrier, can a shape-following sealing material be deposited on the side walls from both sides, and thus a double layer that completely seals the perimeter can be provided. In contrast to the packaged device disclosed in Patent Document 1, the packaging method of the present invention further does not require the side walls of the device to be inclined and can be used with a highly shape-following coating that can coat the straight and right-angled surfaces commonly present in biomedical implants. Furthermore, it goes without saying that Patent Document 1 is not related to retinal implants, does not assume the use of a top coat, and does not assume the use of the transparent top coat described in the present invention.

[0005] An advantage of the method and package of the present invention is that a highly reliable hermetic encapsulation with a reduced number of pinholes can be obtained with only two overlapping layers without the need for an additional capsule layer surrounding the encapsulated chip.

[0006] Patent Document 2 and Patent Document 3 disclose an implantable medical device including an electronic component encapsulated in a multilayer capsule by being encapsulated by a package with a laminated capsule layer.

Summary of the Invention

[0007] Embodiments of the present invention relate to a method for hermetically packaging an electronic component for manufacturing a packaged electronic device such as an implantable electronic device for in vivo biological or biomedical applications, and a packaged electronic device obtained by the method. The package according to the present invention advantageously provides an improved hermetic barrier, which preferably minimizes the interaction between the electronic device or its functional electronic components and the use environment such as the in vivo environment when implanted. Therefore, the package of the present invention preferably: 1) ensures the maintenance of the function of the electronic device under in vivo conditions, such as avoiding malfunction of the device due to corrosion or circuit short - circuit effects; 2) protects the body from leakage / elution or diffusion of the materials of the electronic components of the device into the surrounding tissue when implanted, or other inhibiting factors such as mechanical friction of the implanted device in the body. In other words, the hermetic package characterizing the device of the present invention forms a highly reliable barrier against external factors. More specifically, the present invention can provide a bidirectional diffusion barrier such that the device is not affected by the in vivo environment and non - physiological or non - biocompatible materials of the electronic components do not diffuse into the tissue around the implantable device. The advantageous properties of the package of the present invention are preferably obtained by providing a layered capsule that completely encapsulates the electronic component. The resulting packaged device has at least a part of the layer in which the electronic component is embedded overlapping to form a double - layer structure, which is preferably obtained or obtainable using the packaging method of the present invention.

[0008] In a first embodiment, the present invention relates to an embedded package device including an electronic component and a hermetic package that encapsulates the electronic component, the package including a capsule upper layer and a capsule lower layer, at least a part of which overlaps so as to form a double layer. Preferably, the double layer structure extends and covers up to at least a part, more preferably completely, the side wall of the electronic component. Thus, the package of the device may advantageously provide a hermetic seal to the electronic component. In the present specification, the terms "hermetic", "hermetic seal", and "hermetic sealing" mean being impermeable or essentially impermeable to undesirable external factors that negatively affect the function of the device. That is, a "hermetic" seal or encapsulation is an effective way to preferably minimize or avoid corrosion or other malfunctions of the device by preferably shielding the embedded device from its environment, particularly an aqueous in-vivo environment. Preferably, a "hermetic" seal or layer prevents the intrusion of body fluids into the device. The term "hermetic" may further mean that the embedded device is similarly shielded from the body.

[0009] The package device is usually shaped by a side wall surface and upper and lower surfaces. The terms "capsule upper layer" and "capsule lower layer" usually cover the upper (top) surface of the electronic component to be encapsulated and at least a part of the lower surface of the electronic component. Thus, the "upper surface" of the electronic device is completely or partially covered by one or more layers, and the outermost layer of the layers forms the upper surface of the package-embedded device. On the other hand, the lower surface of the electronic component to be packaged is covered by one or more layers, and the outermost surface of the layers forms the lower surface of the package-embedded device.

[0010] It is understood that the device may include, for example, feedthroughs or holes that communicate with the in vivo environment, such as by electrical stimulation of surrounding cells or tissues. The "upper part" of the package-embedded device includes, for example, a functional structure or function that enables the device and its environment to interact by containing electrodes or photodiodes that apply or record stimuli. Thus, the "upper surface" of the package-embedded device (partially) covers its upper part, and the "lower surface" covers the lower part. In one aspect, on the upper surface or a part thereof, a coating layer may be exposed to the outside as the outermost layer in contact with the external environment. Regarding the manufacturing method for providing a package device according to the present invention, the manufacturing method is characterized by an initial step of coating one or more capsule layers on the upper surface, and only after the upper surface is coated, the lower surface is formed by coating one or more sub-capsule layers.

[0011] In a second embodiment, the present invention provides an implantable system including a confidential package device according to the present invention.

[0012] In a third embodiment, the present invention relates to a packaging method for providing or manufacturing an implantable device, the method including: (a) a step of providing at least one electronic component on a substrate; (b) a step of coating the electronic component with at least one upper capsule layer; and (c) a step of coating the electronic component with at least one lower capsule layer, wherein the upper capsule layer and the lower capsule layer overlap at least partially so as to form a bilayer structure. The method of the present invention may be able to process a plurality of electronic components as electronic dice or the like so as to manufacture a large number of packaged electronic devices at any time, thereby providing an advantageous manufacturing method that is cost-effective and scalable (low-cost and large-scale manufacturable), particularly for chip manufacturing.

[0013] In a further embodiment, which is also an aspect of the second embodiment, the present invention relates to a method of packaging an electronic component that provides a package-embedded device, the method comprising: (i) introducing grooves into an electronic component proto-structure to provide an assembled component having at least one, preferably a plurality of, spaced-apart electronic components provided on a substrate, wherein the adjacent electronic components and their common substrate support or define the grooves; (ii) applying at least one capsule upper layer to the assembled component to coat the electronic components and draw it down into the grooves; (iii) applying a release layer to the assembled component; (iv) partially removing the release layer and leaving a residue of the release layer in the drawn-down grooves; (v) inverting the assembled component (100) upside down; (vi) removing from the lower surface of the assembled component (a) the substrate, (b) the capsule upper layer, and (c) the residue of the release layer; and (vii) applying at least one capsule lower layer to the assembled component, wherein the capsule upper layer and the capsule lower layer are applied so that at least a portion thereof overlaps to form a double layer. According to the method of the present invention, by adding the capsule upper layer and the release layer, the upper surface or upper side of the assembled component is processed first. Subsequently, the assembled component is preferably inverted upside down (thus, preferably from below, although less preferably from above, the lower surface is processed), and the substrate and the capsule upper layer under the release layer in the grooves are removed from the lower side of the assembled component. Thus, a residue of the release layer is left in each groove, and the remaining residue of the release layer protects the capsule upper layer that draws down the side walls of the grooves from degradation. Subsequently, the release layer is usually completely removed. Finally, the capsule lower layer is applied to the lower surface and side walls of the assembled component. The method of the present invention is advantageous because an airtight package is achieved by the laminated capsule layer extending to the side walls of the electronic components, preferably by inverting the assembled component when leaving the release layer for processing and protection, thereby obtaining improved airtightness.

[0014] The packaging device of the first aspect of the present invention can preferably be manufactured by the method according to the third and fourth embodiments of the present invention for packaging an embedded device.

Brief Description of the Drawings

[0015]

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DETAILED DESCRIPTION OF THE INVENTION

[0016] The present invention will be described in detail below. It should be understood that the present invention is not limited to the specific methods, protocols, and reagents described in the present specification, and they may be changed. Also, it should be understood that the terms used in the present specification do not limit the scope of the present invention, and the scope of the present invention is defined only by the appended claims. Unless otherwise specified, all technical terms and scientific terms used in the present specification have the same meaning as commonly understood by those skilled in the art.

[0017] The features of the present invention are described below. These features are described as specific aspects. However, it should be understood that these aspects may be combined in any way and in any number to create further aspects. The variously described examples and preferred aspects should not be construed as limiting the present invention by the described aspects. This description should be construed as supporting and encompassing aspects combined with any number of the disclosed and / or preferred features of the described aspects. Further, all orders and combinations of all the features described in the present specification are considered to be supported by the description of the present specification unless otherwise understood.

[0018] Furthermore, terms such as first, second, etc. in the description and claims are used to distinguish between similar elements and do not necessarily indicate an order in terms of time, space, ranking, or other methods. The terms used are interchangeable under appropriate circumstances, and it should be understood that the aspects of the present invention described can be carried out in an order other than that described or shown. It should be mentioned that the described method steps can be appropriately reordered. In the following description, as examples, some examples and aspects in which the order of steps is changed are described, but the present invention is not limited thereto.

[0019] Furthermore, terms such as upper, lower, above, below, etc. in the description and claims are used for illustrative purposes and do not necessarily indicate a positional relationship. The terms used are interchangeable under appropriate circumstances, and it should be understood that the aspects of the present invention described can be carried out in an orientation other than that described or shown.

[0020] Unless the context requires otherwise, throughout the specification of this application and the claims that follow, the term "comprising" and its variants such as "including" mean including the recited member, integer, or step, and do not exclude other unrecited members, integers, or steps. The term "consisting of" is a specific aspect of the term "comprising" and excludes other unrecited members, integers, or steps. In the context of the present invention, the term "comprising" encompasses the term "consisting of". Therefore, the said "comprising" also encompasses "consisting of" together with the said "consisting of", for example, a composition "comprising" X may consist only of X, or may include X plus additional things such as X+Y, etc.

[0021] Unless otherwise indicated or unless the context clearly dictates otherwise, the articles used in the context of describing the present invention (particularly in the context of the claims) should be construed as encompassing both the singular and the plural. The recitation of numerical ranges is merely used as a shorthand way of referring to the individual numerical values within the range. Unless otherwise specified, each numerical value is incorporated into the specification as if it were individually recited in the specification. No language in the specification should be construed as meaning an element that is necessary for the practice of the invention but not recited in the claims.

[0022] The term "substantially" does not exclude the meaning of "completely". For example, a composition that "substantially" does not contain Y may not completely contain Y. If necessary, the term "substantially" may be omitted from the definition of the present invention.

[0023] The term "about" used in connection with a numerical value x means x ± 10%.

[0024] In the first embodiment, the present invention relates to a hermetic package electronic device including electronic components. Preferably, the device is an embedded device. More preferably, the electronic device may be a retinal implant suitable for or configured to be implanted in the eye. The electronic device according to the present invention includes a hermetic package having a laminated or bilayer structure, and preferably, the hermetic package extends on or at least partially covers the side wall of the electronic component. Thereby, the package improves the hermetic encapsulation of the device for suitable long-term implantation. Preferably, the hermetic package prevents or reduces adverse effects from the aqueous in-vivo environment after implantation, such as the intrusion of body fluids or cells, and the diffusion of non-bio-compatible agents such as metals from the electronic component into the in-vivo environment. Preferably, the packaged device is encapsulated or embedded by at least two corrosion-resistant capsule layers, namely, an upper capsule layer and a lower capsule layer. The hermetic package device may also have more than two capsule layers. For example, the device may include one or more upper capsule layers that are stacked on each other and / or one or more lower capsule layers that are partially or completely stacked on each other. The outermost layer may preferably have biocompatibility. The hermetic package device may include a further coating, such as a top coat, that imparts further characteristics to the electronic device claimed in the claims. For example, in the case of a hermetic package photovoltaic (retinal) implant, the top coat and / or the upper capsule layer may be formed of a transparent material to receive data encrypted by an optical signal such as visible light or near-infrared (IR). In the case of the electronic device of the present invention used as an implanted stimulator or an implanted recording device, the top coat or the upper capsule layer may embed electrodes. Therefore, preferably, the electrodes and / or the photodiodes located on the upper surface of the electronic device are preferably exposed to the environment, and thus, at least the outermost surface of the electrodes and / or the photodiodes is not covered by any capsule layer. More preferably, the electrodes and / or the photodiodes are embedded in at least one capsule layer, particularly the top coat and / or the upper capsule layer.The upper capsule layer and the lower capsule layer may each be composed of one or more conductive (bottom) layers, and the layer may be patterned, for example, as an electric wire, so that the upper and lower surfaces of the device may form one or more electrical connections.

[0025] Examples of the package-embedded device 1 are shown as examples in FIGS. 1A to F and FIG. 3, but are not limited thereto. The package electronic device according to the present invention includes an electronic component 101 encapsulated by an airtight package (the airtight package is formed by a layer surrounding and encapsulating the electronic component 101), and the package includes at least an upper capsule layer 103 and a lower capsule layer 104. The upper capsule layer 103 and the lower capsule layer 104 at least partially overlap, for example, at the side walls of the capsule-encapsulated device, to form regions of double-layer structures 105 and 105'. Therefore, the upper capsule layer and the lower capsule layer usually not only (at least partially) cover the upper and lower surfaces of the electronic component to be packaged, but are designed to extend, for example, in the vertical direction beyond the upper and lower surfaces, and thus also (at least partially) cover the side walls of the device. In the embodiments illustrated in FIGS. 1A to D, the lower capsule layer 104 forms the outermost layer of the capsule-encapsulated device in the regions of the double-layer structures 105 and 105'. However, assembly parts 100 in which the upper capsule layer 103 forms the outermost layer of the device in such regions of the double-layer structures 105 and 105' are also described in this specification.

[0026] The package electronic device 1 may generally be any electronic device such as a chip, a stimulating device, and a control or monitoring device. The electronic device is preferably an implantable type. The package electronic device is preferably useful for biological or biomedical applications, and particularly preferably for in vivo applications. Exemplary implantable electronic devices include subretinal or supraretinal implants described in International Publication No. 2016 / 180517 and PCT / EP2018 / 069159, and brain implants for stimulating the visual field of view. With these implants, it is possible to electrically stimulate nerve cells in a patient's eye or brain (for example, to restore vision by stimulating the visual field of view or to stimulate nerve cells for the treatment of Parkinson's disease), and / or to record electrical signals of the patient's nerve cells. The hermetic package described in the present specification ensures a long-term implant half-life at the implantation site without the implanted electronic device being affected by the aqueous in vivo environment.

[0027] The electronic device 1 according to the present invention may include one or more electronic components 101. It is advantageous for the electronic component 101 to be in a cuboid shape and preferably not to include a packaged electronic element such as a transistor having a three-dimensional shape protruding outward (protruding from the cuboid or protruding from the surface of the cuboid), and may be an integrated circuit also called a die. Other types of the components include microelectromechanical systems (MEMS) such as 0-level packaged MEMS and thin-film encapsulated MEMS. The MEM device includes, for example, passive components, actuators, sensors, and the like. Further examples of the components include microfluidic devices. Further examples include batteries such as secondary batteries, circuits, transistors, resistors, photodiodes, capacitors, and the like. The electronic component 101 may actually represent a stack of a plurality of electronic units, such as a memory chip on an integrated circuit. The stacked unit forming the electronic component 101 may be entirely encapsulated so that the package implantable electronic device 1 includes the electronic component 101 including the stack of electronic units.

[0028] In addition to the electronic unit, the electronic component 101 may include a (non-capsule) layer 102. The layer 102 may be located on the lower surface of the electronic component 101 (see FIGS. 1C and D), or may be located on the upper surface. The layer 102 may include or be composed of any suitable substrate material. For example, the material may include a semiconductor material such as a silicon material, an insulating material, a glass material, a polymer material, and, if applicable, a conductive material such as a metal. The layer 102 may preferably include or be composed of ceramic or glass, and the ceramic or glass is optionally selected from silicon oxide and silicon dioxide, and is optionally obtained by oxidizing a silicon substrate. The layer 102 advantageously acts as a barrier to protect the electronic component 101 during the process of the packaging method, particularly during the step of removing the substrate 110. For example, the layer 102 may be composed of a material that is difficult to decompose / deteriorate during the step of removing the substrate 110. The electronic component 101, the layer 102, and the substrate 110 may preferably be selected to form a silicon on insulator or SOI wafer structure, and the wafer structure is readily available and widely used. For this reason, the layer 102 may be configured as a layer of silicon oxide disposed on the silicon substrate 110. In particular, in a photodiode or other photosensitive electronic component 101, the silicon dioxide layer 102 may preferably be thermally grown on the electronic component to form an interface between the electronic unit having the desired electronic and / or optical properties and the layer 102 of the component 101.

[0029] It is preferable that the double-layer structures 105 and 105' composed of the capsule upper layer 103 and the capsule lower layer 104 cover at least a part, more preferably all, of the side walls 106 and 106' of the electronic component 101. The double-layer structure that covers or extends at least a part of the side walls 106, 106' advantageously provides improved hermetic encapsulation, and in some embodiments preferably eliminates the need for additional capsule layers surrounding the capsule upper layer 103 and the capsule lower layer 104 respectively. The double layers (105, 105') preferably do not completely cover the electronic component (101) but only cover a part thereof. For example, the double layers (105, 105') cover only the side walls (106, 106') of the electronic component (101), but the upper and lower surfaces of the electronic component (101) are not covered by the double layers (105, 105', 105a, 105b, 105c, 105d). Alternatively, the double layers (105, 105') cover the side walls (106, 106') and the lower surface of the electronic component (101), but do not cover the upper surface, and the photodiode and / or the electrode (109) may be exposed. In other embodiments, only the lower surface of the electronic component (101) is covered by the double layers (105, 105', 105a, 105b, 105c, 105d).

[0030] The capsule upper layer 103 and / or the capsule lower layer 104 preferably can provide hermetic sealing to the electrical component 101. The terms "hermetic sealing", "airtight seal", and "airtight" are defined elsewhere in the specification. The capsule upper layer 103 and / or the capsule lower layer 104 may advantageously have biocompatibility. The terms "biocompatibility" and "bio - compatibility" mean the ability of a medical device to perform its intended function in a graft without inducing unfavorable local or systemic effects on the graft. The capsule upper layer 103 and the capsule lower layer 104 may have corrosion resistance. The term "corrosion resistance" generally means the resistance of a material to reaction with an aqueous environment such as that experienced in an in - vivo state. Redox (reduction - oxidation) active compounds may corrode the materials of the device. Corrosion of an implant in vivo means that the implant is generally oxidized or chemically attacked in its environment. "Corrosion resistance" is durability against degradation and chemical modification / deterioration such as redox reactions.

[0031] An airtight package composed of one capsule upper layer 103 and one capsule lower layer 104 that overlap so as to preferably at least partially cover the side walls 106, 106' of the electronic component, i.e., an airtight package that does not include additional capsule layers (see, for example, the embodiment of FIG. 1A having an additional upper surface coating, or the embodiments of FIGS. 1B - D, and the embodiment of FIG. 3). To ensure both the in vivo adaptability and proper functioning of the electronic device 1, the capsule upper layer 103 and the capsule lower layer 104 preferably have both biocompatibility and corrosion resistance. Those skilled in the art can easily select suitable materials for the capsule upper layer 103 and the capsule lower layer 104 that preferably exhibit biocompatibility and / or corrosion resistance. Examples of suitable materials for the capsule upper layer 103 and the capsule lower layer 104 include metals, ceramics (including oxides, nitrides, and carbides), diamond-like carbon, diamond, glass, polymers (especially low-permeability and / or dense polymers), and combinations thereof. Specifically, suitable metals may be selected from titanium (Ti), platinum (Pt), stainless steel, titanium-nickel, palladium, niobium, tantalum, and combinations or alloys thereof; suitable ceramics may be selected from silicon oxide, silicon nitride, silicon carbide, oxycarbide, titanium carbide, titanium nitride, titanium oxide, aluminum oxide, aluminum nitride, zirconium oxide, and combinations thereof; suitable polymers may be selected from fluorocarbons, polyurethanes, polyetheretherketone (PEEK), silicones, PDMS, parylene, polyimides, polycarbonates, polycarbonate urethanes, silicones, silicone-polyester-urethane, durimide (photosensitive polyimide), cyclic olefin polymer (COP), cyclic olefin copolymer (COC), polymethyl methacrylate (PMMA), polyphenylene, polysulfone, polyphenyl sulfone, combinations thereof, and multiple layers thereof. The capsule upper layer 103 and the capsule lower layer 104 may include the same or different materials, or may be composed of the same or different materials.The capsule upper layer 103 and the capsule lower layer 104 include or are composed of a single layer or multiple layers (e.g., more than one (low) layer) of the exemplified materials.

[0032] As described above, the hermetic package may include at least one additional capsule upper layer 103a and / or an additional capsule lower layer 104a (see, for example, the embodiments of FIGS. 1E and 1F), and the additional capsule upper layer 103a and / or the additional capsule lower layer 104a preferably form at least one additional bilayer structure 105a, 105c on the side walls, or form at least one additional bilayer structure 105d on the lower side (FIG. 1E), or form at least two additional bilayer structures (105a, 105b, and 105c) on the side walls (FIG. 1F). Such additional bilayer structures 105b, 105c may be the capsule outer layers 104 and 104a on the lower surface and / or side walls of the device. In particular, such an additional capsule lower layer 104a may cover at least a part, more preferably completely, of the side walls 106, 106' of the electronic component 101. Thereby, as shown in the embodiments of FIGS. 1E and 1F, a side wall arrangement of a triple capsule layer is formed by the capsule upper layer 103 and the capsule lower layer 104 that form the internal bilayer structure 105. The capsule lower layer 104 further forms a second bilayer structure 105c together with the additional capsule lower layer 104a, thus forming a triple layer structure on the side walls. Preferably, the at least one additional bilayer (105a, 105b, 105c) covers only the side walls (106, 106') and does not cover the upper and lower surfaces of the electronic component (101). A similar arrangement is provided such that the capsule lower layer 104 is the innermost capsule layer in the side wall region, with the additional capsule lower layer 104a, which is the outermost layer, sandwiched between the capsule upper layer 103 and the capsule lower layer 104 that becomes the innermost capsule layer in the side wall region. Also, the additional capsule lower layer 104a may form a capsule lower layer 104 and another bilayer structure 105d on the lower surface of the device. FIG. 1F illustrates the embodiment of FIG. 1E and includes a partial additional capsule upper layer 103a on the capsule layer 103, thus forming a bilayer structure also around the upper surface periphery of the packaged electronic device 1 according to the present invention. Three bilayer structures 105a, 105b, and 105c (four side wall layers) are arranged on the side walls of the device 101.Using more than one or two stacked capsule layers is advantageous as it improves hermetic encapsulation and can provide a more reliable barrier against external influences. Embodiments using such a multilayer structure are less likely to significantly enlarge the implantable device and, in implant surgery, carry a low risk of local tissue irritation without delaying wound healing.

[0033] For this reason, the hermetic package may be provided with at least one additional capsule upper layer 103a and / or at least one additional capsule lower layer 104a. The additional capsule upper layer 103a is preferably applied over the capsule layer 103. The additional capsule lower layer 104a is preferably applied over the capsule lower layer 104. Thus, the additional capsule upper layer 103a and the capsule lower layer 104a preferably form the outermost layer of the hermetic package and, when implanted, are in direct contact with the environment, i.e., the living tissue. The capsule upper layer 103 and the capsule lower layer 104 may be sandwiched between the outermost layers 103a and 104a of the electronic component 101, as well as the upper and lower surfaces. Thus, the capsule upper layer 103 and the capsule lower layer 104 may be composed of, but are not limited to, biocompatible materials (especially when the capsule upper layer 103 and the capsule lower layer 104 are not in direct contact with the living tissue). However, the capsule upper layer 103 and the capsule lower layer 104 preferably contain or are composed of the exemplified corrosion-resistant materials in order to protect the electronic component 101 from corrosion by the environment. When the additional capsule upper layer 103a and / or the capsule lower layer 104a are present, the additional capsule upper layer 103a and / or the capsule lower layer 104a may be composed of, but are not limited to, corrosion-resistant materials (especially when the layers 103 and 104 suitably protect the electronic component 101 from corrosion). When the layers 103a and 104a are present, the layers 103a and 104a are preferably composed of biocompatible materials.

[0034] The additional capsule upper layer 103a and the capsule lower layer 104a may each be composed of a single layer or multiple layers (for example, more than one (bottom) layer). The additional capsule upper layer 103a and the capsule lower layer 104a may be composed of the same material or different materials.

[0035] For example, a preferred embodiment having "laminated" or a number of capsule layers may include a capsule upper layer 103 and a capsule lower layer 104 made of a corrosion-resistant material such as metal, and the capsule upper layer 103 and the capsule lower layer 104 may be further embedded in an additional capsule upper layer and / or a capsule lower layer made of a biocompatible material such as silicone, parylene, or hydrogel.

[0036] (Additional) capsule upper layers 103, 103a and capsule lower layers 104, 104a may further include at least one conductive (bottom) layer capable of forming an electrical connection between the upper and lower surfaces of the package device or between a part of the package device, especially in the case of any multilayer structure. The circuit configuration is preferably located on the upper surface of the package device. One or more of these (bottom) layers may be patterned, for example, in the shape of an electrical wire, to form one or more electrical connections between the upper and lower surfaces of the package device. For example, the electronic component 101 may have a circuit configuration on the upper and / or lower surface of the electronic component, and the upper and / or lower surface may be interconnected by one of a plurality of layers of electrical wires that are part of at least one capsule layer. Therefore, the capsule layers 103, 103a, 104, 104a may include at least one patterned or unpatterned electrically conductive or insulating (bottom) layer such as platinum, titanium, silicon carbide, silicon oxide, or silicon nitride. In one embodiment, all of the conductive capsule encapsulation (bottom) layers such as metal may be electrically connected to each other and may be connected to the electrical ground of the circuit configuration of the electronic component 101. In another embodiment, the (patterned) passive conductive lines (tracks) or conductive solid (bottom) layers of at least one capsule layer 103, 103a, 104, 104a may form an electrical connection with the circuit configuration.

[0037] As described in FIGS. 1B to 1D, the electronic device 1 according to the present invention may further include at least one top coat 107. The top coat 107 may at least partially overlap the capsule upper layer 103 in order to advantageously ensure the hermeticity of the package. The top coat 107 usually forms the outermost layer of the hermetic package of the device of the present invention, such as the upper surface of the device of the present invention. Therefore, when the top coat 107 is implanted, it is preferably biocompatible because it comes into direct contact with living tissue. The top coat 107 is also preferably corrosion resistant. The top coat 107 may be composed of a suitable material that adds further functions to the hermetic package of the device of the present invention. Particularly in the case of a retinal implant as the implanted electronic device 1, for example, the top coat 107 may be composed of a light-transparent material. Advantageously, a light (e.g., IR or visible light) transmissive top coat is useful for a retinal stimulation device such as a photovoltaic retinal stimulation device. Specifically, the top coat 107 includes or may be composed of a material selected from ceramics including SiC, SiOC, etc., SiO 2 , glass, diamond or diamond-like carbon, aluminum oxide, titanium oxide, and combinations thereof. The top coat 107 may be composed of a single layer or multiple layers ((bottom) layers) of the aforementioned materials. Each (bottom) layer may be composed of the same material, particularly as described above, or preferably may be composed of different materials. The aforementioned materials of the top coat 107 may be amorphous, crystalline, or provided as both amorphous and crystalline.

[0038] As described above, the implantable electronic device 1 may preferably be an electrical stimulation device such as a retinal implant or a retinal stimulation device. Therefore, the hermetic package may, for example, include the electronic trace 108 and / or cover, surround, or embed the electrode 109 which is a part of the electronic component 101 and is electrically connected thereto by the top coat 107 and / or the upper capsule layer 103 of the hermetic package. Preferably, the electrode 109 is disposed to extend within or on the hermetic package, and in particular, may be disposed within or protruding from the top coat 107. Such an embodiment is shown in FIG. 1D. The top coat 107 may include holes or feed-throughs for passing or exchanging electrical, optical, or chemical signals (for example, for data communication) to or from the component 101. The feed-through may, for example, include the electrode 109 for communicating electrical or ion signals. An example of another disposable feed-through may be a liquid feed-through. The feed-through may be connected to a conducting wire for receiving or transmitting an electrical signal (for example, for detecting a signal or electrically stimulating a target cell or tissue). The feed-through may be connected to a further electrode or a flexible circuit connected to or communicating with a device remote from the component 101.

[0039] Preferably, the electronic component 101 is an integrated circuit or a die having the electrode 109 as a feed-through. The electrode 109 is preferably in electrical communication with an electronic trace 108 disposed within or on the integrated circuit, and may, for example, convert an electrical signal generated through the integrated circuit. However, those skilled in the art should readily understand that the definition of the electronic trace 108 and / or the electrode 109 is not defined by the electrical stimulation device or the retinal stimulation device. The electronic trace may be disposed, for example, within a sensor, a control device, or a device used for other applications. In the implanted device 1, the selected electronic trace 108 and / or the electrode 109 are preferably in direct contact with the biological tissue when implanted. For this reason, the electrode 109 may preferably be made of a biocompatible material. Preferably, the electronic trace 108 and / or the electrode 109 may be made of a corrosion-resistant material to reduce or avoid corrosion or damage to the electronic component 101. The electronic trace 108 and / or the electrode 109 preferably include or may be composed of a material selected from platinum, black / porous platinum, iridium, iridium / platinum, iridium oxide, poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS), PEDOT:PSS, (porous) titanium nitride, doped diamond or doped diamond-like carbon, and graphene.

[0040] In a preferred embodiment, the device 1 of the present invention may be as shown in FIG. 1C or D, and includes at least one electronic component 101, which preferably includes an integrated circuit or a die, and optionally further includes an electronic unit such as a passive or active circuit. The electronic component 101 is completely encapsulated or embedded in a hermetic package including a capsule upper layer 103 and a capsule lower layer 104, and the capsule upper layer 103 and the capsule lower layer 104 are each made of metal, preferably titanium. The electronic components 101, 101' may usually include a layer 102 located on the lower surface of the electronic component, and the layer is made of ceramic or glass, metal, or a combination thereof, preferably silicon dioxide. In a specific embodiment, it is expected that the layer 102 has a bilayer structure composed of, for example, one layer of ceramic or glass and one layer of metal, or two metal layers. The electrode 109 as part of the components 101, 101' is preferably composed of platinum (Pt) such as porous silver black, (porous) TiN, iridium oxide, or poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS), and forms an electrical connection between the electronic component 101 and the surrounding body fluid, tissue or cell. The electrode 109, which protrudes upward so as to be embedded in the top layer 107 or protrudes beyond the top layer 107, may be configured to form an electrical connection between the components 101, 101' and the surrounding environment such as living tissue when embedded. In a preferred embodiment, the electronic trace 108 may be provided as part of the electronic components 101, 101', such as on the upper surface or upper side of the components 101, 101'.

[0041] The hermetic package of the device 1 preferably includes a top layer 107, and the top layer is preferably transparent. The top layer 107 may preferably be composed of a ceramic layer, more preferably composed of a ceramic multilayer, and even more preferably composed of a ceramic multilayer containing or composed of silicon carbide such as amorphous silicon carbide. The top layer 107 may also include electronic traces, and the electronic traces are preferably selected from titanium (Ti), gold (Au), platinum (Pt), copper (Cu), palladium (Pd), aluminum (Al), or multilayers thereof.

[0042] Figure 3 shows another aspect of the package-embedded device 1 of the present invention. The device in Figure 3 includes an additional coating layer 107. The capsule upper layer 103 overlaps with the coating layer 107 in the tip region. Such a device 1 may be obtained, for example, by implementing the method of the present invention in combination with the process of Figure 4A (process 300).

[0043] The device 1 is preferably a retinal implant packaged by a hermetic package for implantation in the eye, preferably configured for implantation on or under the retina. Alternatively, the device 1 may be configured for implantation in the cerebral cortex, particularly for connection to cerebral cortical cells related to visual data processing.

[0044] In a second embodiment, the present invention provides a system, which includes, for example, at least one of the package-embedded devices 1 preferably configured to be embedded in the eye. The device 1 may be obtained by the method of manufacturing the device 1 described in the claims. The system may also include other embedded or external (non-embedded) devices or components. The system of the present invention may also include more than one, for example, a plurality of embedded devices 1. As described above, the electronic component 101 to be packaged may include an integrated circuit or die, CMOS logics (operation, programmable device, etc.), MEMS (e.g., membrane for pressure detection, drug reservoir, microfluid for drug delivery, etc.), battery, antenna (e.g., antenna for charging a secondary battery, antenna for programming a reprogrammable device).

[0045] The system may be provided together with external devices such as video glasses and an external pocket processor that communicate with device 101. Usually, the device 101 may communicate with the external device by wireless communication via infrared communication, patterned light, RF communication, or other suitable means. Alternatively, the device 101 may communicate with the external device by wired communication such as an intradermal wire. In a preferred embodiment, the implantable component of the system according to the present invention is shown as the device 1 and may include, for example, the hermetic package component 101 shown in FIG. 1D as a retinal implant. The package component 101 may preferably be implanted in the eye, more preferably being suitable as an on-retina or sub-retinal implant and being configured as such. The package electronic components 101, 101' may be stacked and / or may be separated from each other on a suitable support, or both. Functionally different package electronic components 101, 101' may be electrically connected via an electronic trace such as metal on a common support. The support may be flexible or stretchable. The package electronic components 101, 101' may be attached to the support by suitable attachment means. The system may be provided with comprehensive (global) feedthroughs such as electrical feedthroughs and fluid feedthroughs.

[0046] In the third embodiment, the present invention provides a method for fabricating or manufacturing an embedded package device 1, the method including: (a) providing at least one electronic component 101 located on a substrate 110; (b) applying at least one upper capsule layer 103, 103a to the electronic component 101; and (c) applying at least one lower capsule layer 104, 104a to the electronic component 101, wherein the upper capsule layers 103, 103a and the lower capsule layers 104, 104a at least partially overlap to form a double-layer structure 105, 105', 105a, 105b, 105c, 105d on a side wall portion of the device 1, and the double-layer structure 105, 105', 105a, 105b, 105c, 105d is formed on a lower surface and / or an upper surface of the device 1. The double layer (105, 105', 105a, 105b, 105c, 105d) preferably only partially covers the electronic component (101), for example, the double layer (105, 105') covers side walls (106, 106') of the electronic component (101), but upper and lower surfaces of the electronic component (101) are not covered by the double layer (105, 105', 105a, 105b, 105c, 105d). Alternatively, the double layer (105, 105') covers side walls (106, 106') and a lower surface of the electronic component (101), but the upper surface is not covered and a photodiode and / or an electrode (109) may be exposed. In another aspect, only the lower surface of the electronic component (101) is covered by the double layer (105, 105', 105a, 105b, 105c, 105d).

[0047] In a fourth embodiment which may be an aspect of the third embodiment, the present invention provides a method (such as shown in FIG. 2 for example) for fabricating or manufacturing an embedded package device, the method preferably including the following steps 309, 310, 311, 312, 313, 314, and 315, and optional steps 316 and 317, in this order.

[0048] In step 309, the assembled component 100 is provided as a raw structure having a continuous layer 102 and a continuous electronic component raw structure 101 disposed on the continuous layer. The assembled component 100 is supported on its lower side by a substrate 110.

[0049] In step 310, at least one, preferably a plurality of, assembled components 100 of electronic components 101 and 101' are provided, and the electronic components 101 and 101' are arranged on a substrate 110 being isolated from each other by grooves or intervals. The adjacent electronic components 101, 101' and the substrate 110 form a groove 111. The groove 111 is surrounded on the outside by the side walls 106, 106' of the electronic components 101, 101'. In this example, the assembled component may be an assembled component that is dice 101, 101' on a wafer 110. Advantageously, the substrate 110 may support more components 101, 101', for example, at least 10, at least 20, at least 50, at least 100, or at least 500 components 101, 101'. The provision of the assembled component 100 by step 310 includes introducing a groove 111 into at least one continuous electronic component original structure 101 (as shown in step 309 of FIG. 2) as the basic structure of the electronic component to which the method of the present invention is applied. The assembled component is composed of a suitable material (as described in the context of component 101 and layer 102), and has several potential electronic and / or optical functions such as, for example, an electric circuit configuration, a photodiode, other sensor / stimulator device functions, etc., and the electronic and / or optical functions are arranged on / in the substrate 110 and are formed by several patterned (bottom) layers. By step 310, each of the electronic components 101, 101' is isolated by inserting the groove 111, and thus individualized. The groove 111 for isolating the electronic components 101, 101' is introduced by dry or wet etching. By the step of isolating each of the electronic components, based on one electronic component original structure, a plurality of electronic components can be manufactured on the same substrate (usually a flat plate) 110. Thereby, the packaging method of the present invention can be simultaneously performed on a plurality of (by the original structure) identical or different electronic components 101, 101', and thus a time- and cost-efficient manufacturing method becomes possible.

[0050] In step 311, at least one capsule upper layer 103 is applied to the upper surface of the assembled component 100, thus horizontally coating the upper surfaces of the electronic components 101, 101' and vertically extending down the walls of the groove 111. Suitable materials for the capsule upper layer 103 are as described above. The capsule upper layers 103, 103a may preferably be composed of a shape conforming material, whereby the capsule upper layers 103, 103a follow the contours of the electronic components 101, 101' and the groove 111, and thus it is understood that they cover the components 101, 101' and the walls of the groove 111. By the preferred selection of a shape conforming material for the capsule upper layer 103 and a deposition method such as a non-directional or partially directional physical vapor deposition technique, sputtering, chemical vapor deposition, etc., a highly reliable and reproducible stepped (non-planar) coating (including horizontal surface and vertical sidewall coating) is usually achieved. As described above, step 311 may also include adding a single layer or multiple layers of the same or different materials. Step 311 may also usually include applying at least one further capsule upper layer 103a (not shown in Figure 2 for step 311) to the assembled component 100 after applying the capsule upper layer 103. At least one of the (further) capsule upper layers 103, 103a is selected from a corrosion resistant material that sufficiently hermetically seals the component 101 against the environment. To reduce or avoid irritation or damage to surrounding living cells, tissues, or body fluids, when the outermost capsule upper layer 103 of the package, or a further capsule upper layer is provided, the outermost capsule layer 103a is preferably composed of a biocompatible material.

[0051] In step 312, the release layer 112 is typically applied to the upper surface of the assembled component 100 so as to cover the pre-coated components 101 and 101' and the recessed groove 111 that has been etched. The release layer 112 may preferably comprise or be composed of a polymer material, and the polymer material is preferably selected from resins, more preferably photosensitive resins (photoresists), and soluble polymer materials. The photosensitive resin or photoresist (also known as a photopolymer or photoactive resin) is typically an oligomer or polymer whose properties change when exposed to light in the ultraviolet or visible light region of the electromagnetic spectrum. Specifically, upon light irradiation, the photosensitive resin is polymerized into an insoluble cross-linked network polymer ("negative photoresist") or the solid polymer is decomposed so as to become semi-liquid, or soluble or dissolvable ("positive photoresist"). In the present invention, a generally known positive-type photosensitive resin is used. The release layer 112 is applied for the temporary protection of the components 101 and 101', and more specifically, for the temporary protection of the capsule upper layers 103 and 103a for subsequent processes. Therefore, the release layer 112 is preferably composed of a material that can be removed without affecting the electronic components 101 and 101' or the capsule upper layers 103 and 103a. The removal of the release layer 112 may preferably be performed by applying a photoresist developer or a photoresist stripping agent as commonly used in the semiconductor field.

[0052] In step 313, the release layer 112 is removed from the assembled component, and the capsule upper layers 103 on the surfaces of the components 101 and 101' are exposed. The removal process may be performed by suitable physical or chemical means such as grinding, dry or wet etching, and / or stripping in a wet solution or plasma. Preferably, the removal may leave a residue of the release layer 112 in the recessed groove, and the residue typically covers the lower surface of the groove. This residue of the release layer 112 is for forming a protective barrier or "plug" that protects the capsule upper layer that etches the groove 111 from degradation in subsequent processing steps.

[0053] In a preferred embodiment where the release layer 112 is composed of a positive photoresist, in particular, step 313 may include (1) a sub-step of exposing the assembled component 100 with light applied only to the upper surface (not applied to the bottom of the groove 111), and (2) a sub-step of applying a photoresist developer to the assembled component 100. In this way, surely, only the photoresist release layer 112 on the upper surface or in the vicinity of the assembled component 100 is removed, and the remaining unexposed photoresist remains at the bottom of the groove 111. Alternatively, the release layer 112 may be composed of a negative photoresist. Under such circumstances, step 313 may include (1) a sub-step of exposing the assembled component 100 with light applied only to the bottom of the groove 111 (not applied to the upper surface), and (2) a sub-step of applying a photoresist developer to the assembled component 100. In this way, surely, only the unexposed photoresist release layer 112 on the upper surface of the assembled component 100 is removed, and the remaining photoresist remains at the bottom of the groove 111.

[0054] In step 314 (as shown in FIG. 2, step 314a), the assembled component 100 is inverted upside down (not shown) and processed. By inverting the device, the lower surface of the device can be accessed from above, facilitating the processing of the lower surface. For this reason, the assembled component 100 may be temporarily attached to a temporary carrier 113. The temporary attachment may be achieved by any suitable adhesion or attachment means, and the adhesion or attachment means is preferably reversible, for example, by a suitable adhesive. Preferably, the adhesive is characterized by an adjustable adhesive connection, and the adhesive connection can be changed, for example, by reducing it by heat, UV light, laser light, or other light irradiation so as to detach the assembled component 100 from the temporary carrier 113. The temporary carrier 113 may be composed of a suitable solid material such as silicon or glass.

[0055] This process can advantageously provide a laminated or bilayer capsule layer structure 105, 105', which ensures the hermetic sealing of the electronic components 101, 101' by its package.

[0056] Step 314 includes a plurality of sub-steps of removing layers from the lower side of the assembled component 100. The sub-steps are performed such that the drawn groove 111 is finally drawn by the capsule lower layers 104, 104' (see subsequent step 315) and left released to form a bilayer structure 105, 105' that covers at least part or more preferably completely the side walls 106, 106' of the electronic components.

[0057] In step 314a, the substrate 110 is removed, the lower surfaces of the electronic components 101, 101' are exposed, and optionally covered by the capsule upper layer that draws down the layer 102 and the groove 111. Step 314a may also be what is called "thinning" of the substrate. The substrate 110 may be removed by suitable physical or chemical means such as grinding, etching, etc. Preferably, any layer 102 may function as a barrier to protect the lower surfaces of the components 101, 101' from thinning or other damage caused by the removal process, and thus the removal of the substrate 110 can be precisely controlled without affecting the electronic components 101, 101'. The "thinning" is preferably performed until the substrate 110 is removed (step 314b), more preferably until the residue of the release layer 112 remaining in the groove 111 is exposed by removing the layers 103, 103' (sub-step 314c). Thus, the electronic components 101, 101' are connected only by the capsule upper layers 103, 103' that draw down the groove 111 via the release layer 112.

[0058] In sub-process 314c, the upper capsule layers 103, 103' are removed, thus exposing the remaining release layer 112 that forms the protective barrier within the recessed groove that has been etched down. By means of the said protective barrier, during subsequent processing, for example, when removing the substrate 110, the upper capsule layers 103, 103' can be retained in a complete state. Advantageously, by this method, a double-layer structure 105, 105' can be produced by first forming the upper capsule layers 103, 103' and subsequently coating the lower capsule layers 104, 104' which preferably extend up to the sidewalls of the electronic components 101, 101' and completely cover them. Thereby, highly efficient and improved hermetic encapsulation is achieved.

[0059] In sub-process 314d, the remaining release layer 112 is removed, thus exposing the recessed groove 111 that has been etched down for coating the lower capsule layer 104. Preferably, the release layer 112 may be removed by exposing the layer 112 to a state or chemical agent in which the release layer 112 can be dissolved or removed. Generally, the said removal may be carried out by suitable physical or chemical means such as etching, stripping, or other treatments with a suitable chemical agent or solvent capable of removing the release layer 112. In the case of a photoresist release layer 112, the removal may preferably be carried out by light irradiation and application of a photoresist developer, application of the photoresist developer alone, photoresist stripping in a wet solution, or plasma irradiation.

[0060] The selection of suitable techniques for removing each layer during processing is known. The selection of appropriate techniques usually depends on the material of the layer to be removed. It is understood that the appropriate removal technique is usually selected based on the nature of the material to be removed. That is, each layer is removed by a technique that preferentially removes only the layer targeted for removal and not the layers or materials that are not part of the assembled component 100.

[0061] In step 315, at least one lower capsule layer 104, 104a is applied to the assembly part 100 in an upside-down arrangement, preferably for processing from above, and the lower surfaces of the electronic components 101, 101' and the grooves 111 drawn by the upper capsule layers 103, 103a are coated. Suitable materials for the lower capsule layers 104, 104a are as described above. The lower capsule layers 104, 104a are preferably composed of a shape-following material that can follow the contours of the electronic components 101, 101' and the grooves 111, or may be attached by at least a partially directional technique, so that it is understood that the components 101, 101' and the inner walls of the grooves 111 previously drawn by the upper capsule layers 103, 103a are covered. By a preferred selection of the shape-following material and deposition method technology of the lower capsule layers 104, 104a, a very suitable step-like coating is usually obtained. As described above, in step 315, a single layer or multiple layers of the same or different materials may be applied. In addition to the application of the lower capsule layer 104, step 315 may usually further include a sub-step of applying at least one additional lower capsule layer 104a (not shown in step 315) to the assembly part 100 after the application of the lower capsule layer 104. At least one lower capsule layer 104, 104a is preferably selected from corrosion-resistant materials that sufficiently hermetically seal the components 101, 101' against the environment. To reduce or avoid the stimulation or influence on surrounding living cells, tissues, or body fluids, the outermost lower capsule layers 104, 104a that form the interface with the environment are preferably composed of biocompatible materials. As described above, step 315 may include adding a single layer or multiple layers of the same or different materials.

[0062] The method of the present invention preferably coats the capsule upper layers 103, 103a and the capsule lower layers 104, 104a such that the double-layer structures 105, 105', 105a are formed at least partially overlapping. The double-layer structures 105, 105a preferably cover at least partially, more preferably completely, the side walls 106, 106' of the electronic component. This is done, in particular, by using the release layer 112 as a protective barrier for the capsule upper layers 103, 103a that undercuts the groove 111 (see step 314), and preferably by reversing ( "inverting") the orientation of the assembled component 100 (to enable the upside-down processing of the assembled component 100) before coating the capsule lower layers 104, 104a.

[0063] One or more of the capsule upper layers 103, 103a and / or the capsule lower layers 104, 104a (or at least a part thereof) may be patterned, for example, by using lithography and etching, or lift-off during the process, in order to introduce continuous tracks (for example, at least at the side wall locations) that enable electrical bonding between the upper and lower surfaces of the electronic components 101, 101'.

[0064] In any step 316, the assembled component 100 is fixed or adhered to the support layer 114. Preferably, subsequently, the assembled component 100 obtained in step 315 is removed from the temporary carrier 113. The fixing or adhering may be achieved by suitable adhering means, such as by a suitable adhesive. The adhesive is preferably characterized by an adjustable adhesive connection, and the adhesive connection can be changed, for example, by irradiating with heat and / or UV light and / or laser light to reduce it. The support layer 114 is preferably composed of a flexible material such as a thin film, thereby enabling the transportation or storage of the electronic components 101, 101'. Exemplary materials include flexible polymers such as the so-called semiconductor "dicing tape". Advantageously, by using the flexible film, the electronic components 101, 101' such as dice can be removed by a "die picking" process. By the "die picking" process, the dice are pushed out from the back surface by one or more pins, and the dice are lifted using a vacuum "pick-up jig" and removed from the entire surface. This step is usually performed by an automatic "die picking" machine.

[0065] The peeling from the support layer 114 is shown in step 317. The obtained device 1 is encapsulated by the capsule upper layer 103 and the capsule lower layer 104 obtained in step 315. Alternatively, in step 316, it is peeled from the support layer 114. The assembled component 100 obtained by step 317 is firmly encapsulated and represents an aspect of the present invention having the desired airtightness for in vivo implantation. It is characterized by a double-layer structure 105, 105' formed by the capsule layers 103 and 104 covering the entire side wall, obtained by the method of the present invention shown in the aspect of FIG. 2.

[0066] The method of the present invention may further include any step 317 of applying a top coat 107. The top coat 107 may be applied before applying the capsule upper layers 103, 103a in step 311. Alternatively, the top coat 107 may be applied after applying the capsule upper layers 103, 103a in step 311. For example, it may be applied before step 312 or after step 316. Assuming that the coating step 400 is performed before step 311, the coating step 400 is performed before the groove 111 is introduced into the assembly part 100 (i.e., the assembly part 100 in step 309 of step 310 in FIG. 2) or after the groove is introduced (applied to the assembly part 100 in step 310 before step 311). Depending on when the top coat 107 is applied to the assembly part 100 in the process of the method of the present invention, the capsule upper layers 103, 103a may cover at least a part of the coat layer 107, or the coat layer 107 may at least partially overlap with the capsule layers 103, 103a. When the top coat 107 is applied by the step 400 after the step 316, the top coat 107 preferably forms a further layer on the layers 103, 103a and forms the uppermost layer of the device 1 that is in direct contact with the environment.

[0067] In one aspect, the top coat 107 is preferably applied to the electronic components 101, 101' (or the upper surface of the assembled component 100) before coating the capsule layers 103, 103a. The application is performed by a preferred means, preferably by a deposition method. Examples of the deposition method include chemical vapor deposition (CVD) such as plasma CVD (PECVD), physical vapor deposition (PVD), atomic layer deposition (ALD), and a lower layer oxidation method. Subsequently, the top coat 107 is preferably partially removed, and then at least one capsule upper layer 103, 103a is applied so that the top coat 107 and the capsule layers 103, 103a preferably overlap at least partially. It is preferable that at least one capsule upper layer 103, 103a overlaps with the coat layer 107 at least at the end of the coat layer 107. Partial removal of the top coat 107 is preferably considered to expose the end of the assembled component. The removal is performed by a suitable means such as a chemical or physical process, preferably by wet or dry etching and / or lift-off. The partial overlap of the top coat 107 and the capsule upper layers 103, 103a in the obtained package hermetically seals the electronic components 101, 101' without interfering with the intended function of the top coat 107.

[0068] Alternatively, the top coat 107 may be applied after the capsule upper layers 103, 103a are applied in step 311. For this reason, at least one of the capsule upper layers 103, 103a is applied from the upper surface of the electronic components 101, 101'. Subsequently, for example, the capsule upper layers 103, 103a are preferably partially removed from the electronic components 101, 101' so that the top coat 107 is applied to the locations where the capsule upper layers 103, 103a are removed. For example, the peripheral portion including the ends of the electronic components 101, 101' remains covered with at least one of the capsule upper layers 103, 103a, and the capsule upper layers 103, 103a may be removed from the central portion of the upper surface of the electronic components 101, 101'. Any suitable means such as a chemical or physical process may be applied, preferably wet or dry etching and / or lift-off is applied. The top coat 107 is applied to the electronic components 101, 101' such that the top coat 107 and the capsule layers 103, 103a preferably overlap at least partially. As described above, the top coat 107 is preferably applied by a deposition method, and examples of the deposition method include chemical vapor deposition (CVD) such as plasma CVD (PECVD), physical vapor deposition (PVD), atomic layer deposition (ALD), and lower layer oxidation method.

[0069] The resulting embodiment showing the top coat 107 is due to the particular underlying method applied and the stage of performing step 400 in the process of the method of the present invention. Another embodiment of such top coat 107 application is shown in FIGS. 4A - C.

[0070] All of the aspects shown in FIGS. 4A - 4C represent alternative preferred aspects of step 400 at different stages of the present invention. By step 400 of FIG. 4A, the components 101, 101' (see step 310 of the method according to FIG. 2) separated by the groove are coated (coat layer 107) along their upper surfaces and the vertical inner wall surfaces of the groove (or the side walls 106, 106' of the electronic components 101, 101' forming the groove 111). The coat layer 107 is patterned by etching or lift - off. When the etching process is used, the material 107 is first deposited, then a photoresist is applied and patterned, and the material 107 in the areas not covered by the photoresist is removed by etching. Finally, the photoresist is removed.

[0071] When lift - off is used, the patterning of the photoresist is performed before the deposition of the material 107, and after the deposition of the material 107, the resist and the material 107 on the photoresist are removed such that the layer 107 deposited in the areas where the photoresist was removed before the deposition of the material 107 remains.

[0072] However, the embodiment according to step 400 of FIG. 4B differs from FIG. 4A in that the coating of the coating layer 107 is applied before the introduction of the grooves 111 (which isolate the electronic components 101, 101' respectively). The patterning or lift-off process is performed such that only the grooves 111 are introduced after the patterning or lift-off step 400 according to FIG. 4B. Both embodiments of FIGS. 4A and 4B are then subjected to step 311 (of FIG. 2), and the capsule upper layer 103 is applied to the exposed upper surface, and thus the grooves 111 are also drawn down. The process 400 of FIG. 4C differs from the process 400 of the embodiments of FIGS. 4A and 4B in that the order of the steps is different. Since the embodiments of step 310 of FIG. 4C and step 311 (of FIG. 2) are performed first, the electronic components 101, 101' are coated by the coating layer 107 only after the step 311 (application of the capsule upper layer 103) is performed. Therefore, the embodiment of the process 400 of FIG. 4C is such that, in contrast to the embodiments of FIGS. 4A and 4B, the coating layer 107 partially overlaps the capsule upper layer 103.

[0073] Included in the etching or lift-off is common to all of these embodiments of step 400.

[0074] In the etching process of Project 400, the top coat 107 is applied to the surfaces of the components 101, 101'. Subsequently, a photoresist layer is applied using a suitable method such as spin coating, and the photoresist layer is optionally dried (baked) by applying heat. Thereafter, a mask defining the desired pattern of the top coat 107 to be obtained is applied, and the "masked" photoresist is exposed. Subsequently, a suitable developer is applied, whereby the photoresist is removed. In the case of a positive photoresist, the exposed areas are removed. In the case of a negative photoresist, the resist in the unexposed areas is removed. After the "development process", the resist is optionally cured by applying heat. Wet or dry etching may then follow to partially remove the portions of the top coat 107 not covered by the photoresist while leaving the top coat 107 covered by the photoresist. Finally, the remaining resist is removed by stripping in a suitable stripping solution or by plasma to obtain the top coat 107 patterned as defined by the mask.

[0075] In other lift-off processes of project 400, the photoresist is coated, for example, by spin coating, onto the upper surfaces of the said components 101, 101', or onto other layers supporting the top coat 107. Optionally, heat is applied to dry (bake) it. Subsequently, a mask defining the desired pattern of the top coat 107 to be obtained is applied to the said photoresist, and the "masked" photoresist is exposed. Thereafter, a suitable developer is applied, whereby the said photoresist is removed. In the case of a positive photoresist, the exposed areas are removed. In the case of a negative photoresist, the resist in the unexposed areas is removed. After the said "development process", the resist is optionally cured by applying heat. The capsule upper layer 103 (or other layer covering the top coat 107 partially) is deposited onto the said photoresist. Finally, a suitable stripping solution is applied, and optionally, ultrasonic waves are applied simultaneously, to lift off together with the patterned photoresist and the layer covering it, leaving only the cover layer in the area where the underlying photoresist has been removed beforehand.

[0076] Each of the obtained assembled components 100 shown in FIGS. 4A to 4C may be further processed according to the method of the present invention, for example, by continuing the said manufacturing method by step 312 (see FIG. 2).

[0077] Furthermore, the method of the present invention may have an optional step 500 of providing, for example, electronic traces 108, photodiodes, and / or electrodes 109 on the upper or lower side of the electronic components 101, 101'. The optional step 500 is usually performed, for example, in step 309 or 310 when the upper surface of the electronic component 101 is exposed and further modification is possible. Alternatively, the optional step 500 may be performed after the outer layer is coated, for example, in step 316 or thereafter. This other approach is made possible by removing the pre-applied layer or coating, at least region by region. Thus, step 500 modifies the electronic component 101. Thereby, the electronic trace 108 and / or the electrode 109 may be on the surface of the electronic components 101, 101' and are usually coated by a suitable deposition method under the top coat 107 and the capsule upper layer 103, 103a as described in more detail below. The deposition methods include chemical vapor deposition (CVD), physical vapor deposition methods such as electron beam evaporation and (reactive) sputtering, electrochemical deposition, electroplating, and patterning such as lift-off and etching.

[0078] Modification of the electronic component 101 by a structure protruding vertically or upward (see, for example, the electrode, FIG. 1D, etc.) may affect the properties of the capsule upper layer 103, 103a and / or the coat layer 107. The structure may, for example, show holes that block one or more of the above layers. Preferably, the electrode 109 may be provided, for example, within the top coat 107 or extend beyond the top coat 107, and / or, additionally or alternatively, may be provided within the capsule upper layer 103 / 103a or extend beyond the capsule upper layer 103 / 103a.

[0079] After the top coat 107 and / or the capsule upper layer 103, 103a are partially removed so that the surfaces of the components 101, 101' are normally completely exposed at the electrode deposition locations, the airtight package is provided, and then the electrode 109 may also be introduced. The electrode 109 on the surfaces of the components 101, 101' may be added, for example, by depositing a metal or other electrode material layer. First, the top coat 107 and / or the capsule upper layer 103 / 103a may be partially removed to form holes or feed-throughs for forming the electrode 109. The removal may be performed by a suitable technique such as etching. Subsequently, an electrode material is applied to the top coat 107 and / or the capsule upper layer 103 / 103a. For example, the excess electrode material is then removed by etching, lift-off, etc. such that the electrode material preferably remains only at the locations of the holes or feed-throughs of the top coat 107 and / or the capsule upper layer 103 / 103a and optionally partially overlaps with the top coat 107 and / or the capsule upper layer 103 / 103a. Such an aspect may be considered when the diameter of the electrode 109 is larger than the dimension of the hole or feed-through.

[0080] Alternatively, the electrode 109 may be formed by the electron trace 108 under the top coat 107 and / or the capsule upper layer 103 / 103a. For this purpose, the top coat 107 and / or the capsule upper layer 103 / 103a are partially removed, for example, by etching or lift-off, to form holes or feed-throughs that expose the locations of the underlying electron trace 108.

[0081] The above description details specific aspects of the present invention. However, it will be understood that the present invention may be implemented in various ways, however detailed the above description may be. Specific technical terms used when describing specific features or embodiments of the present invention should not be construed as being redefined to limit the specific nature of the features or embodiments of the present invention to which the technical terms are related.

[0082] The novel features of the present invention applicable to various aspects are shown, described, and pointed out in the above detailed description. However, it is understood that various omissions, substitutions, and changes in the shape and details of the shown device or process can be made by those skilled in the art without departing from the intent of the present invention. The scope of the present invention is defined not by the above description but by the appended claims. All changes within the meaning and scope equivalent to the claims of this application should be considered to be within the scope of the present invention.

[0083] Item 1. An embedded device comprising an electronic component (101) encapsulated by an airtight package (10), wherein the package includes a capsule upper layer (103) and a capsule lower layer (104), and at least a part of the capsule upper layer and the capsule lower layer (103 and 104) overlap to form a double layer (105, 105’). 2. The embedded device according to item 1, wherein the double layer (105, 105’) covers at least a part, more preferably all, of the side walls (106, 106’) of the electronic component (101). 3. The embedded device according to any one of items 1 to 2, wherein the double layer (105, 105’) covers only a part, not the whole, of the electronic component (101). 4. The embedded device according to any one of items 1 to 3, wherein the double layer (105, 105’) covers only the side walls (106, 106’) of the electronic component (101) and does not cover the upper and lower surfaces of the electronic component (101). 5. The embedded device according to any one of items 1 to 4, wherein the capsule upper layer (103) and / or the capsule lower layer (104) is biocompatible. 6. The embedded device according to any one of items 1 to 5, wherein the capsule upper layer (103) and / or the capsule lower layer (104) is corrosion-resistant. 7. The implantable device according to any one of items 5 to 6, wherein the capsule upper layer (103) and / or the capsule lower layer (104) comprises or consists of a metal, a ceramic containing an oxide, a nitride, and a carbide, preferably a metal oxide, a metal nitride, and a metal carbide, diamond-like carbon, diamond, glass, a polymer, a combination thereof, or a plurality of layers thereof. 8. The metal is one selected from Ti, Pt, stainless steel, titanium-nickel, palladium, niobium, tantalum, a combination or alloy thereof, and a plurality of layers thereof. The ceramic is one selected from silicon oxide, silicon nitride, silicon carbide, oxycarbide, titanium carbide, titanium oxide, aluminum oxide, aluminum nitride, zirconium oxide, a combination thereof, and a plurality of layers thereof, and / or The polymer is one selected from fluorocarbon, polyurethane, polyetheretherketone (PEEK), silicone, PDMS, parylene, polyimide, polycarbonate, polycarbonate urethane, silicone, silicone-polyester-urethane, durimide (photosensitive polyimide), cyclic olefin polymer (COP), cyclic olefin copolymer (COC), polymethyl methacrylate (PMMA), polyphenylene, polysulfone, polyphenyl sulfone, a combination thereof, and a plurality of layers thereof. The implantable device according to item 7. 9. The package further includes at least one top coat (107). Preferably, the implantable device according to any one of items 1 to 8, wherein the top coat (107) and the capsule upper layer (103) overlap at least partially or completely. 10. The implantable device according to item 9, wherein the top coat (107) is biocompatible. 11. The implantable device according to any one of items 9 to 10, wherein the top coat (107) is corrosion resistant. 12. The implantable device according to any one of items 9 to 10, wherein the top coat (107) is transparent. 13. The top coat (107) is a glass, SiO 2 , diamond or diamond-like carbon, aluminum oxide, titanium oxide, a material selected from these combinations, and a plurality of layers thereof, or consisting of, the implanted device according to any one of items 9 to 12. 14. The implanted device, preferably the top coat (107), further includes an electronic trace (108) electrically connected to the electronic component (101), the electronic trace (108) preferably forms an electrode in or protruding from the top coat (107), the implanted device according to any one of items 9 to 13. 15. The implanted device according to item 14, wherein the electronic trace forms an electrode, and the electrode is preferably biocompatible and corrosion resistant. 16. The electronic trace includes or consists of a material selected from platinum, black / porous platinum, iridium, iridium / platinum, iridium oxide, PEDOT:PSS, titanium nitride, doped diamond or doped diamond-like carbon, graphene, and combinations thereof, the implanted device according to any one of items 14 to 15. 17. The implanted device according to any one of items 1 to 16, wherein the electronic component (101) encapsulated by the hermetic package (10) includes a layer (102). 18. The layer (102) includes or consists of ceramic or glass, optionally selected from silicon oxide, optionally obtained by oxidizing a silicon substrate, the implanted device according to item 17. 19. The implanted device is on the capsule upper layer (103), at least one additional capsule upper layer (103a), and / or encapsulating the capsule lower layer (104), at least one additional lower capsule encapsulation (104a), the implanted device according to any one of items 1 to 19. 20. The additional capsule layers (103a, 104a) overlap to form at least one additional bilayer (105a, 105b, 105c), Optionally, in the embedded device according to item 19, the additional bilayer (105a, 105b, 105c) covers at least a part, more preferably all, of the side walls (106, 106') of the electronic component (101). 21. The embedded device according to item 20, wherein the at least one additional bilayer (105a, 105b, 105c) covers only the side walls (106, 106') of the electronic component (101) and does not cover the upper and lower surfaces of the electronic component (101). 22. The embedded device according to item 19 or 21, wherein the capsule upper layer (103, 103') and / or the capsule lower layer (104, 104') is corrosion-resistant and optionally biocompatible. 23. The embedded device according to any one of items 19 to 22, wherein the at least one additional capsule upper layer (103a) and / or the at least one additional capsule lower layer (104a) is biocompatible and optionally corrosion-resistant. 24. The capsule upper layer (103) and / or the capsule lower layer (104), and / or Optionally, the at least one additional capsule upper layer (103a) and / or the at least one additional capsule lower layer (104a) The embedded device according to any one of items 1 to 23, which contains or consists of the same or different materials. 25. The embedded device includes a photodiode and / or an electrode (109) exposed to the environment, Preferably, in the embedded device according to any one of items 1 to 24, the photodiode and / or the electrode (109) is embedded in the top coat and / or the capsule upper layer such that the topmost surface is exposed to the environment. 26. The embedded device is configured to be implantable in the eye, Preferably, as the retinal implant, an implantable device according to any one of items 1 to 25, configured to be implantable on or under the retina. 27. An implantable system, comprising at least one of the package devices according to any one of items 1 to 26. 28. A method of packaging an implantable device, (a) providing at least one electronic component (101) on a substrate (110); (b) coating at least one capsule upper layer (103, 103') on the electronic component (101, 101'); (c) coating at least one capsule lower layer (104, 104') on the electronic component (101, 101'), characterized in that the capsule upper layer (103, 103') and the capsule lower layer (104, 104') overlap at least partially to form a bilayer (105, 105', 105a, 105b, 105c). 29. A method of packaging an implantable device, (i) providing an assembled component (100) on a substrate (110) with at least one, preferably a plurality of, spaced-apart electronic components (101, 101'), and defining a groove (111) between the adjacent electronic components (101, 101') and the substrate (110); (ii) coating at least one capsule upper layer (103, 103') on the assembled component (100) to coat the electronic component (101, 101') and draw it down into the groove (111); (iii) coating a release layer (112) on the assembled component (100); (iv) partially removing the release layer (112) and leaving a residue of the release layer (112) in the drawn-down groove (111); (v) preferably, inverting the assembled component (100) upside down. ​(vi) A step of removing the residues of (a) the substrate (110), (b) the upper capsule layer (103), and (c) the release layer (112) from the lower surface of the assembled component; (vii) A step of coating at least one lower capsule layer (104, 104') on the assembled component (100), preferably coating the electronic components (101, 101') and the groove (111), and including; The upper capsule layer (103, 103') and the lower capsule layer (104, 104') are coated such that at least a part of them overlaps to form a double layer (105, 105'). A method characterized by this. 30. The method according to any one of items 28 to 29, wherein the double layer (105, 105') is formed to cover at least a part, more preferably all, of the side walls (106, 106') of the electronic component (101). 31. The method according to any one of items 28 to 30, wherein the double layer (105, 105') covers only the side walls (106 and 106') of the electronic component (101) and does not cover the upper and lower surfaces of the electronic component (101). 32. The method further includes a step of providing a top coat (107), The step is (a) Coating a top coat (107) on the upper surface of the electronic component (101, 101'), preferably as defined in any one of items 1 to 31, (b) partially removing the top coat (107), (c) coating at least one upper capsule layer (103, 103') on the electronic component (101, 101') such that at least the top coat (107) and the capsule layer (103, 103') preferably overlap at least partially, preferably as defined in any one of items 1 to 31, or (a’) Preferably, at least one capsule upper layer (103, 103’) is applied to the electronic component (101, 101’) as defined in any one of items 1 to 31, (b’) the capsule upper layer (103, 103’) is partially removed from the electronic component (101, 101’), and (c’) preferably, the top coat (107) is applied to the electronic component (101, 101’) such that at least the top coat (107) and the capsule layer (103, 103’) preferably overlap at least in part as defined in any one of items 1 to 31. which is performed by the method according to any one of items 28 to 31. 33. The method according to item 32, wherein the step (2) comprises partially removing the top coat (107) or the capsule upper layer (103, 103’) by a chemical or physical process, preferably by wet or dry etching and / or lift-off. 34. The top coat (107) is applied by a deposition method, the deposition method includes chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), and underlayer oxidation method, the method according to any one of items 32 to 33, wherein the chemical vapor deposition (CVD) includes PECVD. 35. The method further includes a step of forming an electronic trace (108) and / or an electrode (109), preferably in the top coat (107), by a deposition method and / or patterning, the deposition method includes physical vapor deposition and electrodeposition, and the patterning includes lift-off or etching, the method according to any one of items 28 to 34. 36. The method according to any one of items 29 to 35, wherein the method includes a step of temporarily attaching the upper surface of the assembled component to a temporary carrier (113) before the step (iv). 37. The substrate (110), the capsule upper layer (103) and / or the release layer (112) are removed by means independently selected from physical means and chemical means, The method according to any one of items 29 to 35, wherein the physical means and the chemical means include grinding, etching, and / or stripping. 38. The method according to any one of items 28 to 37, wherein the capsule upper layer (103) and / or the capsule lower layer (104) is biocompatible. 39. The method according to any one of items 28 to 38, wherein the capsule upper layer (103, 103a) and / or the capsule lower layer (104, 104a) is corrosion resistant. 40. The capsule upper layer (103, 103a) and / or the capsule lower layer (104, 104a) comprises or consists of a material optionally selected from metals, ceramics, diamond-like carbon, diamond, glass, low-permeability and / or dense (specification) polymers, and multiple layers thereof, wherein the metals include titanium, platinum, stainless steel, titanium-nickel, palladium, niobium, tantalum, alloys and multiple layers thereof, the ceramics include silicon oxide, silicon nitride, silicon carbide, oxycarbide, titanium carbide, metal oxides such as aluminum oxide, aluminum nitride, zirconium oxide, metal nitrides, and metal carbides, and multiple layers thereof, the polymers include fluorocarbons, polyurethanes, PEEK, silicones, PDMS, parylene, and polyimides, The method according to any one of items 28 to 39. 41. The release layer (112) is a material selected from polymer materials, preferably a material selected from resins, more preferably a material selected from photosensitive resins and soluble polymer materials. The method according to any one of items 30 to 40, comprising or consisting of. 42. The method according to any one of items 32 to 41, wherein the top coat (107) is biocompatible. 43. The method according to any one of items 32 to 42, wherein the top coat (107) is corrosion resistant. 44. The method according to any one of items 32 to 43, wherein the top coat (107) is transparent. 45. The top coat (107) is a ceramic, a glass containing PECVD SiC or SiOC, SiO 2 , diamond or diamond-like carbon, aluminum oxide, titanium oxide, and the method according to any one of items 32 to 44, comprising or consisting of a material selected from a plurality of layers thereof. 46. The method according to any one of items 28 to 45, wherein the method provides the package device according to any one of items 1 to 26.

Prior Art Documents

Patent Documents

[0084]

Patent Document 1

Patent Document 2

Patent Document 3

Claims

1. An electronic component (101) encapsulated by a hermetic package (10), The implantable device, characterized in that the package comprises an upper encapsulation layer (103) and a lower encapsulation layer (104), the upper encapsulation layer and the lower encapsulation layer (103 and 104) at least partially overlapping each other to form a double layer (105, 105').

2. 2. An implantable device according to claim 1, wherein the double layer (105, 105') covers at least a portion, more preferably the entire side wall (106, 106') of the electronic component (101).

3. 3. An implantable device according to any of claims 1 to 2, wherein the double layer (105, 105') covers only a portion of the electronic component (101) rather than the entirety of the electronic component (101).

4. 4. An implantable device according to any one of claims 1 to 3, wherein the double layer (105, 105') covers only the side walls (106, 106') of the electronic component (101) and does not cover the top and bottom surfaces of the electronic component (101).

5. 5. An implantable device according to any of claims 1 to 4, wherein the upper encapsulant layer (103) and / or the lower encapsulant layer (104) are biocompatible.

6. 6. An implantable device according to any of the preceding claims, wherein the upper encapsulation layer (103) and / or the lower encapsulation layer (104) are corrosion resistant.

7. 7. The implantable device according to any of claims 5 to 6, wherein the upper encapsulation layer (103) and / or the lower encapsulation layer (104) comprises or consists of metals, ceramics including oxides, nitrides and carbides, preferably metal oxides, metal nitrides and metal carbides, diamond-like carbon, diamond, glass, polymers, combinations thereof or multiple layers thereof.

8. the metal is one selected from Ti, Pt, stainless steel, titanium-nickel, palladium, niobium, tantalum, combinations or alloys thereof, and layers thereof; the ceramic is one selected from silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, titanium carbide, titanium oxide, aluminum oxide, aluminum nitride, zirconium oxide, combinations thereof, and layers thereof; and / or the polymer is one selected from fluorocarbon, polyurethane, polyetheretherketone (PEEK), silicone, PDMS, parylene, polyimide, polycarbonate, polycarbonate urethane, silicone, silicone-polyester-urethane, durimide (photosensitive polyimide), cyclic olefin polymer (COP), cyclic olefin copolymer (COC), polymethylmethacrylate (PMMA), polyphenylene, polysulfone, polyphenylsulfone, combinations thereof, and layers thereof; 8. An implantable device as described in claim 7.

9. the package further comprises at least one topcoat (107); 9. An implantable device according to any of the preceding claims, wherein preferably said topcoat (107) and said encapsulant upper layer (103) overlap at least partially or completely.

10. The implantable device of claim 9 , wherein the top coat (107) is biocompatible.

11. The implantable device of any of claims 9 to 10, wherein the top coat (107) is corrosion resistant.

12. The implantable device of any of claims 9 to 10, wherein the top coat (107) is transparent.

13. The top coat (107) may be a ceramic, a glass, including SiC or SiOC, SiO ２ 13. An implantable device as claimed in any one of claims 9 to 12, comprising or consisting of a material selected from the group consisting of: diamond or diamond-like carbon, aluminium oxide, titanium oxide, combinations thereof and layers thereof.

14. The implantable device, preferably the topcoat (107), further comprising an electronic trace (108) electrically connecting to the electronic component (101); 14. An implantable device according to any of claims 9 to 13, wherein the electronic traces (108) preferably form electrodes in or protruding from the topcoat (107).

15. 15. The implantable device of claim 14, wherein the electronic traces form electrodes, the electrodes being preferably biocompatible and corrosion resistant.

16. 16. An implantable device as described in any of claims 14-15, wherein the electronic traces comprise or consist of a material selected from platinum, black / porous platinum, iridium, iridium / platinum, iridium oxide, PEDOT:PSS, titanium nitride, doped diamond or doped diamond-like carbon, graphene, and combinations thereof.

17. 17. An implantable device according to any of the preceding claims, wherein the electronic component (101) encapsulated by the hermetic package (10) comprises a layer (102).

18. the layer (102) comprises or consists of a ceramic or a glass; Optionally, silicon oxide; 18. An implantable device as claimed in claim 17, optionally obtained by oxidizing a silicon substrate.

19. The implantable device comprises: on said capsule top layer (103), at least one further capsule top layer (103a), and / or at least one further lower encapsulation (104a) encapsulating said lower encapsulation layer (104); 19. An implantable device according to any one of claims 1 to 18.

20. said further capsule layers (103a, 104a) overlapping each other to form at least one further bilayer (105a, 105b, 105c); 20. An implantable device according to claim 19, optionally wherein said further bilayer (105a, 105b, 105c) covers at least a part, more preferably the whole, of said side wall (106, 106') of said electronic component (101).

21. 21. The implantable device of claim 20, wherein the at least one further bilayer (105a, 105b, 105c) covers only the side walls (106, 106') of the electronic component (101) and does not cover the top and bottom surfaces of the electronic component (101).

22. 22. An implantable device according to claim 19 or 21, wherein the upper encapsulant layer (103, 103') and / or the lower encapsulant layer (104, 104') are corrosion resistant and, optionally, biocompatible.

23. 23. An implantable device according to any of claims 19 to 22, wherein the at least one further encapsulant upper layer (103a) and / or the at least one further encapsulant lower layer (104a) are biocompatible and, optionally, corrosion resistant.

24. the upper capsule layer (103) and / or the lower capsule layer (104), and / or Optionally, said at least one further capsule upper layer (103a) and / or said at least one further capsule lower layer (104a) are 24. An implantable device according to any preceding claim, comprising or consisting of the same or different materials.

25. the implantable device includes a photodiode and / or an electrode (109) exposed to the environment; 25. An implantable device according to any preceding claim, preferably embedded in the topcoat and / or encapsulant layer such that a top surface of the photodiode and / or electrode (109) is exposed to the environment.

26. the implantable device is configured to be implanted in an eye; 26. An implantable device according to any preceding claim, preferably adapted for epiretinal or subretinal implantation as a retinal implant.

27. 27. An embedded system comprising at least one package device according to any one of claims 1 to 26.

28. 1. A method of packaging an implantable device, comprising: (a) providing at least one electronic component (101) on a substrate (110); (b) applying at least one encapsulation top layer (103, 103') to said electronic component (101, 101'); (c) applying at least one encapsulant layer (104, 104') to said electronic component (101, 101'), The method of claim 1, wherein said upper capsule layer (103, 103') and said lower capsule layer (104, 104') are at least partially overlapping to form a bilayer (105, 105', 105a, 105b, 105c).

29. 1. A method of packaging an implantable device, comprising: (i) providing an assembly (100) having at least one, and preferably a plurality of, spaced apart electronic components (101, 101') mounted on a substrate (110), the adjacent electronic components (101, 101') and the substrate (110) defining grooves (111) between the electronic components (101, 101'); (ii) applying at least one encapsulation layer (103, 103') to said assembly (100) to coat said electronic components (101, 101') and to underlay said grooves (111); (iii) applying a release layer (112) to the assembly (100); (iv) partially removing the release layer (112) to leave a residual amount of the release layer (112) in the primed groove (111); (v) preferably inverting said assembly (100) upside down; (vi) removing (a) the substrate (110), (b) the encapsulation top layer (103), and (c) the remaining amount of the release layer (112) from the underside of the assembly; (vii) applying at least one encapsulant layer (104, 104') to said assembly (100), preferably coating said electronic components (101, 101') and said grooves (111); The method according to claim 1, wherein the capsule upper layer (103, 103') and the capsule lower layer (104, 104') are applied so as to at least partially overlap and form a bilayer (105, 105').

30. The method according to any of claims 28 to 29, wherein the bilayer (105, 105') is formed to cover at least a part, more preferably the entirety, of the sidewall (106, 106') of the electronic component (101).

31. The method according to any of claims 28 to 30, wherein the double layer (105, 105') covers only the side walls (106, 106') of the electronic component (101) and does not cover the top and bottom surfaces of the electronic component (101).

32. The method further comprises providing a topcoat (107); The process further comprises: (a) applying a topcoat (107) to the upper surface of the electronic component (101, 101'), preferably as defined in any one of claims 1 to 31; (b) partially removing the topcoat (107); (c) applying at least one encapsulation top layer (103, 103') to the electronic component (101, 101'), preferably as defined in any one of claims 1 to 31, such that at least the topcoat (107) and the encapsulation layer (103, 103') preferably at least partially overlap. or (a') applying at least one encapsulation top layer (103, 103') to said electronic component (101, 101'), preferably as defined in any one of claims 1 to 31; (b') partially removing the encapsulation top layer (103, 103') from said electronic component (101, 101'); (c') applying a top coat (107), preferably as defined in any one of claims 1 to 31, to said electronic component (101, 101'), preferably such that at least the top coat (107) and the encapsulation layer (103, 103') overlap at least in part. The method according to any one of claims 28 to 31, wherein the method is carried out by

33. 33. The method of claim 32, wherein step (2) comprises partially removing the topcoat (107) or the encapsulation upper layer (103, 103') by a chemical or physical process, preferably by wet or dry etching and / or lift-off.

34. The top coat (107) is applied by deposition, The deposition method includes chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), and underlayer oxidation; 34. The method of any of claims 32 to 33, wherein the chemical vapor deposition (CVD) process comprises PECVD.

35. the method further comprising forming electronic traces (108) and / or electrodes (109), preferably in the topcoat (107), by deposition and / or patterning; 35. The method of any of claims 28 to 34, wherein the deposition includes physical vapor deposition and electrodeposition, and the patterning includes lift-off or etching.

36. 36. The method of any of claims 29 to 35, wherein the method comprises, prior to step (iv), attaching a top surface of the assembly to a temporary carrier (113).

37. removing the substrate (110), the encapsulation top layer (103) and / or the release layer (112) by means independently selected from physical means and chemical means; 36. The method of any of claims 29 to 35, wherein the physical means and the chemical means include grinding, etching, and / or stripping.

38. 38. The method according to any of claims 28 to 37, wherein the upper encapsulation layer (103) and / or the lower encapsulation layer (104) are biocompatible.

39. 39. The method according to any of claims 28 to 38, wherein the encapsulation top layer (103, 103a) and / or the encapsulation bottom layer (104, 104a) are corrosion resistant.

40. The capsule upper layer (103, 103a) and / or the capsule lower layer (104, 104a) comprising or consisting of a material selected from any of the following: metal, ceramic, diamond-like carbon, diamond, glass, low-permeability and / or dense (specification) polymers, and multiple layers thereof; The metals include titanium, platinum, stainless steel, titanium-nickel, palladium, niobium, tantalum, alloys and layers thereof; The ceramics include metal oxides, metal nitrides, and metal carbides, such as silicon oxide, silicon nitride, silicon carbide, silicon oxycarbide, titanium carbide, aluminum oxide, aluminum nitride, zirconium oxide, and multiple layers thereof; The polymer includes fluorocarbon, polyurethane, PEEK, silicone, PDMS, parylene, and polyimide; 40. The method of any one of claims 28 to 39.

41. the release layer (112) is a material selected from polymeric materials; Preferably, the material is selected from resins, More preferably, the material is selected from photosensitive resins and soluble polymeric materials; 41. The method of any of claims 30 to 40, comprising or consisting of:

42. The method of any of claims 32 to 41, wherein the top coat (107) is biocompatible.

43. 43. The method of any of claims 32 to 42, wherein the topcoat (107) is corrosion resistant.

44. 44. The method of any of claims 32 to 43, wherein the topcoat (107) is transparent.

45. The top coat (107) Ceramic, glass including PECVD SiC or SiOC, SiO ２ 45. The method of any of claims 32 to 44, comprising or consisting of a material selected from diamond or diamond-like carbon, aluminium oxide, titanium oxide and layers thereof.

46. 46. ​​The method of any of claims 28 to 45, wherein the method provides a packaging device as claimed in any of claims 1 to 26.

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