Power conversion device, method for controlling power conversion device

The power conversion device addresses the inefficiencies and size limitations of conventional phase-shift converters by incorporating a capacitor and semiconductor switch configuration that allows for efficient voltage control and expanded output voltage range, achieving high efficiency and compact design.

JP2025085189APending Publication Date: 2025-06-05ASTEMO LTD
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Patent Information

Application Number
JP2023198896
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-11-24
Publication Date
2025-06-05

AI Technical Summary

Technical Problem

Conventional phase-shift converters face challenges in achieving high efficiency and compact size due to high losses from using two semiconductor devices as bidirectional switches and the inability to effectively expand the output voltage range using a capacitor for suppressing bias magnetization.

Method used

A power conversion device that includes a first capacitor between the bridge circuit and the transformer, a second capacitor in parallel or series with the first capacitor, a first semiconductor switch in parallel or series with the first capacitor, and a switching-based voltage control mechanism that adjusts the phase shift of the bridge circuit elements, allowing for efficient control of the output voltage range.

Benefits of technology

The proposed solution enables a power conversion device with high efficiency, reduced size, and weight, capable of expanding the output voltage range while minimizing losses, thus addressing the limitations of conventional phase-shift converters.

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Abstract

To provide a power conversion device with a capacitor for suppressing deviation magnetization that is both highly efficient and compact and lightweight.SOLUTION: A power conversion device that converts a first DC voltage supplied from a DC power source into a second DC voltage via a bridge circuit, a transformer, and a rectifier circuit comprises: a first capacitor between the bridge circuit and the transformer; a second capacitor in parallel or series with the first capacitor; a first semiconductor switch in parallel or in series with the first capacitor; and means of controlling voltage by switching to adjust the amount of phase shift of the elements that make up the bridge circuit.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present invention relates to the configuration of a power conversion device and its control, and in particular to a technique that is effective when applied to an isolated DC / DC converter in which a plurality of power conversion circuits are integrated using a transformer. [Background technology]

[0002] As one variation of on-board power conversion equipment, development is underway on an isolated DC / DC converter that uses a transformer to integrate a DC / DC converter for a low-voltage storage battery (LVBAT) and a DC / AC converter for an AC100V outlet (V2L). By integrating multiple power conversion circuits via a transformer, it is possible to achieve both high efficiency and compact, lightweight power conversion equipment.

[0003] In isolated DC / DC converters that integrate multiple power conversion circuits, the input voltage range becomes wider, and it is necessary to design the number of turns on the primary side of the transformer (generally increasing the number of turns) so that the output voltage specifications are met even when the input voltage drops. On the other hand, when the input voltage is at the rated value, the primary side current and secondary side voltage increase, making it difficult to improve efficiency.

[0004] Incidentally, in a circuit having two or more legs, a converter that operates with a phase shift between the legs is called a "phase shift converter."

[0005] Background of this technical field includes, for example, technology such as that described in Patent Document 1. Patent Document 1 discloses "a DC-DC converter of a primary side phase shift type including a full-bridge inverter that converts a DC voltage into a high-frequency voltage and a rectifier circuit that rectifies the output of the full-bridge inverter" (paragraph

[0001] of Patent Document 1). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Patent No. 6033649 Summary of the Invention [Problem to be solved by the invention]

[0007] In the above-mentioned phase shift converter, the output voltage range can be expanded by the bias magnetization suppression capacitor, so that the output voltage range can be expanded by switching the capacitor, and the number of turns on the primary side can be increased.

[0008] However, conventional phase-shift converters generally use two semiconductor devices as bidirectional switches to switch between capacitors, which results in high losses.

[0009] In the above-mentioned Patent Document 1, when the electromagnetic energy stored in the inductance included in the circuit is small, the capacitance changeover switch Q5 is turned off to connect the first and second capacitors in series between the output terminals of the inverter, thereby reducing the combined capacitance of both capacitors, making it possible to completely charge and discharge both capacitors with the small amount of electromagnetic energy stored in the circuit, thereby achieving soft switching of each switch element of the inverter.

[0010] On the other hand, when the load is heavy and the amount of electromagnetic energy stored in the inductance included in the circuit increases, the capacitance changeover switch Q5 is turned on to connect the first capacitor or the second capacitor alone in parallel to the switch element of one of the arms of the reference phase leg or the switch element of one of the control phase leg, thereby increasing the capacitance of the capacitor to achieve soft switching of each switch element of the inverter. (Patent Document 1, paragraph

[0051] ) In Patent Document 1, the switching circuit is composed of two capacitors (capacitors C5 and C6) and one capacitance changeover switch Q5, but when using semiconductor devices, it is necessary to use both as switches.

[0011] Furthermore, in Patent Document 1, no consideration is given to expanding the output voltage range by using a capacitor for suppressing bias magnetism as described above.

[0012] SUMMARY OF THE PRESENT DISCLOSURE An object of the present invention is to provide a power conversion device including a capacitor for suppressing biased magnetism, which is capable of achieving both high efficiency and reduced size and weight, and a control method thereof. [Means for solving the problem]

[0013] In order to solve the above problems, the present invention provides a power conversion device that converts a first DC voltage supplied from a DC power source into a second DC voltage via a bridge circuit, a transformer, and a rectifier circuit, and is characterized in comprising a first capacitor provided between the bridge circuit and the transformer, a second capacitor provided in parallel or series with the first capacitor, a first semiconductor switch provided in parallel or series with the first capacitor, and a switching-based voltage control means that adjusts the amount of phase shift of elements that constitute the bridge circuit.

[0014] The present invention also provides a control method for the above-mentioned power conversion device, characterized in that, when the first DC voltage is lower than a predetermined value, the first semiconductor switch is turned off and the second DC voltage is controlled by switching of the bridge circuit, and, when the first DC voltage is equal to or higher than a predetermined value, the first semiconductor switch is turned on and the second DC voltage range is expanded by switching of the bridge circuit. Effect of the Invention

[0015] According to the present invention, it is possible to realize a power conversion device including a capacitor for suppressing asymmetric magnetism, which is capable of achieving both high efficiency and small size and light weight, and a control method thereof.

[0016] Problems, configurations and effects other than those described above will become apparent from the following description of the embodiments. [Brief description of the drawings]

[0017] [Figure 1] 1 is a circuit diagram showing a schematic configuration of a power conversion device according to a first embodiment of the present invention. [Diagram 2] FIG. 2 is a diagram showing a modified example of the capacitor switching circuit 103 of FIG. [Diagram 3] 2 is a flowchart showing a method for controlling the power conversion device of FIG. 1. [Figure 4] FIG. 4 is a diagram showing waveforms during capacitor switching control. [Diagram 5] FIG. 11 is a diagram showing waveforms when a semiconductor switch S101 of the parallel system of the power conversion device according to the second embodiment of the present invention is in an OFF state. [Figure 6A] FIG. 11 is a diagram illustrating the operation when the capacitor switching circuit is switched from OFF to ON. [Figure 6B] FIG. 11 is a diagram illustrating the operation when the capacitor switching circuit is switched from OFF to ON. [Figure 6C] FIG. 11 is a diagram illustrating the operation when the capacitor switching circuit is switched from OFF to ON. [Figure 7] FIG. 11 is a diagram showing waveforms when a switch S101 in a series system of a power conversion device according to a third embodiment of the present invention is in an OFF state. [Figure 8A] FIG. 11 is a diagram illustrating the operation when the capacitor switching circuit is switched from OFF to ON. [Figure 8B] FIG. 11 is a diagram illustrating the operation when the capacitor switching circuit is switched from OFF to ON. [Figure 9] FIG. 11 is a diagram showing waveforms when a switch S101 in the parallel system of the power conversion device according to the fourth embodiment of the present invention is in an OFF state. [Figure 10] FIG. 13 is a diagram showing a waveform in which the peak value of VC1 is increased primarily by lowering the switching frequency. [Figure 11] 10 is a flowchart showing a control method for a power conversion device according to a fifth embodiment of the present invention. [Figure 12] FIG. 4 is a diagram showing waveforms during capacitor switching control. [Figure 13] FIG. 13 is a diagram showing characteristics when capacitance is continuously switched in accordance with the switching duty ratio of a semiconductor switch S101 of a capacitor switching circuit of a power conversion device according to Example 6 of the present invention. [Figure 14] FIG. 11 is a diagram showing a capacitor switching circuit of a power conversion device according to a seventh embodiment of the present invention. [Figure 15] FIG. 13 is a diagram showing a capacitor switching circuit of a power conversion device according to an eighth embodiment of the present invention. [Figure 16] FIG. 13 is a diagram showing a capacitor switching circuit of a power conversion device according to a ninth embodiment of the present invention. [Figure 17] FIG. 23 is a diagram showing waveforms during capacitor switching control of the power conversion device according to the tenth embodiment of the present invention. [Figure 18] 1 is a circuit diagram showing a schematic configuration of a conventional phase shift converter. [Figure 19] FIG. 4 is a diagram showing the effect of a bias magnetization suppression capacitor on an output voltage. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the drawings, the same components are designated by the same reference numerals, and detailed description of overlapping parts will be omitted. EXAMPLES

[0019] A power conversion device and a control method thereof according to a first embodiment of the present invention will be described with reference to Fig. 1 to Fig. 4, Fig. 18 and Fig. 19. Fig. 18 and Fig. 19 are diagrams showing a schematic configuration of a conventional phase shift converter (Fig. 18) shown for easy understanding of the present invention, and a diagram showing the effect of a bias magnetization suppression capacitor on an output voltage (Fig. 19).

[0020] Fig. 1 is a circuit diagram showing a schematic configuration of a power conversion device according to the present embodiment. Fig. 2 is a diagram showing a modified example of the capacitor switching circuit 103 shown in Fig. 1.

[0021] As shown in Fig. 1, the power conversion device of this embodiment is a power conversion device to which a capacitor switching parallel system is applied. The power conversion device of this embodiment is an insulated DC / DC converter, and is not limited to a phase shift converter, and may be an LLC converter or the like. Reference numeral 101 denotes a primary side circuit of the phase shift converter, and is composed of a capacitor C1, semiconductor switches S1 to S4, a capacitor switching circuit 103, and an inductor L1.

[0022] Capacitor switching circuit 103 is composed of capacitors C101, C102, and a semiconductor switch S101. Capacitor C102 is connected in parallel with capacitor C101, and semiconductor switch S101 is connected in parallel with capacitor C101 and in series with capacitor C102.

[0023] In FIG. 1, an example of the semiconductor switch S101 is a MOSFET with a diode D101 connected in anti-parallel.

[0024] Reference numeral 102 denotes a secondary circuit, which is composed of an inductor L2, a capacitor C3, and diodes D1 and D2. The secondary circuit is not limited to a center tap configuration, and may be a full bridge configuration, etc. Reference numeral Tr1 denotes a transformer.

[0025] The capacitor switching method may be a series method as shown in Fig. 2. In the example of Fig. 2, in the capacitor switching circuit 103, a capacitor C2 is connected in series with a capacitor C1, and a semiconductor switch S1 is connected in series with the capacitor C1 and in parallel with the capacitor C2. The semiconductor switch S1 is a semiconductor device such as a MOSFET to which a diode D1 is connected in anti-parallel.

[0026] Here, in the conventional phase shift converter shown in Fig. 18, a capacitor C3 may be added to suppress transformer bias magnetization. As shown in Fig. 19, the output voltage range can be expanded by changing this capacitance. Therefore, we propose the capacitor switching circuit and control method of this embodiment shown in Figs. 1 to 4.

[0027] FIG. 3 is a flowchart showing a method of controlling the power conversion device of FIG.

[0028] As shown in FIG. 3, a semiconductor switch S101 in a capacitor switching circuit 103 is switched in response to an input voltage.

[0029] When the operation of the power conversion device is started, first, in step S1, the primary side circuit 101 and the secondary side circuit 102 are driven.

[0030] Next, in step S2, the input voltage V1 and the output voltage V2 are detected.

[0031] Next, in step S3, the input voltage V1 is compared with a predetermined threshold value (reference value) Vth1. If the input voltage V1 is equal to or greater than the threshold value Vth1 (Yes), the process proceeds to step S4. If the input voltage V1 is smaller than the threshold value Vth1 (No), the process proceeds to step S5.

[0032] In step S4, the semiconductor switch S101 is turned ON, and the process proceeds to step S7. On the other hand, in step S5, the input voltage V1 is compared with a predetermined threshold value (reference value) Vth2.

[0033] In step S5, if the input voltage V1 is equal to or lower than the threshold value Vth2 (Yes), the process proceeds to step S6. If the input voltage V1 is greater than the threshold value Vth2 (No), the process proceeds to step S7.

[0034] In step S6, the semiconductor switch S101 is turned OFF, and the process proceeds to step S7.

[0035] Next, in step S7, the difference ΔV2 between the measured value of the output voltage V2 and its target value Vref2 is calculated, and it is determined whether ΔV2 is equal to or smaller than 0.

[0036] If ΔV2 is equal to or less than 0 (Yes), the process proceeds to step S8. If ΔV2 is greater than 0 (No), the process proceeds to step S9.

[0037] In step S8, the amount of phase shift θ1 of the primary side circuit 101 is decreased, and then the process proceeds to step S10 to stop driving the primary side circuit 101 and the secondary side circuit 102. On the other hand, in step S9, the amount of phase shift θ1 of the primary side circuit 101 is increased, and then the process proceeds to step S10 to stop driving the primary side circuit 101 and the secondary side circuit 102.

[0038] Figure 4 shows the waveforms during capacitor switching control.

[0039] When the input voltage V1 is equal to or greater than the threshold Vth1, the semiconductor switch S101 is turned ON to connect capacitors C101 and C102 in parallel (increasing capacitance), thereby decreasing the output voltage V2. When the input voltage V1 is smaller than the threshold Vth1, the semiconductor switch S101 is turned OFF to connect only capacitor C101 (decreasing capacitance), thereby increasing the output voltage V2. After driving the capacitor switching circuit 103, the phase shift amount θ1 of the phase shift converter is used to control the output voltage V2. (Description of how the phase shift converter is driven is omitted.) The series system shown in FIG. 2 can also be controlled in the same manner as above.

[0040] As described above, the power conversion device of this embodiment is a power conversion device that converts a first DC voltage V1 supplied from a DC power supply into a second DC voltage V2 via a bridge circuit (primary side circuit 101), a transformer Tr1, and a rectifier circuit (secondary side circuit 102), and includes a first capacitor C101 provided between the bridge circuit and the transformer Tr1, a second capacitor C102 provided in parallel or series with the first capacitor C101, a first semiconductor switch S101 provided in parallel or series with the first capacitor C101, and a switching-based voltage control means that adjusts the amount of phase shift of the elements (semiconductor switches S1 to S4) that constitute the bridge circuit.

[0041] The second capacitor C102 is connected in parallel with the first capacitor C101, and the first semiconductor switch S101 is connected in parallel with the first capacitor C101 and in series with the second capacitor C102.

[0042] Alternatively, the second capacitor C102 may be connected in series with the first capacitor C101, and the first semiconductor switch S101 may be connected in series with the first capacitor C101 and in parallel with the second capacitor C102.

[0043] Furthermore, in the power conversion device of this embodiment, when the first DC voltage V1 is lower than a predetermined value Vth1, the first semiconductor switch S101 is turned off and the second DC voltage V2 is controlled by switching of the bridge circuit, and when the first DC voltage V1 is equal to or higher than the predetermined value Vth1, the first semiconductor switch S101 is turned on and the range of the second DC voltage V2 is expanded by switching of the bridge circuit.

[0044] According to this embodiment, LC resonance occurs due to the leakage inductance and excitation inductance of the capacitor and transformer, so the gain can be varied by the capacitance. When the input voltage V1 drops, the output voltage V2 can be increased by increasing the gain, so the output voltage range can be expanded by controlling the gain.

[0045] In this embodiment, the target is an isolated DC / DC converter equipped with a separate output voltage control means (not shown), and when the input voltage V1 falls below a certain threshold value Vth1, the output voltage V2 is increased and the control range (output voltage range) of the output voltage control means is expanded.

[0046] It has been confirmed that the output voltage of the above-mentioned isolated DC / DC converter (phase shift converter, LLC converter) fluctuates depending on the capacitance of the primary side capacitor. Therefore, by providing a changeover switch (semiconductor switch S101) and two capacitors C101 and C102, the capacitance is reduced when the input voltage V1 drops, making it possible to expand the output voltage range with a simple circuit configuration. EXAMPLES

[0047] Second Embodiment A power conversion device and a control method thereof according to a second embodiment of the present invention will be described with reference to Fig. 5 to Fig. 6C. The circuit configuration of the power conversion device of this embodiment is similar to that of the first embodiment (Fig. 1).

[0048] FIG. 5 is a diagram showing waveforms when the semiconductor switch S101 of the parallel type power conversion device of this embodiment is in the OFF state.

[0049] When the semiconductor switch S101 is in the OFF state, only the capacitor C101 is connected, so an AC voltage is applied to the capacitor C101, and a charging / discharging current flows accordingly. On the other hand, because the semiconductor switch S101 is in the OFF state, the charging current flows through the path that passes through the body diode D1 for the capacitor C102, and the capacitor cannot be discharged. Therefore, the voltage VC2 of the capacitor C102 is clamped at the peak value of the voltage VC1 of the capacitor C101, and thereafter, a steady state is reached where no charging current flows.

[0050] 6A to 6C show the operation when the capacitor switching circuit 103 is switched from OFF to ON.

[0051] As shown in FIG. 6A, when VC1=VC2, the voltage of the semiconductor switch S1 is 0, so that no current flows between C1 and C2 even when the semiconductor switch S1 is turned ON.

[0052] On the other hand, as shown in Figures 6B and 6C, when there is a potential difference between VC1 and VC2, if semiconductor switch S1 is turned ON with a voltage applied to it, a short-circuit current flows between C1 and C2. Since a short-circuit current can increase losses and cause circuit failure, it is necessary to switch the semiconductor switch ON when VC1 = VC2. Therefore, by turning on semiconductor switch S101 at the timing shown by the black circle in Figure 5, it can be switched without an overcurrent flowing.

[0053] As described above, the power conversion device of this embodiment switches on the first semiconductor switch S101 when the voltage of the first capacitor C101 is at a maximum.

[0054] In a configuration in which the second capacitor C102 is provided in parallel, when the semiconductor switch S101 is in the OFF state, the voltage of the second capacitor C102 is equal to the maximum value of the voltage of the first capacitor C101. Therefore, when the voltage VC1 of the first capacitor C101 and the voltage VC2 of the second capacitor C102 are equal, that is, when the voltage VC1 of the first capacitor C101 is maximum, the semiconductor switch S101 is switched ON.

[0055] If the semiconductor switch S101 is switched from OFF to ON while a voltage is applied to it, an overcurrent will occur, leading to circuit failure. Therefore, it is necessary to switch the semiconductor switch S101 at the above timing when no voltage is applied to it. In addition, the above timing can be achieved even in a sensorless configuration by synchronizing with the control of the primary side circuit without sensing the capacitor voltage. EXAMPLES

[0056] Third Embodiment A power conversion device and a control method thereof according to a third embodiment of the present invention will be described with reference to Fig. 7 to Fig. 8B. The circuit configuration of the power conversion device of this embodiment is similar to that of the first embodiment (Figs. 1 and 2).

[0057] FIG. 7 is a diagram showing waveforms when the switch S101 of the series type power conversion device of this embodiment is in the OFF state.

[0058] When the semiconductor switch S101 is in the OFF state, the capacitors C101 and C102 are connected in series, so a voltage is applied to both capacitors. However, because the body diode D101 is connected in parallel with the capacitor C102, a negative voltage (voltage from the anode to the cathode of the body diode D101) is not applied to the voltage VC2 of the capacitor C102. Therefore, an AC voltage is applied with VC1≦0, VC2≧0.

[0059] 8A and 8B show the operation when the capacitor switching circuit 103 is switched from OFF to ON.

[0060] As shown in Figure 8A, when VC2=0, the voltage of semiconductor switch S1 is 0, so even if it is turned ON, no current flows between C2 and S1. On the other hand, as shown in Figure 8B, when a voltage is applied to VC2, if the semiconductor switch S1 is turned ON with a voltage applied to it, a short-circuit current flows between C2 and S1. Since short-circuit current can increase losses and cause circuit failures, it is necessary to switch it ON when VC1=VC2. Therefore, by turning ON semiconductor switch S101 at the timing shown by the black circle in Figure 7, it can be switched without an overcurrent flowing. EXAMPLES

[0061] A power conversion device and a control method thereof according to a fourth embodiment of the present invention will be described with reference to Fig. 9 and Fig. 10. The circuit configuration of the power conversion device of this embodiment is similar to that of the first embodiment (Fig. 1).

[0062] FIG. 9 is a diagram showing waveforms when the switch S101 of the parallel system of the power conversion device of this embodiment is in the OFF state.

[0063] If the load or input / output voltages fluctuate when the parallel system shown in Figure 5 is operating in the OFF state, the peak value of the voltage VC1 of capacitor C101 fluctuates. If the peak value of VC1 increases, capacitor C102 charges again, returning to the same state as in Figure 5. However, if the peak value of VC1 decreases, capacitor C102 cannot discharge, resulting in the waveform shown in Figure 9. In this state, there is no point where VC1 = VC2, so an overcurrent will occur no matter when it is switched ON.

[0064] Therefore, we propose a control method to solve the above problem. The peak of VC1 is temporarily increased by increasing the ON time of the semiconductor switches S1 to S4 of the primary side circuit 101 in Fig. 1. Specifically, this can be achieved by lowering the switching frequency, increasing the switching duty ratio, etc.

[0065] Figure 10 shows a waveform in which the peak value of VC1 is temporarily increased by lowering the switching frequency. By increasing the peak value, it is possible to switch ON at the timing when VC1 = VC2.

[0066] As described above, in the power conversion device of this embodiment, when the peak of the voltage VC1 of the first capacitor C101 becomes smaller than the voltage VC2 of the second capacitor C102, the on-time of the bridge circuit is increased to increase the voltage VC1 of the first capacitor C101, and when the voltage VC1 of the first capacitor C101 matches the voltage VC2 of the second capacitor C102, the first semiconductor switch S101 is switched on.

[0067] The peak value of the voltage VC1 of the first capacitor C101 fluctuates due to fluctuations in input / output voltage and load. When the peak value of the voltage VC1 of the first capacitor C101 increases, the voltage VC2 of the second capacitor C102 also increases, so there is no problem. However, when the peak value of the voltage VC1 of the first capacitor C101 decreases, the voltage VC2 of the second capacitor C102 cannot be discharged, so there is no point where the voltage VC1 of the first capacitor C101 and the voltage VC2 of the second capacitor C102 intersect. In this state, a potential difference occurs between the capacitors regardless of the timing of switching, so an overcurrent occurs.

[0068] As a solution, we propose a control method to increase the peak value of the voltage VC1 of the first capacitor C101. This control method uses the fact that the waveform of the voltage VC1 of the first capacitor C101 fluctuates according to the switching of the primary side bridge circuit, and increases the switching ON time so that the peak value of the voltage VC1 of the first capacitor C101 increases. Methods for increasing the ON time include lowering the frequency and increasing the duty ratio.

[0069] The peak value of the voltage VC1 of the first capacitor C101 may become smaller due to fluctuations in input / output voltage and load. At this time (in the region of f=100kHz in FIG. 10), there is no point where the voltage VC1 of the first capacitor C101 and the voltage VC2 of the second capacitor C102 intersect, so an overcurrent occurs regardless of the timing of switching. Therefore, when the peak value of the voltage VC1 of the first capacitor C101 becomes smaller, the peak value of the voltage VC1 of the first capacitor C101 is increased (in the region of f=80kHz (ON) in FIG. 10) by the ON time (frequency reduction, duty ratio increase) of the bridge circuit on the primary side, and the voltage VC2 of the second capacitor C102 is switched from OFF to ON at the same timing as the voltage VC2 of the second capacitor C102, thereby preventing the occurrence of an overcurrent (in the region of f=100kHz (OFF) in FIG. 10). EXAMPLES

[0070] A power conversion device and a control method thereof according to a fifth embodiment of the present invention will be described with reference to Fig. 11 and Fig. 12. The circuit configuration of the power conversion device of this embodiment is similar to that of the first embodiment (Fig. 1).

[0071] FIG. 11 is a flowchart showing a method for controlling the power conversion device of this embodiment.

[0072] Steps S1 to S3 are the same as steps S1 to S3 in the flowchart of the first embodiment (FIG. 3), and therefore a description thereof will be omitted.

[0073] In step S3, if the input voltage V1 is equal to or greater than the threshold Vth1 (Yes), the process proceeds to step S4. If the input voltage V1 is smaller than the threshold Vth1 (No), the process proceeds to step S7.

[0074] In step S4, it is determined whether the semiconductor switch S101 is in the OFF state. If it is in the OFF state (Yes), the process proceeds to step S5, where the semiconductor switch S101 is switched from OFF to ON. If it is in the ON state (No), the process proceeds to step S11.

[0075] Next, in step S6, the amount of phase shift θ1 of the primary side circuit 101 is decreased, and then the process proceeds to step S11.

[0076] On the other hand, in step S7, the input voltage V1 is compared with a predetermined threshold value (reference value) Vth2. If the input voltage V1 is equal to or less than the threshold value Vth2 (Yes), the process proceeds to step S8. If the input voltage V1 is greater than the threshold value Vth2 (No), the process proceeds to step S11.

[0077] In step S8, it is determined whether the semiconductor switch S101 is ON or not. If it is ON (Yes), the process proceeds to step S9, where the semiconductor switch S101 is switched from ON to OFF. If it is OFF (No), the process proceeds to step S11.

[0078] Next, in step S10, the amount of phase shift θ1 of the primary side circuit 101 is increased, and then the process proceeds to step S11.

[0079] Steps S11 to S14 are the same as steps S7 to S10 in the flowchart of the first embodiment (FIG. 3), and therefore a description thereof will be omitted.

[0080] In this embodiment, as shown in FIG. 11, compared to the flowchart of the first embodiment (FIG. 3), a control for adjusting the phase shift amount θ1 when the semiconductor switch S101 is switched is added.

[0081] When the semiconductor switch S101 is switched from OFF to ON, the output voltage (gain) decreases, so the phase shift amount θ1 decreases and the output voltage V2 increases. When the semiconductor switch S101 is switched from ON to OFF, the output voltage (gain) increases, so the phase shift amount θ1 increases and the output voltage V2 decreases.

[0082] FIG. 12 shows waveforms during the control drive of FIG.

[0083] Without feedforward control, the gain changes when the capacitor is switched, resulting in large voltage fluctuations. On the other hand, if feedforward control is added, the gain fluctuations when the capacitor is switched are corrected by converter voltage control, so the voltage fluctuations can be suppressed.

[0084] As described above, in the power conversion device of this embodiment, when the first semiconductor switch S101 is switched on / off, voltage fluctuations are suppressed by performing feedforward control on the output voltage control system of the bridge circuit.

[0085] A sudden change in output voltage V2 is expected due to the gain fluctuation caused by capacitor switching. This is made to track the target value by output voltage control of the primary side bridge circuit, but with conventional feedback control, tracking begins after the output voltage suddenly changes, making it difficult to suppress output voltage fluctuations.

[0086] Therefore, a correction is made to the output voltage control system of the primary bridge circuit in response to the gain fluctuation. In the case of a phase-shift converter, the correction can be made by reducing the phase shift amount, which is a control parameter, as the gain increases due to capacitor switching. By incorporating this correction into the switching control flow as feedforward control, it is expected that the load fluctuation caused by the capacitor switching will be suppressed more effectively than with conventional feedback control. EXAMPLES

[0087] A power conversion device and a control method thereof according to a sixth embodiment of the present invention will be described with reference to Fig. 13. The circuit configuration of the power conversion device of this embodiment is similar to that of the first embodiment (Fig. 1).

[0088] FIG. 13 is a diagram showing characteristics when the capacitance is continuously switched in accordance with the switching duty ratio of the semiconductor switch S101 of the capacitor switching circuit of the power conversion device of this embodiment.

[0089] When the semiconductor switch S101 of the capacitor switching circuit 103 is switched, the capacitance can be continuously switched according to the switching duty ratio as shown in FIG.

[0090] Therefore, in the power conversion device of this embodiment, the first semiconductor switch S101 is switched on and off to adjust the duty ratio, thereby continuously switching the gain.

[0091] The above control allows the capacitance to be continuously adjusted between two values ​​by simple switching control.

[0092] By adjusting the duty ratio, the capacitance C1 when duty=0% (solid OFF) and the capacitance C2 when duty=100% (solid ON) can be adjusted to adjust the period when it acts as C1 and the period when it acts as C2, making it possible to adjust the capacitance to any value (between two values).

[0093] By switching the selector switch and adjusting the duty ratio, the capacitance can be switched continuously, allowing for fine control of the output voltage (gain).

[0094] On the other hand, switching losses occur in the changeover switches, which increases losses and places restrictions on device selection, so they need to be used appropriately depending on the application. EXAMPLES

[0095] Seventh embodiment A power conversion device and a control method thereof according to a seventh embodiment of the present invention will be described with reference to FIG.

[0096] FIG. 14 is a diagram showing a capacitor switching circuit of a power conversion device of this embodiment, and is a circuit configuration (modification) in which the capacitor switching circuit of FIG. 2 is combined with the capacitor switching circuit 103 of FIG.

[0097] As shown in FIG. 14, the capacitor switching circuit of this embodiment includes a third capacitor C3 different from the first capacitor C1 and the second capacitor C2, and a second semiconductor switch S2 different from the first semiconductor switch S1. The third capacitor C3 is connected in series with each of the first capacitor C1 and the second capacitor C2, and is connected in parallel with the second semiconductor switch S2.

[0098] As in this embodiment, by combining a series-connected capacitor switching circuit and a parallel-connected capacitor switching circuit, the capacitor (gain) can be switched between three or more values. EXAMPLES

[0099] Eighth embodiment A power conversion device and a control method thereof according to an eighth embodiment of the present invention will be described with reference to FIG.

[0100] FIG. 15 is a diagram showing a capacitor switching circuit of a power conversion device of this embodiment, and is a circuit configuration (modification) in which a plurality of capacitor switching circuits 103 of FIG. 1 are combined.

[0101] As shown in FIG. 15, the capacitor switching circuit of this embodiment includes a third capacitor C3 different from the first capacitor C1 and the second capacitor C2, and a second semiconductor switch S2 different from the first semiconductor switch S1. The third capacitor C3 is connected in parallel with each of the first capacitor C1 and the second capacitor C2, and is connected in series with the second semiconductor switch S2.

[0102] As in this embodiment, by combining capacitor switching circuits in multiple stages, it is possible to switch the capacitor (gain) between three or more values. EXAMPLES

[0103] Ninth embodiment A power conversion device and a control method thereof according to a ninth embodiment of the present invention will be described with reference to FIG.

[0104] FIG. 16 is a diagram showing a capacitor switching circuit of a power conversion device of this embodiment, and is a circuit configuration (modification) in which a plurality of the capacitor switching circuits of FIG. 2 are combined in series.

[0105] As in this embodiment, by combining a plurality of capacitor switching circuits in series, it is possible to switch the capacitor (gain) between three or more values. EXAMPLES

[0106] A power conversion device and a control method thereof according to a tenth embodiment of the present invention will be described with reference to FIG.

[0107] FIG. 17 is a diagram showing waveforms during capacitor switching control of the power conversion device of this embodiment.

[0108] As shown in FIG. 17, the power conversion device of this embodiment performs control with reference to the output voltage V2.

[0109] When the second DC voltage (output voltage V2) is lower than a predetermined value, the second DC voltage (output voltage V2) is controlled to be increased.

[0110] By referring to the output voltage V2, the same effects as those of the first embodiment can be obtained with respect to output voltage fluctuations and load fluctuations.

[0111] The present invention is not limited to the above-described embodiments, and includes various modified examples. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the configurations described. It is also possible to replace a part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. It is also possible to add, delete, or replace a part of the configuration of each embodiment with another configuration. [Explanation of symbols]

[0112] 101...Primary circuit (of phase shift converter) 102…Secondary side circuit 103... Capacitor switching circuit C1, C2, C3, C101, C102... Capacitors D1, D2, D101...Diodes L1, L2: Inductors S1~S4, S101...Semiconductor switches Tr1: Transformer V1: Input voltage V2…Output voltage.

Claims

1. A power conversion device that converts a first DC voltage supplied from a DC power source into a second DC voltage via a bridge circuit, a transformer, and a rectifier circuit, a first capacitor provided between the bridge circuit and the transformer; a second capacitor provided in parallel or in series with the first capacitor; a first semiconductor switch provided in parallel or in series with the first capacitor; a voltage control means for adjusting the amount of phase shift of the elements constituting the bridge circuit by switching; A power conversion device comprising:

2. The power conversion device according to claim 1, the second capacitor is connected in parallel with the first capacitor; The first semiconductor switch is connected in parallel with the first capacitor and in series with the second capacitor.

3. The power conversion device according to claim 1, the second capacitor is connected in series with the first capacitor; The first semiconductor switch is connected in series with the first capacitor and in parallel with the second capacitor.

4. The power conversion device according to claim 2 or 3, When the first DC voltage is lower than a predetermined value, the first semiconductor switch is turned off to control the second DC voltage by switching the bridge circuit; When the first DC voltage is equal to or higher than a predetermined value, the power conversion device turns on the first semiconductor switch to expand the second DC voltage range by switching the bridge circuit.

5. The power conversion device according to claim 2, The power conversion device switches on the first semiconductor switch when the voltage of the first capacitor is at a maximum.

6. The power conversion device according to claim 3, A power conversion device that switches on the first semiconductor switch when the voltage of the second capacitor is 0V.

7. The power conversion device according to claim 5 or 6, a power conversion device that, when the peak voltage of the first capacitor becomes smaller than the voltage of the second capacitor, increases the on-time of the bridge circuit to increase the voltage of the first capacitor, and switches on the first semiconductor switch when the voltage of the first capacitor matches the voltage of the second capacitor.

8. The power conversion device according to claim 4, The power conversion device suppresses voltage fluctuations by performing feedforward control on an output voltage control system of the bridge circuit when the first semiconductor switch is switched on and off.

9. The power conversion device according to claim 4, The power conversion device switches the first semiconductor switch to adjust the duty ratio to continuously change the gain.

10. The power conversion device according to claim 1, a third capacitor different from the first capacitor and the second capacitor; a second semiconductor switch different from the first semiconductor switch; The third capacitor is connected in series with each of the first capacitor and the second capacitor, and is connected in parallel with the second semiconductor switch.

11. The power conversion device according to claim 1, a third capacitor different from the first capacitor and the second capacitor; a second semiconductor switch different from the first semiconductor switch; The third capacitor is connected in parallel with each of the first capacitor and the second capacitor, and is connected in series with the second semiconductor switch.

12. The power conversion device according to claim 4, The power conversion device increases the second DC voltage when the second DC voltage is lower than a predetermined value.

13. A method for controlling a power conversion device according to claim 1, When the first DC voltage is lower than a predetermined value, the first semiconductor switch is turned off to control the second DC voltage by switching the bridge circuit; A control method for a power conversion device, comprising turning on the first semiconductor switch when the first DC voltage is equal to or higher than a predetermined value, and expanding the second DC voltage range by switching the bridge circuit.

Citation Information

Patent Citations

  • Data transfer device

    JP1985033649A