Semiconductor device

Abstract

To provide a transistor with low variation, high reliability, and stable electrical characteristics, even with a microscopic structure, and to achieve high performance and high reliability in semiconductor devices including such transistors.SOLUTION: An insulator is formed on a substrate, an aperture is formed in the insulator, and after an oxide semiconductor is formed in the aperture, a portion of the insulator is removed to expose the side of the oxide semiconductor.SELECTED DRAWING: Figure 11

Description

Technical Field

[0001] The present invention relates to, for example, transistors, semiconductor devices, and methods for manufacturing them. . Alternatively, the present invention relates to, for example, display devices, light-emitting devices, lighting devices, power storage devices, memory devices, processors, imaging devices, and electronic devices. Alternatively, it relates to oxides, display devices, liquid crystal display devices, light-emitting devices, memory devices, processors, imaging devices, and methods for manufacturing electronic devices. Alternatively, it relates to driving methods for semiconductor devices, display devices, liquid crystal display devices, light-emitting devices, memory devices, processors, imaging devices, and electronic devices.

[0002] Note that one aspect of the present invention is not limited to the above technical fields. The technical field of one aspect of the invention disclosed in this specification etc. relates to an article, a method, or a manufacturing method. Alternatively, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition (composition of matter).

[0003] Note that in this specification etc., the semiconductor device generally refers to all devices that can function by utilizing semiconductor characteristics. Display devices, light-emitting devices, lighting devices, electro-optical devices, semiconductor circuits, and electronic devices may have a semiconductor device.

Background Art

[0004] Techniques for constructing transistors using semiconductors on a substrate having an insulating surface have been attracting attention. Such transistors are widely applied to semiconductor devices such as integrated circuits and display devices. Silicon is known as a semiconductor applicable to transistors.

[0005] Silicon used for the semiconductor of a transistor is amorphous silicon and polycrystalline silicon depending on the application. There are cases where they may be used separately. For example, when applied to transistors constituting a large display device, it is preferable to use amorphous silicon for which film formation technology on a large-area substrate has been established. On the other hand, when applied to transistors constituting a high-functional display device in which a drive circuit is integrally formed, it is preferable to use polycrystalline silicon capable of fabricating transistors having high field-effect mobility. Polycrystalline silicon is known to be formed by performing heat treatment at high temperature or laser light treatment on amorphous silicon. In recent years, the development of transistors using oxide semiconductors (typically In-Ga-Zn oxide) has been active. The history of oxide semiconductors is long. In 1988, it was disclosed to use crystalline In-Ga-Zn oxide for semiconductor elements (see Patent Document 1). Also, in 1995, a transistor using an oxide semiconductor was invented and its electrical characteristics were disclosed (see Patent Document 2).

[0006] In addition, transistors using amorphous oxide semiconductors have been disclosed (see Patent Document 3). Since oxide semiconductors can be formed into films using sputtering methods and the like, they can be used as the semiconductor of transistors constituting a large display device.

[0007] Moreover, transistors using oxide semiconductors have high field-effect mobility, so that a high-functional display device in which a drive circuit is integrally formed can be realized. In addition, since it is possible to use a part of the production equipment of transistors using amorphous silicon after improvement, there is also an advantage of suppressing capital investment.

[0008]

[0009] ​​​​​​​​As a result of recent research and development, it has been revealed that the use of a crystalline oxide semiconductor improves the reliability of transistors as compared with the case of using an amorphous oxide semiconductor (Non Patent Document 1).

[0010] In addition, it is disclosed that a transistor having a high field-effect mobility can be obtained by forming a well-type potential in an active layer made of an oxide semiconductor (see Patent Document 4). Also, it is known that a transistor using an oxide semiconductor has an extremely small leakage current in the non-conducting state. For example, a low-power consumption CPU etc. applying the characteristic of low leakage current of a transistor using an oxide semiconductor is disclosed (see Patent Document 5).

[0011] In addition, semiconductor devices are being miniaturized year by year according to the scaling law. For example, miniaturization is being carried out by making the channel length (gate line width) thinner or the film thickness of the gate insulator thinner. Therefore, it is difficult and limited to miniaturize semiconductor devices depending on the performance of devices such as exposure apparatuses and film forming apparatuses. Therefore, in recent years, scaling has been advanced by an approach from processes such as double patterning processing that does not rely on the performance of exposure apparatuses.

[0012] On the other hand, even if the transistor size can be simply reduced, the power supply voltage cannot be scaled, so the short-channel effect etc. becomes prominent, and in a transistor, deterioration of electrical characteristics such as a decrease in threshold voltage occurs. Therefore, structures in which the semiconductor layer of a transistor is surrounded by the electric field of a gate, such as FIN-type transistors and GAA-type transistors, have been proposed. ​​​​​​​​​​​​​. For example, the FIN type transistor not only has high controllability of the channel by the gate, but also since the channel is also formed on the side surface of the semiconductor layer, the effective channel width can be increased with respect to the width of the semiconductor layer. However, since the minimum value of the width in the semiconductor layer is determined by the performance of the exposure apparatus, there is a problem that it is difficult to proceed with miniaturization.

[0013] In addition, with the progress of miniaturization, it becomes difficult to accurately process the shape, and there is a problem that the variation in the electrical characteristics of each transistor in the semiconductor device also increases.

Prior Art Documents

Patent Documents

[0014]

Patent Document 1

Patent Document 2

Patent Document 3

Patent Document 4

Patent Document 5

Non-Patent Documents

[0015]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0016] Therefore, one aspect of the disclosed invention is to provide a transistor that can be miniaturized as one of the problems. Or, to provide a transistor with a small parasitic capacitance as one of the problems. Or, to provide a transistor with a high operating frequency as one of the problems. Or, to provide a transistor having stable electrical characteristics as one of the problems. Or, one aspect of the disclosed invention is to provide a transistor whose channel length can be easily controlled as one of the problems. Or, one aspect of the disclosed invention is to provide a transistor with a large on-current as one of the problems. Or, to provide a transistor with a small parasitic capacitance as one of the problems. Also, or, to provide a transistor with a high operating frequency as one of the problems. Also, or, to provide a transistor having stable electrical characteristics as one of the problems. Also, one aspect of the disclosed invention is to provide a transistor whose channel length can be easily controlled as one of the problems. Or, one aspect of the disclosed invention is to provide a transistor with a large on-current as one of the problems.

[0017] Also, in a semiconductor device including the transistor, it is also one of the problems to achieve high integration, high performance, high reliability, and high productivity. Or, to provide a novel semiconductor device as one of the problems. Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be naturally apparent from the descriptions in the specification, drawings, claims, etc., and it is possible to extract other problems from the descriptions in the specification, drawings, claims, etc. Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be naturally apparent from the descriptions in the specification, drawings, claims, etc., and it is possible to extract other problems from the descriptions in the specification, drawings, claims, etc. and it is possible to extract other problems from the descriptions in the specification, drawings, claims, etc. .

Means for Solving the Problems

[0018] One aspect of the present invention forms a first insulator on a substrate, forms an opening in the first insulator, forms an oxide semiconductor in the opening, removes a part of the first insulator, exposes the side surface of the oxide semiconductor, forms a first conductor and a second conductor on the oxide semiconductor, the first conductor, the second conductor, the first conductor, the second conductor, expose the side surface of the oxide semiconductor, form a first conductor and a second conductor on the oxide semiconductor, the first conductor, the second Form a first insulator on a substrate, form an opening in the first insulator, form an oxide semiconductor along the inner wall of the opening, remove a part of the first insulator to expose the side surface of the oxide semiconductor, form a first conductor and a second conductor on the oxide semiconductor, form a second insulator on the first conductor, the second conductor, and the oxide semiconductor, and form a third conductor on the second insulator. Form a third conductor.

[0019] One aspect of the present invention is to form a first insulator on a substrate, form an opening in the first insulator, form an oxide semiconductor along the inner wall of the opening, remove a part of the first insulator to expose the side surface of the oxide semiconductor, form a first conductor and a second conductor on the oxide semiconductor, form a second insulator on the first conductor, the second conductor, and the oxide semiconductor, and form a third conductor on the second insulator. Form an oxide semiconductor along the inner wall of the opening, remove a part of the first insulator to expose the side surface of the oxide semiconductor, form a first conductor and a second conductor on the oxide semiconductor, form a second insulator on the first conductor, the second conductor, and the oxide semiconductor, and form a third conductor on the second insulator. Expose the side surface of the oxide semiconductor, form a first conductor and a second conductor on the oxide semiconductor, form a second insulator on the first conductor, the second conductor, and the oxide semiconductor, and form a third conductor on the second insulator. Form a second insulator on the first conductor, the second conductor, and the oxide semiconductor, and form a third conductor on the second insulator. Form a third conductor on the second insulator.

[0020] In the above configuration, a part of the oxide semiconductor is embedded in the first insulator.

[0021] One aspect of the present invention is to form a first insulator on a substrate, form an opening in the first insulator, form a first oxide semiconductor along the inner wall of the opening, remove a part of the first oxide semiconductor to form an island-shaped second oxide semiconductor and an island-shaped third oxide semiconductor, form a first conductor and a second conductor on the second oxide semiconductor and the third oxide semiconductor, form a second insulator on the first conductor, the second conductor, the second oxide semiconductor, and the third oxide semiconductor, and form a third conductor on the second insulator. Form a first oxide semiconductor along the inner wall of the opening, remove a part of the first oxide semiconductor to form an island-shaped second oxide semiconductor and an island-shaped third oxide semiconductor, form a first conductor and a second conductor on the second oxide semiconductor and the third oxide semiconductor, form a second insulator on the first conductor, the second conductor, the second oxide semiconductor, and the third oxide semiconductor, and form a third conductor on the second insulator. Remove a part of the first oxide semiconductor to form an island-shaped second oxide semiconductor and an island-shaped third oxide semiconductor, form a first conductor and a second conductor on the second oxide semiconductor and the third oxide semiconductor, form a second insulator on the first conductor, the second conductor, the second oxide semiconductor, and the third oxide semiconductor, and form a third conductor on the second insulator. Form a first conductor and a second conductor on the second oxide semiconductor and the third oxide semiconductor, form a second insulator on the first conductor, the second conductor, the second oxide semiconductor, and the third oxide semiconductor, and form a third conductor on the second insulator. Form a second insulator on the first conductor, the second conductor, the second oxide semiconductor, and the third oxide semiconductor, and form a third conductor on the second insulator. Form a third conductor on the second insulator.

[0022] One aspect of the present invention is to form a first insulator on a substrate, form an opening in the first insulator, form a first oxide semiconductor along the inner wall of the opening, remove a part of the first oxide semiconductor to form an annular second oxide semiconductor, form a second insulator on the second oxide semiconductor, remove a part of the second oxide semiconductor to form an island-shaped third oxide semiconductor and an island-shaped fourth oxide semiconductor. Form a first oxide semiconductor along the inner wall of the opening, remove a part of the first oxide semiconductor to form an annular second oxide semiconductor, form a second insulator on the second oxide semiconductor, remove a part of the second oxide semiconductor to form an island-shaped third oxide semiconductor and an island-shaped fourth oxide semiconductor. Remove a part of the first oxide semiconductor to form an annular second oxide semiconductor, form a second insulator on the second oxide semiconductor, remove a part of the second oxide semiconductor to form an island-shaped third oxide semiconductor and an island-shaped fourth oxide semiconductor. Form a second insulator on the second oxide semiconductor, remove a part of the second oxide semiconductor to form an island-shaped third oxide semiconductor and an island-shaped fourth oxide semiconductor. A semiconductor is formed, a part of the first insulator and the second insulator is removed, and the side surfaces of the third oxide semiconductor and the fourth oxide semiconductor are exposed, and a first conductor and a second conductor are formed on the third oxide semiconductor and the fourth oxide semiconductor, and a third insulator is formed on the first conductor, the second conductor, the third oxide semiconductor and the fourth oxide semiconductor, and a third conductor is formed on the third insulator. A third insulator is formed on the first conductor, the second conductor, the third oxide semiconductor and the fourth oxide semiconductor, and a third conductor is formed on the third insulator. Form a third conductor.

[0023] One aspect of the present invention has a first insulator, a second insulator, an oxide semiconductor, a first conductor , a second conductor, and a third conductor on a substrate, and the oxide semiconductor is embedded in the first insulator, and the first conductor and the first insulator are in contact at a first interface, and the second conductor and the first insulator are in contact at a second interface, and the first interface and the second interface are lower than the upper surface of the oxide semiconductor, and the first interface and the second interface are higher than the bottom surface of the oxide semiconductor. The first insulator is in contact with the first insulator at a second interface, and the first interface and the second interface are lower than the upper surface of the oxide semiconductor, and the first interface and the second interface are higher than the bottom surface of the oxide semiconductor. The first interface and the second interface are lower than the upper surface of the oxide semiconductor, and the first interface and the second interface are higher than the bottom surface of the oxide semiconductor. Higher.

[0024] One aspect of the present invention has a first insulator on a substrate, has an oxide semiconductor on the first insulator, has a first conductor and a second conductor on the oxide semiconductor, and has a second insulator on the oxide semiconductor, has a third conductor on the second insulator, and a part of the oxide semiconductor is embedded in the first insulator, and the first conductor and the first insulator are in contact at a first interface, and the second conductor and the first insulator are in contact at a second interface, and the first interface and the second interface are lower than the upper surface of the oxide semiconductor, and the first interface and the second interface are higher than the bottom surface of the oxide semiconductor. Embedded in the first insulator, the first conductor and the first insulator are in contact at a first interface, and the second conductor and the first insulator are in contact at a second interface, and the first interface and the second interface are lower than the upper surface of the oxide semiconductor, and the first interface and the second interface are higher than the bottom surface of the oxide semiconductor. The first interface and the second interface are lower than the upper surface of the oxide semiconductor, and the first interface and the second interface are higher than the bottom surface of the oxide semiconductor. Higher.

Advantages of the Invention

[0025] By using the present invention, even for a fine structure, variations in characteristics between transistors can be reduced. A transistor can be provided. Or, a transistor with a small parasitic capacitance can be provided. Or, a transistor with a high operating frequency can be provided. Also, a transistor having stable electrical characteristics can be provided. Further, one aspect of the disclosed invention can provide a transistor with a large on-current.

[0026] By using the present invention, a fine transistor can be provided without complicating the manufacturing process. Therefore, the yield can be improved also from the viewpoint of mass production. Also, in the configuration of the transistor, the size of the channel width can be easily controlled. .

[0027] Furthermore, by adopting a structure in which a region serving as a channel of an oxide semiconductor is in contact with an insulator containing oxygen, oxygen can be supplied to the oxide semiconductor. By compensating for oxygen deficiencies in the supplied oxygen in the oxide semiconductor, the reliability of a transistor using the oxide semiconductor can be enhanced.

[0028] With the above configuration, even for a fine structure, a transistor having highly stable electrical characteristics can be provided. Also, the yield in mass production is improved, and the production cost can be reduced.

[0029] Also, in a semiconductor device including the transistor, high performance, high reliability, and high productivity can be achieved. Or, a novel semiconductor device or the like can be provided. Note that the description of these effects does not preclude the existence of other effects. Note that one ​​Aspects do not necessarily have all of these effects. Other effects will become apparent from the descriptions in the specification, drawings, claims, etc., and it is possible to extract other effects from the descriptions in the specification, drawings, claims, etc.

Brief Description of Drawings

[0030]

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Embodiments for Carrying Out the Invention

[0031] Hereinafter, embodiments will be described with reference to the drawings. However, the embodiments can be implemented in many different ways, and it will be easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and its scope. Therefore, the present invention is not to be construed as limited to the description content of the following embodiments.

[0032] In the drawings, there are cases where the size, layer thickness, or area is exaggerated for clarity. Therefore, it is not necessarily limited to that scale. The drawings are schematic illustrations of ideal examples and are not limited to the shapes or values shown in the drawings. Also, in the drawings, the same reference numerals are commonly used for the same parts or parts having similar functions among different drawings, and the repeated description thereof is omitted. Also, when referring to similar functions, the hatching patterns are the same, and there may be cases where they are not particularly labeled. In addition, in this specification and the like, ordinal numbers such as first, second, etc. are used for convenience and do not indicate the process order or stacking order. Therefore, for example, "first" can be appropriately replaced with "second" or "third" and described. Also, there may be cases where the ordinal numbers described in this specification and the like do not match the ordinal numbers used to specify an aspect of the present invention. In addition, in this specification and the like, terms indicating arrangements such as "above" and "below" are used for convenience in explaining the positional relationship between the components with reference to the drawings. Also, the positional relationship between the components changes appropriately according to the direction in which each component is depicted. Therefore, it is not limited to the terms described in the specification and can be appropriately rephrased according to the situation. In addition, in this specification and the like, the semiconductor device refers to all devices that can function by utilizing semiconductor characteristics. Semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and storage devices are aspects of semiconductor devices. Imaging devices, display devices, liquid crystal display devices, light-emitting devices, electrical devices, etc.

[0033]

[0034]

[0035] ​​​​​​​​​​​​​Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices may have semiconductor devices.

[0036] Also, in this specification and the like, a transistor is an element having at least three terminals including a gate, a drain, and a source. And there is a channel formation region between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode), and current can flow through the drain, the channel formation region, and the source. Note that in this specification and the like, the channel formation region refers to the region where current mainly flows.

[0037] Also, the functions of the source and drain may be interchanged when transistors with different polarities are employed or when the direction of current changes during circuit operation. Therefore, in this specification and the like, the terms source and drain can be used interchangeably.

[0038] Note that in this specification and the like, a silicon oxynitride film has a composition in which the oxygen content is higher than the nitrogen content, preferably oxygen is 55 atomic % or more and 65 atomic % or less, nitrogen is 1 atomic % or more and 20 atomic % or less, silicon is 25 atomic % or more and 35 atomic % or less, and hydrogen is 0.1 atomic % or more and 10 atomic % or less. Also, a silicon nitride oxide film has a composition in which the nitrogen content is higher than the oxygen content, preferably nitrogen is 55 atomic % or more and 65 atomic % or less, oxygen is 1 atomic % or more and 20 atomic % or less, silicon is 25 atomic % or more and 35 atomic % or less, and hydrogen is 0.1 atomic % or more and 10 atomic % or less. ​​​​​​​​​​​​​​​​

[0039] Also, in this specification and the like, the term "film" and the term "layer" can be interchanged with each other. For example, the term "conductive layer" may be changed to the term "conductive film". Or, for example, the term "insulating layer" may be changed to the term "insulating film".

[0040] Also, in this specification and the like, "parallel" means a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Also, "substantially parallel" means a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. Also, "perpendicular" means a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also

[0041] included. Also, "substantially perpendicular" means a state in which two straight lines are arranged at an angle of 60° or more and 120° or less. For example, in this specification and the like, when it is explicitly described that X and Y are connected, it is assumed that what is disclosed in this specification and the like includes the case where X and Y are electrically connected, the case where X and Y are functionally connected, and the case where X and Y are directly connected.

[0042] Here, it is assumed that X and Y are objects (for example, devices, elements, circuits, wiring, electrodes, terminals, conductors, layers, etc.).

[0043] As an example of the case where X and Y are directly connected, when an element that enables the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) is not connected between X and Y, and X and Y are connected without passing through an element that enables the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.). As an example of the case where X and Y are directly connected, when an element that enables the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) is not connected between X and Y, and X and Y are connected without passing through an element that enables the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.). As an example of the case where X and Y are directly connected, when an element that enables the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) is not connected between X and Y, and X and Y are connected without passing through an element that enables the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.). As an example of the case where X and Y are directly connected, when an element that enables the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) is not connected between X and Y, and X and Y are connected without passing through an element that enables the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.). As an example of the case where X and Y are directly connected, when an element that enables the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) is not connected between X and Y, and X and Y are connected without passing through an element that enables the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.). As an example of the case where X and Y are directly connected, when an element that enables the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) is not connected between X and Y, and X and Y are connected without passing through an element that enables the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.).

[0044] As an example of the case where X and Y are electrically connected, one or more elements that enable the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) can be connected between X and Y. Note that the switch has a function of controlling on / off. That is, the switch can be in a conductive state (on state) or a non-conductive state (off state), and has a function of controlling whether to allow current to flow or not. Or, the switch has a function of selecting and switching the path through which the current flows. When X and Y are electrically connected, it shall include the case where X and Y are directly connected. As an example of the case where X and Y are electrically connected, one or more elements that enable the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) can be connected between X and Y. Note that the switch has a function of controlling on / off. That is, the switch can be in a conductive state (on state) or a non-conductive state (off state), and has a function of controlling whether to allow current to flow or not. Or, the switch has a function of selecting and switching the path through which the current flows. When X and Y are electrically connected, it shall include the case where X and Y are directly connected. As an example of the case where X and Y are electrically connected, one or more elements that enable the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) can be connected between X and Y. Note that the switch has a function of controlling on / off. That is, the switch can be in a conductive state (on state) or a non-conductive state (off state), and has a function of controlling whether to allow current to flow or not. Or, the switch has a function of selecting and switching the path through which the current flows. When X and Y are electrically connected, it shall include the case where X and Y are directly connected. As an example of the case where X and Y are electrically connected, one or more elements that enable the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) can be connected between X and Y. Note that the switch has a function of controlling on / off. That is, the switch can be in a conductive state (on state) or a non-conductive state (off state), and has a function of controlling whether to allow current to flow or not. Or, the switch has a function of selecting and switching the path through which the current flows. When X and Y are electrically connected, it shall include the case where X and Y are directly connected. As an example of the case where X and Y are electrically connected, one or more elements that enable the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) can be connected between X and Y. Note that the switch has a function of controlling on / off. That is, the switch can be in a conductive state (on state) or a non-conductive state (off state), and has a function of controlling whether to allow current to flow or not. Or, the switch has a function of selecting and switching the path through which the current flows. When X and Y are electrically connected, it shall include the case where X and Y are directly connected. As an example of the case where X and Y are electrically connected, one or more elements that enable the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) can be connected between X and Y. Note that the switch has a function of controlling on / off. That is, the switch can be in a conductive state (on state) or a non-conductive state (off state), and has a function of controlling whether to allow current to flow or not. Or, the switch has a function of selecting and switching the path through which the current flows. When X and Y are electrically connected, it shall include the case where X and Y are directly connected. As an example of the case where X and Y are electrically connected, one or more elements that enable the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) can be connected between X and Y. Note that the switch has a function of controlling on / off. That is, the switch can be in a conductive state (on state) or a non-conductive state (off state), and has a function of controlling whether to allow current to flow or not. Or, the switch has a function of selecting and switching the path through which the current flows. When X and Y are electrically connected, it shall include the case where X and Y are directly connected. As an example of the case where X and Y are electrically connected, one or more elements that enable the electrical connection between X and Y (for example, a switch, transistor, capacitor, inductor, resistor, diode, display element, light-emitting element, load, etc.) can be connected between X and Y. Note that the switch has a function of controlling on / off. That is, the switch can be in a conductive state (on state) or a non-conductive state (off state), and has a function of controlling whether to allow current to flow or not. Or, the switch has a function of selecting and switching the path through which the current flows. When X and Y are electrically connected, it shall include the case where X and Y are directly connected.

[0045] As an example of the case where X and Y are functionally connected, a circuit that enables the functional connection between X and Y (for example, a logic circuit (inverter, NAND circuit, NOR circuit, etc.), a signal conversion circuit (DA conversion circuit, AD conversion circuit, gamma correction circuit, etc.), a potential level conversion circuit (a power supply circuit (boost circuit, buck circuit, etc.), a level shifter circuit that changes the potential level of a signal, etc.)) As an example of the case where X and Y are functionally connected, a circuit that enables the functional connection between X and Y (for example, a logic circuit (inverter, NAND circuit, NOR circuit, etc.), a signal conversion circuit (DA conversion circuit, AD conversion circuit, gamma correction circuit, etc.), a potential level conversion circuit (a power supply circuit (boost circuit, buck circuit, etc.), a level shifter circuit that changes the potential level of a signal, etc.)) As an example of the case where X and Y are functionally connected, a circuit that enables the functional connection between X and Y (for example, a logic circuit (inverter, NAND circuit, NOR circuit, etc.), a signal conversion circuit (DA conversion circuit, AD conversion circuit, gamma correction circuit, etc.), a potential level conversion circuit (a power supply circuit (boost circuit, buck circuit, etc.), a level shifter circuit that changes the potential level of a signal, etc.)) As an example of the case where X and Y are functionally connected, a circuit that enables the functional connection between X and Y (for example, a logic circuit (inverter, NAND circuit, NOR circuit, etc.), a signal conversion circuit (DA conversion circuit, AD conversion circuit, gamma correction circuit, etc.), a potential level conversion circuit (a power supply circuit (boost circuit, buck circuit, etc.), a level shifter circuit that changes the potential level of a signal, etc.)) , a voltage source, a current source, a switching circuit, an amplifying circuit (a circuit that can increase the signal amplitude or current amount, such as an operational amplifier, a differential amplifying circuit, a source follower circuit, a buffer circuit, etc.), a signal generating circuit, a memory circuit, a control circuit, etc.) can be connected between X and Y by one or more. It should be noted that, as an example, even if another circuit is sandwiched between X and Y, when the signal output from X is transmitted to Y, X and Y are considered to be functionally connected. In addition, when X and Y are functionally connected, it includes the case where X and Y are directly connected and the case where X and Y are electrically connected.

[0046] In addition, when it is explicitly described that X and Y are electrically connected, the case where X and Y are electrically connected (that is, connected with another element or another circuit sandwiched between X and Y ), the case where X and Y are functionally connected (that is, functionally connected with another circuit sandwiched between X and Y ), and the case where X and Y are directly connected (that is, connected without another element or another circuit sandwiched between X and Y ) are disclosed in this specification and the like. That is, when it is explicitly described as being electrically connected, it is considered that the same content as when it is only explicitly described as being connected is disclosed in this specification and the like.

[0047] In addition, for example, when the source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 (or without passing through), and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z 2 (or without passing through), or when the source of the transistor ​​​​​(or the first terminal, etc.) is directly connected to a part of Z1, and another part of Z1 is directly connected to X, and the drain of the transistor (or the second terminal, etc.) is directly connected to a part of Z2, and another part of Z2 is directly connected to Y, then it can be expressed as follows.

[0048] For example, it can be expressed as "X, Y, the source of the transistor (or the first terminal, etc.), and the drain (or the second terminal, etc.) are electrically connected to each other, and they are electrically connected in the order of X, the source of the transistor (or the first terminal, etc.), the drain of the transistor (or the second terminal, etc.), Y." Or, it can be expressed as "The source of the transistor (or the first terminal, etc.) is electrically connected to X, the drain of the transistor (or the second terminal, etc.) is electrically connected to Y, and X, the source of the transistor (or the first terminal, etc.), the drain of the transistor (or the second terminal, etc.), Y are electrically connected in this order." Or, it can be expressed as "X is electrically connected to Y through the source of the transistor (or the first terminal, etc.) and the drain (or the second terminal, etc.), and X, the source of the transistor (or the first terminal, etc.), the drain of the transistor (or the second terminal, etc.), Y are provided in this connection order." By using the same expression methods as these examples to define the connection order in the circuit configuration, the source of the transistor (or the first terminal, etc.) and the drain (or the second terminal, etc.) can be distinguished to determine the technical scope. Or, as another expression method, for example, "The source of the transistor (or the first terminal, etc.) ... ...

[0049] ... is electrically connected to X via at least a first connection path, and the first connection path does not have a second connection path, and the second connection path is a path between the source (or the first terminal, etc.) of the transistor and the drain (or the second terminal, etc.) of the transistor via the transistor, and the first connection path is a path via Z1, and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via at least a third connection path, and the third connection path does not have the second connection path, and the third connection path is a path via Z2. It can be expressed as, "Or, the source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first connection path, and the first connection path does not have a second connection path, and the second connection path has a connection path via the transistor, and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third connection path, and the third connection path does not have the second connection path." It can be expressed as, "Or, the source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first electrical path, and the first electrical path does not have a second electrical path, and the second electrical path is an electrical path from the source (or the first terminal, etc.) of the transistor to the drain (or the second terminal, etc.) of the transistor, and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third electrical path, and the third electrical path does not have the second electrical path." connection path is a path via Z2. It can be expressed as, "Or, the source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first connection path, and the first connection path does not have a second connection path, and the second connection path has a connection path via the transistor, and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third connection path, and the third connection path does not have the second connection path." It can be expressed as, "Or, the source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first electrical path, and the first electrical path does not have a second electrical path, and the second electrical path is an electrical path from the source (or the first terminal, etc.) of the transistor to the drain (or the second terminal, etc.) of the transistor, and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third electrical path, and the third electrical path does not have the second electrical path." connection path is a path via Z2. It can be expressed as, "Or, the source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first connection path, and the first connection path does not have a second connection path, and the second connection path has a connection path via the transistor, and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third connection path, and the third connection path does not have the second connection path." It can be expressed as, "Or, the source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first electrical path, and the first electrical path does not have a second electrical path, and the second electrical path is an electrical path from the source (or the first terminal, etc.) of the transistor to the drain (or the second terminal, etc.) of the transistor, and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third electrical path, and the third electrical path does not have the second electrical path." connection path is a path via Z2. It can be expressed as, "Or, the source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first connection path, and the first connection path does not have a second connection path, and the second connection path has a connection path via the transistor, and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third connection path, and the third connection path does not have the second connection path." It can be expressed as, "Or, the source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first electrical path, and the first electrical path does not have a second electrical path, and the second electrical path is an electrical path from the source (or the first terminal, etc.) of the transistor to the drain (or the second terminal, etc.) of the transistor, and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third electrical path, and the third electrical path does not have the second electrical path." connection path is a path via Z2. It can be expressed as, "Or, the source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first connection path, and the first connection path does not have a second connection path, and the second connection path has a connection path via the transistor, and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third connection path, and the third connection path does not have the second connection path." It can be expressed as, "Or, the source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first electrical path, and the first electrical path does not have a second electrical path, and the second electrical path is an electrical path from the source (or the first terminal, etc.) of the transistor to the drain (or the second terminal, etc.) of the transistor, and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least a third electrical path, and the third electrical path does not have the second electrical path." connection path is a path via Z2. It can be expressed as, "Or, the source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least a first connection path, and the first connection path does not have a second connection path, and does not have a fourth electrical path, where the fourth electrical path is an electrical path from the drain of the transistor (or the second terminal, etc.) to the source of the transistor (or the first terminal, etc.).」 It can be expressed as. Using an expression method similar to these examples, by defining the connection path in the circuit configuration , it is possible to distinguish between the source of the transistor (or the first terminal etc.) and the drain (or the second terminal, etc.), and determine the technical scope. It is possible.

[0050] Note that these expression methods are just examples and are not limited to these expression methods. Here, X , Y, Z1, and Z2 are assumed to be objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductors, layers, etc.).

[0051] Note that even if components that are independent on the circuit diagram are shown as being electrically connected, there may be a case where one component has the functions of multiple components. For example, when a part of the wiring also functions as an electrode, one conductor has the functions of both the wiring and the electrode. Therefore, the electrical connection in this specification includes such a case where one conductor has the functions of multiple components in its scope.

[0052] (Embodiment 1) <Configuration Example 1 of Semiconductor Device> In this embodiment, an example of the configuration and manufacturing method of a semiconductor device will be described with reference to FIGS. 1 to 16.

[0053] (Manufacturing Method 1 of Semiconductor Device) An example of the manufacturing method of a semiconductor device will be described below with reference to FIGS. 1 to 11. Note that FIG. 1​​​​ (A) shows an example of a top view. Also, FIGS. 1(B) and 1(C) are cross-sectional views corresponding to the one-dot chain lines X1-X2 and Y1-Y2 shown in FIG. 1(A). The same shall apply to FIGS. 2 to 11.

[0054] First, a substrate 190 is prepared. There is no major limitation on the substrate that can be used as the substrate 190, but it is preferably at least heat-resistant enough to withstand subsequent heat treatment. For example, glass substrates such as barium borosilicate glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, sapphire substrates, etc. can be used. Also, single-crystal semiconductor substrates made of silicon or silicon carbide, polycrystalline semiconductor substrates, silicon germanium, compound semiconductor substrates made of gallium arsenide, indium arsenide, indium gallium arsenide, SOI (Silicon On Insulator) substrates, GOI (Germanium on Insulator) substrates, etc. can also be applied, and those with semiconductor elements provided thereon can be used as the substrate.

[0055] Also, a semiconductor device may be manufactured using a flexible substrate as the substrate. To manufacture a flexible semiconductor device, transistors may be directly manufactured on the flexible substrate, or transistors may be manufactured on another manufacturing substrate and then peeled off and transferred to the flexible substrate. In addition, in order to peel off and transfer from the manufacturing substrate to the flexible substrate, a peeling layer may be provided between the manufacturing substrate and the transistor including an oxide semiconductor.

[0056] Next, as shown in FIGS. 1(A), 1(B), and 1(C), an insulator 110, an insulator 120A, and a resist mask 191 are formed. ​​​​​​​​​​​​​​​

[0057] First, an insulator 110 and an insulator 120A are formed on a substrate 190. In this embodiment, a two-layer structure composed of the insulator 110 and the insulator 120A is adopted. However, it is not necessary to form a laminated structure, and at least the insulator 120A may be formed. Also, a laminated structure of three or more layers may be used. The insulator 110 and the insulator 120A may be, for example, a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, an aluminum oxynitride film, an aluminum nitride oxide film, a hafnium oxide film, a hafnium oxynitride film, a zirconium oxide film, a zirconium oxynitride film, a yttrium oxide film, a yttrium oxynitride film, a gallium oxide film, a gallium oxynitride film, a tantalum oxide film, a tantalum oxynitride film, etc.

[0058] The substrate 190 may release gas or serve as a diffusion source of impurities. Also, a semiconductor element containing impurities such as hydrogen or water may be provided on the substrate 190. In that case, it is preferable that the insulator 110 or the insulator 120A has the property of blocking them.

[0059] The oxide semiconductor to be formed later may form defect levels due to impurities such as hydrogen or water. Therefore, in some cases, it is preferable that the insulator 110 or the insulator 120A is an insulator with low hydrogen permeability (a property of blocking hydrogen).

[0060] Hydrogen is likely to diffuse in the insulator because of its small atomic radius, etc. (the diffusion coefficient is large). For example, an insulator with low density has high hydrogen The hydrogen permeability decreases. An insulator with a low density does not necessarily have a low density throughout the insulator, and includes cases where the density is locally low. This is because the low-density region serves as a path for hydrogen. The density at which hydrogen can permeate is not uniquely determined, but typically includes values less than 2.6 g / cm and the like. Examples of insulators with a low density include inorganic insulators such as silicon oxide and silicon oxynitride, and organic insulators such as polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, and acrylic. Examples of insulators with a high density include magnesium oxide, aluminum oxide, germanium oxide, gallium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide. Note that insulators with a low density and insulators with a high density are not limited to the above-mentioned insulators. For example, these insulators may contain one or more elements selected from boron, nitrogen, fluorine, neon, phosphorus, chlorine, or argon. 3 and the like. For example, inorganic insulators such as silicon oxide and silicon oxynitride, and organic insulators such as polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, and acrylic. Examples of insulators with a high density include magnesium oxide, aluminum oxide, germanium oxide, gallium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide. Note that insulators with a low density and insulators with a high density are not limited to the above-mentioned insulators. For example, these insulators may contain one or more elements selected from boron, nitrogen, fluorine, neon, phosphorus, chlorine, or argon. such as polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, and acrylic. Examples of insulators with a high density include magnesium oxide, aluminum oxide, germanium oxide, gallium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide. Examples of insulators with a high density include magnesium oxide, aluminum oxide, germanium oxide, gallium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide. Examples of insulators with a high density include magnesium oxide, aluminum oxide, germanium oxide, gallium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, and tantalum oxide. Note that insulators with a low density and insulators with a high density are not limited to the above-mentioned insulators. For example, these insulators may contain one or more elements selected from boron, nitrogen, fluorine, neon, phosphorus, chlorine, or argon. For example, these insulators may contain one or more elements selected from boron, nitrogen, fluorine, neon, phosphorus, chlorine, or argon. For example, these insulators may contain one or more elements selected from boron, nitrogen, fluorine, neon, phosphorus, chlorine, or argon. For example, these insulators may contain one or more elements selected from boron, nitrogen, fluorine, neon, phosphorus, chlorine, or argon.

[0061] In addition, an insulator having grain boundaries may have high hydrogen permeability. In other words, an insulator having no (or few) grain boundaries is less likely to allow hydrogen to permeate. For example, an amorphous insulator (such as a non-crystalline insulator) has lower hydrogen permeability than a polycrystalline insulator. In other words, an insulator having no (or few) grain boundaries is less likely to allow hydrogen to permeate. For example, an amorphous insulator (such as a non-crystalline insulator) has lower hydrogen permeability than a polycrystalline insulator. For example, an amorphous insulator (such as a non-crystalline insulator) has lower hydrogen permeability than a polycrystalline insulator.

[0062] In addition, an insulator with a high binding energy with hydrogen may have low hydrogen permeability. For example, if an insulator that forms a hydrogen compound by binding with hydrogen has a binding energy such that hydrogen is not desorbed at the temperature in the device manufacturing process or during the operation of the device, it can be said to be an insulator with low hydrogen permeability. For example, if an insulator that forms a hydrogen compound by binding with hydrogen has a binding energy such that hydrogen is not desorbed at the temperature in the device manufacturing process or during the operation of the device, it can be said to be an insulator with low hydrogen permeability. For example, if an insulator that forms a hydrogen compound by binding with hydrogen has a binding energy such that hydrogen is not desorbed at the temperature in the device manufacturing process or during the operation of the device, it can be said to be an insulator with low hydrogen permeability. For example, an insulator that forms a hydrogen compound at 200°C or higher and 1000°C or lower, 300°C or higher and 1000°C or lower, or 400°C or higher and 1000°C or lower may have low hydrogen permeability. Also for example, an insulator that forms a hydrogen compound with a hydrogen desorption temperature of 200°C or higher and 1000°C or lower, 300°C or higher and 1000°C or lower, or 400°C or higher and 1000°C or lower may have low hydrogen permeability. On the other hand an insulator that forms a hydrogen compound with a hydrogen desorption temperature of 20°C or higher and 400°C or lower, 20°C or higher and 300°C or lower, or 20°C or higher and 200°C or lower may have high hydrogen permeability. Also, there are cases where hydrogen that is easily desorbed and free hydrogen are referred to as excess hydrogen when applicable. In addition, a transistor having an oxide semiconductor may have a factor that deteriorates the electrical characteristics due to oxygen vacancies in the oxide semiconductor. Therefore, it is preferable that the insulator 110 and / or the insulator 120A is an insulator having excess oxygen. Note that excess oxygen refers to oxygen that exists in an insulator or the like and is not bonded (free) to the insulator or the like, or oxygen having a low binding energy with the insulator or the like Excess oxygen-containing insulators may release 1×10 atoms / cm or more, 1×10 atoms / cm or more, or 1×10 atoms / cm or more of oxygen (in terms of the number of oxygen atoms) in the surface temperature range of 100°C or higher and 700°C or lower or 100°C or higher and 500°C or lower by temperature-programmed desorption gas spectroscopy (TDS analysis).

[0063]

[0064] 18 atom s / cm 3 19 atoms / cm 3 20 atoms / cm 3

[0065] The method for measuring the amount of oxygen released using TDS analysis will be described below.

[0066] The total amount of gas released when the measurement sample is subjected to TDS analysis is compared with the integrated value of the ionic strength of the released gas. For example. And by comparison with the standard sample, the total amount of gas released can be calculated.

[0067] For example, from the TDS analysis results of a silicon substrate containing hydrogen of a predetermined density as a standard sample, and the TDS analysis results of the measurement sample, the amount of oxygen molecules released from the measurement sample (N O2 ) can be obtained by the following formula Here, it is assumed that all of the gas detected with a mass-to-charge ratio of 32 obtained by TDS analysis is derived from oxygen molecules. CH Although the mass-to-charge ratio of OH is 32, it is not considered here as the possibility of its existence is low. Also, for oxygen molecules containing oxygen atoms with a mass number of 17 and oxygen atoms with a mass number of 18, which are isotopes of oxygen atoms, 3 they are not considered because their abundance ratios in nature are extremely small.

[0068]

[0069] N O2 =N H2 / S H2 ×S O2 ×α

[0069] N H2 is the value obtained by converting the hydrogen molecules desorbed from the standard sample into density. S H2 is the integrated value of the ionic strength when the standard sample is subjected to TDS analysis. Here, the reference value of the standard sample is set as N H2 / S H2 Let it be. S O2 is the integrated value of the ionic strength when the measurement sample is subjected to TDS analysis is. α is a coefficient that affects the ionic strength in TDS analysis. For the details of the formula shown above Regarding this, refer to Japanese Patent Laid-Open No. 6-275697. The amount of oxygen released is measured using the temperature programmed desorption analyzer EMD-WA1000S / W manufactured by Electrochemical Industries, Ltd., using a silicon substrate containing a fixed amount of hydrogen atoms as a standard sample.

[0070] In addition, in TDS analysis, a part of the oxygen is detected as oxygen atoms. The ratio of oxygen molecules to oxygen atoms can be calculated from the ionization rate of oxygen molecules. Since the above-mentioned α includes the ionization rate of oxygen molecules, by evaluating the amount of oxygen molecules released, the amount of oxygen atoms released can also be estimated.

[0071] Note that N O2 is the amount of oxygen molecules released. The amount released when converted to oxygen atoms is twice the amount of oxygen molecules released.

[0072] Alternatively, an insulator that releases oxygen by heat treatment may contain peroxide radicals. Specifically, it means that the spin density due to peroxide radicals is 5×10 17 spins / cm 3 or more. Note that an insulator containing peroxide radicals may have an asymmetric signal with a g value in the vicinity of 2.01 by electron spin resonance (ESR: Electron Spin Resonance).

[0073] Note that an insulator with low hydrogen permeability is often an insulator with low oxygen permeability. Therefore, it is preferable to use an insulator with low hydrogen permeability as the insulator 110 and an insulator with excess oxygen as the insulator 120A. As described above, by having the laminated structure of the insulator 110 and the insulator 120A, the electrical characteristics of a transistor having an oxide semiconductor can be ​​​​​​​​​​​It can be improved.

[0074] The insulators 110 and 120A may be formed by, for example, a sputtering method, a chemical vapor deposition (CVD) method, or the like. D:Chemical Vapor Deposition method (thermal CVD method, organic metal CVD(MOCVD:Metal Organic Chemical Vapor D deposition method, Plasma Enhanced CVD (PECVD) Chemical Vapor Deposition (CVA) method, etc.), molecular Pitaxy (MBE:Molecular Beam Epitaxy) method, atomic layer deposition Atomic Layer Deposition (ALD) or pulsed laser deposition It is formed using a method such as Pulsed Laser Deposition (PLD). In particular, the insulator can be formed by a CVD method, preferably an ALD method, etc. This is preferable because it can improve the coating property. In addition, it is possible to reduce damage caused by plasma. The thermal CVD method, MOCVD method or ALD method is preferable for forming the oxide. tra-Ethyl-Ortho-Silicate) or silane, etc., and oxygen or It is also possible to use a silicon oxide film with good step coverage formed by reacting with nitrous oxide, etc. can.

[0075] Next, oxygen ions are added to the insulator 110 and / or the insulator 120A. Excess oxygen may be added. Oxygen ions may be added, for example, by ion implantation using an accelerated The voltage is set to 2 kV or more and 50 kV or less, and the dose is set to 5 × 10 14 ions / cm 2 Above 5×1 0 16 ions / cm 2You may proceed as follows.

[0076] Subsequently, as shown in FIGS. 1(A), 1(B), and 1(C), a resist mask 191 is formed on the insulator 120A using a lithography method or the like.

[0077] Here, the processing method of the film to be processed will be described. When the film to be processed is finely processed, various microfabrication techniques can be used. For example, a method of performing a slimming process on a resist mask formed by a lithography method or the like may be used. Also, a dummy pattern is formed by a lithography method or the like, sidewalls are formed on the dummy pattern, and then the dummy pattern is removed, and the remaining sidewalls are used as a resist mask to etch the film to be processed. Also, as the etching of the film to be processed, anisotropic dry etching is preferably used in order to achieve a high aspect ratio. Also, a hard mask made of an inorganic film or a metal film may be used.

[0078] The light used for forming the resist mask can be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or light obtained by mixing these. In addition, ultraviolet light, KrF laser light, ArF laser light, etc. can also be used. Also, exposure may be performed by immersion lithography technology. Also, for exposure, extreme ultraviolet light (EUV: Extreme Ultra-violet), or electromagnetic waves such as X-rays or electron beams can also be used. Using extreme ultraviolet light, X-rays, or electron beams is preferred because extremely fine processing becomes possible. Note that when exposure is performed by scanning a beam such as an electron beam, a photomask is not required.

[0079] Also, before forming a resist film serving as a resist mask, an organic resin film having a function of improving the adhesion between the film to be processed and the resist film may be formed. The organic resin film can be formed, for example, by a spin coating method or the like so as to cover the steps of its lower layer and flatten the surface, and the variation in the thickness of the resist mask provided on the upper layer of the organic resin film can be reduced. Further, when performing particularly fine processing, it is preferable to use, as the organic resin film, a material that functions as an antireflection film for the light used for exposure. Examples of such an organic resin film having such a function include a BARC (Bottom Anti-Reflection Coating) film. The organic resin film may be removed simultaneously with the removal of the resist mask or after the resist mask is removed. Using the resist mask 191, unnecessary portions of the insulator 120A are removed to form an insulator 120B having an opening. Then, by removing the resist mask 191, the insulator 120B shown in FIGS. 2(A), 2(B), and 2(C) can be formed. Incidentally, although an example of forming an opening in the insulator 120B is illustrated, an opening may be formed in the stacked insulator. For example, it may penetrate the insulator 120A and expose the insulator 110. At this time, it is preferable to select materials that can have an etching ratio for the insulator 110 and the insulator 120A, respectively. By using the insulator 110 as a stopper film, the variation in the height of the opening can be reduced. Note that the depth of the opening is, for example, 10 nm or more and 500 nm or less, preferably 10 nm or more and 300 nm or less. Also, when performing particularly fine processing, it is preferable to use, as the organic resin film, a material that functions as an antireflection film for the light used for exposure. Examples of such an organic resin film having such a function include a BARC (Bottom Anti-Reflection Coating) film. The organic resin film may be removed simultaneously with the removal of the resist mask or after the resist mask is removed. Using the resist mask 191, unnecessary portions of the insulator 120A are removed to form an insulator 120B having an opening. Then, by removing the resist mask 191, the insulator 120B shown in FIGS. 2(A), 2(B), and 2(C) can be formed.

[0080] Using the resist mask 191, unnecessary portions of the insulator 120A are removed to form an insulator 120B having an opening. Then, by removing the resist mask 191, the insulator 120B shown in FIGS. 2(A), 2(B), and 2(C) can be formed. (A), FIGS. 2(B) and 2(C) shown, the insulator 120B can be formed. Incidentally, although an example of forming an opening in the insulator 120B is illustrated, an opening may be formed in the stacked insulator. For example, it may penetrate the insulator 120A and expose the insulator 110.

[0081] Incidentally, although an example of forming an opening in the insulator 120B is illustrated, an opening may be formed in the stacked insulator. For example, it may penetrate the insulator 120A and expose the insulator 110. At this time, it is preferable to select materials that can have an etching ratio for the insulator 110 and the insulator 120A, respectively. By using the insulator 110 as a stopper film, the variation in the height of the opening can be reduced. Variations can be suppressed. By making the shapes of the openings uniform, the oxide formed in subsequent processes will have less variation in the size of the semiconductor, enabling the provision of highly reliable transistors. It can be achieved.

[0082] Subsequently, as shown in FIGS. 3(A), 3(B), and 3(C), an oxide semiconductor 130A is formed so as to fill the opening of the insulator 120B. The film formation method of the oxide semiconductor 130A can be appropriately any of a sputtering method, a coating method, an MBE method, a CVD method, a PLD method, an ALD method, etc. It can be used as appropriate.

[0083] In addition, by adding oxygen ions, the oxide semiconductor 130A may contain excess oxygen. The addition of oxygen ions can be performed, for example, by the ion implantation method with an acceleration voltage of 2 kV or more and 50 k V or less and a dose amount of 5×10 14 ions / cm 2 or more and 5×10 16 ions / cm 2 or less. By including excess oxygen in the oxide semiconductor 130A, the oxygen deficiency of the oxide semiconductor 130A can be reduced.

[0084]

[0084] For example, when forming a film of an oxide semiconductor using the sputtering method, specifically, the substrate temperature is set to 100°C or more and 500°C or less, preferably 150°C or more and 450°C or less, and the oxygen ratio in the film formation gas is 2 vol% or more, preferably 5 vol% or more, more preferably 10 vol% or more to form the film.

[0085] In addition, as an applicable oxide semiconductor, it is preferably to contain at least indium (In) or zinc (Z n). It is particularly preferable to contain In and Zn. Also, the oxide semiconductor As a stabilizer for reducing variations in the electrical characteristics of transistors using the body, in addition to that, it preferably contains one or more selected from gallium (Ga), tin (Sn), hafnium (Hf), zirconium (Zr ), titanium (Ti), scandium (Sc), yttrium (Y), and lanthanoids (for example, cerium (Ce), neodymium (Nd), gadolinium (Gd)). It is also preferable that it contains one or more kinds.

[0086] Here, consider the case where the oxide semiconductor has indium, element M, and zinc. Here, element M is preferably aluminum, gallium, yttrium, tin, or the like. Applicable elements for other element Ms include boron, silicon, titanium, iron, nickel , germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium , tantalum, tungsten, magnesium, and the like. However, as element M, there may be cases where a plurality of the aforementioned elements can be combined. Regarding the preferable range of the atomic number ratio of indium, element M, and zinc, x:y:z, which the oxide semiconductor has, will be described with reference to FIGS. 84(A) and 8 4(B).

[0087] FIGS. 84(A) and 84(B) show the range of the atomic number ratio of indium, element M, and zinc that the oxide semiconductor has. Here, in FIGS. 84(A) and 84(B), an example where element M is Ga is shown. Note that the atomic number ratio of oxygen is not described in FIGS. 84(A) and FIG 84(B).

[0088] For example, in an oxide having indium, element M, and zinc, InMO 3 (ZnO) m (m It is known that there exists a homologous phase (homologous series) represented by (where n is a natural number). Here, as an example, consider the case where the element M is Ga. The region 2 indicated by the thick straight line in FIG. 84 3 is a composition known to be capable of forming a single-phase solid solution region when, for example, 2 In 3 O powder, Ga O

[0089] powder, and 2 Zn 4 O 2 powder are mixed and fired at 1350°C. Also, the coordinates indicated by the square 4 symbols in FIG. 84 are compositions known to be likely to contain a spinel-type crystal structure. For example, as a compound having a spinel-type crystal structure, compounds represented by 2 Zn 4 M 4 such as Zn

[0090] Ga O are known. Also, as shown in FIGS. 84(A) and 84(B), for compositions near Zn By increasing the content of [mu], more s-orbitals overlap, so the indium content Oxides with a high indium content have a higher carrier mobility compared to oxides with a low indium content. Therefore, by using an oxide with a high indium content in the oxide semiconductor, the carrier mobility can be increased.

[0091] Therefore, the atomic ratio of indium, element M, and zinc in the oxide semiconductor, x:y:z, is , preferably in the range of region 11 shown in FIG. 84(B). Here, region 11 is , the first coordinate K (x:y:z = 8:14:7), the second coordinate L (x:y:z = 2:5: 7), the third coordinate M (x:y:z = 51:149:300), the fourth coordinate N (x:y :z = 46:288:833), the fifth coordinate O (x:y:z = 0:2:11), the sixth coordinate P (x:y:z = 0:0:1), and the seventh coordinate Q (x:y:z = 1:0:0) are , a region having an atomic ratio within the range connected by line segments in order. Note that region 11 includes coordinates on the straight line.

[0092] By setting x:y:z to region 11 shown in FIG. 84(B), the ratio of the spinel-type crystal structure observed in the nano-beam analysis can be eliminated or made extremely low. Therefore, an excellent CAAC-OS film can be obtained. Also, since carrier scattering at the boundary between the CAAC structure and the spinel-type crystal structure can be reduced, when the oxide semiconductor is used in a transistor, a transistor with a high field-effect mobility can be realized. Also, a highly reliable transistor can be realized.

[0093] ​​Also, when forming a film of an oxide semiconductor by a sputtering method, a film with an atomic ratio deviated from the atomic ratio of the target may be formed. In particular, zinc may have a smaller atomic ratio in the film than in the atomic ratio of the target. Specifically, the atomic ratio of zinc contained in the target may be 40 atomic% or more and about 90 atomic% or less. Here, the target used is preferably polycrystalline.

[0094] In addition, in this embodiment, although the single-layer structure of the oxide semiconductor 130A is used, it may be formed by a stacked structure composed of n layers (n is 2 or more).

[0095] For example, by forming a second semiconductor on a first semiconductor with reduced impurities, the second semiconductor is formed with fewer impurities than the first semiconductor, and diffusion of impurities from the lower layer can be prevented. Also, in a later process, when further stacking is performed on the oxide semiconductor, by thinly forming a third semiconductor on the second semiconductor, diffusion of impurities from the upper layer of the third oxide semiconductor to the second semiconductor can also be suppressed. By forming a transistor such that the second semiconductor with reduced impurities becomes the channel formation region, a highly reliable semiconductor device can be provided. After forming the oxide semiconductor 130A, it is preferable to perform heat treatment. The heat treatment may be performed at a temperature of 250°C or higher and 650°C or lower, preferably 300°C or higher and 500°C or lower, in an inert gas atmosphere, an atmosphere containing 10 ppm or more of an oxidizing gas, or a reduced-pressure atmosphere. Also, after performing heat treatment in an inert gas atmosphere, an oxidizing gas may be added at 10 pp to supplement the desorbed oxygen.

[0096] After forming the oxide semiconductor 130A, it is preferable to perform heat treatment. The heat treatment may be performed at a temperature of 250°C or higher and 650°C or lower, preferably 300°C or higher and 500°C or lower, in an inert gas atmosphere, an atmosphere containing 10 ppm or more of an oxidizing gas, or a reduced-pressure atmosphere. Also, after performing heat treatment in an inert gas atmosphere, an oxidizing gas may be added at 10 pp to supplement the desorbed oxygen. It may be carried out in an atmosphere containing m or more. By the heat treatment here, impurities such as hydrogen and water can be removed from the oxide semiconductor 130A. In addition, oxygen can be supplied from the insulator 12 0B to the oxide semiconductor 130A by this heat treatment. At this time, if the insulator 120B contains excess oxygen, oxygen can be efficiently supplied to the oxide semiconductor, which is preferable .

[0097] Subsequently, as shown in FIGS. 4(A), 4(B), and 4(C), unnecessary portions of the oxide semiconductor 130A are removed to form the oxide semiconductor 130.

[0098] To remove the unnecessary portions of the oxide semiconductor 130A, for example, an etch-back process or , a chemical mechanical polishing (CMP) process, etc. are used to remove a part of the oxide semiconductor 130A until the insulator 120B is exposed, thereby forming the oxide semiconductor 130. At this time, the insulator 120B can also be used as a stop ping layer, and the insulator 120B may become thin.

[0099] Here, the CMP process is a method of planarizing the surface of the workpiece by a combined chemical and mechanical action. More specifically, a polishing cloth is attached to the polishing stage, and while supplying a slurry (polishing agent) between the workpiece and the polishing cloth, the polishing stage and the workpiece are rotated or oscillated, and the surface of the workpiece is polished by the chemical reaction between the slurry and the surface of the workpiece and the mechanical polishing action between the polishing cloth and the workpiece.

[0100] Note that the CMP process may be carried out only once or multiple times. Dividing it into multiple times and performing C When performing MP processing, first polishing with a high polishing rate is performed, followed by finishing with a low polishing rate. In this manner, polishing with different polishing rates may be combined.

[0101] Next, as shown in FIG. 5(A), FIG. 5(B) and FIG. 5(C), the unnecessary insulating body 120B is By removing the portion, the side surface of the oxide semiconductor 130 is exposed, and the insulator 120 is formed. In this step, for example, the insulator 120B is etched back by a dry etching method. At this time, as shown in FIG. 5B and FIG. 5C, By leaving a part of the insulating layer 120 embedded in the insulating layer 120, the oxide semiconductor This can prevent the collapse of 130.

[0102] Next, as shown in FIG. 6(A), FIG. 6(B), and FIG. 6(C), the oxide semiconductor 130 is A conductor 140A is formed so as to cover the conductor 140A, and a laser is applied to the conductor 140A by using a lithography method or the like. A resist mask 192 is formed. Note that the conductor 140A is shown here as having a single-layer structure. However, the conductor 140A is not limited to a single-layer structure, and may be a laminated structure of two or more layers.

[0103] Conductor 140A may include molybdenum, titanium, tantalum, tungsten, aluminum, copper, etc. , chromium, neodymium, scandium, or a metal film containing the above elements. Metal nitride films containing the above (titanium nitride film, molybdenum nitride film, tungsten nitride film), etc. The conductor 140A may be doped with an impurity element such as phosphorus. The semiconductors, such as polycrystalline silicon, and silicide films, such as nickel silicide, are used. Alternatively, indium tin oxide, indium oxide containing tungsten oxide, tungsten oxide, Indium zinc oxide containing tungsten, indium oxide containing titanium oxide, indium tin oxide containing titanium, indium zinc oxide, indium tin oxide added with silicon oxide and other conductive materials can also be applied. Further, a laminated structure of the above conductive material and the above metal material can also be formed. For example, a laminate of a 5 nm titanium film, a 10 nm titanium nitride film, and a 100 nm

[0104] tungsten film can be formed. The conductor 140A can be formed by a sputtering method, a vapor deposition method, a CVD method (including a thermal CVD method, a MOCVD method, a PECVD method, etc.).

[0105] As shown in FIGS. 7(A), 7(B), and 7(C), the conductor 140B is formed by etching using the resist mask 192 as a mask.

[0106] Subsequently, as shown in FIGS. 8(A), 8(B), and 8(C), an insulator 170A and a resist mask 193 are formed on the conductor 140B. The insulator 170A is an insulator containing oxygen, such as a silicon oxide film or a silicon oxynitride film. However, the insulator 170A may be an insulator that does not contain oxygen as a main component. For example, a silicon nitride film or the like may be used.

[0107] Note that the insulator 170A is preferably an insulator containing excess oxygen. As a method for forming an insulator containing excess oxygen, the film formation conditions in the CVD method or the sputtering method are appropriately set to form a silicon This is possible. Also, after forming a silicon oxide film or a silicon oxynitride film, oxygen may be added by ion implantation, ion doping, or plasma treatment.

[0108] Subsequently, using a resist mask 193, unnecessary portions of the insulator 170A are removed to form the insulator 170. Thereafter, using the insulator 170 as a mask, a part of the conductor 140B is removed to form the conductors 140a, and 140b, and at the same time, an opening is formed, as shown in FIGS. 9(A), 9(B), and 9(C).

[0109] Next, as shown in FIGS. 10(A), 10(B), and 10(C), an insulator 150A, and a conductor 160A are formed.

[0110] The film thickness of the insulator 150A is, for example, 1 nm or more and 20 nm or less, and sputtering, MBE method, CVD method, pulsed laser deposition method, ALD method, etc. can be appropriately used. Also, the insulator 150A may be formed using a sputtering apparatus in which a plurality of substrate surfaces are set substantially perpendicular to the sputtering target surface. Also, MOCVD method may be used. For example, a gallium oxide film formed by MOCVD method can be used as the insulator 15 0A.

[0111] As the material of the insulator 150A, a silicon oxide film, a gallium oxide film, a gallium zinc oxide film , a zinc oxide film, an aluminum oxide film, a silicon nitride film, a silicon oxynitride film, an aluminum oxynitride film, or a silicon nitride oxide film can be used. The insulator 150 A preferably contains oxygen at the portion in contact with the oxide semiconductor 130. In particular, the insulator The body 150A has an amount of oxygen (excess oxygen) in the film (bulk) that exceeds at least the stoichiometric composition. In this embodiment, the insulator 150A is formed by a CVD method. The silicon oxynitride film containing excess oxygen is used as the insulator 150. When A is used, oxygen can be supplied to the oxide semiconductor 130, and the transistor characteristics Furthermore, the insulator 150A can be processed into the insulator 150 in a later process. Therefore, it is preferable to form the transistor in consideration of the size of the transistor to be manufactured. .

[0112] In addition, hafnium oxide, yttrium oxide, and hafnium silicon are used as the materials for the insulator 150A. HfSi x O y (x>0, y>0)), nitrogen-doped hafnium silicate (HfSi x O y N Z (x>0, y>0, z>0)), hafnium aluminate (Hf Al x O y (x>0, y>0)) and high-k materials such as lanthanum oxide can also be used. The insulator 150A may have a single-layer structure or a multi-layer structure.

[0113] The conductor 160A is formed by using a sputtering method, a vapor deposition method, a CVD method, or the like. The conductor 160A may be made of molybdenum, titanium, tantalum, tungsten, or aluminum. , copper, chromium, neodymium, scandium, or the above-mentioned metal film Metal nitride films containing elements (titanium nitride film, molybdenum nitride film, tungsten nitride film) ) or the like can be used. In addition, the conductor 160A can be doped with an impurity element such as phosphorus. Semiconductors typified by polycrystalline silicon, silicides such as nickel silicide, etc. may be used. Alternatively, conductive materials such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide added with silicon oxide, etc. can also be applied. Also, a laminated structure of the above conductive material and the above-mentioned metal material can be formed. For example, it can be a laminate of a 5 nm titanium film, a 10 nm titanium nitride film, and a 100 nm tungsten film. Subsequently, as shown in FIGS. 11(A), 11(B), and 11(C), by CMP processing or the like, a part of the conductor 160A and the insulator 150A is removed until the insulator 170 is exposed, and the insulator 150 and the conductor 160 are formed. At this time, the insulator 170 can also be used as a stopper layer. Also, by CMP processing, the upper surface of the insulator 170 may be removed, and the thickness of the insulator 170 may decrease.

[0114]

[0115] Note that the CMP process may be performed only once or multiple times. When performing the CMP process in multiple steps, it is preferable to perform primary polishing with a high polishing rate first and then finish polishing with a low polishing rate. By combining polishings with different polishing rates in this way, the flatness of the polished surface can be further improved.

[0116] Through the above steps, the transistor 100 shown in FIG. 11 can be fabricated. In the transistor 100, the oxide semiconductor 130 has a function as a channel formation region. ​​​​​​​​​​​​​The conductors 140a and 140b serve as a source electrode and a drain electrode. The insulator 150 also functions as a gate insulator. 0 functions as a gate electrode.

[0117] Here, as shown in FIG. 11, the width of the oxide semiconductor 130 is represented as W. In 130, the length of the area where the conductor 160 overlaps with the insulator 150 is defined as L. In addition, in the oxide semiconductor 130, a portion facing the conductor 160 via the insulator 150 The height of the part is H.

[0118] The oxide semiconductor 130 faces or overlaps with the conductor 160 via the insulator 150. A channel may be formed in the region. Therefore, the channel formation region has a length L, a width W, and a and height H.

[0119] In this configuration, the channel forming region is surrounded on three sides by conductors 16 via insulators 150. In other words, the oxide semiconductor 130 is surrounded by the conductor 160. An electric field can be applied from at least three sides of the channel forming region of this structure. In this case, a large current can flow between the source and drain of the transistor, increasing the on-state current. In addition, since an electric field is applied to the channel formation region from at least three sides, It is possible to provide a transistor in which leakage current caused by the punch-through phenomenon is suppressed. do.

[0120] Note that in the oxide semiconductor 130, the channel formation region becomes larger as the height H increases. In addition, when the width W of the oxide semiconductor 130 is The thinner it is, the larger the ratio of the region with high carrier controllability becomes, so that the subthreshold swing value can be reduced.

[0121] Therefore, for example, it is preferable that the height H is three times or more the width W. When the height H is three times or more the width W, a transistor with a small subthreshold swing value and good on characteristics can be provided. Specifically, for example, the height H in the oxide semiconductor 130 is 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the height H in the oxide semiconductor 130 may be 300 nm or less, preferably 200 nm or less, and more preferably 150 nm or less.

[0122] Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a semiconductor device with a high integration degree and a high density. For example, the transistor preferably has a region in the oxide semiconductor 130 where the length L is 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less, and the transistor preferably has a region in the oxide semiconductor 130 where the width W is 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less.

[0123] In addition, since the transistor 100 has a structure in which the conductor 140a and the conductor 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 is reduced. It is possible. That is, the transistor 100 is a transistor with a high operating frequency.

[0124] Further, when an In-Sn-Zn-O film, which is a material difficult to etch (also referred to as a difficult-to-etch material), is used as the oxide semiconductor, depending on the etching conditions, the resist mask may disappear during etching. Also, it is difficult to etch the difficult-to-etch material without residue, and microfabrication is difficult. Therefore, by forming an oxide semiconductor in the opening formed in the insulator, it is possible to form a fine island-shaped oxide semiconductor without using a resist mask. Further, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, so that it is possible to prevent the occurrence of etching residues and residues of the oxide semiconductor.

[0125] As described above, even with a fine structure, it is possible to provide a transistor having stable electrical characteristics and a high operating speed. Also, by using the transistor, it is possible to provide a semiconductor device with small variations in size and characteristics between transistors and a high integration degree.

[0126] <Modification Example 1 of Semiconductor Device> Hereinafter, a modification example of the transistor 100 will be described with reference to FIG. 12. Note that components having the same reference numerals as those of the transistor 100 shown in Manufacturing Method 1 of the semiconductor device can be considered in Manufacturing Method 1 of the semiconductor device.

[0127] First, a film 115 is formed on the insulator 110, and an insulator 120A is formed on the film 115. Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed. At this time, the film 1 ​​​​​​​​15 functions as a stopper film. Therefore, although the film 115 is not an essential component, by forming the film 115, the variation in the height of the opening can be suppressed. By making the shape of the opening uniform, the variation in the size of the oxide semiconductor formed in the subsequent process is reduced, so a highly reliable transistor can be provided. Subsequently, using the same process as in Manufacturing Method 1 of the semiconductor device, an oxide semiconductor 130 is formed in the opening provided in the insulator 120A. Next, by removing the insulator 120B using the same process as in Manufacturing Method 1 of the semiconductor device, all side surfaces of the oxide semiconductor 130 are exposed. Also at this time, since the film 115 can be used as a stopper film, all side surfaces of the oxide semiconductor 130 can be easily exposed. By exposing all side surfaces of the oxide semiconductor 130 in this process, the region facing the conductor 160 becomes larger through the insulator 150 formed in the subsequent process, and the region that becomes the channel length can be efficiently formed. The steps after exposing the oxide semiconductor 130 are the same as those in Manufacturing Method 1 of the semiconductor device, and the transistor 100 shown in FIGS. 12(A), 12(B), and 12(C) can be manufactured.

[0128] Subsequently, using the same process as in Manufacturing Method 1 of the semiconductor device, an oxide semiconductor 130 is formed in the opening provided in the insulator 120A. Next, by removing the insulator 120B using the same process as in Manufacturing Method 1 of the semiconductor device, all side surfaces of the oxide semiconductor 130 are exposed. Also at this time, since the film 115 can be used as a stopper film, all side surfaces of the oxide semiconductor 130 can be easily exposed. By exposing all side surfaces of the oxide semiconductor 130 in this process, the region facing the conductor 160 becomes larger through the insulator 150 formed in the subsequent process, and the region that becomes the channel length can be efficiently formed.

[0129] Next, by removing the insulator 120B using the same process as in Manufacturing Method 1 of the semiconductor device, all side surfaces of the oxide semiconductor 130 are exposed. Also at this time, since the film 115 can be used as a stopper film, all side surfaces of the oxide semiconductor 130 can be easily exposed. By exposing all side surfaces of the oxide semiconductor 130 in this process, the region facing the conductor 160 becomes larger through the insulator 150 formed in the subsequent process, and the region that becomes the channel length can be efficiently formed. Subsequently, using the same process as in Manufacturing Method 1 of the semiconductor device, an oxide semiconductor 130 is formed in the opening provided in the insulator 120A. Next, by removing the insulator 120B using the same process as in Manufacturing Method 1 of the semiconductor device, all side surfaces of the oxide semiconductor 130 are exposed. Also at this time, since the film 115 can be used as a stopper film, all side surfaces of the oxide semiconductor 130 can be easily exposed. By exposing all side surfaces of the oxide semiconductor 130 in this process, the region facing the conductor 160 becomes larger through the insulator 150 formed in the subsequent process, and the region that becomes the channel length can be efficiently formed. Subsequently, using the same process as in Manufacturing Method 1 of the semiconductor device, an oxide semiconductor 130 is formed in the opening provided in the insulator 120A. Next, by removing the insulator 120B using the same process as in Manufacturing Method 1 of the semiconductor device, all side surfaces of the oxide semiconductor 130 are exposed. Also at this time, since the film 115 can be used as a stopper film, all side surfaces of the oxide semiconductor 130 can be easily exposed. By exposing all side surfaces of the oxide semiconductor 130 in this process, the region facing the conductor 160 becomes larger through the insulator 150 formed in the subsequent process, and the region that becomes the channel length can be efficiently formed. Subsequently, using the same process as in Manufacturing Method 1 of the semiconductor device, an oxide semiconductor 130 is formed in the opening provided in the insulator 120A.

[0130] The steps after exposing the oxide semiconductor 130 are the same as those in Manufacturing Method 1 of the semiconductor device, and the transistor 100 shown in FIGS. 12(A), 12(B), and 12(C) can be manufactured. FIG. 12(A) shows an example of a top view of the transistor 100. FIGS. 12(B) and 12(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 12(A). In the transistor 100, the oxide semiconductor 130 functions as a channel formation region.

[0131] FIG. 12(A) shows an example of a top view of the transistor 100. FIGS. 12(B) and 12(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 12(A). In the transistor 100, the oxide semiconductor 130 functions as a channel formation region. In the transistor 100, the oxide semiconductor 130 functions as a channel formation region.

[0132] In the transistor 100, the oxide semiconductor 130 functions as a channel formation region. has. Further, the conductor 140a and the conductor 140b function as a source electrode and a drain electrode respectively. Also, the insulator 150 functions as a gate insulator. The conductor 160 functions as a gate electrode.

[0133] Also, a channel may be formed in a region facing or overlapping with the conductor 160 via the insulator 150 in the oxide semiconductor 130. In this configuration, in the oxide semiconductor 130, the channel formation region is surrounded by the conductor 160 via the insulator 150.

[0134] With this configuration, an electric field can be applied from at least three sides of the region where the channel of the oxide semiconductor 130 is formed by the electric field generated from the conductor 160. Therefore, in this structure a large current can flow between the source and drain of the transistor, and the on-current can be increased accordingly. Also, since an electric field is applied from at least three sides to the region where the channel is formed, it is possible to provide a transistor in which a leakage current caused by a punch-through phenomenon is suppressed.

[0135] When a channel is formed on the entire surface of the channel formation region, in the oxide semiconductor 130, the larger the side surface facing the conductor 160 via the insulator 150, the larger the channel formation region becomes, and the on-current of the transistor can be increased. Also, in the oxide semiconductor 1 30, the smaller the width of the channel formation region, the larger the ratio of the region with high carrier controllability becomes, so that the subthreshold swing value can be decreased.

[0136] Therefore, this configuration can increase the side surface of the oxide semiconductor 130 even when the width of the channel formation region is decreased.​​​ Since the channel formation region can be formed over a wide area on the surface, It is possible to provide a transistor having a small swing value and good on-characteristics. For example, the height of the oxide semiconductor 130 is 10 nm or more, preferably 20 nm or more. More preferably, the thickness is 30 nm or more, and even more preferably, 50 nm or more. For example, the height of the oxide semiconductor 130 may be reduced. is set to 300 nm or less, preferably 200 nm or less, and more preferably 150 nm or less. That's good.

[0137] Since a high on-current can be obtained, this structure is suitable for miniaturized transistors. Since transistors can be miniaturized, semiconductor devices having such transistors can be integrated at a high degree. For example, a transistor can be formed by The channel length is preferably 40 nm or less, more preferably 30 nm or less, and even more preferably 2 0 nm or less, and the transistor preferably has a channel width of 40 nm or less. , more preferably 30 nm or less, and even more preferably 20 nm or less.

[0138] The transistor 100 also includes a conductor 140a, a conductor 140b, and a conductor 160. Since the conductors 160 and 161 have a structure in which they hardly overlap, the parasitic capacitance associated with the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency.

[0139] In addition, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor, In this case, depending on the etching conditions, the resist mask may disappear during etching. Yes. Also, it is difficult to etch a difficult-to-etch material without residue. Therefore, by forming an oxide semiconductor in the opening formed in the insulator, an island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, so that etching residues and residues of the oxide semiconductor can be prevented from occurring. In the opening formed in the insulator, by forming an oxide semiconductor, an island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, so that etching residues and residues of the oxide semiconductor can be prevented from occurring. In the opening formed in the insulator, by forming an oxide semiconductor, an island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, so that etching residues and residues of the oxide semiconductor can be prevented from occurring.

[0140] From the above, even if it has a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics between transistors and a high integration degree can be provided. From the above, even if it has a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics between transistors and a high integration degree can be provided. From the above, even if it has a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics between transistors and a high integration degree can be provided. From the above, even if it has a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics between transistors and a high integration degree can be provided.

[0141] <Modification Example 2 of Semiconductor Device> Hereinafter, a modification example of the transistor 100 will be described with reference to FIG. 13. Note that components denoted by the same reference numerals as those of the transistor 100 shown in the manufacturing method 1 of the semiconductor device can be considered in the manufacturing method 1 of the semiconductor device. Hereinafter, a modification example of the transistor 100 will be described with reference to FIG. 13. Note that components denoted by the same reference numerals as those of the transistor 100 shown in the manufacturing method 1 of the semiconductor device can be considered in the manufacturing method 1 of the semiconductor device. Hereinafter, a modification example of the transistor 100 will be described with reference to FIG. 13. Note that components denoted by the same reference numerals as those of the transistor 100 shown in the manufacturing method 1 of the semiconductor device can be considered in the manufacturing method 1 of the semiconductor device.

[0142] First, a film 115 is formed on the insulator 110, and an insulator 120A is formed on the film 115. Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed. First, a film 115 is formed on the insulator 110, and an insulator 120A is formed on the film 115. Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed.

[0143] Subsequently, using the same steps as in the manufacturing method 1 of the semiconductor device, an oxide semiconductor 130 is formed in the opening provided in the insulator 120A. Subsequently, using the same steps as in the manufacturing method 1 of the semiconductor device, an oxide semiconductor 130 is formed in the opening provided in the insulator 120A.

[0144] Next, using the same steps as in the manufacturing method 1 of the semiconductor device, the insulator 120B is removed to expose all side surfaces of the oxide semiconductor 130. At this time, at least the height of the oxide semiconductor 130 Next, using the same steps as in the manufacturing method 1 of the semiconductor device, the insulator 120B is removed to expose all side surfaces of the oxide semiconductor 130. At this time, at least the height of the oxide semiconductor 130 Excluding the insulator 120B, the depth is made to be greater than the thickness of the insulator 150 to be formed later, and the insulator 120 is formed. That is, in the completed transistor 100 shown in FIG. 13, a part of the upper surface and side surfaces of the oxide semiconductor 130 is covered with the conductor 160 via the insulator 150. removed, and the insulator 120 is formed. That is, in the completed transistor 100 shown in FIG. 13 a part of the upper surface and side surfaces of the oxide semiconductor 130 is covered with the conductor 160 via the insulator 150. to form a structure.

[0145] In this configuration, it is preferable to use the film 115 as the stopper film. By using the film 115, when removing the insulator 120B, etching does not become excessive and reach the lower part of the oxide semiconductor 130, and it is possible to prevent the oxide semiconductor 130 from collapsing. When removing the insulator 120B, etching does not become excessive and reach the lower part of the oxide semiconductor 130, and it is possible to prevent the oxide semiconductor 130 from collapsing. 0, and it is possible to prevent the oxide semiconductor 130 from collapsing. to be.

[0146] The steps after exposing the oxide semiconductor 130 are the same as those of the manufacturing method 1 of the semiconductor device, and the transistor 100 shown in FIGS. 13(A), 13(B), and 13(C) can be manufactured. to manufacture the transistor 100 shown in FIGS. 13(A), 13(B), and 13(C). can be.

[0147] FIG. 13(A) shows an example of a top view of the transistor 100. Note that FIGS. 13(B) and FIG. 13(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 13(A). is.

[0148] In the transistor 100, the oxide semiconductor 130 functions as a channel formation region. Also, the conductors 140a and 140b function as a source electrode and a drain electrode. Also, the insulator 150 functions as a gate insulator. The conductor 160 functions as a gate electrode. In the transistor 100, the oxide semiconductor 130 functions as a channel formation region. Also, the conductors 140a and 140b function as a source electrode and a drain electrode. Also, the insulator 150 functions as a gate insulator. The conductor 160 functions as a gate electrode. The conductor 160 functions as a gate electrode.

[0149] Also, the oxide semiconductor 130 is opposite to or overlaps with the conductor 160 via the insulator 150. Channels may be formed in the resulting region. In this configuration, in the oxide semiconductor 130, The channel formation region is surrounded by a conductor 160 via an insulator 150.

[0150] With this configuration, an electric field generated from the conductor 160 can be applied from at least three sides of the region where the channel of the oxide semiconductor 130 is formed. Therefore, in this structure , a large current can flow between the source and drain of the transistor, and the on-current can be increased to that extent. Also, since an electric field is applied from at least three sides to the region where the channel is formed , it is possible to provide a transistor in which the leakage current caused by the punch-through phenomenon is suppressed.

[0151] In addition, when channels are formed on the entire surface of the channel formation region, in the oxide semiconductor 130 , the larger the side surface facing the conductor 160 via the insulator 150, the larger the channel formation region becomes, and the on-current of the transistor can be increased. Also, in the oxide semiconductor 1 30, the thinner the width of the channel formation region, the higher the ratio of the region with high carrier controllability, so that the subthreshold swing value can be reduced.

[0152] Therefore, this configuration can form a channel formation region over a wide range on the side surface of the oxide semiconductor 130 even when the width of the channel formation region is reduced. Thus, it is possible to provide a transistor with a small subthreshold swing value and good on characteristics. Also, for example, the height in the oxide semiconductor 130 may be 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However, half ​Since the productivity of the conductor device may decrease, for example, the height in the oxide semiconductor 130 is set to 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. That's all.

[0153] Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a semiconductor device with a high integration degree and a high density. For example, the transistor preferably has a channel length in a region of 40 nm or less, more preferably 30 nm or less, and even more preferably 2 0 nm or less, and the transistor preferably has a channel width in a region of 40 nm or less 、more preferably 30 nm or less, and even more preferably 20 nm or less. 、more preferably 30 nm or less, and even more preferably 20 nm or less. That's all.

[0154] Since the transistor 100 has a structure in which the conductor 140a and the conductor 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency. That is, the transistor 100 has a high operating frequency.

[0155] In addition, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor, depending on the etching conditions, the resist mask may disappear during etching. In addition, it is difficult to etch the difficult-to-etch material without residue. Therefore, by forming an oxide semiconductor in the opening formed in the insulator, an island-shaped oxide semiconductor can be formed without using a resist mask. In addition, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, so that the remaining oxide semiconductor and the generation of residue can be prevented. That's all. That's all. That's all.

[0156] As described above, even with a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Further, by using the transistor, a semiconductor device with small variations in size and characteristics between transistors and a high integration degree can be provided.

[0157] <Modified Example 3 of Semiconductor Device> Hereinafter, a modified example of the transistor 100 will be described with reference to FIG. 14. Components denoted by the same reference numerals as those of the transistor 100 shown in the manufacturing method 1 of the semiconductor device can be considered in the manufacturing method 1 of the semiconductor device.

[0158] First, an oxide semiconductor 130a is formed on an insulator 110, and an insulator 120A is formed on the oxide semiconductor 130a. Note that the oxide semiconductor 130a can be formed using the same steps as those of the oxide semiconductor 130A described in the manufacturing method 1 of the semiconductor device.

[0159] Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, variations in the size of the oxide semiconductor formed in subsequent steps are reduced, so that a highly reliable transistor can be provided.

[0160] Subsequently, using the same steps as those in the manufacturing method 1 of the semiconductor device, openings provided in the insulator 120A are ​​​​​​​​​​​An oxide semiconductor 130b is formed at the mouth portion. That is, an oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer. Next, using the same steps as in Fabrication Method 1 of the semiconductor device, the insulator 120B is removed to expose the side surfaces of the oxide semiconductor 130. At this time, by leaving a part of the oxide semiconductor 130 embedded in the insulator 120, it is possible to suppress the collapse of the oxide semiconductor 130 in subsequent processes. Next, using the same steps as in Fabrication Method 1 of the semiconductor device, a conductor 140a, a conductor 140b, and an insulator 170 having an opening are formed. Subsequently, an oxide semiconductor 130C that becomes the oxide semiconductor 130c, an insulator 150A that becomes the insulator 150, and a conductor 160A that becomes the conductor 160 are formed in the opening formed in the insulator 170.

[0161] Next, using the same steps as in Fabrication Method 1 of the semiconductor device, the insulator 120B is removed to expose the side surfaces of the oxide semiconductor 130. At this time, by leaving a part of the oxide semiconductor 130 embedded in the insulator 120, it is possible to suppress the collapse of the oxide semiconductor 130 in subsequent processes. Next, using the same steps as in Fabrication Method 1 of the semiconductor device, a conductor 140a, a conductor 140b, and an insulator 170 having an opening are formed. Subsequently, an oxide semiconductor 130C that becomes the oxide semiconductor 130c, an insulator 150A that becomes the insulator 150, and a conductor 160A that becomes the conductor 160 are formed in the opening formed in the insulator 170. The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-current of the transistor, it is preferable that the thickness of the oxide semiconductor 130C is as small as possible. For example, an oxide semiconductor 130C having a region of less than 20 nm, preferably 10 nm or less, and more preferably 5 nm or less may be used. On the other hand, the oxide semiconductor 130C blocks elements other than oxygen (such as hydrogen and silicon) that make up the adjacent insulator from entering the oxide semiconductor 130b where the channel is formed.

[0162] Next, using the same steps as in Fabrication Method 1 of the semiconductor device, a conductor 140a, a conductor 140b, and an insulator 170 having an opening are formed. Subsequently, an oxide semiconductor 130C that becomes the oxide semiconductor 130c, an insulator 150A that becomes the insulator 150, and a conductor 160A that becomes the conductor 160 are formed in the opening formed in the insulator 170.

[0163] Subsequently, an oxide semiconductor 130C that becomes the oxide semiconductor 130c, an insulator 150A that becomes the insulator 150, and a conductor 160A that becomes the conductor 160 are formed in the opening formed in the insulator 170. The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-current of the transistor, it is preferable that the thickness of the oxide semiconductor 130C is as small as possible. For example, an oxide semiconductor 130C having a region of less than 20 nm, preferably 10 nm or less, and more preferably 5 nm or less may be used. On the other hand, the oxide semiconductor 130C blocks elements other than oxygen (such as hydrogen and silicon) that make up the adjacent insulator from entering the oxide semiconductor 130b where the channel is formed. The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-current of the transistor, it is preferable that the thickness of the oxide semiconductor 130C is as small as possible. For example, an oxide semiconductor 130C having a region of less than 20 nm, preferably 10 nm or less, and more preferably 5 nm or less may be used. On the other hand, the oxide semiconductor 130C blocks elements other than oxygen (such as hydrogen and silicon) that make up the adjacent insulator from entering the oxide semiconductor 130b where the channel is formed.

[0164] The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-current of the transistor, it is preferable that the thickness of the oxide semiconductor 130C is as small as possible. For example, an oxide semiconductor 130C having a region of less than 20 nm, preferably 10 nm or less, and more preferably 5 nm or less may be used. On the other hand, the oxide semiconductor 130C blocks elements other than oxygen (such as hydrogen and silicon) that make up the adjacent insulator from entering the oxide semiconductor 130b where the channel is formed. The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-current of the transistor, it is preferable that the thickness of the oxide semiconductor 130C is as small as possible. For example, an oxide semiconductor 130C having a region of less than 20 nm, preferably 10 nm or less, and more preferably 5 nm or less may be used. On the other hand, the oxide semiconductor 130C blocks elements other than oxygen (such as hydrogen and silicon) that make up the adjacent insulator from entering the oxide semiconductor 130b where the channel is formed. The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-current of the transistor, it is preferable that the thickness of the oxide semiconductor 130C is as small as possible. For example, an oxide semiconductor 130C having a region of less than 20 nm, preferably 10 nm or less, and more preferably 5 nm or less may be used. On the other hand, the oxide semiconductor 130C blocks elements other than oxygen (such as hydrogen and silicon) that make up the adjacent insulator from entering the oxide semiconductor 130b where the channel is formed. The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-current of the transistor, it is preferable that the thickness of the oxide semiconductor 130C is as small as possible. For example, an oxide semiconductor 130C having a region of less than 20 nm, preferably 10 nm or less, and more preferably 5 nm or less may be used. On the other hand, the oxide semiconductor 130C blocks elements other than oxygen (such as hydrogen and silicon) that make up the adjacent insulator from entering the oxide semiconductor 130b where the channel is formed. The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-current of the transistor, it is preferable that the thickness of the oxide semiconductor 130C is as small as possible. For example, an oxide semiconductor 130C having a region of less than 20 nm, preferably 10 nm or less, and more preferably 5 nm or less may be used. On the other hand, the oxide semiconductor 130C blocks elements other than oxygen (such as hydrogen and silicon) that make up the adjacent insulator from entering the oxide semiconductor 130b where the channel is formed. The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-current of the transistor, it is preferable that the thickness of the oxide semiconductor 130C is as small as possible. For example, an oxide semiconductor 130C having a region of less than 20 nm, preferably 10 nm or less, and more preferably 5 nm or less may be used. On the other hand, the oxide semiconductor 130C blocks elements other than oxygen (such as hydrogen and silicon) that make up the adjacent insulator from entering the oxide semiconductor 130b where the channel is formed. Therefore, it is preferable that the oxide semiconductor 130C has a certain thickness. For example, it is 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more. The oxide semiconductor 130C may have a thickness of 100 nm or more. The insulating layer 140 is formed on the substrate 190 or on an insulator interposed between the substrate 190 and the oxide semiconductor 130b. In order to suppress the outward diffusion of oxygen released from the I wish.

[0165] In other words, by forming a thin oxide semiconductor 130c on the oxide semiconductor 130b, It is also possible to suppress the diffusion of impurities from the upper layer of the oxide semiconductor 130 to the oxide semiconductor 130b. The oxide semiconductor 130b having reduced impurities can be used as a channel formation region. By forming a transistor, a highly reliable semiconductor device can be provided.

[0166] Next, in the same manner as in the semiconductor device manufacturing method 1, the insulator 170 is exposed by a CMP process or the like. The conductor 160A, the insulator 150A, and a portion of the oxide semiconductor 130C are removed until The oxide semiconductor 130c, the insulator 150, and the conductor 160 are formed. 70 may be used as a stopper layer, reducing the thickness of insulator 170. .

[0167] Through the above steps, the transistors shown in FIG. 14(A), FIG. 14(B) and FIG. 14(C) are obtained. The TA100 can be produced.

[0168] FIG. 14A illustrates an example of a top view of the transistor 100. Note that FIG. FIG. 14C is a cross-sectional view corresponding to the dashed lines X1-X2 and Y1-Y2 shown in FIG. 14A. It is a top view.

[0169] In transistor 100, oxide semiconductor 130b functions as a channel formation region. Also, conductor 140a and conductor 140b function as a source electrode and a drain electrode. Also, insulator 150 functions as a gate insulator. Conductor 160 functions as a gate electrode.

[0170] Also, in oxide semiconductor 130b, a channel may be formed in a region that faces or overlaps conductor 160 via insulator 150. In this configuration, in oxide semiconductor 130b, the channel formation region is surrounded by conductor 160 via insulator 150.

[0171] With this configuration, an electric field can be applied from at least three sides of the region where the channel of oxide semiconductor 130b is formed by the electric field generated from conductor 160. Therefore, in this structure, a large current can flow between the source and drain of the transistor, and the on-current can be increased. Also, since an electric field is applied from at least three sides to the region where the channel is formed, it is possible to provide a transistor in which the leakage current caused by the punch-through phenomenon is suppressed.

[0172] In oxide semiconductor 130b, the larger the area of the surface facing conductor 160 via insulator 150, the larger the channel formation region, and the on-current of the transistor can be increased. Also, in oxide semiconductor 130b, the thinner the width of the channel formation region, the higher the ratio of the region with high carrier controllability, and thus the subthreshold swing value can be decreased.

[0173] Therefore, for example, in the oxide semiconductor 130b, it is preferable that the height of the channel formation region is three times or more the width of the channel formation region. When the height of the channel formation region is three times or more the width of the channel formation region, a transistor with a small subthreshold swing value and good on characteristics can be provided. Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, a semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region where the channel length is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, a semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region where the channel length is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, a semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region where the channel length is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less.

[0174] Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, a semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region where the channel length is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, a semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region where the channel length is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, a semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region where the channel length is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, a semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region where the channel length is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, a semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region where the channel length is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, a semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region where the channel length is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less.

[0175] Since the transistor 100 has a structure in which the conductor 140a and the conductor 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency. Since the transistor 100 has a structure in which the conductor 140a and the conductor 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency. Since the transistor 100 has a structure in which the conductor 140a and the conductor 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency.

[0176] In addition, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor, depending on the etching conditions, the resist mask may disappear during etching. Also, it is difficult to etch the difficult-to-etch material without residue. Therefore, by forming the oxide semiconductor in the opening formed in the insulator, the resist mask can be dispensed with. In addition, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor, depending on the etching conditions, the resist mask may disappear during etching. Also, it is difficult to etch the difficult-to-etch material without residue. Therefore, by forming the oxide semiconductor in the opening formed in the insulator, the resist mask can be dispensed with. In addition, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor, depending on the etching conditions, the resist mask may disappear during etching. Also, it is difficult to etch the difficult-to-etch material without residue. Therefore, by forming the oxide semiconductor in the opening formed in the insulator, the resist mask can be dispensed with. In addition, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor, depending on the etching conditions, the resist mask may disappear during etching. Also, it is difficult to etch the difficult-to-etch material without residue. Therefore, by forming the oxide semiconductor in the opening formed in the insulator, the resist mask can be dispensed with. , an island-shaped oxide semiconductor can be formed. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, thereby preventing the occurrence of etching residues and residues of the oxide semiconductor. By removing it, the island-shaped semiconductor is exposed, so that the occurrence of etching residues and residues of the oxide semiconductor can be prevented.

[0177] From the above, even with a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics between transistors and a high integration degree can be provided.

[0178] <Modified Example 4 of Semiconductor Device> Hereinafter, a modified example of the transistor 100 will be described with reference to FIG. 15. Note that components denoted by the same reference numerals as those of the transistor 100 shown in the manufacturing method 1 of the semiconductor device can be considered in the manufacturing method 1 of the semiconductor device.

[0179] First, an oxide semiconductor 130a is formed on the insulator 110, and an insulator 120A is formed on the oxide semiconductor 130a. Note that the oxide semiconductor 130a can be formed using the same steps as those of the oxide semiconductor 130A described in the manufacturing method 1 of the semiconductor device.

[0180] Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, variations in the size of the oxide semiconductor formed in subsequent steps are reduced, so that a highly reliable transistor can be provided. ​​​​​​​​​​​​​

[0181] Subsequently, using the same process as in Manufacturing Method 1 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, the oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer. Subsequently, using the same process as in Manufacturing Method 1 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, the oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer. Subsequently, using the same process as in Manufacturing Method 1 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, the oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer. Subsequently, using the same process as in Manufacturing Method 1 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, the oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer. Subsequently, using the same process as in Manufacturing Method 1 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, the oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer.

[0182] Next, by removing the insulator 120B using the same process as in Manufacturing Method 1 of the semiconductor device, all side surfaces of the oxide semiconductor 130b are exposed. Also at this time, since the oxide semiconductor 130a can be used as the stopper film, all side surfaces of the oxide semiconductor 130b can be easily exposed. Note that by exposing all side surfaces of the oxide semiconductor 130b in this process, the region facing the conductor 160 becomes larger through the insulator 150 formed in a later process, and the region that becomes the channel length can be efficiently formed. Next, by removing the insulator 120B using the same process as in Manufacturing Method 1 of the semiconductor device, all side surfaces of the oxide semiconductor 130b are exposed. Also at this time, since the oxide semiconductor 130a can be used as the stopper film, all side surfaces of the oxide semiconductor 130b can be easily exposed. Note that by exposing all side surfaces of the oxide semiconductor 130b in this process, the region facing the conductor 160 becomes larger through the insulator 150 formed in a later process, and the region that becomes the channel length can be efficiently formed. Next, by removing the insulator 120B using the same process as in Manufacturing Method 1 of the semiconductor device, all side surfaces of the oxide semiconductor 130b are exposed. Also at this time, since the oxide semiconductor 130a can be used as the stopper film, all side surfaces of the oxide semiconductor 130b can be easily exposed. Note that by exposing all side surfaces of the oxide semiconductor 130b in this process, the region facing the conductor 160 becomes larger through the insulator 150 formed in a later process, and the region that becomes the channel length can be efficiently formed. Next, by removing the insulator 120B using the same process as in Manufacturing Method 1 of the semiconductor device, all side surfaces of the oxide semiconductor 130b are exposed. Also at this time, since the oxide semiconductor 130a can be used as the stopper film, all side surfaces of the oxide semiconductor 130b can be easily exposed. Note that by exposing all side surfaces of the oxide semiconductor 130b in this process, the region facing the conductor 160 becomes larger through the insulator 150 formed in a later process, and the region that becomes the channel length can be efficiently formed. Next, by removing the insulator 120B using the same process as in Manufacturing Method 1 of the semiconductor device, all side surfaces of the oxide semiconductor 130b are exposed. Also at this time, since the oxide semiconductor 130a can be used as the stopper film, all side surfaces of the oxide semiconductor 130b can be easily exposed. Note that by exposing all side surfaces of the oxide semiconductor 130b in this process, the region facing the conductor 160 becomes larger through the insulator 150 formed in a later process, and the region that becomes the channel length can be efficiently formed. Next, by removing the insulator 120B using the same process as in Manufacturing Method 1 of the semiconductor device, all side surfaces of the oxide semiconductor 130b are exposed. Also at this time, since the oxide semiconductor 130a can be used as the stopper film, all side surfaces of the oxide semiconductor 130b can be easily exposed. Note that by exposing all side surfaces of the oxide semiconductor 130b in this process, the region facing the conductor 160 becomes larger through the insulator 150 formed in a later process, and the region that becomes the channel length can be efficiently formed.

[0183] Next, a conductor 140a, a conductor 140b, and an insulator 170 having an opening are formed using the same process as in Manufacturing Method 1 of the semiconductor device. Next, a conductor 140a, a conductor 140b, and an insulator 170 having an opening are formed using the same process as in Manufacturing Method 1 of the semiconductor device.

[0184] Subsequently, an oxide semiconductor 130c, an insulator 150, and a conductor 160 are formed in the opening formed in the insulator 170 using the same process as in Modification 3 of the semiconductor device. Subsequently, an oxide semiconductor 130c, an insulator 150, and a conductor 160 are formed in the opening formed in the insulator 170 using the same process as in Modification 3 of the semiconductor device.

[0185] The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. Note that in order to increase the on-current of the transistor, the oxide semiconductor The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. Note that in order to increase the on-current of the transistor, the oxide semiconductor The thickness of the oxide semiconductor 130C is preferably as small as possible. For example, an oxide semiconductor 130C having a region of less than 20 nm, preferably 10 nm or less, and more preferably 5 nm or less may be used. On the other hand, the oxide semiconductor 130C has a function of blocking elements other than oxygen (such as hydrogen and silicon) that constitute the insulator adjacent to the oxide semiconductor 130b where the channel is formed from entering. Therefore, the oxide semiconductor 130C preferably has a certain thickness. For example, an oxide semiconductor 130C having a region with a thickness of 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more may be used. Further, the oxide semiconductor 130C preferably has a property of blocking oxygen in order to suppress outward diffusion of oxygen released from the substrate 190 or an insulator interposed between the substrate 190 and the oxide semiconductor 130b. That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A).

[0186] That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). That is, by thinly forming the oxide semiconductor 130C on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130C to the oxide semiconductor 130b can also be suppressed. By forming a transistor such that the oxide semiconductor 130b with reduced impurities serves as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A).

[0187] Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). Through the above steps, the transistor 100 shown in FIGS. 15(A), 15(B), and 15(C) can be manufactured. FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A).

[0188] FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A). FIG. 15(A) shows an example of a top view of the transistor 100. FIGS. 15(B) and 15(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 15(A).

[0189] In the transistor 100, the oxide semiconductor 130b functions as a channel formation region. Also, the conductor 140a and the conductor 140b function as a source electrode and a drain electrode. Also, the insulator 150 functions as a gate insulator. The conductor 160 functions as a gate electrode.

[0190] Also, in the oxide semiconductor 130b, a channel may be formed in a region facing or overlapping the conductor 160 with the insulator 150 interposed therebetween. In this configuration, in the oxide semiconductor 130b, the channel formation region is surrounded by the conductor 160 with the insulator 150 interposed therebetween. With this configuration, an electric field can be applied from at least three sides of the region where the channel of the oxide semiconductor 130b is formed by the electric field generated from the conductor 160. Therefore, in this structure, a large current can flow between the source and drain of the transistor, and the on-current can be increased. Also, since an electric field is applied from at least three sides to the region where the channel is formed, a transistor in which a leakage current caused by a punch-through phenomenon is suppressed can be provided.

[0191]

[0192] Note that, in the oxide semiconductor 130b, the larger the area of the surface facing the conductor 160 with the insulator 150 interposed therebetween, the larger the channel formation region, and the on-current of the transistor can be increased. Also, in the oxide semiconductor 130b, the smaller the width of the channel formation region, the larger the ratio of the region with high carrier controllability, and thus the subthreshold swing value can be decreased.

[0193] Therefore, even when the width of the channel formation region is reduced, this configuration can form a channel formation region over a wide range on the side surface of the oxide semiconductor 130b, thus enabling the provision of a transistor with a low subthreshold doping value and good on characteristics. Also, for example, the height of the oxide semiconductor 130b may be 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130b may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. Since a channel formation region can be formed over a wide range on the side surface, a transistor with a low subthreshold doping value and good on characteristics can be provided. Also, for example, the height in the oxide semiconductor 130b may be 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the height in the oxide semiconductor 130b may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less.

[0194] Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region with a channel length of 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less, and the transistor preferably has a region with a channel width of 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region with a channel length of 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less, and the transistor preferably has a region with a channel width of 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less. and the transistor preferably has a region with a channel width of 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less.

[0195] Since the transistor 100 has a structure in which the conductors 140a and 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency. Since the transistor 100 has a structure in which the conductors 140a and 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency.

[0196] Also, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor, In this case, depending on the etching conditions, the resist mask may disappear during etching. In addition, it is difficult to etch difficult-to-etch materials without leaving any residue. By forming an oxide semiconductor in the opening formed in the substrate, a resist mask is not used. In addition, the insulating layer 14 is formed on the periphery of the oxide semiconductor. By removing the oxide semiconductor, the island-shaped semiconductor is exposed, and the etching residue of the oxide semiconductor and the residue are removed. The occurrence of the above can be prevented.

[0197] From the above, it is possible to produce transistors with stable electrical characteristics and high operating speeds even with a fine structure. In addition, by using the transistor, it is possible to provide a It is possible to provide a semiconductor device having small variations in size and characteristics and a high degree of integration. can.

[0198] <Modification 5 of the semiconductor device> A modification of the transistor 100 will be described below with reference to FIG. The components denoted by the same reference numerals as the transistor 100 shown in the manufacturing method 1 of the semiconductor device are The device manufacturing method 1 can be taken into consideration.

[0199] First, an oxide semiconductor 130a is formed on the insulator 110, and an insulating layer is formed on the oxide semiconductor 130a. The oxide semiconductor 130a is formed on the substrate 120A by the same method as described in the method for manufacturing a semiconductor device 1. The oxide semiconductor 130A can be formed in the same manner as the oxide semiconductor 130A.

[0200] Next, unnecessary portions of the insulator 120A are removed using a resist mask, and the oxide semiconductor At this time, the oxide semiconductor 130a also functions as a stopper film. It is possible. By using the oxide semiconductor 130a as a stopper film, the variation in the height of the opening can be suppressed. By making the shapes of the openings uniform, the variation in the size of the oxide semiconductor formed in the subsequent process is reduced, so that a highly reliable transistor can be provided. Subsequently, in the same manner as in the manufacturing method 1 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, the oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer. Next, in the same manner as in the manufacturing method 1 of the semiconductor device, the insulator 120B is removed to expose all side surfaces of the oxide semiconductor 130. At this time, the oxide semiconductor 130a and a part of the insulator 110 are removed so that the depth is equal to or greater than the height of the oxide semiconductor 130b plus the thickness of the insulator 150 to be formed later. That is, in the completed transistor 100 shown in FIG. 16, a part of the upper surface and side surfaces of the oxide semiconductor 130b are covered with the conductor 160 via the insulator 150.

[0201] In this configuration, when the oxide semiconductor 130a is formed thicker than the total thickness of the oxide semiconductor 130c and the insulator 150, the insulator 110 can be used as a stopper film. By using the insulator 110 as a stopper film, when the side surface of the oxide semiconductor 130b is exposed, the etching becomes excessive and reaches the insulator below the oxide semiconductor 130.

[0202]

[0203] ​​​​​​​​​​​​​​​It can be prevented that the oxide semiconductor 130 collapses when it is bent.

[0204] Next, using the same process as the manufacturing method 1 of the semiconductor device, a conductor 140a, a conductor 140b , and an insulator 170 having an opening are formed.

[0205] Subsequently, using the same process as the first modification example of the semiconductor device, an oxide semiconductor 130c, an insulator 150, and a conductor 160 are formed in the opening formed in the insulator 170.

[0206] The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-current of the transistor, it is preferable that the thickness of the oxide semiconductor 130C is smaller. For example, an oxide semiconductor 130C having a region of less than 20 nm, preferably 10 nm or less, and more preferably 5 nm or less may be used. On the other hand, the oxide semiconductor 130C has a function of blocking elements other than oxygen (such as hydrogen and silicon) constituting the adjacent insulator from entering the oxide semiconductor 130b where the channel is formed. Therefore, it is preferable that the oxide semiconductor 130C has a certain thickness. For example, an oxide semiconductor 130C having a region of 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more may be used. Further, it is preferable that the oxide semiconductor 130C has a property of blocking oxygen in order to suppress the outward diffusion of oxygen released from the substrate 190 or an insulator interposed between the substrate 190 and the oxide semiconductor 130b. That is, by thinly forming the oxide semiconductor 130c on the oxide semiconductor 130b, the acid

[0207] That is, by thinly forming the oxide semiconductor 130c on the oxide semiconductor 130b, the acid Diffusion of impurities from the upper layer of the oxide semiconductor 130 to the oxide semiconductor 130b can also be suppressed. By forming a transistor with the impurity-reduced oxide semiconductor 130b serving as a channel formation region, a highly reliable semiconductor device can be provided.

[0208] Through the above steps, the transistor 100 shown in FIGS. 16(A), 16(B), and 16(C) can be fabricated.

[0209] FIG. 16(A) shows an example of a top view of the transistor 100. FIGS. 16(B) and 16(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 16(A).

[0210] In the transistor 100, the oxide semiconductor 130b functions as a channel formation region. Also, the conductors 140a and 140b function as a source electrode and a drain electrode, respectively. Further, the insulator 150 functions as a gate insulator. The conductor 160 functions as a gate electrode.

[0211] Also, in the oxide semiconductor 130b, a channel may be formed in a region facing or overlapping the conductor 160 with the insulator 150 interposed therebetween. In this configuration, in the oxide semiconductor 130b, the channel formation region is surrounded by the conductor 160 with the insulator 150 interposed therebetween.

[0212] With this configuration, an electric field can be applied from at least three sides of the region where the channel of the oxide semiconductor 130b is formed by the electric field generated from the conductor 160. Therefore, in this structure, a large current can flow between the source and drain of the transistor, and the on-current can be increased. This is possible. Further, an electric field is applied from at least three sides to the region where the channel is formed. To provide a transistor in which a leakage current caused by a punch-through phenomenon is suppressed. This is possible.

[0213] In the oxide semiconductor 130b, the larger the surface area facing the conductor 160 via the insulator 150, the larger the channel formation region, and the higher the on-current of the transistor can be made. In the oxide semiconductor 130b, the thinner the width of the channel formation region, the higher the ratio of the region with high carrier controllability, and thus the subthreshold swing value can be made smaller. Therefore, in this configuration, even when the width of the channel formation region is thinned, a channel formation region can be formed over a wide range on the side surface of the oxide semiconductor 130b, so that a transistor with a small subthreshold swing value and good on characteristics can be provided. Also, for example, the height of the oxide semiconductor 130b may be 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130b may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. Since a high on-current can be obtained, this structure can be said to be a structure suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor is a This is possible.

[0214] This configuration can form a channel formation region over a wide range on the side surface of the oxide semiconductor 130b even when the width of the channel formation region is thinned, so that a transistor with a small subthreshold swing value and good on characteristics can be provided. Also, for example, the height of the oxide semiconductor 130b may be 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130b may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. Since a high on-current can be obtained, this structure can be said to be a structure suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor is a This is possible. Also, for example, the height of the oxide semiconductor 130b may be 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130b may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. This is possible. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130b may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. This is possible. This is possible.

[0215] Since a high on-current can be obtained, this structure can be said to be a structure suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor is a This is possible. This is possible. The channel length preferably has a region of 40 nm or less, more preferably 30 nm or less, and even more preferably 2 0 nm or less, and the transistor preferably has a channel width of 40 nm or less , more preferably 30 nm or less, and even more preferably 20 nm or less.

[0216] Since the transistor 100 has a structure in which the conductor 140a and the conductor 140b and the conductor 160 hardly overlap , the parasitic capacitance related to the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency.

[0217] In addition, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor , depending on the etching conditions, the resist mask may disappear during etching. Therefore, by forming an oxide semiconductor in the opening formed in the insulator, an island-shaped oxide semiconductor can be formed without using a resist mask.

[0218] From the above, even with a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Further, by using the transistor, a semiconductor device having small variations in size and characteristics and a high integration degree can be provided between transistors.

[0219] As described above, the configurations, methods, etc. shown in the present embodiment can be appropriately combined and used with the configurations, methods, etc. shown in other embodiments.

[0220] (Embodiment 2) In the present embodiment, a method for manufacturing the transistor 100 will be described with reference to FIGS. 17 to 22.

[0221] ​​​​​​​ <Method for Manufacturing Semiconductor Device 2> Hereinafter, an example of a method for manufacturing a semiconductor device will be described with reference to FIGS. 17 to 18. Note that components denoted by the same reference numerals as those of the transistor 100 shown in Embodiment 1 can be considered with reference to the transistor shown in Embodiment 1. First, in the same manner as in Embodiment 1, an insulator 120B having an opening is formed through FIGS. 1 and 2. Subsequently, as shown in FIGS. 17(A), 17(B), and 17(C), after forming an insulator 121A, an oxide semiconductor 130A is formed. Note that the insulator 121A can be formed by the same process as that of the insulator 110 or the insulator 120A.

[0222]

[0223] Subsequently, as shown in FIGS. 18(A), 18(B), and 18(C), a part of the oxide semiconductor 130A is removed by CMP processing or the like until the insulator 121A or the insulator 120B is exposed, and an oxide semiconductor 130 and an insulator 121 are formed. Note that in FIG. 18, the case where the insulator 121 is exposed is illustrated, but there is no problem even if the insulator 121A is removed until the upper surface of the insulator 120B is exposed. The thickness and processing shape of the insulator 121A may be appropriately set according to the shape of the designed oxide semiconductor 130.

[0224]

[0225]

[0224]

[0225] Note that the CMP processing may be performed only once or may be performed a plurality of times. When the CMP processing is performed in a plurality of times, it is preferable to perform primary polishing with a high polishing rate and then finish polishing with a low polishing rate. By combining polishings with different polishing rates in this manner, the flatness of the insulator 121 or the insulator 120B can be further improved.

[0225] By forming the insulator 121A, the opening formed in the insulator 120B becomes narrower by the thickness of the film of the insulator 121 A. Therefore, in the oxide semiconductor 130 embedded in the opening, a transistor with a smaller channel width region can be provided. By reducing the channel width, a transistor with good channel controllability by the gate electric field can be provided.

[0226] <Fabrication method 3 of semiconductor device> Hereinafter, an example of a method for manufacturing a semiconductor device in the case where the oxide semiconductor has a stacked structure will be described with reference to FIGS. 19 to 22. Note that components denoted by the same reference numerals as those of the transistor 100 shown in Embodiment 1 can be considered with reference to the transistor shown in Embodiment 1.

[0227] First, using the same steps as in Embodiment 1, an insulator 110, an oxide semiconductor 130a, and an insulator 120B having an opening are formed on a substrate 190. Subsequently, as shown in FIGS. 19(A), 19(B), and 19(C), an insulator 121A is formed. Note that the insulator 121A can be formed by the same steps as those for the insulator 110 or the insulator 120A.

[0228] Subsequently, as shown in FIGS. 20(A), 20(B), and 20(C), a part of the insulator 121A is removed to form an insulator 121B, and a part of the oxide semiconductor 130a is exposed. Note that, in order to remove an unnecessary part of the insulator 121A, for example, an etch-back process may be used.

[0229] Subsequently, as shown in FIGS. 21(A), 21(B), and 21(C), the oxide semiconductor 1 ​​​​​​​​​​​​Form a film of 30B on insulator 120B, insulator 121B, and oxide semiconductor 130a. . Note that the oxide semiconductor 130B can be formed by the same process as the oxide semiconductor 130A shown in Embodiment 1.

[0230] Subsequently, as shown in FIGS. 22(A), 22(B), and 22(C), by CMP processing or the like , remove a part of the oxide semiconductor 130B until the insulator 121B or the insulator 120B is exposed, and form the oxide semiconductor 130b and the insulator 121.

[0231] . Note that the CMP processing may be performed only once or multiple times. When performing the CMP processing in multiple steps, it is preferable to perform primary polishing with a high polishing rate and then finish polishing with a low polishing rate. By combining polishings with different polishing rates in this way, the flatness of the insulator 121 or the insulator 120B can be further improved.

[0232] By forming the insulator 121A, the opening formed in the insulator 120B becomes thinner by the film thickness of the insulator 121 A. Therefore, the oxide semiconductor 130 embedded in the opening can be made into a finer shape.

[0233] Therefore, in the oxide semiconductor 130 embedded in the opening, a region that becomes the channel width can provide a smaller transistor. By reducing the channel width, a transistor with good channel controllability by the gate electric field can be provided.

[0234] As described above, the configurations, methods, etc. shown in this embodiment can be used in appropriate combination with the configurations, methods, etc. shown in other embodiments.

[0235] (Embodiment 3) <Modification Example 6 of Semiconductor Device> In this embodiment, a modification example of the transistor 100 will be described with reference to FIGS. 23 to 37. explain.

[0236] <Fabrication Method 4 of Semiconductor Device> An example of a method for manufacturing a semiconductor device will be described below with reference to FIGS. 23 to 32. Note that FIG. 23(A) shows an example of a top view. FIGS. 23(B) and 23(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 23 (A). The same applies to FIGS. 24 to 32. Note that the transistor 100 shown in Embodiment 1 and configurations having the same functions are denoted by the same reference numerals as the transistor 100 shown in Embodiment 1, and the transistor shown in Embodiment 1 can be referred to.

[0237] First, as shown in FIGS. 23(A), 23(B), and 23(C), an insulator 110, an insulator 120A, and a resist mask 191 are formed on a substrate 190.

[0238] Subsequently, as shown in FIGS. 24(A), 24(B), and 24(C), unnecessary portions of the insulator 120A are removed using the resist mask 191 to form an insulator 120B.

[0239] Next, as shown in FIGS. 25(A), 25(B), and 25(C), an oxide semiconductor 130A is formed along the inner wall of the opening of the insulator 120B. Subsequently, an insulator 125A is formed on the oxide semiconductor 13 0A. Note that the insulator 125A can be formed by the same process as the insulator 110 or the insulator 120A.

[0240] ​​ Next, as shown in FIGS. 26(A), 26(B), and 26(C), unnecessary portions of the insulator 125A , the oxide semiconductor 130A are removed to form the oxide semiconductor 130 and the insulator 125 B.

[0241] Note that, in order to remove the unnecessary portions of the oxide semiconductor 130A and the insulator 125A, for example , by an etch-back process or a CMP process, etc., until the insulator 120B is exposed, a part of the insulator 125A and the oxide semiconductor 130A may be removed. At this time, the insulator 120B can also be used as a stopper layer, and there are cases where the insulator 120B becomes thin .

[0242] Subsequently, as shown in FIGS. 27(A), 27(B), and 27(C), unnecessary portions of the insulator 120 B and the insulator 125B are removed to expose a part of the upper surface and the side surface of the oxide semiconductor 130, and the insulator 120 and the insulator 125 are formed. This step is, for example, to perform an etch-back process on the insulator 120B and the insulator 125B by a dry etching method . At this time, as shown in FIGS. 27(B) and 27(C), by leaving a part of the oxide semiconductor 1 30 embedded in the insulator 120 and the insulator 125, it is possible to suppress the collapse of the oxide semiconductor 130 in subsequent processes.

[0243] Next, as shown in FIGS. 28(A), 28(B), and 28(C), a conductor 140A and a resist mask 192 are formed on the oxide semiconductor 1 30. Subsequently, using the resist mask 192, unnecessary portions of the conductor 140A are removed to form the conductor 140B .

[0244] Next, as shown in FIG. 29(A), FIG. 29(B), and FIG. 29(C), the conductor 140B An insulator 170A and a resist mask 193 are formed on the insulating layer 170A. As shown in FIG. 30B and FIG. 30C, a resist mask 193 is used to form an insulating The unnecessary portions of the insulator 170A and the conductor 140B are removed, and the insulator 170, the conductor 140a, , and conductor 140b.

[0245] Next, as shown in FIG. 31(A), FIG. 31(B), and FIG. 31(C), the oxide semiconductor 1 30, an insulator 150A and a conductor 160A are formed. As shown in FIG. 32(B) and FIG. 32(C), the insulator 150A and the conductor 160A The unnecessary portions are removed. In this process, for example, the insulator 1 is removed by a CMP process or the like. 1. It is sufficient to remove the insulator 150A and a portion of the conductor 160A until 70 is exposed. At this time, the insulator 170 can be used as a stopper layer, and the insulator 170 becomes thin. There are cases.

[0246] Through the above steps, the transistor 100 shown in FIG. In the gate electrode 100, the oxide semiconductor 130 functions as a channel formation region. The conductors 140a and 140b serve as a source electrode and a drain electrode. The insulator 150 also functions as a gate insulator. 0 functions as a gate electrode.

[0247] As shown in FIG. 32, in the oxide semiconductor 130, a conductor 150 is formed through the insulator 150. Let the widths of the regions overlapping the electrical body 160 be W1 and W2, respectively. Also, in the oxide semiconductor 130 through the insulator 150, let the length of the region overlapping the conductor 160 be L. Also, in the acid oxide semiconductor 130, through the insulator 150, let the partial height facing the conductor 160 be H.

[0248] A channel may be formed in the region of the oxide semiconductor 130 that faces or overlaps the conductor 160 through the insulator 150. Therefore, the channel formation region can be defined by a length L, a width W1, a width W2, and a height H. In this configuration, regardless of the size of the opening, the widths W1 and W2 of the oxide semiconductor 130 can be controlled by the film thickness. Therefore, a fine transistor can be easily provided.

[0249] In this configuration, compared with the configuration described in the previous embodiment, since the channel formation region is approximately doubled, the on characteristics are improved, and the controllability of the transistor can be improved. Furthermore, three sides of the channel formation region are surrounded by the conductor 160 through the insulator 150.

[0250] With this configuration, an electric field can be applied from at least three sides of the channel formation region of the oxide semiconductor 130 by the electric field generated from the conductor 160. Therefore, in this structure, a large current can flow between the source and drain of the transistor, and the on current can be increased. Also, since an electric field is applied from at least three sides to the region where the channel is formed, a transistor with a leakage current suppressed due to the punch-through phenomenon can be provided. Furthermore, three sides of the channel formation region are surrounded by the conductor 160 through the insulator 150.

[0251] With this configuration, an electric field can be applied from at least three sides of the channel formation region of the oxide semiconductor 130 by the electric field generated from the conductor 160. Therefore, in this structure, a large current can flow between the source and drain of the transistor, and the on current can be increased. Furthermore, since an electric field is applied from at least three sides to the region where the channel is formed, a transistor with a leakage current suppressed due to the punch-through phenomenon can be provided.

[0252] In the oxide semiconductor 130, the larger the height H, the larger the channel formation region , and the on-current of the transistor can be increased. Also, the smaller the width W1 and the width W2 of the oxide semiconductor 130, the higher the ratio of the region with high carrier controllability, so the sub-threshold swing value can be decreased.

[0253] Therefore, for example, it is preferable that the height H is three times or more the length of the width W1 or the width W2 . By setting the height H to be three times or more the length of the width W1 or the width W2, a transistor with a small sub-threshold swing value and good on characteristics can be provided. Specifically , for example, the height H in the oxide semiconductor 130 may be 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However , since the productivity of the semiconductor device may decrease, for example, the height H in the oxide semiconductor 130 may be 300 nm or less, preferably 200 nm or less, and more preferably 150 nm or less.

[0254] Also, since the transistor 100 has a structure in which the conductor 140a and the conductor 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 can be reduced . That is, the transistor 100 has a high operating frequency.

[0255] Also, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor , depending on the etching conditions, the resist mask may disappear during etching . Also, it is difficult to etch the difficult-to-etch material without residue, and microfabrication is Therefore, by forming an oxide semiconductor in the opening formed in the insulator, A fine island-shaped oxide semiconductor can be formed without using a mask. By removing the insulator around the semiconductor, the island-shaped semiconductor is exposed, and the oxide semiconductor This can prevent etching residue and the generation of residues.

[0256] From the above, it is possible to produce transistors with stable electrical characteristics and high operating speeds even with a fine structure. In addition, by using the transistor, it is possible to provide a It is possible to provide a semiconductor device having small variations in size and characteristics and a high degree of integration. can.

[0257] <Seventh Modification of Semiconductor Device> A modification of the transistor 100 will be described below with reference to FIG. The components denoted by the same reference numerals as the transistor 100 in the semiconductor device manufacturing method 4 are The construction method 4 of the device can be taken into consideration.

[0258] First, the film 115 is formed on the insulator 110, and the insulator 120A is formed on the film 115. Then, unnecessary portions of the insulator 120A are removed using a resist mask. Therefore, the film 115 functions as a stopper film. By forming the opening, the variation in height of the opening can be suppressed. By aligning the sizes of the oxide semiconductors, there is less variation in the sizes of the oxide semiconductors to be formed in a later process. A highly reliable transistor can be provided.

[0259] Next, the opening in the insulator 120A is removed by the same process as in the semiconductor device manufacturing method 4. An oxide semiconductor 130 is formed in the mouth portion.

[0260] Next, by using the same process as in the manufacturing method 4 of the semiconductor device, the insulator 120B is removed, exposing all side surfaces of the oxide semiconductor 130. Also at this time, since the film 115 can be used as a stopper film, all side surfaces of the oxide semiconductor 130 can be easily exposed. In this process, by exposing all side surfaces of the oxide semiconductor 130, the region facing the conductor 160 becomes larger through the insulator 150 formed in a later process, and the region that becomes the channel length can be efficiently formed.

[0261] The processes after exposing the oxide semiconductor 130 are the same as those in the manufacturing method 4 of the semiconductor device, and the transistor 100 shown in FIGS. 33(A), 33(B), and 33(C) can be manufactured.

[0262] FIG. 33(A) shows an example of a top view of the transistor 100. Note that FIGS. 33(B) and 33(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 33(A).

[0263] In the transistor 100, the oxide semiconductor 130 functions as a channel formation region. Also, the conductors 140a and 140b function as source and drain electrodes. Also, the insulator 150 functions as a gate insulator. The conductor 160 functions as a gate electrode.

[0264] In this configuration, regardless of the size of the opening, the width of the oxide semiconductor 130 can be controlled by the film thickness. Therefore, a fine transistor can be easily provided. ​​​​

[0265] In addition, in this configuration, the channel formation region is large, and the surface area of the channel formation region is wide. Therefore, it is possible to provide a transistor with high on characteristics and good controllability. Further, the oxide semiconductor 130 may have a channel formed in a region facing or overlapping with the conductor 160 via the insulator 150. In this configuration, in the oxide semiconductor 130, the channel formation region is surrounded by the conductor 160 via the insulator 150. With this configuration, an electric field can be applied from at least three sides of the region where the channel of the oxide semiconductor 130 is formed by the electric field generated from the conductor 160. Therefore, in this structure, a large current can flow between the source and drain of the transistor, and the on-current can be increased.

[0266] In addition, since an electric field is applied from at least three sides to the region where the channel is formed, it is possible to provide a transistor in which the leakage current caused by the punch-through phenomenon is suppressed. In the oxide semiconductor 130, the larger the side surface facing the conductor 160 via the insulator 150, the larger the channel formation region, and the on-current of the transistor can be increased. In the oxide semiconductor 130, the thinner the width of the channel formation region, the higher the ratio of the region with high carrier controllability, and thus the subthreshold swing value can be reduced. Therefore, in this configuration, even when the width of the channel formation region is reduced, the channel formation region can be formed over a wide range on the side surface of the oxide semiconductor 130, so that the subthreshold In addition, since an electric field is applied from at least three sides to the region where the channel is formed, it is possible to provide a transistor in which the leakage current caused by the punch-through phenomenon is suppressed.

[0267] Note that in the oxide semiconductor 130, the larger the side surface facing the conductor 160 via the insulator 150, the larger the channel formation region, and the on-current of the transistor can be increased. In the oxide semiconductor 130, the larger the side surface facing the conductor 160 via the insulator 150, the larger the channel formation region, and the on-current of the transistor can be increased. In the oxide semiconductor 130, the thinner the width of the channel formation region, the higher the ratio of the region with high carrier controllability, and thus the subthreshold swing value can be reduced. Therefore, in this configuration, even when the width of the channel formation region is reduced, the channel formation region can be formed over a wide range on the side surface of the oxide semiconductor 130, so that the subthreshold swing value can be reduced.

[0268] Therefore, this configuration can form a channel formation region over a wide range on the side surface of the oxide semiconductor 130 even when the width of the channel formation region is reduced, so that the subthreshold In addition, since an electric field is applied from at least three sides to the region where the channel is formed, it is possible to provide a transistor in which the leakage current caused by the punch-through phenomenon is suppressed. ​A transistor with a small swing value and good on characteristics can be provided. Also, For example, if the height of the oxide semiconductor 130 is 10 nm or more, preferably 20 nm or more, and further preferably 30 nm or more, more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130 may be set to 3 00 nm or less, preferably 200 nm or less, and more preferably 150 nm or less. That's fine.

[0269] Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated, high-density semiconductor device. For example, the transistor preferably has a channel length of 40 nm or less, more preferably 30 nm or less, and even more preferably 2 0 nm or less, and the transistor preferably has a channel width of 40 nm or less 、more preferably 30 nm or less, and even more preferably 20 nm or less. 0 nm or less, and the transistor preferably has a channel width of 40 nm or less 、more preferably 30 nm or less, and even more preferably 20 nm or less.

[0270] Also, since the transistor 100 has a structure in which the conductor 140a and the conductor 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency.

[0271] Also, when using an In-Sn-Zn-O film, which is a difficult-to-etch material, as the oxide semiconductor, depending on the etching conditions, the resist mask may disappear during etching. Also, it is difficult to etch the difficult-to-etch material without residue. Therefore, the absolute By fabricating an oxide semiconductor in an opening formed in an insulator, an island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, thereby preventing the occurrence of etching residues and residues of the oxide semiconductor. From the above, even with a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics and a high integration degree can be provided between transistors.

[0272] From the above, even with a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics and a high integration degree can be provided between transistors. That is, a semiconductor device with small variations in size and characteristics and a high integration degree can be provided. can be achieved.

[0273] <Modification Example 8 of Semiconductor Device> Hereinafter, a modification example of the transistor 100 will be described with reference to FIG. 34. Components denoted by the same reference numerals as those of the transistor 100 shown in the manufacturing method 4 of the semiconductor device can be considered in the manufacturing method 4 of the semiconductor device. First, a film 115 is formed on the insulator 110, and an insulator 120A is formed on the film 115. Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed. Subsequently, using the same steps as in the manufacturing method 4 of the semiconductor device, an oxide semiconductor 130 is fabricated in the opening provided in the insulator 120A.

[0274] First, a film 115 is formed on the insulator 110, and an insulator 120A is formed on the film 115. Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed. Subsequently, using the same steps as in the manufacturing method 4 of the semiconductor device, unnecessary portions of the insulator 120A are removed using a resist mask.

[0275] Subsequently, using the same steps as in the manufacturing method 4 of the semiconductor device, an oxide semiconductor 130 is fabricated in the opening provided in the insulator 120A. Subsequently, using the same steps as in the manufacturing method 4 of the semiconductor device, an oxide semiconductor 130 is fabricated in the opening provided in the insulator 120A.

[0276] Next, using the same steps as in the manufacturing method 4 of the semiconductor device, the insulator 120B is removed to expose all side surfaces of the oxide semiconductor 130. At this time, the insulator 120B is removed so that the depth is at least the height of the oxide semiconductor 130 plus the thickness of the insulator 150 to be formed later. Next, using the same steps as in the manufacturing method 4 of the semiconductor device, the insulator 120B is removed to expose all side surfaces of the oxide semiconductor 130. At this time, the depth is at least the height of the oxide semiconductor 130 plus the thickness of the insulator 150 to be formed later. Next, using the same steps as in the manufacturing method 4 of the semiconductor device, the insulator 120B is removed to expose all side surfaces of the oxide semiconductor 130. At this time, the depth is at least the height of the oxide semiconductor 130 plus the thickness of the insulator 150 to be formed later. Remove it and form the insulator 120. That is, in the completed transistor 100 shown in FIG. 34 a structure is formed in which the upper part and all side surfaces of a part of the oxide semiconductor 130 are covered with the conductor 160 via the insulator 150 .

[0277] In this configuration, it is preferable to use the film 115 as the stopper film. By using the film 115 when removing the insulator 120B, it is possible to prevent the etching from becoming excessive and etching down to the lower part of the oxide semiconductor 130, causing the oxide semiconductor 130 to collapse .

[0278] The steps after exposing the oxide semiconductor 130 are the same as those in the manufacturing method 4 of the semiconductor device, and the transistor 100 shown in FIGS. 34(A), 34(B), and 34(C) can be manufactured .

[0279] FIG. 34(A) shows an example of a top view of the transistor 100. FIGS. 34(B) and FIG. 34(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 34(A) .

[0280] In the transistor 100, the oxide semiconductor 130 functions as a channel formation region . Also, the conductors 140a and 140b function as a source electrode and a drain electrode . Further, the insulator 150 functions as a gate insulator. The conductor 160 functions as a gate electrode .

[0281] In this configuration, regardless of the size of the opening, the width of the oxide semiconductor 130 can be controlled by the film thickness . Therefore, a fine transistor can be easily provided

[0282] ​​ In addition, in this configuration, since the channel formation region can be made large and the surface area of the channel formation region can be increased, it is possible to provide a transistor with high on characteristics and good controllability. Furthermore, in the oxide semiconductor 130, a channel may be formed in a region facing or overlapping with the conductor 160 via the insulator 150. In this configuration, in the oxide semiconductor 130, the channel formation region is surrounded by the conductor 160 via the insulator 150. With this configuration, an electric field can be applied from at least three sides of the region where the channel of the oxide semiconductor 130 is formed by the electric field generated from the conductor 160. Therefore, in this structure, a large current can flow between the source and drain of the transistor, and the on-current can be increased. In addition, since an electric field is applied from at least three sides to the region where the channel is formed, it is possible to provide a transistor in which the leakage current caused by the punch-through phenomenon is suppressed. Note that, in the oxide semiconductor 130, the larger the side surface facing the conductor 160 via the insulator 150, the larger the channel formation region, and the on-current of the transistor can be increased.

[0283] In the oxide semiconductor 130, the thinner the width of the channel formation region, the higher the ratio of the region with high carrier controllability, so that the subthreshold swing value can be reduced. Therefore, even when the width of the channel formation region is reduced, this configuration can form a channel formation region over a wide range on the side surface of the oxide semiconductor 130, so that the subthreshold ... ... ... ...

[0284] In the oxide semiconductor 130, the larger the side surface facing the conductor 160 via the insulator 150, the larger the channel formation region, and the on-current of the transistor can be increased. In the oxide semiconductor 130, the thinner the width of the channel formation region, the higher the ratio of the region with high carrier controllability, so that the subthreshold swing value can be reduced. ... ... ...

[0285] Therefore, even when the width of the channel formation region is reduced, this configuration can form a channel formation region over a wide range on the side surface of the oxide semiconductor 130, so that the subthreshold ... It is possible to provide a transistor having a small swing value and good on characteristics. Also, For example, the height of the oxide semiconductor 130 is 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and still more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130 is 300 nm or less, preferably 200 nm or less, and more preferably 150 nm or less. That's all.

[0286] Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a semiconductor device with a high integration degree and high density. For example, the transistor preferably has a channel length of 40 nm or less, more preferably 30 nm or less, and still more preferably 2 0 nm or less, and the transistor preferably has a channel width of 40 nm or less more preferably 30 nm or less, and still more preferably 20 nm or less. That's all. That's all.

[0287] Since the transistor 100 has a structure in which the conductor 140a and the conductor 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency. That's all.

[0288] Also, when using an In-Sn-Zn-O film, which is a difficult-to-etch material, as the oxide semiconductor, depending on the etching conditions, the resist mask may disappear during etching. Also, it is difficult to etch the difficult-to-etch material without residue. Therefore, By fabricating an oxide semiconductor in an opening formed in an insulator, an island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, thereby preventing the occurrence of etching residues and residues of the oxide semiconductor.

[0289] From the above, even with a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics and a high integration degree can be provided between transistors. It can be done.

[0290] <Modified Example 9 of Semiconductor Device> Hereinafter, a modified example of the transistor 100 will be described with reference to FIG. 35. Components with the same reference numerals as those in the transistor 100 shown in the manufacturing method 4 of the semiconductor device can be considered in the manufacturing method 4 of the semiconductor device.

[0291] First, an oxide semiconductor 130a is formed on the insulator 110, and an insulator 120A is formed on the oxide semiconductor 130a. The oxide semiconductor 130a can be formed using the same process as the oxide semiconductor 130A.

[0292] Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By aligning the shape of the opening, the oxide semiconductor formed in a later process 130a can be made to function as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By aligning the shape of the opening, the oxide semiconductor formed in a later process can be made to function as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By aligning the shape of the opening, the oxide semiconductor formed in a later process can be made to function as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By aligning the shape of the opening, the oxide semiconductor formed in a later process ​​​​​Since the variation in the body size is reduced, a highly reliable transistor can be provided. possible.

[0293] Subsequently, using the same process as in the manufacturing method 4 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, the oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer. oxide semiconductor 130b is formed. 0a and can prevent the diffusion of impurities from the lower layer. oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer. possible.

[0294] Next, using the same process as in the manufacturing method 4 of the semiconductor device, the insulator 120B is removed to expose the side surface of the oxide semiconductor 130b. At this time, by leaving a part of the oxide semiconductor 130b embedded in the insulator 120, it is possible to suppress the collapse of the oxide semiconductor 130b in the subsequent process. oxide semiconductor 130b is exposed. oxide semiconductor 130b is embedded in the insulator 120, it is possible to suppress the collapse of the oxide semiconductor 130b in the subsequent process. collapse in the subsequent process.

[0295] Next, using the same process as in the manufacturing method 4 of the semiconductor device, a conductor 140a, a conductor 140b, and an insulator 170 having an opening are formed. oxide semiconductor 130c, an insulator 150A serving as the insulator 150, and a conductor 160A serving as the conductor 160 are formed.

[0296] Subsequently, in the opening formed in the insulator 170, an oxide semiconductor 130C serving as the oxide semiconductor 130c, an insulator 150A serving as the insulator 150, and a conductor 160A serving as the conductor 160 are formed. oxide semiconductor 130c, an insulator 150A serving as the insulator 150, and a conductor 160A serving as the conductor 160 are formed. formed.

[0297] The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-current of the transistor, the thickness of the oxide semiconductor 130C is preferably as small as possible. For example, less than 20 nm, preferably 10 nm or more. oxide semiconductor 130C is preferably as small as possible. For example, less than 20 nm, preferably 10 nm or more. oxide semiconductor 130C is preferably as small as possible. For example, less than 20 nm, preferably 10 nm or more. The oxide semiconductor 130C may have a thickness of 5 nm or less, and more preferably has a thickness of 5 nm or less. On the other hand, the oxide semiconductor 130C is adjacent to the oxide semiconductor 130b in which the channel is formed. Blocks elements other than oxygen that make up the insulator (hydrogen, silicon, etc.) from entering Therefore, it is preferable that the oxide semiconductor 130C has a certain thickness. For example, it is 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more. The oxide semiconductor 130C may have a thickness of 100 nm or more. The insulating layer 140 is formed on the substrate 190 or on an insulator interposed between the substrate 190 and the oxide semiconductor 130b. In order to suppress the outward diffusion of oxygen released from the I wish.

[0298] In other words, by forming a thin oxide semiconductor 130c on the oxide semiconductor 130b, It is also possible to suppress the diffusion of impurities from the upper layer of the oxide semiconductor 130 to the oxide semiconductor 130b. The oxide semiconductor 130b having reduced impurities can be used as a channel formation region. By forming a transistor, a highly reliable semiconductor device can be provided.

[0299] Next, in the same manner as in the semiconductor device manufacturing method 4, the insulator 170 is exposed by a CMP process or the like. The conductor 160A, the insulator 150A, and a portion of the oxide semiconductor 130C are removed until The oxide semiconductor 130c, the insulator 150, and the conductor 160 are formed. 70 may be used as a stopper layer, reducing the thickness of insulator 170. .

[0300] Through the above steps, the transistors shown in FIG. 35(A), FIG. 35(B) and FIG. 35(C) are obtained. The Ta 100 can be fabricated.

[0301] FIG. 35(A) shows an example of a top view of the transistor 100. Note that FIGS. 35(B) and FIG. 35(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 35(A).

[0302] In the transistor 100, the oxide semiconductor 130b functions as a channel formation region. Also, the conductor 140a and the conductor 140b function as a source electrode and a drain electrode, respectively. Also, the insulator 150 functions as a gate insulator. The conductor 160 functions as a gate electrode.

[0303] In this configuration, regardless of the size of the opening, the width of the oxide semiconductor 130b can be controlled by the film thickness. Therefore, a fine transistor can be easily provided.

[0304] Also, in this configuration, since the channel formation region can be made large and the surface area of the channel formation region can be made wide, a transistor with high on characteristics and good controllability can be provided. Furthermore, in the oxide semiconductor 130b, a channel may be formed in a region facing or overlapping the conductor 160 via the insulator 150. In this configuration, in the oxide semiconductor 130b, the channel formation region is surrounded by the conductor 160 via the insulator 150.

[0305] With this configuration, an electric field can be applied from at least three sides of the region where the channel of the oxide semiconductor 130b is formed by the electric field generated from the conductor 160. Therefore, with this structure, ​​​It is possible to allow a large current to flow between the source and drain of the transistor, increasing the on-current. In addition, an electric field is applied to the region where the channel is formed from at least three sides, so that it is possible to provide a transistor in which the leakage current caused by the punch-through phenomenon is suppressed. It is possible.

[0306] Note that in the oxide semiconductor 130b, the larger the area of the surface facing the conductor 160 via the insulator 150, the larger the channel formation region, and the on-current of the transistor can be increased. In addition, in the oxide semiconductor 130b, the thinner the width of the channel formation region, the higher the ratio of the region with high carrier controllability, so that the subthreshold swing value can be reduced. It is possible. Therefore, for example, in the oxide semiconductor 130b, it is preferable that the height of the channel formation region is three times or more the width of the channel formation region. By making the height of the channel formation region three times or more the width of the channel formation region, it is possible to provide a transistor with a small subthreshold swing value and good on characteristics. It is possible.

[0307] Therefore, for example, in the oxide semiconductor 130b, it is preferable that the height of the channel formation region is three times or more the width of the channel formation region. By making the height of the channel formation region three times or more the width of the channel formation region, it is possible to provide a transistor with a small subthreshold swing value and good on characteristics. Since a high on-current can be obtained, this structure can be said to be a structure suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region where the channel length is 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less. It is possible to provide a transistor with a small subthreshold swing value and good on characteristics. It is possible.

[0308] Since a high on-current can be obtained, this structure can be said to be a structure suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region where the channel length is 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less. Since the transistor can be miniaturized, the semiconductor device having the transistor can be a highly integrated and high-density semiconductor device. For example, the transistor preferably has a region where the channel length is 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less. For example, the transistor preferably has a region where the channel length is 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less. It has a region where the channel length is preferably 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less. It has a region where the channel length is preferably 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less, and the transistor preferably has a region where the channel width is 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less. It has a region where the channel width is preferably 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less.

[0309] Since the transistor 100 has a structure in which the conductors 140a and 140b and the conductor 160 hardly overlap with each other, the parasitic capacitance associated with the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency.

[0310] Also, when using an In-Sn-Zn-O film, which is a difficult-to-etch material, as the oxide semiconductor, depending on the etching conditions, the resist mask may disappear during etching. Also, it is difficult to etch the difficult-to-etch material without residue. Therefore, by forming the oxide semiconductor in the opening formed in the insulator, an island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, so that the occurrence of etching residue and residue of the oxide semiconductor can be prevented.

[0311] As described above, even with a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics and a high integration degree can be provided between transistors.

[0312] <Modified Example 10 of Semiconductor Device> Hereinafter, a modified example of the transistor 100 will be described with reference to FIG. 36. Note that the components denoted by the same reference numerals as those of the transistor 100 shown in the manufacturing method 4 of the semiconductor device can be considered in the manufacturing method 4 of the semiconductor device.

[0313] First, an oxide semiconductor 130a is formed on the insulator 110, and an insulator is formed on the oxide semiconductor 130a. A film of the body 120A is formed. Note that the oxide semiconductor 130a can be formed using the same process as the oxide semiconductor 130A described in the manufacturing method 4 of the semiconductor device.

[0314] Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shape of the opening uniform, variations in the size of the oxide semiconductor formed in a later process are reduced, so that a highly reliable transistor can be provided.

[0315] Subsequently, using the same process as in the manufacturing method 4 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, the oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer.

[0316] Next, by removing the insulator 120B using the same process as in the manufacturing method 4 of the semiconductor device, all side surfaces of the oxide semiconductor 130 are exposed. Also at this time, since the oxide semiconductor 130a can be used as a stopper film, all side surfaces of the oxide semiconductor 130 can be easily exposed. Note that by exposing all side surfaces of the oxide semiconductor 130 in this process, the region facing the conductor 160 becomes larger through the insulator 150 formed in a later process, and a region that becomes the channel length can be efficiently formed. ​​​​​​​​​​​​​​​

[0317] Next, the conductor 140a and the conductor 140b are formed by the same process as in the semiconductor device manufacturing method 4. , and an insulator 170 having an opening is formed.

[0318] Next, the opening formed in the insulator 170 is removed using the same process as in the first modified example of the semiconductor device. An oxide semiconductor 130c, an insulator 150, and a conductor 160 are formed on the oxide semiconductor 130c.

[0319] The oxide semiconductor 130c is the same as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-state current of a transistor, an oxide semiconductor The smaller the thickness of the body 130c, the more preferable. For example, the thickness is less than 20 nm, preferably less than 10 nm. The oxide semiconductor 130c may have a thickness of 5 nm or less, and more preferably has a thickness of 5 nm or less. On the other hand, the oxide semiconductor 130c is adjacent to the oxide semiconductor 130b in which the channel is formed. Blocks elements other than oxygen that make up the insulator (hydrogen, silicon, etc.) from entering Therefore, it is preferable that the oxide semiconductor 130c has a certain degree of thickness. For example, it is 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more. In addition, the oxide semiconductor 130c may have a thickness of 100 nm or more. The insulating layer 140 is formed on the substrate 190 or on an insulator interposed between the substrate 190 and the oxide semiconductor 130b. In order to suppress the outward diffusion of oxygen released from the I wish.

[0320] In other words, by forming a thin oxide semiconductor 130c on the oxide semiconductor 130b, It is also possible to suppress the diffusion of impurities from the upper layer of the oxide semiconductor 130 to the oxide semiconductor 130b. Cut. By forming a transistor using the oxide semiconductor 130b with reduced impurities as the channel formation region, a highly reliable semiconductor device can be provided. By forming a transistor, a highly reliable semiconductor device can be provided.

[0321] Through the above steps, the transistor 100 shown in FIGS. 36(A), 36(B), and 36(C) can be fabricated. The transistor 100 can be fabricated.

[0322] FIG. 36(A) shows an example of a top view of the transistor 100. FIGS. 36(B) and FIG. 36(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 36(A).

[0323] In the transistor 100, the oxide semiconductor 130b functions as a channel formation region. Also, the conductors 140a and 140b function as a source electrode and a drain electrode, respectively. The insulator 150 functions as a gate insulator. The conductor 160 functions as a gate electrode.

[0324] In this configuration, regardless of the size of the opening, the width of the oxide semiconductor 130b can be controlled by the film thickness. Therefore, a fine transistor can be easily provided.

[0325] Also, in this configuration, since the channel formation region can be made large and the surface area of the channel formation region can be widely formed, a transistor with high on characteristics and good controllability can be provided. Furthermore, in the oxide semiconductor 130b, a channel may be formed in a region facing or overlapping the conductor 160 via the insulator 150. In this configuration, in the oxide semiconductor 130b, the channel formation region is surrounded by the conductor 160 via the insulator 150. ​​​​​​​​​

[0326] With this configuration, an electric field can be applied from at least three sides of the region where the channel of the oxide semiconductor 130b is formed by the electric field generated from the conductor 160. Therefore, in this structure, a large current can flow between the source and drain of the transistor, and the on-current can be increased. In addition, since an electric field is applied from at least three sides to the region where the channel is formed, it is possible to provide a transistor in which the leakage current caused by the punch-through phenomenon is suppressed. In the oxide semiconductor 130b, the larger the surface area facing the conductor 160 via the insulator 150, the larger the channel formation region, and the on-current of the transistor can be increased. In the oxide semiconductor 130b, the thinner the width of the channel formation region, the higher the ratio of the region with high carrier controllability, so the subthreshold swing value can be reduced. Therefore, this configuration can form a channel formation region over a wide range on the side surface of the oxide semiconductor 130b even when the width of the channel formation region is reduced, so that a transistor with a small subthreshold swing value and good on characteristics can be provided. Also,

[0327] for example, the height of the oxide semiconductor 130b may be 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130b may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. In the oxide semiconductor 130b, the thinner the width of the channel formation region, the higher the ratio of the region with high carrier controllability, so the subthreshold swing value can be reduced. In the oxide semiconductor 130b, the thinner the width of the channel formation region, the higher the ratio of the region with high carrier controllability, so the subthreshold swing value can be reduced. Therefore, this configuration can form a channel formation region over a wide range on the side surface of the oxide semiconductor 130b even when the width of the channel formation region is reduced, so that a transistor with a small subthreshold swing value and good on characteristics can be provided. Also,

[0328] Therefore, this configuration can form a channel formation region over a wide range on the side surface of the oxide semiconductor 130b even when the width of the channel formation region is reduced, so that a transistor with a small subthreshold swing value and good on characteristics can be provided. Also, since it is possible to form a channel formation region over a wide range on the side surface of the oxide semiconductor 130b, a transistor with a small subthreshold swing value and good on characteristics can be provided. Also, since it is possible to form a channel formation region over a wide range on the side surface of the oxide semiconductor 130b, a transistor with a small subthreshold swing value and good on characteristics can be provided. Also, for example, the height of the oxide semiconductor 130b may be 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130b may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130b may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130b may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. It is sufficient to set it to less than or equal to.

[0329] Since a high on-current can be obtained, this structure can be said to be suitable for a miniaturized transistor. Since the transistor can be miniaturized, a semiconductor device having the transistor can be made into a semiconductor device with a high degree of integration and high density. For example, the transistor preferably has a channel length in a region of 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less, and the transistor preferably has a channel width in a region of 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less.

[0330] Since the transistor 100 has a structure in which the conductor 140a and the conductor 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency.

[0331] Also, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor, depending on the etching conditions, the resist mask may disappear during etching. Also, it is difficult to etch the difficult-to-etch material without residue. Therefore, by forming an oxide semiconductor in the opening formed in the insulator, an island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, so that etching residues and residues of the oxide semiconductor can be prevented from occurring.

[0332] From the above, even with a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, between transistors ​​​​​​​​​​​​​ It is possible to provide a semiconductor device with small variations in size and characteristics and a high degree of integration. It can be done.

[0333] <Modified Example 11 of Semiconductor Device> Hereinafter, a modified example of the transistor 100 will be described with reference to FIG. 37. Components having the same reference numerals as those of the transistor 100 shown in the manufacturing method 4 of the semiconductor device can be considered in the manufacturing method 4 of the semiconductor device. First, an oxide semiconductor 130a is formed on an insulator 110, and an insulator 120A is formed on the oxide semiconductor 130a. The oxide semiconductor 130a can be formed using the same steps as the oxide semiconductor 130A described in the manufacturing method 4 of the semiconductor device. Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, variations in the size of the oxide semiconductor formed in subsequent steps are reduced, so that a highly reliable transistor can be provided.

[0334] First, an oxide semiconductor 130a is formed on an insulator 110, and an insulator 120A is formed on the oxide semiconductor 130a. The oxide semiconductor 130a can be formed using the same steps as the oxide semiconductor 130A described in the manufacturing method 4 of the semiconductor device. Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, variations in the size of the oxide semiconductor formed in subsequent steps are reduced, so that a highly reliable transistor can be provided. Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, variations in the size of the oxide semiconductor formed in subsequent steps are reduced, so that a highly reliable transistor can be provided.

[0335] Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, variations in the size of the oxide semiconductor formed in subsequent steps are reduced, so that a highly reliable transistor can be provided. Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, variations in the size of the oxide semiconductor formed in subsequent steps are reduced, so that a highly reliable transistor can be provided. Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, variations in the size of the oxide semiconductor formed in subsequent steps are reduced, so that a highly reliable transistor can be provided. Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, variations in the size of the oxide semiconductor formed in subsequent steps are reduced, so that a highly reliable transistor can be provided. Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, variations in the size of the oxide semiconductor formed in subsequent steps are reduced, so that a highly reliable transistor can be provided. Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, variations in the size of the oxide semiconductor formed in subsequent steps are reduced, so that a highly reliable transistor can be provided.

[0336] Subsequently, using the same steps as in the manufacturing method 4 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, an oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with even fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer. Subsequently, using the same steps as in the manufacturing method 4 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, an oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with even fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer. Subsequently, using the same steps as in the manufacturing method 4 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, an oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with even fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer. Subsequently, using the same steps as in the manufacturing method 4 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, an oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with even fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer. Subsequently, using the same steps as in the manufacturing method 4 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, an oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with even fewer impurities than the oxide semiconductor 130a and can prevent the diffusion of impurities from the lower layer.

[0337] Next, the insulator 120B is removed by the same process as in the semiconductor device manufacturing method 4, and the oxide The entire side surface of the semiconductor 130 is exposed. At this time, the height of the oxide semiconductor 130b is set to 1000 nm. The oxide semiconductor 130a and the insulating layer 150 are formed so that the depth of the insulating layer 150 is equal to or greater than the thickness of the insulating layer 150. A portion of the edge 110 is removed to form the insulator 120. That is, the completed structure shown in FIG. In the transistor 100, a top surface and a side surface of a part of the oxide semiconductor 130b are insulated. The structure is covered with the conductor 160 via the body 150.

[0338] In this configuration, the oxide semiconductor 130a is made of the oxide semiconductor 130c and the insulator 150. When the insulator 110 is formed thicker than the total thickness of the insulator 110, the insulator 110 can be used as a stopper film. By using the insulator 110 as a stopper film, the side surface of the oxide semiconductor 130b can be During the exposure, the etching is excessive and the insulator underneath the oxide semiconductor 130 is etched away. As a result, the oxide semiconductor 130 can be prevented from collapsing.

[0339] Next, the conductor 140a and the conductor 140b are formed by the same process as in the semiconductor device manufacturing method 4. , and an insulator 170 is formed.

[0340] Next, the opening formed in the insulator 170 is removed using the same process as in the first modified example of the semiconductor device. An oxide semiconductor 130c, an insulator 150, and a conductor 160 are formed on the oxide semiconductor 130c.

[0341] The oxide semiconductor 130c is the same as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-state current of a transistor, an oxide semiconductor The thickness of the oxide semiconductor 130c is preferably as small as possible. For example, an oxide semiconductor 130c having a region less than 20 nm, preferably 10 nm or less, and more preferably 5 nm or less may be used. On the other hand, the oxide semiconductor 130c has a function of blocking elements other than oxygen (such as hydrogen and silicon) that constitute the insulator adjacent to the oxide semiconductor 130b where the channel is formed from entering. Therefore, the oxide semiconductor 130c preferably has a certain thickness. For example, an oxide semiconductor 130c having a region with a thickness of 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more may be used. Further, the oxide semiconductor 130c preferably has a property of blocking oxygen in order to suppress outward diffusion of oxygen released from the substrate 190 or an insulator interposed between the substrate 190 and the oxide semiconductor 130b. That is, by thinly forming the oxide semiconductor 130c on the oxide semiconductor 130b, impurity diffusion from the upper layer of the oxide semiconductor 130 to the oxide semiconductor 130b can also be suppressed. By forming a transistor with the oxide semiconductor 130b with reduced impurities as the channel formation region, a highly reliable semiconductor device can be provided. Through the above steps, the transistor 100 shown in FIGS. 37(A), 37(B), and 37(C) can be manufactured. FIG. 37(A) shows an example of a top view of the transistor 100. FIGS. 37(B) and 37(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 37(A).

[0342]

[0343]

[0344]

[0345] ​​​​​​​​​​​​​​​ In the transistor 100, the oxide semiconductor 130b functions as a channel formation region. The conductor 140a and the conductor 140b function as a source electrode and a drain electrode. The insulator 150 functions as a gate insulator. The conductor 160 functions as a gate electrode.

[0346] In this configuration, regardless of the size of the opening, the width of the oxide semiconductor 130b can be controlled by the film thickness. Therefore, a fine transistor can be easily provided.

[0347] Also, in this configuration, since the channel formation region can be made large and the surface area of the channel formation region can be made wide, a transistor with high on characteristics and good controllability can be provided. Furthermore, in the oxide semiconductor 130b, a channel may be formed in a region facing or overlapping the conductor 160 via the insulator 150. In this configuration, in the oxide semiconductor 130b, the channel formation region is surrounded by the conductor 160 via the insulator 150.

[0348] With this configuration, an electric field can be applied from at least three sides of the region where the channel of the oxide semiconductor 130b is formed by the electric field generated from the conductor 160. Therefore, in this structure, a large current can flow between the source and drain of the transistor, and the on current can be increased. Also, since an electric field is applied from at least three sides to the region where the channel is formed, a transistor in which a leakage current caused by the punch-through phenomenon is suppressed can be provided.

[0349] In the oxide semiconductor 130b, on the side facing the conductor 160 via the insulator 150 The larger the surface area, the larger the channel formation region, and the higher the on-current of the transistor can be made. Also, in the oxide semiconductor 130b, the thinner the width of the channel formation region, the higher the ratio of the region with high carrier controllability, so that the subthreshold swing value can be made smaller.

[0350] Therefore, in this configuration, even when the width of the channel formation region is made thin, a channel formation region can be formed over a wide range on the side surface of the oxide semiconductor 130b, so that a transistor with a small subthreshold swing value and good on characteristics can be provided. Also, for example, the height of the oxide semiconductor 130b may be 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130b may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. For example, the height of the oxide semiconductor 130b may be 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130b may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less.

[0351] Since a high on-current can be obtained, this structure can be said to be a structure suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a semiconductor device with high integration density and high density. For example, the transistor preferably has a channel length in a region of 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less, and the transistor preferably has a channel width in a region of 40 nm or less, more preferably 30 nm or less, and even more preferably 20 nm or less. ​​​​​​​​​​​​​​

[0352] Transistor 100 has a structure in which conductor 140a and conductor 140b and conductor 160 hardly overlap with each other, so that the parasitic capacitance associated with conductor 160 can be reduced. That is, transistor 100 has a high operating frequency.

[0353] Also, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor, in some etching conditions, the resist mask may disappear during etching. Therefore, by forming the oxide semiconductor in the opening formed in the insulator, an island-shaped oxide semiconductor can be formed without using a resist mask.

[0354] As described above, even with a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Further, by using the transistor, a semiconductor device with small variations in size and characteristics and a high integration degree can be provided between transistors.

[0355] As described above, the configurations, methods, etc. shown in the present embodiment can be used in appropriate combination with the configurations, methods, etc. shown in other embodiments.

[0356] (Embodiment 4) <Modification Example 12 of Semiconductor Device> In the present embodiment, a modification example of transistor 100 will be described with reference to FIGS. 38 to 54.

[0357] <Fabrication Method 5 of Semiconductor Device> An example of a method for manufacturing a semiconductor device will be described below with reference to FIGS. 38 to 48. Note that FIG. 38(A) shows an example of a top view. FIGS. 38(B) and 38(C) are cross-sectional views taken along line A-A' and line B-B' in FIG. 38, respectively. 38(A) shows an example of a top view. Also, FIGS. 38(B) and 38(C) are cross-sectional views taken along line A-A' and line B-B' in FIG. 38, respectively.​​​​​​​​​ It is a cross-sectional view corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in (A). Also, FIG. 3 The same shall apply to FIGS. 9 to 48. Note that the transistor 100 shown in Embodiment 1 and a configuration having the same function is denoted by the same reference numeral as the transistor 100 shown in Embodiment 1, and the transistor shown in Embodiment 1 can be referred to.

[0358] First, as shown in FIGS. 38(A), 38(B), and 38(C), an insulator 110, a film 115, and an insulator 120B having an opening are formed on a substrate 190.

[0359] Next, as shown in FIGS. 39(A), 39(B), and 39(C), an oxide semiconductor 130A is formed along the inner wall of the opening of the insulator 120B. Subsequently, as shown in FIGS. 40(A), 40(B), and 40(C), unnecessary portions of the oxide semiconductor 130A are removed to form an annular oxide semiconductor 130. This step can be performed, for example, by an etch-back process using a dry etching method with the film 115 as a stopper film.

[0360] Next, as shown in FIGS. 41(A), 41(B), and 41(C), an insulator 125A is formed on the insulator 120B, the oxide semiconductor 130, and the film 115. Note that the insulator 125A can be formed by the same process as the insulator 110 or the insulator 120A.

[0361] Subsequently, as shown in FIGS. 42(A), 42(B), and 42(C), unnecessary portions of the insulator 120 B and the insulator 125A are removed to expose a part of the upper surface and the side surface of the oxide semiconductor 130, and an insulator 120 and an insulator 125 are formed. This step can be performed, for example, ​​​​​​Perform etch-back processing on insulator 120B and insulator 125A by dry etching method This is preferable. At this time, as shown in FIGS. 42(B) and 42(C), by leaving a part of the oxide semiconductor 1 30 embedded in the insulator 120 and the insulator 125, it is possible to suppress the collapse of the oxide semiconductor 130 in the subsequent process.

[0362] Next, as shown in FIGS. 43(A), 43(B), and 43(C), a conductor 140A and a resist mask 192 are formed on the oxide semiconductor 1 30.

[0363] Subsequently, as shown in FIGS. 44(A), 44(B), and 44(C), using the resist mask 192, unnecessary portions of the conductor 140A are removed to form the conductor 140B.

[0364] Next, as shown in FIGS. 45(A), 45(B), and 45(C), an insulator 170A and a resist mask 193 are formed on the conductor 140B . Subsequently, as shown in FIGS. 46(A), 46(B), and 46(C), using the resist mask 193, unnecessary portions of the insulator 170A and the conductor 140A are removed to form the insulator 170, the conductor 140a , and the conductor 140b.

[0365] Next, as shown in FIGS. 47(A), 47(B), and 47(C), an insulator 150A and a conductor 160A are formed on the oxide semiconductor 1 30. Subsequently, as shown in FIGS. 48(A), FIGS 48(B), and 48(C), unnecessary portions of the insulator 150A and the conductor 160A are removed. In this step, for example, by CMP processing or the like, the insulator 1 ​​Until 70 is exposed, a part of the insulator 150A and the conductor 160A may be removed. At this time, the insulator 170 can also be used as a stopper layer, and the insulator 170 may become thin. There are cases.

[0366] Through the above steps, the transistor 100 shown in FIG. 48 can be manufactured. In the trans In the istor 100, the oxide semiconductor 130 has a function as a channel formation region. In addition, the conductors 140a and 140b have functions as source electrodes and drain electrodes. Also, the insulator 150 has a function as a gate insulator. The conductor 16 0 has a function as a gate electrode.

[0367] In this configuration, regardless of the size of the opening, the width of the oxide semiconductor 130 can be controlled by the film thickness. Therefore, a fine transistor can be easily provided.

[0368] Also, in this configuration, compared with the configuration described in the previous embodiment, the channel formation region is approximately twice as large, so the on characteristics are improved, and the controllability of the transistor can be improved. Furthermore, three sides of the channel formation region are surrounded by the conductor 160 via the insulator 150. That is, an electric field can be applied to at least three sides of the channel formation region of the oxide semiconductor 130 by the electric field generated from the conductor 160. Therefore, in this structure, a large current can flow between the source and drain of the transistor, and the on current can be increased. Also, since an electric field is applied from at least three sides to the region where the channel is formed, a transistor with a leakage current suppressed due to the punch-through phenomenon can be provided. It is possible.

[0369] ​ In the oxide semiconductor 130, the larger the side surface facing the conductor 160, the larger the channel formation region becomes, and the on-current of the transistor can be increased. Further, the oxide The thinner the width of the semiconductor 130, the higher the ratio of the region with high carrier controllability, so the sub threshold swing value can be reduced.

[0370] Therefore, for example, it is preferable that the height at which the oxide semiconductor 130 faces the conductor 160 via the insulator 150 is three times or more the width of the oxide semiconductor 130. With this configuration a transistor with a small subthreshold swing value and good on characteristics can be provided. Specifically, for example, the height H of the oxide semiconductor 130 may be 1 0 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and even more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example the height H of the oxide semiconductor 130 may be 300 nm or less, preferably 200 nm or less more preferably 150 nm or less.

[0371] In addition, since the transistor 100 has a structure in which the conductor 140a and the conductor 140b and the conductor 160 almost do not overlap, the parasitic capacitance related to the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency.

[0372] Also, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor, depending on the etching conditions, the resist mask may disappear during etching. In addition, it is difficult to etch the difficult-to-etch material without residue, and microfabrication is difficult. It is difficult. Therefore, by fabricating an oxide semiconductor in an opening formed in an insulator, a fine island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, thereby preventing the occurrence of etching residues and residues in the oxide semiconductor. Thus, a fine island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, thereby preventing the occurrence of etching residues and residues in the oxide semiconductor. Thus, a fine island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, thereby preventing the occurrence of etching residues and residues in the oxide semiconductor. Thus, a fine island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, thereby preventing the occurrence of etching residues and residues in the oxide semiconductor.

[0373] From the above, even with a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics between transistors and a high integration degree can be provided. From the above, even with a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics between transistors and a high integration degree can be provided. From the above, even with a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics between transistors and a high integration degree can be provided. From the above, even with a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics between transistors and a high integration degree can be provided.

[0374] <Modified Example 13 of Semiconductor Device> Hereinafter, a modified example of the transistor 100 will be described with reference to FIG. 49. Note that components denoted by the same reference numerals as those of the transistor 100 shown in the manufacturing method 5 of the semiconductor device can be considered in the manufacturing method 5 of the semiconductor device. Hereinafter, a modified example of the transistor 100 will be described with reference to FIG. 49. Note that components denoted by the same reference numerals as those of the transistor 100 shown in the manufacturing method 5 of the semiconductor device can be considered in the manufacturing method 5 of the semiconductor device. Hereinafter, a modified example of the transistor 100 will be described with reference to FIG. 49. Note that components denoted by the same reference numerals as those of the transistor 100 shown in the manufacturing method 5 of the semiconductor device can be considered in the manufacturing method 5 of the semiconductor device.

[0375] First, an oxide semiconductor 130a is formed on an insulator 110, and an insulator 120A is formed on the oxide semiconductor 130a. Note that the oxide semiconductor 130a can be formed using the same process as that of the oxide semiconductor 130A. First, an oxide semiconductor 130a is formed on an insulator 110, and an insulator 120A is formed on the oxide semiconductor 130a. Note that the oxide semiconductor 130a can be formed using the same process as that of the oxide semiconductor 130A. First, an oxide semiconductor 130a is formed on an insulator 110, and an insulator 120A is formed on the oxide semiconductor 130a. Note that the oxide semiconductor 130a can be formed using the same process as that of the oxide semiconductor 130A.

[0376] Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, the oxide semiconductor formed in a later process Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, the oxide semiconductor formed in a later process Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, the oxide semiconductor formed in a later process Subsequently, using a resist mask, unnecessary portions of the insulator 120A are removed to expose the oxide semiconductor 130a. At this time, the oxide semiconductor 130a also functions as a stopper film. By using the oxide semiconductor 130a as a stopper film, variations in the height of the opening can be suppressed. By making the shapes of the openings uniform, the oxide semiconductor formed in a later process Since the variation in the size of the body is reduced, a highly reliable transistor can be provided. can.

[0377] Subsequently, using the same process as in the manufacturing method 5 of the semiconductor device, an oxide semiconductor 130b is formed in the opening provided in the insulator 120A. That is, an oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with fewer impurities than the oxide semiconductor 130a, and the diffusion of impurities from the lower layer can be prevented. at the opening provided in the insulator 120A. That is, an oxide semiconductor 130b is formed in contact with the oxide semiconductor 130a. Therefore, the oxide semiconductor 130b is formed with fewer impurities than the oxide semiconductor 130a, and the diffusion of impurities from the lower layer can be prevented. 0a, and the diffusion of impurities from the lower layer can be prevented. 0a, and the diffusion of impurities from the lower layer can be prevented. can be.

[0378] Next, using the same process as in the manufacturing method 5 of the semiconductor device, the insulator 120B is removed to expose the side surface of the oxide semiconductor 130. At this time, by leaving a part of the oxide semiconductor 130 embedded in the insulator 120, it is possible to suppress the collapse of the oxide semiconductor 130 in the subsequent process. Next, using the same process as in the manufacturing method 5 of the semiconductor device, the insulator 120B is removed to expose the side surface of the oxide semiconductor 130. At this time, by leaving a part of the oxide semiconductor 130 embedded in the insulator 120, it is possible to suppress the collapse of the oxide semiconductor 130 in the subsequent process. embedded in the insulator 120, it is possible to suppress the collapse of the oxide semiconductor 130 in the subsequent process. can be suppressed.

[0379] Next, using the same process as in the manufacturing method 5 of the semiconductor device, a conductor 140a, a conductor 140b, and an insulator 170 having an opening are formed. Next, using the same process as in the manufacturing method 5 of the semiconductor device, a conductor 140a, a conductor 140b, and an insulator 170 having an opening are formed.

[0380] Subsequently, an oxide semiconductor 130C that becomes the oxide semiconductor 130c, an insulator 150A that becomes the insulator 150, and a conductor 160A that becomes the conductor 160 are formed in the opening formed in the insulator 170. Subsequently, an oxide semiconductor 130C that becomes the oxide semiconductor 130c, an insulator 150A that becomes the insulator 150, and a conductor 160A that becomes the conductor 160 are formed in the opening formed in the insulator 170. A are formed.

[0381] The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-current of the transistor, the thickness of the oxide semiconductor 130C is preferably as small as possible. For example, less than 20 nm, preferably 10 nm or more. The oxide semiconductor 130C can be formed in the same manner as the oxide semiconductor 130a and the oxide semiconductor 130b. In order to increase the on-current of the transistor, the thickness of the oxide semiconductor 130C is preferably as small as possible. For example, less than 20 nm, preferably 10 nm or more. For example, less than 20 nm, preferably 10 nm or more. The oxide semiconductor 130C may have a thickness of 5 nm or less, and more preferably has a thickness of 5 nm or less. On the other hand, the oxide semiconductor 130C is adjacent to the oxide semiconductor 130b in which the channel is formed. Blocks elements other than oxygen that make up the insulator (hydrogen, silicon, etc.) from entering Therefore, it is preferable that the oxide semiconductor 130C has a certain thickness. For example, it is 0.3 nm or more, preferably 1 nm or more, and more preferably 2 nm or more. The oxide semiconductor 130C may have a thickness of 100 nm or more. The insulating layer 140 is formed on the substrate 190 or on an insulator interposed between the substrate 190 and the oxide semiconductor 130b. In order to suppress the outward diffusion of oxygen released from the I wish.

[0382] In other words, by forming a thin oxide semiconductor 130c on the oxide semiconductor 130b, It is also possible to suppress the diffusion of impurities from the upper layer of the oxide semiconductor 130 to the oxide semiconductor 130b. The oxide semiconductor 130b having reduced impurities can be used as a channel formation region. By forming a transistor, a highly reliable semiconductor device can be provided.

[0383] Next, in the same manner as in the semiconductor device manufacturing method 5, the insulator 170 is exposed by a CMP process or the like. The conductor 160A, the insulator 150A, and a portion of the oxide semiconductor 130C are removed until The oxide semiconductor 130c, the insulator 150, and the conductor 160 are formed. 70 may be used as a stopper layer, reducing the thickness of insulator 170. .

[0384] Through the above steps, the transistors shown in Figs. 49(A), 49(B) and 49(C) are produced. The Ta 100 can be fabricated.

[0385] FIG. 49(A) shows an example of a top view of the transistor 100. Note that FIGS. 49(B) and FIG. 49(C) are cross-sectional views corresponding to the dashed-dotted lines X1-X2 and Y1-Y2 shown in FIG. 49(A).

[0386] In the transistor 100, the oxide semiconductor 130b functions as a channel formation region. Also, the conductor 140a and the conductor 140b function as a source electrode and a drain electrode, respectively. Further, the insulator 150 functions as a gate insulator. The conductor 160 functions as a gate electrode.

[0387] In this configuration, regardless of the size of the opening, the width of the oxide semiconductor 130b can be controlled by the film thickness. Therefore, a fine transistor can be easily provided.

[0388] Also, in this configuration, since the channel formation region can be made large and the surface area of the channel formation region can be widely formed, a transistor with high on characteristics and good controllability can be provided. Furthermore, in the oxide semiconductor 130b, a channel may be formed in a region facing or overlapping the conductor 160 via the insulator 150. In this configuration, in the oxide semiconductor 130 b, the channel formation region is surrounded by the conductor 160 via the insulator 150.

[0389] With this configuration, an electric field can be applied from at least three sides of the region where the channel of the oxide semiconductor 130b is formed by the electric field generated from the conductor 160. Therefore, with this structure can allow a large current to flow between the source and drain of the transistor, increasing the on-current This is possible. Also, an electric field is applied to the region where the channel is formed from at least three sides Therefore, it is possible to provide a transistor in which the leakage current caused by the punch-through phenomenon is suppressed This is possible.

[0390] Note that in the oxide semiconductor 130b, the larger the area of the surface facing the conductor 160 via the insulator 150, the larger the channel formation region, and the higher the on-current of the transistor can be This is possible. Also, in the oxide semiconductor 130b, the thinner the width of the channel formation region, the higher the ratio of the region with high carrier controllability, so the subthreshold swing value can be reduced This is possible. This is possible. This is possible.

[0391] For example, in the oxide semiconductor 130b, it is preferable that the height of the channel formation region is three times or more the width of the channel formation region By making the height of the channel formation region three times or more the width of the channel formation region, a transistor with a small subthreshold swing value and good on characteristics can be provided This is possible. This is possible.

[0392] Since a high on-current can be obtained, this structure can be said to be a structure suitable for a miniaturized transistor Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a channel length in a region of 40 nm or less, more preferably 30 nm or less, and even more preferably 2 0 nm or less, and the transistor preferably has a channel width in a region of 40 nm or less This is possible. 0 nm or less, and the transistor preferably has a channel width in a region of 40 nm or less This is possible.

[0393] The transistor 100 includes a conductor 140a, a conductor 140b, and a conductor 160. Since the conductor 160 has a structure in which the conductors 160 overlap little, the parasitic capacitance associated with the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency.

[0394] In addition, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor, In this case, depending on the etching conditions, the resist mask may disappear during etching. In addition, it is difficult to etch difficult-to-etch materials without leaving any residue. By forming an oxide semiconductor in the opening formed in the substrate, In addition, the insulating layer 14 is formed on the periphery of the oxide semiconductor. By removing the oxide semiconductor, the island-shaped semiconductor is exposed, and the etching residue of the oxide semiconductor and the residue are removed. The occurrence of the above can be prevented.

[0395] From the above, it is possible to produce transistors with stable electrical characteristics and high operating speeds even with a fine structure. In addition, by using the transistor, it is possible to provide a It is possible to provide a semiconductor device having small variations in size and characteristics and a high degree of integration. can.

[0396] <Modification 14 of the semiconductor device> Modifications of the transistor 100 will be described below with reference to FIGS. 50 and 51. Note that components denoted by the same reference numerals as those in the transistor 100 in the method for manufacturing a semiconductor device 5 are Method 5 for manufacturing a semiconductor device can be referred to for this embodiment.

[0397] First, as shown in FIG. 38 to FIG. 41 of the semiconductor device manufacturing method 5, an insulating The insulating layer 110, the film 115, the insulator 120B, the oxide semiconductor 130, and the insulator 125B are formed. Complete.

[0398] Next, as shown in FIG. 50(A), FIG. 50(B) and FIG. 50(C), the insulator 120B and By removing the insulator 125A, all side surfaces of the oxide semiconductor 130 are exposed. Since the film 115 can be used as a stopper film, the entire side of the oxide semiconductor 130 can be In this step, all the side surfaces of the oxide semiconductor 130 are exposed. By this, the area facing the conductor 160 is increased through the insulator 150 to be formed in a later step. Therefore, the region that will become the channel length can be efficiently formed.

[0399] Next, the process after exposing the oxide semiconductor 130 is the same as that of the semiconductor device manufacturing method 5. Through the steps, a transistor 10 shown in FIG. 51(A), FIG. 51(B), and FIG. 51(C) is obtained. 0 can be created.

[0400] FIG. 51A illustrates an example of a top view of the transistor 100. FIG. 51C is a cross-sectional view corresponding to the dashed lines X1-X2 and Y1-Y2 shown in FIG. FIG.

[0401] In the transistor 100, the oxide semiconductor 130 functions as a channel formation region. The conductor 140a and the conductor 140b are a source electrode and a drain electrode. The insulator 150 also functions as a gate insulator. The conductor 160 functions as a gate electrode.

[0402] In this configuration, regardless of the size of the opening, the width of the oxide semiconductor 130 can be controlled by the film thickness. Therefore, a fine transistor can be easily provided.

[0403] Also, in this configuration, since the channel formation region can be made large and the surface area of the channel formation region can be widened, a transistor with high on characteristics and good controllability can be provided. Furthermore, in the oxide semiconductor 130, a channel may be formed in a region facing or overlapping with the conductor 160 via the insulator 150. In this configuration, regarding the oxide semiconductor 130, the channel formation region is surrounded by the conductor 160 via the insulator 150.

[0404] With this configuration, an electric field can be applied from at least three sides of the region where the channel of the oxide semiconductor 130 is formed by the electric field generated from the conductor 160. Therefore, in this structure, a large current can flow between the source and drain of the transistor, and the on-current can be increased.

[0405] Also, since an electric field is applied from at least three sides to the region where the channel is formed, a transistor in which the leakage current caused by the punch-through phenomenon is suppressed can be provided.

[0406] Note that in the oxide semiconductor 130, the larger the side surface facing the conductor 160 via the insulator 150, the larger the channel formation region, and the on-current of the transistor can be increased.

[0406] Also, in the oxide semiconductor 130, the smaller the width of the channel formation region, the larger the ratio of the region with high carrier controllability, and thus the subthreshold swing value can be decreased.

[0406] Therefore, since this configuration can form a channel formation region over a wide range on the side surface of the oxide semiconductor 130, a transistor with good on characteristics can be provided. Also, for example, the height of the oxide semiconductor 130 may be 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and still more preferably 50 nm or more. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130 may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. Since a high on-current can be obtained, this structure can be said to be a structure suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a channel length in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a channel width in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. Also, since the oxide semiconductor 130 has a height of 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and still more preferably 50 nm or more, a transistor with good on characteristics can be provided. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130 may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. Furthermore, since a high on-current can be obtained, this structure is suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a channel length in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a channel width in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. Moreover, since the oxide semiconductor 130 has a height of 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and still more preferably 50 nm or more, a transistor with good on characteristics can be provided. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130 may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. In addition, since a high on-current can be obtained, this structure is suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a channel length in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a channel width in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. Also, since the oxide semiconductor 130 has a height of 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and still more preferably 50 nm or more, a transistor with good on characteristics can be provided. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130 may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less.

[0407] Since a high on-current can be obtained, this structure can be said to be a structure suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a channel length in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a channel width in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a channel length in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a channel width in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. For example, since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. The transistor preferably has a channel length in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a channel width in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. Also, since the oxide semiconductor 130 has a height of 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and still more preferably 50 nm or more, a transistor with good on characteristics can be provided. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130 may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less. In addition, since a high on-current can be obtained, this structure is suitable for a miniaturized transistor. Since the transistor can be miniaturized, the semiconductor device having the transistor can be made into a highly integrated and high-density semiconductor device. For example, the transistor preferably has a channel length in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less, and the transistor preferably has a channel width in a region of 40 nm or less, more preferably 30 nm or less, and still more preferably 20 nm or less. Moreover, since the oxide semiconductor 130 has a height of 10 nm or more, preferably 20 nm or more, more preferably 30 nm or more, and still more preferably 50 nm or more, a transistor with good on characteristics can be provided. However, since the productivity of the semiconductor device may decrease, for example, the height of the oxide semiconductor 130 may be 300 nm or less, preferably 200 nm or less, more preferably 150 nm or less.

[0408] Also, since the transistor 100 has a structure in which the conductors 140a and 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 can be reduced. That is, the transistor 100 has a high operating frequency. In addition, since the transistor 100 has a structure in which the conductors 140a and 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 can be reduced. Thus, the transistor 100 has a high operating frequency. Furthermore, since the transistor 100 has a structure in which the conductors 140a and 140b and the conductor 160 hardly overlap, the parasitic capacitance related to the conductor 160 can be reduced. Therefore, the transistor 100 has a high operating frequency.

[0409] Also, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor, depending on the etching conditions, the resist mask may disappear during etching. Moreover, when an In-Sn-Zn-O film, which is a difficult-to-etch material, is used as the oxide semiconductor, depending on the etching conditions, the resist mask may disappear during etching. Yes. Further, it is difficult to etch a difficult-to-etch material without residue. Therefore, by forming an oxide semiconductor in the opening formed in the insulator, an island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, so that etching residue of the oxide semiconductor and generation of residue can be prevented. In the opening formed in the insulator, by fabricating an oxide semiconductor, an island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, so that etching residue of the oxide semiconductor and generation of residue can be prevented. In the opening formed in the insulator, by fabricating an oxide semiconductor, an island-shaped oxide semiconductor can be formed without using a resist mask. Also, by removing the insulator around the oxide semiconductor, the island-shaped semiconductor is exposed, so that etching residue of the oxide semiconductor and generation of residue can be prevented.

[0410] As described above, even for a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics between transistors and a high integration degree can be provided. As described above, even for a fine structure, a transistor having stable electrical characteristics and a high operating speed can be provided. Also, by using the transistor, a semiconductor device with small variations in size and characteristics between transistors and a high integration degree can be provide...

Claims

1. A plurality of circuits arranged in a matrix form are included, One of the circuits includes at least a first transistor having silicon in a channel formation region, a second transistor having an oxide semiconductor in a channel formation region, a third transistor having an oxide semiconductor in a channel formation region, and a capacitor; the second transistor and the third transistor each have a first gate and a second gate; a gate of the first transistor, one of a source and a drain of the second transistor, one of a source and a drain of the third transistor, and one of an electrode of the capacitor are electrically connected to each other; a first conductive layer that functions as a gate of the first transistor; a first insulating layer having a region overlying the first conductive layer; a second conductive layer having a region located above the first insulating layer and functioning as a first gate of the second transistor; a third conductive layer having a region located above the first insulating layer and functioning as a first gate of the third transistor; an oxide semiconductor layer including a region overlapping with the second conductive layer and a region overlapping with the third conductive layer, a channel formation region of the second transistor, and a channel formation region of the third transistor; a fourth conductive layer having the same material as the second conductive layer and the third conductive layer; a second insulating layer having a region in contact with an upper surface of the second conductive layer, a region in contact with an upper surface of the third conductive layer, and a region in contact with an upper surface of the fourth conductive layer; the first conductive layer is electrically connected to the oxide semiconductor layer via the fourth conductive layer.

2. A plurality of circuits arranged in a matrix form are included, One of the circuits includes at least a first transistor having silicon in a channel formation region, a second transistor having an oxide semiconductor in a channel formation region, a third transistor having an oxide semiconductor in a channel formation region, and a capacitor; the second transistor and the third transistor each have a first gate and a second gate; a gate of the first transistor, one of a source and a drain of the second transistor, one of a source and a drain of the third transistor, and one of an electrode of the capacitor are electrically connected to each other; a first conductive layer that functions as a gate of the first transistor; a first insulating layer having a region overlying the first conductive layer; a second conductive layer having a region located above the first insulating layer and functioning as a first gate of the second transistor; a third conductive layer having a region located above the first insulating layer and functioning as a first gate of the third transistor; an oxide semiconductor layer including a region overlapping with the second conductive layer and a region overlapping with the third conductive layer, a channel formation region of the second transistor, and a channel formation region of the third transistor; a fourth conductive layer having the same material as the second conductive layer and the third conductive layer; a second insulating layer having a region in contact with an upper surface of the second conductive layer, a region in contact with an upper surface of the third conductive layer, and a region in contact with an upper surface of the fourth conductive layer; the first conductive layer is electrically connected to the oxide semiconductor layer via the fourth conductive layer; The fourth conductive layer has a region overlapping with the first conductive layer.

3. In claim 1 or 2, The semiconductor device, wherein the first transistor is a p-channel transistor.

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