Power source device and image forming apparatus

Abstract

To reduce overvoltage to a control unit when an output voltage is not output.SOLUTION: A power source device includes a power source circuit, a current detection circuit, and a control unit. The control unit may include an AD converter that reads an output signal, determination means for determining whether or not overvoltage can be applied to an input terminal of the AD converter, and a protective circuit that protects the input terminal of the AD converter against the overvoltage. If overvoltage can be applied to the input terminal of the AD converter, the control unit controls the protective circuit to reduce the voltage applied to the input terminal of the AD converter.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a power supply device and an image forming apparatus.

Background Art

[0002] Electrophotographic image forming apparatuses utilize various high voltages. Therefore, a power supply device capable of outputting a high voltage is required. According to Patent Document 1, a power supply device having a circuit for detecting a current flowing from a positive high voltage power supply and a circuit for detecting a current flowing from a negative high voltage power supply has been proposed.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, in order to accurately control the output of a power supply device, it is required to detect a current with high resolution. For example, in order to improve the resolution while maintaining the detection range of a current detection circuit, it is required to increase the detection resistance of the current detection circuit and raise the reference voltage of the current detection circuit. However, when the reference voltage of the current detection circuit is higher than the power supply voltage for a central processing unit (CPU), problems may occur. That is, when the power supply device is not outputting a high voltage, a voltage equal to or higher than the power supply voltage for the CPU is applied to the CPU. As a result, damage or destruction of the CPU may occur. Therefore, an object of the present invention is to reduce an overvoltage applied to a control unit when an output voltage is not being output.

Means for Solving the Problems

[0005] The present invention is, for example, a power circuit that generates an output voltage, and a current detection circuit that detects a current flowing through a load to which the output voltage is applied A control unit that controls the power supply circuit based on an output signal output from the current detection circuit, and the control unit includes an AD converter that reads the output signal, a determination means for determining whether an overvoltage can be applied to the input terminal of the AD converter, and a protection circuit that protects the input terminal of the AD converter from the overvoltage, and has When the determination means determines that the overvoltage can be applied to the input terminal of the AD converter, the control unit controls the protection circuit to reduce the voltage applied to the input terminal of the AD converter, aiming at a power supply device.

Advantages of the Invention

[0006] According to the present invention, it is possible to reduce the overvoltage to the control unit when the output voltage is not output.

Brief Description of the Drawings

[0007]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Embodiments for Carrying Out the Invention

[0008] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the invention according to the claims. Although a plurality of features are described in the embodiments, not all of these plurality of features are essential for the invention, and the plurality of features may be arbitrarily combined. Further, in the accompanying drawings, the same or similar configurations are denoted by the same reference numerals, and redundant descriptions are omitted.

[0009] <Example 1> (1) Image forming apparatus As shown in FIG. 1, the image forming apparatus 101 includes a feeding unit 102, a conveyance path 111, an image forming unit 103, a transfer unit 104, a fixing unit 105, and a discharging unit 106. The feeding unit 102 includes a feeding tray 121 and a feeding roller 122. The feeding tray 121 can accommodate a large number of sheets S to be printed. The feeding roller 122 feeds the sheets S accommodated in the feeding tray 121 to the conveyance path 111. The sheet S is conveyed along the conveyance path 111 and is conveyed to the transfer unit 104.

[0010] The image forming unit 103 includes a photosensitive drum 131, a charging roller 132a, a developing roller 133a, a toner supply roller 134a, a developing blade 135a, a toner container 136, a laser scanner 137, and the like. The charging circuit 132b of the power supply device 200 is a power supply circuit that generates a high voltage (charging voltage) and applies it to the charging roller 132a. The current detection circuit 132c is connected in series between the charging circuit 132b and the frame ground (GND), and detects the current flowing through the charging roller 132a, which is a load. The charging roller 132a charges the surface of the photosensitive drum 131. The photosensitive drum 131 is an image carrier that rotates while carrying an electrostatic latent image or a toner image. The laser scanner 137 irradiates the surface of the photosensitive drum 131 with laser light according to the image data, and forms an electrostatic latent image corresponding to the image data. The laser scanner 137 may also be called an exposure device or an optical scanning device. Instead of the laser scanner 137, a solid-state exposure device using a plurality of light-emitting diodes may be employed.

[0011] The developing circuit 133b is a power supply circuit that generates a high voltage (developing bias) and applies it to the developing roller 133a. The toner supply roller circuit 134b is a power supply circuit that generates a high voltage and applies it to the toner supply roller 134a. The blade circuit 135b generates a high voltage and applies it to the developing blade 135a. As a result, the toner contained in the toner container 136 is applied to the developing roller 133a by the toner supply roller 134a, and the toner applied to the developing roller 133a is leveled by the developing blade 135a. The developing roller 133a develops the electrostatic latent image by adhering the toner to the surface of the photosensitive drum 131, thereby forming a toner image. As the photosensitive drum 131 rotates, the toner image is conveyed to the transfer unit 104.

[0012] The transfer unit 104 includes a transfer roller 141a, a transfer positive circuit 141b, and a transfer negative circuit 141c. The transfer positive circuit 141b is a power supply circuit that applies a high voltage of positive polarity to the transfer roller 141a to promote the transfer of the toner image from the photosensitive drum 131 to the sheet S. The transfer negative circuit 141c is an optional power supply circuit that applies a high voltage of negative polarity to the transfer roller 141a. The transfer negative circuit 141c re-transfers the toner adhering to the transfer roller 141a to the photosensitive drum 131 to clean the transfer roller 141a. Note that the transfer positive circuit 141b and the transfer negative circuit 141c are connected in series between the transfer roller 141a and GND. The transfer negative circuit 141c and the transfer positive circuit 141b may be connected in parallel. In this case, a switch for selecting the high-voltage power supply connected to the transfer roller 141a between the transfer negative circuit 141c and the transfer positive circuit 141b may be adopted. Note that the transfer negative circuit 141c may be omitted. The transfer roller 141a is arranged to oppose and in contact with the photosensitive drum 131. The fixing unit 105 includes a fixing roller 151 and a pressure roller 152. The fixing roller 151 has a heater and heats the toner image and the sheet S. The pressure roller 152 presses the toner image and the sheet S passing through the fixing nip formed by the fixing roller 151 and the pressure roller 152. Thereby, the toner image is fixed on the sheet S.

[0013] The discharging unit 106 includes a discharging roller 161 and a discharging tray 162. The discharging roller 161 discharges the sheet S conveyed from the fixing unit 105 to the discharging tray 162.

[0014] (2) Image forming process Here, it is assumed that the toner is charged negatively. If the toner is charged positively, the polarities described below are reversed.

[0015] (2-1) Charging process The charging circuit 132b applies a negative high voltage to the charging roller 132a, and the charging roller 132a charges the surface of the photosensitive drum 131. Here, the roller charging method is adopted, but a wire charging method or the like may also be used. The charging roller 132a and the photosensitive drum 131 face each other with a slight gap therebetween. Discharge occurring in the gap charges the surface of the photosensitive drum 131.

[0016] (2-2) Exposure process The laser scanner 137 irradiates the photosensitive drum 131 with laser light according to the image data to form an electrostatic latent image on the surface of the photosensitive drum 131.

[0017] (2-3) Development process The toner stored in the toner container 136 is agitated and charged negatively. The toner supply roller circuit 134b applies a negative high voltage to the toner supply roller 134a. As a result, the toner moves to the surface of the developing roller 133a and adheres to the surface. The height of the toner group adhering to the surface of the developing roller 133a may be non-uniform. The blade circuit 135b applies a negative high voltage to the developing blade 135a, and the developing blade 135a levels the toner group. The developing roller 133a uses the negative high voltage applied from the developing circuit 133b to move the toner to the surface of the photosensitive drum 131. As a result, the electrostatic latent image is developed and a toner image is formed. Here, the absolute value of the output voltage of the toner supply roller circuit 134b is larger than the absolute value of the output voltage of the developing circuit 133b. This makes it easier for the negatively charged toner to move to the developing roller 133a. The absolute value of the output voltage of the blade circuit 135b is larger than the absolute value of the output voltage of the developing circuit 133b. This makes it difficult for the negatively charged toner to adhere to the developing blade 135a. For example, the output voltage of the developing circuit 133b is -300V. The output voltages of the toner supply roller circuit 134b and the blade circuit 135b are each -400V.

[0018] (2-3) Transfer Process When the photosensitive drum 131 and the transfer roller 141a come into contact, a transfer nip is formed. When the sheet S passes through the transfer nip, the toner image is transferred from the photosensitive drum 131 to the sheet S. The transfer positive circuit 141b applies a positive high voltage to the transfer roller 141a.

[0019] (2-4) Fixing Process When the sheet S passes through the fixing nip of the fixing unit 105, heat and pressure are applied to the sheet S and the toner image. As a result, the toner image is fixed on the sheet S.

[0020] Here, a monochrome image forming apparatus 101 is shown, but this is merely an example. The technical idea of the embodiment is also applicable to a full-color image forming apparatus. Further, the image forming apparatus 101 may be any of a printer, a copier, a multifunction device, or a facsimile device.

[0021] (3) Power supply device As shown in FIG. 1, the image forming apparatus 101 has various power supply circuits such as a charging circuit 132b, a developing circuit 133b, a toner supply roller circuit 134b, a blade circuit 135b, a transfer positive circuit 141b, and a transfer negative circuit 141c. Hereinafter, the charging circuit 132b will be described as a representative of these. Note that the description regarding the charging circuit 132b is also applicable to these other power supply circuits.

[0022] FIG. 2 shows a power supply device 200 including the charging circuit 132b and its peripheral circuits. The control unit 201 is, for example, a central processing unit (CPU) or an application specific integrated circuit (ASIC), or a combined control circuit of these. For example, the control unit 201 has a CPU, a plurality of signal transmission circuits (e.g., digital-to-analog converters (DACs)), a plurality of analog-to-digital converters (ADCs), and a timer circuit. The control unit 201 is connected to the charging circuit 132b, a current detection circuit 132c, and a protection circuit 132d. The control unit 201 has various input terminals and output terminals. The CLK terminal outputs a clock signal to the charging circuit 132b. The PRI_VOL_CONT terminal is an output terminal that outputs a control signal to the charging circuit 132b. The PRI_CUR_AD terminal is an input terminal with an ADC that converts the detection result of the current detection circuit 132c from an analog value to a digital value. The PRI_CUR_CONT terminal is an output terminal that outputs a control signal to the protection circuit 132d. The protection circuit 132d is a circuit for protecting the PRI_CUR_AD terminal from overvoltage.

[0023] (3-1) Charging circuit (3-1-1) Switching circuit The charging circuit 132b is a flyback type switching power supply circuit. As shown in FIG. 2, the transformer T11 has a primary winding T11-1 and a secondary winding T11-2. A power supply voltage V1 is applied to one terminal of the primary winding T11-1. The power supply voltage V1 is, for example, 24V. The drain terminal of the FET11 is connected to the other terminal of the primary winding T11-1. The FET11 is a field effect transistor that functions as a switching element. One end of the resistor R12, one end of the resistor R17, and the output terminal of the comparator IC11 are connected to the gate terminal of the FET11. The other end of the resistor R12 is connected to GND. The other end of the resistor R17 is connected to the CLK terminal of the control unit 201. A parallel circuit composed of the capacitor C11 and the resistor R11 and a diode D11 connected in series to this parallel circuit are connected between one terminal and the other terminal of the primary winding T11-1.

[0024] A rectifying and smoothing circuit composed of the diode D12 and the capacitor C12 is connected between one terminal and the other terminal of the secondary winding T11-2. More specifically, the cathode of the diode D12 is connected to one terminal of the secondary winding T11-2 of the transformer T11. The anode of the diode D12 is connected to one terminal of the capacitor C12. The other terminal of the capacitor C12 is connected to the other terminal of the secondary winding T11-2 and the current detection circuit 132c.

[0025] When a Hi-state signal is output from the CLK terminal of the control unit 201, the FET11 turns on, and the potential of the drain terminal of the FET11 drops to approximately the potential of GND. As a result, a voltage is applied across both ends of the primary winding T11-1, and an exciting current flows through the primary winding T11-1. When the voltage output from the CLK terminal changes to the Lo state, the FET11 turns off, and a flyback voltage is generated across both ends of the primary winding T11-1. At the same time, a flyback voltage corresponding to the turns ratio between the primary winding T11-1 and the secondary winding T11-2 is generated in the secondary winding T11-2. As a result, the secondary-side current due to the flyback voltage is rectified and smoothed by the diode D12 and the capacitor C12. Thereby, the charging voltage Vpri is generated.

[0026] The waveform of the voltage output from the CLK terminal of the control unit 201 is a rectangular wave in which the Hi state and the Lo state alternate. In the first embodiment, the frequency of the rectangular wave output from the CLK terminal is, for example, 50 kHz. The duty ratio is, for example, 10%. The frequency and duty ratio of the rectangular wave should be designed according to the specifications required for each power supply circuit. The frequency and duty ratio of the rectangular wave do not have to be fixed values. The frequency and duty ratio of the rectangular wave may be changed depending on the voltage and load to be controlled.

[0027] In this way, by repeatedly turning on / off (switching) the FET 11, a flyback voltage is generated in the secondary winding T11-2. The secondary-side current based on the flyback voltage is rectified and smoothed by the diode D12 and the capacitor C12. As a result, a DC charging voltage Vpri is generated across the capacitor C12.

[0028] (3-1-2) Feedback circuit The charging circuit 132b performs feedback control in order to stably control the charging voltage Vpri to a desired value. The charging voltage Vpri is a very high voltage. Therefore, a voltage dividing circuit composed of the resistor R14 and the resistor R13 divides the charging voltage Vpri and generates a detection voltage proportional to the charging voltage Vpri. One end of the resistor R14 is connected to the anode of the diode D12. The other end of the resistor R13 is connected to the positive input terminal (non-inverting input terminal) of the comparator IC11 and one end of the resistor R13. The other end of the resistor R13 is connected to the power supply voltage V2. The power supply voltage V2 is, for example, 5V. In this way, the connection point of the resistor R14 and the resistor R13 is connected to the positive input terminal of the comparator IC11. The negative input terminal (inverting input terminal) of the comparator IC11 is connected to the power supply voltage V2 via the resistors R16 and R15. Further, the negative input terminal of the comparator IC11 is connected to the GND via the capacitor C16. The connection point of the resistors R15 and R16 is connected to the PRI_VOL_CONT terminal of the control unit 201.

[0029] The output terminal of the comparator IC11 is connected to the gate terminal of the FET11. A pulse signal that alternately repeats a high-impedance state (hereinafter referred to as Hi-Z) and a Lo state is output from the PRI_VOL_CONT terminal. When the PRI_VOL_CONT terminal is in the Hi-Z state, current flows from the power supply voltage V2 through the resistors R15 and R16 into the capacitor C16. As a result, the capacitor C16 is charged. On the other hand, when the PRI_VOL_CONT terminal is in the Lo state, current flows from the capacitor C16 through the resistor R16 toward the PRI_VOL_CONT terminal so that the capacitor C16 is discharged. When the PRI_VOL_CONT terminal repeats the Hi-Z state and the Lo state, the charging and discharging of the capacitor C16 are balanced, and the voltage between the two terminals of the capacitor C16 stabilizes at a predetermined voltage. Therefore, the voltage of the negative input terminal of the comparator IC11 is determined according to the duty ratio of the pulse signal output from the PRI_VOL_CONT terminal. The control unit 201 can control the charging voltage Vpri by adjusting the duty ratio of the pulse signal output from the PRI_VOL_CONT terminal.

[0030] During the period when the charging voltage Vpri is being output, a detection voltage (feedback voltage) proportional to the charging voltage Vpri is applied to the comparator IC11. When the voltage of the negative input terminal of the comparator IC11 is lower than the voltage of the positive input terminal (detection voltage), the output terminal of the comparator IC11 becomes Hi-Z. The signal output from the CLK terminal of the control unit 201 directly drives the FET11 to be turned on / off. On the other hand, when the voltage of the negative input terminal of the comparator IC11 is higher than the voltage of the positive input terminal, the output terminal of the comparator IC11 becomes Lo. The current output from the CLK terminal is induced to GND by the output terminal of the comparator IC11. Therefore, the voltage of the gate terminal of the FET11 is forced to be Lo. Originally, since the FET11 cannot be turned on at the timing when it should be turned on, the decrease in the absolute value of the charging voltage Vpri is promoted. By this operation, the charging voltage Vpri is feedback-controlled to the desired target voltage.

[0031] Since the feedback circuit centered on the comparator IC11 is provided in this way, a stable charging voltage Vpri is generated and applied to the charging roller 132a. The resistor R132 may be inserted between the charging circuit 132b and the charging roller 132a as needed to limit the output current. In the first embodiment, the charging voltage Vpri is, for example, -1000V.

[0032] (3-2) Current detection circuit As shown in FIG. 2, the current detection circuit 132c is a circuit that detects the current supplied from the charging circuit 132b to the charging roller 132a (hereinafter referred to as the charging current Ipri). The control unit 201 may control the charging voltage Vpri so that the charging current Ipri reaches the target value. That is, the control unit 201 adjusts the duty ratio of the pulse signal output from the PRI_VOL_CONT terminal so that the difference between the charging current Ipri and the target value becomes small. The protection circuit 132d is a circuit that makes it difficult for an overvoltage to be applied to the PRI_CUR_AD terminal of the control unit 201.

[0033] The connection point between the secondary winding T11-2 and the capacitor C12 is connected to the negative input terminal of the operational amplifier IC12 via the resistors R18 and R19. The positive input terminal of the operational amplifier IC12 is connected to the power supply voltage V2 via the resistors R20 and R21. The connection point between the resistors R20 and R21 is connected to GND via the resistor R22. The output terminal of the operational amplifier IC12 is connected to GND via the resistors R23 and R24. The connection point between the resistors R23 and R24 is connected to the PRI_CUR_AD terminal of the control unit 201 via the resistor R25. A resistor R26 is connected between the PRI_CUR_AD terminal and the PRI_CUR_CONT terminal of the control unit 201. The PRI_CUR_AD terminal is connected to GND via the capacitor C17. The connection point between the resistors R18 and R19 is connected to the connection point of the resistors R23, R24, and R25 via a parallel circuit consisting of the resistor R27 and the capacitor C18. The capacitor C18 is provided to suppress oscillation. The voltage at the connection point of the resistors R23, R24, R25, and R27 is denoted as Visns.

[0034] The charging current Ipri generated in the secondary winding T11-2 flows to GND via the resistor R18, the resistor R27, and the resistor R24. Further, the charging current Ipri refluxes to the secondary winding T11-2 via another GND through a metal housing or the like, through the photosensitive drum 131, the charging roller 132a, the resistor R132, and the diode D12. The voltage generated by dividing the power supply voltage V2 with the resistors R21 and R22 is applied to the positive input terminal of the operational amplifier IC12 as the operating reference voltage of the operational amplifier IC12. The positive input terminal and the negative input terminal of the operational amplifier IC12 have the same potential due to virtual grounding. Therefore, under the condition that the virtual grounding of the operational amplifier IC12 is maintained, Visns is controlled by the voltage stepped down by the resistor R27 according to the magnitude of the charging current Ipri from the operating reference voltage of the operational amplifier IC12. That is, depending on the resistance value of the resistor R27, the amount of voltage drop that changes according to the magnitude of the charging current Ipri changes. Specifically, the larger the resistance value of the resistor R27, the more possible it is to detect a small change in the charging current Ipri (improvement in resolution). When the charging current Ipri is not flowing, Visns becomes the same potential as the operating reference voltage of the operational amplifier IC12. When the PRI_CUR_CONT terminal is controlled to Hi-Z, Visns is applied to the PRI_CUR_AD terminal (detection state). On the other hand, when the PRI_CUR_CONT terminal is controlled to Lo, the voltage generated by dividing Visns with the resistors R25 and R26 is applied to the PRI_CUR_AD terminal (protection state).

[0035] Thus, when detecting the charging current Ipri, the control unit 201 detects the voltage input to the PRI_CUR_AD terminal by controlling the PRI_CUR_CONT terminal to Hi-Z. When not detecting the charging current Ipri, the control unit 201 suppresses the operating reference voltage of the operational amplifier IC12 from being applied to the PRI_CUR_AD terminal by controlling the PRI_CUR_CONT terminal to Lo. Note that the operating reference voltage of the operational amplifier IC12 is, for example, 5V. This is higher than the operating reference voltage (Vcpu = 3V) of the control unit 201.

[0036] (4) Control Method of Embodiment 1 As shown in FIG. 2, the signal line of the PRI_CUR_AD terminal is connected to the PRI_CUR_CONT terminal via the resistor R26. Hereinafter, a method for detecting the charging current Ipri executed by the control unit 201 and a protection method for the PRI_CUR_AD terminal will be described. FIG. 3 is a flowchart showing the control method executed by the control unit 201. FIG. 4 is a diagram for explaining the signals and voltages according to Embodiment 1. The horizontal axis represents time. The vertical axis basically represents voltage.

[0037] In FIG. 4, the control flow has four phases i to iv. Phase i is a preparation phase before the charging voltage Vpri is output and the PRI_CUR_AD terminal is protected. Phase ii is a phase in which the output of the charging voltage Vpri is started and the PRI_CUR_AD terminal is protected. Phase iii is a phase in which the charging voltage Vpri is output and the PRI_CUR_AD terminal is detecting the charging current Ipri. Phase iv is a phase in which the charging voltage Vpri is output and the PRI_CUR_AD terminal is protected.

[0038] Phase ii includes steps (hereinafter abbreviated as S) 301, S302, and S303 shown in FIG. 3. Phase iii includes S304, S305, and S306. Phase iv includes S307.

[0039] In Phase i, the control unit 201 sets the initial state of the PRI_CUR_CONT terminal to Lo. Visns before executing the process of detecting the charging current Ipri (hereinafter referred to as the detection process) is at the same potential as the operating reference voltage Vref of the operational amplifier IC12. The voltage V_AD applied to the PRI_CUR_AD terminal is the voltage Vad1 generated by dividing Visns (=Vref) with the resistors R25 and R26.

[0040] In phase ii, a process of raising the charging voltage Vpri to the target voltage is started. The control unit 201 executes processing according to the flowchart shown in FIG. 3.

[0041] In S301, the control unit 201 outputs a control signal from the PRI_VOL_CONT terminal such that the charging voltage Vpri becomes the target voltage (e.g., 1000V). That is, the control unit 201 starts (turns on) the output from the PRI_VOL_CONT terminal. As shown in FIG. 4, Visns is controlled by a voltage Vsd that is stepped down from the operating reference voltage Vref (=5V) of the operational amplifier IC12 according to the charging current Ipri. The voltage V_AD is a voltage Vad2 generated by dividing Visns (=Vsd) with resistors R25 and R26.

[0042] In S302, the control unit 201 determines whether the charging current Ipri is equal to or greater than the threshold Ith. Here, the threshold Ith is a threshold for determining that the voltage V_AD applied to the PRI_CUR_AD terminal is within a range where no malfunction occurs in the control unit 201. The range where the control unit 201 does not malfunction refers to a range that is equal to or lower than the power supply voltage of the control unit 201 (the power supply voltage Vcpu for the CPU = 3V) and is 0 or higher. In phase ii, Visns is generated by stepping down the operating reference voltage Vref of the operational amplifier IC12 with resistor R27. Depending on the amount of voltage drop (R27×Ipri) required for Visns to satisfy the above range and the resistance value of resistor R27, the range of the charging current Ipri is uniquely determined. Visns = Vref - R27×Ipri =< 3[V] ···(1) Ipri >= (Vref - 3[V]) / R27 ···(2) The charging voltage Vpri is a negative voltage, and there may be a case where it is necessary to make the absolute value of the charging voltage Vpri greater than |-600V| (e.g., Vpri = -1000V). Even in this case, Visns can satisfy the above range. Therefore, -600V is adopted as the threshold for the charging voltage Vpri. That is, the threshold Ith compared with the charging current Ipri is a value corresponding to -600V.

[0043] A threshold value may be provided for the voltage value applied to the PRI_CUR_AD terminal in the protection state described below. That is, there is no restriction on the setting of the threshold value, and it is sufficient as a threshold value if it can be determined that the charging current Ipri satisfies the range of the formula (2).

[0044] When it is determined in S302 that the charging current Ipri is equal to or greater than the threshold value Ith, the control unit 201 proceeds from S302 to S303. In S303, the control unit 201 controls the PRI_CUR_CONT terminal from Lo to Hi-Z. As a result, the phase shifts from ii to iii. In phase iii, Visns and the voltage V_AD of the PRI_CUR_AD terminal become equal.

[0045] In S304, the control unit 201 detects the output of the current detection circuit 132c, that is, the charging current Ipri, based on the voltage V_AD input to the PRI_CUR_AD terminal (detection process).

[0046] In S305, the control unit 201 determines whether the detection of the charging current Ipri has ended. For example, when the analog-to-digital conversion of the voltage V_AD input to the PRI_CUR_AD terminal is completed and the digital value of the voltage V_AD is obtained, the control unit 201 determines that the detection of the charging current Ipri has ended. The control unit 201 waits for the detection to end and then proceeds from S305 to S306.

[0047] In S306, the control unit 201 controls the PRI_CUR_CONT terminal to Lo. As a result, the phase shifts from iii to iv. The voltage V_AD of the PRI_CUR_AD terminal is controlled to the voltage Vad2 generated by dividing Visns (= Vsd) with the resistors R25 and R26.

[0048] In S307, the control unit 201 stops outputting the control signal from the PRI_VOL_CONT terminal. This corresponds to the PRI_VOL_CONT terminal being controlled to OFF in FIG. 4. Since Visns returns to Vref, the voltage V_AD returns to Vad1.

[0049] According to Embodiment 1, by increasing the resistance R27, it becomes possible to detect the charging current Ipri with high resolution during the period (phase ii) when the high-voltage charging voltage Vpri is output. Also, during the periods when the charging voltage Vpri is not output (phases i, ii, and iv), by dividing Visns with the resistance R25 and the resistance R36, it is possible to suppress the application of an overvoltage to the PRI_CUR_AD terminal of the control unit 201. That is, it is possible to reduce the overvoltage to the control unit when the high voltage is not output with a relatively inexpensive circuit configuration. Also, by increasing the resistance R27, it becomes possible to detect the current with high resolution when the high voltage is output.

[0050] <Embodiment 2> In Embodiment 1, the resistance R25 is connected between the output part of Visns and the PRI_CUR_AD terminal. In order to improve the response characteristics of the PRI_CUR_AD terminal without reducing the capacitance of the capacitor C17 (that is, while maintaining the disturbance resistance), it is effective to reduce the resistance R25. However, in order to reduce the resistance R25 in Embodiment 1, the current that the PRI_CUR_CONT terminal has to draw increases. Therefore, a high driving ability is required for the control unit 201. Thus, in Embodiment 2, a circuit configuration is proposed that can reduce the resistance R25 without requiring a high driving ability for the control unit 201.

[0051] In Embodiment 2, the location where the PRI_CUR_CONT terminal is connected via the resistance R26 is different from that in Embodiment 1. In Embodiment 2, the technical matters different from those in Embodiment 1 are described in detail, and the description of the technical matters equivalent to those in Embodiment 1 is omitted.

[0052] (1) Current detection circuit FIG. 5 shows the power supply device 200 in Embodiment 2. Comparing FIG. 5 with FIG. 2, in the current detection circuit 132c, the location where the PRI_CUR_CONT terminal is connected via the resistor R26 is different. That is, the PRI_CUR_CONT terminal is connected via the resistor R26 to the connection point of the resistors R20, R21, and R22.

[0053] When the control unit 201 controls the PRI_CUR_CONT terminal to Hi-Z, the operating reference voltage Vref of the operational amplifier IC12 becomes the voltage Vref1 generated by dividing the power supply voltage V2 by the resistors R21 and R22. On the other hand, when the control unit 201 controls the PRI_CUR_CONT terminal to Lo, the operating reference voltage Vref of the operational amplifier IC12 becomes the voltage Vref2 generated by dividing the power supply voltage V2 by the parallel connection resistance of the resistors R22 and R26 and the resistor R21.

[0054] In Embodiment 2, the operating reference voltage Vref of the operational amplifier IC12 when the PRI_CUR_CONT terminal is controlled to Hi-Z is designed to be a value suitable for current detection. The control unit 201 detects the output voltage (voltage V_AD) of the current detection circuit 132c at the PRI_CUR_AD terminal during the period when the PRI_CUR_CONT terminal is controlled to Hi-Z.

[0055] On the other hand, when the control unit 201 sets the PRI_CUR_CONT terminal to Lo, the operating reference voltage Vref of the operational amplifier IC12 drops to Vref2, and accordingly Visns also drops. Therefore, the voltage V_AD applied to the PRI_CUR_AD terminal drops. In Embodiment 2, Visns and the voltage V_AD are equal. This is because the resistor R26 is not connected to the signal line of the PRI_CUR_AD terminal.

[0056] (2) Control Flow The control flow of Embodiment 2 is the same as that of Embodiment 1. However, since the voltages to be controlled are different, the differences from Embodiment 1 will be described with reference to FIG. 6.

[0057] Figure 6 shows the transition of each voltage in Example 2. The solid line indicates the voltage V_AD. The dashed line indicates Visns. The dash-dotted line indicates the operating reference voltage Vref.

[0058] In Example 2, Visns and the voltage V_AD of the PRI_CUR_AD terminal are always the same. As shown in Figure 6, the operating reference voltage Vref of the operational amplifier IC12 is variable and is Vref1 or Vref2 (Vref1 > Vref2). That is, if the PRI_CUR_CONT terminal is Lo, the operating reference voltage Vref becomes Vref2. If the PRI_CUR_CONT terminal is Hi-Z, the operating reference voltage Vref becomes Vref1.

[0059] In phase i, the PRI_CUR_CONT terminal is controlled to Lo. Therefore, the operating reference voltage Vref of the operational amplifier IC12 is Vref2. In phase i, Visns and the voltage V_AD are also Vref2.

[0060] In phase ii, the PRI_CUR_CONT terminal is controlled to Lo. Therefore, the operating reference voltage Vref of the operational amplifier IC12 is Vref2. Visns and the voltage Vad are controlled to the voltage Vad2 that is stepped down according to the charging current Ipri from the operating reference voltage Vref (= Vref2) of the operational amplifier IC12.

[0061] In phase iii, the PRI_CUR_CONT terminal is controlled to Hi-Z. Therefore, the operating reference voltage Vref of the operational amplifier IC12 is controlled to the voltage Vref1.

[0062] In phase iv, the PRI_CUR_CONT terminal is controlled to Lo. Therefore, the operating reference voltage Vref of the operational amplifier IC12 is Vref2.

[0063] According to Example 2, the voltage V_AD is always suppressed to 3V or less. Therefore, Example 2 can also achieve the same effect as Example 1. Furthermore, in Example 2, it is possible to reduce the resistance value of the resistor R25 without increasing the driving ability of the control unit 201.

[0064] <Example 3> (1) Basic concept In Embodiments 1 and 2, the control unit 201 determines whether to protect the PRI_CUR_AD terminal based on whether the charging current Ipri is equal to or greater than the threshold value Ith. However, the control unit 201 may also determine whether to protect the PRI_CUR_AD terminal based on other information. That is, the information required for the determination may be any information that can distinguish between the state where protection of the PRI_CUR_AD terminal is necessary (non-detection state) and the detection state of the PRI_CUR_AD terminal. Therefore, in Example 3, an example in which the charging voltage Vpri is used as the information required for the determination is described. Note that, for matters already described in Embodiments 1 and 2 in Example 3, repeated description is omitted. That is, the description in Embodiments 1 and 2 is incorporated into Example 3 by reference.

[0065] (2) Circuit diagram FIG. 7 shows a modified example of the power supply device 200 of Embodiment 1. FIG. 8 shows a modified example of the power supply device 200 of Embodiment 2. According to FIGS. 7 and 8, the charging voltage Vpri is converted into a detection voltage Vpri_sns that can be input by the control unit 201 by a voltage dividing circuit formed by the resistor R31 and the resistor R32. The control unit 201 has a PRI_VOL_AD terminal which is an input terminal of an AD converter. The PRI_VOL_AD terminal is connected to the connection point between the resistor R31 and the resistor R32 and is input with the detection voltage Vpri_sns. Therefore, the control unit 201 determines whether to protect the PRI_CUR_AD terminal based on the voltage value (digital value) obtained by analog-digital conversion of the detection voltage Vpri_sns.

[0066] (3) Flowchart FIG. 9 is a flowchart showing Example 3. Compared with FIG. 3, in FIG. 9, S302 is replaced by S902. In S902, the control unit 201 determines whether the charging voltage Vpri is equal to or higher than the threshold voltage Vth. For example, the control unit 201 compares the detection voltage Vpri_sns proportional to the charging voltage Vpri with the threshold value Vth_sns proportional to the threshold voltage Vth. The detection voltage Vpri_sns being equal to or higher than the threshold value Vth_sns corresponds to the charging voltage Vpri being equal to or higher than the threshold voltage Vth. If the detection voltage Vpri_sns is equal to or higher than the threshold value Vth_sns, the control unit 201 proceeds from S902 to S303. Therefore, the PRI_VOL_AD terminal is changed from the protection state to the detection state. Note that also in Example 3, the initial state is the protection state.

[0067] If the detection voltage Vpri_sns is not equal to or higher than the threshold value Vth_sns, the control unit 201 stays at S902 and maintains the PRI_VOL_AD terminal in the protection state. When the detection of the charging current Ipri is completed, the PRI_VOL_AD terminal is returned from the detection state to the protection state.

[0068] Thereby, Example 3 can exhibit the same effects as Example 1 or Example 2.

[0069] <Example 4> (1) Basic concept In Example 3, modified examples of Examples 1 and 2 were described. Example 4 is another modified example of Examples 1 and 2. In Example 4, the internal state of the control unit 201 is used as information necessary for determining the switching from the protection state to the detection state. That is, the control unit 201 knows whether it is the timing at which the charging current Ipri should be detected based on its own internal state. For example, a predetermined time is required from the timing when the output of the charging voltage Vpri starts to the timing when the charging voltage Vpri stabilizes. That is, the control unit 201 anticipates the timing when the charging voltage Vpri stabilizes, switches the PRI_VOL_AD terminal from the protection state to the detection state, and starts detecting the charging current Ipri. The predetermined time is generally constant. Therefore, the control unit 201 can identify the timing when the charging voltage Vpri stabilizes (the detection timing of the charging current Ipri) by measuring the predetermined time using an internal timer or the like. Regarding matters already described in Examples 1 and 2 in Example 4, repeated explanations are omitted. That is, the explanations in Examples 1 and 2 are incorporated by reference into Example 3.

[0070] (2) Circuit diagram The circuit diagram of Example 4 is as shown in FIG. 2.

[0071] (3) Flowchart FIG. 10 is a flowchart showing Example 4. Compared with FIG. 3, in FIG. 10, S302 is replaced by S1002. In S1002, the control unit 201 determines whether the detection timing of the charging current Ipri has arrived based on the internal state (e.g., the elapsed time from the timing when the output of the charging voltage Vpri starts) managed by the control unit 201. For example, when the elapsed time from the timing when the output of the charging voltage Vpri starts is equal to or more than the predetermined time, the control unit 201 determines that the detection timing of the charging current Ipri has arrived and proceeds from S1002 to S303. Thereby, the PRI_VOL_AD terminal is changed from the protection state to the detection state. If the detection timing of the charging current Ipri has not arrived, the control unit 201 stays at S1002 and maintains the PRI_VOL_AD terminal in the protection state.

[0072] As a result, Example 4 can exhibit the same effects as Examples 1 to 3.

[0073] <Other Examples> In the above-described examples, the PRI_VOL_AD terminal is protected from overvoltage based on the detected value of the charging current Ipri or the detected value of the charging voltage Vpri. However, this is merely an example. For example, the duty ratio of the pulse signal output from the PRI_VOL_CONT terminal is the duty ratio corresponding to the target voltage of the charging voltage Vpri. For example, when the charging voltage Vpri is less than 600V, protection of the PRI_VOL_AD terminal is required. Therefore, a duty ratio corresponding to -600V may be set as a threshold value. In this case, when the duty ratio determined based on the detected value of the charging current Ipri is less than the threshold value corresponding to -600V, the control unit 201 sets the PRI_VOL_AD terminal to the protected state. When the duty ratio determined based on the detected value of the charging current Ipri is greater than or equal to the threshold value corresponding to -600V, the control unit 201 sets the PRI_VOL_AD terminal to the detection state. In this way, the protected state and the detection state may be switched based on the control value (duty ratio) of the charging voltage Vpri.

[0074] In the above-described examples, the control unit 201 executes the determination process for switching between the protected state and the detection state, but the determination process may be executed by a comparison circuit (e.g., a comparator, etc.) built in the control unit 201 or provided outside the control unit 201.

[0075] <Technical Idea Derived from Examples> (Item 1) A power supply circuit that generates an output voltage, A current detection circuit that detects the current flowing through the load to which the output voltage is applied, A control unit that controls the power supply circuit based on an output signal output from the current detection circuit, The control unit, An AD converter that reads the output signal, Determination means for determining whether an overvoltage can be applied to the input terminal of the AD converter; a protection circuit for protecting the input terminal of the AD converter from the overvoltage, and has; When the determination means determines that the overvoltage can be applied to the input terminal of the AD converter, the control unit controls the protection circuit to reduce the voltage applied to the input terminal of the AD converter, a power supply device.

[0076] As shown in FIG. 2 and the like, the charging circuit 132b is an example of a power supply circuit. The charging roller 132a and the photosensitive drum 131 are examples of loads. The PRI_CUR_AD terminal is an example of an AD converter. The control unit 201 is an example of determination means. Note that the determination means may be realized by a comparator provided inside or outside the control unit 201, or may be realized by a logical operation of a CPU provided inside the control unit 201. In this way, the control unit 201 controls the protection circuit 132d to reduce the voltage applied to the input terminal (PRI_CUR_AD terminal) of the AD converter. As a result, the overvoltage to the control unit 201 is reduced when the output voltage (for example, high voltage) is not output. That the overvoltage is applied to the input terminal of the AD converter does not necessarily mean that the overvoltage is actually applied to the input terminal. That is, the determination means determines whether there is a possibility that the overvoltage is applied to the input terminal. (Item 2) The protection circuit includes a voltage dividing circuit that divides the voltage applied to the input terminal; The control unit is configured to control whether to divide the voltage applied to the input terminal by the voltage dividing circuit, the power supply device according to Item 1.

[0077] The resistor R25 and the resistor R26 are examples of a voltage dividing circuit. By using the voltage dividing circuit in this way, the control unit 201 may reduce the voltage applied to the input terminal (PRI_CUR_AD terminal) of the AD converter. That is, it is possible to protect the control unit 201 from overvoltage with a simple circuit configuration. (Item 3) The current detection circuit is; A conversion circuit that converts the current flowing through the load into a detection voltage proportional to the current; a first resistor that is connected between the conversion circuit and the input terminal and forms part of the voltage division circuit; The voltage division circuit has a second resistor with one end connected to the connection portion between the first resistor and the input terminal; The control unit has an output terminal connected to the other end of the second resistor, and is configured to control whether or not the voltage division circuit divides the voltage applied to the input terminal based on a signal output from the output terminal. The power supply device according to item 2.

[0078] The operational amplifier IC12 and the resistor R27 are an example of a conversion circuit that converts current into voltage. The resistor R25 is an example of the first resistor. The resistor R26 is an example of the second resistor. The PRI_VOL_CONT terminal is an example of an output terminal connected to the other end of the second resistor. The control unit 201 may control whether or not the voltage division circuit divides the voltage Visns using a signal (e.g., Lo / Hi-Z) output from the PRI_VOL_CONT terminal. (Item 4) The conversion circuit includes: an operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal; a third resistor connected between the inverting input terminal and the output terminal and determining the resolution of the current detected by the current detection circuit; a reference voltage is supplied from a voltage source to the non-inverting input terminal; the current flows through the inverting input terminal via fourth resistors (R18, R19); The power supply device according to item 3.

[0079] The resistor R27 is an example of the third resistor. The power supply voltage V2 is an example of the voltage source and also an example of the reference voltage. Alternatively, the operating reference voltage Vref generated from the power supply voltage V2 by the resistors R21 and R22 is an example of the reference voltage. The resistors R18, R19 are examples of the fourth resistors. (Item 5) The power supply device according to item 4, wherein a voltage generated by dividing the reference voltage by the voltage dividing circuit is applied to the input terminal during a period in which the control unit does not detect the current using the current detection circuit.

[0080] As illustrated in FIG. 4 and the like, during a period in which currents such as those in phases i, ii, and iv are not detected, (Item 6) The protection circuit is configured to reduce the voltage applied to the input terminal so as to be equal to or lower than the operating voltage of the control unit. The power supply device according to any one of items 1 to 5, which is configured as described above.

[0081] In Embodiments 1 to 4, the protection circuit 132d may control the voltage V_AD applied to the PRI_CUR_AD terminal so as to be equal to or lower than the operating voltage Vcpu (e.g., 3V) of the control unit 201. Thereby, the control unit 201 may be protected from overvoltage. (Item 7) The control unit manages a detection period in which the current is detected through the input terminal of the AD converter and a non-detection period in which the current is not detected through the input terminal of the AD converter, and executes protection of the input terminal by the protection circuit during the non-detection period. The power supply device according to any one of items 1 to 6, which is configured as described above.

[0082] As shown in FIGS. 4 and 6, phase iii is an example of a detection period. Phases i, ii, and iv are examples of non-detection periods. (Item 8) The control unit is configured to execute protection of the input terminal by the protection circuit when a detection voltage proportional to the current detected by the AD converter becomes less than a threshold value. The power supply device according to item 3 or 4, which is configured as described above.

[0083] The voltage V_AD proportional to the charging current Ipri is an example of a detection voltage. The threshold value Ith is a threshold value corresponding to the charging current Ipri. However, inside the control unit 201, the threshold value compared with the voltage V_AD is an example of the threshold value compared with the detection voltage. According to S302, when the detection voltage is equal to or higher than the threshold value, the PRI_CUR_AD terminal is switched from the protection state to the detection state. That is, when the detection voltage is less than the threshold value, the PRI_CUR_AD terminal is switched from the detection state to the protection state. (Item 9) The determination means is configured to determine whether the overvoltage is applied to the input terminal of the AD converter based on the value of the output voltage output from the power supply circuit, according to any one of Items 1 to 6 of the power supply device described above.

[0084] As described in Embodiment 3, based on the value of the charging voltage Vpri which is high voltage, the control unit 201 may determine whether an overvoltage is applied to the PRI_CUR_AD terminal. (Item 10) The current detection circuit includes a conversion circuit that converts the current flowing through the load into a detection voltage proportional to the current, and a first resistor connected between the conversion circuit and a voltage source. The protection circuit has a second resistor that, in cooperation with the first resistor, forms a voltage dividing circuit for dividing the operating voltage of the conversion circuit. The control unit is configured to reduce the detection voltage output from the conversion circuit to the input terminal by dividing the operating voltage of the conversion circuit by the voltage dividing circuit, according to the power supply device described in Item 1.

[0085] As described in Embodiments 2 and 3, the resistors R21 and R22 are examples of the first resistor. The resistor R26 is an example of the second resistor that, in cooperation with the resistor R21, divides the operating voltage (e.g., V2). The control unit 201 may reduce the voltage V_AD by switching whether to activate or deactivate the resistor R26 in the voltage dividing circuit. (Item 11) One end of the first resistor is connected to the voltage source, the other end of the first resistor is connected to one end of the second resistor, The control unit has an output terminal connected to the other end of the second resistor, and is configured to control whether the voltage dividing circuit divides the voltage from the voltage source based on the signal output from the output terminal. The power supply device according to item 10.

[0086] As illustrated in FIGS. 5 and 8, the control unit 201 may control whether to divide the voltage from the voltage source (e.g., the power supply voltage V2) by the signal (Lo / Hi-Z) output from the PRI_VOL_CONT terminal connected to the resistor R26. (Item 12) It further has a third resistor with one end connected to the other end of the first resistor and the other end connected to ground, one end of the second resistor is connected to the other end of the first resistor and one end of the third resistor, The control unit applies a signal with high impedance to the other end of the second resistor during the detection period of detecting the current using the input terminal, and applies a signal with low level to the other end of the second resistor during the non-detection period of not detecting the current using the input terminal. The power supply device according to item 11, which is configured as described above.

[0087] As shown in FIGS. 5 and 8, the resistor R22 is an example of the third resistor. As described above, a signal with Hi-Z (high impedance) is output in phase iii. Signals with Lo (low level) are output in phases i, ii, and iv. (Item 13) The conversion circuit, an operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal, a fourth resistor connected between the inverting input terminal and the output terminal and determining the resolution of the current detected by the current detection circuit. During the detection period in which the current detection circuit detects the current, a first reference voltage generated by dividing the power supply voltage from the voltage source by the first resistor and the third resistor is supplied to the non-inverting input terminal. During the detection period in which the current detection circuit detects the current, a first reference voltage generated by dividing the power supply voltage supplied from the voltage source by the first resistor and the third resistor is supplied to the non-inverting input terminal. During the non-detection period in which the current detection circuit does not detect the current, a second reference voltage generated by dividing the power supply voltage supplied from the voltage source by the first resistor, the second resistor, and the third resistor is supplied to the non-inverting input terminal. The second reference voltage is lower than the first reference voltage. The current flows through the fifth resistor to the inverting input terminal. The power supply device according to item 12.

[0088] As shown in FIGS. 5 and 8, the resistor R27 is an example of the fourth resistor. The first reference voltage is a voltage generated by dividing the power supply voltage V2 by the resistor R21 and the resistor R22. The second reference voltage is a voltage generated by dividing the voltage by the resistor R21, the resistor R22, and the resistor R26. (Item 14) The second reference voltage is lower than the operating voltage supplied to the control unit. The power supply device according to item 13.

[0089] As described in the second embodiment, the second reference voltage is set to be lower than Vcpu. (Item 15) The control unit manages a detection period in which the current is detected through the input terminal of the AD converter and a non-detection period in which the current is not detected through the input terminal of the AD converter, and in the non-detection period, the power supply device according to item 11 is configured to execute protection of the input terminal by the protection circuit.

[0090] As shown in FIG. 6, Phase iii is an example of a detection period. Phases i, ii, and iv are examples of non-detection periods. (Item 16) The power supply device according to item 11, wherein the control unit is configured to execute protection of the input terminal by the protection circuit when the detection voltage proportional to the current detected by the AD converter is less than a threshold value.

[0091] As described in the second embodiment, the voltage V_AD proportional to the charging current Ipri is an example of the detection voltage. The threshold value Ith is a threshold value corresponding to the charging current Ipri, but inside the control unit 201, the threshold value compared with the voltage V_AD is an example of the threshold value compared with the detection voltage. According to S302, when the detection voltage is equal to or higher than the threshold value, the PRI_CUR_AD terminal is switched from the protection state to the detection state. That is, when the detection voltage is less than the threshold value, the PRI_CUR_AD terminal is switched from the detection state to the protection state. (Item 17) The power supply device according to item 11, wherein the determination means is configured to determine whether the overvoltage is applied to the input terminal of the AD converter based on the value of the output voltage output from the power supply circuit.

[0092] As shown in S902, when the charging voltage Vpri becomes equal to or higher than the threshold value, the PRI_CUR_AD terminal is switched from the protection state to the detection state. That is, when the charging voltage Vpri becomes less than the threshold value, the PRI_CUR_AD terminal is switched from the detection state to the protection state. Note that the voltage Vpri_sns proportional to the charging voltage Vpri is an example of the detection voltage. (Item 18) The power supply circuit is configured to apply a high voltage of negative polarity to the load. The current detection circuit is configured to detect the current flowing through the load when the high voltage of negative polarity is applied from the power supply circuit to the load. The power supply device according to any one of items 1 to 17.

[0093] As described in Example 1 etc., the charging voltage Vpri may be a high negative voltage (e.g., -1000V). Note that the high voltage generally refers to an AC voltage of 600V or more, but an AC voltage lower than that may also be included. (Item 19) a photoreceptor, a charging member for charging the photoreceptor, a developing member for developing an electrostatic latent image formed on the photoreceptor with toner, a power supply device according to any one of Items 1 to 18 for supplying a charging voltage to the charging member, and an image forming apparatus having the same.

[0094] The charging roller 132a is an example of the charging member. The developing roller 133a is an example of the developing member.

[0095] The invention is not limited to the above embodiments, and various changes and modifications are possible without departing from the spirit and scope of the invention. Therefore, claims are attached to disclose the scope of the invention.

Explanation of Reference Numerals

[0096] 132b: charging circuit, 132c: current detection circuit, 132d: protection circuit, 200: control unit

Claims

1. A power supply circuit that generates an output voltage, A current detection circuit that detects a current flowing through a load to which the output voltage is applied, A control unit that controls the power supply circuit based on an output signal output from the current detection circuit, The control unit, An AD converter that reads the output signal, Determination means for determining whether an overvoltage can be applied to an input terminal of the AD converter, A protection circuit that protects the input terminal of the AD converter from the overvoltage, When the determination means determines that the overvoltage can be applied to the input terminal of the AD converter, the control unit controls the protection circuit to reduce the voltage applied to the input terminal of the AD converter. A power supply device.

2. The protection circuit includes a voltage dividing circuit that divides the voltage applied to the input terminal, The control unit is configured to control whether to divide the voltage applied to the input terminal by the voltage dividing circuit. The power supply device according to claim 1.

3. The current detection circuit, A conversion circuit that converts the current flowing through the load into a detection voltage proportional to the current, A first resistor connected between the conversion circuit and the input terminal and forming part of the voltage dividing circuit, The voltage dividing circuit has a second resistor having one end connected to a connection portion between the first resistor and the input terminal, The control unit has an output terminal connected to the other end of the second resistor, and controls whether the voltage dividing circuit divides the voltage applied to the input terminal based on a signal output from the output terminal. The power supply device according to claim 2.

4. The conversion circuit, An operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal, It has a third resistor connected between the inverting input terminal and the output terminal, which determines the resolution of the current detected by the current detection circuit. A reference voltage is supplied to the non-inverting input terminal from a voltage source. The power supply device according to claim 3, wherein the current flows through the inverting input terminal via a fourth resistor.

5. The power supply device according to claim 4, wherein, during a period when the control unit does not detect the current using the current detection circuit, a voltage generated by dividing the reference voltage by the voltage dividing circuit is applied to the input terminal.

6. The power supply device according to claim 1, wherein the protection circuit is configured to reduce the voltage applied to the input terminal so as to be equal to or lower than the operating voltage of the control unit.

7. The control unit manages a detection period in which the current is detected through the input terminal of the AD converter and a non-detection period in which the current is not detected through the input terminal of the AD converter, and executes protection of the input terminal by the protection circuit during the non-detection period. The power supply device according to claim 1, which is configured as described above.

8. The control unit is configured to execute protection of the input terminal by the protection circuit when the detection voltage proportional to the current detected by the AD converter becomes less than a threshold value. The power supply device according to claim 3, which is configured as described above.

9. The determination means is configured to determine whether the overvoltage is applied to the input terminal of the AD converter based on the value of the output voltage output from the power supply circuit. The power supply device according to claim 1, which is configured as described above.

10. The current detection circuit It has a conversion circuit that converts the current flowing through the load into a detection voltage proportional to the current, and a first resistor connected between the conversion circuit and a voltage source. The protection circuit has a second resistor that, in cooperation with the first resistor, forms a voltage dividing circuit for dividing the operating voltage of the conversion circuit. The control unit is configured to reduce the detection voltage output from the conversion circuit to the input terminal by dividing the operating voltage of the conversion circuit by the voltage dividing circuit. The power supply device according to claim 1.

11. One end of the first resistor is connected to the voltage source. The other end of the first resistor is connected to one end of the second resistor. The control unit has an output terminal connected to the other end of the second resistor, and is configured to control whether the voltage dividing circuit divides the voltage from the voltage source based on a signal output from the output terminal. The power supply device according to claim 10.

12. It further has a third resistor with one end connected to the other end of the first resistor and the other end connected to ground. One end of the second resistor is connected to the other end of the first resistor and one end of the third resistor. The control unit applies a signal that becomes a high impedance to the other end of the second resistor during a detection period in which the current is detected using the input terminal, and applies a signal that becomes a low level to the other end of the second resistor during a non-detection period in which the current is not detected using the input terminal. The power supply device according to claim 11.

13. The conversion circuit An operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output terminal, A fourth resistor connected between the inverting input terminal and the output terminal and determining the resolution of the current detected by the current detection circuit. During a detection period in which the current detection circuit detects the current, a first reference voltage generated by dividing the power supply voltage from the voltage source by the first resistor and the third resistor is supplied to the non-inverting input terminal. During a detection period in which the current detection circuit detects the current, a first reference voltage generated by dividing the power supply voltage supplied from the voltage source by the first resistor and the third resistor is supplied to the non-inverting input terminal. During a non-detection period in which the current detection circuit does not detect the current, a second reference voltage generated by dividing the power supply voltage supplied from the voltage source by the first resistor, the second resistor, and the third resistor is supplied to the non-inverting input terminal. The second reference voltage is lower than the first reference voltage. The power supply device according to claim 12, wherein the current flows through the fifth resistor to the inverting input terminal.

14. The power supply device according to claim 13, wherein the second reference voltage is lower than an operating voltage supplied to the control unit.

15. The control unit manages a detection period in which the current is detected through the input terminal of the AD converter and a non-detection period in which the current is not detected through the input terminal of the AD converter, and in the non-detection period, the power supply device according to claim 11 is configured to execute protection of the input terminal by the protection circuit.

16. The control unit is configured to execute protection of the input terminal by the protection circuit when a detection voltage proportional to the current detected by the AD converter becomes less than a threshold value. The power supply device according to claim 11.

17. The determination means is configured to determine whether the overvoltage is applied to the input terminal of the AD converter based on a value of the output voltage output from the power supply circuit. The power supply device according to claim 11.

18. The power supply circuit is configured to apply a high voltage of a negative polarity to the load. The power supply device according to claim 1, wherein the current detection circuit is configured to detect the current flowing through the load when the high negative voltage is applied from the power supply circuit to the load.

19. A photoreceptor; A charging member for charging the photoreceptor; A developing member for developing an electrostatic latent image formed on the photoreceptor with toner; The power supply device according to any one of claims 1 to 18, which supplies a charging voltage to the charging member; An image forming apparatus having the same.

Images