Optical element
The optical element design with shallow holes in the second layer of the substrate reduces light loss by confining light within a specific region, addressing the issue of increased scattering in conventional designs.
Patent Information
- Application Number
- JP2023210538
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-12-13
- Publication Date
- 2025-06-25
AI Technical Summary
Optical elements with holes in the substrate face increased light loss due to the scattering and leakage of light through these holes.
The optical element design includes a substrate with a first region having a first and second layer, where the holes in the second layer are shallow, with a depth of 1/2 or less of the second layer's thickness, and the second region lacks the second layer, confining light within the first region to reduce scattering and loss.
This design effectively suppresses light loss by confining light within the first region, maintaining a desired branching ratio while minimizing scattering, thus enhancing the efficiency of light transmission.
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Figure 2025094787000001_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to an optical element.
Background Art
[0002] A mosaic-type optical element having a plurality of holes arranged in the plane of a substrate has been developed (Non-Patent Document 1, etc.).
Prior Art Documents
Non-Patent Documents
[0003]
Non-Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0004] Optical elements are known that can split light at a specific branching ratio according to the pattern of holes. However, there is a risk that the loss of light increases due to the holes. Accordingly, an object is to provide an optical element capable of suppressing light loss.
Means for Solving the Problems
[0005] The optical element according to the present disclosure includes a substrate having a first region and a second region in a plane, a first waveguide for inputting light, and a second waveguide for outputting light. The second region surrounds the first region, the first waveguide and the second waveguide are optically coupled to the first region, and in the first region, the substrate includes a first layer and a second layer stacked in order. A plurality of holes are provided in the second layer, the depth of the holes is 1 / 2 or less of the thickness of the second layer, the substrate does not have the second layer in the second region, and has the first layer.
Effects of the Invention
[0006] According to the present disclosure, it is possible to provide an optical element capable of suppressing light loss.
Brief Description of the Drawings
[0007]
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Mode for Carrying Out the Invention
[0008] [Description of Embodiments of the Present Disclosure] First, the content of the embodiments of the present disclosure will be listed and described.
[0009] One embodiment of the present disclosure includes: (1) a substrate having a first region and a second region in a plane, a first waveguide for inputting light, and a second waveguide for outputting light, wherein the second region surrounds the first region, the first waveguide and the second waveguide are optically coupled to the first region, in the first region, the substrate includes a first layer and a second layer stacked in order, a plurality of holes are provided in the second layer, the depth of the holes is 1 / 2 or less of the thickness of the second layer, in the second region, the substrate does not have the second layer and has the first layer, which is an optical element. Light loss can be suppressed. (2) In the above (1), the depth of the holes may be 1 / 20 or more and 1 / 2 or less of the thickness of the second layer. Light loss can be suppressed. (3) In the above (1) or (2), the depth of the holes may be 1 / 5 or more and 2 / 5 or less of the thickness of the second layer. Light loss can be suppressed. (4) In any of the above (1) to (3), the first layer may be formed of silicon oxide and the second layer may be formed of silicon. Light loss can be suppressed. (5) In any of the above (1) to (4), the planar shape of the holes may be rectangular. Light loss can be suppressed. (6) In any of the above (1) to (5), the planar shape of the first region may be rectangular. Light can be confined in the rectangular first region and loss can be suppressed. (7) In any of the above (1) to (6), one of the first waveguides and a plurality of the second waveguides may be provided. Light can be branched. (8) In any of the above (1) to (7), the mode of the light input to the first waveguide may be different from the mode of the light output from the second waveguide. The mode of light can be converted. (9) In any one of (1) to (8) above, a grating coupler connected to at least one of the first waveguide and the second waveguide is provided. The grating coupler is formed in the second layer and has unevenness provided in the second layer. The depth of the hole may be equal to the depth of the unevenness. The hole and the unevenness can be formed simultaneously. (10) In any one of (1) to (9) above, an insulating film covering the side surface and the upper surface of the first region and covering the upper surface of the second region may be provided. Light can be confined in the second layer of the first region.
[0010] [Details of Embodiments of the Present Disclosure] A specific example of the optical element according to the embodiment of the present disclosure will be described below with reference to the drawings. Note that the present disclosure is not limited to these examples, and is shown by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims.
[0011] <First Embodiment> (Optical Element) FIG. 1 is a plan view illustrating an optical element 1 according to the first embodiment. The optical element 1 includes a substrate 10, a multiplexer / demultiplexer 100, waveguides 20, 22, and 24, and three grating couplers 26. In the plan view, the clad layer covering the optical element 1 is shown in a perspective view.
[0012] The substrate 10 is, for example, an SOI (Silicon on Insulator) substrate. Two sides of the substrate 10 are parallel to the X-axis direction. The other two sides are parallel to the Y-axis direction. The upper surface of the substrate 10 is parallel to the XY plane. The Z-axis direction is the normal direction of the substrate 10. The X-axis direction, the Y-axis direction, and the Z-axis direction are orthogonal to each other. The length L1 of the substrate 10 in the X-axis direction is, for example, 300 μm. The length L2 in the Y-axis direction is, for example, 150 μm.
[0013] The substrate 10 has a region 30 (first region) and a region 32 (second region). The region 30 is located at the center of the substrate 10. The region 32 is located outside the region 30 and surrounds the region 30. A multiplexer / demultiplexer 100 is provided in the region 30.
[0014] The waveguide 20, the waveguide 22, and the waveguide 24 are optically coupled to the multiplexer / demultiplexer 100. The waveguide 20 (first waveguide) is connected to one end of the multiplexer / demultiplexer 100. The waveguides 22 and 24 (second waveguides) are connected to the other end of the multiplexer / demultiplexer 100. A grating coupler 26 is connected to the portion of each of the waveguides 20, 22, and 24 opposite to the multiplexer / demultiplexer 100. The waveguides 20, 22, 24, and the grating coupler 26 are provided in the region 32. The length La of the grating coupler 26 in the X-axis direction is, for example, 60 μm. The length Lb in the Y-axis direction is, for example, 30 μm.
[0015] In an example of the present disclosure, the multiplexer / demultiplexer 100 is a power multiplexer / demultiplexer. A power multiplexer / demultiplexer is an element that branches the input light at a certain intensity ratio and outputs it as a plurality of lights, or an element that combines the plurality of input lights and outputs them as one or more lights. In another example of the present disclosure, the multiplexer / demultiplexer is a mode divider. A mode divider is an element that, when light having a specific polarization is input, converts a part of the light into light having another polarization at a certain ratio, and branches and outputs the light having the specific polarization and the light having the other polarization. In still another example of the present disclosure, the multiplexer / demultiplexer is a mode converter. A mode converter is an element that, when light having a specific polarization is input, converts the light into light having another polarization and outputs it.
[0016] (Multiplexer / Demultiplexer) FIG. 2 is an enlarged schematic plan view of the multiplexer / demultiplexer 100. The multiplexer / demultiplexer 100 is provided in the region 30 of the substrate 10. The planar shape of the region 30 is rectangular. The region 32 is located outside the region 30.
[0017] The multiplexer / demultiplexer 100 is a mosaic-type passive optical element. The mosaic type means a configuration in which a plurality of holes 40 are two-dimensionally arranged in a plane. The multiplexer / demultiplexer 100 branches and emits light having a specific incident wavelength, or multiplexes and emits a plurality of incident lights having the same wavelength. The planar shape of the multiplexer / demultiplexer 100 is, for example, rectangular. The length L3 of the multiplexer / demultiplexer 100 in the X-axis direction is, for example, 32 μm. The length L4 in the Y-axis direction is, for example, 6 μm.
[0018] The multiplexer / demultiplexer 100 has a plurality of holes 40. The plurality of holes 40 are two-dimensionally arranged in the XY plane and are arranged along the X-axis direction and the Y-axis direction. The planar shape of the hole 40 is, for example, rectangular. The length L5 of one side of the hole 40 is, for example, 400 nm. The number and position of the holes 40 are determined according to the characteristics of the multiplexer / demultiplexer 100. The characteristics are, for example, the branching ratio, the mode of the output light, and the like.
[0019] FIG. 3A is a cross-sectional view taken along line A-A of FIG. 2. FIG. 3B is a cross-sectional view taken along line B-B of FIG. 2. As shown in FIGS. 3A and 3B, the substrate 10 is an SOI substrate and has a substrate 12, a box layer 14 (first layer), and a silicon layer 16 (second layer).
[0020] As shown in FIG. 3A, a multiplexer / demultiplexer 100 is formed in the region 30 of the substrate 10. A silicon layer 16 is provided in the region 30. A box layer 14 is laminated on one surface of the substrate 12. The silicon layer 16 is laminated on the surface of the box layer 14 opposite to the substrate 12. The thickness T1 of the thick portion of the silicon layer 16 is, for example, 220 nm. A clad layer 18 (insulating film) is laminated on the surface of the silicon layer 16 opposite to the box layer 14. The substrate 12 and the silicon layer 16 are formed of silicon (Si). The box layer 14 and the clad layer 18 are formed of an insulator such as silicon dioxide (SiO2). The thickness of the box layer 14 is, for example, 3 μm. The refractive index of silicon is about 3.46 at a wavelength of 1.55 μm. The refractive index of SiO2 is about 1.46 at a wavelength of 1.55 μm. The refractive index of the silicon layer 16 is higher than the refractive indices of the box layer 14 and the clad layer 18. In the Y-axis direction, in the region 32 adjacent to the region 30, the silicon layer 16 is not provided, and the substrate 12 and the box layer 14 are provided.
[0021] As shown in FIG. 3A, a plurality of holes 40 are provided in the silicon layer 16. The portion of the silicon layer 16 where the holes 40 are not provided is defined as a terrace 17. The thickness of the silicon layer 16 at the position of the terrace 17 is T1. In the Z-axis direction, the holes 40 are recessed more than the terrace 17. The depth D1 of the holes 40 with respect to the upper surface of the terrace 17 is equal to or less than 1 / 2 of the thickness T1 of the silicon layer 16. When the thickness T1 is 220 nm, the depth D1 is 110 nm or less, and may be, for example, 50 nm or more and 100 nm or less, or may be 70 nm.
[0022] The clad layer 18 covers the upper surface and the side surfaces of the silicon layer 16. The inside of the holes 40 may be filled with the clad layer 18, or may not be filled with the clad layer 18 and may contain air. The positions and the number of the holes 40 are determined according to the characteristics. The number of the holes 40 is, for example, several tens, several hundreds, or more than one thousand.
[0023] As shown in FIG. 3B, the waveguide 20 is formed in the silicon layer 16. The cross-sectional shape of the waveguide 20 is rectangular. The width W1 of the waveguide 20 is, for example, 1 μm. The thickness of the waveguide 20 is the same as the thickness of the terrace 17 of the silicon layer 16 and is, for example, 220 nm. The upper surface and side surfaces of the waveguide 20 are covered by the cladding layer 18. The waveguides 22 and 24 have the same configuration as the waveguide 20.
[0024] (Grating coupler) FIG. 3C is a cross-sectional view illustrating the grating coupler 26. The grating coupler 26 is provided in the silicon layer 16 and has irregularities. That is, a plurality of convex portions 26a and a plurality of concave portions 26b are arranged alternately. The thickness of the silicon layer 16 in the convex portion 26a is equal to the thickness T1 of the terrace 17. The depth D2 from the upper surface of the convex portion 26a to the bottom surface of the concave portion 26b is equal to the depth D1 of the hole 40 and is, for example, 70 nm.
[0025] As shown in FIG. 1, three waveguides 20, 22, and 24 are connected to the multiplexer / demultiplexer 100. Light is incident on the waveguide 20 from the grating coupler 26. As indicated by the arrow in FIG. 2, the light propagates through the waveguide 20 and is input to the multiplexer / demultiplexer 100. The inside of the hole 40 is filled with the SiO2 cladding layer 18. The refractive index of the hole 40 is different from the refractive index of the silicon layer 16. The light is scattered and branched in the plane including the substrate 10 and the cladding layer 18. A part of the light is output from the waveguide 22. Another part of the light is output from the waveguide 24. Assuming the branching ratio of the light is γ, when light with an intensity of 1 is input to the waveguide 20, the intensity of the light output from the waveguide 24 is γ, and the intensity of the light output from the waveguide 22 is 1 - γ. γ is a value of 1 or less. The light emitted from the waveguides 22 and 24 is output through the grating coupler 26.
[0026] The arrangement of the plurality of holes 40 may be designed according to the desired branching ratio. By repeatedly performing simulation calculations on the branching ratio while changing the pattern of the holes 40, a pattern corresponding to the desired branching ratio may be designed.
[0027] (Manufacturing method) Figures 4A to 5B are cross-sectional views illustrating a method for manufacturing the optical element 1, and illustrate a cross-section corresponding to FIG. 3A.
[0028] As shown in FIG. 4A, a resist is applied to the upper surface of the silicon layer 16, and photolithography is performed using a stepper to form a resist mask 50. The resist mask 50 is patterned according to the arrangement of the designed holes 40, and openings 52 are formed. The silicon layer 16 is exposed from the openings 52.
[0029] As shown in FIG. 4B, dry etching is performed to form holes 40 in the silicon layer 16. Among the silicon layer 16, the portion exposed from the openings 52 of the resist mask 50 is etched to form the holes 40. The etching depth is less than or equal to half of the thickness of the silicon layer 16, for example, 70 nm. A silicon layer 16 with a thickness of 150 nm remains between the bottom surface of the holes 40 and the upper surface of the box layer 14. The portion of the silicon layer 16 covered by the resist mask 50 is not etched.
[0030] Although illustration is omitted, the resist mask 50 also has openings in the portion where the grating coupler 26 is manufactured. The portion of the silicon layer 16 exposed from the openings is dry-etched, for example, to a depth of 70 nm. At the same time as the manufacture of the holes 40, the recesses 26b of the grating coupler 26 are also formed. The waveguide is not formed in this step. After the manufacture of the holes 40 and the recesses 26b, the resist mask 50 is removed.
[0031] As shown in FIG. 5A, a resist is applied to the upper surface of the silicon layer 16, and photolithography is performed to form a resist mask 54. The resist mask 54 is rectangular and covers the region 30. In the Y-axis direction, the silicon layer 16 in the region 32 in contact with the region 30 is exposed from the resist mask 54.
[0032] As shown in FIG. 5B, dry etching is performed to remove the portion of the silicon layer 16 that is exposed from the resist mask 54. The silicon layer 16 is removed from the region 32, and the box layer 14 is exposed. The silicon layer 16 remains in the region 30.
[0033] Although illustration is omitted, the resist mask 54 is also patterned in the portion where the waveguide is manufactured. The resist mask 54 covers the portion of the silicon layer 16 where the waveguide is formed. After dry etching, a waveguide is formed in the remaining portion of the silicon layer 16. After dry etching, the resist mask 54 is removed. The cladding layer 18 is formed. The cladding layer 18 covers the upper surface and the side surface of the region 30, the upper surface of the region 32, and the waveguide. The optical element 1 is manufactured through the above steps.
[0034] (Comparative Example) FIG. 6 is a cross-sectional view illustrating a multiplexer / demultiplexer 110 according to a comparative example. The substrate 10 has a region 31. A plurality of holes 40 are provided in the region 31. The depth D3 of the hole 40 is greater than the depth D1 in FIG. 3A and greater than half of the thickness T1 of the silicon layer 16. When the thickness T1 is 220 nm, the depth D3 is, for example, greater than 110 nm. The silicon layer 16 has a rib 19. The rib 19 protrudes outside the region 31 in the XY plane. The distance from the upper surface of the rib 19 to the upper surface of the terrace 17 is, for example, equal to the depth D3.
[0035] Since the holes 40 in the comparative example are deep, the mode of the light guiding the multiplexer / demultiplexer 110 approaches vertical symmetry in the Z-axis direction. However, in the Z-axis direction, about half of the light mode oozes into the cladding layer 18. Due to the deep holes 40, the light is strongly scattered, and there is a silicon rib 19, so the scattered light oozes outside the multiplexer / demultiplexer 110 in the XY plane. The light loss increases.
[0036] According to the first embodiment, the substrate 10 has a region 30 and a region 32. As shown in FIG. 3A, in the region 30, the box layer 14 and the silicon layer 16 are laminated. As shown in FIG. 2, a plurality of holes 40 are provided in the silicon layer 16. The depth D1 of the hole 40 is equal to or less than 1 / 2 of the thickness T1 at the position of the terrace 17 of the silicon layer 16. The light mode is less likely to leak in the thickness direction. The light scattering by the shallow holes 40 is weaker than that by the deep holes. As shown in FIG. 3A, in the cross section in the Y-axis direction, in the region 32 near the multiplexer / demultiplexer 100, the substrate 10 does not have the silicon layer 16. In the XY plane, the light is strongly confined in the region 30 and is less likely to leak out. Since the light is scattered by the shallow holes 40 in the region 30, the light loss can be suppressed.
[0037] The scattering by the shallow holes 40 is weaker than that by the deep holes. According to the first embodiment, since the light is confined in the region 30, the light is less likely to leak out. The light confined in the region 30 can be scattered by the plurality of holes 40 to branch the light at a desired branching ratio.
[0038] The depth D1 of the hole 40 may be equal to or greater than 1 / 20 and equal to or less than 1 / 2 of the thickness T1 of the silicon layer 16, or may be equal to or greater than 1 / 5 and equal to or less than 2 / 5 of the thickness T1. If the thickness T1 is 220 nm, the depth D1 is 11 nm or more and 110 nm or less, 44 nm or more and 88 nm or less, etc. The light loss can be suppressed.
[0039] As shown in FIG. 3A, the substrate 10 is, for example, an SOI substrate and has a substrate 12, a box layer 14, and a silicon layer 16. In the region 30, the substrate 12, the box layer 14, and the silicon layer 16 are laminated in order. In the region 32, the substrate 12 and the SiO2 box layer 14 are laminated. Near the multiplexer / demultiplexer 100, the silicon layer 16 is not provided except for the waveguides 20, 22, and 24. The light can be strongly confined in the region 30 and scattered in the multiplexer / demultiplexer 100. The light loss can be suppressed and the light can be branched.
[0040] As shown in FIG. 2, the planar shape of the region 30 on the substrate 10 is rectangular. The region 32 surrounds the region 30. Light can be confined within the rectangular region 30 to suppress losses. The region 30 may have a shape other than rectangular, such as a polygon, a circle, or an ellipse. The substrate 10 may be a substrate other than an SOI substrate. The layers included in the substrate 10 may be formed of materials other than SiO2 and Si. It is sufficient that one layer of the substrate 10 is provided in the region 30 and a plurality of holes 40 are provided in the one layer.
[0041] As shown in FIG. 2, the planar shape of the hole 40 is rectangular. By two-dimensionally arranging a plurality of rectangular holes 40, light can be branched. The planar shape of the hole 40 may also be circular, elliptical, polygonal, or the like.
[0042] The length L5 of one side of the hole 40 is several hundred nm, for example, 400 nm. If the design values of the branching ratios are the same, even if the size of the hole 40 changes, the positions of the plurality of holes 40 do not change significantly. However, if the hole 40 is too large, the branching ratio may deviate from the design value. If the hole 40 is too small, it is difficult to manufacture it with high precision by dry etching or the like. The length L5 of the hole 40 is, for example, 50 nm or more and 1000 nm or less. The hole 40 can be manufactured and the branching ratio can be made close to the design value.
[0043] The multiplexer / demultiplexer 100 is a one-input two-output element and has a waveguide 20, a waveguide 22, and a waveguide 24. Light is input from the waveguide 20. The light is scattered by the plurality of holes 40. Light is output from the waveguide 22 and the waveguide 24. Light can be branched at a desired branching ratio. The light input from the waveguide 22 and the waveguide 24 may be combined and output from the waveguide 20. The number of output waveguides may be one or two or more.
[0044] The mode of the light input to the waveguide 20 may be the same as the modes of the light output from the waveguide 22 and the light output from the waveguide 24, or may be different from at least one of the output modes.
[0045] As shown in FIG. 1, a grating coupler 26 is coupled to the waveguide. The depth D2 of the recess 26b of the grating coupler 26 may be equal to the depth D1 of the hole 40. The hole 40 and the recess 26b can be simultaneously manufactured by a single etching. The grating coupler 26 may be coupled to all waveguides or may be coupled to at least one waveguide. The optical element 1 may not include a grating coupler. The waveguides 20, 22, and 24 may extend to the end face of the optical element 1, and light may be incident on and emitted from the optical element 1 through the end face.
[0046] The cladding layer 18 covers the side surface and the upper surface of the region 30 and the upper surface of the region 32. The refractive index of the silicon layer 16 is higher than the refractive indices of the cladding layer 18 and the box layer 14. Light can be strongly confined in the silicon layer 16 of the region 30, and loss can be suppressed.
[0047] The hole 40 may be a cavity or the cladding layer 18 may be embedded therein. The refractive index of the hole 40 is different from the refractive index of silicon. The refractive index changes in the plane of the substrate 10. Light can be branched.
[0048] <Second Embodiment> (Example where D1 = 70 nm) In the second embodiment, the branching ratio γ is set to a specific value, and a multiplexer / demultiplexer is designed according to the branching ratio. FIGS. 7A to 7C are plan views illustrating the multiplexer / demultiplexer according to the second embodiment. Description of the same configuration as that of the first embodiment is omitted.
[0049] The region 30 of the substrate 10 has a silicon layer 16. The region 32 is located outside the region 30 and does not have the silicon layer 16 in the vicinity of the Y-axis direction of the multiplexer / demultiplexer. The length of the silicon layer 16 of the substrate 10 in the X-axis direction is 32 μm, and the length in the Y-axis direction is 6 μm. The silicon layer 16 of the region 30 is divided into pixels of 400 nm × 400 nm. The number of pixels is 15 × 80. Some of the pixels are etched to form holes 40. Another part of the pixels is not etched and becomes terraces 17. The designed value of the depth D1 of the holes 40 is 70 nm, and the designed values of the splitting ratio γ are 0.2, 0.3, and 0.4. As shown in FIGS. 7A to 7C, the arrangement of the plurality of holes 40 is designed according to the splitting ratio. A plurality of adjacent holes 40 are continuous and form one recess.
[0050] The multiplexer / demultiplexer in FIG. 7A is an example with a splitting ratio of 0.2. The multiplexer / demultiplexer in FIG. 7B is an example with a splitting ratio of 0.3. The multiplexer / demultiplexer in FIG. 7C is an example with a splitting ratio of 0.4. In the example of FIG. 7A, when light is input from the waveguide 20 to the multiplexer / demultiplexer, ideally 80% of the light is output from the waveguide 22, and 20% of the light is output from the waveguide 24. Other multiplexer / demultiplexers also output light according to the splitting ratio. These multiplexer / demultiplexers can be applied to the optical device 1 in FIG. 1.
[0051] While maintaining the arrangement of the holes 40 as designed, the depth of the holes 40 is changed to 20 nm, 50 nm, 70 nm, 100 nm, and 120 nm, and the splitting ratio and light loss are calculated. The substrate 10 is an SOI substrate, and the thickness of the silicon layer 16 in the portion where the holes 40 are not formed is 220 nm. The wavelength of the light is 1550 nm.
[0052] FIGS. 8A to 8C are diagrams illustrating the calculation results of the splitting ratio. The horizontal axis represents the depth D1 of the holes 40. The vertical axis represents the Splitting ratio (SR). When the splitting ratio is γ, SR is expressed by the following equation. SR = γ / (1 - γ) (1) If γ is 0.2, then SR is 0.25. If γ is 0.3, then SR is approximately 0.43. If γ is 0.4, then SR is approximately 0.67. When the branching ratio γ is the designed value (ideal value), SR also becomes the above ideal value. When the branching ratio γ deviates from the ideal value, SR also becomes a value different from the ideal value. In FIGS. 8A to 8C, the solid line represents the ideal value of the Splitting ratio. The dotted line represents the calculation result of SR.
[0053] FIG. 8A shows the calculation result of the branching ratio when the designed value of the branching ratio γ is 0.2. When the depth of the hole 40 is 20 nm, SR exceeds 1. This is because the branching ratio γ deviates from 0.2. In each example where the depth is 50 nm, 70 nm, 100 nm, and 120 nm, SR is close to the ideal value. This is because the branching ratio γ is close to the designed value of 0.2.
[0054] FIG. 8B shows the calculation result of the branching ratio when the designed value of the branching ratio γ is 0.3. When the depth of the hole 40 is 20 nm, SR exceeds 1. When the depth is 50 nm, SR is between 0.6 and 0.7. In each example where the depth is 70 nm, 100 nm, and 120 nm, SR is close to the ideal value. That is, the branching ratio γ is close to the designed value of 0.3.
[0055] FIG. 8C shows the calculation result of the branching ratio when the designed value of the branching ratio γ is 0.4. When the depth of the hole 40 is 20 nm, SR exceeds 1. The closer the depth is to the designed value of 70 nm, the closer SR is to the ideal value. The branching ratio γ is close to the designed value of 0.4.
[0056] FIG. 9 is a diagram illustrating the calculation result of the optical loss. The horizontal axis represents the depth D1 of the hole 40. The vertical axis represents the optical loss in the multiplexer / demultiplexer. The solid line represents the loss when the designed value of the branching ratio γ is 0.2. The dotted line represents the loss when γ = 0.3. The dashed line represents the loss when γ = 0.4. As shown in FIG. 9, in any branching ratio, the loss increases as the hole 40 gets deeper. The loss decreases at depths of 20 nm, 50 nm, and 70 nm.
[0057] As shown in Fig. 9, if the depth of the hole 40 is 100 nm or more, the loss increases. When the depth is 20 nm, the loss can be reduced. However, as shown in Figs. 8A to 8C, the branching ratio deviates from the ideal value. When the depth is from 50 nm to 70 nm, the branching ratio approaches the ideal value and the loss can also be suppressed.
[0058] (Redesign) Next, the multiplexer / demultiplexer is redesigned for each depth of the hole 40, and the branching ratio and loss are calculated. The depth D1 of the hole 40 is set to 20 nm, 50 nm, 70 nm, 100 nm, or 120 nm, and the design value of the branching ratio γ is set to 0.1, 0.2, 0.3, 0.4, or 0.5, and the multiplexer / demultiplexer is designed for each depth and branching ratio. That is, at each depth, the arrangement of the plurality of holes 40 is redesigned so that the branching ratio approaches the desired branching ratio γ as much as possible.
[0059] Figs. 10A to 10C are plan views illustrating the multiplexer / demultiplexer when the depth D1 of the hole 40 is 20 nm. Figs. 11A to 11E are plan views illustrating the multiplexer / demultiplexer when the depth D1 of the hole 40 is 70 nm. Figs. 12A to 12C are plan views illustrating the multiplexer / demultiplexer when the depth D1 of the hole 40 is 120 nm. Fig. 11A is an example in which the design value of the branching ratio γ is 0.1. Figs. 10A, 11B, and 12A are examples in which the design value of the branching ratio γ is 0.2. Figs. 10B, 11C, and 12B are examples in which the design value of the branching ratio γ is 0.3. Figs. 10C, 11D, and 12C are examples in which the design value of the branching ratio γ is 0.4. Fig. 11E is an example in which the design value of the branching ratio γ is 0.5. Illustrations of the multiplexer / demultiplexer with D1 = 50 nm and the multiplexer / demultiplexer with D1 = 100 nm are omitted.
[0060] For example, as shown in Figs. 10A, 11B, and 12A, when comparing with the same branching ratio (γ = 0.2), the shallower the hole 40, the more the number of holes 40, and the deeper the hole 40, the fewer the number. Compared with the shallow hole 40, the light is more strongly scattered by the deep hole 40. Therefore, the desired branching ratio is realized with a smaller number of holes 40. Since the scattering by the shallow hole 40 is weak, the desired branching ratio is realized with more holes 40.
[0061] Figures 13A to 13C are diagrams illustrating the calculation results of the branching ratio. The horizontal axis represents the depth D1 of the hole 40. The vertical axis represents the Splitting ratio (SR). In each figure, the solid line represents the ideal value of the Splitting ratio. The dotted line represents the calculation result of the SR.
[0062] Figure 13A shows the calculation result of the branching ratio when the design value of the branching ratio γ is 0.2. At any depth, the calculated SR deviates from the ideal value by about 0.01. Figure 13B shows the calculation result of the branching ratio when the design value of the branching ratio γ is 0.3. The deeper the hole 40, the greater the deviation of the SR from the ideal value. The shallower the hole 40, the closer the SR is to the ideal value. Figure 13C shows the calculation result of the branching ratio when the design value of the branching ratio γ is 0.4. When the depth of the hole 40 is 100 nm and 120 nm, the calculated value of the SR deviates significantly from the ideal value. When the depth is 50 nm, the calculated value of the SR is closest to the ideal value.
[0063] Figure 14 is a diagram illustrating the calculation results of the optical loss. The horizontal axis represents the depth D1 of the hole 40. The vertical axis represents the optical loss in the multiplexer / demultiplexer. The solid line represents the loss when the design value of the branching ratio γ is 0.2. The dotted line represents the loss when γ = 0.3. The dashed line represents the loss when γ = 0.4. As shown in Figure 14, in the example of γ = 0.2, the loss is within the range of 0.6 dB to 0.4 dB at any depth. In the examples of γ = 0.3 and γ = 0.4, the loss is large when the depth reaches 120 nm. The loss is suppressed when the depth is from 20 nm to 100 nm.
[0064] As shown in FIGS. 13B and 13C, when the depth D1 is 20 nm, 50 nm, and 70 nm, the branching ratio is close to the ideal value. As shown in FIG. 14, when the depth D1 is 120 nm, the loss is large. When the hole 40 is shallow, the loss is suppressed, and the loss is particularly reduced at D1 = 70 nm and D1 = 100 nm. As shown in FIGS. 13A to 13C, even if the arrangement of the hole 40 is explored by changing the depth D1 to approach the ideal value, the branching ratio γ does not necessarily match the ideal value. When the depth D1 is around 70 nm, the calculated value of SR does not deviate significantly from the ideal value for any branching ratio compared to other depths. When designing a multiplexer / demultiplexer having a plurality of branching ratios γ at the same hole depth D1, the depth D1 is preferably around 70 nm.
[0065] (Wavelength dependence) The wavelength of light is changed from 1520 nm to 1600 nm, and the characteristics of the multiplexer / demultiplexer are measured and calculated. The depth D1 of the hole 40 is set to 70 nm. The branching ratio γ is set to 0.1, 0.3, and 0.5, and the multiplexer / demultiplexer is designed.
[0066] FIGS. 15 to 17 are diagrams illustrating spectra. The horizontal axis represents the wavelength of light. The vertical axis represents the light transmittance or reflectance. The reflectance, the transmittance from the waveguide 22, and the transmittance from the waveguide 24 are shown. The broken line represents the calculation result of the transmittance of the waveguide 22. The dotted line represents the measurement result of the transmittance of the waveguide 22. The one-dot chain line represents the calculation result of the transmittance of the waveguide 24. The solid line represents the measurement result of the transmittance of the waveguide 24. The thin solid line represents the calculation result of the reflectance. The reflectance is the ratio of the light reflected by the waveguide 20 when light is input from the waveguide 20.
[0067] FIG. 15 shows an example where γ = 0.1 and represents the spectrum in the multiplexer / demultiplexer of FIG. 11A. The ratio of transmittance is ideally -0.46 dB : -10 dB. FIG. 16 shows an example where γ = 0.3 and represents the spectrum in the multiplexer / demultiplexer of FIG. 11C. The ratio of transmittance is ideally -1.54 dB : -5.23 dB. FIG. 17 shows an example where γ = 0.5 and represents the spectrum in the multiplexer / demultiplexer of FIG. 11E. The ratio of transmittance is ideally -3 dB : -3 dB. In each example from FIG. 15 to FIG. 17, the measurement results of transmittance are close to the calculation results. It can be seen that the branching ratio is close to the desired value in the wavelength range from 1520 nm to 1600 nm.
[0068] According to the second embodiment, by designing the number and position of the holes 40 according to the branching ratio γ, a desired branching ratio can be obtained. As shown in FIG. 9, when the holes 40 become deeper, the loss increases. When the depth D1 is from 50 nm to 70 nm, the branching ratio approaches the ideal value and the loss can be suppressed. As shown in FIG. 14, when the depth D1 is 120 nm, the loss is large. When the holes 40 are shallow, the loss is suppressed. That is, the depth D1 of the holes 40 is set to be equal to or less than 1 / 2 of the thickness T1 in the thick portion of the silicon layer 16. When the thickness T1 is 220 nm, the depth D1 is, for example, 1 / 20 or more (11 nm or more), 1 / 5 or more (44 nm or more), and 2 / 5 or less (80 nm or less) of T1. The optical loss can be suppressed. As shown in FIGS. 15 to 17, when the depth D1 is 70 nm, a desired branching ratio is realized in the wavelength range from 1520 nm to 1600 nm.
[0069] <Third Embodiment> The multiplexer / demultiplexer according to the third embodiment is a mode divider that converts the mode of light and branches the light for each mode. The description of the same configuration as that of the first embodiment or the second embodiment is omitted. The multiplexer / demultiplexer has the same configuration as that of FIG. 2. The planar shape, the length in the X-axis direction, the length in the Y-axis direction, and the length of one side of the holes 40 of the multiplexer / demultiplexer are the same as those of the multiplexer / demultiplexer 100 of the first embodiment and the second embodiment. The width of the waveguide and the thickness of the silicon layer 16 are the same as those of the first embodiment and the second embodiment. The arrangement of the plurality of holes 40 is different from that of the first embodiment and the second embodiment.
[0070] For example, the mode of the light input into the waveguide 20 is the TE0 mode. The mode of the light output from the waveguide 24 is the TE0 mode. The mode of the light output from the waveguide 22 is the TE1 mode. Assuming the splitting ratio is γ, when light with an intensity of 1 is input into the waveguide 20, the intensity of the light output from the waveguide 24 is γ, and the intensity of the light output from the waveguide 22 is 1 - γ.
[0071] FIG. 18 is a diagram showing the calculation results of the splitting ratio. The horizontal axis represents the depth D1 of the hole 40. The vertical axis represents the Splitting ratio (SR). The multiplexer / demultiplexer is designed at D1 = 20 nm, 50 nm, 70 nm, 100 nm, and 120 nm, and the splitting ratio is calculated. The wavelength of the light is 1550 nm. The SR at D1 = 50 nm is the farthest from the ideal value. When D1 = 20 nm, 70 nm, 100 nm, and 120 nm, the SR approaches the ideal value.
[0072] FIG. 19 shows the calculation results of the optical loss. The horizontal axis represents the depth D1 of the hole 40. The vertical axis represents the calculation results of the optical loss. The loss is calculated at D1 = 20 nm, 70 nm, and 120 nm. As shown in FIG. 19, the shallower the hole 40, the more the loss is suppressed.
[0073] FIGS. 20A, 21A, and 22A are diagrams exemplifying the spectra. The horizontal axis represents the wavelength of the light. The vertical axis represents the transmittance or reflectance of the light. The reflectance, the transmittance from the waveguide 22, and the transmittance from the waveguide 24 are illustrated. The dashed line represents the calculation results of the transmittance of the waveguide 22. The dash-dotted line represents the measurement results of the transmittance of the waveguide 22. The solid line represents the measurement results of the transmittance of the waveguide 24. The dotted line represents the calculation results of the transmittance of the waveguide 24. The thin solid line represents the calculation results of the reflectance. The depth D1 of the hole 40 is 70 nm. FIGS. 20B, 21B, and 22B are plan views exemplifying the multiplexer / demultiplexer according to the third embodiment.
[0074] Figures 20A and 20B are examples with γ = 0.1. Figures 21A and 21B are examples with γ = 0.5. Figures 22A and 22B are examples with γ = 0.9. In each of the examples of Figures 20A, 21A, and 22A, the measurement results of the transmittance are close to the calculation results. It can be seen that the branching ratio is close to the desired value in the wavelength range from 1520 nm to 1600 nm.
[0075] According to the third embodiment, the multiplexer / demultiplexer is a mode divider that branches light and converts the mode of the light. The mode of the light input to the waveguide 20 is different from the mode of the light output from the waveguide 24. As shown in FIG. 19, in the mode divider, by setting the depth D1 of the hole 40 to be less than or equal to half of the thickness of the silicon layer 16, the loss can be suppressed. As shown in FIGS. 20A, 21A, and 22A, the branching ratio can be made close to the desired magnitude at wavelengths from 1520 nm to 1600 nm. The mode divider of the third embodiment is designed with the arrangement and depth of the hole 40 changed compared to the power distributors of the first and second embodiments, but other parameters are the same. While using many identical parameters, the arrangement and depth of the hole 40, which are few parameters, are determined by design. Thereby, different functions such as a power distributor and a mode divider can be produced.
[0076] <Fourth Embodiment> The fourth embodiment is an example of a mode converter. The description of the same configuration as any of the first to third embodiments is omitted.
[0077] FIG. 23 is a plan view illustrating a mode converter 400 according to the fourth embodiment. The mode converter 400 has a waveguide 20 and a waveguide 22. The waveguide 20 is an input waveguide. The waveguide 22 is an output waveguide. For example, a TE0 mode is input to the waveguide 20. The mode converter 400 converts the mode of the light to a TE1 mode or a TE2 mode and emits it from the waveguide 22. The length of the mode converter 400 in the X-axis direction is 33.2 μm.
[0078] Figures 24A and 25A are diagrams illustrating spectra. The horizontal axis represents the wavelength of light. The vertical axis represents the transmittance or reflectance of light. The transmittance and reflectance of the TE0 mode, TE1 mode, and TE2 mode are illustrated. The depth D1 of the hole 40 is 70 nm. Figures 24B and 25B are plan views illustrating the mode converter according to the fourth embodiment.
[0079] In Figure 24A, the dotted line represents the measurement result (TE1 measurement) of the transmittance of the TE1 mode. The dashed-dotted line represents the calculation result (TE1 calculation) of the transmittance of the TE1 mode. The dashed line represents the calculation result (TE2 calculation) of the transmittance of the TE2 mode. The solid line represents the measurement result (TE0 measurement) of the transmittance of the TE0 mode. The double-dashed-dotted line represents the calculation result (TE0 calculation) of the transmittance of the TE0 mode. The thin solid line represents the calculation result of the reflectance. The measurement result of the transmittance of the TE1 mode is close to the calculation result.
[0080] In Figure 25A, the dotted line represents the measurement result (TE2 measurement) of the transmittance of the TE2 mode. The others are the same as in Figure 24A. The measurement result of the transmittance of the TE2 mode is close to the calculation result.
[0081] According to the fourth embodiment, light in the TE0 mode is converted into the TE1 mode or TE2 mode and emitted. As shown in Figure 24A, the transmittance of the TE1 mode is higher than that of the TE0 mode and TE2 mode. As shown in Figure 25A, the transmittance of the TE2 mode is higher than that of the TE0 mode and TE1 mode. By setting the depth of the hole 40 to 70 nm, loss can be suppressed and light of a desired mode can be emitted.
[0082] In the third and fourth embodiments, the input mode may be other than the TE0 mode. The output mode may be other than the TE1 mode and TE2 mode.
[0083] Although the embodiments of the present disclosure have been described in detail above, the present disclosure is not limited to such specific embodiments, and various modifications and changes are possible within the scope of the gist of the present disclosure described in the claims.
Description of Reference Numerals
[0084] 1 Optical element 10, 12 Substrate 14 Box layer 16 Silicon layer 17 Terrace 18 Cladding layer 19 Rib 20, 22, 24 Waveguide 26 Grating coupler 26a Protrusion 26b Recess 30, 31, 32 Region 40 Hole 50, 54 Resist mask 52 Opening 100, 110 Multiplexer / demultiplexer 400 Mode converter
Claims
1. A substrate having a first region and a second region in a plane, a first waveguide for inputting light, a second waveguide for outputting light, and comprising: the second region surrounds the first region, the first waveguide and the second waveguide are optically coupled to the first region, in the first region, the substrate includes a first layer and a second layer stacked in sequence, a plurality of holes are provided in the second layer, the depth of the holes is 1 / 2 or less of the thickness of the second layer, in the second region, the substrate does not have the second layer and has an optical element having the first layer.
2. The optical element according to claim 1, wherein the depth of the holes is 1 / 20 or more and 1 / 2 or less of the thickness of the second layer.
3. The optical element according to claim 1 or claim 2, wherein the depth of the holes is 1 / 5 or more and 2 / 5 or less of the thickness of the second layer.
4. The first layer is formed of silicon oxide, The optical element according to claim 1 or claim 2, wherein the second layer is formed of silicon.
5. The optical element according to claim 1 or claim 2, wherein the planar shape of the holes is rectangular.
6. The optical element according to claim 1 or claim 2, wherein the planar shape of the first region is rectangular.
7. One of the first waveguides, The optical element according to claim 1 or claim 2, comprising a plurality of the second waveguides.
8. The optical element according to claim 1 or claim 2, wherein the mode of the light input to the first waveguide is different from the mode of the light output from the second waveguide.
9. Comprising a grating coupler connected to at least one of the first waveguide and the second waveguide, the grating coupler is formed in the second layer and has unevenness provided in the second layer, The optical element according to claim 1 or claim 2, wherein the depth of the holes is equal to the depth of the unevenness.
10. The optical element according to claim 1 or claim 2, comprising an insulating film covering the side surface and the upper surface of the first region and covering the upper surface of the second region.