Land grid array package with kelvin contacting

Abstract

To provide an electronic device package.SOLUTION: An electronic device package can include a laminate substrate. The electronic device package can include connection pads disposed on the laminate substrate and along the perimeter of the electronic device package. Connection pads that are along the first side of the laminate substrate can have a first orientation that is different from a second orientation of connection pads that are along the second side of the laminate substrate. The first side can be adjacent to the second side. Each of the connection pads can have a minimum size for Kelvin sensing in process technology for manufacturing the electronic device package. The electronic device package can include a die enclosed within a packaging structure.SELECTED DRAWING: Figure 1A

Description

Technical Field

[0001] Cross - Reference to Related Applications This application claims the benefit of priority of U.S. Patent Application No. 18 / 806,517, entitled "LAND GRID ARRAY PACKAGE WITH KELVIN CONTACTING", filed on August 15, 2024, and U.S. Patent Application No. 63 / 611,018, entitled "LAND GRID ARRAY PACKAGE WITH KELVIN CONTACTING", filed on December 15, 2023, the disclosures of which are hereby incorporated by reference in their entirety for all purposes.

[0002] Embodiments of the present disclosure relate to the packaging of electronic devices.

Background Art

[0003] Description of Related Art The packaging of electronic devices can provide structural and thermal support for electronic devices such as integrated circuits. The packaging of electronic devices can also provide electrical connections such as input connections and output connections ("I / O connections"), as well as electrical insulation for electronic devices.

Summary of the Invention

[0004] The inventions recited in the claims each have several aspects, and no single one of them alone bears the desired attributes. Without limiting the scope of the claims, some prominent features of the present disclosure are briefly described here.

[0005] One aspect of the present disclosure is an electronic device package. This electronic device package includes a laminated substrate. The electronic device package includes a plurality of connection pads disposed on the laminated substrate and along the outer peripheral portion of the electronic device package. Among the plurality of connection pads along the first side of the laminated substrate, a first connection pad has a first orientation different from a second orientation of a second connection pad among the plurality of connection pads along the second side of the laminated substrate. The first side is adjacent to the second side. Each of the plurality of connection pads is of a minimum size with respect to Kelvin sensing in the process technology for manufacturing the electronic device package. The electronic device package includes a die encapsulated within a packaging structure.

[0006] The electronic device package can further include an exposed paddle disposed at the center of the same surface of the laminated substrate as the plurality of connection pads.

[0007] The corner of the exposed paddle can include an orientation feature indicating the position of a specific pin.

[0008] The plurality of connection pads can include 16 connection pads. The electronic device package can have a footprint of 2 millimeters by 2 millimeters.

[0009] Among the plurality of connection pads, a different number of connection pads from the second side can be positioned along the first side.

[0010] Each of the connection pads can be spaced apart from an adjacent connection pad by a minimum spacing of the process technology for manufacturing the electronic device package.

[0011] Each of the connection pads can have dimensions of 260 micrometers (μm) ± 26 μm × 170 μm ± 17 μm.

[0012] The die can include an analog switch.

[0013] An electronic device package can include a second die and signal routing within a laminated substrate that provides one or more electrical connections between the die and the second die.

[0014] An electronic device package can include signal routing within a laminated substrate that provides an electrical connection between a die and a certain connection pad among a plurality of connection pads.

[0015] Each of the connection pads can be rectangular.

[0016] The electronic device package can be a land grid array package.

[0017] One or more of the connection pads can provide input / output connections to the die.

[0018] The central region of the electronic device package may not include a plurality of connection pads.

[0019] A certain connection pad among the plurality of connection pads can be spaced apart by a distance in the range of 70 μm to 80 μm from the edge of the laminated substrate.

[0020] Two adjacent connection pads among the plurality of connection pads can have a pitch distance in the range of 380 μm to 420 μm.

[0021] Another aspect of the present disclosure is an electronic device package. This electronic device package includes a plurality of connection pads disposed on a substrate. The plurality of connection pads includes 16 connection pads positioned around the periphery of the substrate. Each of the plurality of connection pads is dimensioned for Kelvin connection. The electronic device package includes a die encapsulated within a packaging structure. The electronic device package has a footprint of 2 millimeters × 2 millimeters.

[0022] Each of the connection pads can have dimensions of 260 μm ± 10% × 170 μm ± 10%.

[0023] The electronic device package can include an exposed die paddle positioned on a substrate on the same plane as a plurality of connection pads. The exposed die paddle can be surrounded by the plurality of connection pads.

[0024] Another aspect of the present disclosure is an electronic device package. The electronic device package includes a laminated substrate including one or more signal routing layers. The electronic device package includes a plurality of connection pads disposed on the laminated substrate. The plurality of connection pads includes 16 connection pads positioned around a peripheral portion of the laminated substrate. Each of the plurality of connection pads has a rectangular footprint having dimensions of 260 μm ± 10% × 170 μm ± 10%. The electronic device package includes a die encapsulated within a packaging structure. The die is electrically connected to a connection pad among the plurality of connection pads via one or more signal routing layers. The electronic device package has a footprint of 2 millimeters × 2 millimeters.

Brief Description of the Drawings

[0025] Embodiments of the present disclosure are described by way of non-limiting examples with reference to the accompanying drawings.

Figure 1A

Figure 1B

Figure 1C

Figure 1D

Figure 1E

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Embodiments for Carrying out the Invention

[0026] The following detailed description of certain embodiments presents various descriptions of the specific embodiments. However, the innovations described herein can be embodied in many different ways, for example, as defined and encompassed by the embodiments. In this description, reference is made to the drawings, in which like reference numerals may indicate the same or functionally similar elements. It will be understood that the elements illustrated in the drawings are not necessarily drawn to scale. Furthermore, it will be understood that a particular embodiment can include more elements than shown in the drawings and / or a subset of the elements shown. Additionally, some embodiments can incorporate any suitable combination of features from two or more of the drawings.

[0027] Aspects of the present disclosure relate to an electronic device package having connection pads sized for Kelvin connection. These connection pads can be formed on a laminated substrate. The connection by Kelvin connection can significantly reduce or eliminate the influence of contact resistance in the connection. Kelvin connection can be useful in various applications. For example, Kelvin connection can be useful for accurate resistance measurement for low-resistance components, accurate voltage measurement, and other situations.

[0028] A Kelvin connection can utilize multiple pin connections on the same connection pad. The size of the connection pad can be constrained to accommodate the multiple pin connections. Reducing the overall size of an electronic device package that utilizes connection pads sized for Kelvin connections can be difficult due to such size constraints.

[0029] Embodiments of the present disclosure relate to an electronic device package having a geometric arrangement of features that enables reduction of the overall footprint of the electronic device package while maintaining connection pads sized for Kelvin connections. The packaging of the electronic devices disclosed herein can have several advantages. A Kelvin connection can eliminate or significantly reduce the effects of contact resistance from a supply rail, contact resistance from a ground reference measurement, and / or contact resistance from a low impedance resistance path. The electronic device packaging disclosed herein can enable accurate R on measurements and R on matching measurements, eliminate the need for expensive Kelvin probing, minimize the yield shock guard band for certain performance specifications, and enable a simplified and robust manufacturing flow by reducing the sensitivity of production test setups to contact resistance, or any combination thereof. Advantageously, the foregoing examples can be achieved while reducing the overall footprint of the electronic device package.

[0030] Figures 1A to 1C show an electronic device package 100 according to an embodiment. The electronic device package 100 can utilize various electronic packaging technologies. For example, the electronic device package 100 can utilize a land grid array (LGA) package or other packaging technologies. The LGA package is a laminate substrate-based package including metal pads for external electrical connections. Although various dimensions are described in relation to the electronic device package 100, other suitable dimensions can be utilized for the electronic device package 100. The electronic device package 100 can include a die. The die can include an analog switch. Using a Kelvin connection to measure the parameters of the analog switch can be particularly useful. The die can alternatively or additionally include any other suitable circuit.

[0031] Figure 1A illustrates a top view of the electronic device package 100 (also referred to herein as a semiconductor device package). As shown in Figure 1A, the electronic device package 100 can have a footprint of, for example, 2 mm × 2 mm. Figure 1A shows an index region 102 above the corner of pin 1 of the electronic device package 100.

[0032] Figure 1B illustrates a bottom view of the electronic device package 100. As shown in Figure 1B, the electronic device package 100 may include 16 connection pads 104 disposed along the outer edge of the electronic device package 100 and a paddle 106 disposed at the center of the electronic device package 100. The 16 connection pads 104 can provide unique input / output for the electronic device package 100. Individual connection pads 104a and 104b among the connection pads 104 are labeled in Figure 1B. The arrangement of the connection pads 104 is provided as an example, and other arrangements may be used. For example, Figure 1B illustrates 16 connection pads arranged in a 3-5-3-5 pin configuration starting from connection pad 104a corresponding to pin 1. However, other arrangements of the connection pads 104 may be utilized. For example, a 5-3-5-3 pin configuration may be used, more than 16 connection pads 104 may be used, less than 16 connection pads 104 may be used (e.g., 4-3-4-3 pin configuration, 3-4-3-4 pin configuration, etc.), and / or other arrangements of the connection pads 104 may be utilized.

[0033] Each of the connection pads 104 is rectangular in Figure 1B. Each connection pad 104 can be dimensioned for Kelvin contact. For example, each connection pad 104 can have a minimum area for Kelvin contact in the process technology for manufacturing the electronic device package 100. The connection pads 104 are present on a laminated substrate. The laminated substrate can provide mechanical support for the die. One or more signal routing layers may be present in the laminated substrate to electrically connect the dies of the electronic device package 100 to each other and / or to electrically connect the dies of the electronic device package 100 to one or more connection pads 104. The connection pads 104 are in-line input / output within the electronic device 100. In some embodiments, since each of the connection pads 104 can be Kelvin-connected, any of the connection pads 104 can be defined and / or redefined to perform a desired function, enhancing the flexibility of the electronic device package 100.

[0034] In some embodiments, the connection pads 104 may be arranged in two orthogonal orientations within the same plane on the surface of the electronic device package 100. For example, FIG. 1B illustrates two groups of five connection pads 104 arranged in a first orientation (as exemplified by connection pad 104a, for example), and two groups of three connection pads 104 arranged in a second orientation that is on the same plane but orthogonal to the first direction (as exemplified by connection pad 104b, for example). The two groups of five connection pads 104 are positioned along opposite sides of the semiconductor device package 100. The two groups of three connection pads 104 are positioned along the other opposite sides of the semiconductor device package 100.

[0035] In FIG. 1B, the semiconductor device package 100 includes an exposed paddle 106. In some other embodiments, as shown in FIG. 1E, a similar electronic device package may not include a paddle 106, for example. The paddle 106 is illustrated as including an orientation feature at a corner indicating the position of the connection pad 104a corresponding to pin 1. In FIG. 1B, the orientation feature is a notch or chamfer. In some other embodiments, the paddle 106 may include another orientation feature or may not include an orientation feature. The paddle 106 can assist in heat dissipation of the electronic device package 100.

[0036] Each connection pad 104 can have dimensions indicated by X1×Y1. X1 and Y1 can be dimensioned for Kelvin connection. For example, X1 may be about 260 μm and Y1 may be 170 μm. In some embodiments, X1 and Y1 can have a tolerance of about 50 μm. For a particular application, X1 can be 260 μm ± 10% and Y1 can be 170 μm ± 10%. In some such applications, X1 can be 260 μm ± 5% and Y1 can be 170 μm ± 5%. Each connection pad 104 can have a pitch distance D1 (distance from center to center from adjacent, similarly oriented connection pads 104). In some embodiments, D1 is about 400 μm. For example, D1 can be in the range of 380 μm to 420 μm. For a particular application, D1 can be in the range of 300 μm to 500 μm. Each connection pad 104 with one side adjacent to an edge can have a distance D3 to the edge along which the connection pad 104 is oriented. In some embodiments, D3 can be about 75 μm. For a particular application, D3 can be in the range of 70 μm to 95 μm, for example, in the range of 70 μm to 80 μm. For example, connection pad 104a may be about 75 μm from the right edge shown in FIG. 1B, and connection pad 104b may be about 75 μm from the upper edge shown in FIG. 1B. The paddle 106 can have a side of length indicated by D2. In some embodiments, D2 can be about 920 μm. In some embodiments, the paddle 106 may be smaller than that shown in FIG. 1B, as illustrated in FIG. 1D for example. Thus, in some embodiments, D2 can have a reduced length such as about 570 μm. In some embodiments, for example, as shown in FIG. 1E, the paddle may not be present on the semiconductor device package.

[0037] Figure 1C illustrates a side view of an electronic device package 100 including a first layer 108 and a second layer 110. The first layer 108 may include a laminated substrate having a thickness of D4. In some embodiments, D4 may be a thickness of about 205 μm. In various embodiments, the first layer 108 may have a tolerance of about 40 μm. The connection pads 104 and paddles 106 may be formed on the first layer 108. The second layer 110 may include a molding material encapsulating the die 112. As shown in FIG. 1C, the relative size of the die 112 is provided as an example. In some embodiments, the die 112 may be smaller or larger than that shown in FIG. 1C. The second layer 110 may have a thickness of D5.

[0038] FIG. 1D is a schematic bottom view of an electronic device package 120 according to another embodiment. The electronic device package 120 is similar to the electronic device package 100 of FIGS. 1A - 1C, except that the electronic device package 120 includes a die paddle 106 that is smaller than the die paddle 106 of the electronic device package 100.

[0039] FIG. 1E is a schematic bottom view of an electronic device package 130 according to another embodiment. The electronic device package 130 is similar to the electronic device package 100 of FIGS. 1A - 1C, except that the electronic device package 130 does not include a die paddle 106.

[0040] FIG. 2 illustrates another embodiment of the electronic device package 100 having a metal layer 204 and a solder mask layer 202 shown. In various embodiments, the solder mask layer 202 may be applied on the metal layer 204. The connection pads 104 and paddles 106 can be accessed through the solder mask layer 202.

[0041] Figures 3A - 3C illustrate an embodiment of the electronic device package 100. Figure 3A illustrates the electronic device package 100 having only metal layers such as the metal layer 204 of FIG. 2 as shown. As shown in Figure 3A, the metal layer can include a trace 304 corresponding to the connection pad 104 and a center trace 306 corresponding to the paddle 106. The trace 304 can have a distance of about 75 μm between the trace 304 and the edge. The trace 304 can have a center - to - center distance of about 400 μm. The trace 304 can have a gap between traces of about 100 μm. In various embodiments, the gap between the traces 304 can vary depending on the orientation of the traces 304. For example, adjacent traces 304 of the same orientation can have a gap of about 150 μm, while the gap between traces 304 of one orientation adjacent to traces 304 of another orientation can be about 100 μm. In various embodiments, the gap between the trace 304 and the center trace 306 can be about 125 μm. In other embodiments, the gap between the trace 304 and the center trace 306 can be about 100 μm. The dimensions listed above, and the dimensions shown in Figure 3A, are provided for illustrative purposes only, and other dimensions may be used.

[0042] FIG. 3B shows an electronic device package 100 having a metal layer such as metal layer 204 of FIG. 2 and a solder mask layer such as solder mask layer 202 of FIG. 2, as illustrated. As illustrated in FIG. 3B, the solder mask layer can include a connection pad solder mask 314 and a paddle solder mask 316. Each of the connection pad solder masks 314 can cover a portion of the trace 304 to form a connection pad. Similarly, the paddle solder mask 316 can cover a portion of the center trace 306 to form a paddle. In various embodiments, the distance between the edge of the trace 304 and the corresponding connection pad solder mask 314 can be about 40 μm. In other embodiments, the distance between the edge of the trace 304 and the corresponding connection pad solder mask 314 can be about 50 μm. In various embodiments, the distance between the paddle solder mask 316 and an adjacent connection pad solder mask 314 can be about 205 μm. In other embodiments, the distance between the paddle solder mask 316 and an adjacent connection pad solder mask 314 can be about 200 μm. The distance from center to center of adjacent connection pad solder masks 314 can be about 400 μm. The dimensions listed above and those illustrated in FIG. 3B are provided for illustrative purposes only, and other dimensions may be used.

[0043] FIG. 3C illustrates an electronic device package 100 having the illustrated outer shape of the final package. As illustrated in FIG. 3C, the outer shape of the final package can include connection pads 104 and paddles 106. The connection pads 104 can have approximate dimensions of 170 μm×260 μm. The electronic device package 100 can have a pitch dimension of about 400 μm. Each paddle 106 can have a distance of about 75 μm to the nearest edge. FIG. 3C illustrates a paddle 106 without a notch indicating pin 1. However, as shown in FIG. 1B, the paddle 106 can have a notch corner indicating pin 1. The dimensions listed above and those illustrated in FIG. 3C are provided for illustrative purposes only, and other dimensions may be used.

[0044] FIG. 4 illustrates a Kelvin connector 400 according to one embodiment. As shown in FIG. 4, the Kelvin connector 400 can include a first pin 402 and a second pin 404. The first pin 402 and the second pin 404 can be connected to the same pad on the first end 406. The pad on the first end 406 can correspond to a pad on a device under test (DUT). In various embodiments, the first pin 402 and the second pin 404 can have an electrically shorted connection at the first end 406. The first pin 402 and the second pin 404 can be connected to separate connections at the second end 408. For example, the first pin 402 and the second pin 404 may be connected to separate terminals of a printed circuit board (PCB). In various embodiments, the Kelvin connector 400 can be utilized with the electronic device package 100. For example, the Kelvin connector 400 may be used to connect to the connection pad 104.

[0045] Unless the context clearly requires otherwise, throughout the specification and the embodiments, words such as "comprise", "comprising", "include", "including", etc. are to be construed in an inclusive sense, i.e., in the sense of "including, but not limited to", as opposed to an exclusive or exhaustive sense. Additionally, words such as "herein", "above", "below", and words of similar import, when used in this specification, shall refer to the entire specification and not to any particular portion of the specification. Where the context permits, words in detailed descriptions using singular or plural numerical values may also include the plural or singular values, respectively. The word "or" referring to a list of two or more items is intended to cover all interpretations of the following words, i.e., any item in the list, all items in the list, and any combination of items in the list. All numerical values provided in this specification are intended to include similar values within the measurement error.

[0046] Furthermore, among numerous ones, conditional language used in this specification, such as "can", "could", "might", "may", "e.g.", "for example", "such as", and the like, generally conveys that a particular embodiment includes a particular feature, element, and / or step, while other embodiments do not include them, unless specifically provided otherwise or understood in context when used otherwise.

[0047] The teachings provided herein can be applied to other systems rather than necessarily the above systems. Further embodiments can be provided by combining elements and operations of the various embodiments described above. The acts of the methods discussed herein can be performed in any order as necessary. Furthermore, the acts of the methods discussed herein can be performed continuously or in parallel as necessary.

[0048] While certain embodiments have been described, these embodiments have been presented by way of example only and are not intended to limit the scope of the disclosure. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms. Further, various omissions, substitutions, and changes in the form of the methods and systems described herein may be made without departing from the spirit of the disclosure. For example, while the disclosed embodiments are presented in a given arrangement, alternative embodiments may perform the same functionality with different components and / or circuit topologies, and some elements may be deleted, moved, added, subdivided, combined, and / or modified. Each of these elements may be implemented in a variety of different ways as appropriate. Any suitable combination of the elements and acts of the various embodiments described above may be combined to provide further embodiments. The appended claims and their equivalents are intended to cover such forms or modifications as fall within the scope and spirit of the disclosure. Accordingly, the scope of the invention is defined by reference to the claims.

Description of the Reference Numerals

[0049] 100 Electronic device package 102 Index region 104 Connection pad 106 Die paddle 108 First layer 110 Second layer 112 Die 120 Electronic device package 130 Electronic device package 202 Mask layer 204 Metal layer 304 Trace 306 Central trace 314 Connection pad solder mask 316 Paddle solder mask 400 Kelvin connector 402 First pin 404 Second pin 406 First end 408 The second end

Claims

1. 1. An electronic device package comprising: A laminated substrate; a plurality of connection pads disposed on the laminate substrate and along a periphery of the electronic device package, a first connection pad of the plurality of connection pads along a first edge of the laminate substrate having a first orientation that is different from a second orientation of a second connection pad of the plurality of connection pads along a second edge of the laminate substrate, the first edge being adjacent the second edge, each of the plurality of connection pads being of a minimum size with respect to a Kelvin sense for a process technology for manufacturing the electronic device package; and a die encapsulated within a packaging structure.

2. 2. The electronic device package of claim 1, further comprising an exposed paddle centrally disposed on the same side of the laminate substrate as the plurality of connection pads.

3. The electronic device package of claim 2 , wherein the exposed paddle corners include orientation features that indicate the location of a particular pin.

4. 10. The electronic device package of claim 1, wherein the plurality of connection pads includes 16 connection pads, and the electronic device package has a footprint of 2 millimeters by 2 millimeters.

5. The electronic device package of claim 1 , wherein a different number of the plurality of connection pads are positioned along the first side than along the second side.

6. 2. The electronic device package of claim 1, wherein each of the connection pads is spaced from an adjacent connection pad by a minimum spacing for a process technology for manufacturing the electronic device package.

7. 10. The electronic device package of claim 1, wherein each of the connection pads has dimensions of 260 micrometers (μm)±26 μm by 170 μm±17 μm.

8. The electronic device package of claim 1 , wherein the die includes an analog switch.

9. 10. The electronic device package of claim 1 further comprising: a second die; and signal routing within the laminate substrate providing one or more electrical connections between the die and the second die.

10. 10. The electronic device package of claim 1 further comprising signal routing within the laminate substrate providing an electrical connection between the die and a connection pad of the plurality of connection pads.

11. The electronic device package of claim 1 , wherein each of the connection pads is rectangular.

12. The electronic device package of claim 1 , wherein the electronic device package is a land grid array package.

13. The electronic device package of claim 1 , wherein one or more of the connection pads provide input / output connections to the die.

14. The electronic device package of claim 1 , wherein a central region of the electronic device package does not include the plurality of connection pads.

15. 2. The electronic device package of claim 1, wherein a connection pad of the plurality of connection pads is spaced from an edge of the laminate substrate by a distance in the range of 70 μm to 95 μm.

16. 2. The electronic device package of claim 1, wherein two adjacent connection pads of the plurality of connection pads have a pitch distance in the range of 380 μm to 420 μm.

17. 1. An electronic device package comprising: a plurality of connection pads disposed on a substrate, the plurality of connection pads including sixteen connection pads positioned around a periphery of the substrate, each of the plurality of connection pads being dimensioned for a Kelvin connection; and a die encapsulated within a packaging structure, the electronic device package having a footprint of 2 millimeters by 2 millimeters.

18. 20. The electronic device package of claim 17, wherein each of the connection pads has dimensions of 260 [mu]m ± 10% by 170 [mu]m ± 10%.

19. 20. The electronic device package of claim 17, further comprising an exposed die paddle positioned on the substrate on the same side as the plurality of connection pads, the exposed die paddle being surrounded by the plurality of connection pads.

20. 1. An electronic device package comprising: a laminate substrate comprising one or more signal routing layers; a plurality of connection pads disposed on the laminate substrate, the plurality of connection pads including 16 connection pads positioned around a periphery of the laminate substrate, each of the plurality of connection pads having a rectangular footprint with dimensions of 260 μm±10% by 170 μm±10%; and a die encapsulated within a packaging structure, the die electrically connected to a connection pad of the plurality of connection pads through the one or more signal routing layers, the electronic device package having a footprint of 2 millimeters by 2 millimeters.

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